]> git.proxmox.com Git - mirror_ubuntu-bionic-kernel.git/blame - drivers/ata/libata-core.c
Merge tag 'upstream-3.5-rc5' of git://git.infradead.org/linux-ubifs
[mirror_ubuntu-bionic-kernel.git] / drivers / ata / libata-core.c
CommitLineData
1da177e4 1/*
af36d7f0
JG
2 * libata-core.c - helper library for ATA
3 *
4 * Maintained by: Jeff Garzik <jgarzik@pobox.com>
5 * Please ALWAYS copy linux-ide@vger.kernel.org
6 * on emails.
7 *
8 * Copyright 2003-2004 Red Hat, Inc. All rights reserved.
9 * Copyright 2003-2004 Jeff Garzik
10 *
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2, or (at your option)
15 * any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; see the file COPYING. If not, write to
24 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
25 *
26 *
27 * libata documentation is available via 'make {ps|pdf}docs',
28 * as Documentation/DocBook/libata.*
29 *
30 * Hardware documentation available from http://www.t13.org/ and
31 * http://www.sata-io.org/
32 *
92c52c52
AC
33 * Standards documents from:
34 * http://www.t13.org (ATA standards, PCI DMA IDE spec)
35 * http://www.t10.org (SCSI MMC - for ATAPI MMC)
36 * http://www.sata-io.org (SATA)
37 * http://www.compactflash.org (CF)
38 * http://www.qic.org (QIC157 - Tape and DSC)
39 * http://www.ce-ata.org (CE-ATA: not supported)
40 *
1da177e4
LT
41 */
42
1da177e4
LT
43#include <linux/kernel.h>
44#include <linux/module.h>
45#include <linux/pci.h>
46#include <linux/init.h>
47#include <linux/list.h>
48#include <linux/mm.h>
1da177e4
LT
49#include <linux/spinlock.h>
50#include <linux/blkdev.h>
51#include <linux/delay.h>
52#include <linux/timer.h>
53#include <linux/interrupt.h>
54#include <linux/completion.h>
55#include <linux/suspend.h>
56#include <linux/workqueue.h>
378f058c 57#include <linux/scatterlist.h>
2dcb407e 58#include <linux/io.h>
79318057 59#include <linux/async.h>
e18086d6 60#include <linux/log2.h>
5a0e3ad6 61#include <linux/slab.h>
1da177e4 62#include <scsi/scsi.h>
193515d5 63#include <scsi/scsi_cmnd.h>
1da177e4
LT
64#include <scsi/scsi_host.h>
65#include <linux/libata.h>
1da177e4 66#include <asm/byteorder.h>
140b5e59 67#include <linux/cdrom.h>
9990b6f3 68#include <linux/ratelimit.h>
9ee4f393 69#include <linux/pm_runtime.h>
1da177e4
LT
70
71#include "libata.h"
d9027470 72#include "libata-transport.h"
fda0efc5 73
d7bb4cc7 74/* debounce timing parameters in msecs { interval, duration, timeout } */
e9c83914
TH
75const unsigned long sata_deb_timing_normal[] = { 5, 100, 2000 };
76const unsigned long sata_deb_timing_hotplug[] = { 25, 500, 2000 };
77const unsigned long sata_deb_timing_long[] = { 100, 2000, 5000 };
d7bb4cc7 78
029cfd6b 79const struct ata_port_operations ata_base_port_ops = {
0aa1113d 80 .prereset = ata_std_prereset,
203c75b8 81 .postreset = ata_std_postreset,
a1efdaba 82 .error_handler = ata_std_error_handler,
029cfd6b
TH
83};
84
85const struct ata_port_operations sata_port_ops = {
86 .inherits = &ata_base_port_ops,
87
88 .qc_defer = ata_std_qc_defer,
57c9efdf 89 .hardreset = sata_std_hardreset,
029cfd6b
TH
90};
91
3373efd8
TH
92static unsigned int ata_dev_init_params(struct ata_device *dev,
93 u16 heads, u16 sectors);
94static unsigned int ata_dev_set_xfermode(struct ata_device *dev);
95static void ata_dev_xfermask(struct ata_device *dev);
75683fe7 96static unsigned long ata_dev_blacklisted(const struct ata_device *dev);
1da177e4 97
a78f57af 98atomic_t ata_print_id = ATOMIC_INIT(0);
1da177e4 99
33267325
TH
100struct ata_force_param {
101 const char *name;
102 unsigned int cbl;
103 int spd_limit;
104 unsigned long xfer_mask;
105 unsigned int horkage_on;
106 unsigned int horkage_off;
05944bdf 107 unsigned int lflags;
33267325
TH
108};
109
110struct ata_force_ent {
111 int port;
112 int device;
113 struct ata_force_param param;
114};
115
116static struct ata_force_ent *ata_force_tbl;
117static int ata_force_tbl_size;
118
119static char ata_force_param_buf[PAGE_SIZE] __initdata;
7afb4222
TH
120/* param_buf is thrown away after initialization, disallow read */
121module_param_string(force, ata_force_param_buf, sizeof(ata_force_param_buf), 0);
33267325
TH
122MODULE_PARM_DESC(force, "Force ATA configurations including cable type, link speed and transfer mode (see Documentation/kernel-parameters.txt for details)");
123
2486fa56 124static int atapi_enabled = 1;
1623c81e 125module_param(atapi_enabled, int, 0444);
ad5d8eac 126MODULE_PARM_DESC(atapi_enabled, "Enable discovery of ATAPI devices (0=off, 1=on [default])");
1623c81e 127
c5c61bda 128static int atapi_dmadir = 0;
95de719a 129module_param(atapi_dmadir, int, 0444);
ad5d8eac 130MODULE_PARM_DESC(atapi_dmadir, "Enable ATAPI DMADIR bridge support (0=off [default], 1=on)");
95de719a 131
baf4fdfa
ML
132int atapi_passthru16 = 1;
133module_param(atapi_passthru16, int, 0444);
ad5d8eac 134MODULE_PARM_DESC(atapi_passthru16, "Enable ATA_16 passthru for ATAPI devices (0=off, 1=on [default])");
baf4fdfa 135
c3c013a2
JG
136int libata_fua = 0;
137module_param_named(fua, libata_fua, int, 0444);
ad5d8eac 138MODULE_PARM_DESC(fua, "FUA support (0=off [default], 1=on)");
c3c013a2 139
2dcb407e 140static int ata_ignore_hpa;
1e999736
AC
141module_param_named(ignore_hpa, ata_ignore_hpa, int, 0644);
142MODULE_PARM_DESC(ignore_hpa, "Ignore HPA limit (0=keep BIOS limits, 1=ignore limits, using full disk)");
143
b3a70601
AC
144static int libata_dma_mask = ATA_DMA_MASK_ATA|ATA_DMA_MASK_ATAPI|ATA_DMA_MASK_CFA;
145module_param_named(dma, libata_dma_mask, int, 0444);
146MODULE_PARM_DESC(dma, "DMA enable/disable (0x1==ATA, 0x2==ATAPI, 0x4==CF)");
147
87fbc5a0 148static int ata_probe_timeout;
a8601e5f
AM
149module_param(ata_probe_timeout, int, 0444);
150MODULE_PARM_DESC(ata_probe_timeout, "Set ATA probing timeout (seconds)");
151
6ebe9d86 152int libata_noacpi = 0;
d7d0dad6 153module_param_named(noacpi, libata_noacpi, int, 0444);
ad5d8eac 154MODULE_PARM_DESC(noacpi, "Disable the use of ACPI in probe/suspend/resume (0=off [default], 1=on)");
11ef697b 155
ae8d4ee7
AC
156int libata_allow_tpm = 0;
157module_param_named(allow_tpm, libata_allow_tpm, int, 0444);
ad5d8eac 158MODULE_PARM_DESC(allow_tpm, "Permit the use of TPM commands (0=off [default], 1=on)");
ae8d4ee7 159
e7ecd435
TH
160static int atapi_an;
161module_param(atapi_an, int, 0444);
162MODULE_PARM_DESC(atapi_an, "Enable ATAPI AN media presence notification (0=0ff [default], 1=on)");
163
1da177e4
LT
164MODULE_AUTHOR("Jeff Garzik");
165MODULE_DESCRIPTION("Library module for ATA devices");
166MODULE_LICENSE("GPL");
167MODULE_VERSION(DRV_VERSION);
168
0baab86b 169
9913ff8a
TH
170static bool ata_sstatus_online(u32 sstatus)
171{
172 return (sstatus & 0xf) == 0x3;
173}
174
1eca4365
TH
175/**
176 * ata_link_next - link iteration helper
177 * @link: the previous link, NULL to start
178 * @ap: ATA port containing links to iterate
179 * @mode: iteration mode, one of ATA_LITER_*
180 *
181 * LOCKING:
182 * Host lock or EH context.
aadffb68 183 *
1eca4365
TH
184 * RETURNS:
185 * Pointer to the next link.
aadffb68 186 */
1eca4365
TH
187struct ata_link *ata_link_next(struct ata_link *link, struct ata_port *ap,
188 enum ata_link_iter_mode mode)
aadffb68 189{
1eca4365
TH
190 BUG_ON(mode != ATA_LITER_EDGE &&
191 mode != ATA_LITER_PMP_FIRST && mode != ATA_LITER_HOST_FIRST);
192
aadffb68 193 /* NULL link indicates start of iteration */
1eca4365
TH
194 if (!link)
195 switch (mode) {
196 case ATA_LITER_EDGE:
197 case ATA_LITER_PMP_FIRST:
198 if (sata_pmp_attached(ap))
199 return ap->pmp_link;
200 /* fall through */
201 case ATA_LITER_HOST_FIRST:
202 return &ap->link;
203 }
aadffb68 204
1eca4365
TH
205 /* we just iterated over the host link, what's next? */
206 if (link == &ap->link)
207 switch (mode) {
208 case ATA_LITER_HOST_FIRST:
209 if (sata_pmp_attached(ap))
210 return ap->pmp_link;
211 /* fall through */
212 case ATA_LITER_PMP_FIRST:
213 if (unlikely(ap->slave_link))
b1c72916 214 return ap->slave_link;
1eca4365
TH
215 /* fall through */
216 case ATA_LITER_EDGE:
aadffb68 217 return NULL;
b1c72916 218 }
aadffb68 219
b1c72916
TH
220 /* slave_link excludes PMP */
221 if (unlikely(link == ap->slave_link))
222 return NULL;
223
1eca4365 224 /* we were over a PMP link */
aadffb68
TH
225 if (++link < ap->pmp_link + ap->nr_pmp_links)
226 return link;
1eca4365
TH
227
228 if (mode == ATA_LITER_PMP_FIRST)
229 return &ap->link;
230
aadffb68
TH
231 return NULL;
232}
233
1eca4365
TH
234/**
235 * ata_dev_next - device iteration helper
236 * @dev: the previous device, NULL to start
237 * @link: ATA link containing devices to iterate
238 * @mode: iteration mode, one of ATA_DITER_*
239 *
240 * LOCKING:
241 * Host lock or EH context.
242 *
243 * RETURNS:
244 * Pointer to the next device.
245 */
246struct ata_device *ata_dev_next(struct ata_device *dev, struct ata_link *link,
247 enum ata_dev_iter_mode mode)
248{
249 BUG_ON(mode != ATA_DITER_ENABLED && mode != ATA_DITER_ENABLED_REVERSE &&
250 mode != ATA_DITER_ALL && mode != ATA_DITER_ALL_REVERSE);
251
252 /* NULL dev indicates start of iteration */
253 if (!dev)
254 switch (mode) {
255 case ATA_DITER_ENABLED:
256 case ATA_DITER_ALL:
257 dev = link->device;
258 goto check;
259 case ATA_DITER_ENABLED_REVERSE:
260 case ATA_DITER_ALL_REVERSE:
261 dev = link->device + ata_link_max_devices(link) - 1;
262 goto check;
263 }
264
265 next:
266 /* move to the next one */
267 switch (mode) {
268 case ATA_DITER_ENABLED:
269 case ATA_DITER_ALL:
270 if (++dev < link->device + ata_link_max_devices(link))
271 goto check;
272 return NULL;
273 case ATA_DITER_ENABLED_REVERSE:
274 case ATA_DITER_ALL_REVERSE:
275 if (--dev >= link->device)
276 goto check;
277 return NULL;
278 }
279
280 check:
281 if ((mode == ATA_DITER_ENABLED || mode == ATA_DITER_ENABLED_REVERSE) &&
282 !ata_dev_enabled(dev))
283 goto next;
284 return dev;
285}
286
b1c72916
TH
287/**
288 * ata_dev_phys_link - find physical link for a device
289 * @dev: ATA device to look up physical link for
290 *
291 * Look up physical link which @dev is attached to. Note that
292 * this is different from @dev->link only when @dev is on slave
293 * link. For all other cases, it's the same as @dev->link.
294 *
295 * LOCKING:
296 * Don't care.
297 *
298 * RETURNS:
299 * Pointer to the found physical link.
300 */
301struct ata_link *ata_dev_phys_link(struct ata_device *dev)
302{
303 struct ata_port *ap = dev->link->ap;
304
305 if (!ap->slave_link)
306 return dev->link;
307 if (!dev->devno)
308 return &ap->link;
309 return ap->slave_link;
310}
311
33267325
TH
312/**
313 * ata_force_cbl - force cable type according to libata.force
4cdfa1b3 314 * @ap: ATA port of interest
33267325
TH
315 *
316 * Force cable type according to libata.force and whine about it.
317 * The last entry which has matching port number is used, so it
318 * can be specified as part of device force parameters. For
319 * example, both "a:40c,1.00:udma4" and "1.00:40c,udma4" have the
320 * same effect.
321 *
322 * LOCKING:
323 * EH context.
324 */
325void ata_force_cbl(struct ata_port *ap)
326{
327 int i;
328
329 for (i = ata_force_tbl_size - 1; i >= 0; i--) {
330 const struct ata_force_ent *fe = &ata_force_tbl[i];
331
332 if (fe->port != -1 && fe->port != ap->print_id)
333 continue;
334
335 if (fe->param.cbl == ATA_CBL_NONE)
336 continue;
337
338 ap->cbl = fe->param.cbl;
a9a79dfe 339 ata_port_notice(ap, "FORCE: cable set to %s\n", fe->param.name);
33267325
TH
340 return;
341 }
342}
343
344/**
05944bdf 345 * ata_force_link_limits - force link limits according to libata.force
33267325
TH
346 * @link: ATA link of interest
347 *
05944bdf
TH
348 * Force link flags and SATA spd limit according to libata.force
349 * and whine about it. When only the port part is specified
350 * (e.g. 1:), the limit applies to all links connected to both
351 * the host link and all fan-out ports connected via PMP. If the
352 * device part is specified as 0 (e.g. 1.00:), it specifies the
353 * first fan-out link not the host link. Device number 15 always
b1c72916
TH
354 * points to the host link whether PMP is attached or not. If the
355 * controller has slave link, device number 16 points to it.
33267325
TH
356 *
357 * LOCKING:
358 * EH context.
359 */
05944bdf 360static void ata_force_link_limits(struct ata_link *link)
33267325 361{
05944bdf 362 bool did_spd = false;
b1c72916
TH
363 int linkno = link->pmp;
364 int i;
33267325
TH
365
366 if (ata_is_host_link(link))
b1c72916 367 linkno += 15;
33267325
TH
368
369 for (i = ata_force_tbl_size - 1; i >= 0; i--) {
370 const struct ata_force_ent *fe = &ata_force_tbl[i];
371
372 if (fe->port != -1 && fe->port != link->ap->print_id)
373 continue;
374
375 if (fe->device != -1 && fe->device != linkno)
376 continue;
377
05944bdf
TH
378 /* only honor the first spd limit */
379 if (!did_spd && fe->param.spd_limit) {
380 link->hw_sata_spd_limit = (1 << fe->param.spd_limit) - 1;
a9a79dfe 381 ata_link_notice(link, "FORCE: PHY spd limit set to %s\n",
05944bdf
TH
382 fe->param.name);
383 did_spd = true;
384 }
33267325 385
05944bdf
TH
386 /* let lflags stack */
387 if (fe->param.lflags) {
388 link->flags |= fe->param.lflags;
a9a79dfe 389 ata_link_notice(link,
05944bdf
TH
390 "FORCE: link flag 0x%x forced -> 0x%x\n",
391 fe->param.lflags, link->flags);
392 }
33267325
TH
393 }
394}
395
396/**
397 * ata_force_xfermask - force xfermask according to libata.force
398 * @dev: ATA device of interest
399 *
400 * Force xfer_mask according to libata.force and whine about it.
401 * For consistency with link selection, device number 15 selects
402 * the first device connected to the host link.
403 *
404 * LOCKING:
405 * EH context.
406 */
407static void ata_force_xfermask(struct ata_device *dev)
408{
409 int devno = dev->link->pmp + dev->devno;
410 int alt_devno = devno;
411 int i;
412
b1c72916
TH
413 /* allow n.15/16 for devices attached to host port */
414 if (ata_is_host_link(dev->link))
415 alt_devno += 15;
33267325
TH
416
417 for (i = ata_force_tbl_size - 1; i >= 0; i--) {
418 const struct ata_force_ent *fe = &ata_force_tbl[i];
419 unsigned long pio_mask, mwdma_mask, udma_mask;
420
421 if (fe->port != -1 && fe->port != dev->link->ap->print_id)
422 continue;
423
424 if (fe->device != -1 && fe->device != devno &&
425 fe->device != alt_devno)
426 continue;
427
428 if (!fe->param.xfer_mask)
429 continue;
430
431 ata_unpack_xfermask(fe->param.xfer_mask,
432 &pio_mask, &mwdma_mask, &udma_mask);
433 if (udma_mask)
434 dev->udma_mask = udma_mask;
435 else if (mwdma_mask) {
436 dev->udma_mask = 0;
437 dev->mwdma_mask = mwdma_mask;
438 } else {
439 dev->udma_mask = 0;
440 dev->mwdma_mask = 0;
441 dev->pio_mask = pio_mask;
442 }
443
a9a79dfe
JP
444 ata_dev_notice(dev, "FORCE: xfer_mask set to %s\n",
445 fe->param.name);
33267325
TH
446 return;
447 }
448}
449
450/**
451 * ata_force_horkage - force horkage according to libata.force
452 * @dev: ATA device of interest
453 *
454 * Force horkage according to libata.force and whine about it.
455 * For consistency with link selection, device number 15 selects
456 * the first device connected to the host link.
457 *
458 * LOCKING:
459 * EH context.
460 */
461static void ata_force_horkage(struct ata_device *dev)
462{
463 int devno = dev->link->pmp + dev->devno;
464 int alt_devno = devno;
465 int i;
466
b1c72916
TH
467 /* allow n.15/16 for devices attached to host port */
468 if (ata_is_host_link(dev->link))
469 alt_devno += 15;
33267325
TH
470
471 for (i = 0; i < ata_force_tbl_size; i++) {
472 const struct ata_force_ent *fe = &ata_force_tbl[i];
473
474 if (fe->port != -1 && fe->port != dev->link->ap->print_id)
475 continue;
476
477 if (fe->device != -1 && fe->device != devno &&
478 fe->device != alt_devno)
479 continue;
480
481 if (!(~dev->horkage & fe->param.horkage_on) &&
482 !(dev->horkage & fe->param.horkage_off))
483 continue;
484
485 dev->horkage |= fe->param.horkage_on;
486 dev->horkage &= ~fe->param.horkage_off;
487
a9a79dfe
JP
488 ata_dev_notice(dev, "FORCE: horkage modified (%s)\n",
489 fe->param.name);
33267325
TH
490 }
491}
492
436d34b3
TH
493/**
494 * atapi_cmd_type - Determine ATAPI command type from SCSI opcode
495 * @opcode: SCSI opcode
496 *
497 * Determine ATAPI command type from @opcode.
498 *
499 * LOCKING:
500 * None.
501 *
502 * RETURNS:
503 * ATAPI_{READ|WRITE|READ_CD|PASS_THRU|MISC}
504 */
505int atapi_cmd_type(u8 opcode)
506{
507 switch (opcode) {
508 case GPCMD_READ_10:
509 case GPCMD_READ_12:
510 return ATAPI_READ;
511
512 case GPCMD_WRITE_10:
513 case GPCMD_WRITE_12:
514 case GPCMD_WRITE_AND_VERIFY_10:
515 return ATAPI_WRITE;
516
517 case GPCMD_READ_CD:
518 case GPCMD_READ_CD_MSF:
519 return ATAPI_READ_CD;
520
e52dcc48
TH
521 case ATA_16:
522 case ATA_12:
523 if (atapi_passthru16)
524 return ATAPI_PASS_THRU;
525 /* fall thru */
436d34b3
TH
526 default:
527 return ATAPI_MISC;
528 }
529}
530
1da177e4
LT
531/**
532 * ata_tf_to_fis - Convert ATA taskfile to SATA FIS structure
533 * @tf: Taskfile to convert
1da177e4 534 * @pmp: Port multiplier port
9977126c
TH
535 * @is_cmd: This FIS is for command
536 * @fis: Buffer into which data will output
1da177e4
LT
537 *
538 * Converts a standard ATA taskfile to a Serial ATA
539 * FIS structure (Register - Host to Device).
540 *
541 * LOCKING:
542 * Inherited from caller.
543 */
9977126c 544void ata_tf_to_fis(const struct ata_taskfile *tf, u8 pmp, int is_cmd, u8 *fis)
1da177e4 545{
9977126c
TH
546 fis[0] = 0x27; /* Register - Host to Device FIS */
547 fis[1] = pmp & 0xf; /* Port multiplier number*/
548 if (is_cmd)
549 fis[1] |= (1 << 7); /* bit 7 indicates Command FIS */
550
1da177e4
LT
551 fis[2] = tf->command;
552 fis[3] = tf->feature;
553
554 fis[4] = tf->lbal;
555 fis[5] = tf->lbam;
556 fis[6] = tf->lbah;
557 fis[7] = tf->device;
558
559 fis[8] = tf->hob_lbal;
560 fis[9] = tf->hob_lbam;
561 fis[10] = tf->hob_lbah;
562 fis[11] = tf->hob_feature;
563
564 fis[12] = tf->nsect;
565 fis[13] = tf->hob_nsect;
566 fis[14] = 0;
567 fis[15] = tf->ctl;
568
569 fis[16] = 0;
570 fis[17] = 0;
571 fis[18] = 0;
572 fis[19] = 0;
573}
574
575/**
576 * ata_tf_from_fis - Convert SATA FIS to ATA taskfile
577 * @fis: Buffer from which data will be input
578 * @tf: Taskfile to output
579 *
e12a1be6 580 * Converts a serial ATA FIS structure to a standard ATA taskfile.
1da177e4
LT
581 *
582 * LOCKING:
583 * Inherited from caller.
584 */
585
057ace5e 586void ata_tf_from_fis(const u8 *fis, struct ata_taskfile *tf)
1da177e4
LT
587{
588 tf->command = fis[2]; /* status */
589 tf->feature = fis[3]; /* error */
590
591 tf->lbal = fis[4];
592 tf->lbam = fis[5];
593 tf->lbah = fis[6];
594 tf->device = fis[7];
595
596 tf->hob_lbal = fis[8];
597 tf->hob_lbam = fis[9];
598 tf->hob_lbah = fis[10];
599
600 tf->nsect = fis[12];
601 tf->hob_nsect = fis[13];
602}
603
8cbd6df1
AL
604static const u8 ata_rw_cmds[] = {
605 /* pio multi */
606 ATA_CMD_READ_MULTI,
607 ATA_CMD_WRITE_MULTI,
608 ATA_CMD_READ_MULTI_EXT,
609 ATA_CMD_WRITE_MULTI_EXT,
9a3dccc4
TH
610 0,
611 0,
612 0,
613 ATA_CMD_WRITE_MULTI_FUA_EXT,
8cbd6df1
AL
614 /* pio */
615 ATA_CMD_PIO_READ,
616 ATA_CMD_PIO_WRITE,
617 ATA_CMD_PIO_READ_EXT,
618 ATA_CMD_PIO_WRITE_EXT,
9a3dccc4
TH
619 0,
620 0,
621 0,
622 0,
8cbd6df1
AL
623 /* dma */
624 ATA_CMD_READ,
625 ATA_CMD_WRITE,
626 ATA_CMD_READ_EXT,
9a3dccc4
TH
627 ATA_CMD_WRITE_EXT,
628 0,
629 0,
630 0,
631 ATA_CMD_WRITE_FUA_EXT
8cbd6df1 632};
1da177e4
LT
633
634/**
8cbd6df1 635 * ata_rwcmd_protocol - set taskfile r/w commands and protocol
bd056d7e
TH
636 * @tf: command to examine and configure
637 * @dev: device tf belongs to
1da177e4 638 *
2e9edbf8 639 * Examine the device configuration and tf->flags to calculate
8cbd6df1 640 * the proper read/write commands and protocol to use.
1da177e4
LT
641 *
642 * LOCKING:
643 * caller.
644 */
bd056d7e 645static int ata_rwcmd_protocol(struct ata_taskfile *tf, struct ata_device *dev)
1da177e4 646{
9a3dccc4 647 u8 cmd;
1da177e4 648
9a3dccc4 649 int index, fua, lba48, write;
2e9edbf8 650
9a3dccc4 651 fua = (tf->flags & ATA_TFLAG_FUA) ? 4 : 0;
8cbd6df1
AL
652 lba48 = (tf->flags & ATA_TFLAG_LBA48) ? 2 : 0;
653 write = (tf->flags & ATA_TFLAG_WRITE) ? 1 : 0;
1da177e4 654
8cbd6df1
AL
655 if (dev->flags & ATA_DFLAG_PIO) {
656 tf->protocol = ATA_PROT_PIO;
9a3dccc4 657 index = dev->multi_count ? 0 : 8;
9af5c9c9 658 } else if (lba48 && (dev->link->ap->flags & ATA_FLAG_PIO_LBA48)) {
8d238e01
AC
659 /* Unable to use DMA due to host limitation */
660 tf->protocol = ATA_PROT_PIO;
0565c26d 661 index = dev->multi_count ? 0 : 8;
8cbd6df1
AL
662 } else {
663 tf->protocol = ATA_PROT_DMA;
9a3dccc4 664 index = 16;
8cbd6df1 665 }
1da177e4 666
9a3dccc4
TH
667 cmd = ata_rw_cmds[index + fua + lba48 + write];
668 if (cmd) {
669 tf->command = cmd;
670 return 0;
671 }
672 return -1;
1da177e4
LT
673}
674
35b649fe
TH
675/**
676 * ata_tf_read_block - Read block address from ATA taskfile
677 * @tf: ATA taskfile of interest
678 * @dev: ATA device @tf belongs to
679 *
680 * LOCKING:
681 * None.
682 *
683 * Read block address from @tf. This function can handle all
684 * three address formats - LBA, LBA48 and CHS. tf->protocol and
685 * flags select the address format to use.
686 *
687 * RETURNS:
688 * Block address read from @tf.
689 */
690u64 ata_tf_read_block(struct ata_taskfile *tf, struct ata_device *dev)
691{
692 u64 block = 0;
693
694 if (tf->flags & ATA_TFLAG_LBA) {
695 if (tf->flags & ATA_TFLAG_LBA48) {
696 block |= (u64)tf->hob_lbah << 40;
697 block |= (u64)tf->hob_lbam << 32;
44901a96 698 block |= (u64)tf->hob_lbal << 24;
35b649fe
TH
699 } else
700 block |= (tf->device & 0xf) << 24;
701
702 block |= tf->lbah << 16;
703 block |= tf->lbam << 8;
704 block |= tf->lbal;
705 } else {
706 u32 cyl, head, sect;
707
708 cyl = tf->lbam | (tf->lbah << 8);
709 head = tf->device & 0xf;
710 sect = tf->lbal;
711
ac8672ea 712 if (!sect) {
a9a79dfe
JP
713 ata_dev_warn(dev,
714 "device reported invalid CHS sector 0\n");
ac8672ea
TH
715 sect = 1; /* oh well */
716 }
717
718 block = (cyl * dev->heads + head) * dev->sectors + sect - 1;
35b649fe
TH
719 }
720
721 return block;
722}
723
bd056d7e
TH
724/**
725 * ata_build_rw_tf - Build ATA taskfile for given read/write request
726 * @tf: Target ATA taskfile
727 * @dev: ATA device @tf belongs to
728 * @block: Block address
729 * @n_block: Number of blocks
730 * @tf_flags: RW/FUA etc...
731 * @tag: tag
732 *
733 * LOCKING:
734 * None.
735 *
736 * Build ATA taskfile @tf for read/write request described by
737 * @block, @n_block, @tf_flags and @tag on @dev.
738 *
739 * RETURNS:
740 *
741 * 0 on success, -ERANGE if the request is too large for @dev,
742 * -EINVAL if the request is invalid.
743 */
744int ata_build_rw_tf(struct ata_taskfile *tf, struct ata_device *dev,
745 u64 block, u32 n_block, unsigned int tf_flags,
746 unsigned int tag)
747{
748 tf->flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
749 tf->flags |= tf_flags;
750
6d1245bf 751 if (ata_ncq_enabled(dev) && likely(tag != ATA_TAG_INTERNAL)) {
bd056d7e
TH
752 /* yay, NCQ */
753 if (!lba_48_ok(block, n_block))
754 return -ERANGE;
755
756 tf->protocol = ATA_PROT_NCQ;
757 tf->flags |= ATA_TFLAG_LBA | ATA_TFLAG_LBA48;
758
759 if (tf->flags & ATA_TFLAG_WRITE)
760 tf->command = ATA_CMD_FPDMA_WRITE;
761 else
762 tf->command = ATA_CMD_FPDMA_READ;
763
764 tf->nsect = tag << 3;
765 tf->hob_feature = (n_block >> 8) & 0xff;
766 tf->feature = n_block & 0xff;
767
768 tf->hob_lbah = (block >> 40) & 0xff;
769 tf->hob_lbam = (block >> 32) & 0xff;
770 tf->hob_lbal = (block >> 24) & 0xff;
771 tf->lbah = (block >> 16) & 0xff;
772 tf->lbam = (block >> 8) & 0xff;
773 tf->lbal = block & 0xff;
774
775 tf->device = 1 << 6;
776 if (tf->flags & ATA_TFLAG_FUA)
777 tf->device |= 1 << 7;
778 } else if (dev->flags & ATA_DFLAG_LBA) {
779 tf->flags |= ATA_TFLAG_LBA;
780
781 if (lba_28_ok(block, n_block)) {
782 /* use LBA28 */
783 tf->device |= (block >> 24) & 0xf;
784 } else if (lba_48_ok(block, n_block)) {
785 if (!(dev->flags & ATA_DFLAG_LBA48))
786 return -ERANGE;
787
788 /* use LBA48 */
789 tf->flags |= ATA_TFLAG_LBA48;
790
791 tf->hob_nsect = (n_block >> 8) & 0xff;
792
793 tf->hob_lbah = (block >> 40) & 0xff;
794 tf->hob_lbam = (block >> 32) & 0xff;
795 tf->hob_lbal = (block >> 24) & 0xff;
796 } else
797 /* request too large even for LBA48 */
798 return -ERANGE;
799
800 if (unlikely(ata_rwcmd_protocol(tf, dev) < 0))
801 return -EINVAL;
802
803 tf->nsect = n_block & 0xff;
804
805 tf->lbah = (block >> 16) & 0xff;
806 tf->lbam = (block >> 8) & 0xff;
807 tf->lbal = block & 0xff;
808
809 tf->device |= ATA_LBA;
810 } else {
811 /* CHS */
812 u32 sect, head, cyl, track;
813
814 /* The request -may- be too large for CHS addressing. */
815 if (!lba_28_ok(block, n_block))
816 return -ERANGE;
817
818 if (unlikely(ata_rwcmd_protocol(tf, dev) < 0))
819 return -EINVAL;
820
821 /* Convert LBA to CHS */
822 track = (u32)block / dev->sectors;
823 cyl = track / dev->heads;
824 head = track % dev->heads;
825 sect = (u32)block % dev->sectors + 1;
826
827 DPRINTK("block %u track %u cyl %u head %u sect %u\n",
828 (u32)block, track, cyl, head, sect);
829
830 /* Check whether the converted CHS can fit.
831 Cylinder: 0-65535
832 Head: 0-15
833 Sector: 1-255*/
834 if ((cyl >> 16) || (head >> 4) || (sect >> 8) || (!sect))
835 return -ERANGE;
836
837 tf->nsect = n_block & 0xff; /* Sector count 0 means 256 sectors */
838 tf->lbal = sect;
839 tf->lbam = cyl;
840 tf->lbah = cyl >> 8;
841 tf->device |= head;
842 }
843
844 return 0;
845}
846
cb95d562
TH
847/**
848 * ata_pack_xfermask - Pack pio, mwdma and udma masks into xfer_mask
849 * @pio_mask: pio_mask
850 * @mwdma_mask: mwdma_mask
851 * @udma_mask: udma_mask
852 *
853 * Pack @pio_mask, @mwdma_mask and @udma_mask into a single
854 * unsigned int xfer_mask.
855 *
856 * LOCKING:
857 * None.
858 *
859 * RETURNS:
860 * Packed xfer_mask.
861 */
7dc951ae
TH
862unsigned long ata_pack_xfermask(unsigned long pio_mask,
863 unsigned long mwdma_mask,
864 unsigned long udma_mask)
cb95d562
TH
865{
866 return ((pio_mask << ATA_SHIFT_PIO) & ATA_MASK_PIO) |
867 ((mwdma_mask << ATA_SHIFT_MWDMA) & ATA_MASK_MWDMA) |
868 ((udma_mask << ATA_SHIFT_UDMA) & ATA_MASK_UDMA);
869}
870
c0489e4e
TH
871/**
872 * ata_unpack_xfermask - Unpack xfer_mask into pio, mwdma and udma masks
873 * @xfer_mask: xfer_mask to unpack
874 * @pio_mask: resulting pio_mask
875 * @mwdma_mask: resulting mwdma_mask
876 * @udma_mask: resulting udma_mask
877 *
878 * Unpack @xfer_mask into @pio_mask, @mwdma_mask and @udma_mask.
879 * Any NULL distination masks will be ignored.
880 */
7dc951ae
TH
881void ata_unpack_xfermask(unsigned long xfer_mask, unsigned long *pio_mask,
882 unsigned long *mwdma_mask, unsigned long *udma_mask)
c0489e4e
TH
883{
884 if (pio_mask)
885 *pio_mask = (xfer_mask & ATA_MASK_PIO) >> ATA_SHIFT_PIO;
886 if (mwdma_mask)
887 *mwdma_mask = (xfer_mask & ATA_MASK_MWDMA) >> ATA_SHIFT_MWDMA;
888 if (udma_mask)
889 *udma_mask = (xfer_mask & ATA_MASK_UDMA) >> ATA_SHIFT_UDMA;
890}
891
cb95d562 892static const struct ata_xfer_ent {
be9a50c8 893 int shift, bits;
cb95d562
TH
894 u8 base;
895} ata_xfer_tbl[] = {
70cd071e
TH
896 { ATA_SHIFT_PIO, ATA_NR_PIO_MODES, XFER_PIO_0 },
897 { ATA_SHIFT_MWDMA, ATA_NR_MWDMA_MODES, XFER_MW_DMA_0 },
898 { ATA_SHIFT_UDMA, ATA_NR_UDMA_MODES, XFER_UDMA_0 },
cb95d562
TH
899 { -1, },
900};
901
902/**
903 * ata_xfer_mask2mode - Find matching XFER_* for the given xfer_mask
904 * @xfer_mask: xfer_mask of interest
905 *
906 * Return matching XFER_* value for @xfer_mask. Only the highest
907 * bit of @xfer_mask is considered.
908 *
909 * LOCKING:
910 * None.
911 *
912 * RETURNS:
70cd071e 913 * Matching XFER_* value, 0xff if no match found.
cb95d562 914 */
7dc951ae 915u8 ata_xfer_mask2mode(unsigned long xfer_mask)
cb95d562
TH
916{
917 int highbit = fls(xfer_mask) - 1;
918 const struct ata_xfer_ent *ent;
919
920 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
921 if (highbit >= ent->shift && highbit < ent->shift + ent->bits)
922 return ent->base + highbit - ent->shift;
70cd071e 923 return 0xff;
cb95d562
TH
924}
925
926/**
927 * ata_xfer_mode2mask - Find matching xfer_mask for XFER_*
928 * @xfer_mode: XFER_* of interest
929 *
930 * Return matching xfer_mask for @xfer_mode.
931 *
932 * LOCKING:
933 * None.
934 *
935 * RETURNS:
936 * Matching xfer_mask, 0 if no match found.
937 */
7dc951ae 938unsigned long ata_xfer_mode2mask(u8 xfer_mode)
cb95d562
TH
939{
940 const struct ata_xfer_ent *ent;
941
942 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
943 if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits)
70cd071e
TH
944 return ((2 << (ent->shift + xfer_mode - ent->base)) - 1)
945 & ~((1 << ent->shift) - 1);
cb95d562
TH
946 return 0;
947}
948
949/**
950 * ata_xfer_mode2shift - Find matching xfer_shift for XFER_*
951 * @xfer_mode: XFER_* of interest
952 *
953 * Return matching xfer_shift for @xfer_mode.
954 *
955 * LOCKING:
956 * None.
957 *
958 * RETURNS:
959 * Matching xfer_shift, -1 if no match found.
960 */
7dc951ae 961int ata_xfer_mode2shift(unsigned long xfer_mode)
cb95d562
TH
962{
963 const struct ata_xfer_ent *ent;
964
965 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
966 if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits)
967 return ent->shift;
968 return -1;
969}
970
1da177e4 971/**
1da7b0d0
TH
972 * ata_mode_string - convert xfer_mask to string
973 * @xfer_mask: mask of bits supported; only highest bit counts.
1da177e4
LT
974 *
975 * Determine string which represents the highest speed
1da7b0d0 976 * (highest bit in @modemask).
1da177e4
LT
977 *
978 * LOCKING:
979 * None.
980 *
981 * RETURNS:
982 * Constant C string representing highest speed listed in
1da7b0d0 983 * @mode_mask, or the constant C string "<n/a>".
1da177e4 984 */
7dc951ae 985const char *ata_mode_string(unsigned long xfer_mask)
1da177e4 986{
75f554bc
TH
987 static const char * const xfer_mode_str[] = {
988 "PIO0",
989 "PIO1",
990 "PIO2",
991 "PIO3",
992 "PIO4",
b352e57d
AC
993 "PIO5",
994 "PIO6",
75f554bc
TH
995 "MWDMA0",
996 "MWDMA1",
997 "MWDMA2",
b352e57d
AC
998 "MWDMA3",
999 "MWDMA4",
75f554bc
TH
1000 "UDMA/16",
1001 "UDMA/25",
1002 "UDMA/33",
1003 "UDMA/44",
1004 "UDMA/66",
1005 "UDMA/100",
1006 "UDMA/133",
1007 "UDMA7",
1008 };
1da7b0d0 1009 int highbit;
1da177e4 1010
1da7b0d0
TH
1011 highbit = fls(xfer_mask) - 1;
1012 if (highbit >= 0 && highbit < ARRAY_SIZE(xfer_mode_str))
1013 return xfer_mode_str[highbit];
1da177e4 1014 return "<n/a>";
1da177e4
LT
1015}
1016
d9027470 1017const char *sata_spd_string(unsigned int spd)
4c360c81
TH
1018{
1019 static const char * const spd_str[] = {
1020 "1.5 Gbps",
1021 "3.0 Gbps",
8522ee25 1022 "6.0 Gbps",
4c360c81
TH
1023 };
1024
1025 if (spd == 0 || (spd - 1) >= ARRAY_SIZE(spd_str))
1026 return "<unknown>";
1027 return spd_str[spd - 1];
1028}
1029
1da177e4
LT
1030/**
1031 * ata_dev_classify - determine device type based on ATA-spec signature
1032 * @tf: ATA taskfile register set for device to be identified
1033 *
1034 * Determine from taskfile register contents whether a device is
1035 * ATA or ATAPI, as per "Signature and persistence" section
1036 * of ATA/PI spec (volume 1, sect 5.14).
1037 *
1038 * LOCKING:
1039 * None.
1040 *
1041 * RETURNS:
633273a3
TH
1042 * Device type, %ATA_DEV_ATA, %ATA_DEV_ATAPI, %ATA_DEV_PMP or
1043 * %ATA_DEV_UNKNOWN the event of failure.
1da177e4 1044 */
057ace5e 1045unsigned int ata_dev_classify(const struct ata_taskfile *tf)
1da177e4
LT
1046{
1047 /* Apple's open source Darwin code hints that some devices only
1048 * put a proper signature into the LBA mid/high registers,
1049 * So, we only check those. It's sufficient for uniqueness.
633273a3
TH
1050 *
1051 * ATA/ATAPI-7 (d1532v1r1: Feb. 19, 2003) specified separate
1052 * signatures for ATA and ATAPI devices attached on SerialATA,
1053 * 0x3c/0xc3 and 0x69/0x96 respectively. However, SerialATA
1054 * spec has never mentioned about using different signatures
1055 * for ATA/ATAPI devices. Then, Serial ATA II: Port
1056 * Multiplier specification began to use 0x69/0x96 to identify
1057 * port multpliers and 0x3c/0xc3 to identify SEMB device.
1058 * ATA/ATAPI-7 dropped descriptions about 0x3c/0xc3 and
1059 * 0x69/0x96 shortly and described them as reserved for
1060 * SerialATA.
1061 *
1062 * We follow the current spec and consider that 0x69/0x96
1063 * identifies a port multiplier and 0x3c/0xc3 a SEMB device.
79b42bab
TH
1064 * Unfortunately, WDC WD1600JS-62MHB5 (a hard drive) reports
1065 * SEMB signature. This is worked around in
1066 * ata_dev_read_id().
1da177e4 1067 */
633273a3 1068 if ((tf->lbam == 0) && (tf->lbah == 0)) {
1da177e4
LT
1069 DPRINTK("found ATA device by sig\n");
1070 return ATA_DEV_ATA;
1071 }
1072
633273a3 1073 if ((tf->lbam == 0x14) && (tf->lbah == 0xeb)) {
1da177e4
LT
1074 DPRINTK("found ATAPI device by sig\n");
1075 return ATA_DEV_ATAPI;
1076 }
1077
633273a3
TH
1078 if ((tf->lbam == 0x69) && (tf->lbah == 0x96)) {
1079 DPRINTK("found PMP device by sig\n");
1080 return ATA_DEV_PMP;
1081 }
1082
1083 if ((tf->lbam == 0x3c) && (tf->lbah == 0xc3)) {
79b42bab
TH
1084 DPRINTK("found SEMB device by sig (could be ATA device)\n");
1085 return ATA_DEV_SEMB;
633273a3
TH
1086 }
1087
1da177e4
LT
1088 DPRINTK("unknown device\n");
1089 return ATA_DEV_UNKNOWN;
1090}
1091
1da177e4 1092/**
6a62a04d 1093 * ata_id_string - Convert IDENTIFY DEVICE page into string
1da177e4
LT
1094 * @id: IDENTIFY DEVICE results we will examine
1095 * @s: string into which data is output
1096 * @ofs: offset into identify device page
1097 * @len: length of string to return. must be an even number.
1098 *
1099 * The strings in the IDENTIFY DEVICE page are broken up into
1100 * 16-bit chunks. Run through the string, and output each
1101 * 8-bit chunk linearly, regardless of platform.
1102 *
1103 * LOCKING:
1104 * caller.
1105 */
1106
6a62a04d
TH
1107void ata_id_string(const u16 *id, unsigned char *s,
1108 unsigned int ofs, unsigned int len)
1da177e4
LT
1109{
1110 unsigned int c;
1111
963e4975
AC
1112 BUG_ON(len & 1);
1113
1da177e4
LT
1114 while (len > 0) {
1115 c = id[ofs] >> 8;
1116 *s = c;
1117 s++;
1118
1119 c = id[ofs] & 0xff;
1120 *s = c;
1121 s++;
1122
1123 ofs++;
1124 len -= 2;
1125 }
1126}
1127
0e949ff3 1128/**
6a62a04d 1129 * ata_id_c_string - Convert IDENTIFY DEVICE page into C string
0e949ff3
TH
1130 * @id: IDENTIFY DEVICE results we will examine
1131 * @s: string into which data is output
1132 * @ofs: offset into identify device page
1133 * @len: length of string to return. must be an odd number.
1134 *
6a62a04d 1135 * This function is identical to ata_id_string except that it
0e949ff3
TH
1136 * trims trailing spaces and terminates the resulting string with
1137 * null. @len must be actual maximum length (even number) + 1.
1138 *
1139 * LOCKING:
1140 * caller.
1141 */
6a62a04d
TH
1142void ata_id_c_string(const u16 *id, unsigned char *s,
1143 unsigned int ofs, unsigned int len)
0e949ff3
TH
1144{
1145 unsigned char *p;
1146
6a62a04d 1147 ata_id_string(id, s, ofs, len - 1);
0e949ff3
TH
1148
1149 p = s + strnlen(s, len - 1);
1150 while (p > s && p[-1] == ' ')
1151 p--;
1152 *p = '\0';
1153}
0baab86b 1154
db6f8759
TH
1155static u64 ata_id_n_sectors(const u16 *id)
1156{
1157 if (ata_id_has_lba(id)) {
1158 if (ata_id_has_lba48(id))
968e594a 1159 return ata_id_u64(id, ATA_ID_LBA_CAPACITY_2);
db6f8759 1160 else
968e594a 1161 return ata_id_u32(id, ATA_ID_LBA_CAPACITY);
db6f8759
TH
1162 } else {
1163 if (ata_id_current_chs_valid(id))
968e594a
RH
1164 return id[ATA_ID_CUR_CYLS] * id[ATA_ID_CUR_HEADS] *
1165 id[ATA_ID_CUR_SECTORS];
db6f8759 1166 else
968e594a
RH
1167 return id[ATA_ID_CYLS] * id[ATA_ID_HEADS] *
1168 id[ATA_ID_SECTORS];
db6f8759
TH
1169 }
1170}
1171
a5987e0a 1172u64 ata_tf_to_lba48(const struct ata_taskfile *tf)
1e999736
AC
1173{
1174 u64 sectors = 0;
1175
1176 sectors |= ((u64)(tf->hob_lbah & 0xff)) << 40;
1177 sectors |= ((u64)(tf->hob_lbam & 0xff)) << 32;
ba14a9c2 1178 sectors |= ((u64)(tf->hob_lbal & 0xff)) << 24;
1e999736
AC
1179 sectors |= (tf->lbah & 0xff) << 16;
1180 sectors |= (tf->lbam & 0xff) << 8;
1181 sectors |= (tf->lbal & 0xff);
1182
a5987e0a 1183 return sectors;
1e999736
AC
1184}
1185
a5987e0a 1186u64 ata_tf_to_lba(const struct ata_taskfile *tf)
1e999736
AC
1187{
1188 u64 sectors = 0;
1189
1190 sectors |= (tf->device & 0x0f) << 24;
1191 sectors |= (tf->lbah & 0xff) << 16;
1192 sectors |= (tf->lbam & 0xff) << 8;
1193 sectors |= (tf->lbal & 0xff);
1194
a5987e0a 1195 return sectors;
1e999736
AC
1196}
1197
1198/**
c728a914
TH
1199 * ata_read_native_max_address - Read native max address
1200 * @dev: target device
1201 * @max_sectors: out parameter for the result native max address
1e999736 1202 *
c728a914
TH
1203 * Perform an LBA48 or LBA28 native size query upon the device in
1204 * question.
1e999736 1205 *
c728a914
TH
1206 * RETURNS:
1207 * 0 on success, -EACCES if command is aborted by the drive.
1208 * -EIO on other errors.
1e999736 1209 */
c728a914 1210static int ata_read_native_max_address(struct ata_device *dev, u64 *max_sectors)
1e999736 1211{
c728a914 1212 unsigned int err_mask;
1e999736 1213 struct ata_taskfile tf;
c728a914 1214 int lba48 = ata_id_has_lba48(dev->id);
1e999736
AC
1215
1216 ata_tf_init(dev, &tf);
1217
c728a914 1218 /* always clear all address registers */
1e999736 1219 tf.flags |= ATA_TFLAG_DEVICE | ATA_TFLAG_ISADDR;
1e999736 1220
c728a914
TH
1221 if (lba48) {
1222 tf.command = ATA_CMD_READ_NATIVE_MAX_EXT;
1223 tf.flags |= ATA_TFLAG_LBA48;
1224 } else
1225 tf.command = ATA_CMD_READ_NATIVE_MAX;
1e999736 1226
1e999736 1227 tf.protocol |= ATA_PROT_NODATA;
c728a914
TH
1228 tf.device |= ATA_LBA;
1229
2b789108 1230 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0, 0);
c728a914 1231 if (err_mask) {
a9a79dfe
JP
1232 ata_dev_warn(dev,
1233 "failed to read native max address (err_mask=0x%x)\n",
1234 err_mask);
c728a914
TH
1235 if (err_mask == AC_ERR_DEV && (tf.feature & ATA_ABORTED))
1236 return -EACCES;
1237 return -EIO;
1238 }
1e999736 1239
c728a914 1240 if (lba48)
a5987e0a 1241 *max_sectors = ata_tf_to_lba48(&tf) + 1;
c728a914 1242 else
a5987e0a 1243 *max_sectors = ata_tf_to_lba(&tf) + 1;
2dcb407e 1244 if (dev->horkage & ATA_HORKAGE_HPA_SIZE)
93328e11 1245 (*max_sectors)--;
c728a914 1246 return 0;
1e999736
AC
1247}
1248
1249/**
c728a914
TH
1250 * ata_set_max_sectors - Set max sectors
1251 * @dev: target device
6b38d1d1 1252 * @new_sectors: new max sectors value to set for the device
1e999736 1253 *
c728a914
TH
1254 * Set max sectors of @dev to @new_sectors.
1255 *
1256 * RETURNS:
1257 * 0 on success, -EACCES if command is aborted or denied (due to
1258 * previous non-volatile SET_MAX) by the drive. -EIO on other
1259 * errors.
1e999736 1260 */
05027adc 1261static int ata_set_max_sectors(struct ata_device *dev, u64 new_sectors)
1e999736 1262{
c728a914 1263 unsigned int err_mask;
1e999736 1264 struct ata_taskfile tf;
c728a914 1265 int lba48 = ata_id_has_lba48(dev->id);
1e999736
AC
1266
1267 new_sectors--;
1268
1269 ata_tf_init(dev, &tf);
1270
1e999736 1271 tf.flags |= ATA_TFLAG_DEVICE | ATA_TFLAG_ISADDR;
c728a914
TH
1272
1273 if (lba48) {
1274 tf.command = ATA_CMD_SET_MAX_EXT;
1275 tf.flags |= ATA_TFLAG_LBA48;
1276
1277 tf.hob_lbal = (new_sectors >> 24) & 0xff;
1278 tf.hob_lbam = (new_sectors >> 32) & 0xff;
1279 tf.hob_lbah = (new_sectors >> 40) & 0xff;
1e582ba4 1280 } else {
c728a914
TH
1281 tf.command = ATA_CMD_SET_MAX;
1282
1e582ba4
TH
1283 tf.device |= (new_sectors >> 24) & 0xf;
1284 }
1285
1e999736 1286 tf.protocol |= ATA_PROT_NODATA;
c728a914 1287 tf.device |= ATA_LBA;
1e999736
AC
1288
1289 tf.lbal = (new_sectors >> 0) & 0xff;
1290 tf.lbam = (new_sectors >> 8) & 0xff;
1291 tf.lbah = (new_sectors >> 16) & 0xff;
1e999736 1292
2b789108 1293 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0, 0);
c728a914 1294 if (err_mask) {
a9a79dfe
JP
1295 ata_dev_warn(dev,
1296 "failed to set max address (err_mask=0x%x)\n",
1297 err_mask);
c728a914
TH
1298 if (err_mask == AC_ERR_DEV &&
1299 (tf.feature & (ATA_ABORTED | ATA_IDNF)))
1300 return -EACCES;
1301 return -EIO;
1302 }
1303
c728a914 1304 return 0;
1e999736
AC
1305}
1306
1307/**
1308 * ata_hpa_resize - Resize a device with an HPA set
1309 * @dev: Device to resize
1310 *
1311 * Read the size of an LBA28 or LBA48 disk with HPA features and resize
1312 * it if required to the full size of the media. The caller must check
1313 * the drive has the HPA feature set enabled.
05027adc
TH
1314 *
1315 * RETURNS:
1316 * 0 on success, -errno on failure.
1e999736 1317 */
05027adc 1318static int ata_hpa_resize(struct ata_device *dev)
1e999736 1319{
05027adc
TH
1320 struct ata_eh_context *ehc = &dev->link->eh_context;
1321 int print_info = ehc->i.flags & ATA_EHI_PRINTINFO;
445d211b 1322 bool unlock_hpa = ata_ignore_hpa || dev->flags & ATA_DFLAG_UNLOCK_HPA;
05027adc
TH
1323 u64 sectors = ata_id_n_sectors(dev->id);
1324 u64 native_sectors;
c728a914 1325 int rc;
a617c09f 1326
05027adc
TH
1327 /* do we need to do it? */
1328 if (dev->class != ATA_DEV_ATA ||
1329 !ata_id_has_lba(dev->id) || !ata_id_hpa_enabled(dev->id) ||
1330 (dev->horkage & ATA_HORKAGE_BROKEN_HPA))
c728a914 1331 return 0;
1e999736 1332
05027adc
TH
1333 /* read native max address */
1334 rc = ata_read_native_max_address(dev, &native_sectors);
1335 if (rc) {
dda7aba1
TH
1336 /* If device aborted the command or HPA isn't going to
1337 * be unlocked, skip HPA resizing.
05027adc 1338 */
445d211b 1339 if (rc == -EACCES || !unlock_hpa) {
a9a79dfe
JP
1340 ata_dev_warn(dev,
1341 "HPA support seems broken, skipping HPA handling\n");
05027adc
TH
1342 dev->horkage |= ATA_HORKAGE_BROKEN_HPA;
1343
1344 /* we can continue if device aborted the command */
1345 if (rc == -EACCES)
1346 rc = 0;
1e999736 1347 }
37301a55 1348
05027adc
TH
1349 return rc;
1350 }
5920dadf 1351 dev->n_native_sectors = native_sectors;
05027adc
TH
1352
1353 /* nothing to do? */
445d211b 1354 if (native_sectors <= sectors || !unlock_hpa) {
05027adc
TH
1355 if (!print_info || native_sectors == sectors)
1356 return 0;
1357
1358 if (native_sectors > sectors)
a9a79dfe 1359 ata_dev_info(dev,
05027adc
TH
1360 "HPA detected: current %llu, native %llu\n",
1361 (unsigned long long)sectors,
1362 (unsigned long long)native_sectors);
1363 else if (native_sectors < sectors)
a9a79dfe
JP
1364 ata_dev_warn(dev,
1365 "native sectors (%llu) is smaller than sectors (%llu)\n",
05027adc
TH
1366 (unsigned long long)native_sectors,
1367 (unsigned long long)sectors);
1368 return 0;
1369 }
1370
1371 /* let's unlock HPA */
1372 rc = ata_set_max_sectors(dev, native_sectors);
1373 if (rc == -EACCES) {
1374 /* if device aborted the command, skip HPA resizing */
a9a79dfe
JP
1375 ata_dev_warn(dev,
1376 "device aborted resize (%llu -> %llu), skipping HPA handling\n",
1377 (unsigned long long)sectors,
1378 (unsigned long long)native_sectors);
05027adc
TH
1379 dev->horkage |= ATA_HORKAGE_BROKEN_HPA;
1380 return 0;
1381 } else if (rc)
1382 return rc;
1383
1384 /* re-read IDENTIFY data */
1385 rc = ata_dev_reread_id(dev, 0);
1386 if (rc) {
a9a79dfe
JP
1387 ata_dev_err(dev,
1388 "failed to re-read IDENTIFY data after HPA resizing\n");
05027adc
TH
1389 return rc;
1390 }
1391
1392 if (print_info) {
1393 u64 new_sectors = ata_id_n_sectors(dev->id);
a9a79dfe 1394 ata_dev_info(dev,
05027adc
TH
1395 "HPA unlocked: %llu -> %llu, native %llu\n",
1396 (unsigned long long)sectors,
1397 (unsigned long long)new_sectors,
1398 (unsigned long long)native_sectors);
1399 }
1400
1401 return 0;
1e999736
AC
1402}
1403
1da177e4
LT
1404/**
1405 * ata_dump_id - IDENTIFY DEVICE info debugging output
0bd3300a 1406 * @id: IDENTIFY DEVICE page to dump
1da177e4 1407 *
0bd3300a
TH
1408 * Dump selected 16-bit words from the given IDENTIFY DEVICE
1409 * page.
1da177e4
LT
1410 *
1411 * LOCKING:
1412 * caller.
1413 */
1414
0bd3300a 1415static inline void ata_dump_id(const u16 *id)
1da177e4
LT
1416{
1417 DPRINTK("49==0x%04x "
1418 "53==0x%04x "
1419 "63==0x%04x "
1420 "64==0x%04x "
1421 "75==0x%04x \n",
0bd3300a
TH
1422 id[49],
1423 id[53],
1424 id[63],
1425 id[64],
1426 id[75]);
1da177e4
LT
1427 DPRINTK("80==0x%04x "
1428 "81==0x%04x "
1429 "82==0x%04x "
1430 "83==0x%04x "
1431 "84==0x%04x \n",
0bd3300a
TH
1432 id[80],
1433 id[81],
1434 id[82],
1435 id[83],
1436 id[84]);
1da177e4
LT
1437 DPRINTK("88==0x%04x "
1438 "93==0x%04x\n",
0bd3300a
TH
1439 id[88],
1440 id[93]);
1da177e4
LT
1441}
1442
cb95d562
TH
1443/**
1444 * ata_id_xfermask - Compute xfermask from the given IDENTIFY data
1445 * @id: IDENTIFY data to compute xfer mask from
1446 *
1447 * Compute the xfermask for this device. This is not as trivial
1448 * as it seems if we must consider early devices correctly.
1449 *
1450 * FIXME: pre IDE drive timing (do we care ?).
1451 *
1452 * LOCKING:
1453 * None.
1454 *
1455 * RETURNS:
1456 * Computed xfermask
1457 */
7dc951ae 1458unsigned long ata_id_xfermask(const u16 *id)
cb95d562 1459{
7dc951ae 1460 unsigned long pio_mask, mwdma_mask, udma_mask;
cb95d562
TH
1461
1462 /* Usual case. Word 53 indicates word 64 is valid */
1463 if (id[ATA_ID_FIELD_VALID] & (1 << 1)) {
1464 pio_mask = id[ATA_ID_PIO_MODES] & 0x03;
1465 pio_mask <<= 3;
1466 pio_mask |= 0x7;
1467 } else {
1468 /* If word 64 isn't valid then Word 51 high byte holds
1469 * the PIO timing number for the maximum. Turn it into
1470 * a mask.
1471 */
7a0f1c8a 1472 u8 mode = (id[ATA_ID_OLD_PIO_MODES] >> 8) & 0xFF;
46767aeb 1473 if (mode < 5) /* Valid PIO range */
2dcb407e 1474 pio_mask = (2 << mode) - 1;
46767aeb
AC
1475 else
1476 pio_mask = 1;
cb95d562
TH
1477
1478 /* But wait.. there's more. Design your standards by
1479 * committee and you too can get a free iordy field to
1480 * process. However its the speeds not the modes that
1481 * are supported... Note drivers using the timing API
1482 * will get this right anyway
1483 */
1484 }
1485
1486 mwdma_mask = id[ATA_ID_MWDMA_MODES] & 0x07;
fb21f0d0 1487
b352e57d
AC
1488 if (ata_id_is_cfa(id)) {
1489 /*
1490 * Process compact flash extended modes
1491 */
62afe5d7
SS
1492 int pio = (id[ATA_ID_CFA_MODES] >> 0) & 0x7;
1493 int dma = (id[ATA_ID_CFA_MODES] >> 3) & 0x7;
b352e57d
AC
1494
1495 if (pio)
1496 pio_mask |= (1 << 5);
1497 if (pio > 1)
1498 pio_mask |= (1 << 6);
1499 if (dma)
1500 mwdma_mask |= (1 << 3);
1501 if (dma > 1)
1502 mwdma_mask |= (1 << 4);
1503 }
1504
fb21f0d0
TH
1505 udma_mask = 0;
1506 if (id[ATA_ID_FIELD_VALID] & (1 << 2))
1507 udma_mask = id[ATA_ID_UDMA_MODES] & 0xff;
cb95d562
TH
1508
1509 return ata_pack_xfermask(pio_mask, mwdma_mask, udma_mask);
1510}
1511
7102d230 1512static void ata_qc_complete_internal(struct ata_queued_cmd *qc)
a2a7a662 1513{
77853bf2 1514 struct completion *waiting = qc->private_data;
a2a7a662 1515
a2a7a662 1516 complete(waiting);
a2a7a662
TH
1517}
1518
1519/**
2432697b 1520 * ata_exec_internal_sg - execute libata internal command
a2a7a662
TH
1521 * @dev: Device to which the command is sent
1522 * @tf: Taskfile registers for the command and the result
d69cf37d 1523 * @cdb: CDB for packet command
a2a7a662 1524 * @dma_dir: Data tranfer direction of the command
5c1ad8b3 1525 * @sgl: sg list for the data buffer of the command
2432697b 1526 * @n_elem: Number of sg entries
2b789108 1527 * @timeout: Timeout in msecs (0 for default)
a2a7a662
TH
1528 *
1529 * Executes libata internal command with timeout. @tf contains
1530 * command on entry and result on return. Timeout and error
1531 * conditions are reported via return value. No recovery action
1532 * is taken after a command times out. It's caller's duty to
1533 * clean up after timeout.
1534 *
1535 * LOCKING:
1536 * None. Should be called with kernel context, might sleep.
551e8889
TH
1537 *
1538 * RETURNS:
1539 * Zero on success, AC_ERR_* mask on failure
a2a7a662 1540 */
2432697b
TH
1541unsigned ata_exec_internal_sg(struct ata_device *dev,
1542 struct ata_taskfile *tf, const u8 *cdb,
87260216 1543 int dma_dir, struct scatterlist *sgl,
2b789108 1544 unsigned int n_elem, unsigned long timeout)
a2a7a662 1545{
9af5c9c9
TH
1546 struct ata_link *link = dev->link;
1547 struct ata_port *ap = link->ap;
a2a7a662 1548 u8 command = tf->command;
87fbc5a0 1549 int auto_timeout = 0;
a2a7a662 1550 struct ata_queued_cmd *qc;
2ab7db1f 1551 unsigned int tag, preempted_tag;
dedaf2b0 1552 u32 preempted_sactive, preempted_qc_active;
da917d69 1553 int preempted_nr_active_links;
60be6b9a 1554 DECLARE_COMPLETION_ONSTACK(wait);
a2a7a662 1555 unsigned long flags;
77853bf2 1556 unsigned int err_mask;
d95a717f 1557 int rc;
a2a7a662 1558
ba6a1308 1559 spin_lock_irqsave(ap->lock, flags);
a2a7a662 1560
e3180499 1561 /* no internal command while frozen */
b51e9e5d 1562 if (ap->pflags & ATA_PFLAG_FROZEN) {
ba6a1308 1563 spin_unlock_irqrestore(ap->lock, flags);
e3180499
TH
1564 return AC_ERR_SYSTEM;
1565 }
1566
2ab7db1f 1567 /* initialize internal qc */
a2a7a662 1568
2ab7db1f
TH
1569 /* XXX: Tag 0 is used for drivers with legacy EH as some
1570 * drivers choke if any other tag is given. This breaks
1571 * ata_tag_internal() test for those drivers. Don't use new
1572 * EH stuff without converting to it.
1573 */
1574 if (ap->ops->error_handler)
1575 tag = ATA_TAG_INTERNAL;
1576 else
1577 tag = 0;
1578
8a8bc223
TH
1579 if (test_and_set_bit(tag, &ap->qc_allocated))
1580 BUG();
f69499f4 1581 qc = __ata_qc_from_tag(ap, tag);
2ab7db1f
TH
1582
1583 qc->tag = tag;
1584 qc->scsicmd = NULL;
1585 qc->ap = ap;
1586 qc->dev = dev;
1587 ata_qc_reinit(qc);
1588
9af5c9c9
TH
1589 preempted_tag = link->active_tag;
1590 preempted_sactive = link->sactive;
dedaf2b0 1591 preempted_qc_active = ap->qc_active;
da917d69 1592 preempted_nr_active_links = ap->nr_active_links;
9af5c9c9
TH
1593 link->active_tag = ATA_TAG_POISON;
1594 link->sactive = 0;
dedaf2b0 1595 ap->qc_active = 0;
da917d69 1596 ap->nr_active_links = 0;
2ab7db1f
TH
1597
1598 /* prepare & issue qc */
a2a7a662 1599 qc->tf = *tf;
d69cf37d
TH
1600 if (cdb)
1601 memcpy(qc->cdb, cdb, ATAPI_CDB_LEN);
e61e0672 1602 qc->flags |= ATA_QCFLAG_RESULT_TF;
a2a7a662
TH
1603 qc->dma_dir = dma_dir;
1604 if (dma_dir != DMA_NONE) {
2432697b 1605 unsigned int i, buflen = 0;
87260216 1606 struct scatterlist *sg;
2432697b 1607
87260216
JA
1608 for_each_sg(sgl, sg, n_elem, i)
1609 buflen += sg->length;
2432697b 1610
87260216 1611 ata_sg_init(qc, sgl, n_elem);
49c80429 1612 qc->nbytes = buflen;
a2a7a662
TH
1613 }
1614
77853bf2 1615 qc->private_data = &wait;
a2a7a662
TH
1616 qc->complete_fn = ata_qc_complete_internal;
1617
8e0e694a 1618 ata_qc_issue(qc);
a2a7a662 1619
ba6a1308 1620 spin_unlock_irqrestore(ap->lock, flags);
a2a7a662 1621
87fbc5a0
TH
1622 if (!timeout) {
1623 if (ata_probe_timeout)
1624 timeout = ata_probe_timeout * 1000;
1625 else {
1626 timeout = ata_internal_cmd_timeout(dev, command);
1627 auto_timeout = 1;
1628 }
1629 }
2b789108 1630
c0c362b6
TH
1631 if (ap->ops->error_handler)
1632 ata_eh_release(ap);
1633
2b789108 1634 rc = wait_for_completion_timeout(&wait, msecs_to_jiffies(timeout));
d95a717f 1635
c0c362b6
TH
1636 if (ap->ops->error_handler)
1637 ata_eh_acquire(ap);
1638
c429137a 1639 ata_sff_flush_pio_task(ap);
41ade50c 1640
d95a717f 1641 if (!rc) {
ba6a1308 1642 spin_lock_irqsave(ap->lock, flags);
a2a7a662
TH
1643
1644 /* We're racing with irq here. If we lose, the
1645 * following test prevents us from completing the qc
d95a717f
TH
1646 * twice. If we win, the port is frozen and will be
1647 * cleaned up by ->post_internal_cmd().
a2a7a662 1648 */
77853bf2 1649 if (qc->flags & ATA_QCFLAG_ACTIVE) {
d95a717f
TH
1650 qc->err_mask |= AC_ERR_TIMEOUT;
1651
1652 if (ap->ops->error_handler)
1653 ata_port_freeze(ap);
1654 else
1655 ata_qc_complete(qc);
f15a1daf 1656
0dd4b21f 1657 if (ata_msg_warn(ap))
a9a79dfe
JP
1658 ata_dev_warn(dev, "qc timeout (cmd 0x%x)\n",
1659 command);
a2a7a662
TH
1660 }
1661
ba6a1308 1662 spin_unlock_irqrestore(ap->lock, flags);
a2a7a662
TH
1663 }
1664
d95a717f
TH
1665 /* do post_internal_cmd */
1666 if (ap->ops->post_internal_cmd)
1667 ap->ops->post_internal_cmd(qc);
1668
a51d644a
TH
1669 /* perform minimal error analysis */
1670 if (qc->flags & ATA_QCFLAG_FAILED) {
1671 if (qc->result_tf.command & (ATA_ERR | ATA_DF))
1672 qc->err_mask |= AC_ERR_DEV;
1673
1674 if (!qc->err_mask)
1675 qc->err_mask |= AC_ERR_OTHER;
1676
1677 if (qc->err_mask & ~AC_ERR_OTHER)
1678 qc->err_mask &= ~AC_ERR_OTHER;
d95a717f
TH
1679 }
1680
15869303 1681 /* finish up */
ba6a1308 1682 spin_lock_irqsave(ap->lock, flags);
15869303 1683
e61e0672 1684 *tf = qc->result_tf;
77853bf2
TH
1685 err_mask = qc->err_mask;
1686
1687 ata_qc_free(qc);
9af5c9c9
TH
1688 link->active_tag = preempted_tag;
1689 link->sactive = preempted_sactive;
dedaf2b0 1690 ap->qc_active = preempted_qc_active;
da917d69 1691 ap->nr_active_links = preempted_nr_active_links;
77853bf2 1692
ba6a1308 1693 spin_unlock_irqrestore(ap->lock, flags);
15869303 1694
87fbc5a0
TH
1695 if ((err_mask & AC_ERR_TIMEOUT) && auto_timeout)
1696 ata_internal_cmd_timed_out(dev, command);
1697
77853bf2 1698 return err_mask;
a2a7a662
TH
1699}
1700
2432697b 1701/**
33480a0e 1702 * ata_exec_internal - execute libata internal command
2432697b
TH
1703 * @dev: Device to which the command is sent
1704 * @tf: Taskfile registers for the command and the result
1705 * @cdb: CDB for packet command
1706 * @dma_dir: Data tranfer direction of the command
1707 * @buf: Data buffer of the command
1708 * @buflen: Length of data buffer
2b789108 1709 * @timeout: Timeout in msecs (0 for default)
2432697b
TH
1710 *
1711 * Wrapper around ata_exec_internal_sg() which takes simple
1712 * buffer instead of sg list.
1713 *
1714 * LOCKING:
1715 * None. Should be called with kernel context, might sleep.
1716 *
1717 * RETURNS:
1718 * Zero on success, AC_ERR_* mask on failure
1719 */
1720unsigned ata_exec_internal(struct ata_device *dev,
1721 struct ata_taskfile *tf, const u8 *cdb,
2b789108
TH
1722 int dma_dir, void *buf, unsigned int buflen,
1723 unsigned long timeout)
2432697b 1724{
33480a0e
TH
1725 struct scatterlist *psg = NULL, sg;
1726 unsigned int n_elem = 0;
2432697b 1727
33480a0e
TH
1728 if (dma_dir != DMA_NONE) {
1729 WARN_ON(!buf);
1730 sg_init_one(&sg, buf, buflen);
1731 psg = &sg;
1732 n_elem++;
1733 }
2432697b 1734
2b789108
TH
1735 return ata_exec_internal_sg(dev, tf, cdb, dma_dir, psg, n_elem,
1736 timeout);
2432697b
TH
1737}
1738
977e6b9f
TH
1739/**
1740 * ata_do_simple_cmd - execute simple internal command
1741 * @dev: Device to which the command is sent
1742 * @cmd: Opcode to execute
1743 *
1744 * Execute a 'simple' command, that only consists of the opcode
1745 * 'cmd' itself, without filling any other registers
1746 *
1747 * LOCKING:
1748 * Kernel thread context (may sleep).
1749 *
1750 * RETURNS:
1751 * Zero on success, AC_ERR_* mask on failure
e58eb583 1752 */
77b08fb5 1753unsigned int ata_do_simple_cmd(struct ata_device *dev, u8 cmd)
e58eb583
TH
1754{
1755 struct ata_taskfile tf;
e58eb583
TH
1756
1757 ata_tf_init(dev, &tf);
1758
1759 tf.command = cmd;
1760 tf.flags |= ATA_TFLAG_DEVICE;
1761 tf.protocol = ATA_PROT_NODATA;
1762
2b789108 1763 return ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0, 0);
e58eb583
TH
1764}
1765
1bc4ccff
AC
1766/**
1767 * ata_pio_need_iordy - check if iordy needed
1768 * @adev: ATA device
1769 *
1770 * Check if the current speed of the device requires IORDY. Used
1771 * by various controllers for chip configuration.
1772 */
1bc4ccff
AC
1773unsigned int ata_pio_need_iordy(const struct ata_device *adev)
1774{
0d9e6659
TH
1775 /* Don't set IORDY if we're preparing for reset. IORDY may
1776 * lead to controller lock up on certain controllers if the
1777 * port is not occupied. See bko#11703 for details.
1778 */
1779 if (adev->link->ap->pflags & ATA_PFLAG_RESETTING)
1780 return 0;
1781 /* Controller doesn't support IORDY. Probably a pointless
1782 * check as the caller should know this.
1783 */
9af5c9c9 1784 if (adev->link->ap->flags & ATA_FLAG_NO_IORDY)
1bc4ccff 1785 return 0;
5c18c4d2
DD
1786 /* CF spec. r4.1 Table 22 says no iordy on PIO5 and PIO6. */
1787 if (ata_id_is_cfa(adev->id)
1788 && (adev->pio_mode == XFER_PIO_5 || adev->pio_mode == XFER_PIO_6))
1789 return 0;
432729f0
AC
1790 /* PIO3 and higher it is mandatory */
1791 if (adev->pio_mode > XFER_PIO_2)
1792 return 1;
1793 /* We turn it on when possible */
1794 if (ata_id_has_iordy(adev->id))
1bc4ccff 1795 return 1;
432729f0
AC
1796 return 0;
1797}
2e9edbf8 1798
432729f0
AC
1799/**
1800 * ata_pio_mask_no_iordy - Return the non IORDY mask
1801 * @adev: ATA device
1802 *
1803 * Compute the highest mode possible if we are not using iordy. Return
1804 * -1 if no iordy mode is available.
1805 */
432729f0
AC
1806static u32 ata_pio_mask_no_iordy(const struct ata_device *adev)
1807{
1bc4ccff 1808 /* If we have no drive specific rule, then PIO 2 is non IORDY */
1bc4ccff 1809 if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE */
432729f0 1810 u16 pio = adev->id[ATA_ID_EIDE_PIO];
1bc4ccff
AC
1811 /* Is the speed faster than the drive allows non IORDY ? */
1812 if (pio) {
1813 /* This is cycle times not frequency - watch the logic! */
1814 if (pio > 240) /* PIO2 is 240nS per cycle */
432729f0
AC
1815 return 3 << ATA_SHIFT_PIO;
1816 return 7 << ATA_SHIFT_PIO;
1bc4ccff
AC
1817 }
1818 }
432729f0 1819 return 3 << ATA_SHIFT_PIO;
1bc4ccff
AC
1820}
1821
963e4975
AC
1822/**
1823 * ata_do_dev_read_id - default ID read method
1824 * @dev: device
1825 * @tf: proposed taskfile
1826 * @id: data buffer
1827 *
1828 * Issue the identify taskfile and hand back the buffer containing
1829 * identify data. For some RAID controllers and for pre ATA devices
1830 * this function is wrapped or replaced by the driver
1831 */
1832unsigned int ata_do_dev_read_id(struct ata_device *dev,
1833 struct ata_taskfile *tf, u16 *id)
1834{
1835 return ata_exec_internal(dev, tf, NULL, DMA_FROM_DEVICE,
1836 id, sizeof(id[0]) * ATA_ID_WORDS, 0);
1837}
1838
1da177e4 1839/**
49016aca 1840 * ata_dev_read_id - Read ID data from the specified device
49016aca
TH
1841 * @dev: target device
1842 * @p_class: pointer to class of the target device (may be changed)
bff04647 1843 * @flags: ATA_READID_* flags
fe635c7e 1844 * @id: buffer to read IDENTIFY data into
1da177e4 1845 *
49016aca
TH
1846 * Read ID data from the specified device. ATA_CMD_ID_ATA is
1847 * performed on ATA devices and ATA_CMD_ID_ATAPI on ATAPI
aec5c3c1
TH
1848 * devices. This function also issues ATA_CMD_INIT_DEV_PARAMS
1849 * for pre-ATA4 drives.
1da177e4 1850 *
50a99018 1851 * FIXME: ATA_CMD_ID_ATA is optional for early drives and right
2dcb407e 1852 * now we abort if we hit that case.
50a99018 1853 *
1da177e4 1854 * LOCKING:
49016aca
TH
1855 * Kernel thread context (may sleep)
1856 *
1857 * RETURNS:
1858 * 0 on success, -errno otherwise.
1da177e4 1859 */
a9beec95 1860int ata_dev_read_id(struct ata_device *dev, unsigned int *p_class,
bff04647 1861 unsigned int flags, u16 *id)
1da177e4 1862{
9af5c9c9 1863 struct ata_port *ap = dev->link->ap;
49016aca 1864 unsigned int class = *p_class;
a0123703 1865 struct ata_taskfile tf;
49016aca
TH
1866 unsigned int err_mask = 0;
1867 const char *reason;
79b42bab 1868 bool is_semb = class == ATA_DEV_SEMB;
54936f8b 1869 int may_fallback = 1, tried_spinup = 0;
49016aca 1870 int rc;
1da177e4 1871
0dd4b21f 1872 if (ata_msg_ctl(ap))
a9a79dfe 1873 ata_dev_dbg(dev, "%s: ENTER\n", __func__);
1da177e4 1874
963e4975 1875retry:
3373efd8 1876 ata_tf_init(dev, &tf);
a0123703 1877
49016aca 1878 switch (class) {
79b42bab
TH
1879 case ATA_DEV_SEMB:
1880 class = ATA_DEV_ATA; /* some hard drives report SEMB sig */
49016aca 1881 case ATA_DEV_ATA:
a0123703 1882 tf.command = ATA_CMD_ID_ATA;
49016aca
TH
1883 break;
1884 case ATA_DEV_ATAPI:
a0123703 1885 tf.command = ATA_CMD_ID_ATAPI;
49016aca
TH
1886 break;
1887 default:
1888 rc = -ENODEV;
1889 reason = "unsupported class";
1890 goto err_out;
1da177e4
LT
1891 }
1892
a0123703 1893 tf.protocol = ATA_PROT_PIO;
81afe893
TH
1894
1895 /* Some devices choke if TF registers contain garbage. Make
1896 * sure those are properly initialized.
1897 */
1898 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
1899
1900 /* Device presence detection is unreliable on some
1901 * controllers. Always poll IDENTIFY if available.
1902 */
1903 tf.flags |= ATA_TFLAG_POLLING;
1da177e4 1904
963e4975
AC
1905 if (ap->ops->read_id)
1906 err_mask = ap->ops->read_id(dev, &tf, id);
1907 else
1908 err_mask = ata_do_dev_read_id(dev, &tf, id);
1909
a0123703 1910 if (err_mask) {
800b3996 1911 if (err_mask & AC_ERR_NODEV_HINT) {
a9a79dfe 1912 ata_dev_dbg(dev, "NODEV after polling detection\n");
55a8e2c8
TH
1913 return -ENOENT;
1914 }
1915
79b42bab 1916 if (is_semb) {
a9a79dfe
JP
1917 ata_dev_info(dev,
1918 "IDENTIFY failed on device w/ SEMB sig, disabled\n");
79b42bab
TH
1919 /* SEMB is not supported yet */
1920 *p_class = ATA_DEV_SEMB_UNSUP;
1921 return 0;
1922 }
1923
1ffc151f
TH
1924 if ((err_mask == AC_ERR_DEV) && (tf.feature & ATA_ABORTED)) {
1925 /* Device or controller might have reported
1926 * the wrong device class. Give a shot at the
1927 * other IDENTIFY if the current one is
1928 * aborted by the device.
1929 */
1930 if (may_fallback) {
1931 may_fallback = 0;
1932
1933 if (class == ATA_DEV_ATA)
1934 class = ATA_DEV_ATAPI;
1935 else
1936 class = ATA_DEV_ATA;
1937 goto retry;
1938 }
1939
1940 /* Control reaches here iff the device aborted
1941 * both flavors of IDENTIFYs which happens
1942 * sometimes with phantom devices.
1943 */
a9a79dfe
JP
1944 ata_dev_dbg(dev,
1945 "both IDENTIFYs aborted, assuming NODEV\n");
1ffc151f 1946 return -ENOENT;
54936f8b
TH
1947 }
1948
49016aca
TH
1949 rc = -EIO;
1950 reason = "I/O error";
1da177e4
LT
1951 goto err_out;
1952 }
1953
43c9c591 1954 if (dev->horkage & ATA_HORKAGE_DUMP_ID) {
a9a79dfe
JP
1955 ata_dev_dbg(dev, "dumping IDENTIFY data, "
1956 "class=%d may_fallback=%d tried_spinup=%d\n",
1957 class, may_fallback, tried_spinup);
43c9c591
TH
1958 print_hex_dump(KERN_DEBUG, "", DUMP_PREFIX_OFFSET,
1959 16, 2, id, ATA_ID_WORDS * sizeof(*id), true);
1960 }
1961
54936f8b
TH
1962 /* Falling back doesn't make sense if ID data was read
1963 * successfully at least once.
1964 */
1965 may_fallback = 0;
1966
49016aca 1967 swap_buf_le16(id, ATA_ID_WORDS);
1da177e4 1968
49016aca 1969 /* sanity check */
a4f5749b 1970 rc = -EINVAL;
6070068b 1971 reason = "device reports invalid type";
a4f5749b
TH
1972
1973 if (class == ATA_DEV_ATA) {
1974 if (!ata_id_is_ata(id) && !ata_id_is_cfa(id))
1975 goto err_out;
db63a4c8
AW
1976 if (ap->host->flags & ATA_HOST_IGNORE_ATA &&
1977 ata_id_is_ata(id)) {
1978 ata_dev_dbg(dev,
1979 "host indicates ignore ATA devices, ignored\n");
1980 return -ENOENT;
1981 }
a4f5749b
TH
1982 } else {
1983 if (ata_id_is_ata(id))
1984 goto err_out;
49016aca
TH
1985 }
1986
169439c2
ML
1987 if (!tried_spinup && (id[2] == 0x37c8 || id[2] == 0x738c)) {
1988 tried_spinup = 1;
1989 /*
1990 * Drive powered-up in standby mode, and requires a specific
1991 * SET_FEATURES spin-up subcommand before it will accept
1992 * anything other than the original IDENTIFY command.
1993 */
218f3d30 1994 err_mask = ata_dev_set_feature(dev, SETFEATURES_SPINUP, 0);
fb0582f9 1995 if (err_mask && id[2] != 0x738c) {
169439c2
ML
1996 rc = -EIO;
1997 reason = "SPINUP failed";
1998 goto err_out;
1999 }
2000 /*
2001 * If the drive initially returned incomplete IDENTIFY info,
2002 * we now must reissue the IDENTIFY command.
2003 */
2004 if (id[2] == 0x37c8)
2005 goto retry;
2006 }
2007
bff04647 2008 if ((flags & ATA_READID_POSTRESET) && class == ATA_DEV_ATA) {
49016aca
TH
2009 /*
2010 * The exact sequence expected by certain pre-ATA4 drives is:
2011 * SRST RESET
50a99018
AC
2012 * IDENTIFY (optional in early ATA)
2013 * INITIALIZE DEVICE PARAMETERS (later IDE and ATA)
49016aca
TH
2014 * anything else..
2015 * Some drives were very specific about that exact sequence.
50a99018
AC
2016 *
2017 * Note that ATA4 says lba is mandatory so the second check
c9404c9c 2018 * should never trigger.
49016aca
TH
2019 */
2020 if (ata_id_major_version(id) < 4 || !ata_id_has_lba(id)) {
3373efd8 2021 err_mask = ata_dev_init_params(dev, id[3], id[6]);
49016aca
TH
2022 if (err_mask) {
2023 rc = -EIO;
2024 reason = "INIT_DEV_PARAMS failed";
2025 goto err_out;
2026 }
2027
2028 /* current CHS translation info (id[53-58]) might be
2029 * changed. reread the identify device info.
2030 */
bff04647 2031 flags &= ~ATA_READID_POSTRESET;
49016aca
TH
2032 goto retry;
2033 }
2034 }
2035
2036 *p_class = class;
fe635c7e 2037
49016aca
TH
2038 return 0;
2039
2040 err_out:
88574551 2041 if (ata_msg_warn(ap))
a9a79dfe
JP
2042 ata_dev_warn(dev, "failed to IDENTIFY (%s, err_mask=0x%x)\n",
2043 reason, err_mask);
49016aca
TH
2044 return rc;
2045}
2046
9062712f
TH
2047static int ata_do_link_spd_horkage(struct ata_device *dev)
2048{
2049 struct ata_link *plink = ata_dev_phys_link(dev);
2050 u32 target, target_limit;
2051
2052 if (!sata_scr_valid(plink))
2053 return 0;
2054
2055 if (dev->horkage & ATA_HORKAGE_1_5_GBPS)
2056 target = 1;
2057 else
2058 return 0;
2059
2060 target_limit = (1 << target) - 1;
2061
2062 /* if already on stricter limit, no need to push further */
2063 if (plink->sata_spd_limit <= target_limit)
2064 return 0;
2065
2066 plink->sata_spd_limit = target_limit;
2067
2068 /* Request another EH round by returning -EAGAIN if link is
2069 * going faster than the target speed. Forward progress is
2070 * guaranteed by setting sata_spd_limit to target_limit above.
2071 */
2072 if (plink->sata_spd > target) {
a9a79dfe
JP
2073 ata_dev_info(dev, "applying link speed limit horkage to %s\n",
2074 sata_spd_string(target));
9062712f
TH
2075 return -EAGAIN;
2076 }
2077 return 0;
2078}
2079
3373efd8 2080static inline u8 ata_dev_knobble(struct ata_device *dev)
4b2f3ede 2081{
9af5c9c9 2082 struct ata_port *ap = dev->link->ap;
9ce8e307
JA
2083
2084 if (ata_dev_blacklisted(dev) & ATA_HORKAGE_BRIDGE_OK)
2085 return 0;
2086
9af5c9c9 2087 return ((ap->cbl == ATA_CBL_SATA) && (!ata_id_is_sata(dev->id)));
4b2f3ede
TH
2088}
2089
388539f3 2090static int ata_dev_config_ncq(struct ata_device *dev,
a6e6ce8e
TH
2091 char *desc, size_t desc_sz)
2092{
9af5c9c9 2093 struct ata_port *ap = dev->link->ap;
a6e6ce8e 2094 int hdepth = 0, ddepth = ata_id_queue_depth(dev->id);
388539f3
SL
2095 unsigned int err_mask;
2096 char *aa_desc = "";
a6e6ce8e
TH
2097
2098 if (!ata_id_has_ncq(dev->id)) {
2099 desc[0] = '\0';
388539f3 2100 return 0;
a6e6ce8e 2101 }
75683fe7 2102 if (dev->horkage & ATA_HORKAGE_NONCQ) {
6919a0a6 2103 snprintf(desc, desc_sz, "NCQ (not used)");
388539f3 2104 return 0;
6919a0a6 2105 }
a6e6ce8e 2106 if (ap->flags & ATA_FLAG_NCQ) {
cca3974e 2107 hdepth = min(ap->scsi_host->can_queue, ATA_MAX_QUEUE - 1);
a6e6ce8e
TH
2108 dev->flags |= ATA_DFLAG_NCQ;
2109 }
2110
388539f3
SL
2111 if (!(dev->horkage & ATA_HORKAGE_BROKEN_FPDMA_AA) &&
2112 (ap->flags & ATA_FLAG_FPDMA_AA) &&
2113 ata_id_has_fpdma_aa(dev->id)) {
2114 err_mask = ata_dev_set_feature(dev, SETFEATURES_SATA_ENABLE,
2115 SATA_FPDMA_AA);
2116 if (err_mask) {
a9a79dfe
JP
2117 ata_dev_err(dev,
2118 "failed to enable AA (error_mask=0x%x)\n",
2119 err_mask);
388539f3
SL
2120 if (err_mask != AC_ERR_DEV) {
2121 dev->horkage |= ATA_HORKAGE_BROKEN_FPDMA_AA;
2122 return -EIO;
2123 }
2124 } else
2125 aa_desc = ", AA";
2126 }
2127
a6e6ce8e 2128 if (hdepth >= ddepth)
388539f3 2129 snprintf(desc, desc_sz, "NCQ (depth %d)%s", ddepth, aa_desc);
a6e6ce8e 2130 else
388539f3
SL
2131 snprintf(desc, desc_sz, "NCQ (depth %d/%d)%s", hdepth,
2132 ddepth, aa_desc);
2133 return 0;
a6e6ce8e
TH
2134}
2135
49016aca 2136/**
ffeae418 2137 * ata_dev_configure - Configure the specified ATA/ATAPI device
ffeae418
TH
2138 * @dev: Target device to configure
2139 *
2140 * Configure @dev according to @dev->id. Generic and low-level
2141 * driver specific fixups are also applied.
49016aca
TH
2142 *
2143 * LOCKING:
ffeae418
TH
2144 * Kernel thread context (may sleep)
2145 *
2146 * RETURNS:
2147 * 0 on success, -errno otherwise
49016aca 2148 */
efdaedc4 2149int ata_dev_configure(struct ata_device *dev)
49016aca 2150{
9af5c9c9
TH
2151 struct ata_port *ap = dev->link->ap;
2152 struct ata_eh_context *ehc = &dev->link->eh_context;
6746544c 2153 int print_info = ehc->i.flags & ATA_EHI_PRINTINFO;
1148c3a7 2154 const u16 *id = dev->id;
7dc951ae 2155 unsigned long xfer_mask;
b352e57d 2156 char revbuf[7]; /* XYZ-99\0 */
3f64f565
EM
2157 char fwrevbuf[ATA_ID_FW_REV_LEN+1];
2158 char modelbuf[ATA_ID_PROD_LEN+1];
e6d902a3 2159 int rc;
49016aca 2160
0dd4b21f 2161 if (!ata_dev_enabled(dev) && ata_msg_info(ap)) {
a9a79dfe 2162 ata_dev_info(dev, "%s: ENTER/EXIT -- nodev\n", __func__);
ffeae418 2163 return 0;
49016aca
TH
2164 }
2165
0dd4b21f 2166 if (ata_msg_probe(ap))
a9a79dfe 2167 ata_dev_dbg(dev, "%s: ENTER\n", __func__);
1da177e4 2168
75683fe7
TH
2169 /* set horkage */
2170 dev->horkage |= ata_dev_blacklisted(dev);
33267325 2171 ata_force_horkage(dev);
75683fe7 2172
50af2fa1 2173 if (dev->horkage & ATA_HORKAGE_DISABLE) {
a9a79dfe 2174 ata_dev_info(dev, "unsupported device, disabling\n");
50af2fa1
TH
2175 ata_dev_disable(dev);
2176 return 0;
2177 }
2178
2486fa56
TH
2179 if ((!atapi_enabled || (ap->flags & ATA_FLAG_NO_ATAPI)) &&
2180 dev->class == ATA_DEV_ATAPI) {
a9a79dfe
JP
2181 ata_dev_warn(dev, "WARNING: ATAPI is %s, device ignored\n",
2182 atapi_enabled ? "not supported with this driver"
2183 : "disabled");
2486fa56
TH
2184 ata_dev_disable(dev);
2185 return 0;
2186 }
2187
9062712f
TH
2188 rc = ata_do_link_spd_horkage(dev);
2189 if (rc)
2190 return rc;
2191
6746544c
TH
2192 /* let ACPI work its magic */
2193 rc = ata_acpi_on_devcfg(dev);
2194 if (rc)
2195 return rc;
08573a86 2196
05027adc
TH
2197 /* massage HPA, do it early as it might change IDENTIFY data */
2198 rc = ata_hpa_resize(dev);
2199 if (rc)
2200 return rc;
2201
c39f5ebe 2202 /* print device capabilities */
0dd4b21f 2203 if (ata_msg_probe(ap))
a9a79dfe
JP
2204 ata_dev_dbg(dev,
2205 "%s: cfg 49:%04x 82:%04x 83:%04x 84:%04x "
2206 "85:%04x 86:%04x 87:%04x 88:%04x\n",
2207 __func__,
2208 id[49], id[82], id[83], id[84],
2209 id[85], id[86], id[87], id[88]);
c39f5ebe 2210
208a9933 2211 /* initialize to-be-configured parameters */
ea1dd4e1 2212 dev->flags &= ~ATA_DFLAG_CFG_MASK;
208a9933
TH
2213 dev->max_sectors = 0;
2214 dev->cdb_len = 0;
2215 dev->n_sectors = 0;
2216 dev->cylinders = 0;
2217 dev->heads = 0;
2218 dev->sectors = 0;
e18086d6 2219 dev->multi_count = 0;
208a9933 2220
1da177e4
LT
2221 /*
2222 * common ATA, ATAPI feature tests
2223 */
2224
ff8854b2 2225 /* find max transfer mode; for printk only */
1148c3a7 2226 xfer_mask = ata_id_xfermask(id);
1da177e4 2227
0dd4b21f
BP
2228 if (ata_msg_probe(ap))
2229 ata_dump_id(id);
1da177e4 2230
ef143d57
AL
2231 /* SCSI only uses 4-char revisions, dump full 8 chars from ATA */
2232 ata_id_c_string(dev->id, fwrevbuf, ATA_ID_FW_REV,
2233 sizeof(fwrevbuf));
2234
2235 ata_id_c_string(dev->id, modelbuf, ATA_ID_PROD,
2236 sizeof(modelbuf));
2237
1da177e4
LT
2238 /* ATA-specific feature tests */
2239 if (dev->class == ATA_DEV_ATA) {
b352e57d 2240 if (ata_id_is_cfa(id)) {
62afe5d7
SS
2241 /* CPRM may make this media unusable */
2242 if (id[ATA_ID_CFA_KEY_MGMT] & 1)
a9a79dfe
JP
2243 ata_dev_warn(dev,
2244 "supports DRM functions and may not be fully accessible\n");
b352e57d 2245 snprintf(revbuf, 7, "CFA");
ae8d4ee7 2246 } else {
2dcb407e 2247 snprintf(revbuf, 7, "ATA-%d", ata_id_major_version(id));
ae8d4ee7
AC
2248 /* Warn the user if the device has TPM extensions */
2249 if (ata_id_has_tpm(id))
a9a79dfe
JP
2250 ata_dev_warn(dev,
2251 "supports DRM functions and may not be fully accessible\n");
ae8d4ee7 2252 }
b352e57d 2253
1148c3a7 2254 dev->n_sectors = ata_id_n_sectors(id);
2940740b 2255
e18086d6
ML
2256 /* get current R/W Multiple count setting */
2257 if ((dev->id[47] >> 8) == 0x80 && (dev->id[59] & 0x100)) {
2258 unsigned int max = dev->id[47] & 0xff;
2259 unsigned int cnt = dev->id[59] & 0xff;
2260 /* only recognize/allow powers of two here */
2261 if (is_power_of_2(max) && is_power_of_2(cnt))
2262 if (cnt <= max)
2263 dev->multi_count = cnt;
2264 }
3f64f565 2265
1148c3a7 2266 if (ata_id_has_lba(id)) {
4c2d721a 2267 const char *lba_desc;
388539f3 2268 char ncq_desc[24];
8bf62ece 2269
4c2d721a
TH
2270 lba_desc = "LBA";
2271 dev->flags |= ATA_DFLAG_LBA;
1148c3a7 2272 if (ata_id_has_lba48(id)) {
8bf62ece 2273 dev->flags |= ATA_DFLAG_LBA48;
4c2d721a 2274 lba_desc = "LBA48";
6fc49adb
TH
2275
2276 if (dev->n_sectors >= (1UL << 28) &&
2277 ata_id_has_flush_ext(id))
2278 dev->flags |= ATA_DFLAG_FLUSH_EXT;
4c2d721a 2279 }
8bf62ece 2280
a6e6ce8e 2281 /* config NCQ */
388539f3
SL
2282 rc = ata_dev_config_ncq(dev, ncq_desc, sizeof(ncq_desc));
2283 if (rc)
2284 return rc;
a6e6ce8e 2285
8bf62ece 2286 /* print device info to dmesg */
3f64f565 2287 if (ata_msg_drv(ap) && print_info) {
a9a79dfe
JP
2288 ata_dev_info(dev, "%s: %s, %s, max %s\n",
2289 revbuf, modelbuf, fwrevbuf,
2290 ata_mode_string(xfer_mask));
2291 ata_dev_info(dev,
2292 "%llu sectors, multi %u: %s %s\n",
f15a1daf 2293 (unsigned long long)dev->n_sectors,
3f64f565
EM
2294 dev->multi_count, lba_desc, ncq_desc);
2295 }
ffeae418 2296 } else {
8bf62ece
AL
2297 /* CHS */
2298
2299 /* Default translation */
1148c3a7
TH
2300 dev->cylinders = id[1];
2301 dev->heads = id[3];
2302 dev->sectors = id[6];
8bf62ece 2303
1148c3a7 2304 if (ata_id_current_chs_valid(id)) {
8bf62ece 2305 /* Current CHS translation is valid. */
1148c3a7
TH
2306 dev->cylinders = id[54];
2307 dev->heads = id[55];
2308 dev->sectors = id[56];
8bf62ece
AL
2309 }
2310
2311 /* print device info to dmesg */
3f64f565 2312 if (ata_msg_drv(ap) && print_info) {
a9a79dfe
JP
2313 ata_dev_info(dev, "%s: %s, %s, max %s\n",
2314 revbuf, modelbuf, fwrevbuf,
2315 ata_mode_string(xfer_mask));
2316 ata_dev_info(dev,
2317 "%llu sectors, multi %u, CHS %u/%u/%u\n",
2318 (unsigned long long)dev->n_sectors,
2319 dev->multi_count, dev->cylinders,
2320 dev->heads, dev->sectors);
3f64f565 2321 }
07f6f7d0
AL
2322 }
2323
6e7846e9 2324 dev->cdb_len = 16;
1da177e4
LT
2325 }
2326
2327 /* ATAPI-specific feature tests */
2c13b7ce 2328 else if (dev->class == ATA_DEV_ATAPI) {
854c73a2
TH
2329 const char *cdb_intr_string = "";
2330 const char *atapi_an_string = "";
91163006 2331 const char *dma_dir_string = "";
7d77b247 2332 u32 sntf;
08a556db 2333
1148c3a7 2334 rc = atapi_cdb_len(id);
1da177e4 2335 if ((rc < 12) || (rc > ATAPI_CDB_LEN)) {
0dd4b21f 2336 if (ata_msg_warn(ap))
a9a79dfe 2337 ata_dev_warn(dev, "unsupported CDB len\n");
ffeae418 2338 rc = -EINVAL;
1da177e4
LT
2339 goto err_out_nosup;
2340 }
6e7846e9 2341 dev->cdb_len = (unsigned int) rc;
1da177e4 2342
7d77b247
TH
2343 /* Enable ATAPI AN if both the host and device have
2344 * the support. If PMP is attached, SNTF is required
2345 * to enable ATAPI AN to discern between PHY status
2346 * changed notifications and ATAPI ANs.
9f45cbd3 2347 */
e7ecd435
TH
2348 if (atapi_an &&
2349 (ap->flags & ATA_FLAG_AN) && ata_id_has_atapi_AN(id) &&
071f44b1 2350 (!sata_pmp_attached(ap) ||
7d77b247 2351 sata_scr_read(&ap->link, SCR_NOTIFICATION, &sntf) == 0)) {
854c73a2
TH
2352 unsigned int err_mask;
2353
9f45cbd3 2354 /* issue SET feature command to turn this on */
218f3d30
JG
2355 err_mask = ata_dev_set_feature(dev,
2356 SETFEATURES_SATA_ENABLE, SATA_AN);
854c73a2 2357 if (err_mask)
a9a79dfe
JP
2358 ata_dev_err(dev,
2359 "failed to enable ATAPI AN (err_mask=0x%x)\n",
2360 err_mask);
854c73a2 2361 else {
9f45cbd3 2362 dev->flags |= ATA_DFLAG_AN;
854c73a2
TH
2363 atapi_an_string = ", ATAPI AN";
2364 }
9f45cbd3
KCA
2365 }
2366
08a556db 2367 if (ata_id_cdb_intr(dev->id)) {
312f7da2 2368 dev->flags |= ATA_DFLAG_CDB_INTR;
08a556db
AL
2369 cdb_intr_string = ", CDB intr";
2370 }
312f7da2 2371
91163006
TH
2372 if (atapi_dmadir || atapi_id_dmadir(dev->id)) {
2373 dev->flags |= ATA_DFLAG_DMADIR;
2374 dma_dir_string = ", DMADIR";
2375 }
2376
1da177e4 2377 /* print device info to dmesg */
5afc8142 2378 if (ata_msg_drv(ap) && print_info)
a9a79dfe
JP
2379 ata_dev_info(dev,
2380 "ATAPI: %s, %s, max %s%s%s%s\n",
2381 modelbuf, fwrevbuf,
2382 ata_mode_string(xfer_mask),
2383 cdb_intr_string, atapi_an_string,
2384 dma_dir_string);
1da177e4
LT
2385 }
2386
914ed354
TH
2387 /* determine max_sectors */
2388 dev->max_sectors = ATA_MAX_SECTORS;
2389 if (dev->flags & ATA_DFLAG_LBA48)
2390 dev->max_sectors = ATA_MAX_SECTORS_LBA48;
2391
c5038fc0
AC
2392 /* Limit PATA drive on SATA cable bridge transfers to udma5,
2393 200 sectors */
3373efd8 2394 if (ata_dev_knobble(dev)) {
5afc8142 2395 if (ata_msg_drv(ap) && print_info)
a9a79dfe 2396 ata_dev_info(dev, "applying bridge limits\n");
5a529139 2397 dev->udma_mask &= ATA_UDMA5;
4b2f3ede
TH
2398 dev->max_sectors = ATA_MAX_SECTORS;
2399 }
2400
f8d8e579 2401 if ((dev->class == ATA_DEV_ATAPI) &&
f442cd86 2402 (atapi_command_packet_set(id) == TYPE_TAPE)) {
f8d8e579 2403 dev->max_sectors = ATA_MAX_SECTORS_TAPE;
f442cd86
AL
2404 dev->horkage |= ATA_HORKAGE_STUCK_ERR;
2405 }
f8d8e579 2406
75683fe7 2407 if (dev->horkage & ATA_HORKAGE_MAX_SEC_128)
03ec52de
TH
2408 dev->max_sectors = min_t(unsigned int, ATA_MAX_SECTORS_128,
2409 dev->max_sectors);
18d6e9d5 2410
4b2f3ede 2411 if (ap->ops->dev_config)
cd0d3bbc 2412 ap->ops->dev_config(dev);
4b2f3ede 2413
c5038fc0
AC
2414 if (dev->horkage & ATA_HORKAGE_DIAGNOSTIC) {
2415 /* Let the user know. We don't want to disallow opens for
2416 rescue purposes, or in case the vendor is just a blithering
2417 idiot. Do this after the dev_config call as some controllers
2418 with buggy firmware may want to avoid reporting false device
2419 bugs */
2420
2421 if (print_info) {
a9a79dfe 2422 ata_dev_warn(dev,
c5038fc0 2423"Drive reports diagnostics failure. This may indicate a drive\n");
a9a79dfe 2424 ata_dev_warn(dev,
c5038fc0
AC
2425"fault or invalid emulation. Contact drive vendor for information.\n");
2426 }
2427 }
2428
ac70a964 2429 if ((dev->horkage & ATA_HORKAGE_FIRMWARE_WARN) && print_info) {
a9a79dfe
JP
2430 ata_dev_warn(dev, "WARNING: device requires firmware update to be fully functional\n");
2431 ata_dev_warn(dev, " contact the vendor or visit http://ata.wiki.kernel.org\n");
ac70a964
TH
2432 }
2433
ffeae418 2434 return 0;
1da177e4
LT
2435
2436err_out_nosup:
0dd4b21f 2437 if (ata_msg_probe(ap))
a9a79dfe 2438 ata_dev_dbg(dev, "%s: EXIT, err\n", __func__);
ffeae418 2439 return rc;
1da177e4
LT
2440}
2441
be0d18df 2442/**
2e41e8e6 2443 * ata_cable_40wire - return 40 wire cable type
be0d18df
AC
2444 * @ap: port
2445 *
2e41e8e6 2446 * Helper method for drivers which want to hardwire 40 wire cable
be0d18df
AC
2447 * detection.
2448 */
2449
2450int ata_cable_40wire(struct ata_port *ap)
2451{
2452 return ATA_CBL_PATA40;
2453}
2454
2455/**
2e41e8e6 2456 * ata_cable_80wire - return 80 wire cable type
be0d18df
AC
2457 * @ap: port
2458 *
2e41e8e6 2459 * Helper method for drivers which want to hardwire 80 wire cable
be0d18df
AC
2460 * detection.
2461 */
2462
2463int ata_cable_80wire(struct ata_port *ap)
2464{
2465 return ATA_CBL_PATA80;
2466}
2467
2468/**
2469 * ata_cable_unknown - return unknown PATA cable.
2470 * @ap: port
2471 *
2472 * Helper method for drivers which have no PATA cable detection.
2473 */
2474
2475int ata_cable_unknown(struct ata_port *ap)
2476{
2477 return ATA_CBL_PATA_UNK;
2478}
2479
c88f90c3
TH
2480/**
2481 * ata_cable_ignore - return ignored PATA cable.
2482 * @ap: port
2483 *
2484 * Helper method for drivers which don't use cable type to limit
2485 * transfer mode.
2486 */
2487int ata_cable_ignore(struct ata_port *ap)
2488{
2489 return ATA_CBL_PATA_IGN;
2490}
2491
be0d18df
AC
2492/**
2493 * ata_cable_sata - return SATA cable type
2494 * @ap: port
2495 *
2496 * Helper method for drivers which have SATA cables
2497 */
2498
2499int ata_cable_sata(struct ata_port *ap)
2500{
2501 return ATA_CBL_SATA;
2502}
2503
1da177e4
LT
2504/**
2505 * ata_bus_probe - Reset and probe ATA bus
2506 * @ap: Bus to probe
2507 *
0cba632b
JG
2508 * Master ATA bus probing function. Initiates a hardware-dependent
2509 * bus reset, then attempts to identify any devices found on
2510 * the bus.
2511 *
1da177e4 2512 * LOCKING:
0cba632b 2513 * PCI/etc. bus probe sem.
1da177e4
LT
2514 *
2515 * RETURNS:
96072e69 2516 * Zero on success, negative errno otherwise.
1da177e4
LT
2517 */
2518
80289167 2519int ata_bus_probe(struct ata_port *ap)
1da177e4 2520{
28ca5c57 2521 unsigned int classes[ATA_MAX_DEVICES];
14d2bac1 2522 int tries[ATA_MAX_DEVICES];
f58229f8 2523 int rc;
e82cbdb9 2524 struct ata_device *dev;
1da177e4 2525
1eca4365 2526 ata_for_each_dev(dev, &ap->link, ALL)
f58229f8 2527 tries[dev->devno] = ATA_PROBE_MAX_TRIES;
14d2bac1
TH
2528
2529 retry:
1eca4365 2530 ata_for_each_dev(dev, &ap->link, ALL) {
cdeab114
TH
2531 /* If we issue an SRST then an ATA drive (not ATAPI)
2532 * may change configuration and be in PIO0 timing. If
2533 * we do a hard reset (or are coming from power on)
2534 * this is true for ATA or ATAPI. Until we've set a
2535 * suitable controller mode we should not touch the
2536 * bus as we may be talking too fast.
2537 */
2538 dev->pio_mode = XFER_PIO_0;
2539
2540 /* If the controller has a pio mode setup function
2541 * then use it to set the chipset to rights. Don't
2542 * touch the DMA setup as that will be dealt with when
2543 * configuring devices.
2544 */
2545 if (ap->ops->set_piomode)
2546 ap->ops->set_piomode(ap, dev);
2547 }
2548
2044470c 2549 /* reset and determine device classes */
52783c5d 2550 ap->ops->phy_reset(ap);
2061a47a 2551
1eca4365 2552 ata_for_each_dev(dev, &ap->link, ALL) {
3e4ec344 2553 if (dev->class != ATA_DEV_UNKNOWN)
52783c5d
TH
2554 classes[dev->devno] = dev->class;
2555 else
2556 classes[dev->devno] = ATA_DEV_NONE;
2044470c 2557
52783c5d 2558 dev->class = ATA_DEV_UNKNOWN;
28ca5c57 2559 }
1da177e4 2560
f31f0cc2
JG
2561 /* read IDENTIFY page and configure devices. We have to do the identify
2562 specific sequence bass-ackwards so that PDIAG- is released by
2563 the slave device */
2564
1eca4365 2565 ata_for_each_dev(dev, &ap->link, ALL_REVERSE) {
f58229f8
TH
2566 if (tries[dev->devno])
2567 dev->class = classes[dev->devno];
ffeae418 2568
14d2bac1 2569 if (!ata_dev_enabled(dev))
ffeae418 2570 continue;
ffeae418 2571
bff04647
TH
2572 rc = ata_dev_read_id(dev, &dev->class, ATA_READID_POSTRESET,
2573 dev->id);
14d2bac1
TH
2574 if (rc)
2575 goto fail;
f31f0cc2
JG
2576 }
2577
be0d18df
AC
2578 /* Now ask for the cable type as PDIAG- should have been released */
2579 if (ap->ops->cable_detect)
2580 ap->cbl = ap->ops->cable_detect(ap);
2581
1eca4365
TH
2582 /* We may have SATA bridge glue hiding here irrespective of
2583 * the reported cable types and sensed types. When SATA
2584 * drives indicate we have a bridge, we don't know which end
2585 * of the link the bridge is which is a problem.
2586 */
2587 ata_for_each_dev(dev, &ap->link, ENABLED)
614fe29b
AC
2588 if (ata_id_is_sata(dev->id))
2589 ap->cbl = ATA_CBL_SATA;
614fe29b 2590
f31f0cc2
JG
2591 /* After the identify sequence we can now set up the devices. We do
2592 this in the normal order so that the user doesn't get confused */
2593
1eca4365 2594 ata_for_each_dev(dev, &ap->link, ENABLED) {
9af5c9c9 2595 ap->link.eh_context.i.flags |= ATA_EHI_PRINTINFO;
efdaedc4 2596 rc = ata_dev_configure(dev);
9af5c9c9 2597 ap->link.eh_context.i.flags &= ~ATA_EHI_PRINTINFO;
14d2bac1
TH
2598 if (rc)
2599 goto fail;
1da177e4
LT
2600 }
2601
e82cbdb9 2602 /* configure transfer mode */
0260731f 2603 rc = ata_set_mode(&ap->link, &dev);
4ae72a1e 2604 if (rc)
51713d35 2605 goto fail;
1da177e4 2606
1eca4365
TH
2607 ata_for_each_dev(dev, &ap->link, ENABLED)
2608 return 0;
1da177e4 2609
96072e69 2610 return -ENODEV;
14d2bac1
TH
2611
2612 fail:
4ae72a1e
TH
2613 tries[dev->devno]--;
2614
14d2bac1
TH
2615 switch (rc) {
2616 case -EINVAL:
4ae72a1e 2617 /* eeek, something went very wrong, give up */
14d2bac1
TH
2618 tries[dev->devno] = 0;
2619 break;
4ae72a1e
TH
2620
2621 case -ENODEV:
2622 /* give it just one more chance */
2623 tries[dev->devno] = min(tries[dev->devno], 1);
14d2bac1 2624 case -EIO:
4ae72a1e
TH
2625 if (tries[dev->devno] == 1) {
2626 /* This is the last chance, better to slow
2627 * down than lose it.
2628 */
a07d499b 2629 sata_down_spd_limit(&ap->link, 0);
4ae72a1e
TH
2630 ata_down_xfermask_limit(dev, ATA_DNXFER_PIO);
2631 }
14d2bac1
TH
2632 }
2633
4ae72a1e 2634 if (!tries[dev->devno])
3373efd8 2635 ata_dev_disable(dev);
ec573755 2636
14d2bac1 2637 goto retry;
1da177e4
LT
2638}
2639
3be680b7
TH
2640/**
2641 * sata_print_link_status - Print SATA link status
936fd732 2642 * @link: SATA link to printk link status about
3be680b7
TH
2643 *
2644 * This function prints link speed and status of a SATA link.
2645 *
2646 * LOCKING:
2647 * None.
2648 */
6bdb4fc9 2649static void sata_print_link_status(struct ata_link *link)
3be680b7 2650{
6d5f9732 2651 u32 sstatus, scontrol, tmp;
3be680b7 2652
936fd732 2653 if (sata_scr_read(link, SCR_STATUS, &sstatus))
3be680b7 2654 return;
936fd732 2655 sata_scr_read(link, SCR_CONTROL, &scontrol);
3be680b7 2656
b1c72916 2657 if (ata_phys_link_online(link)) {
3be680b7 2658 tmp = (sstatus >> 4) & 0xf;
a9a79dfe
JP
2659 ata_link_info(link, "SATA link up %s (SStatus %X SControl %X)\n",
2660 sata_spd_string(tmp), sstatus, scontrol);
3be680b7 2661 } else {
a9a79dfe
JP
2662 ata_link_info(link, "SATA link down (SStatus %X SControl %X)\n",
2663 sstatus, scontrol);
3be680b7
TH
2664 }
2665}
2666
ebdfca6e
AC
2667/**
2668 * ata_dev_pair - return other device on cable
ebdfca6e
AC
2669 * @adev: device
2670 *
2671 * Obtain the other device on the same cable, or if none is
2672 * present NULL is returned
2673 */
2e9edbf8 2674
3373efd8 2675struct ata_device *ata_dev_pair(struct ata_device *adev)
ebdfca6e 2676{
9af5c9c9
TH
2677 struct ata_link *link = adev->link;
2678 struct ata_device *pair = &link->device[1 - adev->devno];
e1211e3f 2679 if (!ata_dev_enabled(pair))
ebdfca6e
AC
2680 return NULL;
2681 return pair;
2682}
2683
1c3fae4d 2684/**
3c567b7d 2685 * sata_down_spd_limit - adjust SATA spd limit downward
936fd732 2686 * @link: Link to adjust SATA spd limit for
a07d499b 2687 * @spd_limit: Additional limit
1c3fae4d 2688 *
936fd732 2689 * Adjust SATA spd limit of @link downward. Note that this
1c3fae4d 2690 * function only adjusts the limit. The change must be applied
3c567b7d 2691 * using sata_set_spd().
1c3fae4d 2692 *
a07d499b
TH
2693 * If @spd_limit is non-zero, the speed is limited to equal to or
2694 * lower than @spd_limit if such speed is supported. If
2695 * @spd_limit is slower than any supported speed, only the lowest
2696 * supported speed is allowed.
2697 *
1c3fae4d
TH
2698 * LOCKING:
2699 * Inherited from caller.
2700 *
2701 * RETURNS:
2702 * 0 on success, negative errno on failure
2703 */
a07d499b 2704int sata_down_spd_limit(struct ata_link *link, u32 spd_limit)
1c3fae4d 2705{
81952c54 2706 u32 sstatus, spd, mask;
a07d499b 2707 int rc, bit;
1c3fae4d 2708
936fd732 2709 if (!sata_scr_valid(link))
008a7896
TH
2710 return -EOPNOTSUPP;
2711
2712 /* If SCR can be read, use it to determine the current SPD.
936fd732 2713 * If not, use cached value in link->sata_spd.
008a7896 2714 */
936fd732 2715 rc = sata_scr_read(link, SCR_STATUS, &sstatus);
9913ff8a 2716 if (rc == 0 && ata_sstatus_online(sstatus))
008a7896
TH
2717 spd = (sstatus >> 4) & 0xf;
2718 else
936fd732 2719 spd = link->sata_spd;
1c3fae4d 2720
936fd732 2721 mask = link->sata_spd_limit;
1c3fae4d
TH
2722 if (mask <= 1)
2723 return -EINVAL;
008a7896
TH
2724
2725 /* unconditionally mask off the highest bit */
a07d499b
TH
2726 bit = fls(mask) - 1;
2727 mask &= ~(1 << bit);
1c3fae4d 2728
008a7896
TH
2729 /* Mask off all speeds higher than or equal to the current
2730 * one. Force 1.5Gbps if current SPD is not available.
2731 */
2732 if (spd > 1)
2733 mask &= (1 << (spd - 1)) - 1;
2734 else
2735 mask &= 1;
2736
2737 /* were we already at the bottom? */
1c3fae4d
TH
2738 if (!mask)
2739 return -EINVAL;
2740
a07d499b
TH
2741 if (spd_limit) {
2742 if (mask & ((1 << spd_limit) - 1))
2743 mask &= (1 << spd_limit) - 1;
2744 else {
2745 bit = ffs(mask) - 1;
2746 mask = 1 << bit;
2747 }
2748 }
2749
936fd732 2750 link->sata_spd_limit = mask;
1c3fae4d 2751
a9a79dfe
JP
2752 ata_link_warn(link, "limiting SATA link speed to %s\n",
2753 sata_spd_string(fls(mask)));
1c3fae4d
TH
2754
2755 return 0;
2756}
2757
936fd732 2758static int __sata_set_spd_needed(struct ata_link *link, u32 *scontrol)
1c3fae4d 2759{
5270222f
TH
2760 struct ata_link *host_link = &link->ap->link;
2761 u32 limit, target, spd;
1c3fae4d 2762
5270222f
TH
2763 limit = link->sata_spd_limit;
2764
2765 /* Don't configure downstream link faster than upstream link.
2766 * It doesn't speed up anything and some PMPs choke on such
2767 * configuration.
2768 */
2769 if (!ata_is_host_link(link) && host_link->sata_spd)
2770 limit &= (1 << host_link->sata_spd) - 1;
2771
2772 if (limit == UINT_MAX)
2773 target = 0;
1c3fae4d 2774 else
5270222f 2775 target = fls(limit);
1c3fae4d
TH
2776
2777 spd = (*scontrol >> 4) & 0xf;
5270222f 2778 *scontrol = (*scontrol & ~0xf0) | ((target & 0xf) << 4);
1c3fae4d 2779
5270222f 2780 return spd != target;
1c3fae4d
TH
2781}
2782
2783/**
3c567b7d 2784 * sata_set_spd_needed - is SATA spd configuration needed
936fd732 2785 * @link: Link in question
1c3fae4d
TH
2786 *
2787 * Test whether the spd limit in SControl matches
936fd732 2788 * @link->sata_spd_limit. This function is used to determine
1c3fae4d
TH
2789 * whether hardreset is necessary to apply SATA spd
2790 * configuration.
2791 *
2792 * LOCKING:
2793 * Inherited from caller.
2794 *
2795 * RETURNS:
2796 * 1 if SATA spd configuration is needed, 0 otherwise.
2797 */
1dc55e87 2798static int sata_set_spd_needed(struct ata_link *link)
1c3fae4d
TH
2799{
2800 u32 scontrol;
2801
936fd732 2802 if (sata_scr_read(link, SCR_CONTROL, &scontrol))
db64bcf3 2803 return 1;
1c3fae4d 2804
936fd732 2805 return __sata_set_spd_needed(link, &scontrol);
1c3fae4d
TH
2806}
2807
2808/**
3c567b7d 2809 * sata_set_spd - set SATA spd according to spd limit
936fd732 2810 * @link: Link to set SATA spd for
1c3fae4d 2811 *
936fd732 2812 * Set SATA spd of @link according to sata_spd_limit.
1c3fae4d
TH
2813 *
2814 * LOCKING:
2815 * Inherited from caller.
2816 *
2817 * RETURNS:
2818 * 0 if spd doesn't need to be changed, 1 if spd has been
81952c54 2819 * changed. Negative errno if SCR registers are inaccessible.
1c3fae4d 2820 */
936fd732 2821int sata_set_spd(struct ata_link *link)
1c3fae4d
TH
2822{
2823 u32 scontrol;
81952c54 2824 int rc;
1c3fae4d 2825
936fd732 2826 if ((rc = sata_scr_read(link, SCR_CONTROL, &scontrol)))
81952c54 2827 return rc;
1c3fae4d 2828
936fd732 2829 if (!__sata_set_spd_needed(link, &scontrol))
1c3fae4d
TH
2830 return 0;
2831
936fd732 2832 if ((rc = sata_scr_write(link, SCR_CONTROL, scontrol)))
81952c54
TH
2833 return rc;
2834
1c3fae4d
TH
2835 return 1;
2836}
2837
452503f9
AC
2838/*
2839 * This mode timing computation functionality is ported over from
2840 * drivers/ide/ide-timing.h and was originally written by Vojtech Pavlik
2841 */
2842/*
b352e57d 2843 * PIO 0-4, MWDMA 0-2 and UDMA 0-6 timings (in nanoseconds).
452503f9 2844 * These were taken from ATA/ATAPI-6 standard, rev 0a, except
b352e57d
AC
2845 * for UDMA6, which is currently supported only by Maxtor drives.
2846 *
2847 * For PIO 5/6 MWDMA 3/4 see the CFA specification 3.0.
452503f9
AC
2848 */
2849
2850static const struct ata_timing ata_timing[] = {
3ada9c12
DD
2851/* { XFER_PIO_SLOW, 120, 290, 240, 960, 290, 240, 0, 960, 0 }, */
2852 { XFER_PIO_0, 70, 290, 240, 600, 165, 150, 0, 600, 0 },
2853 { XFER_PIO_1, 50, 290, 93, 383, 125, 100, 0, 383, 0 },
2854 { XFER_PIO_2, 30, 290, 40, 330, 100, 90, 0, 240, 0 },
2855 { XFER_PIO_3, 30, 80, 70, 180, 80, 70, 0, 180, 0 },
2856 { XFER_PIO_4, 25, 70, 25, 120, 70, 25, 0, 120, 0 },
2857 { XFER_PIO_5, 15, 65, 25, 100, 65, 25, 0, 100, 0 },
2858 { XFER_PIO_6, 10, 55, 20, 80, 55, 20, 0, 80, 0 },
2859
2860 { XFER_SW_DMA_0, 120, 0, 0, 0, 480, 480, 50, 960, 0 },
2861 { XFER_SW_DMA_1, 90, 0, 0, 0, 240, 240, 30, 480, 0 },
2862 { XFER_SW_DMA_2, 60, 0, 0, 0, 120, 120, 20, 240, 0 },
2863
2864 { XFER_MW_DMA_0, 60, 0, 0, 0, 215, 215, 20, 480, 0 },
2865 { XFER_MW_DMA_1, 45, 0, 0, 0, 80, 50, 5, 150, 0 },
2866 { XFER_MW_DMA_2, 25, 0, 0, 0, 70, 25, 5, 120, 0 },
2867 { XFER_MW_DMA_3, 25, 0, 0, 0, 65, 25, 5, 100, 0 },
2868 { XFER_MW_DMA_4, 25, 0, 0, 0, 55, 20, 5, 80, 0 },
2869
2870/* { XFER_UDMA_SLOW, 0, 0, 0, 0, 0, 0, 0, 0, 150 }, */
2871 { XFER_UDMA_0, 0, 0, 0, 0, 0, 0, 0, 0, 120 },
2872 { XFER_UDMA_1, 0, 0, 0, 0, 0, 0, 0, 0, 80 },
2873 { XFER_UDMA_2, 0, 0, 0, 0, 0, 0, 0, 0, 60 },
2874 { XFER_UDMA_3, 0, 0, 0, 0, 0, 0, 0, 0, 45 },
2875 { XFER_UDMA_4, 0, 0, 0, 0, 0, 0, 0, 0, 30 },
2876 { XFER_UDMA_5, 0, 0, 0, 0, 0, 0, 0, 0, 20 },
2877 { XFER_UDMA_6, 0, 0, 0, 0, 0, 0, 0, 0, 15 },
452503f9
AC
2878
2879 { 0xFF }
2880};
2881
2dcb407e
JG
2882#define ENOUGH(v, unit) (((v)-1)/(unit)+1)
2883#define EZ(v, unit) ((v)?ENOUGH(v, unit):0)
452503f9
AC
2884
2885static void ata_timing_quantize(const struct ata_timing *t, struct ata_timing *q, int T, int UT)
2886{
3ada9c12
DD
2887 q->setup = EZ(t->setup * 1000, T);
2888 q->act8b = EZ(t->act8b * 1000, T);
2889 q->rec8b = EZ(t->rec8b * 1000, T);
2890 q->cyc8b = EZ(t->cyc8b * 1000, T);
2891 q->active = EZ(t->active * 1000, T);
2892 q->recover = EZ(t->recover * 1000, T);
2893 q->dmack_hold = EZ(t->dmack_hold * 1000, T);
2894 q->cycle = EZ(t->cycle * 1000, T);
2895 q->udma = EZ(t->udma * 1000, UT);
452503f9
AC
2896}
2897
2898void ata_timing_merge(const struct ata_timing *a, const struct ata_timing *b,
2899 struct ata_timing *m, unsigned int what)
2900{
2901 if (what & ATA_TIMING_SETUP ) m->setup = max(a->setup, b->setup);
2902 if (what & ATA_TIMING_ACT8B ) m->act8b = max(a->act8b, b->act8b);
2903 if (what & ATA_TIMING_REC8B ) m->rec8b = max(a->rec8b, b->rec8b);
2904 if (what & ATA_TIMING_CYC8B ) m->cyc8b = max(a->cyc8b, b->cyc8b);
2905 if (what & ATA_TIMING_ACTIVE ) m->active = max(a->active, b->active);
2906 if (what & ATA_TIMING_RECOVER) m->recover = max(a->recover, b->recover);
3ada9c12 2907 if (what & ATA_TIMING_DMACK_HOLD) m->dmack_hold = max(a->dmack_hold, b->dmack_hold);
452503f9
AC
2908 if (what & ATA_TIMING_CYCLE ) m->cycle = max(a->cycle, b->cycle);
2909 if (what & ATA_TIMING_UDMA ) m->udma = max(a->udma, b->udma);
2910}
2911
6357357c 2912const struct ata_timing *ata_timing_find_mode(u8 xfer_mode)
452503f9 2913{
70cd071e
TH
2914 const struct ata_timing *t = ata_timing;
2915
2916 while (xfer_mode > t->mode)
2917 t++;
452503f9 2918
70cd071e
TH
2919 if (xfer_mode == t->mode)
2920 return t;
2921 return NULL;
452503f9
AC
2922}
2923
2924int ata_timing_compute(struct ata_device *adev, unsigned short speed,
2925 struct ata_timing *t, int T, int UT)
2926{
9e8808a9 2927 const u16 *id = adev->id;
452503f9
AC
2928 const struct ata_timing *s;
2929 struct ata_timing p;
2930
2931 /*
2e9edbf8 2932 * Find the mode.
75b1f2f8 2933 */
452503f9
AC
2934
2935 if (!(s = ata_timing_find_mode(speed)))
2936 return -EINVAL;
2937
75b1f2f8
AL
2938 memcpy(t, s, sizeof(*s));
2939
452503f9
AC
2940 /*
2941 * If the drive is an EIDE drive, it can tell us it needs extended
2942 * PIO/MW_DMA cycle timing.
2943 */
2944
9e8808a9 2945 if (id[ATA_ID_FIELD_VALID] & 2) { /* EIDE drive */
452503f9 2946 memset(&p, 0, sizeof(p));
9e8808a9 2947
bff00256 2948 if (speed >= XFER_PIO_0 && speed < XFER_SW_DMA_0) {
9e8808a9
BZ
2949 if (speed <= XFER_PIO_2)
2950 p.cycle = p.cyc8b = id[ATA_ID_EIDE_PIO];
2951 else if ((speed <= XFER_PIO_4) ||
2952 (speed == XFER_PIO_5 && !ata_id_is_cfa(id)))
2953 p.cycle = p.cyc8b = id[ATA_ID_EIDE_PIO_IORDY];
2954 } else if (speed >= XFER_MW_DMA_0 && speed <= XFER_MW_DMA_2)
2955 p.cycle = id[ATA_ID_EIDE_DMA_MIN];
2956
452503f9
AC
2957 ata_timing_merge(&p, t, t, ATA_TIMING_CYCLE | ATA_TIMING_CYC8B);
2958 }
2959
2960 /*
2961 * Convert the timing to bus clock counts.
2962 */
2963
75b1f2f8 2964 ata_timing_quantize(t, t, T, UT);
452503f9
AC
2965
2966 /*
c893a3ae
RD
2967 * Even in DMA/UDMA modes we still use PIO access for IDENTIFY,
2968 * S.M.A.R.T * and some other commands. We have to ensure that the
2969 * DMA cycle timing is slower/equal than the fastest PIO timing.
452503f9
AC
2970 */
2971
fd3367af 2972 if (speed > XFER_PIO_6) {
452503f9
AC
2973 ata_timing_compute(adev, adev->pio_mode, &p, T, UT);
2974 ata_timing_merge(&p, t, t, ATA_TIMING_ALL);
2975 }
2976
2977 /*
c893a3ae 2978 * Lengthen active & recovery time so that cycle time is correct.
452503f9
AC
2979 */
2980
2981 if (t->act8b + t->rec8b < t->cyc8b) {
2982 t->act8b += (t->cyc8b - (t->act8b + t->rec8b)) / 2;
2983 t->rec8b = t->cyc8b - t->act8b;
2984 }
2985
2986 if (t->active + t->recover < t->cycle) {
2987 t->active += (t->cycle - (t->active + t->recover)) / 2;
2988 t->recover = t->cycle - t->active;
2989 }
a617c09f 2990
4f701d1e
AC
2991 /* In a few cases quantisation may produce enough errors to
2992 leave t->cycle too low for the sum of active and recovery
2993 if so we must correct this */
2994 if (t->active + t->recover > t->cycle)
2995 t->cycle = t->active + t->recover;
452503f9
AC
2996
2997 return 0;
2998}
2999
a0f79b92
TH
3000/**
3001 * ata_timing_cycle2mode - find xfer mode for the specified cycle duration
3002 * @xfer_shift: ATA_SHIFT_* value for transfer type to examine.
3003 * @cycle: cycle duration in ns
3004 *
3005 * Return matching xfer mode for @cycle. The returned mode is of
3006 * the transfer type specified by @xfer_shift. If @cycle is too
3007 * slow for @xfer_shift, 0xff is returned. If @cycle is faster
3008 * than the fastest known mode, the fasted mode is returned.
3009 *
3010 * LOCKING:
3011 * None.
3012 *
3013 * RETURNS:
3014 * Matching xfer_mode, 0xff if no match found.
3015 */
3016u8 ata_timing_cycle2mode(unsigned int xfer_shift, int cycle)
3017{
3018 u8 base_mode = 0xff, last_mode = 0xff;
3019 const struct ata_xfer_ent *ent;
3020 const struct ata_timing *t;
3021
3022 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
3023 if (ent->shift == xfer_shift)
3024 base_mode = ent->base;
3025
3026 for (t = ata_timing_find_mode(base_mode);
3027 t && ata_xfer_mode2shift(t->mode) == xfer_shift; t++) {
3028 unsigned short this_cycle;
3029
3030 switch (xfer_shift) {
3031 case ATA_SHIFT_PIO:
3032 case ATA_SHIFT_MWDMA:
3033 this_cycle = t->cycle;
3034 break;
3035 case ATA_SHIFT_UDMA:
3036 this_cycle = t->udma;
3037 break;
3038 default:
3039 return 0xff;
3040 }
3041
3042 if (cycle > this_cycle)
3043 break;
3044
3045 last_mode = t->mode;
3046 }
3047
3048 return last_mode;
3049}
3050
cf176e1a
TH
3051/**
3052 * ata_down_xfermask_limit - adjust dev xfer masks downward
cf176e1a 3053 * @dev: Device to adjust xfer masks
458337db 3054 * @sel: ATA_DNXFER_* selector
cf176e1a
TH
3055 *
3056 * Adjust xfer masks of @dev downward. Note that this function
3057 * does not apply the change. Invoking ata_set_mode() afterwards
3058 * will apply the limit.
3059 *
3060 * LOCKING:
3061 * Inherited from caller.
3062 *
3063 * RETURNS:
3064 * 0 on success, negative errno on failure
3065 */
458337db 3066int ata_down_xfermask_limit(struct ata_device *dev, unsigned int sel)
cf176e1a 3067{
458337db 3068 char buf[32];
7dc951ae
TH
3069 unsigned long orig_mask, xfer_mask;
3070 unsigned long pio_mask, mwdma_mask, udma_mask;
458337db 3071 int quiet, highbit;
cf176e1a 3072
458337db
TH
3073 quiet = !!(sel & ATA_DNXFER_QUIET);
3074 sel &= ~ATA_DNXFER_QUIET;
cf176e1a 3075
458337db
TH
3076 xfer_mask = orig_mask = ata_pack_xfermask(dev->pio_mask,
3077 dev->mwdma_mask,
3078 dev->udma_mask);
3079 ata_unpack_xfermask(xfer_mask, &pio_mask, &mwdma_mask, &udma_mask);
cf176e1a 3080
458337db
TH
3081 switch (sel) {
3082 case ATA_DNXFER_PIO:
3083 highbit = fls(pio_mask) - 1;
3084 pio_mask &= ~(1 << highbit);
3085 break;
3086
3087 case ATA_DNXFER_DMA:
3088 if (udma_mask) {
3089 highbit = fls(udma_mask) - 1;
3090 udma_mask &= ~(1 << highbit);
3091 if (!udma_mask)
3092 return -ENOENT;
3093 } else if (mwdma_mask) {
3094 highbit = fls(mwdma_mask) - 1;
3095 mwdma_mask &= ~(1 << highbit);
3096 if (!mwdma_mask)
3097 return -ENOENT;
3098 }
3099 break;
3100
3101 case ATA_DNXFER_40C:
3102 udma_mask &= ATA_UDMA_MASK_40C;
3103 break;
3104
3105 case ATA_DNXFER_FORCE_PIO0:
3106 pio_mask &= 1;
3107 case ATA_DNXFER_FORCE_PIO:
3108 mwdma_mask = 0;
3109 udma_mask = 0;
3110 break;
3111
458337db
TH
3112 default:
3113 BUG();
3114 }
3115
3116 xfer_mask &= ata_pack_xfermask(pio_mask, mwdma_mask, udma_mask);
3117
3118 if (!(xfer_mask & ATA_MASK_PIO) || xfer_mask == orig_mask)
3119 return -ENOENT;
3120
3121 if (!quiet) {
3122 if (xfer_mask & (ATA_MASK_MWDMA | ATA_MASK_UDMA))
3123 snprintf(buf, sizeof(buf), "%s:%s",
3124 ata_mode_string(xfer_mask),
3125 ata_mode_string(xfer_mask & ATA_MASK_PIO));
3126 else
3127 snprintf(buf, sizeof(buf), "%s",
3128 ata_mode_string(xfer_mask));
3129
a9a79dfe 3130 ata_dev_warn(dev, "limiting speed to %s\n", buf);
458337db 3131 }
cf176e1a
TH
3132
3133 ata_unpack_xfermask(xfer_mask, &dev->pio_mask, &dev->mwdma_mask,
3134 &dev->udma_mask);
3135
cf176e1a 3136 return 0;
cf176e1a
TH
3137}
3138
3373efd8 3139static int ata_dev_set_mode(struct ata_device *dev)
1da177e4 3140{
d0cb43b3 3141 struct ata_port *ap = dev->link->ap;
9af5c9c9 3142 struct ata_eh_context *ehc = &dev->link->eh_context;
d0cb43b3 3143 const bool nosetxfer = dev->horkage & ATA_HORKAGE_NOSETXFER;
4055dee7
TH
3144 const char *dev_err_whine = "";
3145 int ign_dev_err = 0;
d0cb43b3 3146 unsigned int err_mask = 0;
83206a29 3147 int rc;
1da177e4 3148
e8384607 3149 dev->flags &= ~ATA_DFLAG_PIO;
1da177e4
LT
3150 if (dev->xfer_shift == ATA_SHIFT_PIO)
3151 dev->flags |= ATA_DFLAG_PIO;
3152
d0cb43b3
TH
3153 if (nosetxfer && ap->flags & ATA_FLAG_SATA && ata_id_is_sata(dev->id))
3154 dev_err_whine = " (SET_XFERMODE skipped)";
3155 else {
3156 if (nosetxfer)
a9a79dfe
JP
3157 ata_dev_warn(dev,
3158 "NOSETXFER but PATA detected - can't "
3159 "skip SETXFER, might malfunction\n");
d0cb43b3
TH
3160 err_mask = ata_dev_set_xfermode(dev);
3161 }
2dcb407e 3162
4055dee7
TH
3163 if (err_mask & ~AC_ERR_DEV)
3164 goto fail;
3165
3166 /* revalidate */
3167 ehc->i.flags |= ATA_EHI_POST_SETMODE;
3168 rc = ata_dev_revalidate(dev, ATA_DEV_UNKNOWN, 0);
3169 ehc->i.flags &= ~ATA_EHI_POST_SETMODE;
3170 if (rc)
3171 return rc;
3172
b93fda12
AC
3173 if (dev->xfer_shift == ATA_SHIFT_PIO) {
3174 /* Old CFA may refuse this command, which is just fine */
3175 if (ata_id_is_cfa(dev->id))
3176 ign_dev_err = 1;
3177 /* Catch several broken garbage emulations plus some pre
3178 ATA devices */
3179 if (ata_id_major_version(dev->id) == 0 &&
3180 dev->pio_mode <= XFER_PIO_2)
3181 ign_dev_err = 1;
3182 /* Some very old devices and some bad newer ones fail
3183 any kind of SET_XFERMODE request but support PIO0-2
3184 timings and no IORDY */
3185 if (!ata_id_has_iordy(dev->id) && dev->pio_mode <= XFER_PIO_2)
3186 ign_dev_err = 1;
3187 }
3acaf94b
AC
3188 /* Early MWDMA devices do DMA but don't allow DMA mode setting.
3189 Don't fail an MWDMA0 set IFF the device indicates it is in MWDMA0 */
c5038fc0 3190 if (dev->xfer_shift == ATA_SHIFT_MWDMA &&
3acaf94b
AC
3191 dev->dma_mode == XFER_MW_DMA_0 &&
3192 (dev->id[63] >> 8) & 1)
4055dee7 3193 ign_dev_err = 1;
3acaf94b 3194
4055dee7
TH
3195 /* if the device is actually configured correctly, ignore dev err */
3196 if (dev->xfer_mode == ata_xfer_mask2mode(ata_id_xfermask(dev->id)))
3197 ign_dev_err = 1;
1da177e4 3198
4055dee7
TH
3199 if (err_mask & AC_ERR_DEV) {
3200 if (!ign_dev_err)
3201 goto fail;
3202 else
3203 dev_err_whine = " (device error ignored)";
3204 }
48a8a14f 3205
23e71c3d
TH
3206 DPRINTK("xfer_shift=%u, xfer_mode=0x%x\n",
3207 dev->xfer_shift, (int)dev->xfer_mode);
1da177e4 3208
a9a79dfe
JP
3209 ata_dev_info(dev, "configured for %s%s\n",
3210 ata_mode_string(ata_xfer_mode2mask(dev->xfer_mode)),
3211 dev_err_whine);
4055dee7 3212
83206a29 3213 return 0;
4055dee7
TH
3214
3215 fail:
a9a79dfe 3216 ata_dev_err(dev, "failed to set xfermode (err_mask=0x%x)\n", err_mask);
4055dee7 3217 return -EIO;
1da177e4
LT
3218}
3219
1da177e4 3220/**
04351821 3221 * ata_do_set_mode - Program timings and issue SET FEATURES - XFER
0260731f 3222 * @link: link on which timings will be programmed
1967b7ff 3223 * @r_failed_dev: out parameter for failed device
1da177e4 3224 *
04351821
AC
3225 * Standard implementation of the function used to tune and set
3226 * ATA device disk transfer mode (PIO3, UDMA6, etc.). If
3227 * ata_dev_set_mode() fails, pointer to the failing device is
e82cbdb9 3228 * returned in @r_failed_dev.
780a87f7 3229 *
1da177e4 3230 * LOCKING:
0cba632b 3231 * PCI/etc. bus probe sem.
e82cbdb9
TH
3232 *
3233 * RETURNS:
3234 * 0 on success, negative errno otherwise
1da177e4 3235 */
04351821 3236
0260731f 3237int ata_do_set_mode(struct ata_link *link, struct ata_device **r_failed_dev)
1da177e4 3238{
0260731f 3239 struct ata_port *ap = link->ap;
e8e0619f 3240 struct ata_device *dev;
f58229f8 3241 int rc = 0, used_dma = 0, found = 0;
3adcebb2 3242
a6d5a51c 3243 /* step 1: calculate xfer_mask */
1eca4365 3244 ata_for_each_dev(dev, link, ENABLED) {
7dc951ae 3245 unsigned long pio_mask, dma_mask;
b3a70601 3246 unsigned int mode_mask;
a6d5a51c 3247
b3a70601
AC
3248 mode_mask = ATA_DMA_MASK_ATA;
3249 if (dev->class == ATA_DEV_ATAPI)
3250 mode_mask = ATA_DMA_MASK_ATAPI;
3251 else if (ata_id_is_cfa(dev->id))
3252 mode_mask = ATA_DMA_MASK_CFA;
3253
3373efd8 3254 ata_dev_xfermask(dev);
33267325 3255 ata_force_xfermask(dev);
1da177e4 3256
acf356b1 3257 pio_mask = ata_pack_xfermask(dev->pio_mask, 0, 0);
b3a70601
AC
3258
3259 if (libata_dma_mask & mode_mask)
80a9c430
SS
3260 dma_mask = ata_pack_xfermask(0, dev->mwdma_mask,
3261 dev->udma_mask);
b3a70601
AC
3262 else
3263 dma_mask = 0;
3264
acf356b1
TH
3265 dev->pio_mode = ata_xfer_mask2mode(pio_mask);
3266 dev->dma_mode = ata_xfer_mask2mode(dma_mask);
5444a6f4 3267
4f65977d 3268 found = 1;
b15b3eba 3269 if (ata_dma_enabled(dev))
5444a6f4 3270 used_dma = 1;
a6d5a51c 3271 }
4f65977d 3272 if (!found)
e82cbdb9 3273 goto out;
a6d5a51c
TH
3274
3275 /* step 2: always set host PIO timings */
1eca4365 3276 ata_for_each_dev(dev, link, ENABLED) {
70cd071e 3277 if (dev->pio_mode == 0xff) {
a9a79dfe 3278 ata_dev_warn(dev, "no PIO support\n");
e8e0619f 3279 rc = -EINVAL;
e82cbdb9 3280 goto out;
e8e0619f
TH
3281 }
3282
3283 dev->xfer_mode = dev->pio_mode;
3284 dev->xfer_shift = ATA_SHIFT_PIO;
3285 if (ap->ops->set_piomode)
3286 ap->ops->set_piomode(ap, dev);
3287 }
1da177e4 3288
a6d5a51c 3289 /* step 3: set host DMA timings */
1eca4365
TH
3290 ata_for_each_dev(dev, link, ENABLED) {
3291 if (!ata_dma_enabled(dev))
e8e0619f
TH
3292 continue;
3293
3294 dev->xfer_mode = dev->dma_mode;
3295 dev->xfer_shift = ata_xfer_mode2shift(dev->dma_mode);
3296 if (ap->ops->set_dmamode)
3297 ap->ops->set_dmamode(ap, dev);
3298 }
1da177e4
LT
3299
3300 /* step 4: update devices' xfer mode */
1eca4365 3301 ata_for_each_dev(dev, link, ENABLED) {
3373efd8 3302 rc = ata_dev_set_mode(dev);
5bbc53f4 3303 if (rc)
e82cbdb9 3304 goto out;
83206a29 3305 }
1da177e4 3306
e8e0619f
TH
3307 /* Record simplex status. If we selected DMA then the other
3308 * host channels are not permitted to do so.
5444a6f4 3309 */
cca3974e 3310 if (used_dma && (ap->host->flags & ATA_HOST_SIMPLEX))
032af1ce 3311 ap->host->simplex_claimed = ap;
5444a6f4 3312
e82cbdb9
TH
3313 out:
3314 if (rc)
3315 *r_failed_dev = dev;
3316 return rc;
1da177e4
LT
3317}
3318
aa2731ad
TH
3319/**
3320 * ata_wait_ready - wait for link to become ready
3321 * @link: link to be waited on
3322 * @deadline: deadline jiffies for the operation
3323 * @check_ready: callback to check link readiness
3324 *
3325 * Wait for @link to become ready. @check_ready should return
3326 * positive number if @link is ready, 0 if it isn't, -ENODEV if
3327 * link doesn't seem to be occupied, other errno for other error
3328 * conditions.
3329 *
3330 * Transient -ENODEV conditions are allowed for
3331 * ATA_TMOUT_FF_WAIT.
3332 *
3333 * LOCKING:
3334 * EH context.
3335 *
3336 * RETURNS:
3337 * 0 if @linke is ready before @deadline; otherwise, -errno.
3338 */
3339int ata_wait_ready(struct ata_link *link, unsigned long deadline,
3340 int (*check_ready)(struct ata_link *link))
3341{
3342 unsigned long start = jiffies;
b48d58f5 3343 unsigned long nodev_deadline;
aa2731ad
TH
3344 int warned = 0;
3345
b48d58f5
TH
3346 /* choose which 0xff timeout to use, read comment in libata.h */
3347 if (link->ap->host->flags & ATA_HOST_PARALLEL_SCAN)
3348 nodev_deadline = ata_deadline(start, ATA_TMOUT_FF_WAIT_LONG);
3349 else
3350 nodev_deadline = ata_deadline(start, ATA_TMOUT_FF_WAIT);
3351
b1c72916
TH
3352 /* Slave readiness can't be tested separately from master. On
3353 * M/S emulation configuration, this function should be called
3354 * only on the master and it will handle both master and slave.
3355 */
3356 WARN_ON(link == link->ap->slave_link);
3357
aa2731ad
TH
3358 if (time_after(nodev_deadline, deadline))
3359 nodev_deadline = deadline;
3360
3361 while (1) {
3362 unsigned long now = jiffies;
3363 int ready, tmp;
3364
3365 ready = tmp = check_ready(link);
3366 if (ready > 0)
3367 return 0;
3368
b48d58f5
TH
3369 /*
3370 * -ENODEV could be transient. Ignore -ENODEV if link
aa2731ad 3371 * is online. Also, some SATA devices take a long
b48d58f5
TH
3372 * time to clear 0xff after reset. Wait for
3373 * ATA_TMOUT_FF_WAIT[_LONG] on -ENODEV if link isn't
3374 * offline.
aa2731ad
TH
3375 *
3376 * Note that some PATA controllers (pata_ali) explode
3377 * if status register is read more than once when
3378 * there's no device attached.
3379 */
3380 if (ready == -ENODEV) {
3381 if (ata_link_online(link))
3382 ready = 0;
3383 else if ((link->ap->flags & ATA_FLAG_SATA) &&
3384 !ata_link_offline(link) &&
3385 time_before(now, nodev_deadline))
3386 ready = 0;
3387 }
3388
3389 if (ready)
3390 return ready;
3391 if (time_after(now, deadline))
3392 return -EBUSY;
3393
3394 if (!warned && time_after(now, start + 5 * HZ) &&
3395 (deadline - now > 3 * HZ)) {
a9a79dfe 3396 ata_link_warn(link,
aa2731ad
TH
3397 "link is slow to respond, please be patient "
3398 "(ready=%d)\n", tmp);
3399 warned = 1;
3400 }
3401
97750ceb 3402 ata_msleep(link->ap, 50);
aa2731ad
TH
3403 }
3404}
3405
3406/**
3407 * ata_wait_after_reset - wait for link to become ready after reset
3408 * @link: link to be waited on
3409 * @deadline: deadline jiffies for the operation
3410 * @check_ready: callback to check link readiness
3411 *
3412 * Wait for @link to become ready after reset.
3413 *
3414 * LOCKING:
3415 * EH context.
3416 *
3417 * RETURNS:
3418 * 0 if @linke is ready before @deadline; otherwise, -errno.
3419 */
2b4221bb 3420int ata_wait_after_reset(struct ata_link *link, unsigned long deadline,
aa2731ad
TH
3421 int (*check_ready)(struct ata_link *link))
3422{
97750ceb 3423 ata_msleep(link->ap, ATA_WAIT_AFTER_RESET);
aa2731ad
TH
3424
3425 return ata_wait_ready(link, deadline, check_ready);
3426}
3427
d7bb4cc7 3428/**
936fd732
TH
3429 * sata_link_debounce - debounce SATA phy status
3430 * @link: ATA link to debounce SATA phy status for
d7bb4cc7 3431 * @params: timing parameters { interval, duratinon, timeout } in msec
d4b2bab4 3432 * @deadline: deadline jiffies for the operation
d7bb4cc7 3433 *
1152b261 3434 * Make sure SStatus of @link reaches stable state, determined by
d7bb4cc7
TH
3435 * holding the same value where DET is not 1 for @duration polled
3436 * every @interval, before @timeout. Timeout constraints the
d4b2bab4
TH
3437 * beginning of the stable state. Because DET gets stuck at 1 on
3438 * some controllers after hot unplugging, this functions waits
d7bb4cc7
TH
3439 * until timeout then returns 0 if DET is stable at 1.
3440 *
d4b2bab4
TH
3441 * @timeout is further limited by @deadline. The sooner of the
3442 * two is used.
3443 *
d7bb4cc7
TH
3444 * LOCKING:
3445 * Kernel thread context (may sleep)
3446 *
3447 * RETURNS:
3448 * 0 on success, -errno on failure.
3449 */
936fd732
TH
3450int sata_link_debounce(struct ata_link *link, const unsigned long *params,
3451 unsigned long deadline)
7a7921e8 3452{
341c2c95
TH
3453 unsigned long interval = params[0];
3454 unsigned long duration = params[1];
d4b2bab4 3455 unsigned long last_jiffies, t;
d7bb4cc7
TH
3456 u32 last, cur;
3457 int rc;
3458
341c2c95 3459 t = ata_deadline(jiffies, params[2]);
d4b2bab4
TH
3460 if (time_before(t, deadline))
3461 deadline = t;
3462
936fd732 3463 if ((rc = sata_scr_read(link, SCR_STATUS, &cur)))
d7bb4cc7
TH
3464 return rc;
3465 cur &= 0xf;
3466
3467 last = cur;
3468 last_jiffies = jiffies;
3469
3470 while (1) {
97750ceb 3471 ata_msleep(link->ap, interval);
936fd732 3472 if ((rc = sata_scr_read(link, SCR_STATUS, &cur)))
d7bb4cc7
TH
3473 return rc;
3474 cur &= 0xf;
3475
3476 /* DET stable? */
3477 if (cur == last) {
d4b2bab4 3478 if (cur == 1 && time_before(jiffies, deadline))
d7bb4cc7 3479 continue;
341c2c95
TH
3480 if (time_after(jiffies,
3481 ata_deadline(last_jiffies, duration)))
d7bb4cc7
TH
3482 return 0;
3483 continue;
3484 }
3485
3486 /* unstable, start over */
3487 last = cur;
3488 last_jiffies = jiffies;
3489
f1545154
TH
3490 /* Check deadline. If debouncing failed, return
3491 * -EPIPE to tell upper layer to lower link speed.
3492 */
d4b2bab4 3493 if (time_after(jiffies, deadline))
f1545154 3494 return -EPIPE;
d7bb4cc7
TH
3495 }
3496}
3497
3498/**
936fd732
TH
3499 * sata_link_resume - resume SATA link
3500 * @link: ATA link to resume SATA
d7bb4cc7 3501 * @params: timing parameters { interval, duratinon, timeout } in msec
d4b2bab4 3502 * @deadline: deadline jiffies for the operation
d7bb4cc7 3503 *
936fd732 3504 * Resume SATA phy @link and debounce it.
d7bb4cc7
TH
3505 *
3506 * LOCKING:
3507 * Kernel thread context (may sleep)
3508 *
3509 * RETURNS:
3510 * 0 on success, -errno on failure.
3511 */
936fd732
TH
3512int sata_link_resume(struct ata_link *link, const unsigned long *params,
3513 unsigned long deadline)
d7bb4cc7 3514{
5040ab67 3515 int tries = ATA_LINK_RESUME_TRIES;
ac371987 3516 u32 scontrol, serror;
81952c54
TH
3517 int rc;
3518
936fd732 3519 if ((rc = sata_scr_read(link, SCR_CONTROL, &scontrol)))
81952c54 3520 return rc;
7a7921e8 3521
5040ab67
TH
3522 /*
3523 * Writes to SControl sometimes get ignored under certain
3524 * controllers (ata_piix SIDPR). Make sure DET actually is
3525 * cleared.
3526 */
3527 do {
3528 scontrol = (scontrol & 0x0f0) | 0x300;
3529 if ((rc = sata_scr_write(link, SCR_CONTROL, scontrol)))
3530 return rc;
3531 /*
3532 * Some PHYs react badly if SStatus is pounded
3533 * immediately after resuming. Delay 200ms before
3534 * debouncing.
3535 */
97750ceb 3536 ata_msleep(link->ap, 200);
81952c54 3537
5040ab67
TH
3538 /* is SControl restored correctly? */
3539 if ((rc = sata_scr_read(link, SCR_CONTROL, &scontrol)))
3540 return rc;
3541 } while ((scontrol & 0xf0f) != 0x300 && --tries);
7a7921e8 3542
5040ab67 3543 if ((scontrol & 0xf0f) != 0x300) {
38941c95 3544 ata_link_warn(link, "failed to resume link (SControl %X)\n",
a9a79dfe 3545 scontrol);
5040ab67
TH
3546 return 0;
3547 }
3548
3549 if (tries < ATA_LINK_RESUME_TRIES)
a9a79dfe
JP
3550 ata_link_warn(link, "link resume succeeded after %d retries\n",
3551 ATA_LINK_RESUME_TRIES - tries);
7a7921e8 3552
ac371987
TH
3553 if ((rc = sata_link_debounce(link, params, deadline)))
3554 return rc;
3555
f046519f 3556 /* clear SError, some PHYs require this even for SRST to work */
ac371987
TH
3557 if (!(rc = sata_scr_read(link, SCR_ERROR, &serror)))
3558 rc = sata_scr_write(link, SCR_ERROR, serror);
ac371987 3559
f046519f 3560 return rc != -EINVAL ? rc : 0;
7a7921e8
TH
3561}
3562
1152b261
TH
3563/**
3564 * sata_link_scr_lpm - manipulate SControl IPM and SPM fields
3565 * @link: ATA link to manipulate SControl for
3566 * @policy: LPM policy to configure
3567 * @spm_wakeup: initiate LPM transition to active state
3568 *
3569 * Manipulate the IPM field of the SControl register of @link
3570 * according to @policy. If @policy is ATA_LPM_MAX_POWER and
3571 * @spm_wakeup is %true, the SPM field is manipulated to wake up
3572 * the link. This function also clears PHYRDY_CHG before
3573 * returning.
3574 *
3575 * LOCKING:
3576 * EH context.
3577 *
3578 * RETURNS:
3579 * 0 on succes, -errno otherwise.
3580 */
3581int sata_link_scr_lpm(struct ata_link *link, enum ata_lpm_policy policy,
3582 bool spm_wakeup)
3583{
3584 struct ata_eh_context *ehc = &link->eh_context;
3585 bool woken_up = false;
3586 u32 scontrol;
3587 int rc;
3588
3589 rc = sata_scr_read(link, SCR_CONTROL, &scontrol);
3590 if (rc)
3591 return rc;
3592
3593 switch (policy) {
3594 case ATA_LPM_MAX_POWER:
3595 /* disable all LPM transitions */
3596 scontrol |= (0x3 << 8);
3597 /* initiate transition to active state */
3598 if (spm_wakeup) {
3599 scontrol |= (0x4 << 12);
3600 woken_up = true;
3601 }
3602 break;
3603 case ATA_LPM_MED_POWER:
3604 /* allow LPM to PARTIAL */
3605 scontrol &= ~(0x1 << 8);
3606 scontrol |= (0x2 << 8);
3607 break;
3608 case ATA_LPM_MIN_POWER:
8a745f1f
KCA
3609 if (ata_link_nr_enabled(link) > 0)
3610 /* no restrictions on LPM transitions */
3611 scontrol &= ~(0x3 << 8);
3612 else {
3613 /* empty port, power off */
3614 scontrol &= ~0xf;
3615 scontrol |= (0x1 << 2);
3616 }
1152b261
TH
3617 break;
3618 default:
3619 WARN_ON(1);
3620 }
3621
3622 rc = sata_scr_write(link, SCR_CONTROL, scontrol);
3623 if (rc)
3624 return rc;
3625
3626 /* give the link time to transit out of LPM state */
3627 if (woken_up)
3628 msleep(10);
3629
3630 /* clear PHYRDY_CHG from SError */
3631 ehc->i.serror &= ~SERR_PHYRDY_CHG;
3632 return sata_scr_write(link, SCR_ERROR, SERR_PHYRDY_CHG);
3633}
3634
f5914a46 3635/**
0aa1113d 3636 * ata_std_prereset - prepare for reset
cc0680a5 3637 * @link: ATA link to be reset
d4b2bab4 3638 * @deadline: deadline jiffies for the operation
f5914a46 3639 *
cc0680a5 3640 * @link is about to be reset. Initialize it. Failure from
b8cffc6a
TH
3641 * prereset makes libata abort whole reset sequence and give up
3642 * that port, so prereset should be best-effort. It does its
3643 * best to prepare for reset sequence but if things go wrong, it
3644 * should just whine, not fail.
f5914a46
TH
3645 *
3646 * LOCKING:
3647 * Kernel thread context (may sleep)
3648 *
3649 * RETURNS:
3650 * 0 on success, -errno otherwise.
3651 */
0aa1113d 3652int ata_std_prereset(struct ata_link *link, unsigned long deadline)
f5914a46 3653{
cc0680a5 3654 struct ata_port *ap = link->ap;
936fd732 3655 struct ata_eh_context *ehc = &link->eh_context;
e9c83914 3656 const unsigned long *timing = sata_ehc_deb_timing(ehc);
f5914a46
TH
3657 int rc;
3658
f5914a46
TH
3659 /* if we're about to do hardreset, nothing more to do */
3660 if (ehc->i.action & ATA_EH_HARDRESET)
3661 return 0;
3662
936fd732 3663 /* if SATA, resume link */
a16abc0b 3664 if (ap->flags & ATA_FLAG_SATA) {
936fd732 3665 rc = sata_link_resume(link, timing, deadline);
b8cffc6a
TH
3666 /* whine about phy resume failure but proceed */
3667 if (rc && rc != -EOPNOTSUPP)
a9a79dfe
JP
3668 ata_link_warn(link,
3669 "failed to resume link for reset (errno=%d)\n",
3670 rc);
f5914a46
TH
3671 }
3672
45db2f6c 3673 /* no point in trying softreset on offline link */
b1c72916 3674 if (ata_phys_link_offline(link))
45db2f6c
TH
3675 ehc->i.action &= ~ATA_EH_SOFTRESET;
3676
f5914a46
TH
3677 return 0;
3678}
3679
c2bd5804 3680/**
624d5c51
TH
3681 * sata_link_hardreset - reset link via SATA phy reset
3682 * @link: link to reset
3683 * @timing: timing parameters { interval, duratinon, timeout } in msec
d4b2bab4 3684 * @deadline: deadline jiffies for the operation
9dadd45b
TH
3685 * @online: optional out parameter indicating link onlineness
3686 * @check_ready: optional callback to check link readiness
c2bd5804 3687 *
624d5c51 3688 * SATA phy-reset @link using DET bits of SControl register.
9dadd45b
TH
3689 * After hardreset, link readiness is waited upon using
3690 * ata_wait_ready() if @check_ready is specified. LLDs are
3691 * allowed to not specify @check_ready and wait itself after this
3692 * function returns. Device classification is LLD's
3693 * responsibility.
3694 *
3695 * *@online is set to one iff reset succeeded and @link is online
3696 * after reset.
c2bd5804
TH
3697 *
3698 * LOCKING:
3699 * Kernel thread context (may sleep)
3700 *
3701 * RETURNS:
3702 * 0 on success, -errno otherwise.
3703 */
624d5c51 3704int sata_link_hardreset(struct ata_link *link, const unsigned long *timing,
9dadd45b
TH
3705 unsigned long deadline,
3706 bool *online, int (*check_ready)(struct ata_link *))
c2bd5804 3707{
624d5c51 3708 u32 scontrol;
81952c54 3709 int rc;
852ee16a 3710
c2bd5804
TH
3711 DPRINTK("ENTER\n");
3712
9dadd45b
TH
3713 if (online)
3714 *online = false;
3715
936fd732 3716 if (sata_set_spd_needed(link)) {
1c3fae4d
TH
3717 /* SATA spec says nothing about how to reconfigure
3718 * spd. To be on the safe side, turn off phy during
3719 * reconfiguration. This works for at least ICH7 AHCI
3720 * and Sil3124.
3721 */
936fd732 3722 if ((rc = sata_scr_read(link, SCR_CONTROL, &scontrol)))
b6103f6d 3723 goto out;
81952c54 3724
a34b6fc0 3725 scontrol = (scontrol & 0x0f0) | 0x304;
81952c54 3726
936fd732 3727 if ((rc = sata_scr_write(link, SCR_CONTROL, scontrol)))
b6103f6d 3728 goto out;
1c3fae4d 3729
936fd732 3730 sata_set_spd(link);
1c3fae4d
TH
3731 }
3732
3733 /* issue phy wake/reset */
936fd732 3734 if ((rc = sata_scr_read(link, SCR_CONTROL, &scontrol)))
b6103f6d 3735 goto out;
81952c54 3736
852ee16a 3737 scontrol = (scontrol & 0x0f0) | 0x301;
81952c54 3738
936fd732 3739 if ((rc = sata_scr_write_flush(link, SCR_CONTROL, scontrol)))
b6103f6d 3740 goto out;
c2bd5804 3741
1c3fae4d 3742 /* Couldn't find anything in SATA I/II specs, but AHCI-1.1
c2bd5804
TH
3743 * 10.4.2 says at least 1 ms.
3744 */
97750ceb 3745 ata_msleep(link->ap, 1);
c2bd5804 3746
936fd732
TH
3747 /* bring link back */
3748 rc = sata_link_resume(link, timing, deadline);
9dadd45b
TH
3749 if (rc)
3750 goto out;
3751 /* if link is offline nothing more to do */
b1c72916 3752 if (ata_phys_link_offline(link))
9dadd45b
TH
3753 goto out;
3754
3755 /* Link is online. From this point, -ENODEV too is an error. */
3756 if (online)
3757 *online = true;
3758
071f44b1 3759 if (sata_pmp_supported(link->ap) && ata_is_host_link(link)) {
9dadd45b
TH
3760 /* If PMP is supported, we have to do follow-up SRST.
3761 * Some PMPs don't send D2H Reg FIS after hardreset if
3762 * the first port is empty. Wait only for
3763 * ATA_TMOUT_PMP_SRST_WAIT.
3764 */
3765 if (check_ready) {
3766 unsigned long pmp_deadline;
3767
341c2c95
TH
3768 pmp_deadline = ata_deadline(jiffies,
3769 ATA_TMOUT_PMP_SRST_WAIT);
9dadd45b
TH
3770 if (time_after(pmp_deadline, deadline))
3771 pmp_deadline = deadline;
3772 ata_wait_ready(link, pmp_deadline, check_ready);
3773 }
3774 rc = -EAGAIN;
3775 goto out;
3776 }
3777
3778 rc = 0;
3779 if (check_ready)
3780 rc = ata_wait_ready(link, deadline, check_ready);
b6103f6d 3781 out:
0cbf0711
TH
3782 if (rc && rc != -EAGAIN) {
3783 /* online is set iff link is online && reset succeeded */
3784 if (online)
3785 *online = false;
a9a79dfe 3786 ata_link_err(link, "COMRESET failed (errno=%d)\n", rc);
0cbf0711 3787 }
b6103f6d
TH
3788 DPRINTK("EXIT, rc=%d\n", rc);
3789 return rc;
3790}
3791
57c9efdf
TH
3792/**
3793 * sata_std_hardreset - COMRESET w/o waiting or classification
3794 * @link: link to reset
3795 * @class: resulting class of attached device
3796 * @deadline: deadline jiffies for the operation
3797 *
3798 * Standard SATA COMRESET w/o waiting or classification.
3799 *
3800 * LOCKING:
3801 * Kernel thread context (may sleep)
3802 *
3803 * RETURNS:
3804 * 0 if link offline, -EAGAIN if link online, -errno on errors.
3805 */
3806int sata_std_hardreset(struct ata_link *link, unsigned int *class,
3807 unsigned long deadline)
3808{
3809 const unsigned long *timing = sata_ehc_deb_timing(&link->eh_context);
3810 bool online;
3811 int rc;
3812
3813 /* do hardreset */
3814 rc = sata_link_hardreset(link, timing, deadline, &online, NULL);
57c9efdf
TH
3815 return online ? -EAGAIN : rc;
3816}
3817
c2bd5804 3818/**
203c75b8 3819 * ata_std_postreset - standard postreset callback
cc0680a5 3820 * @link: the target ata_link
c2bd5804
TH
3821 * @classes: classes of attached devices
3822 *
3823 * This function is invoked after a successful reset. Note that
3824 * the device might have been reset more than once using
3825 * different reset methods before postreset is invoked.
c2bd5804 3826 *
c2bd5804
TH
3827 * LOCKING:
3828 * Kernel thread context (may sleep)
3829 */
203c75b8 3830void ata_std_postreset(struct ata_link *link, unsigned int *classes)
c2bd5804 3831{
f046519f
TH
3832 u32 serror;
3833
c2bd5804
TH
3834 DPRINTK("ENTER\n");
3835
f046519f
TH
3836 /* reset complete, clear SError */
3837 if (!sata_scr_read(link, SCR_ERROR, &serror))
3838 sata_scr_write(link, SCR_ERROR, serror);
3839
c2bd5804 3840 /* print link status */
936fd732 3841 sata_print_link_status(link);
c2bd5804 3842
c2bd5804
TH
3843 DPRINTK("EXIT\n");
3844}
3845
623a3128
TH
3846/**
3847 * ata_dev_same_device - Determine whether new ID matches configured device
623a3128
TH
3848 * @dev: device to compare against
3849 * @new_class: class of the new device
3850 * @new_id: IDENTIFY page of the new device
3851 *
3852 * Compare @new_class and @new_id against @dev and determine
3853 * whether @dev is the device indicated by @new_class and
3854 * @new_id.
3855 *
3856 * LOCKING:
3857 * None.
3858 *
3859 * RETURNS:
3860 * 1 if @dev matches @new_class and @new_id, 0 otherwise.
3861 */
3373efd8
TH
3862static int ata_dev_same_device(struct ata_device *dev, unsigned int new_class,
3863 const u16 *new_id)
623a3128
TH
3864{
3865 const u16 *old_id = dev->id;
a0cf733b
TH
3866 unsigned char model[2][ATA_ID_PROD_LEN + 1];
3867 unsigned char serial[2][ATA_ID_SERNO_LEN + 1];
623a3128
TH
3868
3869 if (dev->class != new_class) {
a9a79dfe
JP
3870 ata_dev_info(dev, "class mismatch %d != %d\n",
3871 dev->class, new_class);
623a3128
TH
3872 return 0;
3873 }
3874
a0cf733b
TH
3875 ata_id_c_string(old_id, model[0], ATA_ID_PROD, sizeof(model[0]));
3876 ata_id_c_string(new_id, model[1], ATA_ID_PROD, sizeof(model[1]));
3877 ata_id_c_string(old_id, serial[0], ATA_ID_SERNO, sizeof(serial[0]));
3878 ata_id_c_string(new_id, serial[1], ATA_ID_SERNO, sizeof(serial[1]));
623a3128
TH
3879
3880 if (strcmp(model[0], model[1])) {
a9a79dfe
JP
3881 ata_dev_info(dev, "model number mismatch '%s' != '%s'\n",
3882 model[0], model[1]);
623a3128
TH
3883 return 0;
3884 }
3885
3886 if (strcmp(serial[0], serial[1])) {
a9a79dfe
JP
3887 ata_dev_info(dev, "serial number mismatch '%s' != '%s'\n",
3888 serial[0], serial[1]);
623a3128
TH
3889 return 0;
3890 }
3891
623a3128
TH
3892 return 1;
3893}
3894
3895/**
fe30911b 3896 * ata_dev_reread_id - Re-read IDENTIFY data
3fae450c 3897 * @dev: target ATA device
bff04647 3898 * @readid_flags: read ID flags
623a3128
TH
3899 *
3900 * Re-read IDENTIFY page and make sure @dev is still attached to
3901 * the port.
3902 *
3903 * LOCKING:
3904 * Kernel thread context (may sleep)
3905 *
3906 * RETURNS:
3907 * 0 on success, negative errno otherwise
3908 */
fe30911b 3909int ata_dev_reread_id(struct ata_device *dev, unsigned int readid_flags)
623a3128 3910{
5eb45c02 3911 unsigned int class = dev->class;
9af5c9c9 3912 u16 *id = (void *)dev->link->ap->sector_buf;
623a3128
TH
3913 int rc;
3914
fe635c7e 3915 /* read ID data */
bff04647 3916 rc = ata_dev_read_id(dev, &class, readid_flags, id);
623a3128 3917 if (rc)
fe30911b 3918 return rc;
623a3128
TH
3919
3920 /* is the device still there? */
fe30911b
TH
3921 if (!ata_dev_same_device(dev, class, id))
3922 return -ENODEV;
623a3128 3923
fe635c7e 3924 memcpy(dev->id, id, sizeof(id[0]) * ATA_ID_WORDS);
fe30911b
TH
3925 return 0;
3926}
3927
3928/**
3929 * ata_dev_revalidate - Revalidate ATA device
3930 * @dev: device to revalidate
422c9daa 3931 * @new_class: new class code
fe30911b
TH
3932 * @readid_flags: read ID flags
3933 *
3934 * Re-read IDENTIFY page, make sure @dev is still attached to the
3935 * port and reconfigure it according to the new IDENTIFY page.
3936 *
3937 * LOCKING:
3938 * Kernel thread context (may sleep)
3939 *
3940 * RETURNS:
3941 * 0 on success, negative errno otherwise
3942 */
422c9daa
TH
3943int ata_dev_revalidate(struct ata_device *dev, unsigned int new_class,
3944 unsigned int readid_flags)
fe30911b 3945{
6ddcd3b0 3946 u64 n_sectors = dev->n_sectors;
5920dadf 3947 u64 n_native_sectors = dev->n_native_sectors;
fe30911b
TH
3948 int rc;
3949
3950 if (!ata_dev_enabled(dev))
3951 return -ENODEV;
3952
422c9daa
TH
3953 /* fail early if !ATA && !ATAPI to avoid issuing [P]IDENTIFY to PMP */
3954 if (ata_class_enabled(new_class) &&
f0d0613d
BP
3955 new_class != ATA_DEV_ATA &&
3956 new_class != ATA_DEV_ATAPI &&
3957 new_class != ATA_DEV_SEMB) {
a9a79dfe
JP
3958 ata_dev_info(dev, "class mismatch %u != %u\n",
3959 dev->class, new_class);
422c9daa
TH
3960 rc = -ENODEV;
3961 goto fail;
3962 }
3963
fe30911b
TH
3964 /* re-read ID */
3965 rc = ata_dev_reread_id(dev, readid_flags);
3966 if (rc)
3967 goto fail;
623a3128
TH
3968
3969 /* configure device according to the new ID */
efdaedc4 3970 rc = ata_dev_configure(dev);
6ddcd3b0
TH
3971 if (rc)
3972 goto fail;
3973
3974 /* verify n_sectors hasn't changed */
445d211b
TH
3975 if (dev->class != ATA_DEV_ATA || !n_sectors ||
3976 dev->n_sectors == n_sectors)
3977 return 0;
3978
3979 /* n_sectors has changed */
a9a79dfe
JP
3980 ata_dev_warn(dev, "n_sectors mismatch %llu != %llu\n",
3981 (unsigned long long)n_sectors,
3982 (unsigned long long)dev->n_sectors);
445d211b
TH
3983
3984 /*
3985 * Something could have caused HPA to be unlocked
3986 * involuntarily. If n_native_sectors hasn't changed and the
3987 * new size matches it, keep the device.
3988 */
3989 if (dev->n_native_sectors == n_native_sectors &&
3990 dev->n_sectors > n_sectors && dev->n_sectors == n_native_sectors) {
a9a79dfe
JP
3991 ata_dev_warn(dev,
3992 "new n_sectors matches native, probably "
3993 "late HPA unlock, n_sectors updated\n");
68939ce5 3994 /* use the larger n_sectors */
445d211b 3995 return 0;
6ddcd3b0
TH
3996 }
3997
445d211b
TH
3998 /*
3999 * Some BIOSes boot w/o HPA but resume w/ HPA locked. Try
4000 * unlocking HPA in those cases.
4001 *
4002 * https://bugzilla.kernel.org/show_bug.cgi?id=15396
4003 */
4004 if (dev->n_native_sectors == n_native_sectors &&
4005 dev->n_sectors < n_sectors && n_sectors == n_native_sectors &&
4006 !(dev->horkage & ATA_HORKAGE_BROKEN_HPA)) {
a9a79dfe
JP
4007 ata_dev_warn(dev,
4008 "old n_sectors matches native, probably "
4009 "late HPA lock, will try to unlock HPA\n");
445d211b
TH
4010 /* try unlocking HPA */
4011 dev->flags |= ATA_DFLAG_UNLOCK_HPA;
4012 rc = -EIO;
4013 } else
4014 rc = -ENODEV;
623a3128 4015
445d211b
TH
4016 /* restore original n_[native_]sectors and fail */
4017 dev->n_native_sectors = n_native_sectors;
4018 dev->n_sectors = n_sectors;
623a3128 4019 fail:
a9a79dfe 4020 ata_dev_err(dev, "revalidation failed (errno=%d)\n", rc);
623a3128
TH
4021 return rc;
4022}
4023
6919a0a6
AC
4024struct ata_blacklist_entry {
4025 const char *model_num;
4026 const char *model_rev;
4027 unsigned long horkage;
4028};
4029
4030static const struct ata_blacklist_entry ata_device_blacklist [] = {
4031 /* Devices with DMA related problems under Linux */
4032 { "WDC AC11000H", NULL, ATA_HORKAGE_NODMA },
4033 { "WDC AC22100H", NULL, ATA_HORKAGE_NODMA },
4034 { "WDC AC32500H", NULL, ATA_HORKAGE_NODMA },
4035 { "WDC AC33100H", NULL, ATA_HORKAGE_NODMA },
4036 { "WDC AC31600H", NULL, ATA_HORKAGE_NODMA },
4037 { "WDC AC32100H", "24.09P07", ATA_HORKAGE_NODMA },
4038 { "WDC AC23200L", "21.10N21", ATA_HORKAGE_NODMA },
4039 { "Compaq CRD-8241B", NULL, ATA_HORKAGE_NODMA },
4040 { "CRD-8400B", NULL, ATA_HORKAGE_NODMA },
7da4c935 4041 { "CRD-848[02]B", NULL, ATA_HORKAGE_NODMA },
6919a0a6
AC
4042 { "CRD-84", NULL, ATA_HORKAGE_NODMA },
4043 { "SanDisk SDP3B", NULL, ATA_HORKAGE_NODMA },
4044 { "SanDisk SDP3B-64", NULL, ATA_HORKAGE_NODMA },
4045 { "SANYO CD-ROM CRD", NULL, ATA_HORKAGE_NODMA },
4046 { "HITACHI CDR-8", NULL, ATA_HORKAGE_NODMA },
7da4c935 4047 { "HITACHI CDR-8[34]35",NULL, ATA_HORKAGE_NODMA },
6919a0a6
AC
4048 { "Toshiba CD-ROM XM-6202B", NULL, ATA_HORKAGE_NODMA },
4049 { "TOSHIBA CD-ROM XM-1702BC", NULL, ATA_HORKAGE_NODMA },
4050 { "CD-532E-A", NULL, ATA_HORKAGE_NODMA },
4051 { "E-IDE CD-ROM CR-840",NULL, ATA_HORKAGE_NODMA },
4052 { "CD-ROM Drive/F5A", NULL, ATA_HORKAGE_NODMA },
4053 { "WPI CDD-820", NULL, ATA_HORKAGE_NODMA },
4054 { "SAMSUNG CD-ROM SC-148C", NULL, ATA_HORKAGE_NODMA },
4055 { "SAMSUNG CD-ROM SC", NULL, ATA_HORKAGE_NODMA },
6919a0a6
AC
4056 { "ATAPI CD-ROM DRIVE 40X MAXIMUM",NULL,ATA_HORKAGE_NODMA },
4057 { "_NEC DV5800A", NULL, ATA_HORKAGE_NODMA },
2dcb407e 4058 { "SAMSUNG CD-ROM SN-124", "N001", ATA_HORKAGE_NODMA },
39f19886 4059 { "Seagate STT20000A", NULL, ATA_HORKAGE_NODMA },
d70e551c 4060 { "2GB ATA Flash Disk", "ADMA428M", ATA_HORKAGE_NODMA },
3af9a77a 4061 /* Odd clown on sil3726/4726 PMPs */
50af2fa1 4062 { "Config Disk", NULL, ATA_HORKAGE_DISABLE },
6919a0a6 4063
18d6e9d5 4064 /* Weird ATAPI devices */
40a1d531 4065 { "TORiSAN DVD-ROM DRD-N216", NULL, ATA_HORKAGE_MAX_SEC_128 },
6a87e42e 4066 { "QUANTUM DAT DAT72-000", NULL, ATA_HORKAGE_ATAPI_MOD16_DMA },
18d6e9d5 4067
6919a0a6
AC
4068 /* Devices we expect to fail diagnostics */
4069
4070 /* Devices where NCQ should be avoided */
4071 /* NCQ is slow */
2dcb407e 4072 { "WDC WD740ADFD-00", NULL, ATA_HORKAGE_NONCQ },
459ad688 4073 { "WDC WD740ADFD-00NLR1", NULL, ATA_HORKAGE_NONCQ, },
09125ea6
TH
4074 /* http://thread.gmane.org/gmane.linux.ide/14907 */
4075 { "FUJITSU MHT2060BH", NULL, ATA_HORKAGE_NONCQ },
7acfaf30 4076 /* NCQ is broken */
539cc7c7 4077 { "Maxtor *", "BANC*", ATA_HORKAGE_NONCQ },
0e3dbc01 4078 { "Maxtor 7V300F0", "VA111630", ATA_HORKAGE_NONCQ },
da6f0ec2 4079 { "ST380817AS", "3.42", ATA_HORKAGE_NONCQ },
e41bd3e8 4080 { "ST3160023AS", "3.42", ATA_HORKAGE_NONCQ },
5ccfca97 4081 { "OCZ CORE_SSD", "02.10104", ATA_HORKAGE_NONCQ },
539cc7c7 4082
ac70a964 4083 /* Seagate NCQ + FLUSH CACHE firmware bug */
4d1f9082 4084 { "ST31500341AS", "SD1[5-9]", ATA_HORKAGE_NONCQ |
ac70a964 4085 ATA_HORKAGE_FIRMWARE_WARN },
d10d491f 4086
4d1f9082 4087 { "ST31000333AS", "SD1[5-9]", ATA_HORKAGE_NONCQ |
d10d491f
TH
4088 ATA_HORKAGE_FIRMWARE_WARN },
4089
4d1f9082 4090 { "ST3640[36]23AS", "SD1[5-9]", ATA_HORKAGE_NONCQ |
d10d491f
TH
4091 ATA_HORKAGE_FIRMWARE_WARN },
4092
4d1f9082 4093 { "ST3320[68]13AS", "SD1[5-9]", ATA_HORKAGE_NONCQ |
ac70a964
TH
4094 ATA_HORKAGE_FIRMWARE_WARN },
4095
36e337d0
RH
4096 /* Blacklist entries taken from Silicon Image 3124/3132
4097 Windows driver .inf file - also several Linux problem reports */
4098 { "HTS541060G9SA00", "MB3OC60D", ATA_HORKAGE_NONCQ, },
4099 { "HTS541080G9SA00", "MB4OC60D", ATA_HORKAGE_NONCQ, },
4100 { "HTS541010G9SA00", "MBZOC60D", ATA_HORKAGE_NONCQ, },
6919a0a6 4101
68b0ddb2
TH
4102 /* https://bugzilla.kernel.org/show_bug.cgi?id=15573 */
4103 { "C300-CTFDDAC128MAG", "0001", ATA_HORKAGE_NONCQ, },
4104
16c55b03
TH
4105 /* devices which puke on READ_NATIVE_MAX */
4106 { "HDS724040KLSA80", "KFAOA20N", ATA_HORKAGE_BROKEN_HPA, },
4107 { "WDC WD3200JD-00KLB0", "WD-WCAMR1130137", ATA_HORKAGE_BROKEN_HPA },
4108 { "WDC WD2500JD-00HBB0", "WD-WMAL71490727", ATA_HORKAGE_BROKEN_HPA },
4109 { "MAXTOR 6L080L4", "A93.0500", ATA_HORKAGE_BROKEN_HPA },
6919a0a6 4110
7831387b
TH
4111 /* this one allows HPA unlocking but fails IOs on the area */
4112 { "OCZ-VERTEX", "1.30", ATA_HORKAGE_BROKEN_HPA },
4113
93328e11
AC
4114 /* Devices which report 1 sector over size HPA */
4115 { "ST340823A", NULL, ATA_HORKAGE_HPA_SIZE, },
4116 { "ST320413A", NULL, ATA_HORKAGE_HPA_SIZE, },
b152fcd3 4117 { "ST310211A", NULL, ATA_HORKAGE_HPA_SIZE, },
93328e11 4118
6bbfd53d
AC
4119 /* Devices which get the IVB wrong */
4120 { "QUANTUM FIREBALLlct10 05", "A03.0900", ATA_HORKAGE_IVB, },
a79067e5 4121 /* Maybe we should just blacklist TSSTcorp... */
7da4c935 4122 { "TSSTcorp CDDVDW SH-S202[HJN]", "SB0[01]", ATA_HORKAGE_IVB, },
6bbfd53d 4123
9ce8e307
JA
4124 /* Devices that do not need bridging limits applied */
4125 { "MTRON MSP-SATA*", NULL, ATA_HORKAGE_BRIDGE_OK, },
4126
9062712f
TH
4127 /* Devices which aren't very happy with higher link speeds */
4128 { "WD My Book", NULL, ATA_HORKAGE_1_5_GBPS, },
4129
d0cb43b3
TH
4130 /*
4131 * Devices which choke on SETXFER. Applies only if both the
4132 * device and controller are SATA.
4133 */
cd691876 4134 { "PIONEER DVD-RW DVRTD08", NULL, ATA_HORKAGE_NOSETXFER },
3a25179e
VL
4135 { "PIONEER DVD-RW DVRTD08A", NULL, ATA_HORKAGE_NOSETXFER },
4136 { "PIONEER DVD-RW DVR-215", NULL, ATA_HORKAGE_NOSETXFER },
cd691876
TH
4137 { "PIONEER DVD-RW DVR-212D", NULL, ATA_HORKAGE_NOSETXFER },
4138 { "PIONEER DVD-RW DVR-216D", NULL, ATA_HORKAGE_NOSETXFER },
d0cb43b3 4139
6919a0a6
AC
4140 /* End Marker */
4141 { }
1da177e4 4142};
2e9edbf8 4143
bce036ce
ML
4144/**
4145 * glob_match - match a text string against a glob-style pattern
4146 * @text: the string to be examined
4147 * @pattern: the glob-style pattern to be matched against
4148 *
4149 * Either/both of text and pattern can be empty strings.
4150 *
4151 * Match text against a glob-style pattern, with wildcards and simple sets:
4152 *
4153 * ? matches any single character.
4154 * * matches any run of characters.
4155 * [xyz] matches a single character from the set: x, y, or z.
2f9e4d16
ML
4156 * [a-d] matches a single character from the range: a, b, c, or d.
4157 * [a-d0-9] matches a single character from either range.
bce036ce 4158 *
2f9e4d16
ML
4159 * The special characters ?, [, -, or *, can be matched using a set, eg. [*]
4160 * Behaviour with malformed patterns is undefined, though generally reasonable.
bce036ce 4161 *
3d2be54b 4162 * Sample patterns: "SD1?", "SD1[0-5]", "*R0", "SD*1?[012]*xx"
bce036ce
ML
4163 *
4164 * This function uses one level of recursion per '*' in pattern.
4165 * Since it calls _nothing_ else, and has _no_ explicit local variables,
4166 * this will not cause stack problems for any reasonable use here.
4167 *
4168 * RETURNS:
4169 * 0 on match, 1 otherwise.
4170 */
4171static int glob_match (const char *text, const char *pattern)
539cc7c7 4172{
bce036ce
ML
4173 do {
4174 /* Match single character or a '?' wildcard */
4175 if (*text == *pattern || *pattern == '?') {
4176 if (!*pattern++)
4177 return 0; /* End of both strings: match */
4178 } else {
4179 /* Match single char against a '[' bracketed ']' pattern set */
4180 if (!*text || *pattern != '[')
4181 break; /* Not a pattern set */
2f9e4d16
ML
4182 while (*++pattern && *pattern != ']' && *text != *pattern) {
4183 if (*pattern == '-' && *(pattern - 1) != '[')
4184 if (*text > *(pattern - 1) && *text < *(pattern + 1)) {
4185 ++pattern;
4186 break;
4187 }
4188 }
bce036ce
ML
4189 if (!*pattern || *pattern == ']')
4190 return 1; /* No match */
4191 while (*pattern && *pattern++ != ']');
4192 }
4193 } while (*++text && *pattern);
4194
4195 /* Match any run of chars against a '*' wildcard */
4196 if (*pattern == '*') {
4197 if (!*++pattern)
4198 return 0; /* Match: avoid recursion at end of pattern */
4199 /* Loop to handle additional pattern chars after the wildcard */
4200 while (*text) {
4201 if (glob_match(text, pattern) == 0)
4202 return 0; /* Remainder matched */
4203 ++text; /* Absorb (match) this char and try again */
317b50b8
AP
4204 }
4205 }
bce036ce
ML
4206 if (!*text && !*pattern)
4207 return 0; /* End of both strings: match */
4208 return 1; /* No match */
539cc7c7 4209}
4fca377f 4210
75683fe7 4211static unsigned long ata_dev_blacklisted(const struct ata_device *dev)
1da177e4 4212{
8bfa79fc
TH
4213 unsigned char model_num[ATA_ID_PROD_LEN + 1];
4214 unsigned char model_rev[ATA_ID_FW_REV_LEN + 1];
6919a0a6 4215 const struct ata_blacklist_entry *ad = ata_device_blacklist;
3a778275 4216
8bfa79fc
TH
4217 ata_id_c_string(dev->id, model_num, ATA_ID_PROD, sizeof(model_num));
4218 ata_id_c_string(dev->id, model_rev, ATA_ID_FW_REV, sizeof(model_rev));
1da177e4 4219
6919a0a6 4220 while (ad->model_num) {
bce036ce 4221 if (!glob_match(model_num, ad->model_num)) {
6919a0a6
AC
4222 if (ad->model_rev == NULL)
4223 return ad->horkage;
bce036ce 4224 if (!glob_match(model_rev, ad->model_rev))
6919a0a6 4225 return ad->horkage;
f4b15fef 4226 }
6919a0a6 4227 ad++;
f4b15fef 4228 }
1da177e4
LT
4229 return 0;
4230}
4231
6919a0a6
AC
4232static int ata_dma_blacklisted(const struct ata_device *dev)
4233{
4234 /* We don't support polling DMA.
4235 * DMA blacklist those ATAPI devices with CDB-intr (and use PIO)
4236 * if the LLDD handles only interrupts in the HSM_ST_LAST state.
4237 */
9af5c9c9 4238 if ((dev->link->ap->flags & ATA_FLAG_PIO_POLLING) &&
6919a0a6
AC
4239 (dev->flags & ATA_DFLAG_CDB_INTR))
4240 return 1;
75683fe7 4241 return (dev->horkage & ATA_HORKAGE_NODMA) ? 1 : 0;
6919a0a6
AC
4242}
4243
6bbfd53d
AC
4244/**
4245 * ata_is_40wire - check drive side detection
4246 * @dev: device
4247 *
4248 * Perform drive side detection decoding, allowing for device vendors
4249 * who can't follow the documentation.
4250 */
4251
4252static int ata_is_40wire(struct ata_device *dev)
4253{
4254 if (dev->horkage & ATA_HORKAGE_IVB)
4255 return ata_drive_40wire_relaxed(dev->id);
4256 return ata_drive_40wire(dev->id);
4257}
4258
15a5551c
AC
4259/**
4260 * cable_is_40wire - 40/80/SATA decider
4261 * @ap: port to consider
4262 *
4263 * This function encapsulates the policy for speed management
4264 * in one place. At the moment we don't cache the result but
4265 * there is a good case for setting ap->cbl to the result when
4266 * we are called with unknown cables (and figuring out if it
4267 * impacts hotplug at all).
4268 *
4269 * Return 1 if the cable appears to be 40 wire.
4270 */
4271
4272static int cable_is_40wire(struct ata_port *ap)
4273{
4274 struct ata_link *link;
4275 struct ata_device *dev;
4276
4a9c7b33 4277 /* If the controller thinks we are 40 wire, we are. */
15a5551c
AC
4278 if (ap->cbl == ATA_CBL_PATA40)
4279 return 1;
4a9c7b33
TH
4280
4281 /* If the controller thinks we are 80 wire, we are. */
15a5551c
AC
4282 if (ap->cbl == ATA_CBL_PATA80 || ap->cbl == ATA_CBL_SATA)
4283 return 0;
4a9c7b33
TH
4284
4285 /* If the system is known to be 40 wire short cable (eg
4286 * laptop), then we allow 80 wire modes even if the drive
4287 * isn't sure.
4288 */
f792068e
AC
4289 if (ap->cbl == ATA_CBL_PATA40_SHORT)
4290 return 0;
4a9c7b33
TH
4291
4292 /* If the controller doesn't know, we scan.
4293 *
4294 * Note: We look for all 40 wire detects at this point. Any
4295 * 80 wire detect is taken to be 80 wire cable because
4296 * - in many setups only the one drive (slave if present) will
4297 * give a valid detect
4298 * - if you have a non detect capable drive you don't want it
4299 * to colour the choice
4300 */
1eca4365
TH
4301 ata_for_each_link(link, ap, EDGE) {
4302 ata_for_each_dev(dev, link, ENABLED) {
4303 if (!ata_is_40wire(dev))
15a5551c
AC
4304 return 0;
4305 }
4306 }
4307 return 1;
4308}
4309
a6d5a51c
TH
4310/**
4311 * ata_dev_xfermask - Compute supported xfermask of the given device
a6d5a51c
TH
4312 * @dev: Device to compute xfermask for
4313 *
acf356b1
TH
4314 * Compute supported xfermask of @dev and store it in
4315 * dev->*_mask. This function is responsible for applying all
4316 * known limits including host controller limits, device
4317 * blacklist, etc...
a6d5a51c
TH
4318 *
4319 * LOCKING:
4320 * None.
a6d5a51c 4321 */
3373efd8 4322static void ata_dev_xfermask(struct ata_device *dev)
1da177e4 4323{
9af5c9c9
TH
4324 struct ata_link *link = dev->link;
4325 struct ata_port *ap = link->ap;
cca3974e 4326 struct ata_host *host = ap->host;
a6d5a51c 4327 unsigned long xfer_mask;
1da177e4 4328
37deecb5 4329 /* controller modes available */
565083e1
TH
4330 xfer_mask = ata_pack_xfermask(ap->pio_mask,
4331 ap->mwdma_mask, ap->udma_mask);
4332
8343f889 4333 /* drive modes available */
37deecb5
TH
4334 xfer_mask &= ata_pack_xfermask(dev->pio_mask,
4335 dev->mwdma_mask, dev->udma_mask);
4336 xfer_mask &= ata_id_xfermask(dev->id);
565083e1 4337
b352e57d
AC
4338 /*
4339 * CFA Advanced TrueIDE timings are not allowed on a shared
4340 * cable
4341 */
4342 if (ata_dev_pair(dev)) {
4343 /* No PIO5 or PIO6 */
4344 xfer_mask &= ~(0x03 << (ATA_SHIFT_PIO + 5));
4345 /* No MWDMA3 or MWDMA 4 */
4346 xfer_mask &= ~(0x03 << (ATA_SHIFT_MWDMA + 3));
4347 }
4348
37deecb5
TH
4349 if (ata_dma_blacklisted(dev)) {
4350 xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA);
a9a79dfe
JP
4351 ata_dev_warn(dev,
4352 "device is on DMA blacklist, disabling DMA\n");
37deecb5 4353 }
a6d5a51c 4354
14d66ab7 4355 if ((host->flags & ATA_HOST_SIMPLEX) &&
2dcb407e 4356 host->simplex_claimed && host->simplex_claimed != ap) {
37deecb5 4357 xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA);
a9a79dfe
JP
4358 ata_dev_warn(dev,
4359 "simplex DMA is claimed by other device, disabling DMA\n");
5444a6f4 4360 }
565083e1 4361
e424675f
JG
4362 if (ap->flags & ATA_FLAG_NO_IORDY)
4363 xfer_mask &= ata_pio_mask_no_iordy(dev);
4364
5444a6f4 4365 if (ap->ops->mode_filter)
a76b62ca 4366 xfer_mask = ap->ops->mode_filter(dev, xfer_mask);
5444a6f4 4367
8343f889
RH
4368 /* Apply cable rule here. Don't apply it early because when
4369 * we handle hot plug the cable type can itself change.
4370 * Check this last so that we know if the transfer rate was
4371 * solely limited by the cable.
4372 * Unknown or 80 wire cables reported host side are checked
4373 * drive side as well. Cases where we know a 40wire cable
4374 * is used safely for 80 are not checked here.
4375 */
4376 if (xfer_mask & (0xF8 << ATA_SHIFT_UDMA))
4377 /* UDMA/44 or higher would be available */
15a5551c 4378 if (cable_is_40wire(ap)) {
a9a79dfe
JP
4379 ata_dev_warn(dev,
4380 "limited to UDMA/33 due to 40-wire cable\n");
8343f889
RH
4381 xfer_mask &= ~(0xF8 << ATA_SHIFT_UDMA);
4382 }
4383
565083e1
TH
4384 ata_unpack_xfermask(xfer_mask, &dev->pio_mask,
4385 &dev->mwdma_mask, &dev->udma_mask);
1da177e4
LT
4386}
4387
1da177e4
LT
4388/**
4389 * ata_dev_set_xfermode - Issue SET FEATURES - XFER MODE command
1da177e4
LT
4390 * @dev: Device to which command will be sent
4391 *
780a87f7
JG
4392 * Issue SET FEATURES - XFER MODE command to device @dev
4393 * on port @ap.
4394 *
1da177e4 4395 * LOCKING:
0cba632b 4396 * PCI/etc. bus probe sem.
83206a29
TH
4397 *
4398 * RETURNS:
4399 * 0 on success, AC_ERR_* mask otherwise.
1da177e4
LT
4400 */
4401
3373efd8 4402static unsigned int ata_dev_set_xfermode(struct ata_device *dev)
1da177e4 4403{
a0123703 4404 struct ata_taskfile tf;
83206a29 4405 unsigned int err_mask;
1da177e4
LT
4406
4407 /* set up set-features taskfile */
4408 DPRINTK("set features - xfer mode\n");
4409
464cf177
TH
4410 /* Some controllers and ATAPI devices show flaky interrupt
4411 * behavior after setting xfer mode. Use polling instead.
4412 */
3373efd8 4413 ata_tf_init(dev, &tf);
a0123703
TH
4414 tf.command = ATA_CMD_SET_FEATURES;
4415 tf.feature = SETFEATURES_XFER;
464cf177 4416 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE | ATA_TFLAG_POLLING;
a0123703 4417 tf.protocol = ATA_PROT_NODATA;
b9f8ab2d 4418 /* If we are using IORDY we must send the mode setting command */
11b7becc
JG
4419 if (ata_pio_need_iordy(dev))
4420 tf.nsect = dev->xfer_mode;
b9f8ab2d
AC
4421 /* If the device has IORDY and the controller does not - turn it off */
4422 else if (ata_id_has_iordy(dev->id))
11b7becc 4423 tf.nsect = 0x01;
b9f8ab2d
AC
4424 else /* In the ancient relic department - skip all of this */
4425 return 0;
1da177e4 4426
2b789108 4427 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0, 0);
9f45cbd3
KCA
4428
4429 DPRINTK("EXIT, err_mask=%x\n", err_mask);
4430 return err_mask;
4431}
1152b261 4432
9f45cbd3 4433/**
218f3d30 4434 * ata_dev_set_feature - Issue SET FEATURES - SATA FEATURES
9f45cbd3
KCA
4435 * @dev: Device to which command will be sent
4436 * @enable: Whether to enable or disable the feature
218f3d30 4437 * @feature: The sector count represents the feature to set
9f45cbd3
KCA
4438 *
4439 * Issue SET FEATURES - SATA FEATURES command to device @dev
218f3d30 4440 * on port @ap with sector count
9f45cbd3
KCA
4441 *
4442 * LOCKING:
4443 * PCI/etc. bus probe sem.
4444 *
4445 * RETURNS:
4446 * 0 on success, AC_ERR_* mask otherwise.
4447 */
1152b261 4448unsigned int ata_dev_set_feature(struct ata_device *dev, u8 enable, u8 feature)
9f45cbd3
KCA
4449{
4450 struct ata_taskfile tf;
4451 unsigned int err_mask;
4452
4453 /* set up set-features taskfile */
4454 DPRINTK("set features - SATA features\n");
4455
4456 ata_tf_init(dev, &tf);
4457 tf.command = ATA_CMD_SET_FEATURES;
4458 tf.feature = enable;
4459 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
4460 tf.protocol = ATA_PROT_NODATA;
218f3d30 4461 tf.nsect = feature;
9f45cbd3 4462
2b789108 4463 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0, 0);
1da177e4 4464
83206a29
TH
4465 DPRINTK("EXIT, err_mask=%x\n", err_mask);
4466 return err_mask;
1da177e4
LT
4467}
4468
8bf62ece
AL
4469/**
4470 * ata_dev_init_params - Issue INIT DEV PARAMS command
8bf62ece 4471 * @dev: Device to which command will be sent
e2a7f77a
RD
4472 * @heads: Number of heads (taskfile parameter)
4473 * @sectors: Number of sectors (taskfile parameter)
8bf62ece
AL
4474 *
4475 * LOCKING:
6aff8f1f
TH
4476 * Kernel thread context (may sleep)
4477 *
4478 * RETURNS:
4479 * 0 on success, AC_ERR_* mask otherwise.
8bf62ece 4480 */
3373efd8
TH
4481static unsigned int ata_dev_init_params(struct ata_device *dev,
4482 u16 heads, u16 sectors)
8bf62ece 4483{
a0123703 4484 struct ata_taskfile tf;
6aff8f1f 4485 unsigned int err_mask;
8bf62ece
AL
4486
4487 /* Number of sectors per track 1-255. Number of heads 1-16 */
4488 if (sectors < 1 || sectors > 255 || heads < 1 || heads > 16)
00b6f5e9 4489 return AC_ERR_INVALID;
8bf62ece
AL
4490
4491 /* set up init dev params taskfile */
4492 DPRINTK("init dev params \n");
4493
3373efd8 4494 ata_tf_init(dev, &tf);
a0123703
TH
4495 tf.command = ATA_CMD_INIT_DEV_PARAMS;
4496 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
4497 tf.protocol = ATA_PROT_NODATA;
4498 tf.nsect = sectors;
4499 tf.device |= (heads - 1) & 0x0f; /* max head = num. of heads - 1 */
8bf62ece 4500
2b789108 4501 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0, 0);
18b2466c
AC
4502 /* A clean abort indicates an original or just out of spec drive
4503 and we should continue as we issue the setup based on the
4504 drive reported working geometry */
4505 if (err_mask == AC_ERR_DEV && (tf.feature & ATA_ABORTED))
4506 err_mask = 0;
8bf62ece 4507
6aff8f1f
TH
4508 DPRINTK("EXIT, err_mask=%x\n", err_mask);
4509 return err_mask;
8bf62ece
AL
4510}
4511
1da177e4 4512/**
0cba632b
JG
4513 * ata_sg_clean - Unmap DMA memory associated with command
4514 * @qc: Command containing DMA memory to be released
4515 *
4516 * Unmap all mapped DMA memory associated with this command.
1da177e4
LT
4517 *
4518 * LOCKING:
cca3974e 4519 * spin_lock_irqsave(host lock)
1da177e4 4520 */
70e6ad0c 4521void ata_sg_clean(struct ata_queued_cmd *qc)
1da177e4
LT
4522{
4523 struct ata_port *ap = qc->ap;
ff2aeb1e 4524 struct scatterlist *sg = qc->sg;
1da177e4
LT
4525 int dir = qc->dma_dir;
4526
efcb3cf7 4527 WARN_ON_ONCE(sg == NULL);
1da177e4 4528
dde20207 4529 VPRINTK("unmapping %u sg elements\n", qc->n_elem);
1da177e4 4530
dde20207 4531 if (qc->n_elem)
5825627c 4532 dma_unmap_sg(ap->dev, sg, qc->orig_n_elem, dir);
1da177e4
LT
4533
4534 qc->flags &= ~ATA_QCFLAG_DMAMAP;
ff2aeb1e 4535 qc->sg = NULL;
1da177e4
LT
4536}
4537
1da177e4 4538/**
5895ef9a 4539 * atapi_check_dma - Check whether ATAPI DMA can be supported
1da177e4
LT
4540 * @qc: Metadata associated with taskfile to check
4541 *
780a87f7
JG
4542 * Allow low-level driver to filter ATA PACKET commands, returning
4543 * a status indicating whether or not it is OK to use DMA for the
4544 * supplied PACKET command.
4545 *
1da177e4 4546 * LOCKING:
624d5c51
TH
4547 * spin_lock_irqsave(host lock)
4548 *
4549 * RETURNS: 0 when ATAPI DMA can be used
4550 * nonzero otherwise
4551 */
5895ef9a 4552int atapi_check_dma(struct ata_queued_cmd *qc)
624d5c51
TH
4553{
4554 struct ata_port *ap = qc->ap;
71601958 4555
624d5c51
TH
4556 /* Don't allow DMA if it isn't multiple of 16 bytes. Quite a
4557 * few ATAPI devices choke on such DMA requests.
4558 */
6a87e42e
TH
4559 if (!(qc->dev->horkage & ATA_HORKAGE_ATAPI_MOD16_DMA) &&
4560 unlikely(qc->nbytes & 15))
624d5c51 4561 return 1;
e2cec771 4562
624d5c51
TH
4563 if (ap->ops->check_atapi_dma)
4564 return ap->ops->check_atapi_dma(qc);
e2cec771 4565
624d5c51
TH
4566 return 0;
4567}
1da177e4 4568
624d5c51
TH
4569/**
4570 * ata_std_qc_defer - Check whether a qc needs to be deferred
4571 * @qc: ATA command in question
4572 *
4573 * Non-NCQ commands cannot run with any other command, NCQ or
4574 * not. As upper layer only knows the queue depth, we are
4575 * responsible for maintaining exclusion. This function checks
4576 * whether a new command @qc can be issued.
4577 *
4578 * LOCKING:
4579 * spin_lock_irqsave(host lock)
4580 *
4581 * RETURNS:
4582 * ATA_DEFER_* if deferring is needed, 0 otherwise.
4583 */
4584int ata_std_qc_defer(struct ata_queued_cmd *qc)
4585{
4586 struct ata_link *link = qc->dev->link;
e2cec771 4587
624d5c51
TH
4588 if (qc->tf.protocol == ATA_PROT_NCQ) {
4589 if (!ata_tag_valid(link->active_tag))
4590 return 0;
4591 } else {
4592 if (!ata_tag_valid(link->active_tag) && !link->sactive)
4593 return 0;
4594 }
e2cec771 4595
624d5c51
TH
4596 return ATA_DEFER_LINK;
4597}
6912ccd5 4598
624d5c51 4599void ata_noop_qc_prep(struct ata_queued_cmd *qc) { }
1da177e4 4600
624d5c51
TH
4601/**
4602 * ata_sg_init - Associate command with scatter-gather table.
4603 * @qc: Command to be associated
4604 * @sg: Scatter-gather table.
4605 * @n_elem: Number of elements in s/g table.
4606 *
4607 * Initialize the data-related elements of queued_cmd @qc
4608 * to point to a scatter-gather table @sg, containing @n_elem
4609 * elements.
4610 *
4611 * LOCKING:
4612 * spin_lock_irqsave(host lock)
4613 */
4614void ata_sg_init(struct ata_queued_cmd *qc, struct scatterlist *sg,
4615 unsigned int n_elem)
4616{
4617 qc->sg = sg;
4618 qc->n_elem = n_elem;
4619 qc->cursg = qc->sg;
4620}
bb5cb290 4621
624d5c51
TH
4622/**
4623 * ata_sg_setup - DMA-map the scatter-gather table associated with a command.
4624 * @qc: Command with scatter-gather table to be mapped.
4625 *
4626 * DMA-map the scatter-gather table associated with queued_cmd @qc.
4627 *
4628 * LOCKING:
4629 * spin_lock_irqsave(host lock)
4630 *
4631 * RETURNS:
4632 * Zero on success, negative on error.
4633 *
4634 */
4635static int ata_sg_setup(struct ata_queued_cmd *qc)
4636{
4637 struct ata_port *ap = qc->ap;
4638 unsigned int n_elem;
1da177e4 4639
624d5c51 4640 VPRINTK("ENTER, ata%u\n", ap->print_id);
e2cec771 4641
624d5c51
TH
4642 n_elem = dma_map_sg(ap->dev, qc->sg, qc->n_elem, qc->dma_dir);
4643 if (n_elem < 1)
4644 return -1;
bb5cb290 4645
624d5c51 4646 DPRINTK("%d sg elements mapped\n", n_elem);
5825627c 4647 qc->orig_n_elem = qc->n_elem;
624d5c51
TH
4648 qc->n_elem = n_elem;
4649 qc->flags |= ATA_QCFLAG_DMAMAP;
1da177e4 4650
624d5c51 4651 return 0;
1da177e4
LT
4652}
4653
624d5c51
TH
4654/**
4655 * swap_buf_le16 - swap halves of 16-bit words in place
4656 * @buf: Buffer to swap
4657 * @buf_words: Number of 16-bit words in buffer.
4658 *
4659 * Swap halves of 16-bit words if needed to convert from
4660 * little-endian byte order to native cpu byte order, or
4661 * vice-versa.
4662 *
4663 * LOCKING:
4664 * Inherited from caller.
4665 */
4666void swap_buf_le16(u16 *buf, unsigned int buf_words)
8061f5f0 4667{
624d5c51
TH
4668#ifdef __BIG_ENDIAN
4669 unsigned int i;
8061f5f0 4670
624d5c51
TH
4671 for (i = 0; i < buf_words; i++)
4672 buf[i] = le16_to_cpu(buf[i]);
4673#endif /* __BIG_ENDIAN */
8061f5f0
TH
4674}
4675
8a8bc223
TH
4676/**
4677 * ata_qc_new - Request an available ATA command, for queueing
5eb66fe0 4678 * @ap: target port
8a8bc223
TH
4679 *
4680 * LOCKING:
4681 * None.
4682 */
4683
4684static struct ata_queued_cmd *ata_qc_new(struct ata_port *ap)
4685{
4686 struct ata_queued_cmd *qc = NULL;
4687 unsigned int i;
4688
4689 /* no command while frozen */
4690 if (unlikely(ap->pflags & ATA_PFLAG_FROZEN))
4691 return NULL;
4692
4693 /* the last tag is reserved for internal command. */
4694 for (i = 0; i < ATA_MAX_QUEUE - 1; i++)
4695 if (!test_and_set_bit(i, &ap->qc_allocated)) {
4696 qc = __ata_qc_from_tag(ap, i);
4697 break;
4698 }
4699
4700 if (qc)
4701 qc->tag = i;
4702
4703 return qc;
4704}
4705
1da177e4
LT
4706/**
4707 * ata_qc_new_init - Request an available ATA command, and initialize it
1da177e4
LT
4708 * @dev: Device from whom we request an available command structure
4709 *
4710 * LOCKING:
0cba632b 4711 * None.
1da177e4
LT
4712 */
4713
8a8bc223 4714struct ata_queued_cmd *ata_qc_new_init(struct ata_device *dev)
1da177e4 4715{
9af5c9c9 4716 struct ata_port *ap = dev->link->ap;
1da177e4
LT
4717 struct ata_queued_cmd *qc;
4718
8a8bc223 4719 qc = ata_qc_new(ap);
1da177e4 4720 if (qc) {
1da177e4
LT
4721 qc->scsicmd = NULL;
4722 qc->ap = ap;
4723 qc->dev = dev;
1da177e4 4724
2c13b7ce 4725 ata_qc_reinit(qc);
1da177e4
LT
4726 }
4727
4728 return qc;
4729}
4730
8a8bc223
TH
4731/**
4732 * ata_qc_free - free unused ata_queued_cmd
4733 * @qc: Command to complete
4734 *
4735 * Designed to free unused ata_queued_cmd object
4736 * in case something prevents using it.
4737 *
4738 * LOCKING:
4739 * spin_lock_irqsave(host lock)
4740 */
4741void ata_qc_free(struct ata_queued_cmd *qc)
4742{
a1104016 4743 struct ata_port *ap;
8a8bc223
TH
4744 unsigned int tag;
4745
efcb3cf7 4746 WARN_ON_ONCE(qc == NULL); /* ata_qc_from_tag _might_ return NULL */
a1104016 4747 ap = qc->ap;
8a8bc223
TH
4748
4749 qc->flags = 0;
4750 tag = qc->tag;
4751 if (likely(ata_tag_valid(tag))) {
4752 qc->tag = ATA_TAG_POISON;
4753 clear_bit(tag, &ap->qc_allocated);
4754 }
4755}
4756
76014427 4757void __ata_qc_complete(struct ata_queued_cmd *qc)
1da177e4 4758{
a1104016
JL
4759 struct ata_port *ap;
4760 struct ata_link *link;
dedaf2b0 4761
efcb3cf7
TH
4762 WARN_ON_ONCE(qc == NULL); /* ata_qc_from_tag _might_ return NULL */
4763 WARN_ON_ONCE(!(qc->flags & ATA_QCFLAG_ACTIVE));
a1104016
JL
4764 ap = qc->ap;
4765 link = qc->dev->link;
1da177e4
LT
4766
4767 if (likely(qc->flags & ATA_QCFLAG_DMAMAP))
4768 ata_sg_clean(qc);
4769
7401abf2 4770 /* command should be marked inactive atomically with qc completion */
da917d69 4771 if (qc->tf.protocol == ATA_PROT_NCQ) {
9af5c9c9 4772 link->sactive &= ~(1 << qc->tag);
da917d69
TH
4773 if (!link->sactive)
4774 ap->nr_active_links--;
4775 } else {
9af5c9c9 4776 link->active_tag = ATA_TAG_POISON;
da917d69
TH
4777 ap->nr_active_links--;
4778 }
4779
4780 /* clear exclusive status */
4781 if (unlikely(qc->flags & ATA_QCFLAG_CLEAR_EXCL &&
4782 ap->excl_link == link))
4783 ap->excl_link = NULL;
7401abf2 4784
3f3791d3
AL
4785 /* atapi: mark qc as inactive to prevent the interrupt handler
4786 * from completing the command twice later, before the error handler
4787 * is called. (when rc != 0 and atapi request sense is needed)
4788 */
4789 qc->flags &= ~ATA_QCFLAG_ACTIVE;
dedaf2b0 4790 ap->qc_active &= ~(1 << qc->tag);
3f3791d3 4791
1da177e4 4792 /* call completion callback */
77853bf2 4793 qc->complete_fn(qc);
1da177e4
LT
4794}
4795
39599a53
TH
4796static void fill_result_tf(struct ata_queued_cmd *qc)
4797{
4798 struct ata_port *ap = qc->ap;
4799
39599a53 4800 qc->result_tf.flags = qc->tf.flags;
22183bf5 4801 ap->ops->qc_fill_rtf(qc);
39599a53
TH
4802}
4803
00115e0f
TH
4804static void ata_verify_xfer(struct ata_queued_cmd *qc)
4805{
4806 struct ata_device *dev = qc->dev;
4807
00115e0f
TH
4808 if (ata_is_nodata(qc->tf.protocol))
4809 return;
4810
4811 if ((dev->mwdma_mask || dev->udma_mask) && ata_is_pio(qc->tf.protocol))
4812 return;
4813
4814 dev->flags &= ~ATA_DFLAG_DUBIOUS_XFER;
4815}
4816
f686bcb8
TH
4817/**
4818 * ata_qc_complete - Complete an active ATA command
4819 * @qc: Command to complete
f686bcb8 4820 *
1aadf5c3
TH
4821 * Indicate to the mid and upper layers that an ATA command has
4822 * completed, with either an ok or not-ok status.
4823 *
4824 * Refrain from calling this function multiple times when
4825 * successfully completing multiple NCQ commands.
4826 * ata_qc_complete_multiple() should be used instead, which will
4827 * properly update IRQ expect state.
f686bcb8
TH
4828 *
4829 * LOCKING:
cca3974e 4830 * spin_lock_irqsave(host lock)
f686bcb8
TH
4831 */
4832void ata_qc_complete(struct ata_queued_cmd *qc)
4833{
4834 struct ata_port *ap = qc->ap;
4835
4836 /* XXX: New EH and old EH use different mechanisms to
4837 * synchronize EH with regular execution path.
4838 *
4839 * In new EH, a failed qc is marked with ATA_QCFLAG_FAILED.
4840 * Normal execution path is responsible for not accessing a
4841 * failed qc. libata core enforces the rule by returning NULL
4842 * from ata_qc_from_tag() for failed qcs.
4843 *
4844 * Old EH depends on ata_qc_complete() nullifying completion
4845 * requests if ATA_QCFLAG_EH_SCHEDULED is set. Old EH does
4846 * not synchronize with interrupt handler. Only PIO task is
4847 * taken care of.
4848 */
4849 if (ap->ops->error_handler) {
4dbfa39b
TH
4850 struct ata_device *dev = qc->dev;
4851 struct ata_eh_info *ehi = &dev->link->eh_info;
4852
f686bcb8
TH
4853 if (unlikely(qc->err_mask))
4854 qc->flags |= ATA_QCFLAG_FAILED;
4855
f08dc1ac
TH
4856 /*
4857 * Finish internal commands without any further processing
4858 * and always with the result TF filled.
4859 */
4860 if (unlikely(ata_tag_internal(qc->tag))) {
f4b31db9 4861 fill_result_tf(qc);
f08dc1ac
TH
4862 __ata_qc_complete(qc);
4863 return;
4864 }
f4b31db9 4865
f08dc1ac
TH
4866 /*
4867 * Non-internal qc has failed. Fill the result TF and
4868 * summon EH.
4869 */
4870 if (unlikely(qc->flags & ATA_QCFLAG_FAILED)) {
4871 fill_result_tf(qc);
4872 ata_qc_schedule_eh(qc);
f4b31db9 4873 return;
f686bcb8
TH
4874 }
4875
4dc738ed
TH
4876 WARN_ON_ONCE(ap->pflags & ATA_PFLAG_FROZEN);
4877
f686bcb8
TH
4878 /* read result TF if requested */
4879 if (qc->flags & ATA_QCFLAG_RESULT_TF)
39599a53 4880 fill_result_tf(qc);
f686bcb8 4881
4dbfa39b
TH
4882 /* Some commands need post-processing after successful
4883 * completion.
4884 */
4885 switch (qc->tf.command) {
4886 case ATA_CMD_SET_FEATURES:
4887 if (qc->tf.feature != SETFEATURES_WC_ON &&
4888 qc->tf.feature != SETFEATURES_WC_OFF)
4889 break;
4890 /* fall through */
4891 case ATA_CMD_INIT_DEV_PARAMS: /* CHS translation changed */
4892 case ATA_CMD_SET_MULTI: /* multi_count changed */
4893 /* revalidate device */
4894 ehi->dev_action[dev->devno] |= ATA_EH_REVALIDATE;
4895 ata_port_schedule_eh(ap);
4896 break;
054a5fba
TH
4897
4898 case ATA_CMD_SLEEP:
4899 dev->flags |= ATA_DFLAG_SLEEPING;
4900 break;
4dbfa39b
TH
4901 }
4902
00115e0f
TH
4903 if (unlikely(dev->flags & ATA_DFLAG_DUBIOUS_XFER))
4904 ata_verify_xfer(qc);
4905
f686bcb8
TH
4906 __ata_qc_complete(qc);
4907 } else {
4908 if (qc->flags & ATA_QCFLAG_EH_SCHEDULED)
4909 return;
4910
4911 /* read result TF if failed or requested */
4912 if (qc->err_mask || qc->flags & ATA_QCFLAG_RESULT_TF)
39599a53 4913 fill_result_tf(qc);
f686bcb8
TH
4914
4915 __ata_qc_complete(qc);
4916 }
4917}
4918
dedaf2b0
TH
4919/**
4920 * ata_qc_complete_multiple - Complete multiple qcs successfully
4921 * @ap: port in question
4922 * @qc_active: new qc_active mask
dedaf2b0
TH
4923 *
4924 * Complete in-flight commands. This functions is meant to be
4925 * called from low-level driver's interrupt routine to complete
4926 * requests normally. ap->qc_active and @qc_active is compared
4927 * and commands are completed accordingly.
4928 *
1aadf5c3
TH
4929 * Always use this function when completing multiple NCQ commands
4930 * from IRQ handlers instead of calling ata_qc_complete()
4931 * multiple times to keep IRQ expect status properly in sync.
4932 *
dedaf2b0 4933 * LOCKING:
cca3974e 4934 * spin_lock_irqsave(host lock)
dedaf2b0
TH
4935 *
4936 * RETURNS:
4937 * Number of completed commands on success, -errno otherwise.
4938 */
79f97dad 4939int ata_qc_complete_multiple(struct ata_port *ap, u32 qc_active)
dedaf2b0
TH
4940{
4941 int nr_done = 0;
4942 u32 done_mask;
dedaf2b0
TH
4943
4944 done_mask = ap->qc_active ^ qc_active;
4945
4946 if (unlikely(done_mask & qc_active)) {
a9a79dfe
JP
4947 ata_port_err(ap, "illegal qc_active transition (%08x->%08x)\n",
4948 ap->qc_active, qc_active);
dedaf2b0
TH
4949 return -EINVAL;
4950 }
4951
43768180 4952 while (done_mask) {
dedaf2b0 4953 struct ata_queued_cmd *qc;
43768180 4954 unsigned int tag = __ffs(done_mask);
dedaf2b0 4955
43768180
JA
4956 qc = ata_qc_from_tag(ap, tag);
4957 if (qc) {
dedaf2b0
TH
4958 ata_qc_complete(qc);
4959 nr_done++;
4960 }
43768180 4961 done_mask &= ~(1 << tag);
dedaf2b0
TH
4962 }
4963
4964 return nr_done;
4965}
4966
1da177e4
LT
4967/**
4968 * ata_qc_issue - issue taskfile to device
4969 * @qc: command to issue to device
4970 *
4971 * Prepare an ATA command to submission to device.
4972 * This includes mapping the data into a DMA-able
4973 * area, filling in the S/G table, and finally
4974 * writing the taskfile to hardware, starting the command.
4975 *
4976 * LOCKING:
cca3974e 4977 * spin_lock_irqsave(host lock)
1da177e4 4978 */
8e0e694a 4979void ata_qc_issue(struct ata_queued_cmd *qc)
1da177e4
LT
4980{
4981 struct ata_port *ap = qc->ap;
9af5c9c9 4982 struct ata_link *link = qc->dev->link;
405e66b3 4983 u8 prot = qc->tf.protocol;
1da177e4 4984
dedaf2b0
TH
4985 /* Make sure only one non-NCQ command is outstanding. The
4986 * check is skipped for old EH because it reuses active qc to
4987 * request ATAPI sense.
4988 */
efcb3cf7 4989 WARN_ON_ONCE(ap->ops->error_handler && ata_tag_valid(link->active_tag));
dedaf2b0 4990
1973a023 4991 if (ata_is_ncq(prot)) {
efcb3cf7 4992 WARN_ON_ONCE(link->sactive & (1 << qc->tag));
da917d69
TH
4993
4994 if (!link->sactive)
4995 ap->nr_active_links++;
9af5c9c9 4996 link->sactive |= 1 << qc->tag;
dedaf2b0 4997 } else {
efcb3cf7 4998 WARN_ON_ONCE(link->sactive);
da917d69
TH
4999
5000 ap->nr_active_links++;
9af5c9c9 5001 link->active_tag = qc->tag;
dedaf2b0
TH
5002 }
5003
e4a70e76 5004 qc->flags |= ATA_QCFLAG_ACTIVE;
dedaf2b0 5005 ap->qc_active |= 1 << qc->tag;
e4a70e76 5006
60f5d6ef
TH
5007 /*
5008 * We guarantee to LLDs that they will have at least one
f92a2636
TH
5009 * non-zero sg if the command is a data command.
5010 */
60f5d6ef
TH
5011 if (WARN_ON_ONCE(ata_is_data(prot) &&
5012 (!qc->sg || !qc->n_elem || !qc->nbytes)))
5013 goto sys_err;
f92a2636 5014
405e66b3 5015 if (ata_is_dma(prot) || (ata_is_pio(prot) &&
f92a2636 5016 (ap->flags & ATA_FLAG_PIO_DMA)))
001102d7 5017 if (ata_sg_setup(qc))
60f5d6ef 5018 goto sys_err;
1da177e4 5019
cf480626 5020 /* if device is sleeping, schedule reset and abort the link */
054a5fba 5021 if (unlikely(qc->dev->flags & ATA_DFLAG_SLEEPING)) {
cf480626 5022 link->eh_info.action |= ATA_EH_RESET;
054a5fba
TH
5023 ata_ehi_push_desc(&link->eh_info, "waking up from sleep");
5024 ata_link_abort(link);
5025 return;
5026 }
5027
1da177e4
LT
5028 ap->ops->qc_prep(qc);
5029
8e0e694a
TH
5030 qc->err_mask |= ap->ops->qc_issue(qc);
5031 if (unlikely(qc->err_mask))
5032 goto err;
5033 return;
1da177e4 5034
60f5d6ef 5035sys_err:
8e0e694a
TH
5036 qc->err_mask |= AC_ERR_SYSTEM;
5037err:
5038 ata_qc_complete(qc);
1da177e4
LT
5039}
5040
34bf2170
TH
5041/**
5042 * sata_scr_valid - test whether SCRs are accessible
936fd732 5043 * @link: ATA link to test SCR accessibility for
34bf2170 5044 *
936fd732 5045 * Test whether SCRs are accessible for @link.
34bf2170
TH
5046 *
5047 * LOCKING:
5048 * None.
5049 *
5050 * RETURNS:
5051 * 1 if SCRs are accessible, 0 otherwise.
5052 */
936fd732 5053int sata_scr_valid(struct ata_link *link)
34bf2170 5054{
936fd732
TH
5055 struct ata_port *ap = link->ap;
5056
a16abc0b 5057 return (ap->flags & ATA_FLAG_SATA) && ap->ops->scr_read;
34bf2170
TH
5058}
5059
5060/**
5061 * sata_scr_read - read SCR register of the specified port
936fd732 5062 * @link: ATA link to read SCR for
34bf2170
TH
5063 * @reg: SCR to read
5064 * @val: Place to store read value
5065 *
936fd732 5066 * Read SCR register @reg of @link into *@val. This function is
633273a3
TH
5067 * guaranteed to succeed if @link is ap->link, the cable type of
5068 * the port is SATA and the port implements ->scr_read.
34bf2170
TH
5069 *
5070 * LOCKING:
633273a3 5071 * None if @link is ap->link. Kernel thread context otherwise.
34bf2170
TH
5072 *
5073 * RETURNS:
5074 * 0 on success, negative errno on failure.
5075 */
936fd732 5076int sata_scr_read(struct ata_link *link, int reg, u32 *val)
34bf2170 5077{
633273a3 5078 if (ata_is_host_link(link)) {
633273a3 5079 if (sata_scr_valid(link))
82ef04fb 5080 return link->ap->ops->scr_read(link, reg, val);
633273a3
TH
5081 return -EOPNOTSUPP;
5082 }
5083
5084 return sata_pmp_scr_read(link, reg, val);
34bf2170
TH
5085}
5086
5087/**
5088 * sata_scr_write - write SCR register of the specified port
936fd732 5089 * @link: ATA link to write SCR for
34bf2170
TH
5090 * @reg: SCR to write
5091 * @val: value to write
5092 *
936fd732 5093 * Write @val to SCR register @reg of @link. This function is
633273a3
TH
5094 * guaranteed to succeed if @link is ap->link, the cable type of
5095 * the port is SATA and the port implements ->scr_read.
34bf2170
TH
5096 *
5097 * LOCKING:
633273a3 5098 * None if @link is ap->link. Kernel thread context otherwise.
34bf2170
TH
5099 *
5100 * RETURNS:
5101 * 0 on success, negative errno on failure.
5102 */
936fd732 5103int sata_scr_write(struct ata_link *link, int reg, u32 val)
34bf2170 5104{
633273a3 5105 if (ata_is_host_link(link)) {
633273a3 5106 if (sata_scr_valid(link))
82ef04fb 5107 return link->ap->ops->scr_write(link, reg, val);
633273a3
TH
5108 return -EOPNOTSUPP;
5109 }
936fd732 5110
633273a3 5111 return sata_pmp_scr_write(link, reg, val);
34bf2170
TH
5112}
5113
5114/**
5115 * sata_scr_write_flush - write SCR register of the specified port and flush
936fd732 5116 * @link: ATA link to write SCR for
34bf2170
TH
5117 * @reg: SCR to write
5118 * @val: value to write
5119 *
5120 * This function is identical to sata_scr_write() except that this
5121 * function performs flush after writing to the register.
5122 *
5123 * LOCKING:
633273a3 5124 * None if @link is ap->link. Kernel thread context otherwise.
34bf2170
TH
5125 *
5126 * RETURNS:
5127 * 0 on success, negative errno on failure.
5128 */
936fd732 5129int sata_scr_write_flush(struct ata_link *link, int reg, u32 val)
34bf2170 5130{
633273a3 5131 if (ata_is_host_link(link)) {
633273a3 5132 int rc;
da3dbb17 5133
633273a3 5134 if (sata_scr_valid(link)) {
82ef04fb 5135 rc = link->ap->ops->scr_write(link, reg, val);
633273a3 5136 if (rc == 0)
82ef04fb 5137 rc = link->ap->ops->scr_read(link, reg, &val);
633273a3
TH
5138 return rc;
5139 }
5140 return -EOPNOTSUPP;
34bf2170 5141 }
633273a3
TH
5142
5143 return sata_pmp_scr_write(link, reg, val);
34bf2170
TH
5144}
5145
5146/**
b1c72916 5147 * ata_phys_link_online - test whether the given link is online
936fd732 5148 * @link: ATA link to test
34bf2170 5149 *
936fd732
TH
5150 * Test whether @link is online. Note that this function returns
5151 * 0 if online status of @link cannot be obtained, so
5152 * ata_link_online(link) != !ata_link_offline(link).
34bf2170
TH
5153 *
5154 * LOCKING:
5155 * None.
5156 *
5157 * RETURNS:
b5b3fa38 5158 * True if the port online status is available and online.
34bf2170 5159 */
b1c72916 5160bool ata_phys_link_online(struct ata_link *link)
34bf2170
TH
5161{
5162 u32 sstatus;
5163
936fd732 5164 if (sata_scr_read(link, SCR_STATUS, &sstatus) == 0 &&
9913ff8a 5165 ata_sstatus_online(sstatus))
b5b3fa38
TH
5166 return true;
5167 return false;
34bf2170
TH
5168}
5169
5170/**
b1c72916 5171 * ata_phys_link_offline - test whether the given link is offline
936fd732 5172 * @link: ATA link to test
34bf2170 5173 *
936fd732
TH
5174 * Test whether @link is offline. Note that this function
5175 * returns 0 if offline status of @link cannot be obtained, so
5176 * ata_link_online(link) != !ata_link_offline(link).
34bf2170
TH
5177 *
5178 * LOCKING:
5179 * None.
5180 *
5181 * RETURNS:
b5b3fa38 5182 * True if the port offline status is available and offline.
34bf2170 5183 */
b1c72916 5184bool ata_phys_link_offline(struct ata_link *link)
34bf2170
TH
5185{
5186 u32 sstatus;
5187
936fd732 5188 if (sata_scr_read(link, SCR_STATUS, &sstatus) == 0 &&
9913ff8a 5189 !ata_sstatus_online(sstatus))
b5b3fa38
TH
5190 return true;
5191 return false;
34bf2170 5192}
0baab86b 5193
b1c72916
TH
5194/**
5195 * ata_link_online - test whether the given link is online
5196 * @link: ATA link to test
5197 *
5198 * Test whether @link is online. This is identical to
5199 * ata_phys_link_online() when there's no slave link. When
5200 * there's a slave link, this function should only be called on
5201 * the master link and will return true if any of M/S links is
5202 * online.
5203 *
5204 * LOCKING:
5205 * None.
5206 *
5207 * RETURNS:
5208 * True if the port online status is available and online.
5209 */
5210bool ata_link_online(struct ata_link *link)
5211{
5212 struct ata_link *slave = link->ap->slave_link;
5213
5214 WARN_ON(link == slave); /* shouldn't be called on slave link */
5215
5216 return ata_phys_link_online(link) ||
5217 (slave && ata_phys_link_online(slave));
5218}
5219
5220/**
5221 * ata_link_offline - test whether the given link is offline
5222 * @link: ATA link to test
5223 *
5224 * Test whether @link is offline. This is identical to
5225 * ata_phys_link_offline() when there's no slave link. When
5226 * there's a slave link, this function should only be called on
5227 * the master link and will return true if both M/S links are
5228 * offline.
5229 *
5230 * LOCKING:
5231 * None.
5232 *
5233 * RETURNS:
5234 * True if the port offline status is available and offline.
5235 */
5236bool ata_link_offline(struct ata_link *link)
5237{
5238 struct ata_link *slave = link->ap->slave_link;
5239
5240 WARN_ON(link == slave); /* shouldn't be called on slave link */
5241
5242 return ata_phys_link_offline(link) &&
5243 (!slave || ata_phys_link_offline(slave));
5244}
5245
6ffa01d8 5246#ifdef CONFIG_PM
5ef41082 5247static int ata_port_request_pm(struct ata_port *ap, pm_message_t mesg,
cca3974e
JG
5248 unsigned int action, unsigned int ehi_flags,
5249 int wait)
500530f6 5250{
5ef41082 5251 struct ata_link *link;
500530f6 5252 unsigned long flags;
5ef41082 5253 int rc;
500530f6 5254
5ef41082
LM
5255 /* Previous resume operation might still be in
5256 * progress. Wait for PM_PENDING to clear.
5257 */
5258 if (ap->pflags & ATA_PFLAG_PM_PENDING) {
5259 ata_port_wait_eh(ap);
5260 WARN_ON(ap->pflags & ATA_PFLAG_PM_PENDING);
5261 }
500530f6 5262
5ef41082
LM
5263 /* request PM ops to EH */
5264 spin_lock_irqsave(ap->lock, flags);
500530f6 5265
5ef41082
LM
5266 ap->pm_mesg = mesg;
5267 if (wait) {
5268 rc = 0;
5269 ap->pm_result = &rc;
5270 }
500530f6 5271
5ef41082
LM
5272 ap->pflags |= ATA_PFLAG_PM_PENDING;
5273 ata_for_each_link(link, ap, HOST_FIRST) {
5274 link->eh_info.action |= action;
5275 link->eh_info.flags |= ehi_flags;
5276 }
500530f6 5277
5ef41082 5278 ata_port_schedule_eh(ap);
500530f6 5279
5ef41082 5280 spin_unlock_irqrestore(ap->lock, flags);
500530f6 5281
5ef41082
LM
5282 /* wait and check result */
5283 if (wait) {
5284 ata_port_wait_eh(ap);
5285 WARN_ON(ap->pflags & ATA_PFLAG_PM_PENDING);
500530f6
TH
5286 }
5287
5ef41082 5288 return rc;
500530f6
TH
5289}
5290
5ef41082
LM
5291#define to_ata_port(d) container_of(d, struct ata_port, tdev)
5292
33574d68 5293static int ata_port_suspend_common(struct device *dev, pm_message_t mesg)
5ef41082
LM
5294{
5295 struct ata_port *ap = to_ata_port(dev);
33574d68 5296 unsigned int ehi_flags = ATA_EHI_QUIET;
5ef41082
LM
5297 int rc;
5298
33574d68
LM
5299 /*
5300 * On some hardware, device fails to respond after spun down
5301 * for suspend. As the device won't be used before being
5302 * resumed, we don't need to touch the device. Ask EH to skip
5303 * the usual stuff and proceed directly to suspend.
5304 *
5305 * http://thread.gmane.org/gmane.linux.ide/46764
5306 */
5307 if (mesg.event == PM_EVENT_SUSPEND)
5308 ehi_flags |= ATA_EHI_NO_AUTOPSY | ATA_EHI_NO_RECOVERY;
5309
5310 rc = ata_port_request_pm(ap, mesg, 0, ehi_flags, 1);
5ef41082
LM
5311 return rc;
5312}
5313
5314static int ata_port_suspend(struct device *dev)
5315{
5316 if (pm_runtime_suspended(dev))
5317 return 0;
5318
33574d68
LM
5319 return ata_port_suspend_common(dev, PMSG_SUSPEND);
5320}
5321
5322static int ata_port_do_freeze(struct device *dev)
5323{
5324 if (pm_runtime_suspended(dev))
5325 pm_runtime_resume(dev);
5326
5327 return ata_port_suspend_common(dev, PMSG_FREEZE);
5328}
5329
5330static int ata_port_poweroff(struct device *dev)
5331{
5332 if (pm_runtime_suspended(dev))
5333 return 0;
5334
5335 return ata_port_suspend_common(dev, PMSG_HIBERNATE);
5ef41082
LM
5336}
5337
e90b1e5a 5338static int ata_port_resume_common(struct device *dev)
5ef41082
LM
5339{
5340 struct ata_port *ap = to_ata_port(dev);
5341 int rc;
5342
5343 rc = ata_port_request_pm(ap, PMSG_ON, ATA_EH_RESET,
5344 ATA_EHI_NO_AUTOPSY | ATA_EHI_QUIET, 1);
5345 return rc;
5346}
5347
e90b1e5a
LM
5348static int ata_port_resume(struct device *dev)
5349{
5350 int rc;
5351
5352 rc = ata_port_resume_common(dev);
5353 if (!rc) {
5354 pm_runtime_disable(dev);
5355 pm_runtime_set_active(dev);
5356 pm_runtime_enable(dev);
5357 }
5358
5359 return rc;
5360}
5361
9ee4f393
LM
5362static int ata_port_runtime_idle(struct device *dev)
5363{
5364 return pm_runtime_suspend(dev);
5365}
5366
5ef41082
LM
5367static const struct dev_pm_ops ata_port_pm_ops = {
5368 .suspend = ata_port_suspend,
5369 .resume = ata_port_resume,
33574d68
LM
5370 .freeze = ata_port_do_freeze,
5371 .thaw = ata_port_resume,
5372 .poweroff = ata_port_poweroff,
5373 .restore = ata_port_resume,
9ee4f393 5374
33574d68 5375 .runtime_suspend = ata_port_suspend,
e90b1e5a 5376 .runtime_resume = ata_port_resume_common,
9ee4f393 5377 .runtime_idle = ata_port_runtime_idle,
5ef41082
LM
5378};
5379
500530f6 5380/**
cca3974e
JG
5381 * ata_host_suspend - suspend host
5382 * @host: host to suspend
500530f6
TH
5383 * @mesg: PM message
5384 *
5ef41082 5385 * Suspend @host. Actual operation is performed by port suspend.
500530f6 5386 */
cca3974e 5387int ata_host_suspend(struct ata_host *host, pm_message_t mesg)
500530f6 5388{
5ef41082
LM
5389 host->dev->power.power_state = mesg;
5390 return 0;
500530f6
TH
5391}
5392
5393/**
cca3974e
JG
5394 * ata_host_resume - resume host
5395 * @host: host to resume
500530f6 5396 *
5ef41082 5397 * Resume @host. Actual operation is performed by port resume.
500530f6 5398 */
cca3974e 5399void ata_host_resume(struct ata_host *host)
500530f6 5400{
72ad6ec4 5401 host->dev->power.power_state = PMSG_ON;
500530f6 5402}
6ffa01d8 5403#endif
500530f6 5404
5ef41082
LM
5405struct device_type ata_port_type = {
5406 .name = "ata_port",
5407#ifdef CONFIG_PM
5408 .pm = &ata_port_pm_ops,
5409#endif
5410};
5411
3ef3b43d
TH
5412/**
5413 * ata_dev_init - Initialize an ata_device structure
5414 * @dev: Device structure to initialize
5415 *
5416 * Initialize @dev in preparation for probing.
5417 *
5418 * LOCKING:
5419 * Inherited from caller.
5420 */
5421void ata_dev_init(struct ata_device *dev)
5422{
b1c72916 5423 struct ata_link *link = ata_dev_phys_link(dev);
9af5c9c9 5424 struct ata_port *ap = link->ap;
72fa4b74
TH
5425 unsigned long flags;
5426
b1c72916 5427 /* SATA spd limit is bound to the attached device, reset together */
9af5c9c9
TH
5428 link->sata_spd_limit = link->hw_sata_spd_limit;
5429 link->sata_spd = 0;
5a04bf4b 5430
72fa4b74
TH
5431 /* High bits of dev->flags are used to record warm plug
5432 * requests which occur asynchronously. Synchronize using
cca3974e 5433 * host lock.
72fa4b74 5434 */
ba6a1308 5435 spin_lock_irqsave(ap->lock, flags);
72fa4b74 5436 dev->flags &= ~ATA_DFLAG_INIT_MASK;
3dcc323f 5437 dev->horkage = 0;
ba6a1308 5438 spin_unlock_irqrestore(ap->lock, flags);
3ef3b43d 5439
99cf610a
TH
5440 memset((void *)dev + ATA_DEVICE_CLEAR_BEGIN, 0,
5441 ATA_DEVICE_CLEAR_END - ATA_DEVICE_CLEAR_BEGIN);
3ef3b43d
TH
5442 dev->pio_mask = UINT_MAX;
5443 dev->mwdma_mask = UINT_MAX;
5444 dev->udma_mask = UINT_MAX;
5445}
5446
4fb37a25
TH
5447/**
5448 * ata_link_init - Initialize an ata_link structure
5449 * @ap: ATA port link is attached to
5450 * @link: Link structure to initialize
8989805d 5451 * @pmp: Port multiplier port number
4fb37a25
TH
5452 *
5453 * Initialize @link.
5454 *
5455 * LOCKING:
5456 * Kernel thread context (may sleep)
5457 */
fb7fd614 5458void ata_link_init(struct ata_port *ap, struct ata_link *link, int pmp)
4fb37a25
TH
5459{
5460 int i;
5461
5462 /* clear everything except for devices */
d9027470
GG
5463 memset((void *)link + ATA_LINK_CLEAR_BEGIN, 0,
5464 ATA_LINK_CLEAR_END - ATA_LINK_CLEAR_BEGIN);
4fb37a25
TH
5465
5466 link->ap = ap;
8989805d 5467 link->pmp = pmp;
4fb37a25
TH
5468 link->active_tag = ATA_TAG_POISON;
5469 link->hw_sata_spd_limit = UINT_MAX;
5470
5471 /* can't use iterator, ap isn't initialized yet */
5472 for (i = 0; i < ATA_MAX_DEVICES; i++) {
5473 struct ata_device *dev = &link->device[i];
5474
5475 dev->link = link;
5476 dev->devno = dev - link->device;
110f66d2
TH
5477#ifdef CONFIG_ATA_ACPI
5478 dev->gtf_filter = ata_acpi_gtf_filter;
5479#endif
4fb37a25
TH
5480 ata_dev_init(dev);
5481 }
5482}
5483
5484/**
5485 * sata_link_init_spd - Initialize link->sata_spd_limit
5486 * @link: Link to configure sata_spd_limit for
5487 *
5488 * Initialize @link->[hw_]sata_spd_limit to the currently
5489 * configured value.
5490 *
5491 * LOCKING:
5492 * Kernel thread context (may sleep).
5493 *
5494 * RETURNS:
5495 * 0 on success, -errno on failure.
5496 */
fb7fd614 5497int sata_link_init_spd(struct ata_link *link)
4fb37a25 5498{
33267325 5499 u8 spd;
4fb37a25
TH
5500 int rc;
5501
d127ea7b 5502 rc = sata_scr_read(link, SCR_CONTROL, &link->saved_scontrol);
4fb37a25
TH
5503 if (rc)
5504 return rc;
5505
d127ea7b 5506 spd = (link->saved_scontrol >> 4) & 0xf;
4fb37a25
TH
5507 if (spd)
5508 link->hw_sata_spd_limit &= (1 << spd) - 1;
5509
05944bdf 5510 ata_force_link_limits(link);
33267325 5511
4fb37a25
TH
5512 link->sata_spd_limit = link->hw_sata_spd_limit;
5513
5514 return 0;
5515}
5516
1da177e4 5517/**
f3187195
TH
5518 * ata_port_alloc - allocate and initialize basic ATA port resources
5519 * @host: ATA host this allocated port belongs to
1da177e4 5520 *
f3187195
TH
5521 * Allocate and initialize basic ATA port resources.
5522 *
5523 * RETURNS:
5524 * Allocate ATA port on success, NULL on failure.
0cba632b 5525 *
1da177e4 5526 * LOCKING:
f3187195 5527 * Inherited from calling layer (may sleep).
1da177e4 5528 */
f3187195 5529struct ata_port *ata_port_alloc(struct ata_host *host)
1da177e4 5530{
f3187195 5531 struct ata_port *ap;
1da177e4 5532
f3187195
TH
5533 DPRINTK("ENTER\n");
5534
5535 ap = kzalloc(sizeof(*ap), GFP_KERNEL);
5536 if (!ap)
5537 return NULL;
4fca377f 5538
7b3a24c5 5539 ap->pflags |= ATA_PFLAG_INITIALIZING | ATA_PFLAG_FROZEN;
cca3974e 5540 ap->lock = &host->lock;
f3187195 5541 ap->print_id = -1;
cca3974e 5542 ap->host = host;
f3187195 5543 ap->dev = host->dev;
bd5d825c
BP
5544
5545#if defined(ATA_VERBOSE_DEBUG)
5546 /* turn on all debugging levels */
5547 ap->msg_enable = 0x00FF;
5548#elif defined(ATA_DEBUG)
5549 ap->msg_enable = ATA_MSG_DRV | ATA_MSG_INFO | ATA_MSG_CTL | ATA_MSG_WARN | ATA_MSG_ERR;
88574551 5550#else
0dd4b21f 5551 ap->msg_enable = ATA_MSG_DRV | ATA_MSG_ERR | ATA_MSG_WARN;
bd5d825c 5552#endif
1da177e4 5553
ad72cf98 5554 mutex_init(&ap->scsi_scan_mutex);
65f27f38
DH
5555 INIT_DELAYED_WORK(&ap->hotplug_task, ata_scsi_hotplug);
5556 INIT_WORK(&ap->scsi_rescan_task, ata_scsi_dev_rescan);
a72ec4ce 5557 INIT_LIST_HEAD(&ap->eh_done_q);
c6cf9e99 5558 init_waitqueue_head(&ap->eh_wait_q);
45fabbb7 5559 init_completion(&ap->park_req_pending);
5ddf24c5
TH
5560 init_timer_deferrable(&ap->fastdrain_timer);
5561 ap->fastdrain_timer.function = ata_eh_fastdrain_timerfn;
5562 ap->fastdrain_timer.data = (unsigned long)ap;
1da177e4 5563
838df628 5564 ap->cbl = ATA_CBL_NONE;
838df628 5565
8989805d 5566 ata_link_init(ap, &ap->link, 0);
1da177e4
LT
5567
5568#ifdef ATA_IRQ_TRAP
5569 ap->stats.unhandled_irq = 1;
5570 ap->stats.idle_irq = 1;
5571#endif
270390e1
TH
5572 ata_sff_port_init(ap);
5573
1da177e4 5574 return ap;
1da177e4
LT
5575}
5576
f0d36efd
TH
5577static void ata_host_release(struct device *gendev, void *res)
5578{
5579 struct ata_host *host = dev_get_drvdata(gendev);
5580 int i;
5581
1aa506e4
TH
5582 for (i = 0; i < host->n_ports; i++) {
5583 struct ata_port *ap = host->ports[i];
5584
4911487a
TH
5585 if (!ap)
5586 continue;
5587
5588 if (ap->scsi_host)
1aa506e4
TH
5589 scsi_host_put(ap->scsi_host);
5590
633273a3 5591 kfree(ap->pmp_link);
b1c72916 5592 kfree(ap->slave_link);
4911487a 5593 kfree(ap);
1aa506e4
TH
5594 host->ports[i] = NULL;
5595 }
5596
1aa56cca 5597 dev_set_drvdata(gendev, NULL);
f0d36efd
TH
5598}
5599
f3187195
TH
5600/**
5601 * ata_host_alloc - allocate and init basic ATA host resources
5602 * @dev: generic device this host is associated with
5603 * @max_ports: maximum number of ATA ports associated with this host
5604 *
5605 * Allocate and initialize basic ATA host resources. LLD calls
5606 * this function to allocate a host, initializes it fully and
5607 * attaches it using ata_host_register().
5608 *
5609 * @max_ports ports are allocated and host->n_ports is
5610 * initialized to @max_ports. The caller is allowed to decrease
5611 * host->n_ports before calling ata_host_register(). The unused
5612 * ports will be automatically freed on registration.
5613 *
5614 * RETURNS:
5615 * Allocate ATA host on success, NULL on failure.
5616 *
5617 * LOCKING:
5618 * Inherited from calling layer (may sleep).
5619 */
5620struct ata_host *ata_host_alloc(struct device *dev, int max_ports)
5621{
5622 struct ata_host *host;
5623 size_t sz;
5624 int i;
5625
5626 DPRINTK("ENTER\n");
5627
5628 if (!devres_open_group(dev, NULL, GFP_KERNEL))
5629 return NULL;
5630
5631 /* alloc a container for our list of ATA ports (buses) */
5632 sz = sizeof(struct ata_host) + (max_ports + 1) * sizeof(void *);
5633 /* alloc a container for our list of ATA ports (buses) */
5634 host = devres_alloc(ata_host_release, sz, GFP_KERNEL);
5635 if (!host)
5636 goto err_out;
5637
5638 devres_add(dev, host);
5639 dev_set_drvdata(dev, host);
5640
5641 spin_lock_init(&host->lock);
c0c362b6 5642 mutex_init(&host->eh_mutex);
f3187195
TH
5643 host->dev = dev;
5644 host->n_ports = max_ports;
5645
5646 /* allocate ports bound to this host */
5647 for (i = 0; i < max_ports; i++) {
5648 struct ata_port *ap;
5649
5650 ap = ata_port_alloc(host);
5651 if (!ap)
5652 goto err_out;
5653
5654 ap->port_no = i;
5655 host->ports[i] = ap;
5656 }
5657
5658 devres_remove_group(dev, NULL);
5659 return host;
5660
5661 err_out:
5662 devres_release_group(dev, NULL);
5663 return NULL;
5664}
5665
f5cda257
TH
5666/**
5667 * ata_host_alloc_pinfo - alloc host and init with port_info array
5668 * @dev: generic device this host is associated with
5669 * @ppi: array of ATA port_info to initialize host with
5670 * @n_ports: number of ATA ports attached to this host
5671 *
5672 * Allocate ATA host and initialize with info from @ppi. If NULL
5673 * terminated, @ppi may contain fewer entries than @n_ports. The
5674 * last entry will be used for the remaining ports.
5675 *
5676 * RETURNS:
5677 * Allocate ATA host on success, NULL on failure.
5678 *
5679 * LOCKING:
5680 * Inherited from calling layer (may sleep).
5681 */
5682struct ata_host *ata_host_alloc_pinfo(struct device *dev,
5683 const struct ata_port_info * const * ppi,
5684 int n_ports)
5685{
5686 const struct ata_port_info *pi;
5687 struct ata_host *host;
5688 int i, j;
5689
5690 host = ata_host_alloc(dev, n_ports);
5691 if (!host)
5692 return NULL;
5693
5694 for (i = 0, j = 0, pi = NULL; i < host->n_ports; i++) {
5695 struct ata_port *ap = host->ports[i];
5696
5697 if (ppi[j])
5698 pi = ppi[j++];
5699
5700 ap->pio_mask = pi->pio_mask;
5701 ap->mwdma_mask = pi->mwdma_mask;
5702 ap->udma_mask = pi->udma_mask;
5703 ap->flags |= pi->flags;
0c88758b 5704 ap->link.flags |= pi->link_flags;
f5cda257
TH
5705 ap->ops = pi->port_ops;
5706
5707 if (!host->ops && (pi->port_ops != &ata_dummy_port_ops))
5708 host->ops = pi->port_ops;
f5cda257
TH
5709 }
5710
5711 return host;
5712}
5713
b1c72916
TH
5714/**
5715 * ata_slave_link_init - initialize slave link
5716 * @ap: port to initialize slave link for
5717 *
5718 * Create and initialize slave link for @ap. This enables slave
5719 * link handling on the port.
5720 *
5721 * In libata, a port contains links and a link contains devices.
5722 * There is single host link but if a PMP is attached to it,
5723 * there can be multiple fan-out links. On SATA, there's usually
5724 * a single device connected to a link but PATA and SATA
5725 * controllers emulating TF based interface can have two - master
5726 * and slave.
5727 *
5728 * However, there are a few controllers which don't fit into this
5729 * abstraction too well - SATA controllers which emulate TF
5730 * interface with both master and slave devices but also have
5731 * separate SCR register sets for each device. These controllers
5732 * need separate links for physical link handling
5733 * (e.g. onlineness, link speed) but should be treated like a
5734 * traditional M/S controller for everything else (e.g. command
5735 * issue, softreset).
5736 *
5737 * slave_link is libata's way of handling this class of
5738 * controllers without impacting core layer too much. For
5739 * anything other than physical link handling, the default host
5740 * link is used for both master and slave. For physical link
5741 * handling, separate @ap->slave_link is used. All dirty details
5742 * are implemented inside libata core layer. From LLD's POV, the
5743 * only difference is that prereset, hardreset and postreset are
5744 * called once more for the slave link, so the reset sequence
5745 * looks like the following.
5746 *
5747 * prereset(M) -> prereset(S) -> hardreset(M) -> hardreset(S) ->
5748 * softreset(M) -> postreset(M) -> postreset(S)
5749 *
5750 * Note that softreset is called only for the master. Softreset
5751 * resets both M/S by definition, so SRST on master should handle
5752 * both (the standard method will work just fine).
5753 *
5754 * LOCKING:
5755 * Should be called before host is registered.
5756 *
5757 * RETURNS:
5758 * 0 on success, -errno on failure.
5759 */
5760int ata_slave_link_init(struct ata_port *ap)
5761{
5762 struct ata_link *link;
5763
5764 WARN_ON(ap->slave_link);
5765 WARN_ON(ap->flags & ATA_FLAG_PMP);
5766
5767 link = kzalloc(sizeof(*link), GFP_KERNEL);
5768 if (!link)
5769 return -ENOMEM;
5770
5771 ata_link_init(ap, link, 1);
5772 ap->slave_link = link;
5773 return 0;
5774}
5775
32ebbc0c
TH
5776static void ata_host_stop(struct device *gendev, void *res)
5777{
5778 struct ata_host *host = dev_get_drvdata(gendev);
5779 int i;
5780
5781 WARN_ON(!(host->flags & ATA_HOST_STARTED));
5782
5783 for (i = 0; i < host->n_ports; i++) {
5784 struct ata_port *ap = host->ports[i];
5785
5786 if (ap->ops->port_stop)
5787 ap->ops->port_stop(ap);
5788 }
5789
5790 if (host->ops->host_stop)
5791 host->ops->host_stop(host);
5792}
5793
029cfd6b
TH
5794/**
5795 * ata_finalize_port_ops - finalize ata_port_operations
5796 * @ops: ata_port_operations to finalize
5797 *
5798 * An ata_port_operations can inherit from another ops and that
5799 * ops can again inherit from another. This can go on as many
5800 * times as necessary as long as there is no loop in the
5801 * inheritance chain.
5802 *
5803 * Ops tables are finalized when the host is started. NULL or
5804 * unspecified entries are inherited from the closet ancestor
5805 * which has the method and the entry is populated with it.
5806 * After finalization, the ops table directly points to all the
5807 * methods and ->inherits is no longer necessary and cleared.
5808 *
5809 * Using ATA_OP_NULL, inheriting ops can force a method to NULL.
5810 *
5811 * LOCKING:
5812 * None.
5813 */
5814static void ata_finalize_port_ops(struct ata_port_operations *ops)
5815{
2da67659 5816 static DEFINE_SPINLOCK(lock);
029cfd6b
TH
5817 const struct ata_port_operations *cur;
5818 void **begin = (void **)ops;
5819 void **end = (void **)&ops->inherits;
5820 void **pp;
5821
5822 if (!ops || !ops->inherits)
5823 return;
5824
5825 spin_lock(&lock);
5826
5827 for (cur = ops->inherits; cur; cur = cur->inherits) {
5828 void **inherit = (void **)cur;
5829
5830 for (pp = begin; pp < end; pp++, inherit++)
5831 if (!*pp)
5832 *pp = *inherit;
5833 }
5834
5835 for (pp = begin; pp < end; pp++)
5836 if (IS_ERR(*pp))
5837 *pp = NULL;
5838
5839 ops->inherits = NULL;
5840
5841 spin_unlock(&lock);
5842}
5843
ecef7253
TH
5844/**
5845 * ata_host_start - start and freeze ports of an ATA host
5846 * @host: ATA host to start ports for
5847 *
5848 * Start and then freeze ports of @host. Started status is
5849 * recorded in host->flags, so this function can be called
5850 * multiple times. Ports are guaranteed to get started only
f3187195
TH
5851 * once. If host->ops isn't initialized yet, its set to the
5852 * first non-dummy port ops.
ecef7253
TH
5853 *
5854 * LOCKING:
5855 * Inherited from calling layer (may sleep).
5856 *
5857 * RETURNS:
5858 * 0 if all ports are started successfully, -errno otherwise.
5859 */
5860int ata_host_start(struct ata_host *host)
5861{
32ebbc0c
TH
5862 int have_stop = 0;
5863 void *start_dr = NULL;
ecef7253
TH
5864 int i, rc;
5865
5866 if (host->flags & ATA_HOST_STARTED)
5867 return 0;
5868
029cfd6b
TH
5869 ata_finalize_port_ops(host->ops);
5870
ecef7253
TH
5871 for (i = 0; i < host->n_ports; i++) {
5872 struct ata_port *ap = host->ports[i];
5873
029cfd6b
TH
5874 ata_finalize_port_ops(ap->ops);
5875
f3187195
TH
5876 if (!host->ops && !ata_port_is_dummy(ap))
5877 host->ops = ap->ops;
5878
32ebbc0c
TH
5879 if (ap->ops->port_stop)
5880 have_stop = 1;
5881 }
5882
5883 if (host->ops->host_stop)
5884 have_stop = 1;
5885
5886 if (have_stop) {
5887 start_dr = devres_alloc(ata_host_stop, 0, GFP_KERNEL);
5888 if (!start_dr)
5889 return -ENOMEM;
5890 }
5891
5892 for (i = 0; i < host->n_ports; i++) {
5893 struct ata_port *ap = host->ports[i];
5894
ecef7253
TH
5895 if (ap->ops->port_start) {
5896 rc = ap->ops->port_start(ap);
5897 if (rc) {
0f9fe9b7 5898 if (rc != -ENODEV)
a44fec1f
JP
5899 dev_err(host->dev,
5900 "failed to start port %d (errno=%d)\n",
5901 i, rc);
ecef7253
TH
5902 goto err_out;
5903 }
5904 }
ecef7253
TH
5905 ata_eh_freeze_port(ap);
5906 }
5907
32ebbc0c
TH
5908 if (start_dr)
5909 devres_add(host->dev, start_dr);
ecef7253
TH
5910 host->flags |= ATA_HOST_STARTED;
5911 return 0;
5912
5913 err_out:
5914 while (--i >= 0) {
5915 struct ata_port *ap = host->ports[i];
5916
5917 if (ap->ops->port_stop)
5918 ap->ops->port_stop(ap);
5919 }
32ebbc0c 5920 devres_free(start_dr);
ecef7253
TH
5921 return rc;
5922}
5923
b03732f0 5924/**
cca3974e
JG
5925 * ata_sas_host_init - Initialize a host struct
5926 * @host: host to initialize
5927 * @dev: device host is attached to
5928 * @flags: host flags
5929 * @ops: port_ops
b03732f0
BK
5930 *
5931 * LOCKING:
5932 * PCI/etc. bus probe sem.
5933 *
5934 */
f3187195 5935/* KILLME - the only user left is ipr */
cca3974e 5936void ata_host_init(struct ata_host *host, struct device *dev,
029cfd6b 5937 unsigned long flags, struct ata_port_operations *ops)
b03732f0 5938{
cca3974e 5939 spin_lock_init(&host->lock);
c0c362b6 5940 mutex_init(&host->eh_mutex);
cca3974e
JG
5941 host->dev = dev;
5942 host->flags = flags;
5943 host->ops = ops;
b03732f0
BK
5944}
5945
9508a66f 5946void __ata_port_probe(struct ata_port *ap)
79318057 5947{
9508a66f
DW
5948 struct ata_eh_info *ehi = &ap->link.eh_info;
5949 unsigned long flags;
886ad09f 5950
9508a66f
DW
5951 /* kick EH for boot probing */
5952 spin_lock_irqsave(ap->lock, flags);
79318057 5953
9508a66f
DW
5954 ehi->probe_mask |= ATA_ALL_DEVICES;
5955 ehi->action |= ATA_EH_RESET;
5956 ehi->flags |= ATA_EHI_NO_AUTOPSY | ATA_EHI_QUIET;
79318057 5957
9508a66f
DW
5958 ap->pflags &= ~ATA_PFLAG_INITIALIZING;
5959 ap->pflags |= ATA_PFLAG_LOADING;
5960 ata_port_schedule_eh(ap);
79318057 5961
9508a66f
DW
5962 spin_unlock_irqrestore(ap->lock, flags);
5963}
79318057 5964
9508a66f
DW
5965int ata_port_probe(struct ata_port *ap)
5966{
5967 int rc = 0;
79318057 5968
9508a66f
DW
5969 if (ap->ops->error_handler) {
5970 __ata_port_probe(ap);
79318057
AV
5971 ata_port_wait_eh(ap);
5972 } else {
5973 DPRINTK("ata%u: bus probe begin\n", ap->print_id);
5974 rc = ata_bus_probe(ap);
5975 DPRINTK("ata%u: bus probe end\n", ap->print_id);
79318057 5976 }
238c9cf9
JB
5977 return rc;
5978}
5979
5980
5981static void async_port_probe(void *data, async_cookie_t cookie)
5982{
5983 struct ata_port *ap = data;
4fca377f 5984
238c9cf9
JB
5985 /*
5986 * If we're not allowed to scan this host in parallel,
5987 * we need to wait until all previous scans have completed
5988 * before going further.
5989 * Jeff Garzik says this is only within a controller, so we
5990 * don't need to wait for port 0, only for later ports.
5991 */
5992 if (!(ap->host->flags & ATA_HOST_PARALLEL_SCAN) && ap->port_no != 0)
5993 async_synchronize_cookie(cookie);
5994
5995 (void)ata_port_probe(ap);
f29d3b23
AV
5996
5997 /* in order to keep device order, we need to synchronize at this point */
5998 async_synchronize_cookie(cookie);
5999
6000 ata_scsi_scan_host(ap, 1);
79318057 6001}
238c9cf9 6002
f3187195
TH
6003/**
6004 * ata_host_register - register initialized ATA host
6005 * @host: ATA host to register
6006 * @sht: template for SCSI host
6007 *
6008 * Register initialized ATA host. @host is allocated using
6009 * ata_host_alloc() and fully initialized by LLD. This function
6010 * starts ports, registers @host with ATA and SCSI layers and
6011 * probe registered devices.
6012 *
6013 * LOCKING:
6014 * Inherited from calling layer (may sleep).
6015 *
6016 * RETURNS:
6017 * 0 on success, -errno otherwise.
6018 */
6019int ata_host_register(struct ata_host *host, struct scsi_host_template *sht)
6020{
6021 int i, rc;
6022
6023 /* host must have been started */
6024 if (!(host->flags & ATA_HOST_STARTED)) {
a44fec1f 6025 dev_err(host->dev, "BUG: trying to register unstarted host\n");
f3187195
TH
6026 WARN_ON(1);
6027 return -EINVAL;
6028 }
6029
6030 /* Blow away unused ports. This happens when LLD can't
6031 * determine the exact number of ports to allocate at
6032 * allocation time.
6033 */
6034 for (i = host->n_ports; host->ports[i]; i++)
6035 kfree(host->ports[i]);
6036
6037 /* give ports names and add SCSI hosts */
6038 for (i = 0; i < host->n_ports; i++)
85d6725b 6039 host->ports[i]->print_id = atomic_inc_return(&ata_print_id);
f3187195 6040
4fca377f 6041
d9027470
GG
6042 /* Create associated sysfs transport objects */
6043 for (i = 0; i < host->n_ports; i++) {
6044 rc = ata_tport_add(host->dev,host->ports[i]);
6045 if (rc) {
6046 goto err_tadd;
6047 }
6048 }
6049
f3187195
TH
6050 rc = ata_scsi_add_hosts(host, sht);
6051 if (rc)
d9027470 6052 goto err_tadd;
f3187195 6053
fafbae87
TH
6054 /* associate with ACPI nodes */
6055 ata_acpi_associate(host);
6056
f3187195
TH
6057 /* set cable, sata_spd_limit and report */
6058 for (i = 0; i < host->n_ports; i++) {
6059 struct ata_port *ap = host->ports[i];
f3187195
TH
6060 unsigned long xfer_mask;
6061
6062 /* set SATA cable type if still unset */
6063 if (ap->cbl == ATA_CBL_NONE && (ap->flags & ATA_FLAG_SATA))
6064 ap->cbl = ATA_CBL_SATA;
6065
6066 /* init sata_spd_limit to the current value */
4fb37a25 6067 sata_link_init_spd(&ap->link);
b1c72916
TH
6068 if (ap->slave_link)
6069 sata_link_init_spd(ap->slave_link);
f3187195 6070
cbcdd875 6071 /* print per-port info to dmesg */
f3187195
TH
6072 xfer_mask = ata_pack_xfermask(ap->pio_mask, ap->mwdma_mask,
6073 ap->udma_mask);
6074
abf6e8ed 6075 if (!ata_port_is_dummy(ap)) {
a9a79dfe
JP
6076 ata_port_info(ap, "%cATA max %s %s\n",
6077 (ap->flags & ATA_FLAG_SATA) ? 'S' : 'P',
6078 ata_mode_string(xfer_mask),
6079 ap->link.eh_info.desc);
abf6e8ed
TH
6080 ata_ehi_clear_desc(&ap->link.eh_info);
6081 } else
a9a79dfe 6082 ata_port_info(ap, "DUMMY\n");
f3187195
TH
6083 }
6084
f6005354 6085 /* perform each probe asynchronously */
f3187195
TH
6086 for (i = 0; i < host->n_ports; i++) {
6087 struct ata_port *ap = host->ports[i];
79318057 6088 async_schedule(async_port_probe, ap);
f3187195 6089 }
f3187195
TH
6090
6091 return 0;
d9027470
GG
6092
6093 err_tadd:
6094 while (--i >= 0) {
6095 ata_tport_delete(host->ports[i]);
6096 }
6097 return rc;
6098
f3187195
TH
6099}
6100
f5cda257
TH
6101/**
6102 * ata_host_activate - start host, request IRQ and register it
6103 * @host: target ATA host
6104 * @irq: IRQ to request
6105 * @irq_handler: irq_handler used when requesting IRQ
6106 * @irq_flags: irq_flags used when requesting IRQ
6107 * @sht: scsi_host_template to use when registering the host
6108 *
6109 * After allocating an ATA host and initializing it, most libata
6110 * LLDs perform three steps to activate the host - start host,
6111 * request IRQ and register it. This helper takes necessasry
6112 * arguments and performs the three steps in one go.
6113 *
3d46b2e2
PM
6114 * An invalid IRQ skips the IRQ registration and expects the host to
6115 * have set polling mode on the port. In this case, @irq_handler
6116 * should be NULL.
6117 *
f5cda257
TH
6118 * LOCKING:
6119 * Inherited from calling layer (may sleep).
6120 *
6121 * RETURNS:
6122 * 0 on success, -errno otherwise.
6123 */
6124int ata_host_activate(struct ata_host *host, int irq,
6125 irq_handler_t irq_handler, unsigned long irq_flags,
6126 struct scsi_host_template *sht)
6127{
cbcdd875 6128 int i, rc;
f5cda257
TH
6129
6130 rc = ata_host_start(host);
6131 if (rc)
6132 return rc;
6133
3d46b2e2
PM
6134 /* Special case for polling mode */
6135 if (!irq) {
6136 WARN_ON(irq_handler);
6137 return ata_host_register(host, sht);
6138 }
6139
f5cda257
TH
6140 rc = devm_request_irq(host->dev, irq, irq_handler, irq_flags,
6141 dev_driver_string(host->dev), host);
6142 if (rc)
6143 return rc;
6144
cbcdd875
TH
6145 for (i = 0; i < host->n_ports; i++)
6146 ata_port_desc(host->ports[i], "irq %d", irq);
4031826b 6147
f5cda257
TH
6148 rc = ata_host_register(host, sht);
6149 /* if failed, just free the IRQ and leave ports alone */
6150 if (rc)
6151 devm_free_irq(host->dev, irq, host);
6152
6153 return rc;
6154}
6155
720ba126
TH
6156/**
6157 * ata_port_detach - Detach ATA port in prepration of device removal
6158 * @ap: ATA port to be detached
6159 *
6160 * Detach all ATA devices and the associated SCSI devices of @ap;
6161 * then, remove the associated SCSI host. @ap is guaranteed to
6162 * be quiescent on return from this function.
6163 *
6164 * LOCKING:
6165 * Kernel thread context (may sleep).
6166 */
741b7763 6167static void ata_port_detach(struct ata_port *ap)
720ba126
TH
6168{
6169 unsigned long flags;
720ba126
TH
6170
6171 if (!ap->ops->error_handler)
c3cf30a9 6172 goto skip_eh;
720ba126
TH
6173
6174 /* tell EH we're leaving & flush EH */
ba6a1308 6175 spin_lock_irqsave(ap->lock, flags);
b51e9e5d 6176 ap->pflags |= ATA_PFLAG_UNLOADING;
ece180d1 6177 ata_port_schedule_eh(ap);
ba6a1308 6178 spin_unlock_irqrestore(ap->lock, flags);
720ba126 6179
ece180d1 6180 /* wait till EH commits suicide */
720ba126
TH
6181 ata_port_wait_eh(ap);
6182
ece180d1
TH
6183 /* it better be dead now */
6184 WARN_ON(!(ap->pflags & ATA_PFLAG_UNLOADED));
720ba126 6185
afe2c511 6186 cancel_delayed_work_sync(&ap->hotplug_task);
720ba126 6187
c3cf30a9 6188 skip_eh:
d9027470
GG
6189 if (ap->pmp_link) {
6190 int i;
6191 for (i = 0; i < SATA_PMP_MAX_PORTS; i++)
6192 ata_tlink_delete(&ap->pmp_link[i]);
6193 }
6194 ata_tport_delete(ap);
6195
720ba126 6196 /* remove the associated SCSI host */
cca3974e 6197 scsi_remove_host(ap->scsi_host);
720ba126
TH
6198}
6199
0529c159
TH
6200/**
6201 * ata_host_detach - Detach all ports of an ATA host
6202 * @host: Host to detach
6203 *
6204 * Detach all ports of @host.
6205 *
6206 * LOCKING:
6207 * Kernel thread context (may sleep).
6208 */
6209void ata_host_detach(struct ata_host *host)
6210{
6211 int i;
6212
6213 for (i = 0; i < host->n_ports; i++)
6214 ata_port_detach(host->ports[i]);
562f0c2d
TH
6215
6216 /* the host is dead now, dissociate ACPI */
6217 ata_acpi_dissociate(host);
0529c159
TH
6218}
6219
374b1873
JG
6220#ifdef CONFIG_PCI
6221
1da177e4
LT
6222/**
6223 * ata_pci_remove_one - PCI layer callback for device removal
6224 * @pdev: PCI device that was removed
6225 *
b878ca5d
TH
6226 * PCI layer indicates to libata via this hook that hot-unplug or
6227 * module unload event has occurred. Detach all ports. Resource
6228 * release is handled via devres.
1da177e4
LT
6229 *
6230 * LOCKING:
6231 * Inherited from PCI layer (may sleep).
6232 */
f0d36efd 6233void ata_pci_remove_one(struct pci_dev *pdev)
1da177e4 6234{
2855568b 6235 struct device *dev = &pdev->dev;
cca3974e 6236 struct ata_host *host = dev_get_drvdata(dev);
1da177e4 6237
b878ca5d 6238 ata_host_detach(host);
1da177e4
LT
6239}
6240
6241/* move to PCI subsystem */
057ace5e 6242int pci_test_config_bits(struct pci_dev *pdev, const struct pci_bits *bits)
1da177e4
LT
6243{
6244 unsigned long tmp = 0;
6245
6246 switch (bits->width) {
6247 case 1: {
6248 u8 tmp8 = 0;
6249 pci_read_config_byte(pdev, bits->reg, &tmp8);
6250 tmp = tmp8;
6251 break;
6252 }
6253 case 2: {
6254 u16 tmp16 = 0;
6255 pci_read_config_word(pdev, bits->reg, &tmp16);
6256 tmp = tmp16;
6257 break;
6258 }
6259 case 4: {
6260 u32 tmp32 = 0;
6261 pci_read_config_dword(pdev, bits->reg, &tmp32);
6262 tmp = tmp32;
6263 break;
6264 }
6265
6266 default:
6267 return -EINVAL;
6268 }
6269
6270 tmp &= bits->mask;
6271
6272 return (tmp == bits->val) ? 1 : 0;
6273}
9b847548 6274
6ffa01d8 6275#ifdef CONFIG_PM
3c5100c1 6276void ata_pci_device_do_suspend(struct pci_dev *pdev, pm_message_t mesg)
9b847548
JA
6277{
6278 pci_save_state(pdev);
4c90d971 6279 pci_disable_device(pdev);
500530f6 6280
3a2d5b70 6281 if (mesg.event & PM_EVENT_SLEEP)
500530f6 6282 pci_set_power_state(pdev, PCI_D3hot);
9b847548
JA
6283}
6284
553c4aa6 6285int ata_pci_device_do_resume(struct pci_dev *pdev)
9b847548 6286{
553c4aa6
TH
6287 int rc;
6288
9b847548
JA
6289 pci_set_power_state(pdev, PCI_D0);
6290 pci_restore_state(pdev);
553c4aa6 6291
b878ca5d 6292 rc = pcim_enable_device(pdev);
553c4aa6 6293 if (rc) {
a44fec1f
JP
6294 dev_err(&pdev->dev,
6295 "failed to enable device after resume (%d)\n", rc);
553c4aa6
TH
6296 return rc;
6297 }
6298
9b847548 6299 pci_set_master(pdev);
553c4aa6 6300 return 0;
500530f6
TH
6301}
6302
3c5100c1 6303int ata_pci_device_suspend(struct pci_dev *pdev, pm_message_t mesg)
500530f6 6304{
cca3974e 6305 struct ata_host *host = dev_get_drvdata(&pdev->dev);
500530f6
TH
6306 int rc = 0;
6307
cca3974e 6308 rc = ata_host_suspend(host, mesg);
500530f6
TH
6309 if (rc)
6310 return rc;
6311
3c5100c1 6312 ata_pci_device_do_suspend(pdev, mesg);
500530f6
TH
6313
6314 return 0;
6315}
6316
6317int ata_pci_device_resume(struct pci_dev *pdev)
6318{
cca3974e 6319 struct ata_host *host = dev_get_drvdata(&pdev->dev);
553c4aa6 6320 int rc;
500530f6 6321
553c4aa6
TH
6322 rc = ata_pci_device_do_resume(pdev);
6323 if (rc == 0)
6324 ata_host_resume(host);
6325 return rc;
9b847548 6326}
6ffa01d8
TH
6327#endif /* CONFIG_PM */
6328
1da177e4
LT
6329#endif /* CONFIG_PCI */
6330
33267325
TH
6331static int __init ata_parse_force_one(char **cur,
6332 struct ata_force_ent *force_ent,
6333 const char **reason)
6334{
6335 /* FIXME: Currently, there's no way to tag init const data and
6336 * using __initdata causes build failure on some versions of
6337 * gcc. Once __initdataconst is implemented, add const to the
6338 * following structure.
6339 */
6340 static struct ata_force_param force_tbl[] __initdata = {
6341 { "40c", .cbl = ATA_CBL_PATA40 },
6342 { "80c", .cbl = ATA_CBL_PATA80 },
6343 { "short40c", .cbl = ATA_CBL_PATA40_SHORT },
6344 { "unk", .cbl = ATA_CBL_PATA_UNK },
6345 { "ign", .cbl = ATA_CBL_PATA_IGN },
6346 { "sata", .cbl = ATA_CBL_SATA },
6347 { "1.5Gbps", .spd_limit = 1 },
6348 { "3.0Gbps", .spd_limit = 2 },
6349 { "noncq", .horkage_on = ATA_HORKAGE_NONCQ },
6350 { "ncq", .horkage_off = ATA_HORKAGE_NONCQ },
43c9c591 6351 { "dump_id", .horkage_on = ATA_HORKAGE_DUMP_ID },
33267325
TH
6352 { "pio0", .xfer_mask = 1 << (ATA_SHIFT_PIO + 0) },
6353 { "pio1", .xfer_mask = 1 << (ATA_SHIFT_PIO + 1) },
6354 { "pio2", .xfer_mask = 1 << (ATA_SHIFT_PIO + 2) },
6355 { "pio3", .xfer_mask = 1 << (ATA_SHIFT_PIO + 3) },
6356 { "pio4", .xfer_mask = 1 << (ATA_SHIFT_PIO + 4) },
6357 { "pio5", .xfer_mask = 1 << (ATA_SHIFT_PIO + 5) },
6358 { "pio6", .xfer_mask = 1 << (ATA_SHIFT_PIO + 6) },
6359 { "mwdma0", .xfer_mask = 1 << (ATA_SHIFT_MWDMA + 0) },
6360 { "mwdma1", .xfer_mask = 1 << (ATA_SHIFT_MWDMA + 1) },
6361 { "mwdma2", .xfer_mask = 1 << (ATA_SHIFT_MWDMA + 2) },
6362 { "mwdma3", .xfer_mask = 1 << (ATA_SHIFT_MWDMA + 3) },
6363 { "mwdma4", .xfer_mask = 1 << (ATA_SHIFT_MWDMA + 4) },
6364 { "udma0", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 0) },
6365 { "udma16", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 0) },
6366 { "udma/16", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 0) },
6367 { "udma1", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 1) },
6368 { "udma25", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 1) },
6369 { "udma/25", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 1) },
6370 { "udma2", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 2) },
6371 { "udma33", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 2) },
6372 { "udma/33", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 2) },
6373 { "udma3", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 3) },
6374 { "udma44", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 3) },
6375 { "udma/44", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 3) },
6376 { "udma4", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 4) },
6377 { "udma66", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 4) },
6378 { "udma/66", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 4) },
6379 { "udma5", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 5) },
6380 { "udma100", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 5) },
6381 { "udma/100", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 5) },
6382 { "udma6", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 6) },
6383 { "udma133", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 6) },
6384 { "udma/133", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 6) },
6385 { "udma7", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 7) },
05944bdf
TH
6386 { "nohrst", .lflags = ATA_LFLAG_NO_HRST },
6387 { "nosrst", .lflags = ATA_LFLAG_NO_SRST },
6388 { "norst", .lflags = ATA_LFLAG_NO_HRST | ATA_LFLAG_NO_SRST },
33267325
TH
6389 };
6390 char *start = *cur, *p = *cur;
6391 char *id, *val, *endp;
6392 const struct ata_force_param *match_fp = NULL;
6393 int nr_matches = 0, i;
6394
6395 /* find where this param ends and update *cur */
6396 while (*p != '\0' && *p != ',')
6397 p++;
6398
6399 if (*p == '\0')
6400 *cur = p;
6401 else
6402 *cur = p + 1;
6403
6404 *p = '\0';
6405
6406 /* parse */
6407 p = strchr(start, ':');
6408 if (!p) {
6409 val = strstrip(start);
6410 goto parse_val;
6411 }
6412 *p = '\0';
6413
6414 id = strstrip(start);
6415 val = strstrip(p + 1);
6416
6417 /* parse id */
6418 p = strchr(id, '.');
6419 if (p) {
6420 *p++ = '\0';
6421 force_ent->device = simple_strtoul(p, &endp, 10);
6422 if (p == endp || *endp != '\0') {
6423 *reason = "invalid device";
6424 return -EINVAL;
6425 }
6426 }
6427
6428 force_ent->port = simple_strtoul(id, &endp, 10);
6429 if (p == endp || *endp != '\0') {
6430 *reason = "invalid port/link";
6431 return -EINVAL;
6432 }
6433
6434 parse_val:
6435 /* parse val, allow shortcuts so that both 1.5 and 1.5Gbps work */
6436 for (i = 0; i < ARRAY_SIZE(force_tbl); i++) {
6437 const struct ata_force_param *fp = &force_tbl[i];
6438
6439 if (strncasecmp(val, fp->name, strlen(val)))
6440 continue;
6441
6442 nr_matches++;
6443 match_fp = fp;
6444
6445 if (strcasecmp(val, fp->name) == 0) {
6446 nr_matches = 1;
6447 break;
6448 }
6449 }
6450
6451 if (!nr_matches) {
6452 *reason = "unknown value";
6453 return -EINVAL;
6454 }
6455 if (nr_matches > 1) {
6456 *reason = "ambigious value";
6457 return -EINVAL;
6458 }
6459
6460 force_ent->param = *match_fp;
6461
6462 return 0;
6463}
6464
6465static void __init ata_parse_force_param(void)
6466{
6467 int idx = 0, size = 1;
6468 int last_port = -1, last_device = -1;
6469 char *p, *cur, *next;
6470
6471 /* calculate maximum number of params and allocate force_tbl */
6472 for (p = ata_force_param_buf; *p; p++)
6473 if (*p == ',')
6474 size++;
6475
6476 ata_force_tbl = kzalloc(sizeof(ata_force_tbl[0]) * size, GFP_KERNEL);
6477 if (!ata_force_tbl) {
6478 printk(KERN_WARNING "ata: failed to extend force table, "
6479 "libata.force ignored\n");
6480 return;
6481 }
6482
6483 /* parse and populate the table */
6484 for (cur = ata_force_param_buf; *cur != '\0'; cur = next) {
6485 const char *reason = "";
6486 struct ata_force_ent te = { .port = -1, .device = -1 };
6487
6488 next = cur;
6489 if (ata_parse_force_one(&next, &te, &reason)) {
6490 printk(KERN_WARNING "ata: failed to parse force "
6491 "parameter \"%s\" (%s)\n",
6492 cur, reason);
6493 continue;
6494 }
6495
6496 if (te.port == -1) {
6497 te.port = last_port;
6498 te.device = last_device;
6499 }
6500
6501 ata_force_tbl[idx++] = te;
6502
6503 last_port = te.port;
6504 last_device = te.device;
6505 }
6506
6507 ata_force_tbl_size = idx;
6508}
1da177e4 6509
1da177e4
LT
6510static int __init ata_init(void)
6511{
d9027470 6512 int rc;
270390e1 6513
33267325
TH
6514 ata_parse_force_param();
6515
270390e1 6516 rc = ata_sff_init();
ad72cf98
TH
6517 if (rc) {
6518 kfree(ata_force_tbl);
6519 return rc;
6520 }
453b07ac 6521
d9027470
GG
6522 libata_transport_init();
6523 ata_scsi_transport_template = ata_attach_transport();
6524 if (!ata_scsi_transport_template) {
6525 ata_sff_exit();
6526 rc = -ENOMEM;
6527 goto err_out;
4fca377f 6528 }
d9027470 6529
1da177e4
LT
6530 printk(KERN_DEBUG "libata version " DRV_VERSION " loaded.\n");
6531 return 0;
d9027470
GG
6532
6533err_out:
6534 return rc;
1da177e4
LT
6535}
6536
6537static void __exit ata_exit(void)
6538{
d9027470
GG
6539 ata_release_transport(ata_scsi_transport_template);
6540 libata_transport_exit();
270390e1 6541 ata_sff_exit();
33267325 6542 kfree(ata_force_tbl);
1da177e4
LT
6543}
6544
a4625085 6545subsys_initcall(ata_init);
1da177e4
LT
6546module_exit(ata_exit);
6547
9990b6f3 6548static DEFINE_RATELIMIT_STATE(ratelimit, HZ / 5, 1);
67846b30
JG
6549
6550int ata_ratelimit(void)
6551{
9990b6f3 6552 return __ratelimit(&ratelimit);
67846b30
JG
6553}
6554
c0c362b6
TH
6555/**
6556 * ata_msleep - ATA EH owner aware msleep
6557 * @ap: ATA port to attribute the sleep to
6558 * @msecs: duration to sleep in milliseconds
6559 *
6560 * Sleeps @msecs. If the current task is owner of @ap's EH, the
6561 * ownership is released before going to sleep and reacquired
6562 * after the sleep is complete. IOW, other ports sharing the
6563 * @ap->host will be allowed to own the EH while this task is
6564 * sleeping.
6565 *
6566 * LOCKING:
6567 * Might sleep.
6568 */
97750ceb
TH
6569void ata_msleep(struct ata_port *ap, unsigned int msecs)
6570{
c0c362b6
TH
6571 bool owns_eh = ap && ap->host->eh_owner == current;
6572
6573 if (owns_eh)
6574 ata_eh_release(ap);
6575
97750ceb 6576 msleep(msecs);
c0c362b6
TH
6577
6578 if (owns_eh)
6579 ata_eh_acquire(ap);
97750ceb
TH
6580}
6581
c22daff4
TH
6582/**
6583 * ata_wait_register - wait until register value changes
97750ceb 6584 * @ap: ATA port to wait register for, can be NULL
c22daff4
TH
6585 * @reg: IO-mapped register
6586 * @mask: Mask to apply to read register value
6587 * @val: Wait condition
341c2c95
TH
6588 * @interval: polling interval in milliseconds
6589 * @timeout: timeout in milliseconds
c22daff4
TH
6590 *
6591 * Waiting for some bits of register to change is a common
6592 * operation for ATA controllers. This function reads 32bit LE
6593 * IO-mapped register @reg and tests for the following condition.
6594 *
6595 * (*@reg & mask) != val
6596 *
6597 * If the condition is met, it returns; otherwise, the process is
6598 * repeated after @interval_msec until timeout.
6599 *
6600 * LOCKING:
6601 * Kernel thread context (may sleep)
6602 *
6603 * RETURNS:
6604 * The final register value.
6605 */
97750ceb 6606u32 ata_wait_register(struct ata_port *ap, void __iomem *reg, u32 mask, u32 val,
341c2c95 6607 unsigned long interval, unsigned long timeout)
c22daff4 6608{
341c2c95 6609 unsigned long deadline;
c22daff4
TH
6610 u32 tmp;
6611
6612 tmp = ioread32(reg);
6613
6614 /* Calculate timeout _after_ the first read to make sure
6615 * preceding writes reach the controller before starting to
6616 * eat away the timeout.
6617 */
341c2c95 6618 deadline = ata_deadline(jiffies, timeout);
c22daff4 6619
341c2c95 6620 while ((tmp & mask) == val && time_before(jiffies, deadline)) {
97750ceb 6621 ata_msleep(ap, interval);
c22daff4
TH
6622 tmp = ioread32(reg);
6623 }
6624
6625 return tmp;
6626}
6627
dd5b06c4
TH
6628/*
6629 * Dummy port_ops
6630 */
182d7bba 6631static unsigned int ata_dummy_qc_issue(struct ata_queued_cmd *qc)
dd5b06c4 6632{
182d7bba 6633 return AC_ERR_SYSTEM;
dd5b06c4
TH
6634}
6635
182d7bba 6636static void ata_dummy_error_handler(struct ata_port *ap)
dd5b06c4 6637{
182d7bba 6638 /* truly dummy */
dd5b06c4
TH
6639}
6640
029cfd6b 6641struct ata_port_operations ata_dummy_port_ops = {
dd5b06c4
TH
6642 .qc_prep = ata_noop_qc_prep,
6643 .qc_issue = ata_dummy_qc_issue,
182d7bba 6644 .error_handler = ata_dummy_error_handler,
dd5b06c4
TH
6645};
6646
21b0ad4f
TH
6647const struct ata_port_info ata_dummy_port_info = {
6648 .port_ops = &ata_dummy_port_ops,
6649};
6650
a9a79dfe
JP
6651/*
6652 * Utility print functions
6653 */
6654int ata_port_printk(const struct ata_port *ap, const char *level,
6655 const char *fmt, ...)
6656{
6657 struct va_format vaf;
6658 va_list args;
6659 int r;
6660
6661 va_start(args, fmt);
6662
6663 vaf.fmt = fmt;
6664 vaf.va = &args;
6665
6666 r = printk("%sata%u: %pV", level, ap->print_id, &vaf);
6667
6668 va_end(args);
6669
6670 return r;
6671}
6672EXPORT_SYMBOL(ata_port_printk);
6673
6674int ata_link_printk(const struct ata_link *link, const char *level,
6675 const char *fmt, ...)
6676{
6677 struct va_format vaf;
6678 va_list args;
6679 int r;
6680
6681 va_start(args, fmt);
6682
6683 vaf.fmt = fmt;
6684 vaf.va = &args;
6685
6686 if (sata_pmp_attached(link->ap) || link->ap->slave_link)
6687 r = printk("%sata%u.%02u: %pV",
6688 level, link->ap->print_id, link->pmp, &vaf);
6689 else
6690 r = printk("%sata%u: %pV",
6691 level, link->ap->print_id, &vaf);
6692
6693 va_end(args);
6694
6695 return r;
6696}
6697EXPORT_SYMBOL(ata_link_printk);
6698
6699int ata_dev_printk(const struct ata_device *dev, const char *level,
6700 const char *fmt, ...)
6701{
6702 struct va_format vaf;
6703 va_list args;
6704 int r;
6705
6706 va_start(args, fmt);
6707
6708 vaf.fmt = fmt;
6709 vaf.va = &args;
6710
6711 r = printk("%sata%u.%02u: %pV",
6712 level, dev->link->ap->print_id, dev->link->pmp + dev->devno,
6713 &vaf);
6714
6715 va_end(args);
6716
6717 return r;
6718}
6719EXPORT_SYMBOL(ata_dev_printk);
6720
06296a1e
JP
6721void ata_print_version(const struct device *dev, const char *version)
6722{
6723 dev_printk(KERN_DEBUG, dev, "version %s\n", version);
6724}
6725EXPORT_SYMBOL(ata_print_version);
6726
1da177e4
LT
6727/*
6728 * libata is essentially a library of internal helper functions for
6729 * low-level ATA host controller drivers. As such, the API/ABI is
6730 * likely to change as new drivers are added and updated.
6731 * Do not depend on ABI/API stability.
6732 */
e9c83914
TH
6733EXPORT_SYMBOL_GPL(sata_deb_timing_normal);
6734EXPORT_SYMBOL_GPL(sata_deb_timing_hotplug);
6735EXPORT_SYMBOL_GPL(sata_deb_timing_long);
029cfd6b
TH
6736EXPORT_SYMBOL_GPL(ata_base_port_ops);
6737EXPORT_SYMBOL_GPL(sata_port_ops);
dd5b06c4 6738EXPORT_SYMBOL_GPL(ata_dummy_port_ops);
21b0ad4f 6739EXPORT_SYMBOL_GPL(ata_dummy_port_info);
1eca4365
TH
6740EXPORT_SYMBOL_GPL(ata_link_next);
6741EXPORT_SYMBOL_GPL(ata_dev_next);
1da177e4 6742EXPORT_SYMBOL_GPL(ata_std_bios_param);
d8d9129e 6743EXPORT_SYMBOL_GPL(ata_scsi_unlock_native_capacity);
cca3974e 6744EXPORT_SYMBOL_GPL(ata_host_init);
f3187195 6745EXPORT_SYMBOL_GPL(ata_host_alloc);
f5cda257 6746EXPORT_SYMBOL_GPL(ata_host_alloc_pinfo);
b1c72916 6747EXPORT_SYMBOL_GPL(ata_slave_link_init);
ecef7253 6748EXPORT_SYMBOL_GPL(ata_host_start);
f3187195 6749EXPORT_SYMBOL_GPL(ata_host_register);
f5cda257 6750EXPORT_SYMBOL_GPL(ata_host_activate);
0529c159 6751EXPORT_SYMBOL_GPL(ata_host_detach);
1da177e4 6752EXPORT_SYMBOL_GPL(ata_sg_init);
f686bcb8 6753EXPORT_SYMBOL_GPL(ata_qc_complete);
dedaf2b0 6754EXPORT_SYMBOL_GPL(ata_qc_complete_multiple);
436d34b3 6755EXPORT_SYMBOL_GPL(atapi_cmd_type);
1da177e4
LT
6756EXPORT_SYMBOL_GPL(ata_tf_to_fis);
6757EXPORT_SYMBOL_GPL(ata_tf_from_fis);
6357357c
TH
6758EXPORT_SYMBOL_GPL(ata_pack_xfermask);
6759EXPORT_SYMBOL_GPL(ata_unpack_xfermask);
6760EXPORT_SYMBOL_GPL(ata_xfer_mask2mode);
6761EXPORT_SYMBOL_GPL(ata_xfer_mode2mask);
6762EXPORT_SYMBOL_GPL(ata_xfer_mode2shift);
6763EXPORT_SYMBOL_GPL(ata_mode_string);
6764EXPORT_SYMBOL_GPL(ata_id_xfermask);
04351821 6765EXPORT_SYMBOL_GPL(ata_do_set_mode);
31cc23b3 6766EXPORT_SYMBOL_GPL(ata_std_qc_defer);
e46834cd 6767EXPORT_SYMBOL_GPL(ata_noop_qc_prep);
10305f0f 6768EXPORT_SYMBOL_GPL(ata_dev_disable);
3c567b7d 6769EXPORT_SYMBOL_GPL(sata_set_spd);
aa2731ad 6770EXPORT_SYMBOL_GPL(ata_wait_after_reset);
936fd732
TH
6771EXPORT_SYMBOL_GPL(sata_link_debounce);
6772EXPORT_SYMBOL_GPL(sata_link_resume);
1152b261 6773EXPORT_SYMBOL_GPL(sata_link_scr_lpm);
0aa1113d 6774EXPORT_SYMBOL_GPL(ata_std_prereset);
cc0680a5 6775EXPORT_SYMBOL_GPL(sata_link_hardreset);
57c9efdf 6776EXPORT_SYMBOL_GPL(sata_std_hardreset);
203c75b8 6777EXPORT_SYMBOL_GPL(ata_std_postreset);
2e9edbf8
JG
6778EXPORT_SYMBOL_GPL(ata_dev_classify);
6779EXPORT_SYMBOL_GPL(ata_dev_pair);
67846b30 6780EXPORT_SYMBOL_GPL(ata_ratelimit);
97750ceb 6781EXPORT_SYMBOL_GPL(ata_msleep);
c22daff4 6782EXPORT_SYMBOL_GPL(ata_wait_register);
1da177e4 6783EXPORT_SYMBOL_GPL(ata_scsi_queuecmd);
1da177e4 6784EXPORT_SYMBOL_GPL(ata_scsi_slave_config);
83c47bcb 6785EXPORT_SYMBOL_GPL(ata_scsi_slave_destroy);
a6e6ce8e 6786EXPORT_SYMBOL_GPL(ata_scsi_change_queue_depth);
f6e67035 6787EXPORT_SYMBOL_GPL(__ata_change_queue_depth);
34bf2170
TH
6788EXPORT_SYMBOL_GPL(sata_scr_valid);
6789EXPORT_SYMBOL_GPL(sata_scr_read);
6790EXPORT_SYMBOL_GPL(sata_scr_write);
6791EXPORT_SYMBOL_GPL(sata_scr_write_flush);
936fd732
TH
6792EXPORT_SYMBOL_GPL(ata_link_online);
6793EXPORT_SYMBOL_GPL(ata_link_offline);
6ffa01d8 6794#ifdef CONFIG_PM
cca3974e
JG
6795EXPORT_SYMBOL_GPL(ata_host_suspend);
6796EXPORT_SYMBOL_GPL(ata_host_resume);
6ffa01d8 6797#endif /* CONFIG_PM */
6a62a04d
TH
6798EXPORT_SYMBOL_GPL(ata_id_string);
6799EXPORT_SYMBOL_GPL(ata_id_c_string);
963e4975 6800EXPORT_SYMBOL_GPL(ata_do_dev_read_id);
1da177e4
LT
6801EXPORT_SYMBOL_GPL(ata_scsi_simulate);
6802
1bc4ccff 6803EXPORT_SYMBOL_GPL(ata_pio_need_iordy);
6357357c 6804EXPORT_SYMBOL_GPL(ata_timing_find_mode);
452503f9
AC
6805EXPORT_SYMBOL_GPL(ata_timing_compute);
6806EXPORT_SYMBOL_GPL(ata_timing_merge);
a0f79b92 6807EXPORT_SYMBOL_GPL(ata_timing_cycle2mode);
452503f9 6808
1da177e4
LT
6809#ifdef CONFIG_PCI
6810EXPORT_SYMBOL_GPL(pci_test_config_bits);
1da177e4 6811EXPORT_SYMBOL_GPL(ata_pci_remove_one);
6ffa01d8 6812#ifdef CONFIG_PM
500530f6
TH
6813EXPORT_SYMBOL_GPL(ata_pci_device_do_suspend);
6814EXPORT_SYMBOL_GPL(ata_pci_device_do_resume);
9b847548
JA
6815EXPORT_SYMBOL_GPL(ata_pci_device_suspend);
6816EXPORT_SYMBOL_GPL(ata_pci_device_resume);
6ffa01d8 6817#endif /* CONFIG_PM */
1da177e4 6818#endif /* CONFIG_PCI */
9b847548 6819
b64bbc39
TH
6820EXPORT_SYMBOL_GPL(__ata_ehi_push_desc);
6821EXPORT_SYMBOL_GPL(ata_ehi_push_desc);
6822EXPORT_SYMBOL_GPL(ata_ehi_clear_desc);
cbcdd875
TH
6823EXPORT_SYMBOL_GPL(ata_port_desc);
6824#ifdef CONFIG_PCI
6825EXPORT_SYMBOL_GPL(ata_port_pbar_desc);
6826#endif /* CONFIG_PCI */
7b70fc03 6827EXPORT_SYMBOL_GPL(ata_port_schedule_eh);
dbd82616 6828EXPORT_SYMBOL_GPL(ata_link_abort);
7b70fc03 6829EXPORT_SYMBOL_GPL(ata_port_abort);
e3180499 6830EXPORT_SYMBOL_GPL(ata_port_freeze);
7d77b247 6831EXPORT_SYMBOL_GPL(sata_async_notification);
e3180499
TH
6832EXPORT_SYMBOL_GPL(ata_eh_freeze_port);
6833EXPORT_SYMBOL_GPL(ata_eh_thaw_port);
ece1d636
TH
6834EXPORT_SYMBOL_GPL(ata_eh_qc_complete);
6835EXPORT_SYMBOL_GPL(ata_eh_qc_retry);
10acf3b0 6836EXPORT_SYMBOL_GPL(ata_eh_analyze_ncq_error);
022bdb07 6837EXPORT_SYMBOL_GPL(ata_do_eh);
a1efdaba 6838EXPORT_SYMBOL_GPL(ata_std_error_handler);
be0d18df
AC
6839
6840EXPORT_SYMBOL_GPL(ata_cable_40wire);
6841EXPORT_SYMBOL_GPL(ata_cable_80wire);
6842EXPORT_SYMBOL_GPL(ata_cable_unknown);
c88f90c3 6843EXPORT_SYMBOL_GPL(ata_cable_ignore);
be0d18df 6844EXPORT_SYMBOL_GPL(ata_cable_sata);