]> git.proxmox.com Git - mirror_ubuntu-eoan-kernel.git/blame - drivers/ata/libata-core.c
[libata] new quirk, lift bridge limits for Buffalo DriveStation Quattro
[mirror_ubuntu-eoan-kernel.git] / drivers / ata / libata-core.c
CommitLineData
1da177e4 1/*
af36d7f0
JG
2 * libata-core.c - helper library for ATA
3 *
4 * Maintained by: Jeff Garzik <jgarzik@pobox.com>
5 * Please ALWAYS copy linux-ide@vger.kernel.org
6 * on emails.
7 *
8 * Copyright 2003-2004 Red Hat, Inc. All rights reserved.
9 * Copyright 2003-2004 Jeff Garzik
10 *
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2, or (at your option)
15 * any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; see the file COPYING. If not, write to
24 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
25 *
26 *
27 * libata documentation is available via 'make {ps|pdf}docs',
28 * as Documentation/DocBook/libata.*
29 *
30 * Hardware documentation available from http://www.t13.org/ and
31 * http://www.sata-io.org/
32 *
92c52c52
AC
33 * Standards documents from:
34 * http://www.t13.org (ATA standards, PCI DMA IDE spec)
35 * http://www.t10.org (SCSI MMC - for ATAPI MMC)
36 * http://www.sata-io.org (SATA)
37 * http://www.compactflash.org (CF)
38 * http://www.qic.org (QIC157 - Tape and DSC)
39 * http://www.ce-ata.org (CE-ATA: not supported)
40 *
1da177e4
LT
41 */
42
1da177e4
LT
43#include <linux/kernel.h>
44#include <linux/module.h>
45#include <linux/pci.h>
46#include <linux/init.h>
47#include <linux/list.h>
48#include <linux/mm.h>
1da177e4
LT
49#include <linux/spinlock.h>
50#include <linux/blkdev.h>
51#include <linux/delay.h>
52#include <linux/timer.h>
53#include <linux/interrupt.h>
54#include <linux/completion.h>
55#include <linux/suspend.h>
56#include <linux/workqueue.h>
378f058c 57#include <linux/scatterlist.h>
2dcb407e 58#include <linux/io.h>
79318057 59#include <linux/async.h>
e18086d6 60#include <linux/log2.h>
5a0e3ad6 61#include <linux/slab.h>
1da177e4 62#include <scsi/scsi.h>
193515d5 63#include <scsi/scsi_cmnd.h>
1da177e4
LT
64#include <scsi/scsi_host.h>
65#include <linux/libata.h>
1da177e4 66#include <asm/byteorder.h>
140b5e59 67#include <linux/cdrom.h>
9990b6f3 68#include <linux/ratelimit.h>
9ee4f393 69#include <linux/pm_runtime.h>
1da177e4
LT
70
71#include "libata.h"
d9027470 72#include "libata-transport.h"
fda0efc5 73
d7bb4cc7 74/* debounce timing parameters in msecs { interval, duration, timeout } */
e9c83914
TH
75const unsigned long sata_deb_timing_normal[] = { 5, 100, 2000 };
76const unsigned long sata_deb_timing_hotplug[] = { 25, 500, 2000 };
77const unsigned long sata_deb_timing_long[] = { 100, 2000, 5000 };
d7bb4cc7 78
029cfd6b 79const struct ata_port_operations ata_base_port_ops = {
0aa1113d 80 .prereset = ata_std_prereset,
203c75b8 81 .postreset = ata_std_postreset,
a1efdaba 82 .error_handler = ata_std_error_handler,
e4a9c373
DW
83 .sched_eh = ata_std_sched_eh,
84 .end_eh = ata_std_end_eh,
029cfd6b
TH
85};
86
87const struct ata_port_operations sata_port_ops = {
88 .inherits = &ata_base_port_ops,
89
90 .qc_defer = ata_std_qc_defer,
57c9efdf 91 .hardreset = sata_std_hardreset,
029cfd6b
TH
92};
93
3373efd8
TH
94static unsigned int ata_dev_init_params(struct ata_device *dev,
95 u16 heads, u16 sectors);
96static unsigned int ata_dev_set_xfermode(struct ata_device *dev);
97static void ata_dev_xfermask(struct ata_device *dev);
75683fe7 98static unsigned long ata_dev_blacklisted(const struct ata_device *dev);
1da177e4 99
a78f57af 100atomic_t ata_print_id = ATOMIC_INIT(0);
1da177e4 101
33267325
TH
102struct ata_force_param {
103 const char *name;
104 unsigned int cbl;
105 int spd_limit;
106 unsigned long xfer_mask;
107 unsigned int horkage_on;
108 unsigned int horkage_off;
05944bdf 109 unsigned int lflags;
33267325
TH
110};
111
112struct ata_force_ent {
113 int port;
114 int device;
115 struct ata_force_param param;
116};
117
118static struct ata_force_ent *ata_force_tbl;
119static int ata_force_tbl_size;
120
121static char ata_force_param_buf[PAGE_SIZE] __initdata;
7afb4222
TH
122/* param_buf is thrown away after initialization, disallow read */
123module_param_string(force, ata_force_param_buf, sizeof(ata_force_param_buf), 0);
33267325
TH
124MODULE_PARM_DESC(force, "Force ATA configurations including cable type, link speed and transfer mode (see Documentation/kernel-parameters.txt for details)");
125
2486fa56 126static int atapi_enabled = 1;
1623c81e 127module_param(atapi_enabled, int, 0444);
ad5d8eac 128MODULE_PARM_DESC(atapi_enabled, "Enable discovery of ATAPI devices (0=off, 1=on [default])");
1623c81e 129
c5c61bda 130static int atapi_dmadir = 0;
95de719a 131module_param(atapi_dmadir, int, 0444);
ad5d8eac 132MODULE_PARM_DESC(atapi_dmadir, "Enable ATAPI DMADIR bridge support (0=off [default], 1=on)");
95de719a 133
baf4fdfa
ML
134int atapi_passthru16 = 1;
135module_param(atapi_passthru16, int, 0444);
ad5d8eac 136MODULE_PARM_DESC(atapi_passthru16, "Enable ATA_16 passthru for ATAPI devices (0=off, 1=on [default])");
baf4fdfa 137
c3c013a2
JG
138int libata_fua = 0;
139module_param_named(fua, libata_fua, int, 0444);
ad5d8eac 140MODULE_PARM_DESC(fua, "FUA support (0=off [default], 1=on)");
c3c013a2 141
2dcb407e 142static int ata_ignore_hpa;
1e999736
AC
143module_param_named(ignore_hpa, ata_ignore_hpa, int, 0644);
144MODULE_PARM_DESC(ignore_hpa, "Ignore HPA limit (0=keep BIOS limits, 1=ignore limits, using full disk)");
145
b3a70601
AC
146static int libata_dma_mask = ATA_DMA_MASK_ATA|ATA_DMA_MASK_ATAPI|ATA_DMA_MASK_CFA;
147module_param_named(dma, libata_dma_mask, int, 0444);
148MODULE_PARM_DESC(dma, "DMA enable/disable (0x1==ATA, 0x2==ATAPI, 0x4==CF)");
149
87fbc5a0 150static int ata_probe_timeout;
a8601e5f
AM
151module_param(ata_probe_timeout, int, 0444);
152MODULE_PARM_DESC(ata_probe_timeout, "Set ATA probing timeout (seconds)");
153
6ebe9d86 154int libata_noacpi = 0;
d7d0dad6 155module_param_named(noacpi, libata_noacpi, int, 0444);
ad5d8eac 156MODULE_PARM_DESC(noacpi, "Disable the use of ACPI in probe/suspend/resume (0=off [default], 1=on)");
11ef697b 157
ae8d4ee7
AC
158int libata_allow_tpm = 0;
159module_param_named(allow_tpm, libata_allow_tpm, int, 0444);
ad5d8eac 160MODULE_PARM_DESC(allow_tpm, "Permit the use of TPM commands (0=off [default], 1=on)");
ae8d4ee7 161
e7ecd435
TH
162static int atapi_an;
163module_param(atapi_an, int, 0444);
164MODULE_PARM_DESC(atapi_an, "Enable ATAPI AN media presence notification (0=0ff [default], 1=on)");
165
1da177e4
LT
166MODULE_AUTHOR("Jeff Garzik");
167MODULE_DESCRIPTION("Library module for ATA devices");
168MODULE_LICENSE("GPL");
169MODULE_VERSION(DRV_VERSION);
170
0baab86b 171
9913ff8a
TH
172static bool ata_sstatus_online(u32 sstatus)
173{
174 return (sstatus & 0xf) == 0x3;
175}
176
1eca4365
TH
177/**
178 * ata_link_next - link iteration helper
179 * @link: the previous link, NULL to start
180 * @ap: ATA port containing links to iterate
181 * @mode: iteration mode, one of ATA_LITER_*
182 *
183 * LOCKING:
184 * Host lock or EH context.
aadffb68 185 *
1eca4365
TH
186 * RETURNS:
187 * Pointer to the next link.
aadffb68 188 */
1eca4365
TH
189struct ata_link *ata_link_next(struct ata_link *link, struct ata_port *ap,
190 enum ata_link_iter_mode mode)
aadffb68 191{
1eca4365
TH
192 BUG_ON(mode != ATA_LITER_EDGE &&
193 mode != ATA_LITER_PMP_FIRST && mode != ATA_LITER_HOST_FIRST);
194
aadffb68 195 /* NULL link indicates start of iteration */
1eca4365
TH
196 if (!link)
197 switch (mode) {
198 case ATA_LITER_EDGE:
199 case ATA_LITER_PMP_FIRST:
200 if (sata_pmp_attached(ap))
201 return ap->pmp_link;
202 /* fall through */
203 case ATA_LITER_HOST_FIRST:
204 return &ap->link;
205 }
aadffb68 206
1eca4365
TH
207 /* we just iterated over the host link, what's next? */
208 if (link == &ap->link)
209 switch (mode) {
210 case ATA_LITER_HOST_FIRST:
211 if (sata_pmp_attached(ap))
212 return ap->pmp_link;
213 /* fall through */
214 case ATA_LITER_PMP_FIRST:
215 if (unlikely(ap->slave_link))
b1c72916 216 return ap->slave_link;
1eca4365
TH
217 /* fall through */
218 case ATA_LITER_EDGE:
aadffb68 219 return NULL;
b1c72916 220 }
aadffb68 221
b1c72916
TH
222 /* slave_link excludes PMP */
223 if (unlikely(link == ap->slave_link))
224 return NULL;
225
1eca4365 226 /* we were over a PMP link */
aadffb68
TH
227 if (++link < ap->pmp_link + ap->nr_pmp_links)
228 return link;
1eca4365
TH
229
230 if (mode == ATA_LITER_PMP_FIRST)
231 return &ap->link;
232
aadffb68
TH
233 return NULL;
234}
235
1eca4365
TH
236/**
237 * ata_dev_next - device iteration helper
238 * @dev: the previous device, NULL to start
239 * @link: ATA link containing devices to iterate
240 * @mode: iteration mode, one of ATA_DITER_*
241 *
242 * LOCKING:
243 * Host lock or EH context.
244 *
245 * RETURNS:
246 * Pointer to the next device.
247 */
248struct ata_device *ata_dev_next(struct ata_device *dev, struct ata_link *link,
249 enum ata_dev_iter_mode mode)
250{
251 BUG_ON(mode != ATA_DITER_ENABLED && mode != ATA_DITER_ENABLED_REVERSE &&
252 mode != ATA_DITER_ALL && mode != ATA_DITER_ALL_REVERSE);
253
254 /* NULL dev indicates start of iteration */
255 if (!dev)
256 switch (mode) {
257 case ATA_DITER_ENABLED:
258 case ATA_DITER_ALL:
259 dev = link->device;
260 goto check;
261 case ATA_DITER_ENABLED_REVERSE:
262 case ATA_DITER_ALL_REVERSE:
263 dev = link->device + ata_link_max_devices(link) - 1;
264 goto check;
265 }
266
267 next:
268 /* move to the next one */
269 switch (mode) {
270 case ATA_DITER_ENABLED:
271 case ATA_DITER_ALL:
272 if (++dev < link->device + ata_link_max_devices(link))
273 goto check;
274 return NULL;
275 case ATA_DITER_ENABLED_REVERSE:
276 case ATA_DITER_ALL_REVERSE:
277 if (--dev >= link->device)
278 goto check;
279 return NULL;
280 }
281
282 check:
283 if ((mode == ATA_DITER_ENABLED || mode == ATA_DITER_ENABLED_REVERSE) &&
284 !ata_dev_enabled(dev))
285 goto next;
286 return dev;
287}
288
b1c72916
TH
289/**
290 * ata_dev_phys_link - find physical link for a device
291 * @dev: ATA device to look up physical link for
292 *
293 * Look up physical link which @dev is attached to. Note that
294 * this is different from @dev->link only when @dev is on slave
295 * link. For all other cases, it's the same as @dev->link.
296 *
297 * LOCKING:
298 * Don't care.
299 *
300 * RETURNS:
301 * Pointer to the found physical link.
302 */
303struct ata_link *ata_dev_phys_link(struct ata_device *dev)
304{
305 struct ata_port *ap = dev->link->ap;
306
307 if (!ap->slave_link)
308 return dev->link;
309 if (!dev->devno)
310 return &ap->link;
311 return ap->slave_link;
312}
313
33267325
TH
314/**
315 * ata_force_cbl - force cable type according to libata.force
4cdfa1b3 316 * @ap: ATA port of interest
33267325
TH
317 *
318 * Force cable type according to libata.force and whine about it.
319 * The last entry which has matching port number is used, so it
320 * can be specified as part of device force parameters. For
321 * example, both "a:40c,1.00:udma4" and "1.00:40c,udma4" have the
322 * same effect.
323 *
324 * LOCKING:
325 * EH context.
326 */
327void ata_force_cbl(struct ata_port *ap)
328{
329 int i;
330
331 for (i = ata_force_tbl_size - 1; i >= 0; i--) {
332 const struct ata_force_ent *fe = &ata_force_tbl[i];
333
334 if (fe->port != -1 && fe->port != ap->print_id)
335 continue;
336
337 if (fe->param.cbl == ATA_CBL_NONE)
338 continue;
339
340 ap->cbl = fe->param.cbl;
a9a79dfe 341 ata_port_notice(ap, "FORCE: cable set to %s\n", fe->param.name);
33267325
TH
342 return;
343 }
344}
345
346/**
05944bdf 347 * ata_force_link_limits - force link limits according to libata.force
33267325
TH
348 * @link: ATA link of interest
349 *
05944bdf
TH
350 * Force link flags and SATA spd limit according to libata.force
351 * and whine about it. When only the port part is specified
352 * (e.g. 1:), the limit applies to all links connected to both
353 * the host link and all fan-out ports connected via PMP. If the
354 * device part is specified as 0 (e.g. 1.00:), it specifies the
355 * first fan-out link not the host link. Device number 15 always
b1c72916
TH
356 * points to the host link whether PMP is attached or not. If the
357 * controller has slave link, device number 16 points to it.
33267325
TH
358 *
359 * LOCKING:
360 * EH context.
361 */
05944bdf 362static void ata_force_link_limits(struct ata_link *link)
33267325 363{
05944bdf 364 bool did_spd = false;
b1c72916
TH
365 int linkno = link->pmp;
366 int i;
33267325
TH
367
368 if (ata_is_host_link(link))
b1c72916 369 linkno += 15;
33267325
TH
370
371 for (i = ata_force_tbl_size - 1; i >= 0; i--) {
372 const struct ata_force_ent *fe = &ata_force_tbl[i];
373
374 if (fe->port != -1 && fe->port != link->ap->print_id)
375 continue;
376
377 if (fe->device != -1 && fe->device != linkno)
378 continue;
379
05944bdf
TH
380 /* only honor the first spd limit */
381 if (!did_spd && fe->param.spd_limit) {
382 link->hw_sata_spd_limit = (1 << fe->param.spd_limit) - 1;
a9a79dfe 383 ata_link_notice(link, "FORCE: PHY spd limit set to %s\n",
05944bdf
TH
384 fe->param.name);
385 did_spd = true;
386 }
33267325 387
05944bdf
TH
388 /* let lflags stack */
389 if (fe->param.lflags) {
390 link->flags |= fe->param.lflags;
a9a79dfe 391 ata_link_notice(link,
05944bdf
TH
392 "FORCE: link flag 0x%x forced -> 0x%x\n",
393 fe->param.lflags, link->flags);
394 }
33267325
TH
395 }
396}
397
398/**
399 * ata_force_xfermask - force xfermask according to libata.force
400 * @dev: ATA device of interest
401 *
402 * Force xfer_mask according to libata.force and whine about it.
403 * For consistency with link selection, device number 15 selects
404 * the first device connected to the host link.
405 *
406 * LOCKING:
407 * EH context.
408 */
409static void ata_force_xfermask(struct ata_device *dev)
410{
411 int devno = dev->link->pmp + dev->devno;
412 int alt_devno = devno;
413 int i;
414
b1c72916
TH
415 /* allow n.15/16 for devices attached to host port */
416 if (ata_is_host_link(dev->link))
417 alt_devno += 15;
33267325
TH
418
419 for (i = ata_force_tbl_size - 1; i >= 0; i--) {
420 const struct ata_force_ent *fe = &ata_force_tbl[i];
421 unsigned long pio_mask, mwdma_mask, udma_mask;
422
423 if (fe->port != -1 && fe->port != dev->link->ap->print_id)
424 continue;
425
426 if (fe->device != -1 && fe->device != devno &&
427 fe->device != alt_devno)
428 continue;
429
430 if (!fe->param.xfer_mask)
431 continue;
432
433 ata_unpack_xfermask(fe->param.xfer_mask,
434 &pio_mask, &mwdma_mask, &udma_mask);
435 if (udma_mask)
436 dev->udma_mask = udma_mask;
437 else if (mwdma_mask) {
438 dev->udma_mask = 0;
439 dev->mwdma_mask = mwdma_mask;
440 } else {
441 dev->udma_mask = 0;
442 dev->mwdma_mask = 0;
443 dev->pio_mask = pio_mask;
444 }
445
a9a79dfe
JP
446 ata_dev_notice(dev, "FORCE: xfer_mask set to %s\n",
447 fe->param.name);
33267325
TH
448 return;
449 }
450}
451
452/**
453 * ata_force_horkage - force horkage according to libata.force
454 * @dev: ATA device of interest
455 *
456 * Force horkage according to libata.force and whine about it.
457 * For consistency with link selection, device number 15 selects
458 * the first device connected to the host link.
459 *
460 * LOCKING:
461 * EH context.
462 */
463static void ata_force_horkage(struct ata_device *dev)
464{
465 int devno = dev->link->pmp + dev->devno;
466 int alt_devno = devno;
467 int i;
468
b1c72916
TH
469 /* allow n.15/16 for devices attached to host port */
470 if (ata_is_host_link(dev->link))
471 alt_devno += 15;
33267325
TH
472
473 for (i = 0; i < ata_force_tbl_size; i++) {
474 const struct ata_force_ent *fe = &ata_force_tbl[i];
475
476 if (fe->port != -1 && fe->port != dev->link->ap->print_id)
477 continue;
478
479 if (fe->device != -1 && fe->device != devno &&
480 fe->device != alt_devno)
481 continue;
482
483 if (!(~dev->horkage & fe->param.horkage_on) &&
484 !(dev->horkage & fe->param.horkage_off))
485 continue;
486
487 dev->horkage |= fe->param.horkage_on;
488 dev->horkage &= ~fe->param.horkage_off;
489
a9a79dfe
JP
490 ata_dev_notice(dev, "FORCE: horkage modified (%s)\n",
491 fe->param.name);
33267325
TH
492 }
493}
494
436d34b3
TH
495/**
496 * atapi_cmd_type - Determine ATAPI command type from SCSI opcode
497 * @opcode: SCSI opcode
498 *
499 * Determine ATAPI command type from @opcode.
500 *
501 * LOCKING:
502 * None.
503 *
504 * RETURNS:
505 * ATAPI_{READ|WRITE|READ_CD|PASS_THRU|MISC}
506 */
507int atapi_cmd_type(u8 opcode)
508{
509 switch (opcode) {
510 case GPCMD_READ_10:
511 case GPCMD_READ_12:
512 return ATAPI_READ;
513
514 case GPCMD_WRITE_10:
515 case GPCMD_WRITE_12:
516 case GPCMD_WRITE_AND_VERIFY_10:
517 return ATAPI_WRITE;
518
519 case GPCMD_READ_CD:
520 case GPCMD_READ_CD_MSF:
521 return ATAPI_READ_CD;
522
e52dcc48
TH
523 case ATA_16:
524 case ATA_12:
525 if (atapi_passthru16)
526 return ATAPI_PASS_THRU;
527 /* fall thru */
436d34b3
TH
528 default:
529 return ATAPI_MISC;
530 }
531}
532
1da177e4
LT
533/**
534 * ata_tf_to_fis - Convert ATA taskfile to SATA FIS structure
535 * @tf: Taskfile to convert
1da177e4 536 * @pmp: Port multiplier port
9977126c
TH
537 * @is_cmd: This FIS is for command
538 * @fis: Buffer into which data will output
1da177e4
LT
539 *
540 * Converts a standard ATA taskfile to a Serial ATA
541 * FIS structure (Register - Host to Device).
542 *
543 * LOCKING:
544 * Inherited from caller.
545 */
9977126c 546void ata_tf_to_fis(const struct ata_taskfile *tf, u8 pmp, int is_cmd, u8 *fis)
1da177e4 547{
9977126c
TH
548 fis[0] = 0x27; /* Register - Host to Device FIS */
549 fis[1] = pmp & 0xf; /* Port multiplier number*/
550 if (is_cmd)
551 fis[1] |= (1 << 7); /* bit 7 indicates Command FIS */
552
1da177e4
LT
553 fis[2] = tf->command;
554 fis[3] = tf->feature;
555
556 fis[4] = tf->lbal;
557 fis[5] = tf->lbam;
558 fis[6] = tf->lbah;
559 fis[7] = tf->device;
560
561 fis[8] = tf->hob_lbal;
562 fis[9] = tf->hob_lbam;
563 fis[10] = tf->hob_lbah;
564 fis[11] = tf->hob_feature;
565
566 fis[12] = tf->nsect;
567 fis[13] = tf->hob_nsect;
568 fis[14] = 0;
569 fis[15] = tf->ctl;
570
571 fis[16] = 0;
572 fis[17] = 0;
573 fis[18] = 0;
574 fis[19] = 0;
575}
576
577/**
578 * ata_tf_from_fis - Convert SATA FIS to ATA taskfile
579 * @fis: Buffer from which data will be input
580 * @tf: Taskfile to output
581 *
e12a1be6 582 * Converts a serial ATA FIS structure to a standard ATA taskfile.
1da177e4
LT
583 *
584 * LOCKING:
585 * Inherited from caller.
586 */
587
057ace5e 588void ata_tf_from_fis(const u8 *fis, struct ata_taskfile *tf)
1da177e4
LT
589{
590 tf->command = fis[2]; /* status */
591 tf->feature = fis[3]; /* error */
592
593 tf->lbal = fis[4];
594 tf->lbam = fis[5];
595 tf->lbah = fis[6];
596 tf->device = fis[7];
597
598 tf->hob_lbal = fis[8];
599 tf->hob_lbam = fis[9];
600 tf->hob_lbah = fis[10];
601
602 tf->nsect = fis[12];
603 tf->hob_nsect = fis[13];
604}
605
8cbd6df1
AL
606static const u8 ata_rw_cmds[] = {
607 /* pio multi */
608 ATA_CMD_READ_MULTI,
609 ATA_CMD_WRITE_MULTI,
610 ATA_CMD_READ_MULTI_EXT,
611 ATA_CMD_WRITE_MULTI_EXT,
9a3dccc4
TH
612 0,
613 0,
614 0,
615 ATA_CMD_WRITE_MULTI_FUA_EXT,
8cbd6df1
AL
616 /* pio */
617 ATA_CMD_PIO_READ,
618 ATA_CMD_PIO_WRITE,
619 ATA_CMD_PIO_READ_EXT,
620 ATA_CMD_PIO_WRITE_EXT,
9a3dccc4
TH
621 0,
622 0,
623 0,
624 0,
8cbd6df1
AL
625 /* dma */
626 ATA_CMD_READ,
627 ATA_CMD_WRITE,
628 ATA_CMD_READ_EXT,
9a3dccc4
TH
629 ATA_CMD_WRITE_EXT,
630 0,
631 0,
632 0,
633 ATA_CMD_WRITE_FUA_EXT
8cbd6df1 634};
1da177e4
LT
635
636/**
8cbd6df1 637 * ata_rwcmd_protocol - set taskfile r/w commands and protocol
bd056d7e
TH
638 * @tf: command to examine and configure
639 * @dev: device tf belongs to
1da177e4 640 *
2e9edbf8 641 * Examine the device configuration and tf->flags to calculate
8cbd6df1 642 * the proper read/write commands and protocol to use.
1da177e4
LT
643 *
644 * LOCKING:
645 * caller.
646 */
bd056d7e 647static int ata_rwcmd_protocol(struct ata_taskfile *tf, struct ata_device *dev)
1da177e4 648{
9a3dccc4 649 u8 cmd;
1da177e4 650
9a3dccc4 651 int index, fua, lba48, write;
2e9edbf8 652
9a3dccc4 653 fua = (tf->flags & ATA_TFLAG_FUA) ? 4 : 0;
8cbd6df1
AL
654 lba48 = (tf->flags & ATA_TFLAG_LBA48) ? 2 : 0;
655 write = (tf->flags & ATA_TFLAG_WRITE) ? 1 : 0;
1da177e4 656
8cbd6df1
AL
657 if (dev->flags & ATA_DFLAG_PIO) {
658 tf->protocol = ATA_PROT_PIO;
9a3dccc4 659 index = dev->multi_count ? 0 : 8;
9af5c9c9 660 } else if (lba48 && (dev->link->ap->flags & ATA_FLAG_PIO_LBA48)) {
8d238e01
AC
661 /* Unable to use DMA due to host limitation */
662 tf->protocol = ATA_PROT_PIO;
0565c26d 663 index = dev->multi_count ? 0 : 8;
8cbd6df1
AL
664 } else {
665 tf->protocol = ATA_PROT_DMA;
9a3dccc4 666 index = 16;
8cbd6df1 667 }
1da177e4 668
9a3dccc4
TH
669 cmd = ata_rw_cmds[index + fua + lba48 + write];
670 if (cmd) {
671 tf->command = cmd;
672 return 0;
673 }
674 return -1;
1da177e4
LT
675}
676
35b649fe
TH
677/**
678 * ata_tf_read_block - Read block address from ATA taskfile
679 * @tf: ATA taskfile of interest
680 * @dev: ATA device @tf belongs to
681 *
682 * LOCKING:
683 * None.
684 *
685 * Read block address from @tf. This function can handle all
686 * three address formats - LBA, LBA48 and CHS. tf->protocol and
687 * flags select the address format to use.
688 *
689 * RETURNS:
690 * Block address read from @tf.
691 */
692u64 ata_tf_read_block(struct ata_taskfile *tf, struct ata_device *dev)
693{
694 u64 block = 0;
695
696 if (tf->flags & ATA_TFLAG_LBA) {
697 if (tf->flags & ATA_TFLAG_LBA48) {
698 block |= (u64)tf->hob_lbah << 40;
699 block |= (u64)tf->hob_lbam << 32;
44901a96 700 block |= (u64)tf->hob_lbal << 24;
35b649fe
TH
701 } else
702 block |= (tf->device & 0xf) << 24;
703
704 block |= tf->lbah << 16;
705 block |= tf->lbam << 8;
706 block |= tf->lbal;
707 } else {
708 u32 cyl, head, sect;
709
710 cyl = tf->lbam | (tf->lbah << 8);
711 head = tf->device & 0xf;
712 sect = tf->lbal;
713
ac8672ea 714 if (!sect) {
a9a79dfe
JP
715 ata_dev_warn(dev,
716 "device reported invalid CHS sector 0\n");
ac8672ea
TH
717 sect = 1; /* oh well */
718 }
719
720 block = (cyl * dev->heads + head) * dev->sectors + sect - 1;
35b649fe
TH
721 }
722
723 return block;
724}
725
bd056d7e
TH
726/**
727 * ata_build_rw_tf - Build ATA taskfile for given read/write request
728 * @tf: Target ATA taskfile
729 * @dev: ATA device @tf belongs to
730 * @block: Block address
731 * @n_block: Number of blocks
732 * @tf_flags: RW/FUA etc...
733 * @tag: tag
734 *
735 * LOCKING:
736 * None.
737 *
738 * Build ATA taskfile @tf for read/write request described by
739 * @block, @n_block, @tf_flags and @tag on @dev.
740 *
741 * RETURNS:
742 *
743 * 0 on success, -ERANGE if the request is too large for @dev,
744 * -EINVAL if the request is invalid.
745 */
746int ata_build_rw_tf(struct ata_taskfile *tf, struct ata_device *dev,
747 u64 block, u32 n_block, unsigned int tf_flags,
748 unsigned int tag)
749{
750 tf->flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
751 tf->flags |= tf_flags;
752
6d1245bf 753 if (ata_ncq_enabled(dev) && likely(tag != ATA_TAG_INTERNAL)) {
bd056d7e
TH
754 /* yay, NCQ */
755 if (!lba_48_ok(block, n_block))
756 return -ERANGE;
757
758 tf->protocol = ATA_PROT_NCQ;
759 tf->flags |= ATA_TFLAG_LBA | ATA_TFLAG_LBA48;
760
761 if (tf->flags & ATA_TFLAG_WRITE)
762 tf->command = ATA_CMD_FPDMA_WRITE;
763 else
764 tf->command = ATA_CMD_FPDMA_READ;
765
766 tf->nsect = tag << 3;
767 tf->hob_feature = (n_block >> 8) & 0xff;
768 tf->feature = n_block & 0xff;
769
770 tf->hob_lbah = (block >> 40) & 0xff;
771 tf->hob_lbam = (block >> 32) & 0xff;
772 tf->hob_lbal = (block >> 24) & 0xff;
773 tf->lbah = (block >> 16) & 0xff;
774 tf->lbam = (block >> 8) & 0xff;
775 tf->lbal = block & 0xff;
776
777 tf->device = 1 << 6;
778 if (tf->flags & ATA_TFLAG_FUA)
779 tf->device |= 1 << 7;
780 } else if (dev->flags & ATA_DFLAG_LBA) {
781 tf->flags |= ATA_TFLAG_LBA;
782
783 if (lba_28_ok(block, n_block)) {
784 /* use LBA28 */
785 tf->device |= (block >> 24) & 0xf;
786 } else if (lba_48_ok(block, n_block)) {
787 if (!(dev->flags & ATA_DFLAG_LBA48))
788 return -ERANGE;
789
790 /* use LBA48 */
791 tf->flags |= ATA_TFLAG_LBA48;
792
793 tf->hob_nsect = (n_block >> 8) & 0xff;
794
795 tf->hob_lbah = (block >> 40) & 0xff;
796 tf->hob_lbam = (block >> 32) & 0xff;
797 tf->hob_lbal = (block >> 24) & 0xff;
798 } else
799 /* request too large even for LBA48 */
800 return -ERANGE;
801
802 if (unlikely(ata_rwcmd_protocol(tf, dev) < 0))
803 return -EINVAL;
804
805 tf->nsect = n_block & 0xff;
806
807 tf->lbah = (block >> 16) & 0xff;
808 tf->lbam = (block >> 8) & 0xff;
809 tf->lbal = block & 0xff;
810
811 tf->device |= ATA_LBA;
812 } else {
813 /* CHS */
814 u32 sect, head, cyl, track;
815
816 /* The request -may- be too large for CHS addressing. */
817 if (!lba_28_ok(block, n_block))
818 return -ERANGE;
819
820 if (unlikely(ata_rwcmd_protocol(tf, dev) < 0))
821 return -EINVAL;
822
823 /* Convert LBA to CHS */
824 track = (u32)block / dev->sectors;
825 cyl = track / dev->heads;
826 head = track % dev->heads;
827 sect = (u32)block % dev->sectors + 1;
828
829 DPRINTK("block %u track %u cyl %u head %u sect %u\n",
830 (u32)block, track, cyl, head, sect);
831
832 /* Check whether the converted CHS can fit.
833 Cylinder: 0-65535
834 Head: 0-15
835 Sector: 1-255*/
836 if ((cyl >> 16) || (head >> 4) || (sect >> 8) || (!sect))
837 return -ERANGE;
838
839 tf->nsect = n_block & 0xff; /* Sector count 0 means 256 sectors */
840 tf->lbal = sect;
841 tf->lbam = cyl;
842 tf->lbah = cyl >> 8;
843 tf->device |= head;
844 }
845
846 return 0;
847}
848
cb95d562
TH
849/**
850 * ata_pack_xfermask - Pack pio, mwdma and udma masks into xfer_mask
851 * @pio_mask: pio_mask
852 * @mwdma_mask: mwdma_mask
853 * @udma_mask: udma_mask
854 *
855 * Pack @pio_mask, @mwdma_mask and @udma_mask into a single
856 * unsigned int xfer_mask.
857 *
858 * LOCKING:
859 * None.
860 *
861 * RETURNS:
862 * Packed xfer_mask.
863 */
7dc951ae
TH
864unsigned long ata_pack_xfermask(unsigned long pio_mask,
865 unsigned long mwdma_mask,
866 unsigned long udma_mask)
cb95d562
TH
867{
868 return ((pio_mask << ATA_SHIFT_PIO) & ATA_MASK_PIO) |
869 ((mwdma_mask << ATA_SHIFT_MWDMA) & ATA_MASK_MWDMA) |
870 ((udma_mask << ATA_SHIFT_UDMA) & ATA_MASK_UDMA);
871}
872
c0489e4e
TH
873/**
874 * ata_unpack_xfermask - Unpack xfer_mask into pio, mwdma and udma masks
875 * @xfer_mask: xfer_mask to unpack
876 * @pio_mask: resulting pio_mask
877 * @mwdma_mask: resulting mwdma_mask
878 * @udma_mask: resulting udma_mask
879 *
880 * Unpack @xfer_mask into @pio_mask, @mwdma_mask and @udma_mask.
881 * Any NULL distination masks will be ignored.
882 */
7dc951ae
TH
883void ata_unpack_xfermask(unsigned long xfer_mask, unsigned long *pio_mask,
884 unsigned long *mwdma_mask, unsigned long *udma_mask)
c0489e4e
TH
885{
886 if (pio_mask)
887 *pio_mask = (xfer_mask & ATA_MASK_PIO) >> ATA_SHIFT_PIO;
888 if (mwdma_mask)
889 *mwdma_mask = (xfer_mask & ATA_MASK_MWDMA) >> ATA_SHIFT_MWDMA;
890 if (udma_mask)
891 *udma_mask = (xfer_mask & ATA_MASK_UDMA) >> ATA_SHIFT_UDMA;
892}
893
cb95d562 894static const struct ata_xfer_ent {
be9a50c8 895 int shift, bits;
cb95d562
TH
896 u8 base;
897} ata_xfer_tbl[] = {
70cd071e
TH
898 { ATA_SHIFT_PIO, ATA_NR_PIO_MODES, XFER_PIO_0 },
899 { ATA_SHIFT_MWDMA, ATA_NR_MWDMA_MODES, XFER_MW_DMA_0 },
900 { ATA_SHIFT_UDMA, ATA_NR_UDMA_MODES, XFER_UDMA_0 },
cb95d562
TH
901 { -1, },
902};
903
904/**
905 * ata_xfer_mask2mode - Find matching XFER_* for the given xfer_mask
906 * @xfer_mask: xfer_mask of interest
907 *
908 * Return matching XFER_* value for @xfer_mask. Only the highest
909 * bit of @xfer_mask is considered.
910 *
911 * LOCKING:
912 * None.
913 *
914 * RETURNS:
70cd071e 915 * Matching XFER_* value, 0xff if no match found.
cb95d562 916 */
7dc951ae 917u8 ata_xfer_mask2mode(unsigned long xfer_mask)
cb95d562
TH
918{
919 int highbit = fls(xfer_mask) - 1;
920 const struct ata_xfer_ent *ent;
921
922 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
923 if (highbit >= ent->shift && highbit < ent->shift + ent->bits)
924 return ent->base + highbit - ent->shift;
70cd071e 925 return 0xff;
cb95d562
TH
926}
927
928/**
929 * ata_xfer_mode2mask - Find matching xfer_mask for XFER_*
930 * @xfer_mode: XFER_* of interest
931 *
932 * Return matching xfer_mask for @xfer_mode.
933 *
934 * LOCKING:
935 * None.
936 *
937 * RETURNS:
938 * Matching xfer_mask, 0 if no match found.
939 */
7dc951ae 940unsigned long ata_xfer_mode2mask(u8 xfer_mode)
cb95d562
TH
941{
942 const struct ata_xfer_ent *ent;
943
944 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
945 if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits)
70cd071e
TH
946 return ((2 << (ent->shift + xfer_mode - ent->base)) - 1)
947 & ~((1 << ent->shift) - 1);
cb95d562
TH
948 return 0;
949}
950
951/**
952 * ata_xfer_mode2shift - Find matching xfer_shift for XFER_*
953 * @xfer_mode: XFER_* of interest
954 *
955 * Return matching xfer_shift for @xfer_mode.
956 *
957 * LOCKING:
958 * None.
959 *
960 * RETURNS:
961 * Matching xfer_shift, -1 if no match found.
962 */
7dc951ae 963int ata_xfer_mode2shift(unsigned long xfer_mode)
cb95d562
TH
964{
965 const struct ata_xfer_ent *ent;
966
967 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
968 if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits)
969 return ent->shift;
970 return -1;
971}
972
1da177e4 973/**
1da7b0d0
TH
974 * ata_mode_string - convert xfer_mask to string
975 * @xfer_mask: mask of bits supported; only highest bit counts.
1da177e4
LT
976 *
977 * Determine string which represents the highest speed
1da7b0d0 978 * (highest bit in @modemask).
1da177e4
LT
979 *
980 * LOCKING:
981 * None.
982 *
983 * RETURNS:
984 * Constant C string representing highest speed listed in
1da7b0d0 985 * @mode_mask, or the constant C string "<n/a>".
1da177e4 986 */
7dc951ae 987const char *ata_mode_string(unsigned long xfer_mask)
1da177e4 988{
75f554bc
TH
989 static const char * const xfer_mode_str[] = {
990 "PIO0",
991 "PIO1",
992 "PIO2",
993 "PIO3",
994 "PIO4",
b352e57d
AC
995 "PIO5",
996 "PIO6",
75f554bc
TH
997 "MWDMA0",
998 "MWDMA1",
999 "MWDMA2",
b352e57d
AC
1000 "MWDMA3",
1001 "MWDMA4",
75f554bc
TH
1002 "UDMA/16",
1003 "UDMA/25",
1004 "UDMA/33",
1005 "UDMA/44",
1006 "UDMA/66",
1007 "UDMA/100",
1008 "UDMA/133",
1009 "UDMA7",
1010 };
1da7b0d0 1011 int highbit;
1da177e4 1012
1da7b0d0
TH
1013 highbit = fls(xfer_mask) - 1;
1014 if (highbit >= 0 && highbit < ARRAY_SIZE(xfer_mode_str))
1015 return xfer_mode_str[highbit];
1da177e4 1016 return "<n/a>";
1da177e4
LT
1017}
1018
d9027470 1019const char *sata_spd_string(unsigned int spd)
4c360c81
TH
1020{
1021 static const char * const spd_str[] = {
1022 "1.5 Gbps",
1023 "3.0 Gbps",
8522ee25 1024 "6.0 Gbps",
4c360c81
TH
1025 };
1026
1027 if (spd == 0 || (spd - 1) >= ARRAY_SIZE(spd_str))
1028 return "<unknown>";
1029 return spd_str[spd - 1];
1030}
1031
1da177e4
LT
1032/**
1033 * ata_dev_classify - determine device type based on ATA-spec signature
1034 * @tf: ATA taskfile register set for device to be identified
1035 *
1036 * Determine from taskfile register contents whether a device is
1037 * ATA or ATAPI, as per "Signature and persistence" section
1038 * of ATA/PI spec (volume 1, sect 5.14).
1039 *
1040 * LOCKING:
1041 * None.
1042 *
1043 * RETURNS:
633273a3
TH
1044 * Device type, %ATA_DEV_ATA, %ATA_DEV_ATAPI, %ATA_DEV_PMP or
1045 * %ATA_DEV_UNKNOWN the event of failure.
1da177e4 1046 */
057ace5e 1047unsigned int ata_dev_classify(const struct ata_taskfile *tf)
1da177e4
LT
1048{
1049 /* Apple's open source Darwin code hints that some devices only
1050 * put a proper signature into the LBA mid/high registers,
1051 * So, we only check those. It's sufficient for uniqueness.
633273a3
TH
1052 *
1053 * ATA/ATAPI-7 (d1532v1r1: Feb. 19, 2003) specified separate
1054 * signatures for ATA and ATAPI devices attached on SerialATA,
1055 * 0x3c/0xc3 and 0x69/0x96 respectively. However, SerialATA
1056 * spec has never mentioned about using different signatures
1057 * for ATA/ATAPI devices. Then, Serial ATA II: Port
1058 * Multiplier specification began to use 0x69/0x96 to identify
1059 * port multpliers and 0x3c/0xc3 to identify SEMB device.
1060 * ATA/ATAPI-7 dropped descriptions about 0x3c/0xc3 and
1061 * 0x69/0x96 shortly and described them as reserved for
1062 * SerialATA.
1063 *
1064 * We follow the current spec and consider that 0x69/0x96
1065 * identifies a port multiplier and 0x3c/0xc3 a SEMB device.
79b42bab
TH
1066 * Unfortunately, WDC WD1600JS-62MHB5 (a hard drive) reports
1067 * SEMB signature. This is worked around in
1068 * ata_dev_read_id().
1da177e4 1069 */
633273a3 1070 if ((tf->lbam == 0) && (tf->lbah == 0)) {
1da177e4
LT
1071 DPRINTK("found ATA device by sig\n");
1072 return ATA_DEV_ATA;
1073 }
1074
633273a3 1075 if ((tf->lbam == 0x14) && (tf->lbah == 0xeb)) {
1da177e4
LT
1076 DPRINTK("found ATAPI device by sig\n");
1077 return ATA_DEV_ATAPI;
1078 }
1079
633273a3
TH
1080 if ((tf->lbam == 0x69) && (tf->lbah == 0x96)) {
1081 DPRINTK("found PMP device by sig\n");
1082 return ATA_DEV_PMP;
1083 }
1084
1085 if ((tf->lbam == 0x3c) && (tf->lbah == 0xc3)) {
79b42bab
TH
1086 DPRINTK("found SEMB device by sig (could be ATA device)\n");
1087 return ATA_DEV_SEMB;
633273a3
TH
1088 }
1089
1da177e4
LT
1090 DPRINTK("unknown device\n");
1091 return ATA_DEV_UNKNOWN;
1092}
1093
1da177e4 1094/**
6a62a04d 1095 * ata_id_string - Convert IDENTIFY DEVICE page into string
1da177e4
LT
1096 * @id: IDENTIFY DEVICE results we will examine
1097 * @s: string into which data is output
1098 * @ofs: offset into identify device page
1099 * @len: length of string to return. must be an even number.
1100 *
1101 * The strings in the IDENTIFY DEVICE page are broken up into
1102 * 16-bit chunks. Run through the string, and output each
1103 * 8-bit chunk linearly, regardless of platform.
1104 *
1105 * LOCKING:
1106 * caller.
1107 */
1108
6a62a04d
TH
1109void ata_id_string(const u16 *id, unsigned char *s,
1110 unsigned int ofs, unsigned int len)
1da177e4
LT
1111{
1112 unsigned int c;
1113
963e4975
AC
1114 BUG_ON(len & 1);
1115
1da177e4
LT
1116 while (len > 0) {
1117 c = id[ofs] >> 8;
1118 *s = c;
1119 s++;
1120
1121 c = id[ofs] & 0xff;
1122 *s = c;
1123 s++;
1124
1125 ofs++;
1126 len -= 2;
1127 }
1128}
1129
0e949ff3 1130/**
6a62a04d 1131 * ata_id_c_string - Convert IDENTIFY DEVICE page into C string
0e949ff3
TH
1132 * @id: IDENTIFY DEVICE results we will examine
1133 * @s: string into which data is output
1134 * @ofs: offset into identify device page
1135 * @len: length of string to return. must be an odd number.
1136 *
6a62a04d 1137 * This function is identical to ata_id_string except that it
0e949ff3
TH
1138 * trims trailing spaces and terminates the resulting string with
1139 * null. @len must be actual maximum length (even number) + 1.
1140 *
1141 * LOCKING:
1142 * caller.
1143 */
6a62a04d
TH
1144void ata_id_c_string(const u16 *id, unsigned char *s,
1145 unsigned int ofs, unsigned int len)
0e949ff3
TH
1146{
1147 unsigned char *p;
1148
6a62a04d 1149 ata_id_string(id, s, ofs, len - 1);
0e949ff3
TH
1150
1151 p = s + strnlen(s, len - 1);
1152 while (p > s && p[-1] == ' ')
1153 p--;
1154 *p = '\0';
1155}
0baab86b 1156
db6f8759
TH
1157static u64 ata_id_n_sectors(const u16 *id)
1158{
1159 if (ata_id_has_lba(id)) {
1160 if (ata_id_has_lba48(id))
968e594a 1161 return ata_id_u64(id, ATA_ID_LBA_CAPACITY_2);
db6f8759 1162 else
968e594a 1163 return ata_id_u32(id, ATA_ID_LBA_CAPACITY);
db6f8759
TH
1164 } else {
1165 if (ata_id_current_chs_valid(id))
968e594a
RH
1166 return id[ATA_ID_CUR_CYLS] * id[ATA_ID_CUR_HEADS] *
1167 id[ATA_ID_CUR_SECTORS];
db6f8759 1168 else
968e594a
RH
1169 return id[ATA_ID_CYLS] * id[ATA_ID_HEADS] *
1170 id[ATA_ID_SECTORS];
db6f8759
TH
1171 }
1172}
1173
a5987e0a 1174u64 ata_tf_to_lba48(const struct ata_taskfile *tf)
1e999736
AC
1175{
1176 u64 sectors = 0;
1177
1178 sectors |= ((u64)(tf->hob_lbah & 0xff)) << 40;
1179 sectors |= ((u64)(tf->hob_lbam & 0xff)) << 32;
ba14a9c2 1180 sectors |= ((u64)(tf->hob_lbal & 0xff)) << 24;
1e999736
AC
1181 sectors |= (tf->lbah & 0xff) << 16;
1182 sectors |= (tf->lbam & 0xff) << 8;
1183 sectors |= (tf->lbal & 0xff);
1184
a5987e0a 1185 return sectors;
1e999736
AC
1186}
1187
a5987e0a 1188u64 ata_tf_to_lba(const struct ata_taskfile *tf)
1e999736
AC
1189{
1190 u64 sectors = 0;
1191
1192 sectors |= (tf->device & 0x0f) << 24;
1193 sectors |= (tf->lbah & 0xff) << 16;
1194 sectors |= (tf->lbam & 0xff) << 8;
1195 sectors |= (tf->lbal & 0xff);
1196
a5987e0a 1197 return sectors;
1e999736
AC
1198}
1199
1200/**
c728a914
TH
1201 * ata_read_native_max_address - Read native max address
1202 * @dev: target device
1203 * @max_sectors: out parameter for the result native max address
1e999736 1204 *
c728a914
TH
1205 * Perform an LBA48 or LBA28 native size query upon the device in
1206 * question.
1e999736 1207 *
c728a914
TH
1208 * RETURNS:
1209 * 0 on success, -EACCES if command is aborted by the drive.
1210 * -EIO on other errors.
1e999736 1211 */
c728a914 1212static int ata_read_native_max_address(struct ata_device *dev, u64 *max_sectors)
1e999736 1213{
c728a914 1214 unsigned int err_mask;
1e999736 1215 struct ata_taskfile tf;
c728a914 1216 int lba48 = ata_id_has_lba48(dev->id);
1e999736
AC
1217
1218 ata_tf_init(dev, &tf);
1219
c728a914 1220 /* always clear all address registers */
1e999736 1221 tf.flags |= ATA_TFLAG_DEVICE | ATA_TFLAG_ISADDR;
1e999736 1222
c728a914
TH
1223 if (lba48) {
1224 tf.command = ATA_CMD_READ_NATIVE_MAX_EXT;
1225 tf.flags |= ATA_TFLAG_LBA48;
1226 } else
1227 tf.command = ATA_CMD_READ_NATIVE_MAX;
1e999736 1228
1e999736 1229 tf.protocol |= ATA_PROT_NODATA;
c728a914
TH
1230 tf.device |= ATA_LBA;
1231
2b789108 1232 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0, 0);
c728a914 1233 if (err_mask) {
a9a79dfe
JP
1234 ata_dev_warn(dev,
1235 "failed to read native max address (err_mask=0x%x)\n",
1236 err_mask);
c728a914
TH
1237 if (err_mask == AC_ERR_DEV && (tf.feature & ATA_ABORTED))
1238 return -EACCES;
1239 return -EIO;
1240 }
1e999736 1241
c728a914 1242 if (lba48)
a5987e0a 1243 *max_sectors = ata_tf_to_lba48(&tf) + 1;
c728a914 1244 else
a5987e0a 1245 *max_sectors = ata_tf_to_lba(&tf) + 1;
2dcb407e 1246 if (dev->horkage & ATA_HORKAGE_HPA_SIZE)
93328e11 1247 (*max_sectors)--;
c728a914 1248 return 0;
1e999736
AC
1249}
1250
1251/**
c728a914
TH
1252 * ata_set_max_sectors - Set max sectors
1253 * @dev: target device
6b38d1d1 1254 * @new_sectors: new max sectors value to set for the device
1e999736 1255 *
c728a914
TH
1256 * Set max sectors of @dev to @new_sectors.
1257 *
1258 * RETURNS:
1259 * 0 on success, -EACCES if command is aborted or denied (due to
1260 * previous non-volatile SET_MAX) by the drive. -EIO on other
1261 * errors.
1e999736 1262 */
05027adc 1263static int ata_set_max_sectors(struct ata_device *dev, u64 new_sectors)
1e999736 1264{
c728a914 1265 unsigned int err_mask;
1e999736 1266 struct ata_taskfile tf;
c728a914 1267 int lba48 = ata_id_has_lba48(dev->id);
1e999736
AC
1268
1269 new_sectors--;
1270
1271 ata_tf_init(dev, &tf);
1272
1e999736 1273 tf.flags |= ATA_TFLAG_DEVICE | ATA_TFLAG_ISADDR;
c728a914
TH
1274
1275 if (lba48) {
1276 tf.command = ATA_CMD_SET_MAX_EXT;
1277 tf.flags |= ATA_TFLAG_LBA48;
1278
1279 tf.hob_lbal = (new_sectors >> 24) & 0xff;
1280 tf.hob_lbam = (new_sectors >> 32) & 0xff;
1281 tf.hob_lbah = (new_sectors >> 40) & 0xff;
1e582ba4 1282 } else {
c728a914
TH
1283 tf.command = ATA_CMD_SET_MAX;
1284
1e582ba4
TH
1285 tf.device |= (new_sectors >> 24) & 0xf;
1286 }
1287
1e999736 1288 tf.protocol |= ATA_PROT_NODATA;
c728a914 1289 tf.device |= ATA_LBA;
1e999736
AC
1290
1291 tf.lbal = (new_sectors >> 0) & 0xff;
1292 tf.lbam = (new_sectors >> 8) & 0xff;
1293 tf.lbah = (new_sectors >> 16) & 0xff;
1e999736 1294
2b789108 1295 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0, 0);
c728a914 1296 if (err_mask) {
a9a79dfe
JP
1297 ata_dev_warn(dev,
1298 "failed to set max address (err_mask=0x%x)\n",
1299 err_mask);
c728a914
TH
1300 if (err_mask == AC_ERR_DEV &&
1301 (tf.feature & (ATA_ABORTED | ATA_IDNF)))
1302 return -EACCES;
1303 return -EIO;
1304 }
1305
c728a914 1306 return 0;
1e999736
AC
1307}
1308
1309/**
1310 * ata_hpa_resize - Resize a device with an HPA set
1311 * @dev: Device to resize
1312 *
1313 * Read the size of an LBA28 or LBA48 disk with HPA features and resize
1314 * it if required to the full size of the media. The caller must check
1315 * the drive has the HPA feature set enabled.
05027adc
TH
1316 *
1317 * RETURNS:
1318 * 0 on success, -errno on failure.
1e999736 1319 */
05027adc 1320static int ata_hpa_resize(struct ata_device *dev)
1e999736 1321{
05027adc
TH
1322 struct ata_eh_context *ehc = &dev->link->eh_context;
1323 int print_info = ehc->i.flags & ATA_EHI_PRINTINFO;
445d211b 1324 bool unlock_hpa = ata_ignore_hpa || dev->flags & ATA_DFLAG_UNLOCK_HPA;
05027adc
TH
1325 u64 sectors = ata_id_n_sectors(dev->id);
1326 u64 native_sectors;
c728a914 1327 int rc;
a617c09f 1328
05027adc
TH
1329 /* do we need to do it? */
1330 if (dev->class != ATA_DEV_ATA ||
1331 !ata_id_has_lba(dev->id) || !ata_id_hpa_enabled(dev->id) ||
1332 (dev->horkage & ATA_HORKAGE_BROKEN_HPA))
c728a914 1333 return 0;
1e999736 1334
05027adc
TH
1335 /* read native max address */
1336 rc = ata_read_native_max_address(dev, &native_sectors);
1337 if (rc) {
dda7aba1
TH
1338 /* If device aborted the command or HPA isn't going to
1339 * be unlocked, skip HPA resizing.
05027adc 1340 */
445d211b 1341 if (rc == -EACCES || !unlock_hpa) {
a9a79dfe
JP
1342 ata_dev_warn(dev,
1343 "HPA support seems broken, skipping HPA handling\n");
05027adc
TH
1344 dev->horkage |= ATA_HORKAGE_BROKEN_HPA;
1345
1346 /* we can continue if device aborted the command */
1347 if (rc == -EACCES)
1348 rc = 0;
1e999736 1349 }
37301a55 1350
05027adc
TH
1351 return rc;
1352 }
5920dadf 1353 dev->n_native_sectors = native_sectors;
05027adc
TH
1354
1355 /* nothing to do? */
445d211b 1356 if (native_sectors <= sectors || !unlock_hpa) {
05027adc
TH
1357 if (!print_info || native_sectors == sectors)
1358 return 0;
1359
1360 if (native_sectors > sectors)
a9a79dfe 1361 ata_dev_info(dev,
05027adc
TH
1362 "HPA detected: current %llu, native %llu\n",
1363 (unsigned long long)sectors,
1364 (unsigned long long)native_sectors);
1365 else if (native_sectors < sectors)
a9a79dfe
JP
1366 ata_dev_warn(dev,
1367 "native sectors (%llu) is smaller than sectors (%llu)\n",
05027adc
TH
1368 (unsigned long long)native_sectors,
1369 (unsigned long long)sectors);
1370 return 0;
1371 }
1372
1373 /* let's unlock HPA */
1374 rc = ata_set_max_sectors(dev, native_sectors);
1375 if (rc == -EACCES) {
1376 /* if device aborted the command, skip HPA resizing */
a9a79dfe
JP
1377 ata_dev_warn(dev,
1378 "device aborted resize (%llu -> %llu), skipping HPA handling\n",
1379 (unsigned long long)sectors,
1380 (unsigned long long)native_sectors);
05027adc
TH
1381 dev->horkage |= ATA_HORKAGE_BROKEN_HPA;
1382 return 0;
1383 } else if (rc)
1384 return rc;
1385
1386 /* re-read IDENTIFY data */
1387 rc = ata_dev_reread_id(dev, 0);
1388 if (rc) {
a9a79dfe
JP
1389 ata_dev_err(dev,
1390 "failed to re-read IDENTIFY data after HPA resizing\n");
05027adc
TH
1391 return rc;
1392 }
1393
1394 if (print_info) {
1395 u64 new_sectors = ata_id_n_sectors(dev->id);
a9a79dfe 1396 ata_dev_info(dev,
05027adc
TH
1397 "HPA unlocked: %llu -> %llu, native %llu\n",
1398 (unsigned long long)sectors,
1399 (unsigned long long)new_sectors,
1400 (unsigned long long)native_sectors);
1401 }
1402
1403 return 0;
1e999736
AC
1404}
1405
1da177e4
LT
1406/**
1407 * ata_dump_id - IDENTIFY DEVICE info debugging output
0bd3300a 1408 * @id: IDENTIFY DEVICE page to dump
1da177e4 1409 *
0bd3300a
TH
1410 * Dump selected 16-bit words from the given IDENTIFY DEVICE
1411 * page.
1da177e4
LT
1412 *
1413 * LOCKING:
1414 * caller.
1415 */
1416
0bd3300a 1417static inline void ata_dump_id(const u16 *id)
1da177e4
LT
1418{
1419 DPRINTK("49==0x%04x "
1420 "53==0x%04x "
1421 "63==0x%04x "
1422 "64==0x%04x "
1423 "75==0x%04x \n",
0bd3300a
TH
1424 id[49],
1425 id[53],
1426 id[63],
1427 id[64],
1428 id[75]);
1da177e4
LT
1429 DPRINTK("80==0x%04x "
1430 "81==0x%04x "
1431 "82==0x%04x "
1432 "83==0x%04x "
1433 "84==0x%04x \n",
0bd3300a
TH
1434 id[80],
1435 id[81],
1436 id[82],
1437 id[83],
1438 id[84]);
1da177e4
LT
1439 DPRINTK("88==0x%04x "
1440 "93==0x%04x\n",
0bd3300a
TH
1441 id[88],
1442 id[93]);
1da177e4
LT
1443}
1444
cb95d562
TH
1445/**
1446 * ata_id_xfermask - Compute xfermask from the given IDENTIFY data
1447 * @id: IDENTIFY data to compute xfer mask from
1448 *
1449 * Compute the xfermask for this device. This is not as trivial
1450 * as it seems if we must consider early devices correctly.
1451 *
1452 * FIXME: pre IDE drive timing (do we care ?).
1453 *
1454 * LOCKING:
1455 * None.
1456 *
1457 * RETURNS:
1458 * Computed xfermask
1459 */
7dc951ae 1460unsigned long ata_id_xfermask(const u16 *id)
cb95d562 1461{
7dc951ae 1462 unsigned long pio_mask, mwdma_mask, udma_mask;
cb95d562
TH
1463
1464 /* Usual case. Word 53 indicates word 64 is valid */
1465 if (id[ATA_ID_FIELD_VALID] & (1 << 1)) {
1466 pio_mask = id[ATA_ID_PIO_MODES] & 0x03;
1467 pio_mask <<= 3;
1468 pio_mask |= 0x7;
1469 } else {
1470 /* If word 64 isn't valid then Word 51 high byte holds
1471 * the PIO timing number for the maximum. Turn it into
1472 * a mask.
1473 */
7a0f1c8a 1474 u8 mode = (id[ATA_ID_OLD_PIO_MODES] >> 8) & 0xFF;
46767aeb 1475 if (mode < 5) /* Valid PIO range */
2dcb407e 1476 pio_mask = (2 << mode) - 1;
46767aeb
AC
1477 else
1478 pio_mask = 1;
cb95d562
TH
1479
1480 /* But wait.. there's more. Design your standards by
1481 * committee and you too can get a free iordy field to
1482 * process. However its the speeds not the modes that
1483 * are supported... Note drivers using the timing API
1484 * will get this right anyway
1485 */
1486 }
1487
1488 mwdma_mask = id[ATA_ID_MWDMA_MODES] & 0x07;
fb21f0d0 1489
b352e57d
AC
1490 if (ata_id_is_cfa(id)) {
1491 /*
1492 * Process compact flash extended modes
1493 */
62afe5d7
SS
1494 int pio = (id[ATA_ID_CFA_MODES] >> 0) & 0x7;
1495 int dma = (id[ATA_ID_CFA_MODES] >> 3) & 0x7;
b352e57d
AC
1496
1497 if (pio)
1498 pio_mask |= (1 << 5);
1499 if (pio > 1)
1500 pio_mask |= (1 << 6);
1501 if (dma)
1502 mwdma_mask |= (1 << 3);
1503 if (dma > 1)
1504 mwdma_mask |= (1 << 4);
1505 }
1506
fb21f0d0
TH
1507 udma_mask = 0;
1508 if (id[ATA_ID_FIELD_VALID] & (1 << 2))
1509 udma_mask = id[ATA_ID_UDMA_MODES] & 0xff;
cb95d562
TH
1510
1511 return ata_pack_xfermask(pio_mask, mwdma_mask, udma_mask);
1512}
1513
7102d230 1514static void ata_qc_complete_internal(struct ata_queued_cmd *qc)
a2a7a662 1515{
77853bf2 1516 struct completion *waiting = qc->private_data;
a2a7a662 1517
a2a7a662 1518 complete(waiting);
a2a7a662
TH
1519}
1520
1521/**
2432697b 1522 * ata_exec_internal_sg - execute libata internal command
a2a7a662
TH
1523 * @dev: Device to which the command is sent
1524 * @tf: Taskfile registers for the command and the result
d69cf37d 1525 * @cdb: CDB for packet command
a2a7a662 1526 * @dma_dir: Data tranfer direction of the command
5c1ad8b3 1527 * @sgl: sg list for the data buffer of the command
2432697b 1528 * @n_elem: Number of sg entries
2b789108 1529 * @timeout: Timeout in msecs (0 for default)
a2a7a662
TH
1530 *
1531 * Executes libata internal command with timeout. @tf contains
1532 * command on entry and result on return. Timeout and error
1533 * conditions are reported via return value. No recovery action
1534 * is taken after a command times out. It's caller's duty to
1535 * clean up after timeout.
1536 *
1537 * LOCKING:
1538 * None. Should be called with kernel context, might sleep.
551e8889
TH
1539 *
1540 * RETURNS:
1541 * Zero on success, AC_ERR_* mask on failure
a2a7a662 1542 */
2432697b
TH
1543unsigned ata_exec_internal_sg(struct ata_device *dev,
1544 struct ata_taskfile *tf, const u8 *cdb,
87260216 1545 int dma_dir, struct scatterlist *sgl,
2b789108 1546 unsigned int n_elem, unsigned long timeout)
a2a7a662 1547{
9af5c9c9
TH
1548 struct ata_link *link = dev->link;
1549 struct ata_port *ap = link->ap;
a2a7a662 1550 u8 command = tf->command;
87fbc5a0 1551 int auto_timeout = 0;
a2a7a662 1552 struct ata_queued_cmd *qc;
2ab7db1f 1553 unsigned int tag, preempted_tag;
dedaf2b0 1554 u32 preempted_sactive, preempted_qc_active;
da917d69 1555 int preempted_nr_active_links;
60be6b9a 1556 DECLARE_COMPLETION_ONSTACK(wait);
a2a7a662 1557 unsigned long flags;
77853bf2 1558 unsigned int err_mask;
d95a717f 1559 int rc;
a2a7a662 1560
ba6a1308 1561 spin_lock_irqsave(ap->lock, flags);
a2a7a662 1562
e3180499 1563 /* no internal command while frozen */
b51e9e5d 1564 if (ap->pflags & ATA_PFLAG_FROZEN) {
ba6a1308 1565 spin_unlock_irqrestore(ap->lock, flags);
e3180499
TH
1566 return AC_ERR_SYSTEM;
1567 }
1568
2ab7db1f 1569 /* initialize internal qc */
a2a7a662 1570
2ab7db1f
TH
1571 /* XXX: Tag 0 is used for drivers with legacy EH as some
1572 * drivers choke if any other tag is given. This breaks
1573 * ata_tag_internal() test for those drivers. Don't use new
1574 * EH stuff without converting to it.
1575 */
1576 if (ap->ops->error_handler)
1577 tag = ATA_TAG_INTERNAL;
1578 else
1579 tag = 0;
1580
8a8bc223
TH
1581 if (test_and_set_bit(tag, &ap->qc_allocated))
1582 BUG();
f69499f4 1583 qc = __ata_qc_from_tag(ap, tag);
2ab7db1f
TH
1584
1585 qc->tag = tag;
1586 qc->scsicmd = NULL;
1587 qc->ap = ap;
1588 qc->dev = dev;
1589 ata_qc_reinit(qc);
1590
9af5c9c9
TH
1591 preempted_tag = link->active_tag;
1592 preempted_sactive = link->sactive;
dedaf2b0 1593 preempted_qc_active = ap->qc_active;
da917d69 1594 preempted_nr_active_links = ap->nr_active_links;
9af5c9c9
TH
1595 link->active_tag = ATA_TAG_POISON;
1596 link->sactive = 0;
dedaf2b0 1597 ap->qc_active = 0;
da917d69 1598 ap->nr_active_links = 0;
2ab7db1f
TH
1599
1600 /* prepare & issue qc */
a2a7a662 1601 qc->tf = *tf;
d69cf37d
TH
1602 if (cdb)
1603 memcpy(qc->cdb, cdb, ATAPI_CDB_LEN);
e61e0672 1604 qc->flags |= ATA_QCFLAG_RESULT_TF;
a2a7a662
TH
1605 qc->dma_dir = dma_dir;
1606 if (dma_dir != DMA_NONE) {
2432697b 1607 unsigned int i, buflen = 0;
87260216 1608 struct scatterlist *sg;
2432697b 1609
87260216
JA
1610 for_each_sg(sgl, sg, n_elem, i)
1611 buflen += sg->length;
2432697b 1612
87260216 1613 ata_sg_init(qc, sgl, n_elem);
49c80429 1614 qc->nbytes = buflen;
a2a7a662
TH
1615 }
1616
77853bf2 1617 qc->private_data = &wait;
a2a7a662
TH
1618 qc->complete_fn = ata_qc_complete_internal;
1619
8e0e694a 1620 ata_qc_issue(qc);
a2a7a662 1621
ba6a1308 1622 spin_unlock_irqrestore(ap->lock, flags);
a2a7a662 1623
87fbc5a0
TH
1624 if (!timeout) {
1625 if (ata_probe_timeout)
1626 timeout = ata_probe_timeout * 1000;
1627 else {
1628 timeout = ata_internal_cmd_timeout(dev, command);
1629 auto_timeout = 1;
1630 }
1631 }
2b789108 1632
c0c362b6
TH
1633 if (ap->ops->error_handler)
1634 ata_eh_release(ap);
1635
2b789108 1636 rc = wait_for_completion_timeout(&wait, msecs_to_jiffies(timeout));
d95a717f 1637
c0c362b6
TH
1638 if (ap->ops->error_handler)
1639 ata_eh_acquire(ap);
1640
c429137a 1641 ata_sff_flush_pio_task(ap);
41ade50c 1642
d95a717f 1643 if (!rc) {
ba6a1308 1644 spin_lock_irqsave(ap->lock, flags);
a2a7a662
TH
1645
1646 /* We're racing with irq here. If we lose, the
1647 * following test prevents us from completing the qc
d95a717f
TH
1648 * twice. If we win, the port is frozen and will be
1649 * cleaned up by ->post_internal_cmd().
a2a7a662 1650 */
77853bf2 1651 if (qc->flags & ATA_QCFLAG_ACTIVE) {
d95a717f
TH
1652 qc->err_mask |= AC_ERR_TIMEOUT;
1653
1654 if (ap->ops->error_handler)
1655 ata_port_freeze(ap);
1656 else
1657 ata_qc_complete(qc);
f15a1daf 1658
0dd4b21f 1659 if (ata_msg_warn(ap))
a9a79dfe
JP
1660 ata_dev_warn(dev, "qc timeout (cmd 0x%x)\n",
1661 command);
a2a7a662
TH
1662 }
1663
ba6a1308 1664 spin_unlock_irqrestore(ap->lock, flags);
a2a7a662
TH
1665 }
1666
d95a717f
TH
1667 /* do post_internal_cmd */
1668 if (ap->ops->post_internal_cmd)
1669 ap->ops->post_internal_cmd(qc);
1670
a51d644a
TH
1671 /* perform minimal error analysis */
1672 if (qc->flags & ATA_QCFLAG_FAILED) {
1673 if (qc->result_tf.command & (ATA_ERR | ATA_DF))
1674 qc->err_mask |= AC_ERR_DEV;
1675
1676 if (!qc->err_mask)
1677 qc->err_mask |= AC_ERR_OTHER;
1678
1679 if (qc->err_mask & ~AC_ERR_OTHER)
1680 qc->err_mask &= ~AC_ERR_OTHER;
d95a717f
TH
1681 }
1682
15869303 1683 /* finish up */
ba6a1308 1684 spin_lock_irqsave(ap->lock, flags);
15869303 1685
e61e0672 1686 *tf = qc->result_tf;
77853bf2
TH
1687 err_mask = qc->err_mask;
1688
1689 ata_qc_free(qc);
9af5c9c9
TH
1690 link->active_tag = preempted_tag;
1691 link->sactive = preempted_sactive;
dedaf2b0 1692 ap->qc_active = preempted_qc_active;
da917d69 1693 ap->nr_active_links = preempted_nr_active_links;
77853bf2 1694
ba6a1308 1695 spin_unlock_irqrestore(ap->lock, flags);
15869303 1696
87fbc5a0
TH
1697 if ((err_mask & AC_ERR_TIMEOUT) && auto_timeout)
1698 ata_internal_cmd_timed_out(dev, command);
1699
77853bf2 1700 return err_mask;
a2a7a662
TH
1701}
1702
2432697b 1703/**
33480a0e 1704 * ata_exec_internal - execute libata internal command
2432697b
TH
1705 * @dev: Device to which the command is sent
1706 * @tf: Taskfile registers for the command and the result
1707 * @cdb: CDB for packet command
1708 * @dma_dir: Data tranfer direction of the command
1709 * @buf: Data buffer of the command
1710 * @buflen: Length of data buffer
2b789108 1711 * @timeout: Timeout in msecs (0 for default)
2432697b
TH
1712 *
1713 * Wrapper around ata_exec_internal_sg() which takes simple
1714 * buffer instead of sg list.
1715 *
1716 * LOCKING:
1717 * None. Should be called with kernel context, might sleep.
1718 *
1719 * RETURNS:
1720 * Zero on success, AC_ERR_* mask on failure
1721 */
1722unsigned ata_exec_internal(struct ata_device *dev,
1723 struct ata_taskfile *tf, const u8 *cdb,
2b789108
TH
1724 int dma_dir, void *buf, unsigned int buflen,
1725 unsigned long timeout)
2432697b 1726{
33480a0e
TH
1727 struct scatterlist *psg = NULL, sg;
1728 unsigned int n_elem = 0;
2432697b 1729
33480a0e
TH
1730 if (dma_dir != DMA_NONE) {
1731 WARN_ON(!buf);
1732 sg_init_one(&sg, buf, buflen);
1733 psg = &sg;
1734 n_elem++;
1735 }
2432697b 1736
2b789108
TH
1737 return ata_exec_internal_sg(dev, tf, cdb, dma_dir, psg, n_elem,
1738 timeout);
2432697b
TH
1739}
1740
977e6b9f
TH
1741/**
1742 * ata_do_simple_cmd - execute simple internal command
1743 * @dev: Device to which the command is sent
1744 * @cmd: Opcode to execute
1745 *
1746 * Execute a 'simple' command, that only consists of the opcode
1747 * 'cmd' itself, without filling any other registers
1748 *
1749 * LOCKING:
1750 * Kernel thread context (may sleep).
1751 *
1752 * RETURNS:
1753 * Zero on success, AC_ERR_* mask on failure
e58eb583 1754 */
77b08fb5 1755unsigned int ata_do_simple_cmd(struct ata_device *dev, u8 cmd)
e58eb583
TH
1756{
1757 struct ata_taskfile tf;
e58eb583
TH
1758
1759 ata_tf_init(dev, &tf);
1760
1761 tf.command = cmd;
1762 tf.flags |= ATA_TFLAG_DEVICE;
1763 tf.protocol = ATA_PROT_NODATA;
1764
2b789108 1765 return ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0, 0);
e58eb583
TH
1766}
1767
1bc4ccff
AC
1768/**
1769 * ata_pio_need_iordy - check if iordy needed
1770 * @adev: ATA device
1771 *
1772 * Check if the current speed of the device requires IORDY. Used
1773 * by various controllers for chip configuration.
1774 */
1bc4ccff
AC
1775unsigned int ata_pio_need_iordy(const struct ata_device *adev)
1776{
0d9e6659
TH
1777 /* Don't set IORDY if we're preparing for reset. IORDY may
1778 * lead to controller lock up on certain controllers if the
1779 * port is not occupied. See bko#11703 for details.
1780 */
1781 if (adev->link->ap->pflags & ATA_PFLAG_RESETTING)
1782 return 0;
1783 /* Controller doesn't support IORDY. Probably a pointless
1784 * check as the caller should know this.
1785 */
9af5c9c9 1786 if (adev->link->ap->flags & ATA_FLAG_NO_IORDY)
1bc4ccff 1787 return 0;
5c18c4d2
DD
1788 /* CF spec. r4.1 Table 22 says no iordy on PIO5 and PIO6. */
1789 if (ata_id_is_cfa(adev->id)
1790 && (adev->pio_mode == XFER_PIO_5 || adev->pio_mode == XFER_PIO_6))
1791 return 0;
432729f0
AC
1792 /* PIO3 and higher it is mandatory */
1793 if (adev->pio_mode > XFER_PIO_2)
1794 return 1;
1795 /* We turn it on when possible */
1796 if (ata_id_has_iordy(adev->id))
1bc4ccff 1797 return 1;
432729f0
AC
1798 return 0;
1799}
2e9edbf8 1800
432729f0
AC
1801/**
1802 * ata_pio_mask_no_iordy - Return the non IORDY mask
1803 * @adev: ATA device
1804 *
1805 * Compute the highest mode possible if we are not using iordy. Return
1806 * -1 if no iordy mode is available.
1807 */
432729f0
AC
1808static u32 ata_pio_mask_no_iordy(const struct ata_device *adev)
1809{
1bc4ccff 1810 /* If we have no drive specific rule, then PIO 2 is non IORDY */
1bc4ccff 1811 if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE */
432729f0 1812 u16 pio = adev->id[ATA_ID_EIDE_PIO];
1bc4ccff
AC
1813 /* Is the speed faster than the drive allows non IORDY ? */
1814 if (pio) {
1815 /* This is cycle times not frequency - watch the logic! */
1816 if (pio > 240) /* PIO2 is 240nS per cycle */
432729f0
AC
1817 return 3 << ATA_SHIFT_PIO;
1818 return 7 << ATA_SHIFT_PIO;
1bc4ccff
AC
1819 }
1820 }
432729f0 1821 return 3 << ATA_SHIFT_PIO;
1bc4ccff
AC
1822}
1823
963e4975
AC
1824/**
1825 * ata_do_dev_read_id - default ID read method
1826 * @dev: device
1827 * @tf: proposed taskfile
1828 * @id: data buffer
1829 *
1830 * Issue the identify taskfile and hand back the buffer containing
1831 * identify data. For some RAID controllers and for pre ATA devices
1832 * this function is wrapped or replaced by the driver
1833 */
1834unsigned int ata_do_dev_read_id(struct ata_device *dev,
1835 struct ata_taskfile *tf, u16 *id)
1836{
1837 return ata_exec_internal(dev, tf, NULL, DMA_FROM_DEVICE,
1838 id, sizeof(id[0]) * ATA_ID_WORDS, 0);
1839}
1840
1da177e4 1841/**
49016aca 1842 * ata_dev_read_id - Read ID data from the specified device
49016aca
TH
1843 * @dev: target device
1844 * @p_class: pointer to class of the target device (may be changed)
bff04647 1845 * @flags: ATA_READID_* flags
fe635c7e 1846 * @id: buffer to read IDENTIFY data into
1da177e4 1847 *
49016aca
TH
1848 * Read ID data from the specified device. ATA_CMD_ID_ATA is
1849 * performed on ATA devices and ATA_CMD_ID_ATAPI on ATAPI
aec5c3c1
TH
1850 * devices. This function also issues ATA_CMD_INIT_DEV_PARAMS
1851 * for pre-ATA4 drives.
1da177e4 1852 *
50a99018 1853 * FIXME: ATA_CMD_ID_ATA is optional for early drives and right
2dcb407e 1854 * now we abort if we hit that case.
50a99018 1855 *
1da177e4 1856 * LOCKING:
49016aca
TH
1857 * Kernel thread context (may sleep)
1858 *
1859 * RETURNS:
1860 * 0 on success, -errno otherwise.
1da177e4 1861 */
a9beec95 1862int ata_dev_read_id(struct ata_device *dev, unsigned int *p_class,
bff04647 1863 unsigned int flags, u16 *id)
1da177e4 1864{
9af5c9c9 1865 struct ata_port *ap = dev->link->ap;
49016aca 1866 unsigned int class = *p_class;
a0123703 1867 struct ata_taskfile tf;
49016aca
TH
1868 unsigned int err_mask = 0;
1869 const char *reason;
79b42bab 1870 bool is_semb = class == ATA_DEV_SEMB;
54936f8b 1871 int may_fallback = 1, tried_spinup = 0;
49016aca 1872 int rc;
1da177e4 1873
0dd4b21f 1874 if (ata_msg_ctl(ap))
a9a79dfe 1875 ata_dev_dbg(dev, "%s: ENTER\n", __func__);
1da177e4 1876
963e4975 1877retry:
3373efd8 1878 ata_tf_init(dev, &tf);
a0123703 1879
49016aca 1880 switch (class) {
79b42bab
TH
1881 case ATA_DEV_SEMB:
1882 class = ATA_DEV_ATA; /* some hard drives report SEMB sig */
49016aca 1883 case ATA_DEV_ATA:
a0123703 1884 tf.command = ATA_CMD_ID_ATA;
49016aca
TH
1885 break;
1886 case ATA_DEV_ATAPI:
a0123703 1887 tf.command = ATA_CMD_ID_ATAPI;
49016aca
TH
1888 break;
1889 default:
1890 rc = -ENODEV;
1891 reason = "unsupported class";
1892 goto err_out;
1da177e4
LT
1893 }
1894
a0123703 1895 tf.protocol = ATA_PROT_PIO;
81afe893
TH
1896
1897 /* Some devices choke if TF registers contain garbage. Make
1898 * sure those are properly initialized.
1899 */
1900 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
1901
1902 /* Device presence detection is unreliable on some
1903 * controllers. Always poll IDENTIFY if available.
1904 */
1905 tf.flags |= ATA_TFLAG_POLLING;
1da177e4 1906
963e4975
AC
1907 if (ap->ops->read_id)
1908 err_mask = ap->ops->read_id(dev, &tf, id);
1909 else
1910 err_mask = ata_do_dev_read_id(dev, &tf, id);
1911
a0123703 1912 if (err_mask) {
800b3996 1913 if (err_mask & AC_ERR_NODEV_HINT) {
a9a79dfe 1914 ata_dev_dbg(dev, "NODEV after polling detection\n");
55a8e2c8
TH
1915 return -ENOENT;
1916 }
1917
79b42bab 1918 if (is_semb) {
a9a79dfe
JP
1919 ata_dev_info(dev,
1920 "IDENTIFY failed on device w/ SEMB sig, disabled\n");
79b42bab
TH
1921 /* SEMB is not supported yet */
1922 *p_class = ATA_DEV_SEMB_UNSUP;
1923 return 0;
1924 }
1925
1ffc151f
TH
1926 if ((err_mask == AC_ERR_DEV) && (tf.feature & ATA_ABORTED)) {
1927 /* Device or controller might have reported
1928 * the wrong device class. Give a shot at the
1929 * other IDENTIFY if the current one is
1930 * aborted by the device.
1931 */
1932 if (may_fallback) {
1933 may_fallback = 0;
1934
1935 if (class == ATA_DEV_ATA)
1936 class = ATA_DEV_ATAPI;
1937 else
1938 class = ATA_DEV_ATA;
1939 goto retry;
1940 }
1941
1942 /* Control reaches here iff the device aborted
1943 * both flavors of IDENTIFYs which happens
1944 * sometimes with phantom devices.
1945 */
a9a79dfe
JP
1946 ata_dev_dbg(dev,
1947 "both IDENTIFYs aborted, assuming NODEV\n");
1ffc151f 1948 return -ENOENT;
54936f8b
TH
1949 }
1950
49016aca
TH
1951 rc = -EIO;
1952 reason = "I/O error";
1da177e4
LT
1953 goto err_out;
1954 }
1955
43c9c591 1956 if (dev->horkage & ATA_HORKAGE_DUMP_ID) {
a9a79dfe
JP
1957 ata_dev_dbg(dev, "dumping IDENTIFY data, "
1958 "class=%d may_fallback=%d tried_spinup=%d\n",
1959 class, may_fallback, tried_spinup);
43c9c591
TH
1960 print_hex_dump(KERN_DEBUG, "", DUMP_PREFIX_OFFSET,
1961 16, 2, id, ATA_ID_WORDS * sizeof(*id), true);
1962 }
1963
54936f8b
TH
1964 /* Falling back doesn't make sense if ID data was read
1965 * successfully at least once.
1966 */
1967 may_fallback = 0;
1968
49016aca 1969 swap_buf_le16(id, ATA_ID_WORDS);
1da177e4 1970
49016aca 1971 /* sanity check */
a4f5749b 1972 rc = -EINVAL;
6070068b 1973 reason = "device reports invalid type";
a4f5749b
TH
1974
1975 if (class == ATA_DEV_ATA) {
1976 if (!ata_id_is_ata(id) && !ata_id_is_cfa(id))
1977 goto err_out;
db63a4c8
AW
1978 if (ap->host->flags & ATA_HOST_IGNORE_ATA &&
1979 ata_id_is_ata(id)) {
1980 ata_dev_dbg(dev,
1981 "host indicates ignore ATA devices, ignored\n");
1982 return -ENOENT;
1983 }
a4f5749b
TH
1984 } else {
1985 if (ata_id_is_ata(id))
1986 goto err_out;
49016aca
TH
1987 }
1988
169439c2
ML
1989 if (!tried_spinup && (id[2] == 0x37c8 || id[2] == 0x738c)) {
1990 tried_spinup = 1;
1991 /*
1992 * Drive powered-up in standby mode, and requires a specific
1993 * SET_FEATURES spin-up subcommand before it will accept
1994 * anything other than the original IDENTIFY command.
1995 */
218f3d30 1996 err_mask = ata_dev_set_feature(dev, SETFEATURES_SPINUP, 0);
fb0582f9 1997 if (err_mask && id[2] != 0x738c) {
169439c2
ML
1998 rc = -EIO;
1999 reason = "SPINUP failed";
2000 goto err_out;
2001 }
2002 /*
2003 * If the drive initially returned incomplete IDENTIFY info,
2004 * we now must reissue the IDENTIFY command.
2005 */
2006 if (id[2] == 0x37c8)
2007 goto retry;
2008 }
2009
bff04647 2010 if ((flags & ATA_READID_POSTRESET) && class == ATA_DEV_ATA) {
49016aca
TH
2011 /*
2012 * The exact sequence expected by certain pre-ATA4 drives is:
2013 * SRST RESET
50a99018
AC
2014 * IDENTIFY (optional in early ATA)
2015 * INITIALIZE DEVICE PARAMETERS (later IDE and ATA)
49016aca
TH
2016 * anything else..
2017 * Some drives were very specific about that exact sequence.
50a99018
AC
2018 *
2019 * Note that ATA4 says lba is mandatory so the second check
c9404c9c 2020 * should never trigger.
49016aca
TH
2021 */
2022 if (ata_id_major_version(id) < 4 || !ata_id_has_lba(id)) {
3373efd8 2023 err_mask = ata_dev_init_params(dev, id[3], id[6]);
49016aca
TH
2024 if (err_mask) {
2025 rc = -EIO;
2026 reason = "INIT_DEV_PARAMS failed";
2027 goto err_out;
2028 }
2029
2030 /* current CHS translation info (id[53-58]) might be
2031 * changed. reread the identify device info.
2032 */
bff04647 2033 flags &= ~ATA_READID_POSTRESET;
49016aca
TH
2034 goto retry;
2035 }
2036 }
2037
2038 *p_class = class;
fe635c7e 2039
49016aca
TH
2040 return 0;
2041
2042 err_out:
88574551 2043 if (ata_msg_warn(ap))
a9a79dfe
JP
2044 ata_dev_warn(dev, "failed to IDENTIFY (%s, err_mask=0x%x)\n",
2045 reason, err_mask);
49016aca
TH
2046 return rc;
2047}
2048
9062712f
TH
2049static int ata_do_link_spd_horkage(struct ata_device *dev)
2050{
2051 struct ata_link *plink = ata_dev_phys_link(dev);
2052 u32 target, target_limit;
2053
2054 if (!sata_scr_valid(plink))
2055 return 0;
2056
2057 if (dev->horkage & ATA_HORKAGE_1_5_GBPS)
2058 target = 1;
2059 else
2060 return 0;
2061
2062 target_limit = (1 << target) - 1;
2063
2064 /* if already on stricter limit, no need to push further */
2065 if (plink->sata_spd_limit <= target_limit)
2066 return 0;
2067
2068 plink->sata_spd_limit = target_limit;
2069
2070 /* Request another EH round by returning -EAGAIN if link is
2071 * going faster than the target speed. Forward progress is
2072 * guaranteed by setting sata_spd_limit to target_limit above.
2073 */
2074 if (plink->sata_spd > target) {
a9a79dfe
JP
2075 ata_dev_info(dev, "applying link speed limit horkage to %s\n",
2076 sata_spd_string(target));
9062712f
TH
2077 return -EAGAIN;
2078 }
2079 return 0;
2080}
2081
3373efd8 2082static inline u8 ata_dev_knobble(struct ata_device *dev)
4b2f3ede 2083{
9af5c9c9 2084 struct ata_port *ap = dev->link->ap;
9ce8e307
JA
2085
2086 if (ata_dev_blacklisted(dev) & ATA_HORKAGE_BRIDGE_OK)
2087 return 0;
2088
9af5c9c9 2089 return ((ap->cbl == ATA_CBL_SATA) && (!ata_id_is_sata(dev->id)));
4b2f3ede
TH
2090}
2091
388539f3 2092static int ata_dev_config_ncq(struct ata_device *dev,
a6e6ce8e
TH
2093 char *desc, size_t desc_sz)
2094{
9af5c9c9 2095 struct ata_port *ap = dev->link->ap;
a6e6ce8e 2096 int hdepth = 0, ddepth = ata_id_queue_depth(dev->id);
388539f3
SL
2097 unsigned int err_mask;
2098 char *aa_desc = "";
a6e6ce8e
TH
2099
2100 if (!ata_id_has_ncq(dev->id)) {
2101 desc[0] = '\0';
388539f3 2102 return 0;
a6e6ce8e 2103 }
75683fe7 2104 if (dev->horkage & ATA_HORKAGE_NONCQ) {
6919a0a6 2105 snprintf(desc, desc_sz, "NCQ (not used)");
388539f3 2106 return 0;
6919a0a6 2107 }
a6e6ce8e 2108 if (ap->flags & ATA_FLAG_NCQ) {
cca3974e 2109 hdepth = min(ap->scsi_host->can_queue, ATA_MAX_QUEUE - 1);
a6e6ce8e
TH
2110 dev->flags |= ATA_DFLAG_NCQ;
2111 }
2112
388539f3
SL
2113 if (!(dev->horkage & ATA_HORKAGE_BROKEN_FPDMA_AA) &&
2114 (ap->flags & ATA_FLAG_FPDMA_AA) &&
2115 ata_id_has_fpdma_aa(dev->id)) {
2116 err_mask = ata_dev_set_feature(dev, SETFEATURES_SATA_ENABLE,
2117 SATA_FPDMA_AA);
2118 if (err_mask) {
a9a79dfe
JP
2119 ata_dev_err(dev,
2120 "failed to enable AA (error_mask=0x%x)\n",
2121 err_mask);
388539f3
SL
2122 if (err_mask != AC_ERR_DEV) {
2123 dev->horkage |= ATA_HORKAGE_BROKEN_FPDMA_AA;
2124 return -EIO;
2125 }
2126 } else
2127 aa_desc = ", AA";
2128 }
2129
a6e6ce8e 2130 if (hdepth >= ddepth)
388539f3 2131 snprintf(desc, desc_sz, "NCQ (depth %d)%s", ddepth, aa_desc);
a6e6ce8e 2132 else
388539f3
SL
2133 snprintf(desc, desc_sz, "NCQ (depth %d/%d)%s", hdepth,
2134 ddepth, aa_desc);
2135 return 0;
a6e6ce8e
TH
2136}
2137
49016aca 2138/**
ffeae418 2139 * ata_dev_configure - Configure the specified ATA/ATAPI device
ffeae418
TH
2140 * @dev: Target device to configure
2141 *
2142 * Configure @dev according to @dev->id. Generic and low-level
2143 * driver specific fixups are also applied.
49016aca
TH
2144 *
2145 * LOCKING:
ffeae418
TH
2146 * Kernel thread context (may sleep)
2147 *
2148 * RETURNS:
2149 * 0 on success, -errno otherwise
49016aca 2150 */
efdaedc4 2151int ata_dev_configure(struct ata_device *dev)
49016aca 2152{
9af5c9c9
TH
2153 struct ata_port *ap = dev->link->ap;
2154 struct ata_eh_context *ehc = &dev->link->eh_context;
6746544c 2155 int print_info = ehc->i.flags & ATA_EHI_PRINTINFO;
1148c3a7 2156 const u16 *id = dev->id;
7dc951ae 2157 unsigned long xfer_mask;
b352e57d 2158 char revbuf[7]; /* XYZ-99\0 */
3f64f565
EM
2159 char fwrevbuf[ATA_ID_FW_REV_LEN+1];
2160 char modelbuf[ATA_ID_PROD_LEN+1];
e6d902a3 2161 int rc;
49016aca 2162
0dd4b21f 2163 if (!ata_dev_enabled(dev) && ata_msg_info(ap)) {
a9a79dfe 2164 ata_dev_info(dev, "%s: ENTER/EXIT -- nodev\n", __func__);
ffeae418 2165 return 0;
49016aca
TH
2166 }
2167
0dd4b21f 2168 if (ata_msg_probe(ap))
a9a79dfe 2169 ata_dev_dbg(dev, "%s: ENTER\n", __func__);
1da177e4 2170
75683fe7
TH
2171 /* set horkage */
2172 dev->horkage |= ata_dev_blacklisted(dev);
33267325 2173 ata_force_horkage(dev);
75683fe7 2174
50af2fa1 2175 if (dev->horkage & ATA_HORKAGE_DISABLE) {
a9a79dfe 2176 ata_dev_info(dev, "unsupported device, disabling\n");
50af2fa1
TH
2177 ata_dev_disable(dev);
2178 return 0;
2179 }
2180
2486fa56
TH
2181 if ((!atapi_enabled || (ap->flags & ATA_FLAG_NO_ATAPI)) &&
2182 dev->class == ATA_DEV_ATAPI) {
a9a79dfe
JP
2183 ata_dev_warn(dev, "WARNING: ATAPI is %s, device ignored\n",
2184 atapi_enabled ? "not supported with this driver"
2185 : "disabled");
2486fa56
TH
2186 ata_dev_disable(dev);
2187 return 0;
2188 }
2189
9062712f
TH
2190 rc = ata_do_link_spd_horkage(dev);
2191 if (rc)
2192 return rc;
2193
6746544c
TH
2194 /* let ACPI work its magic */
2195 rc = ata_acpi_on_devcfg(dev);
2196 if (rc)
2197 return rc;
08573a86 2198
05027adc
TH
2199 /* massage HPA, do it early as it might change IDENTIFY data */
2200 rc = ata_hpa_resize(dev);
2201 if (rc)
2202 return rc;
2203
c39f5ebe 2204 /* print device capabilities */
0dd4b21f 2205 if (ata_msg_probe(ap))
a9a79dfe
JP
2206 ata_dev_dbg(dev,
2207 "%s: cfg 49:%04x 82:%04x 83:%04x 84:%04x "
2208 "85:%04x 86:%04x 87:%04x 88:%04x\n",
2209 __func__,
2210 id[49], id[82], id[83], id[84],
2211 id[85], id[86], id[87], id[88]);
c39f5ebe 2212
208a9933 2213 /* initialize to-be-configured parameters */
ea1dd4e1 2214 dev->flags &= ~ATA_DFLAG_CFG_MASK;
208a9933
TH
2215 dev->max_sectors = 0;
2216 dev->cdb_len = 0;
2217 dev->n_sectors = 0;
2218 dev->cylinders = 0;
2219 dev->heads = 0;
2220 dev->sectors = 0;
e18086d6 2221 dev->multi_count = 0;
208a9933 2222
1da177e4
LT
2223 /*
2224 * common ATA, ATAPI feature tests
2225 */
2226
ff8854b2 2227 /* find max transfer mode; for printk only */
1148c3a7 2228 xfer_mask = ata_id_xfermask(id);
1da177e4 2229
0dd4b21f
BP
2230 if (ata_msg_probe(ap))
2231 ata_dump_id(id);
1da177e4 2232
ef143d57
AL
2233 /* SCSI only uses 4-char revisions, dump full 8 chars from ATA */
2234 ata_id_c_string(dev->id, fwrevbuf, ATA_ID_FW_REV,
2235 sizeof(fwrevbuf));
2236
2237 ata_id_c_string(dev->id, modelbuf, ATA_ID_PROD,
2238 sizeof(modelbuf));
2239
1da177e4
LT
2240 /* ATA-specific feature tests */
2241 if (dev->class == ATA_DEV_ATA) {
b352e57d 2242 if (ata_id_is_cfa(id)) {
62afe5d7
SS
2243 /* CPRM may make this media unusable */
2244 if (id[ATA_ID_CFA_KEY_MGMT] & 1)
a9a79dfe
JP
2245 ata_dev_warn(dev,
2246 "supports DRM functions and may not be fully accessible\n");
b352e57d 2247 snprintf(revbuf, 7, "CFA");
ae8d4ee7 2248 } else {
2dcb407e 2249 snprintf(revbuf, 7, "ATA-%d", ata_id_major_version(id));
ae8d4ee7
AC
2250 /* Warn the user if the device has TPM extensions */
2251 if (ata_id_has_tpm(id))
a9a79dfe
JP
2252 ata_dev_warn(dev,
2253 "supports DRM functions and may not be fully accessible\n");
ae8d4ee7 2254 }
b352e57d 2255
1148c3a7 2256 dev->n_sectors = ata_id_n_sectors(id);
2940740b 2257
e18086d6
ML
2258 /* get current R/W Multiple count setting */
2259 if ((dev->id[47] >> 8) == 0x80 && (dev->id[59] & 0x100)) {
2260 unsigned int max = dev->id[47] & 0xff;
2261 unsigned int cnt = dev->id[59] & 0xff;
2262 /* only recognize/allow powers of two here */
2263 if (is_power_of_2(max) && is_power_of_2(cnt))
2264 if (cnt <= max)
2265 dev->multi_count = cnt;
2266 }
3f64f565 2267
1148c3a7 2268 if (ata_id_has_lba(id)) {
4c2d721a 2269 const char *lba_desc;
388539f3 2270 char ncq_desc[24];
8bf62ece 2271
4c2d721a
TH
2272 lba_desc = "LBA";
2273 dev->flags |= ATA_DFLAG_LBA;
1148c3a7 2274 if (ata_id_has_lba48(id)) {
8bf62ece 2275 dev->flags |= ATA_DFLAG_LBA48;
4c2d721a 2276 lba_desc = "LBA48";
6fc49adb
TH
2277
2278 if (dev->n_sectors >= (1UL << 28) &&
2279 ata_id_has_flush_ext(id))
2280 dev->flags |= ATA_DFLAG_FLUSH_EXT;
4c2d721a 2281 }
8bf62ece 2282
a6e6ce8e 2283 /* config NCQ */
388539f3
SL
2284 rc = ata_dev_config_ncq(dev, ncq_desc, sizeof(ncq_desc));
2285 if (rc)
2286 return rc;
a6e6ce8e 2287
8bf62ece 2288 /* print device info to dmesg */
3f64f565 2289 if (ata_msg_drv(ap) && print_info) {
a9a79dfe
JP
2290 ata_dev_info(dev, "%s: %s, %s, max %s\n",
2291 revbuf, modelbuf, fwrevbuf,
2292 ata_mode_string(xfer_mask));
2293 ata_dev_info(dev,
2294 "%llu sectors, multi %u: %s %s\n",
f15a1daf 2295 (unsigned long long)dev->n_sectors,
3f64f565
EM
2296 dev->multi_count, lba_desc, ncq_desc);
2297 }
ffeae418 2298 } else {
8bf62ece
AL
2299 /* CHS */
2300
2301 /* Default translation */
1148c3a7
TH
2302 dev->cylinders = id[1];
2303 dev->heads = id[3];
2304 dev->sectors = id[6];
8bf62ece 2305
1148c3a7 2306 if (ata_id_current_chs_valid(id)) {
8bf62ece 2307 /* Current CHS translation is valid. */
1148c3a7
TH
2308 dev->cylinders = id[54];
2309 dev->heads = id[55];
2310 dev->sectors = id[56];
8bf62ece
AL
2311 }
2312
2313 /* print device info to dmesg */
3f64f565 2314 if (ata_msg_drv(ap) && print_info) {
a9a79dfe
JP
2315 ata_dev_info(dev, "%s: %s, %s, max %s\n",
2316 revbuf, modelbuf, fwrevbuf,
2317 ata_mode_string(xfer_mask));
2318 ata_dev_info(dev,
2319 "%llu sectors, multi %u, CHS %u/%u/%u\n",
2320 (unsigned long long)dev->n_sectors,
2321 dev->multi_count, dev->cylinders,
2322 dev->heads, dev->sectors);
3f64f565 2323 }
07f6f7d0
AL
2324 }
2325
6e7846e9 2326 dev->cdb_len = 16;
1da177e4
LT
2327 }
2328
2329 /* ATAPI-specific feature tests */
2c13b7ce 2330 else if (dev->class == ATA_DEV_ATAPI) {
854c73a2
TH
2331 const char *cdb_intr_string = "";
2332 const char *atapi_an_string = "";
91163006 2333 const char *dma_dir_string = "";
7d77b247 2334 u32 sntf;
08a556db 2335
1148c3a7 2336 rc = atapi_cdb_len(id);
1da177e4 2337 if ((rc < 12) || (rc > ATAPI_CDB_LEN)) {
0dd4b21f 2338 if (ata_msg_warn(ap))
a9a79dfe 2339 ata_dev_warn(dev, "unsupported CDB len\n");
ffeae418 2340 rc = -EINVAL;
1da177e4
LT
2341 goto err_out_nosup;
2342 }
6e7846e9 2343 dev->cdb_len = (unsigned int) rc;
1da177e4 2344
7d77b247
TH
2345 /* Enable ATAPI AN if both the host and device have
2346 * the support. If PMP is attached, SNTF is required
2347 * to enable ATAPI AN to discern between PHY status
2348 * changed notifications and ATAPI ANs.
9f45cbd3 2349 */
e7ecd435
TH
2350 if (atapi_an &&
2351 (ap->flags & ATA_FLAG_AN) && ata_id_has_atapi_AN(id) &&
071f44b1 2352 (!sata_pmp_attached(ap) ||
7d77b247 2353 sata_scr_read(&ap->link, SCR_NOTIFICATION, &sntf) == 0)) {
854c73a2
TH
2354 unsigned int err_mask;
2355
9f45cbd3 2356 /* issue SET feature command to turn this on */
218f3d30
JG
2357 err_mask = ata_dev_set_feature(dev,
2358 SETFEATURES_SATA_ENABLE, SATA_AN);
854c73a2 2359 if (err_mask)
a9a79dfe
JP
2360 ata_dev_err(dev,
2361 "failed to enable ATAPI AN (err_mask=0x%x)\n",
2362 err_mask);
854c73a2 2363 else {
9f45cbd3 2364 dev->flags |= ATA_DFLAG_AN;
854c73a2
TH
2365 atapi_an_string = ", ATAPI AN";
2366 }
9f45cbd3
KCA
2367 }
2368
08a556db 2369 if (ata_id_cdb_intr(dev->id)) {
312f7da2 2370 dev->flags |= ATA_DFLAG_CDB_INTR;
08a556db
AL
2371 cdb_intr_string = ", CDB intr";
2372 }
312f7da2 2373
91163006
TH
2374 if (atapi_dmadir || atapi_id_dmadir(dev->id)) {
2375 dev->flags |= ATA_DFLAG_DMADIR;
2376 dma_dir_string = ", DMADIR";
2377 }
2378
b1354cbb
LM
2379 if (ata_id_has_da(dev->id))
2380 dev->flags |= ATA_DFLAG_DA;
2381
1da177e4 2382 /* print device info to dmesg */
5afc8142 2383 if (ata_msg_drv(ap) && print_info)
a9a79dfe
JP
2384 ata_dev_info(dev,
2385 "ATAPI: %s, %s, max %s%s%s%s\n",
2386 modelbuf, fwrevbuf,
2387 ata_mode_string(xfer_mask),
2388 cdb_intr_string, atapi_an_string,
2389 dma_dir_string);
1da177e4
LT
2390 }
2391
914ed354
TH
2392 /* determine max_sectors */
2393 dev->max_sectors = ATA_MAX_SECTORS;
2394 if (dev->flags & ATA_DFLAG_LBA48)
2395 dev->max_sectors = ATA_MAX_SECTORS_LBA48;
2396
c5038fc0
AC
2397 /* Limit PATA drive on SATA cable bridge transfers to udma5,
2398 200 sectors */
3373efd8 2399 if (ata_dev_knobble(dev)) {
5afc8142 2400 if (ata_msg_drv(ap) && print_info)
a9a79dfe 2401 ata_dev_info(dev, "applying bridge limits\n");
5a529139 2402 dev->udma_mask &= ATA_UDMA5;
4b2f3ede
TH
2403 dev->max_sectors = ATA_MAX_SECTORS;
2404 }
2405
f8d8e579 2406 if ((dev->class == ATA_DEV_ATAPI) &&
f442cd86 2407 (atapi_command_packet_set(id) == TYPE_TAPE)) {
f8d8e579 2408 dev->max_sectors = ATA_MAX_SECTORS_TAPE;
f442cd86
AL
2409 dev->horkage |= ATA_HORKAGE_STUCK_ERR;
2410 }
f8d8e579 2411
75683fe7 2412 if (dev->horkage & ATA_HORKAGE_MAX_SEC_128)
03ec52de
TH
2413 dev->max_sectors = min_t(unsigned int, ATA_MAX_SECTORS_128,
2414 dev->max_sectors);
18d6e9d5 2415
4b2f3ede 2416 if (ap->ops->dev_config)
cd0d3bbc 2417 ap->ops->dev_config(dev);
4b2f3ede 2418
c5038fc0
AC
2419 if (dev->horkage & ATA_HORKAGE_DIAGNOSTIC) {
2420 /* Let the user know. We don't want to disallow opens for
2421 rescue purposes, or in case the vendor is just a blithering
2422 idiot. Do this after the dev_config call as some controllers
2423 with buggy firmware may want to avoid reporting false device
2424 bugs */
2425
2426 if (print_info) {
a9a79dfe 2427 ata_dev_warn(dev,
c5038fc0 2428"Drive reports diagnostics failure. This may indicate a drive\n");
a9a79dfe 2429 ata_dev_warn(dev,
c5038fc0
AC
2430"fault or invalid emulation. Contact drive vendor for information.\n");
2431 }
2432 }
2433
ac70a964 2434 if ((dev->horkage & ATA_HORKAGE_FIRMWARE_WARN) && print_info) {
a9a79dfe
JP
2435 ata_dev_warn(dev, "WARNING: device requires firmware update to be fully functional\n");
2436 ata_dev_warn(dev, " contact the vendor or visit http://ata.wiki.kernel.org\n");
ac70a964
TH
2437 }
2438
ffeae418 2439 return 0;
1da177e4
LT
2440
2441err_out_nosup:
0dd4b21f 2442 if (ata_msg_probe(ap))
a9a79dfe 2443 ata_dev_dbg(dev, "%s: EXIT, err\n", __func__);
ffeae418 2444 return rc;
1da177e4
LT
2445}
2446
be0d18df 2447/**
2e41e8e6 2448 * ata_cable_40wire - return 40 wire cable type
be0d18df
AC
2449 * @ap: port
2450 *
2e41e8e6 2451 * Helper method for drivers which want to hardwire 40 wire cable
be0d18df
AC
2452 * detection.
2453 */
2454
2455int ata_cable_40wire(struct ata_port *ap)
2456{
2457 return ATA_CBL_PATA40;
2458}
2459
2460/**
2e41e8e6 2461 * ata_cable_80wire - return 80 wire cable type
be0d18df
AC
2462 * @ap: port
2463 *
2e41e8e6 2464 * Helper method for drivers which want to hardwire 80 wire cable
be0d18df
AC
2465 * detection.
2466 */
2467
2468int ata_cable_80wire(struct ata_port *ap)
2469{
2470 return ATA_CBL_PATA80;
2471}
2472
2473/**
2474 * ata_cable_unknown - return unknown PATA cable.
2475 * @ap: port
2476 *
2477 * Helper method for drivers which have no PATA cable detection.
2478 */
2479
2480int ata_cable_unknown(struct ata_port *ap)
2481{
2482 return ATA_CBL_PATA_UNK;
2483}
2484
c88f90c3
TH
2485/**
2486 * ata_cable_ignore - return ignored PATA cable.
2487 * @ap: port
2488 *
2489 * Helper method for drivers which don't use cable type to limit
2490 * transfer mode.
2491 */
2492int ata_cable_ignore(struct ata_port *ap)
2493{
2494 return ATA_CBL_PATA_IGN;
2495}
2496
be0d18df
AC
2497/**
2498 * ata_cable_sata - return SATA cable type
2499 * @ap: port
2500 *
2501 * Helper method for drivers which have SATA cables
2502 */
2503
2504int ata_cable_sata(struct ata_port *ap)
2505{
2506 return ATA_CBL_SATA;
2507}
2508
1da177e4
LT
2509/**
2510 * ata_bus_probe - Reset and probe ATA bus
2511 * @ap: Bus to probe
2512 *
0cba632b
JG
2513 * Master ATA bus probing function. Initiates a hardware-dependent
2514 * bus reset, then attempts to identify any devices found on
2515 * the bus.
2516 *
1da177e4 2517 * LOCKING:
0cba632b 2518 * PCI/etc. bus probe sem.
1da177e4
LT
2519 *
2520 * RETURNS:
96072e69 2521 * Zero on success, negative errno otherwise.
1da177e4
LT
2522 */
2523
80289167 2524int ata_bus_probe(struct ata_port *ap)
1da177e4 2525{
28ca5c57 2526 unsigned int classes[ATA_MAX_DEVICES];
14d2bac1 2527 int tries[ATA_MAX_DEVICES];
f58229f8 2528 int rc;
e82cbdb9 2529 struct ata_device *dev;
1da177e4 2530
1eca4365 2531 ata_for_each_dev(dev, &ap->link, ALL)
f58229f8 2532 tries[dev->devno] = ATA_PROBE_MAX_TRIES;
14d2bac1
TH
2533
2534 retry:
1eca4365 2535 ata_for_each_dev(dev, &ap->link, ALL) {
cdeab114
TH
2536 /* If we issue an SRST then an ATA drive (not ATAPI)
2537 * may change configuration and be in PIO0 timing. If
2538 * we do a hard reset (or are coming from power on)
2539 * this is true for ATA or ATAPI. Until we've set a
2540 * suitable controller mode we should not touch the
2541 * bus as we may be talking too fast.
2542 */
2543 dev->pio_mode = XFER_PIO_0;
2544
2545 /* If the controller has a pio mode setup function
2546 * then use it to set the chipset to rights. Don't
2547 * touch the DMA setup as that will be dealt with when
2548 * configuring devices.
2549 */
2550 if (ap->ops->set_piomode)
2551 ap->ops->set_piomode(ap, dev);
2552 }
2553
2044470c 2554 /* reset and determine device classes */
52783c5d 2555 ap->ops->phy_reset(ap);
2061a47a 2556
1eca4365 2557 ata_for_each_dev(dev, &ap->link, ALL) {
3e4ec344 2558 if (dev->class != ATA_DEV_UNKNOWN)
52783c5d
TH
2559 classes[dev->devno] = dev->class;
2560 else
2561 classes[dev->devno] = ATA_DEV_NONE;
2044470c 2562
52783c5d 2563 dev->class = ATA_DEV_UNKNOWN;
28ca5c57 2564 }
1da177e4 2565
f31f0cc2
JG
2566 /* read IDENTIFY page and configure devices. We have to do the identify
2567 specific sequence bass-ackwards so that PDIAG- is released by
2568 the slave device */
2569
1eca4365 2570 ata_for_each_dev(dev, &ap->link, ALL_REVERSE) {
f58229f8
TH
2571 if (tries[dev->devno])
2572 dev->class = classes[dev->devno];
ffeae418 2573
14d2bac1 2574 if (!ata_dev_enabled(dev))
ffeae418 2575 continue;
ffeae418 2576
bff04647
TH
2577 rc = ata_dev_read_id(dev, &dev->class, ATA_READID_POSTRESET,
2578 dev->id);
14d2bac1
TH
2579 if (rc)
2580 goto fail;
f31f0cc2
JG
2581 }
2582
be0d18df
AC
2583 /* Now ask for the cable type as PDIAG- should have been released */
2584 if (ap->ops->cable_detect)
2585 ap->cbl = ap->ops->cable_detect(ap);
2586
1eca4365
TH
2587 /* We may have SATA bridge glue hiding here irrespective of
2588 * the reported cable types and sensed types. When SATA
2589 * drives indicate we have a bridge, we don't know which end
2590 * of the link the bridge is which is a problem.
2591 */
2592 ata_for_each_dev(dev, &ap->link, ENABLED)
614fe29b
AC
2593 if (ata_id_is_sata(dev->id))
2594 ap->cbl = ATA_CBL_SATA;
614fe29b 2595
f31f0cc2
JG
2596 /* After the identify sequence we can now set up the devices. We do
2597 this in the normal order so that the user doesn't get confused */
2598
1eca4365 2599 ata_for_each_dev(dev, &ap->link, ENABLED) {
9af5c9c9 2600 ap->link.eh_context.i.flags |= ATA_EHI_PRINTINFO;
efdaedc4 2601 rc = ata_dev_configure(dev);
9af5c9c9 2602 ap->link.eh_context.i.flags &= ~ATA_EHI_PRINTINFO;
14d2bac1
TH
2603 if (rc)
2604 goto fail;
1da177e4
LT
2605 }
2606
e82cbdb9 2607 /* configure transfer mode */
0260731f 2608 rc = ata_set_mode(&ap->link, &dev);
4ae72a1e 2609 if (rc)
51713d35 2610 goto fail;
1da177e4 2611
1eca4365
TH
2612 ata_for_each_dev(dev, &ap->link, ENABLED)
2613 return 0;
1da177e4 2614
96072e69 2615 return -ENODEV;
14d2bac1
TH
2616
2617 fail:
4ae72a1e
TH
2618 tries[dev->devno]--;
2619
14d2bac1
TH
2620 switch (rc) {
2621 case -EINVAL:
4ae72a1e 2622 /* eeek, something went very wrong, give up */
14d2bac1
TH
2623 tries[dev->devno] = 0;
2624 break;
4ae72a1e
TH
2625
2626 case -ENODEV:
2627 /* give it just one more chance */
2628 tries[dev->devno] = min(tries[dev->devno], 1);
14d2bac1 2629 case -EIO:
4ae72a1e
TH
2630 if (tries[dev->devno] == 1) {
2631 /* This is the last chance, better to slow
2632 * down than lose it.
2633 */
a07d499b 2634 sata_down_spd_limit(&ap->link, 0);
4ae72a1e
TH
2635 ata_down_xfermask_limit(dev, ATA_DNXFER_PIO);
2636 }
14d2bac1
TH
2637 }
2638
4ae72a1e 2639 if (!tries[dev->devno])
3373efd8 2640 ata_dev_disable(dev);
ec573755 2641
14d2bac1 2642 goto retry;
1da177e4
LT
2643}
2644
3be680b7
TH
2645/**
2646 * sata_print_link_status - Print SATA link status
936fd732 2647 * @link: SATA link to printk link status about
3be680b7
TH
2648 *
2649 * This function prints link speed and status of a SATA link.
2650 *
2651 * LOCKING:
2652 * None.
2653 */
6bdb4fc9 2654static void sata_print_link_status(struct ata_link *link)
3be680b7 2655{
6d5f9732 2656 u32 sstatus, scontrol, tmp;
3be680b7 2657
936fd732 2658 if (sata_scr_read(link, SCR_STATUS, &sstatus))
3be680b7 2659 return;
936fd732 2660 sata_scr_read(link, SCR_CONTROL, &scontrol);
3be680b7 2661
b1c72916 2662 if (ata_phys_link_online(link)) {
3be680b7 2663 tmp = (sstatus >> 4) & 0xf;
a9a79dfe
JP
2664 ata_link_info(link, "SATA link up %s (SStatus %X SControl %X)\n",
2665 sata_spd_string(tmp), sstatus, scontrol);
3be680b7 2666 } else {
a9a79dfe
JP
2667 ata_link_info(link, "SATA link down (SStatus %X SControl %X)\n",
2668 sstatus, scontrol);
3be680b7
TH
2669 }
2670}
2671
ebdfca6e
AC
2672/**
2673 * ata_dev_pair - return other device on cable
ebdfca6e
AC
2674 * @adev: device
2675 *
2676 * Obtain the other device on the same cable, or if none is
2677 * present NULL is returned
2678 */
2e9edbf8 2679
3373efd8 2680struct ata_device *ata_dev_pair(struct ata_device *adev)
ebdfca6e 2681{
9af5c9c9
TH
2682 struct ata_link *link = adev->link;
2683 struct ata_device *pair = &link->device[1 - adev->devno];
e1211e3f 2684 if (!ata_dev_enabled(pair))
ebdfca6e
AC
2685 return NULL;
2686 return pair;
2687}
2688
1c3fae4d 2689/**
3c567b7d 2690 * sata_down_spd_limit - adjust SATA spd limit downward
936fd732 2691 * @link: Link to adjust SATA spd limit for
a07d499b 2692 * @spd_limit: Additional limit
1c3fae4d 2693 *
936fd732 2694 * Adjust SATA spd limit of @link downward. Note that this
1c3fae4d 2695 * function only adjusts the limit. The change must be applied
3c567b7d 2696 * using sata_set_spd().
1c3fae4d 2697 *
a07d499b
TH
2698 * If @spd_limit is non-zero, the speed is limited to equal to or
2699 * lower than @spd_limit if such speed is supported. If
2700 * @spd_limit is slower than any supported speed, only the lowest
2701 * supported speed is allowed.
2702 *
1c3fae4d
TH
2703 * LOCKING:
2704 * Inherited from caller.
2705 *
2706 * RETURNS:
2707 * 0 on success, negative errno on failure
2708 */
a07d499b 2709int sata_down_spd_limit(struct ata_link *link, u32 spd_limit)
1c3fae4d 2710{
81952c54 2711 u32 sstatus, spd, mask;
a07d499b 2712 int rc, bit;
1c3fae4d 2713
936fd732 2714 if (!sata_scr_valid(link))
008a7896
TH
2715 return -EOPNOTSUPP;
2716
2717 /* If SCR can be read, use it to determine the current SPD.
936fd732 2718 * If not, use cached value in link->sata_spd.
008a7896 2719 */
936fd732 2720 rc = sata_scr_read(link, SCR_STATUS, &sstatus);
9913ff8a 2721 if (rc == 0 && ata_sstatus_online(sstatus))
008a7896
TH
2722 spd = (sstatus >> 4) & 0xf;
2723 else
936fd732 2724 spd = link->sata_spd;
1c3fae4d 2725
936fd732 2726 mask = link->sata_spd_limit;
1c3fae4d
TH
2727 if (mask <= 1)
2728 return -EINVAL;
008a7896
TH
2729
2730 /* unconditionally mask off the highest bit */
a07d499b
TH
2731 bit = fls(mask) - 1;
2732 mask &= ~(1 << bit);
1c3fae4d 2733
008a7896
TH
2734 /* Mask off all speeds higher than or equal to the current
2735 * one. Force 1.5Gbps if current SPD is not available.
2736 */
2737 if (spd > 1)
2738 mask &= (1 << (spd - 1)) - 1;
2739 else
2740 mask &= 1;
2741
2742 /* were we already at the bottom? */
1c3fae4d
TH
2743 if (!mask)
2744 return -EINVAL;
2745
a07d499b
TH
2746 if (spd_limit) {
2747 if (mask & ((1 << spd_limit) - 1))
2748 mask &= (1 << spd_limit) - 1;
2749 else {
2750 bit = ffs(mask) - 1;
2751 mask = 1 << bit;
2752 }
2753 }
2754
936fd732 2755 link->sata_spd_limit = mask;
1c3fae4d 2756
a9a79dfe
JP
2757 ata_link_warn(link, "limiting SATA link speed to %s\n",
2758 sata_spd_string(fls(mask)));
1c3fae4d
TH
2759
2760 return 0;
2761}
2762
936fd732 2763static int __sata_set_spd_needed(struct ata_link *link, u32 *scontrol)
1c3fae4d 2764{
5270222f
TH
2765 struct ata_link *host_link = &link->ap->link;
2766 u32 limit, target, spd;
1c3fae4d 2767
5270222f
TH
2768 limit = link->sata_spd_limit;
2769
2770 /* Don't configure downstream link faster than upstream link.
2771 * It doesn't speed up anything and some PMPs choke on such
2772 * configuration.
2773 */
2774 if (!ata_is_host_link(link) && host_link->sata_spd)
2775 limit &= (1 << host_link->sata_spd) - 1;
2776
2777 if (limit == UINT_MAX)
2778 target = 0;
1c3fae4d 2779 else
5270222f 2780 target = fls(limit);
1c3fae4d
TH
2781
2782 spd = (*scontrol >> 4) & 0xf;
5270222f 2783 *scontrol = (*scontrol & ~0xf0) | ((target & 0xf) << 4);
1c3fae4d 2784
5270222f 2785 return spd != target;
1c3fae4d
TH
2786}
2787
2788/**
3c567b7d 2789 * sata_set_spd_needed - is SATA spd configuration needed
936fd732 2790 * @link: Link in question
1c3fae4d
TH
2791 *
2792 * Test whether the spd limit in SControl matches
936fd732 2793 * @link->sata_spd_limit. This function is used to determine
1c3fae4d
TH
2794 * whether hardreset is necessary to apply SATA spd
2795 * configuration.
2796 *
2797 * LOCKING:
2798 * Inherited from caller.
2799 *
2800 * RETURNS:
2801 * 1 if SATA spd configuration is needed, 0 otherwise.
2802 */
1dc55e87 2803static int sata_set_spd_needed(struct ata_link *link)
1c3fae4d
TH
2804{
2805 u32 scontrol;
2806
936fd732 2807 if (sata_scr_read(link, SCR_CONTROL, &scontrol))
db64bcf3 2808 return 1;
1c3fae4d 2809
936fd732 2810 return __sata_set_spd_needed(link, &scontrol);
1c3fae4d
TH
2811}
2812
2813/**
3c567b7d 2814 * sata_set_spd - set SATA spd according to spd limit
936fd732 2815 * @link: Link to set SATA spd for
1c3fae4d 2816 *
936fd732 2817 * Set SATA spd of @link according to sata_spd_limit.
1c3fae4d
TH
2818 *
2819 * LOCKING:
2820 * Inherited from caller.
2821 *
2822 * RETURNS:
2823 * 0 if spd doesn't need to be changed, 1 if spd has been
81952c54 2824 * changed. Negative errno if SCR registers are inaccessible.
1c3fae4d 2825 */
936fd732 2826int sata_set_spd(struct ata_link *link)
1c3fae4d
TH
2827{
2828 u32 scontrol;
81952c54 2829 int rc;
1c3fae4d 2830
936fd732 2831 if ((rc = sata_scr_read(link, SCR_CONTROL, &scontrol)))
81952c54 2832 return rc;
1c3fae4d 2833
936fd732 2834 if (!__sata_set_spd_needed(link, &scontrol))
1c3fae4d
TH
2835 return 0;
2836
936fd732 2837 if ((rc = sata_scr_write(link, SCR_CONTROL, scontrol)))
81952c54
TH
2838 return rc;
2839
1c3fae4d
TH
2840 return 1;
2841}
2842
452503f9
AC
2843/*
2844 * This mode timing computation functionality is ported over from
2845 * drivers/ide/ide-timing.h and was originally written by Vojtech Pavlik
2846 */
2847/*
b352e57d 2848 * PIO 0-4, MWDMA 0-2 and UDMA 0-6 timings (in nanoseconds).
452503f9 2849 * These were taken from ATA/ATAPI-6 standard, rev 0a, except
b352e57d
AC
2850 * for UDMA6, which is currently supported only by Maxtor drives.
2851 *
2852 * For PIO 5/6 MWDMA 3/4 see the CFA specification 3.0.
452503f9
AC
2853 */
2854
2855static const struct ata_timing ata_timing[] = {
3ada9c12
DD
2856/* { XFER_PIO_SLOW, 120, 290, 240, 960, 290, 240, 0, 960, 0 }, */
2857 { XFER_PIO_0, 70, 290, 240, 600, 165, 150, 0, 600, 0 },
2858 { XFER_PIO_1, 50, 290, 93, 383, 125, 100, 0, 383, 0 },
2859 { XFER_PIO_2, 30, 290, 40, 330, 100, 90, 0, 240, 0 },
2860 { XFER_PIO_3, 30, 80, 70, 180, 80, 70, 0, 180, 0 },
2861 { XFER_PIO_4, 25, 70, 25, 120, 70, 25, 0, 120, 0 },
2862 { XFER_PIO_5, 15, 65, 25, 100, 65, 25, 0, 100, 0 },
2863 { XFER_PIO_6, 10, 55, 20, 80, 55, 20, 0, 80, 0 },
2864
2865 { XFER_SW_DMA_0, 120, 0, 0, 0, 480, 480, 50, 960, 0 },
2866 { XFER_SW_DMA_1, 90, 0, 0, 0, 240, 240, 30, 480, 0 },
2867 { XFER_SW_DMA_2, 60, 0, 0, 0, 120, 120, 20, 240, 0 },
2868
2869 { XFER_MW_DMA_0, 60, 0, 0, 0, 215, 215, 20, 480, 0 },
2870 { XFER_MW_DMA_1, 45, 0, 0, 0, 80, 50, 5, 150, 0 },
2871 { XFER_MW_DMA_2, 25, 0, 0, 0, 70, 25, 5, 120, 0 },
2872 { XFER_MW_DMA_3, 25, 0, 0, 0, 65, 25, 5, 100, 0 },
2873 { XFER_MW_DMA_4, 25, 0, 0, 0, 55, 20, 5, 80, 0 },
2874
2875/* { XFER_UDMA_SLOW, 0, 0, 0, 0, 0, 0, 0, 0, 150 }, */
2876 { XFER_UDMA_0, 0, 0, 0, 0, 0, 0, 0, 0, 120 },
2877 { XFER_UDMA_1, 0, 0, 0, 0, 0, 0, 0, 0, 80 },
2878 { XFER_UDMA_2, 0, 0, 0, 0, 0, 0, 0, 0, 60 },
2879 { XFER_UDMA_3, 0, 0, 0, 0, 0, 0, 0, 0, 45 },
2880 { XFER_UDMA_4, 0, 0, 0, 0, 0, 0, 0, 0, 30 },
2881 { XFER_UDMA_5, 0, 0, 0, 0, 0, 0, 0, 0, 20 },
2882 { XFER_UDMA_6, 0, 0, 0, 0, 0, 0, 0, 0, 15 },
452503f9
AC
2883
2884 { 0xFF }
2885};
2886
2dcb407e
JG
2887#define ENOUGH(v, unit) (((v)-1)/(unit)+1)
2888#define EZ(v, unit) ((v)?ENOUGH(v, unit):0)
452503f9
AC
2889
2890static void ata_timing_quantize(const struct ata_timing *t, struct ata_timing *q, int T, int UT)
2891{
3ada9c12
DD
2892 q->setup = EZ(t->setup * 1000, T);
2893 q->act8b = EZ(t->act8b * 1000, T);
2894 q->rec8b = EZ(t->rec8b * 1000, T);
2895 q->cyc8b = EZ(t->cyc8b * 1000, T);
2896 q->active = EZ(t->active * 1000, T);
2897 q->recover = EZ(t->recover * 1000, T);
2898 q->dmack_hold = EZ(t->dmack_hold * 1000, T);
2899 q->cycle = EZ(t->cycle * 1000, T);
2900 q->udma = EZ(t->udma * 1000, UT);
452503f9
AC
2901}
2902
2903void ata_timing_merge(const struct ata_timing *a, const struct ata_timing *b,
2904 struct ata_timing *m, unsigned int what)
2905{
2906 if (what & ATA_TIMING_SETUP ) m->setup = max(a->setup, b->setup);
2907 if (what & ATA_TIMING_ACT8B ) m->act8b = max(a->act8b, b->act8b);
2908 if (what & ATA_TIMING_REC8B ) m->rec8b = max(a->rec8b, b->rec8b);
2909 if (what & ATA_TIMING_CYC8B ) m->cyc8b = max(a->cyc8b, b->cyc8b);
2910 if (what & ATA_TIMING_ACTIVE ) m->active = max(a->active, b->active);
2911 if (what & ATA_TIMING_RECOVER) m->recover = max(a->recover, b->recover);
3ada9c12 2912 if (what & ATA_TIMING_DMACK_HOLD) m->dmack_hold = max(a->dmack_hold, b->dmack_hold);
452503f9
AC
2913 if (what & ATA_TIMING_CYCLE ) m->cycle = max(a->cycle, b->cycle);
2914 if (what & ATA_TIMING_UDMA ) m->udma = max(a->udma, b->udma);
2915}
2916
6357357c 2917const struct ata_timing *ata_timing_find_mode(u8 xfer_mode)
452503f9 2918{
70cd071e
TH
2919 const struct ata_timing *t = ata_timing;
2920
2921 while (xfer_mode > t->mode)
2922 t++;
452503f9 2923
70cd071e
TH
2924 if (xfer_mode == t->mode)
2925 return t;
2926 return NULL;
452503f9
AC
2927}
2928
2929int ata_timing_compute(struct ata_device *adev, unsigned short speed,
2930 struct ata_timing *t, int T, int UT)
2931{
9e8808a9 2932 const u16 *id = adev->id;
452503f9
AC
2933 const struct ata_timing *s;
2934 struct ata_timing p;
2935
2936 /*
2e9edbf8 2937 * Find the mode.
75b1f2f8 2938 */
452503f9
AC
2939
2940 if (!(s = ata_timing_find_mode(speed)))
2941 return -EINVAL;
2942
75b1f2f8
AL
2943 memcpy(t, s, sizeof(*s));
2944
452503f9
AC
2945 /*
2946 * If the drive is an EIDE drive, it can tell us it needs extended
2947 * PIO/MW_DMA cycle timing.
2948 */
2949
9e8808a9 2950 if (id[ATA_ID_FIELD_VALID] & 2) { /* EIDE drive */
452503f9 2951 memset(&p, 0, sizeof(p));
9e8808a9 2952
bff00256 2953 if (speed >= XFER_PIO_0 && speed < XFER_SW_DMA_0) {
9e8808a9
BZ
2954 if (speed <= XFER_PIO_2)
2955 p.cycle = p.cyc8b = id[ATA_ID_EIDE_PIO];
2956 else if ((speed <= XFER_PIO_4) ||
2957 (speed == XFER_PIO_5 && !ata_id_is_cfa(id)))
2958 p.cycle = p.cyc8b = id[ATA_ID_EIDE_PIO_IORDY];
2959 } else if (speed >= XFER_MW_DMA_0 && speed <= XFER_MW_DMA_2)
2960 p.cycle = id[ATA_ID_EIDE_DMA_MIN];
2961
452503f9
AC
2962 ata_timing_merge(&p, t, t, ATA_TIMING_CYCLE | ATA_TIMING_CYC8B);
2963 }
2964
2965 /*
2966 * Convert the timing to bus clock counts.
2967 */
2968
75b1f2f8 2969 ata_timing_quantize(t, t, T, UT);
452503f9
AC
2970
2971 /*
c893a3ae
RD
2972 * Even in DMA/UDMA modes we still use PIO access for IDENTIFY,
2973 * S.M.A.R.T * and some other commands. We have to ensure that the
2974 * DMA cycle timing is slower/equal than the fastest PIO timing.
452503f9
AC
2975 */
2976
fd3367af 2977 if (speed > XFER_PIO_6) {
452503f9
AC
2978 ata_timing_compute(adev, adev->pio_mode, &p, T, UT);
2979 ata_timing_merge(&p, t, t, ATA_TIMING_ALL);
2980 }
2981
2982 /*
c893a3ae 2983 * Lengthen active & recovery time so that cycle time is correct.
452503f9
AC
2984 */
2985
2986 if (t->act8b + t->rec8b < t->cyc8b) {
2987 t->act8b += (t->cyc8b - (t->act8b + t->rec8b)) / 2;
2988 t->rec8b = t->cyc8b - t->act8b;
2989 }
2990
2991 if (t->active + t->recover < t->cycle) {
2992 t->active += (t->cycle - (t->active + t->recover)) / 2;
2993 t->recover = t->cycle - t->active;
2994 }
a617c09f 2995
4f701d1e
AC
2996 /* In a few cases quantisation may produce enough errors to
2997 leave t->cycle too low for the sum of active and recovery
2998 if so we must correct this */
2999 if (t->active + t->recover > t->cycle)
3000 t->cycle = t->active + t->recover;
452503f9
AC
3001
3002 return 0;
3003}
3004
a0f79b92
TH
3005/**
3006 * ata_timing_cycle2mode - find xfer mode for the specified cycle duration
3007 * @xfer_shift: ATA_SHIFT_* value for transfer type to examine.
3008 * @cycle: cycle duration in ns
3009 *
3010 * Return matching xfer mode for @cycle. The returned mode is of
3011 * the transfer type specified by @xfer_shift. If @cycle is too
3012 * slow for @xfer_shift, 0xff is returned. If @cycle is faster
3013 * than the fastest known mode, the fasted mode is returned.
3014 *
3015 * LOCKING:
3016 * None.
3017 *
3018 * RETURNS:
3019 * Matching xfer_mode, 0xff if no match found.
3020 */
3021u8 ata_timing_cycle2mode(unsigned int xfer_shift, int cycle)
3022{
3023 u8 base_mode = 0xff, last_mode = 0xff;
3024 const struct ata_xfer_ent *ent;
3025 const struct ata_timing *t;
3026
3027 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
3028 if (ent->shift == xfer_shift)
3029 base_mode = ent->base;
3030
3031 for (t = ata_timing_find_mode(base_mode);
3032 t && ata_xfer_mode2shift(t->mode) == xfer_shift; t++) {
3033 unsigned short this_cycle;
3034
3035 switch (xfer_shift) {
3036 case ATA_SHIFT_PIO:
3037 case ATA_SHIFT_MWDMA:
3038 this_cycle = t->cycle;
3039 break;
3040 case ATA_SHIFT_UDMA:
3041 this_cycle = t->udma;
3042 break;
3043 default:
3044 return 0xff;
3045 }
3046
3047 if (cycle > this_cycle)
3048 break;
3049
3050 last_mode = t->mode;
3051 }
3052
3053 return last_mode;
3054}
3055
cf176e1a
TH
3056/**
3057 * ata_down_xfermask_limit - adjust dev xfer masks downward
cf176e1a 3058 * @dev: Device to adjust xfer masks
458337db 3059 * @sel: ATA_DNXFER_* selector
cf176e1a
TH
3060 *
3061 * Adjust xfer masks of @dev downward. Note that this function
3062 * does not apply the change. Invoking ata_set_mode() afterwards
3063 * will apply the limit.
3064 *
3065 * LOCKING:
3066 * Inherited from caller.
3067 *
3068 * RETURNS:
3069 * 0 on success, negative errno on failure
3070 */
458337db 3071int ata_down_xfermask_limit(struct ata_device *dev, unsigned int sel)
cf176e1a 3072{
458337db 3073 char buf[32];
7dc951ae
TH
3074 unsigned long orig_mask, xfer_mask;
3075 unsigned long pio_mask, mwdma_mask, udma_mask;
458337db 3076 int quiet, highbit;
cf176e1a 3077
458337db
TH
3078 quiet = !!(sel & ATA_DNXFER_QUIET);
3079 sel &= ~ATA_DNXFER_QUIET;
cf176e1a 3080
458337db
TH
3081 xfer_mask = orig_mask = ata_pack_xfermask(dev->pio_mask,
3082 dev->mwdma_mask,
3083 dev->udma_mask);
3084 ata_unpack_xfermask(xfer_mask, &pio_mask, &mwdma_mask, &udma_mask);
cf176e1a 3085
458337db
TH
3086 switch (sel) {
3087 case ATA_DNXFER_PIO:
3088 highbit = fls(pio_mask) - 1;
3089 pio_mask &= ~(1 << highbit);
3090 break;
3091
3092 case ATA_DNXFER_DMA:
3093 if (udma_mask) {
3094 highbit = fls(udma_mask) - 1;
3095 udma_mask &= ~(1 << highbit);
3096 if (!udma_mask)
3097 return -ENOENT;
3098 } else if (mwdma_mask) {
3099 highbit = fls(mwdma_mask) - 1;
3100 mwdma_mask &= ~(1 << highbit);
3101 if (!mwdma_mask)
3102 return -ENOENT;
3103 }
3104 break;
3105
3106 case ATA_DNXFER_40C:
3107 udma_mask &= ATA_UDMA_MASK_40C;
3108 break;
3109
3110 case ATA_DNXFER_FORCE_PIO0:
3111 pio_mask &= 1;
3112 case ATA_DNXFER_FORCE_PIO:
3113 mwdma_mask = 0;
3114 udma_mask = 0;
3115 break;
3116
458337db
TH
3117 default:
3118 BUG();
3119 }
3120
3121 xfer_mask &= ata_pack_xfermask(pio_mask, mwdma_mask, udma_mask);
3122
3123 if (!(xfer_mask & ATA_MASK_PIO) || xfer_mask == orig_mask)
3124 return -ENOENT;
3125
3126 if (!quiet) {
3127 if (xfer_mask & (ATA_MASK_MWDMA | ATA_MASK_UDMA))
3128 snprintf(buf, sizeof(buf), "%s:%s",
3129 ata_mode_string(xfer_mask),
3130 ata_mode_string(xfer_mask & ATA_MASK_PIO));
3131 else
3132 snprintf(buf, sizeof(buf), "%s",
3133 ata_mode_string(xfer_mask));
3134
a9a79dfe 3135 ata_dev_warn(dev, "limiting speed to %s\n", buf);
458337db 3136 }
cf176e1a
TH
3137
3138 ata_unpack_xfermask(xfer_mask, &dev->pio_mask, &dev->mwdma_mask,
3139 &dev->udma_mask);
3140
cf176e1a 3141 return 0;
cf176e1a
TH
3142}
3143
3373efd8 3144static int ata_dev_set_mode(struct ata_device *dev)
1da177e4 3145{
d0cb43b3 3146 struct ata_port *ap = dev->link->ap;
9af5c9c9 3147 struct ata_eh_context *ehc = &dev->link->eh_context;
d0cb43b3 3148 const bool nosetxfer = dev->horkage & ATA_HORKAGE_NOSETXFER;
4055dee7
TH
3149 const char *dev_err_whine = "";
3150 int ign_dev_err = 0;
d0cb43b3 3151 unsigned int err_mask = 0;
83206a29 3152 int rc;
1da177e4 3153
e8384607 3154 dev->flags &= ~ATA_DFLAG_PIO;
1da177e4
LT
3155 if (dev->xfer_shift == ATA_SHIFT_PIO)
3156 dev->flags |= ATA_DFLAG_PIO;
3157
d0cb43b3
TH
3158 if (nosetxfer && ap->flags & ATA_FLAG_SATA && ata_id_is_sata(dev->id))
3159 dev_err_whine = " (SET_XFERMODE skipped)";
3160 else {
3161 if (nosetxfer)
a9a79dfe
JP
3162 ata_dev_warn(dev,
3163 "NOSETXFER but PATA detected - can't "
3164 "skip SETXFER, might malfunction\n");
d0cb43b3
TH
3165 err_mask = ata_dev_set_xfermode(dev);
3166 }
2dcb407e 3167
4055dee7
TH
3168 if (err_mask & ~AC_ERR_DEV)
3169 goto fail;
3170
3171 /* revalidate */
3172 ehc->i.flags |= ATA_EHI_POST_SETMODE;
3173 rc = ata_dev_revalidate(dev, ATA_DEV_UNKNOWN, 0);
3174 ehc->i.flags &= ~ATA_EHI_POST_SETMODE;
3175 if (rc)
3176 return rc;
3177
b93fda12
AC
3178 if (dev->xfer_shift == ATA_SHIFT_PIO) {
3179 /* Old CFA may refuse this command, which is just fine */
3180 if (ata_id_is_cfa(dev->id))
3181 ign_dev_err = 1;
3182 /* Catch several broken garbage emulations plus some pre
3183 ATA devices */
3184 if (ata_id_major_version(dev->id) == 0 &&
3185 dev->pio_mode <= XFER_PIO_2)
3186 ign_dev_err = 1;
3187 /* Some very old devices and some bad newer ones fail
3188 any kind of SET_XFERMODE request but support PIO0-2
3189 timings and no IORDY */
3190 if (!ata_id_has_iordy(dev->id) && dev->pio_mode <= XFER_PIO_2)
3191 ign_dev_err = 1;
3192 }
3acaf94b
AC
3193 /* Early MWDMA devices do DMA but don't allow DMA mode setting.
3194 Don't fail an MWDMA0 set IFF the device indicates it is in MWDMA0 */
c5038fc0 3195 if (dev->xfer_shift == ATA_SHIFT_MWDMA &&
3acaf94b
AC
3196 dev->dma_mode == XFER_MW_DMA_0 &&
3197 (dev->id[63] >> 8) & 1)
4055dee7 3198 ign_dev_err = 1;
3acaf94b 3199
4055dee7
TH
3200 /* if the device is actually configured correctly, ignore dev err */
3201 if (dev->xfer_mode == ata_xfer_mask2mode(ata_id_xfermask(dev->id)))
3202 ign_dev_err = 1;
1da177e4 3203
4055dee7
TH
3204 if (err_mask & AC_ERR_DEV) {
3205 if (!ign_dev_err)
3206 goto fail;
3207 else
3208 dev_err_whine = " (device error ignored)";
3209 }
48a8a14f 3210
23e71c3d
TH
3211 DPRINTK("xfer_shift=%u, xfer_mode=0x%x\n",
3212 dev->xfer_shift, (int)dev->xfer_mode);
1da177e4 3213
a9a79dfe
JP
3214 ata_dev_info(dev, "configured for %s%s\n",
3215 ata_mode_string(ata_xfer_mode2mask(dev->xfer_mode)),
3216 dev_err_whine);
4055dee7 3217
83206a29 3218 return 0;
4055dee7
TH
3219
3220 fail:
a9a79dfe 3221 ata_dev_err(dev, "failed to set xfermode (err_mask=0x%x)\n", err_mask);
4055dee7 3222 return -EIO;
1da177e4
LT
3223}
3224
1da177e4 3225/**
04351821 3226 * ata_do_set_mode - Program timings and issue SET FEATURES - XFER
0260731f 3227 * @link: link on which timings will be programmed
1967b7ff 3228 * @r_failed_dev: out parameter for failed device
1da177e4 3229 *
04351821
AC
3230 * Standard implementation of the function used to tune and set
3231 * ATA device disk transfer mode (PIO3, UDMA6, etc.). If
3232 * ata_dev_set_mode() fails, pointer to the failing device is
e82cbdb9 3233 * returned in @r_failed_dev.
780a87f7 3234 *
1da177e4 3235 * LOCKING:
0cba632b 3236 * PCI/etc. bus probe sem.
e82cbdb9
TH
3237 *
3238 * RETURNS:
3239 * 0 on success, negative errno otherwise
1da177e4 3240 */
04351821 3241
0260731f 3242int ata_do_set_mode(struct ata_link *link, struct ata_device **r_failed_dev)
1da177e4 3243{
0260731f 3244 struct ata_port *ap = link->ap;
e8e0619f 3245 struct ata_device *dev;
f58229f8 3246 int rc = 0, used_dma = 0, found = 0;
3adcebb2 3247
a6d5a51c 3248 /* step 1: calculate xfer_mask */
1eca4365 3249 ata_for_each_dev(dev, link, ENABLED) {
7dc951ae 3250 unsigned long pio_mask, dma_mask;
b3a70601 3251 unsigned int mode_mask;
a6d5a51c 3252
b3a70601
AC
3253 mode_mask = ATA_DMA_MASK_ATA;
3254 if (dev->class == ATA_DEV_ATAPI)
3255 mode_mask = ATA_DMA_MASK_ATAPI;
3256 else if (ata_id_is_cfa(dev->id))
3257 mode_mask = ATA_DMA_MASK_CFA;
3258
3373efd8 3259 ata_dev_xfermask(dev);
33267325 3260 ata_force_xfermask(dev);
1da177e4 3261
acf356b1 3262 pio_mask = ata_pack_xfermask(dev->pio_mask, 0, 0);
b3a70601
AC
3263
3264 if (libata_dma_mask & mode_mask)
80a9c430
SS
3265 dma_mask = ata_pack_xfermask(0, dev->mwdma_mask,
3266 dev->udma_mask);
b3a70601
AC
3267 else
3268 dma_mask = 0;
3269
acf356b1
TH
3270 dev->pio_mode = ata_xfer_mask2mode(pio_mask);
3271 dev->dma_mode = ata_xfer_mask2mode(dma_mask);
5444a6f4 3272
4f65977d 3273 found = 1;
b15b3eba 3274 if (ata_dma_enabled(dev))
5444a6f4 3275 used_dma = 1;
a6d5a51c 3276 }
4f65977d 3277 if (!found)
e82cbdb9 3278 goto out;
a6d5a51c
TH
3279
3280 /* step 2: always set host PIO timings */
1eca4365 3281 ata_for_each_dev(dev, link, ENABLED) {
70cd071e 3282 if (dev->pio_mode == 0xff) {
a9a79dfe 3283 ata_dev_warn(dev, "no PIO support\n");
e8e0619f 3284 rc = -EINVAL;
e82cbdb9 3285 goto out;
e8e0619f
TH
3286 }
3287
3288 dev->xfer_mode = dev->pio_mode;
3289 dev->xfer_shift = ATA_SHIFT_PIO;
3290 if (ap->ops->set_piomode)
3291 ap->ops->set_piomode(ap, dev);
3292 }
1da177e4 3293
a6d5a51c 3294 /* step 3: set host DMA timings */
1eca4365
TH
3295 ata_for_each_dev(dev, link, ENABLED) {
3296 if (!ata_dma_enabled(dev))
e8e0619f
TH
3297 continue;
3298
3299 dev->xfer_mode = dev->dma_mode;
3300 dev->xfer_shift = ata_xfer_mode2shift(dev->dma_mode);
3301 if (ap->ops->set_dmamode)
3302 ap->ops->set_dmamode(ap, dev);
3303 }
1da177e4
LT
3304
3305 /* step 4: update devices' xfer mode */
1eca4365 3306 ata_for_each_dev(dev, link, ENABLED) {
3373efd8 3307 rc = ata_dev_set_mode(dev);
5bbc53f4 3308 if (rc)
e82cbdb9 3309 goto out;
83206a29 3310 }
1da177e4 3311
e8e0619f
TH
3312 /* Record simplex status. If we selected DMA then the other
3313 * host channels are not permitted to do so.
5444a6f4 3314 */
cca3974e 3315 if (used_dma && (ap->host->flags & ATA_HOST_SIMPLEX))
032af1ce 3316 ap->host->simplex_claimed = ap;
5444a6f4 3317
e82cbdb9
TH
3318 out:
3319 if (rc)
3320 *r_failed_dev = dev;
3321 return rc;
1da177e4
LT
3322}
3323
aa2731ad
TH
3324/**
3325 * ata_wait_ready - wait for link to become ready
3326 * @link: link to be waited on
3327 * @deadline: deadline jiffies for the operation
3328 * @check_ready: callback to check link readiness
3329 *
3330 * Wait for @link to become ready. @check_ready should return
3331 * positive number if @link is ready, 0 if it isn't, -ENODEV if
3332 * link doesn't seem to be occupied, other errno for other error
3333 * conditions.
3334 *
3335 * Transient -ENODEV conditions are allowed for
3336 * ATA_TMOUT_FF_WAIT.
3337 *
3338 * LOCKING:
3339 * EH context.
3340 *
3341 * RETURNS:
3342 * 0 if @linke is ready before @deadline; otherwise, -errno.
3343 */
3344int ata_wait_ready(struct ata_link *link, unsigned long deadline,
3345 int (*check_ready)(struct ata_link *link))
3346{
3347 unsigned long start = jiffies;
b48d58f5 3348 unsigned long nodev_deadline;
aa2731ad
TH
3349 int warned = 0;
3350
b48d58f5
TH
3351 /* choose which 0xff timeout to use, read comment in libata.h */
3352 if (link->ap->host->flags & ATA_HOST_PARALLEL_SCAN)
3353 nodev_deadline = ata_deadline(start, ATA_TMOUT_FF_WAIT_LONG);
3354 else
3355 nodev_deadline = ata_deadline(start, ATA_TMOUT_FF_WAIT);
3356
b1c72916
TH
3357 /* Slave readiness can't be tested separately from master. On
3358 * M/S emulation configuration, this function should be called
3359 * only on the master and it will handle both master and slave.
3360 */
3361 WARN_ON(link == link->ap->slave_link);
3362
aa2731ad
TH
3363 if (time_after(nodev_deadline, deadline))
3364 nodev_deadline = deadline;
3365
3366 while (1) {
3367 unsigned long now = jiffies;
3368 int ready, tmp;
3369
3370 ready = tmp = check_ready(link);
3371 if (ready > 0)
3372 return 0;
3373
b48d58f5
TH
3374 /*
3375 * -ENODEV could be transient. Ignore -ENODEV if link
aa2731ad 3376 * is online. Also, some SATA devices take a long
b48d58f5
TH
3377 * time to clear 0xff after reset. Wait for
3378 * ATA_TMOUT_FF_WAIT[_LONG] on -ENODEV if link isn't
3379 * offline.
aa2731ad
TH
3380 *
3381 * Note that some PATA controllers (pata_ali) explode
3382 * if status register is read more than once when
3383 * there's no device attached.
3384 */
3385 if (ready == -ENODEV) {
3386 if (ata_link_online(link))
3387 ready = 0;
3388 else if ((link->ap->flags & ATA_FLAG_SATA) &&
3389 !ata_link_offline(link) &&
3390 time_before(now, nodev_deadline))
3391 ready = 0;
3392 }
3393
3394 if (ready)
3395 return ready;
3396 if (time_after(now, deadline))
3397 return -EBUSY;
3398
3399 if (!warned && time_after(now, start + 5 * HZ) &&
3400 (deadline - now > 3 * HZ)) {
a9a79dfe 3401 ata_link_warn(link,
aa2731ad
TH
3402 "link is slow to respond, please be patient "
3403 "(ready=%d)\n", tmp);
3404 warned = 1;
3405 }
3406
97750ceb 3407 ata_msleep(link->ap, 50);
aa2731ad
TH
3408 }
3409}
3410
3411/**
3412 * ata_wait_after_reset - wait for link to become ready after reset
3413 * @link: link to be waited on
3414 * @deadline: deadline jiffies for the operation
3415 * @check_ready: callback to check link readiness
3416 *
3417 * Wait for @link to become ready after reset.
3418 *
3419 * LOCKING:
3420 * EH context.
3421 *
3422 * RETURNS:
3423 * 0 if @linke is ready before @deadline; otherwise, -errno.
3424 */
2b4221bb 3425int ata_wait_after_reset(struct ata_link *link, unsigned long deadline,
aa2731ad
TH
3426 int (*check_ready)(struct ata_link *link))
3427{
97750ceb 3428 ata_msleep(link->ap, ATA_WAIT_AFTER_RESET);
aa2731ad
TH
3429
3430 return ata_wait_ready(link, deadline, check_ready);
3431}
3432
d7bb4cc7 3433/**
936fd732
TH
3434 * sata_link_debounce - debounce SATA phy status
3435 * @link: ATA link to debounce SATA phy status for
d7bb4cc7 3436 * @params: timing parameters { interval, duratinon, timeout } in msec
d4b2bab4 3437 * @deadline: deadline jiffies for the operation
d7bb4cc7 3438 *
1152b261 3439 * Make sure SStatus of @link reaches stable state, determined by
d7bb4cc7
TH
3440 * holding the same value where DET is not 1 for @duration polled
3441 * every @interval, before @timeout. Timeout constraints the
d4b2bab4
TH
3442 * beginning of the stable state. Because DET gets stuck at 1 on
3443 * some controllers after hot unplugging, this functions waits
d7bb4cc7
TH
3444 * until timeout then returns 0 if DET is stable at 1.
3445 *
d4b2bab4
TH
3446 * @timeout is further limited by @deadline. The sooner of the
3447 * two is used.
3448 *
d7bb4cc7
TH
3449 * LOCKING:
3450 * Kernel thread context (may sleep)
3451 *
3452 * RETURNS:
3453 * 0 on success, -errno on failure.
3454 */
936fd732
TH
3455int sata_link_debounce(struct ata_link *link, const unsigned long *params,
3456 unsigned long deadline)
7a7921e8 3457{
341c2c95
TH
3458 unsigned long interval = params[0];
3459 unsigned long duration = params[1];
d4b2bab4 3460 unsigned long last_jiffies, t;
d7bb4cc7
TH
3461 u32 last, cur;
3462 int rc;
3463
341c2c95 3464 t = ata_deadline(jiffies, params[2]);
d4b2bab4
TH
3465 if (time_before(t, deadline))
3466 deadline = t;
3467
936fd732 3468 if ((rc = sata_scr_read(link, SCR_STATUS, &cur)))
d7bb4cc7
TH
3469 return rc;
3470 cur &= 0xf;
3471
3472 last = cur;
3473 last_jiffies = jiffies;
3474
3475 while (1) {
97750ceb 3476 ata_msleep(link->ap, interval);
936fd732 3477 if ((rc = sata_scr_read(link, SCR_STATUS, &cur)))
d7bb4cc7
TH
3478 return rc;
3479 cur &= 0xf;
3480
3481 /* DET stable? */
3482 if (cur == last) {
d4b2bab4 3483 if (cur == 1 && time_before(jiffies, deadline))
d7bb4cc7 3484 continue;
341c2c95
TH
3485 if (time_after(jiffies,
3486 ata_deadline(last_jiffies, duration)))
d7bb4cc7
TH
3487 return 0;
3488 continue;
3489 }
3490
3491 /* unstable, start over */
3492 last = cur;
3493 last_jiffies = jiffies;
3494
f1545154
TH
3495 /* Check deadline. If debouncing failed, return
3496 * -EPIPE to tell upper layer to lower link speed.
3497 */
d4b2bab4 3498 if (time_after(jiffies, deadline))
f1545154 3499 return -EPIPE;
d7bb4cc7
TH
3500 }
3501}
3502
3503/**
936fd732
TH
3504 * sata_link_resume - resume SATA link
3505 * @link: ATA link to resume SATA
d7bb4cc7 3506 * @params: timing parameters { interval, duratinon, timeout } in msec
d4b2bab4 3507 * @deadline: deadline jiffies for the operation
d7bb4cc7 3508 *
936fd732 3509 * Resume SATA phy @link and debounce it.
d7bb4cc7
TH
3510 *
3511 * LOCKING:
3512 * Kernel thread context (may sleep)
3513 *
3514 * RETURNS:
3515 * 0 on success, -errno on failure.
3516 */
936fd732
TH
3517int sata_link_resume(struct ata_link *link, const unsigned long *params,
3518 unsigned long deadline)
d7bb4cc7 3519{
5040ab67 3520 int tries = ATA_LINK_RESUME_TRIES;
ac371987 3521 u32 scontrol, serror;
81952c54
TH
3522 int rc;
3523
936fd732 3524 if ((rc = sata_scr_read(link, SCR_CONTROL, &scontrol)))
81952c54 3525 return rc;
7a7921e8 3526
5040ab67
TH
3527 /*
3528 * Writes to SControl sometimes get ignored under certain
3529 * controllers (ata_piix SIDPR). Make sure DET actually is
3530 * cleared.
3531 */
3532 do {
3533 scontrol = (scontrol & 0x0f0) | 0x300;
3534 if ((rc = sata_scr_write(link, SCR_CONTROL, scontrol)))
3535 return rc;
3536 /*
3537 * Some PHYs react badly if SStatus is pounded
3538 * immediately after resuming. Delay 200ms before
3539 * debouncing.
3540 */
97750ceb 3541 ata_msleep(link->ap, 200);
81952c54 3542
5040ab67
TH
3543 /* is SControl restored correctly? */
3544 if ((rc = sata_scr_read(link, SCR_CONTROL, &scontrol)))
3545 return rc;
3546 } while ((scontrol & 0xf0f) != 0x300 && --tries);
7a7921e8 3547
5040ab67 3548 if ((scontrol & 0xf0f) != 0x300) {
38941c95 3549 ata_link_warn(link, "failed to resume link (SControl %X)\n",
a9a79dfe 3550 scontrol);
5040ab67
TH
3551 return 0;
3552 }
3553
3554 if (tries < ATA_LINK_RESUME_TRIES)
a9a79dfe
JP
3555 ata_link_warn(link, "link resume succeeded after %d retries\n",
3556 ATA_LINK_RESUME_TRIES - tries);
7a7921e8 3557
ac371987
TH
3558 if ((rc = sata_link_debounce(link, params, deadline)))
3559 return rc;
3560
f046519f 3561 /* clear SError, some PHYs require this even for SRST to work */
ac371987
TH
3562 if (!(rc = sata_scr_read(link, SCR_ERROR, &serror)))
3563 rc = sata_scr_write(link, SCR_ERROR, serror);
ac371987 3564
f046519f 3565 return rc != -EINVAL ? rc : 0;
7a7921e8
TH
3566}
3567
1152b261
TH
3568/**
3569 * sata_link_scr_lpm - manipulate SControl IPM and SPM fields
3570 * @link: ATA link to manipulate SControl for
3571 * @policy: LPM policy to configure
3572 * @spm_wakeup: initiate LPM transition to active state
3573 *
3574 * Manipulate the IPM field of the SControl register of @link
3575 * according to @policy. If @policy is ATA_LPM_MAX_POWER and
3576 * @spm_wakeup is %true, the SPM field is manipulated to wake up
3577 * the link. This function also clears PHYRDY_CHG before
3578 * returning.
3579 *
3580 * LOCKING:
3581 * EH context.
3582 *
3583 * RETURNS:
3584 * 0 on succes, -errno otherwise.
3585 */
3586int sata_link_scr_lpm(struct ata_link *link, enum ata_lpm_policy policy,
3587 bool spm_wakeup)
3588{
3589 struct ata_eh_context *ehc = &link->eh_context;
3590 bool woken_up = false;
3591 u32 scontrol;
3592 int rc;
3593
3594 rc = sata_scr_read(link, SCR_CONTROL, &scontrol);
3595 if (rc)
3596 return rc;
3597
3598 switch (policy) {
3599 case ATA_LPM_MAX_POWER:
3600 /* disable all LPM transitions */
3601 scontrol |= (0x3 << 8);
3602 /* initiate transition to active state */
3603 if (spm_wakeup) {
3604 scontrol |= (0x4 << 12);
3605 woken_up = true;
3606 }
3607 break;
3608 case ATA_LPM_MED_POWER:
3609 /* allow LPM to PARTIAL */
3610 scontrol &= ~(0x1 << 8);
3611 scontrol |= (0x2 << 8);
3612 break;
3613 case ATA_LPM_MIN_POWER:
8a745f1f
KCA
3614 if (ata_link_nr_enabled(link) > 0)
3615 /* no restrictions on LPM transitions */
3616 scontrol &= ~(0x3 << 8);
3617 else {
3618 /* empty port, power off */
3619 scontrol &= ~0xf;
3620 scontrol |= (0x1 << 2);
3621 }
1152b261
TH
3622 break;
3623 default:
3624 WARN_ON(1);
3625 }
3626
3627 rc = sata_scr_write(link, SCR_CONTROL, scontrol);
3628 if (rc)
3629 return rc;
3630
3631 /* give the link time to transit out of LPM state */
3632 if (woken_up)
3633 msleep(10);
3634
3635 /* clear PHYRDY_CHG from SError */
3636 ehc->i.serror &= ~SERR_PHYRDY_CHG;
3637 return sata_scr_write(link, SCR_ERROR, SERR_PHYRDY_CHG);
3638}
3639
f5914a46 3640/**
0aa1113d 3641 * ata_std_prereset - prepare for reset
cc0680a5 3642 * @link: ATA link to be reset
d4b2bab4 3643 * @deadline: deadline jiffies for the operation
f5914a46 3644 *
cc0680a5 3645 * @link is about to be reset. Initialize it. Failure from
b8cffc6a
TH
3646 * prereset makes libata abort whole reset sequence and give up
3647 * that port, so prereset should be best-effort. It does its
3648 * best to prepare for reset sequence but if things go wrong, it
3649 * should just whine, not fail.
f5914a46
TH
3650 *
3651 * LOCKING:
3652 * Kernel thread context (may sleep)
3653 *
3654 * RETURNS:
3655 * 0 on success, -errno otherwise.
3656 */
0aa1113d 3657int ata_std_prereset(struct ata_link *link, unsigned long deadline)
f5914a46 3658{
cc0680a5 3659 struct ata_port *ap = link->ap;
936fd732 3660 struct ata_eh_context *ehc = &link->eh_context;
e9c83914 3661 const unsigned long *timing = sata_ehc_deb_timing(ehc);
f5914a46
TH
3662 int rc;
3663
f5914a46
TH
3664 /* if we're about to do hardreset, nothing more to do */
3665 if (ehc->i.action & ATA_EH_HARDRESET)
3666 return 0;
3667
936fd732 3668 /* if SATA, resume link */
a16abc0b 3669 if (ap->flags & ATA_FLAG_SATA) {
936fd732 3670 rc = sata_link_resume(link, timing, deadline);
b8cffc6a
TH
3671 /* whine about phy resume failure but proceed */
3672 if (rc && rc != -EOPNOTSUPP)
a9a79dfe
JP
3673 ata_link_warn(link,
3674 "failed to resume link for reset (errno=%d)\n",
3675 rc);
f5914a46
TH
3676 }
3677
45db2f6c 3678 /* no point in trying softreset on offline link */
b1c72916 3679 if (ata_phys_link_offline(link))
45db2f6c
TH
3680 ehc->i.action &= ~ATA_EH_SOFTRESET;
3681
f5914a46
TH
3682 return 0;
3683}
3684
c2bd5804 3685/**
624d5c51
TH
3686 * sata_link_hardreset - reset link via SATA phy reset
3687 * @link: link to reset
3688 * @timing: timing parameters { interval, duratinon, timeout } in msec
d4b2bab4 3689 * @deadline: deadline jiffies for the operation
9dadd45b
TH
3690 * @online: optional out parameter indicating link onlineness
3691 * @check_ready: optional callback to check link readiness
c2bd5804 3692 *
624d5c51 3693 * SATA phy-reset @link using DET bits of SControl register.
9dadd45b
TH
3694 * After hardreset, link readiness is waited upon using
3695 * ata_wait_ready() if @check_ready is specified. LLDs are
3696 * allowed to not specify @check_ready and wait itself after this
3697 * function returns. Device classification is LLD's
3698 * responsibility.
3699 *
3700 * *@online is set to one iff reset succeeded and @link is online
3701 * after reset.
c2bd5804
TH
3702 *
3703 * LOCKING:
3704 * Kernel thread context (may sleep)
3705 *
3706 * RETURNS:
3707 * 0 on success, -errno otherwise.
3708 */
624d5c51 3709int sata_link_hardreset(struct ata_link *link, const unsigned long *timing,
9dadd45b
TH
3710 unsigned long deadline,
3711 bool *online, int (*check_ready)(struct ata_link *))
c2bd5804 3712{
624d5c51 3713 u32 scontrol;
81952c54 3714 int rc;
852ee16a 3715
c2bd5804
TH
3716 DPRINTK("ENTER\n");
3717
9dadd45b
TH
3718 if (online)
3719 *online = false;
3720
936fd732 3721 if (sata_set_spd_needed(link)) {
1c3fae4d
TH
3722 /* SATA spec says nothing about how to reconfigure
3723 * spd. To be on the safe side, turn off phy during
3724 * reconfiguration. This works for at least ICH7 AHCI
3725 * and Sil3124.
3726 */
936fd732 3727 if ((rc = sata_scr_read(link, SCR_CONTROL, &scontrol)))
b6103f6d 3728 goto out;
81952c54 3729
a34b6fc0 3730 scontrol = (scontrol & 0x0f0) | 0x304;
81952c54 3731
936fd732 3732 if ((rc = sata_scr_write(link, SCR_CONTROL, scontrol)))
b6103f6d 3733 goto out;
1c3fae4d 3734
936fd732 3735 sata_set_spd(link);
1c3fae4d
TH
3736 }
3737
3738 /* issue phy wake/reset */
936fd732 3739 if ((rc = sata_scr_read(link, SCR_CONTROL, &scontrol)))
b6103f6d 3740 goto out;
81952c54 3741
852ee16a 3742 scontrol = (scontrol & 0x0f0) | 0x301;
81952c54 3743
936fd732 3744 if ((rc = sata_scr_write_flush(link, SCR_CONTROL, scontrol)))
b6103f6d 3745 goto out;
c2bd5804 3746
1c3fae4d 3747 /* Couldn't find anything in SATA I/II specs, but AHCI-1.1
c2bd5804
TH
3748 * 10.4.2 says at least 1 ms.
3749 */
97750ceb 3750 ata_msleep(link->ap, 1);
c2bd5804 3751
936fd732
TH
3752 /* bring link back */
3753 rc = sata_link_resume(link, timing, deadline);
9dadd45b
TH
3754 if (rc)
3755 goto out;
3756 /* if link is offline nothing more to do */
b1c72916 3757 if (ata_phys_link_offline(link))
9dadd45b
TH
3758 goto out;
3759
3760 /* Link is online. From this point, -ENODEV too is an error. */
3761 if (online)
3762 *online = true;
3763
071f44b1 3764 if (sata_pmp_supported(link->ap) && ata_is_host_link(link)) {
9dadd45b
TH
3765 /* If PMP is supported, we have to do follow-up SRST.
3766 * Some PMPs don't send D2H Reg FIS after hardreset if
3767 * the first port is empty. Wait only for
3768 * ATA_TMOUT_PMP_SRST_WAIT.
3769 */
3770 if (check_ready) {
3771 unsigned long pmp_deadline;
3772
341c2c95
TH
3773 pmp_deadline = ata_deadline(jiffies,
3774 ATA_TMOUT_PMP_SRST_WAIT);
9dadd45b
TH
3775 if (time_after(pmp_deadline, deadline))
3776 pmp_deadline = deadline;
3777 ata_wait_ready(link, pmp_deadline, check_ready);
3778 }
3779 rc = -EAGAIN;
3780 goto out;
3781 }
3782
3783 rc = 0;
3784 if (check_ready)
3785 rc = ata_wait_ready(link, deadline, check_ready);
b6103f6d 3786 out:
0cbf0711
TH
3787 if (rc && rc != -EAGAIN) {
3788 /* online is set iff link is online && reset succeeded */
3789 if (online)
3790 *online = false;
a9a79dfe 3791 ata_link_err(link, "COMRESET failed (errno=%d)\n", rc);
0cbf0711 3792 }
b6103f6d
TH
3793 DPRINTK("EXIT, rc=%d\n", rc);
3794 return rc;
3795}
3796
57c9efdf
TH
3797/**
3798 * sata_std_hardreset - COMRESET w/o waiting or classification
3799 * @link: link to reset
3800 * @class: resulting class of attached device
3801 * @deadline: deadline jiffies for the operation
3802 *
3803 * Standard SATA COMRESET w/o waiting or classification.
3804 *
3805 * LOCKING:
3806 * Kernel thread context (may sleep)
3807 *
3808 * RETURNS:
3809 * 0 if link offline, -EAGAIN if link online, -errno on errors.
3810 */
3811int sata_std_hardreset(struct ata_link *link, unsigned int *class,
3812 unsigned long deadline)
3813{
3814 const unsigned long *timing = sata_ehc_deb_timing(&link->eh_context);
3815 bool online;
3816 int rc;
3817
3818 /* do hardreset */
3819 rc = sata_link_hardreset(link, timing, deadline, &online, NULL);
57c9efdf
TH
3820 return online ? -EAGAIN : rc;
3821}
3822
c2bd5804 3823/**
203c75b8 3824 * ata_std_postreset - standard postreset callback
cc0680a5 3825 * @link: the target ata_link
c2bd5804
TH
3826 * @classes: classes of attached devices
3827 *
3828 * This function is invoked after a successful reset. Note that
3829 * the device might have been reset more than once using
3830 * different reset methods before postreset is invoked.
c2bd5804 3831 *
c2bd5804
TH
3832 * LOCKING:
3833 * Kernel thread context (may sleep)
3834 */
203c75b8 3835void ata_std_postreset(struct ata_link *link, unsigned int *classes)
c2bd5804 3836{
f046519f
TH
3837 u32 serror;
3838
c2bd5804
TH
3839 DPRINTK("ENTER\n");
3840
f046519f
TH
3841 /* reset complete, clear SError */
3842 if (!sata_scr_read(link, SCR_ERROR, &serror))
3843 sata_scr_write(link, SCR_ERROR, serror);
3844
c2bd5804 3845 /* print link status */
936fd732 3846 sata_print_link_status(link);
c2bd5804 3847
c2bd5804
TH
3848 DPRINTK("EXIT\n");
3849}
3850
623a3128
TH
3851/**
3852 * ata_dev_same_device - Determine whether new ID matches configured device
623a3128
TH
3853 * @dev: device to compare against
3854 * @new_class: class of the new device
3855 * @new_id: IDENTIFY page of the new device
3856 *
3857 * Compare @new_class and @new_id against @dev and determine
3858 * whether @dev is the device indicated by @new_class and
3859 * @new_id.
3860 *
3861 * LOCKING:
3862 * None.
3863 *
3864 * RETURNS:
3865 * 1 if @dev matches @new_class and @new_id, 0 otherwise.
3866 */
3373efd8
TH
3867static int ata_dev_same_device(struct ata_device *dev, unsigned int new_class,
3868 const u16 *new_id)
623a3128
TH
3869{
3870 const u16 *old_id = dev->id;
a0cf733b
TH
3871 unsigned char model[2][ATA_ID_PROD_LEN + 1];
3872 unsigned char serial[2][ATA_ID_SERNO_LEN + 1];
623a3128
TH
3873
3874 if (dev->class != new_class) {
a9a79dfe
JP
3875 ata_dev_info(dev, "class mismatch %d != %d\n",
3876 dev->class, new_class);
623a3128
TH
3877 return 0;
3878 }
3879
a0cf733b
TH
3880 ata_id_c_string(old_id, model[0], ATA_ID_PROD, sizeof(model[0]));
3881 ata_id_c_string(new_id, model[1], ATA_ID_PROD, sizeof(model[1]));
3882 ata_id_c_string(old_id, serial[0], ATA_ID_SERNO, sizeof(serial[0]));
3883 ata_id_c_string(new_id, serial[1], ATA_ID_SERNO, sizeof(serial[1]));
623a3128
TH
3884
3885 if (strcmp(model[0], model[1])) {
a9a79dfe
JP
3886 ata_dev_info(dev, "model number mismatch '%s' != '%s'\n",
3887 model[0], model[1]);
623a3128
TH
3888 return 0;
3889 }
3890
3891 if (strcmp(serial[0], serial[1])) {
a9a79dfe
JP
3892 ata_dev_info(dev, "serial number mismatch '%s' != '%s'\n",
3893 serial[0], serial[1]);
623a3128
TH
3894 return 0;
3895 }
3896
623a3128
TH
3897 return 1;
3898}
3899
3900/**
fe30911b 3901 * ata_dev_reread_id - Re-read IDENTIFY data
3fae450c 3902 * @dev: target ATA device
bff04647 3903 * @readid_flags: read ID flags
623a3128
TH
3904 *
3905 * Re-read IDENTIFY page and make sure @dev is still attached to
3906 * the port.
3907 *
3908 * LOCKING:
3909 * Kernel thread context (may sleep)
3910 *
3911 * RETURNS:
3912 * 0 on success, negative errno otherwise
3913 */
fe30911b 3914int ata_dev_reread_id(struct ata_device *dev, unsigned int readid_flags)
623a3128 3915{
5eb45c02 3916 unsigned int class = dev->class;
9af5c9c9 3917 u16 *id = (void *)dev->link->ap->sector_buf;
623a3128
TH
3918 int rc;
3919
fe635c7e 3920 /* read ID data */
bff04647 3921 rc = ata_dev_read_id(dev, &class, readid_flags, id);
623a3128 3922 if (rc)
fe30911b 3923 return rc;
623a3128
TH
3924
3925 /* is the device still there? */
fe30911b
TH
3926 if (!ata_dev_same_device(dev, class, id))
3927 return -ENODEV;
623a3128 3928
fe635c7e 3929 memcpy(dev->id, id, sizeof(id[0]) * ATA_ID_WORDS);
fe30911b
TH
3930 return 0;
3931}
3932
3933/**
3934 * ata_dev_revalidate - Revalidate ATA device
3935 * @dev: device to revalidate
422c9daa 3936 * @new_class: new class code
fe30911b
TH
3937 * @readid_flags: read ID flags
3938 *
3939 * Re-read IDENTIFY page, make sure @dev is still attached to the
3940 * port and reconfigure it according to the new IDENTIFY page.
3941 *
3942 * LOCKING:
3943 * Kernel thread context (may sleep)
3944 *
3945 * RETURNS:
3946 * 0 on success, negative errno otherwise
3947 */
422c9daa
TH
3948int ata_dev_revalidate(struct ata_device *dev, unsigned int new_class,
3949 unsigned int readid_flags)
fe30911b 3950{
6ddcd3b0 3951 u64 n_sectors = dev->n_sectors;
5920dadf 3952 u64 n_native_sectors = dev->n_native_sectors;
fe30911b
TH
3953 int rc;
3954
3955 if (!ata_dev_enabled(dev))
3956 return -ENODEV;
3957
422c9daa
TH
3958 /* fail early if !ATA && !ATAPI to avoid issuing [P]IDENTIFY to PMP */
3959 if (ata_class_enabled(new_class) &&
f0d0613d
BP
3960 new_class != ATA_DEV_ATA &&
3961 new_class != ATA_DEV_ATAPI &&
3962 new_class != ATA_DEV_SEMB) {
a9a79dfe
JP
3963 ata_dev_info(dev, "class mismatch %u != %u\n",
3964 dev->class, new_class);
422c9daa
TH
3965 rc = -ENODEV;
3966 goto fail;
3967 }
3968
fe30911b
TH
3969 /* re-read ID */
3970 rc = ata_dev_reread_id(dev, readid_flags);
3971 if (rc)
3972 goto fail;
623a3128
TH
3973
3974 /* configure device according to the new ID */
efdaedc4 3975 rc = ata_dev_configure(dev);
6ddcd3b0
TH
3976 if (rc)
3977 goto fail;
3978
3979 /* verify n_sectors hasn't changed */
445d211b
TH
3980 if (dev->class != ATA_DEV_ATA || !n_sectors ||
3981 dev->n_sectors == n_sectors)
3982 return 0;
3983
3984 /* n_sectors has changed */
a9a79dfe
JP
3985 ata_dev_warn(dev, "n_sectors mismatch %llu != %llu\n",
3986 (unsigned long long)n_sectors,
3987 (unsigned long long)dev->n_sectors);
445d211b
TH
3988
3989 /*
3990 * Something could have caused HPA to be unlocked
3991 * involuntarily. If n_native_sectors hasn't changed and the
3992 * new size matches it, keep the device.
3993 */
3994 if (dev->n_native_sectors == n_native_sectors &&
3995 dev->n_sectors > n_sectors && dev->n_sectors == n_native_sectors) {
a9a79dfe
JP
3996 ata_dev_warn(dev,
3997 "new n_sectors matches native, probably "
3998 "late HPA unlock, n_sectors updated\n");
68939ce5 3999 /* use the larger n_sectors */
445d211b 4000 return 0;
6ddcd3b0
TH
4001 }
4002
445d211b
TH
4003 /*
4004 * Some BIOSes boot w/o HPA but resume w/ HPA locked. Try
4005 * unlocking HPA in those cases.
4006 *
4007 * https://bugzilla.kernel.org/show_bug.cgi?id=15396
4008 */
4009 if (dev->n_native_sectors == n_native_sectors &&
4010 dev->n_sectors < n_sectors && n_sectors == n_native_sectors &&
4011 !(dev->horkage & ATA_HORKAGE_BROKEN_HPA)) {
a9a79dfe
JP
4012 ata_dev_warn(dev,
4013 "old n_sectors matches native, probably "
4014 "late HPA lock, will try to unlock HPA\n");
445d211b
TH
4015 /* try unlocking HPA */
4016 dev->flags |= ATA_DFLAG_UNLOCK_HPA;
4017 rc = -EIO;
4018 } else
4019 rc = -ENODEV;
623a3128 4020
445d211b
TH
4021 /* restore original n_[native_]sectors and fail */
4022 dev->n_native_sectors = n_native_sectors;
4023 dev->n_sectors = n_sectors;
623a3128 4024 fail:
a9a79dfe 4025 ata_dev_err(dev, "revalidation failed (errno=%d)\n", rc);
623a3128
TH
4026 return rc;
4027}
4028
6919a0a6
AC
4029struct ata_blacklist_entry {
4030 const char *model_num;
4031 const char *model_rev;
4032 unsigned long horkage;
4033};
4034
4035static const struct ata_blacklist_entry ata_device_blacklist [] = {
4036 /* Devices with DMA related problems under Linux */
4037 { "WDC AC11000H", NULL, ATA_HORKAGE_NODMA },
4038 { "WDC AC22100H", NULL, ATA_HORKAGE_NODMA },
4039 { "WDC AC32500H", NULL, ATA_HORKAGE_NODMA },
4040 { "WDC AC33100H", NULL, ATA_HORKAGE_NODMA },
4041 { "WDC AC31600H", NULL, ATA_HORKAGE_NODMA },
4042 { "WDC AC32100H", "24.09P07", ATA_HORKAGE_NODMA },
4043 { "WDC AC23200L", "21.10N21", ATA_HORKAGE_NODMA },
4044 { "Compaq CRD-8241B", NULL, ATA_HORKAGE_NODMA },
4045 { "CRD-8400B", NULL, ATA_HORKAGE_NODMA },
7da4c935 4046 { "CRD-848[02]B", NULL, ATA_HORKAGE_NODMA },
6919a0a6
AC
4047 { "CRD-84", NULL, ATA_HORKAGE_NODMA },
4048 { "SanDisk SDP3B", NULL, ATA_HORKAGE_NODMA },
4049 { "SanDisk SDP3B-64", NULL, ATA_HORKAGE_NODMA },
4050 { "SANYO CD-ROM CRD", NULL, ATA_HORKAGE_NODMA },
4051 { "HITACHI CDR-8", NULL, ATA_HORKAGE_NODMA },
7da4c935 4052 { "HITACHI CDR-8[34]35",NULL, ATA_HORKAGE_NODMA },
6919a0a6
AC
4053 { "Toshiba CD-ROM XM-6202B", NULL, ATA_HORKAGE_NODMA },
4054 { "TOSHIBA CD-ROM XM-1702BC", NULL, ATA_HORKAGE_NODMA },
4055 { "CD-532E-A", NULL, ATA_HORKAGE_NODMA },
4056 { "E-IDE CD-ROM CR-840",NULL, ATA_HORKAGE_NODMA },
4057 { "CD-ROM Drive/F5A", NULL, ATA_HORKAGE_NODMA },
4058 { "WPI CDD-820", NULL, ATA_HORKAGE_NODMA },
4059 { "SAMSUNG CD-ROM SC-148C", NULL, ATA_HORKAGE_NODMA },
4060 { "SAMSUNG CD-ROM SC", NULL, ATA_HORKAGE_NODMA },
6919a0a6
AC
4061 { "ATAPI CD-ROM DRIVE 40X MAXIMUM",NULL,ATA_HORKAGE_NODMA },
4062 { "_NEC DV5800A", NULL, ATA_HORKAGE_NODMA },
2dcb407e 4063 { "SAMSUNG CD-ROM SN-124", "N001", ATA_HORKAGE_NODMA },
39f19886 4064 { "Seagate STT20000A", NULL, ATA_HORKAGE_NODMA },
d70e551c 4065 { "2GB ATA Flash Disk", "ADMA428M", ATA_HORKAGE_NODMA },
3af9a77a 4066 /* Odd clown on sil3726/4726 PMPs */
50af2fa1 4067 { "Config Disk", NULL, ATA_HORKAGE_DISABLE },
6919a0a6 4068
18d6e9d5 4069 /* Weird ATAPI devices */
40a1d531 4070 { "TORiSAN DVD-ROM DRD-N216", NULL, ATA_HORKAGE_MAX_SEC_128 },
6a87e42e 4071 { "QUANTUM DAT DAT72-000", NULL, ATA_HORKAGE_ATAPI_MOD16_DMA },
18d6e9d5 4072
6919a0a6
AC
4073 /* Devices we expect to fail diagnostics */
4074
4075 /* Devices where NCQ should be avoided */
4076 /* NCQ is slow */
2dcb407e 4077 { "WDC WD740ADFD-00", NULL, ATA_HORKAGE_NONCQ },
459ad688 4078 { "WDC WD740ADFD-00NLR1", NULL, ATA_HORKAGE_NONCQ, },
09125ea6
TH
4079 /* http://thread.gmane.org/gmane.linux.ide/14907 */
4080 { "FUJITSU MHT2060BH", NULL, ATA_HORKAGE_NONCQ },
7acfaf30 4081 /* NCQ is broken */
539cc7c7 4082 { "Maxtor *", "BANC*", ATA_HORKAGE_NONCQ },
0e3dbc01 4083 { "Maxtor 7V300F0", "VA111630", ATA_HORKAGE_NONCQ },
da6f0ec2 4084 { "ST380817AS", "3.42", ATA_HORKAGE_NONCQ },
e41bd3e8 4085 { "ST3160023AS", "3.42", ATA_HORKAGE_NONCQ },
5ccfca97 4086 { "OCZ CORE_SSD", "02.10104", ATA_HORKAGE_NONCQ },
539cc7c7 4087
ac70a964 4088 /* Seagate NCQ + FLUSH CACHE firmware bug */
4d1f9082 4089 { "ST31500341AS", "SD1[5-9]", ATA_HORKAGE_NONCQ |
ac70a964 4090 ATA_HORKAGE_FIRMWARE_WARN },
d10d491f 4091
4d1f9082 4092 { "ST31000333AS", "SD1[5-9]", ATA_HORKAGE_NONCQ |
d10d491f
TH
4093 ATA_HORKAGE_FIRMWARE_WARN },
4094
4d1f9082 4095 { "ST3640[36]23AS", "SD1[5-9]", ATA_HORKAGE_NONCQ |
d10d491f
TH
4096 ATA_HORKAGE_FIRMWARE_WARN },
4097
4d1f9082 4098 { "ST3320[68]13AS", "SD1[5-9]", ATA_HORKAGE_NONCQ |
ac70a964
TH
4099 ATA_HORKAGE_FIRMWARE_WARN },
4100
36e337d0
RH
4101 /* Blacklist entries taken from Silicon Image 3124/3132
4102 Windows driver .inf file - also several Linux problem reports */
4103 { "HTS541060G9SA00", "MB3OC60D", ATA_HORKAGE_NONCQ, },
4104 { "HTS541080G9SA00", "MB4OC60D", ATA_HORKAGE_NONCQ, },
4105 { "HTS541010G9SA00", "MBZOC60D", ATA_HORKAGE_NONCQ, },
6919a0a6 4106
68b0ddb2
TH
4107 /* https://bugzilla.kernel.org/show_bug.cgi?id=15573 */
4108 { "C300-CTFDDAC128MAG", "0001", ATA_HORKAGE_NONCQ, },
4109
16c55b03
TH
4110 /* devices which puke on READ_NATIVE_MAX */
4111 { "HDS724040KLSA80", "KFAOA20N", ATA_HORKAGE_BROKEN_HPA, },
4112 { "WDC WD3200JD-00KLB0", "WD-WCAMR1130137", ATA_HORKAGE_BROKEN_HPA },
4113 { "WDC WD2500JD-00HBB0", "WD-WMAL71490727", ATA_HORKAGE_BROKEN_HPA },
4114 { "MAXTOR 6L080L4", "A93.0500", ATA_HORKAGE_BROKEN_HPA },
6919a0a6 4115
7831387b
TH
4116 /* this one allows HPA unlocking but fails IOs on the area */
4117 { "OCZ-VERTEX", "1.30", ATA_HORKAGE_BROKEN_HPA },
4118
93328e11
AC
4119 /* Devices which report 1 sector over size HPA */
4120 { "ST340823A", NULL, ATA_HORKAGE_HPA_SIZE, },
4121 { "ST320413A", NULL, ATA_HORKAGE_HPA_SIZE, },
b152fcd3 4122 { "ST310211A", NULL, ATA_HORKAGE_HPA_SIZE, },
93328e11 4123
6bbfd53d
AC
4124 /* Devices which get the IVB wrong */
4125 { "QUANTUM FIREBALLlct10 05", "A03.0900", ATA_HORKAGE_IVB, },
a79067e5 4126 /* Maybe we should just blacklist TSSTcorp... */
7da4c935 4127 { "TSSTcorp CDDVDW SH-S202[HJN]", "SB0[01]", ATA_HORKAGE_IVB, },
6bbfd53d 4128
9ce8e307
JA
4129 /* Devices that do not need bridging limits applied */
4130 { "MTRON MSP-SATA*", NULL, ATA_HORKAGE_BRIDGE_OK, },
04d0f1b8 4131 { "BUFFALO HD-QSU2/R5", NULL, ATA_HORKAGE_BRIDGE_OK, },
9ce8e307 4132
9062712f
TH
4133 /* Devices which aren't very happy with higher link speeds */
4134 { "WD My Book", NULL, ATA_HORKAGE_1_5_GBPS, },
c531077f 4135 { "Seagate FreeAgent GoFlex", NULL, ATA_HORKAGE_1_5_GBPS, },
9062712f 4136
d0cb43b3
TH
4137 /*
4138 * Devices which choke on SETXFER. Applies only if both the
4139 * device and controller are SATA.
4140 */
cd691876 4141 { "PIONEER DVD-RW DVRTD08", NULL, ATA_HORKAGE_NOSETXFER },
3a25179e
VL
4142 { "PIONEER DVD-RW DVRTD08A", NULL, ATA_HORKAGE_NOSETXFER },
4143 { "PIONEER DVD-RW DVR-215", NULL, ATA_HORKAGE_NOSETXFER },
cd691876
TH
4144 { "PIONEER DVD-RW DVR-212D", NULL, ATA_HORKAGE_NOSETXFER },
4145 { "PIONEER DVD-RW DVR-216D", NULL, ATA_HORKAGE_NOSETXFER },
d0cb43b3 4146
6919a0a6
AC
4147 /* End Marker */
4148 { }
1da177e4 4149};
2e9edbf8 4150
bce036ce
ML
4151/**
4152 * glob_match - match a text string against a glob-style pattern
4153 * @text: the string to be examined
4154 * @pattern: the glob-style pattern to be matched against
4155 *
4156 * Either/both of text and pattern can be empty strings.
4157 *
4158 * Match text against a glob-style pattern, with wildcards and simple sets:
4159 *
4160 * ? matches any single character.
4161 * * matches any run of characters.
4162 * [xyz] matches a single character from the set: x, y, or z.
2f9e4d16
ML
4163 * [a-d] matches a single character from the range: a, b, c, or d.
4164 * [a-d0-9] matches a single character from either range.
bce036ce 4165 *
2f9e4d16
ML
4166 * The special characters ?, [, -, or *, can be matched using a set, eg. [*]
4167 * Behaviour with malformed patterns is undefined, though generally reasonable.
bce036ce 4168 *
3d2be54b 4169 * Sample patterns: "SD1?", "SD1[0-5]", "*R0", "SD*1?[012]*xx"
bce036ce
ML
4170 *
4171 * This function uses one level of recursion per '*' in pattern.
4172 * Since it calls _nothing_ else, and has _no_ explicit local variables,
4173 * this will not cause stack problems for any reasonable use here.
4174 *
4175 * RETURNS:
4176 * 0 on match, 1 otherwise.
4177 */
4178static int glob_match (const char *text, const char *pattern)
539cc7c7 4179{
bce036ce
ML
4180 do {
4181 /* Match single character or a '?' wildcard */
4182 if (*text == *pattern || *pattern == '?') {
4183 if (!*pattern++)
4184 return 0; /* End of both strings: match */
4185 } else {
4186 /* Match single char against a '[' bracketed ']' pattern set */
4187 if (!*text || *pattern != '[')
4188 break; /* Not a pattern set */
2f9e4d16
ML
4189 while (*++pattern && *pattern != ']' && *text != *pattern) {
4190 if (*pattern == '-' && *(pattern - 1) != '[')
4191 if (*text > *(pattern - 1) && *text < *(pattern + 1)) {
4192 ++pattern;
4193 break;
4194 }
4195 }
bce036ce
ML
4196 if (!*pattern || *pattern == ']')
4197 return 1; /* No match */
4198 while (*pattern && *pattern++ != ']');
4199 }
4200 } while (*++text && *pattern);
4201
4202 /* Match any run of chars against a '*' wildcard */
4203 if (*pattern == '*') {
4204 if (!*++pattern)
4205 return 0; /* Match: avoid recursion at end of pattern */
4206 /* Loop to handle additional pattern chars after the wildcard */
4207 while (*text) {
4208 if (glob_match(text, pattern) == 0)
4209 return 0; /* Remainder matched */
4210 ++text; /* Absorb (match) this char and try again */
317b50b8
AP
4211 }
4212 }
bce036ce
ML
4213 if (!*text && !*pattern)
4214 return 0; /* End of both strings: match */
4215 return 1; /* No match */
539cc7c7 4216}
4fca377f 4217
75683fe7 4218static unsigned long ata_dev_blacklisted(const struct ata_device *dev)
1da177e4 4219{
8bfa79fc
TH
4220 unsigned char model_num[ATA_ID_PROD_LEN + 1];
4221 unsigned char model_rev[ATA_ID_FW_REV_LEN + 1];
6919a0a6 4222 const struct ata_blacklist_entry *ad = ata_device_blacklist;
3a778275 4223
8bfa79fc
TH
4224 ata_id_c_string(dev->id, model_num, ATA_ID_PROD, sizeof(model_num));
4225 ata_id_c_string(dev->id, model_rev, ATA_ID_FW_REV, sizeof(model_rev));
1da177e4 4226
6919a0a6 4227 while (ad->model_num) {
bce036ce 4228 if (!glob_match(model_num, ad->model_num)) {
6919a0a6
AC
4229 if (ad->model_rev == NULL)
4230 return ad->horkage;
bce036ce 4231 if (!glob_match(model_rev, ad->model_rev))
6919a0a6 4232 return ad->horkage;
f4b15fef 4233 }
6919a0a6 4234 ad++;
f4b15fef 4235 }
1da177e4
LT
4236 return 0;
4237}
4238
6919a0a6
AC
4239static int ata_dma_blacklisted(const struct ata_device *dev)
4240{
4241 /* We don't support polling DMA.
4242 * DMA blacklist those ATAPI devices with CDB-intr (and use PIO)
4243 * if the LLDD handles only interrupts in the HSM_ST_LAST state.
4244 */
9af5c9c9 4245 if ((dev->link->ap->flags & ATA_FLAG_PIO_POLLING) &&
6919a0a6
AC
4246 (dev->flags & ATA_DFLAG_CDB_INTR))
4247 return 1;
75683fe7 4248 return (dev->horkage & ATA_HORKAGE_NODMA) ? 1 : 0;
6919a0a6
AC
4249}
4250
6bbfd53d
AC
4251/**
4252 * ata_is_40wire - check drive side detection
4253 * @dev: device
4254 *
4255 * Perform drive side detection decoding, allowing for device vendors
4256 * who can't follow the documentation.
4257 */
4258
4259static int ata_is_40wire(struct ata_device *dev)
4260{
4261 if (dev->horkage & ATA_HORKAGE_IVB)
4262 return ata_drive_40wire_relaxed(dev->id);
4263 return ata_drive_40wire(dev->id);
4264}
4265
15a5551c
AC
4266/**
4267 * cable_is_40wire - 40/80/SATA decider
4268 * @ap: port to consider
4269 *
4270 * This function encapsulates the policy for speed management
4271 * in one place. At the moment we don't cache the result but
4272 * there is a good case for setting ap->cbl to the result when
4273 * we are called with unknown cables (and figuring out if it
4274 * impacts hotplug at all).
4275 *
4276 * Return 1 if the cable appears to be 40 wire.
4277 */
4278
4279static int cable_is_40wire(struct ata_port *ap)
4280{
4281 struct ata_link *link;
4282 struct ata_device *dev;
4283
4a9c7b33 4284 /* If the controller thinks we are 40 wire, we are. */
15a5551c
AC
4285 if (ap->cbl == ATA_CBL_PATA40)
4286 return 1;
4a9c7b33
TH
4287
4288 /* If the controller thinks we are 80 wire, we are. */
15a5551c
AC
4289 if (ap->cbl == ATA_CBL_PATA80 || ap->cbl == ATA_CBL_SATA)
4290 return 0;
4a9c7b33
TH
4291
4292 /* If the system is known to be 40 wire short cable (eg
4293 * laptop), then we allow 80 wire modes even if the drive
4294 * isn't sure.
4295 */
f792068e
AC
4296 if (ap->cbl == ATA_CBL_PATA40_SHORT)
4297 return 0;
4a9c7b33
TH
4298
4299 /* If the controller doesn't know, we scan.
4300 *
4301 * Note: We look for all 40 wire detects at this point. Any
4302 * 80 wire detect is taken to be 80 wire cable because
4303 * - in many setups only the one drive (slave if present) will
4304 * give a valid detect
4305 * - if you have a non detect capable drive you don't want it
4306 * to colour the choice
4307 */
1eca4365
TH
4308 ata_for_each_link(link, ap, EDGE) {
4309 ata_for_each_dev(dev, link, ENABLED) {
4310 if (!ata_is_40wire(dev))
15a5551c
AC
4311 return 0;
4312 }
4313 }
4314 return 1;
4315}
4316
a6d5a51c
TH
4317/**
4318 * ata_dev_xfermask - Compute supported xfermask of the given device
a6d5a51c
TH
4319 * @dev: Device to compute xfermask for
4320 *
acf356b1
TH
4321 * Compute supported xfermask of @dev and store it in
4322 * dev->*_mask. This function is responsible for applying all
4323 * known limits including host controller limits, device
4324 * blacklist, etc...
a6d5a51c
TH
4325 *
4326 * LOCKING:
4327 * None.
a6d5a51c 4328 */
3373efd8 4329static void ata_dev_xfermask(struct ata_device *dev)
1da177e4 4330{
9af5c9c9
TH
4331 struct ata_link *link = dev->link;
4332 struct ata_port *ap = link->ap;
cca3974e 4333 struct ata_host *host = ap->host;
a6d5a51c 4334 unsigned long xfer_mask;
1da177e4 4335
37deecb5 4336 /* controller modes available */
565083e1
TH
4337 xfer_mask = ata_pack_xfermask(ap->pio_mask,
4338 ap->mwdma_mask, ap->udma_mask);
4339
8343f889 4340 /* drive modes available */
37deecb5
TH
4341 xfer_mask &= ata_pack_xfermask(dev->pio_mask,
4342 dev->mwdma_mask, dev->udma_mask);
4343 xfer_mask &= ata_id_xfermask(dev->id);
565083e1 4344
b352e57d
AC
4345 /*
4346 * CFA Advanced TrueIDE timings are not allowed on a shared
4347 * cable
4348 */
4349 if (ata_dev_pair(dev)) {
4350 /* No PIO5 or PIO6 */
4351 xfer_mask &= ~(0x03 << (ATA_SHIFT_PIO + 5));
4352 /* No MWDMA3 or MWDMA 4 */
4353 xfer_mask &= ~(0x03 << (ATA_SHIFT_MWDMA + 3));
4354 }
4355
37deecb5
TH
4356 if (ata_dma_blacklisted(dev)) {
4357 xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA);
a9a79dfe
JP
4358 ata_dev_warn(dev,
4359 "device is on DMA blacklist, disabling DMA\n");
37deecb5 4360 }
a6d5a51c 4361
14d66ab7 4362 if ((host->flags & ATA_HOST_SIMPLEX) &&
2dcb407e 4363 host->simplex_claimed && host->simplex_claimed != ap) {
37deecb5 4364 xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA);
a9a79dfe
JP
4365 ata_dev_warn(dev,
4366 "simplex DMA is claimed by other device, disabling DMA\n");
5444a6f4 4367 }
565083e1 4368
e424675f
JG
4369 if (ap->flags & ATA_FLAG_NO_IORDY)
4370 xfer_mask &= ata_pio_mask_no_iordy(dev);
4371
5444a6f4 4372 if (ap->ops->mode_filter)
a76b62ca 4373 xfer_mask = ap->ops->mode_filter(dev, xfer_mask);
5444a6f4 4374
8343f889
RH
4375 /* Apply cable rule here. Don't apply it early because when
4376 * we handle hot plug the cable type can itself change.
4377 * Check this last so that we know if the transfer rate was
4378 * solely limited by the cable.
4379 * Unknown or 80 wire cables reported host side are checked
4380 * drive side as well. Cases where we know a 40wire cable
4381 * is used safely for 80 are not checked here.
4382 */
4383 if (xfer_mask & (0xF8 << ATA_SHIFT_UDMA))
4384 /* UDMA/44 or higher would be available */
15a5551c 4385 if (cable_is_40wire(ap)) {
a9a79dfe
JP
4386 ata_dev_warn(dev,
4387 "limited to UDMA/33 due to 40-wire cable\n");
8343f889
RH
4388 xfer_mask &= ~(0xF8 << ATA_SHIFT_UDMA);
4389 }
4390
565083e1
TH
4391 ata_unpack_xfermask(xfer_mask, &dev->pio_mask,
4392 &dev->mwdma_mask, &dev->udma_mask);
1da177e4
LT
4393}
4394
1da177e4
LT
4395/**
4396 * ata_dev_set_xfermode - Issue SET FEATURES - XFER MODE command
1da177e4
LT
4397 * @dev: Device to which command will be sent
4398 *
780a87f7
JG
4399 * Issue SET FEATURES - XFER MODE command to device @dev
4400 * on port @ap.
4401 *
1da177e4 4402 * LOCKING:
0cba632b 4403 * PCI/etc. bus probe sem.
83206a29
TH
4404 *
4405 * RETURNS:
4406 * 0 on success, AC_ERR_* mask otherwise.
1da177e4
LT
4407 */
4408
3373efd8 4409static unsigned int ata_dev_set_xfermode(struct ata_device *dev)
1da177e4 4410{
a0123703 4411 struct ata_taskfile tf;
83206a29 4412 unsigned int err_mask;
1da177e4
LT
4413
4414 /* set up set-features taskfile */
4415 DPRINTK("set features - xfer mode\n");
4416
464cf177
TH
4417 /* Some controllers and ATAPI devices show flaky interrupt
4418 * behavior after setting xfer mode. Use polling instead.
4419 */
3373efd8 4420 ata_tf_init(dev, &tf);
a0123703
TH
4421 tf.command = ATA_CMD_SET_FEATURES;
4422 tf.feature = SETFEATURES_XFER;
464cf177 4423 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE | ATA_TFLAG_POLLING;
a0123703 4424 tf.protocol = ATA_PROT_NODATA;
b9f8ab2d 4425 /* If we are using IORDY we must send the mode setting command */
11b7becc
JG
4426 if (ata_pio_need_iordy(dev))
4427 tf.nsect = dev->xfer_mode;
b9f8ab2d
AC
4428 /* If the device has IORDY and the controller does not - turn it off */
4429 else if (ata_id_has_iordy(dev->id))
11b7becc 4430 tf.nsect = 0x01;
b9f8ab2d
AC
4431 else /* In the ancient relic department - skip all of this */
4432 return 0;
1da177e4 4433
2b789108 4434 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0, 0);
9f45cbd3
KCA
4435
4436 DPRINTK("EXIT, err_mask=%x\n", err_mask);
4437 return err_mask;
4438}
1152b261 4439
9f45cbd3 4440/**
218f3d30 4441 * ata_dev_set_feature - Issue SET FEATURES - SATA FEATURES
9f45cbd3
KCA
4442 * @dev: Device to which command will be sent
4443 * @enable: Whether to enable or disable the feature
218f3d30 4444 * @feature: The sector count represents the feature to set
9f45cbd3
KCA
4445 *
4446 * Issue SET FEATURES - SATA FEATURES command to device @dev
218f3d30 4447 * on port @ap with sector count
9f45cbd3
KCA
4448 *
4449 * LOCKING:
4450 * PCI/etc. bus probe sem.
4451 *
4452 * RETURNS:
4453 * 0 on success, AC_ERR_* mask otherwise.
4454 */
1152b261 4455unsigned int ata_dev_set_feature(struct ata_device *dev, u8 enable, u8 feature)
9f45cbd3
KCA
4456{
4457 struct ata_taskfile tf;
4458 unsigned int err_mask;
4459
4460 /* set up set-features taskfile */
4461 DPRINTK("set features - SATA features\n");
4462
4463 ata_tf_init(dev, &tf);
4464 tf.command = ATA_CMD_SET_FEATURES;
4465 tf.feature = enable;
4466 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
4467 tf.protocol = ATA_PROT_NODATA;
218f3d30 4468 tf.nsect = feature;
9f45cbd3 4469
2b789108 4470 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0, 0);
1da177e4 4471
83206a29
TH
4472 DPRINTK("EXIT, err_mask=%x\n", err_mask);
4473 return err_mask;
1da177e4
LT
4474}
4475
8bf62ece
AL
4476/**
4477 * ata_dev_init_params - Issue INIT DEV PARAMS command
8bf62ece 4478 * @dev: Device to which command will be sent
e2a7f77a
RD
4479 * @heads: Number of heads (taskfile parameter)
4480 * @sectors: Number of sectors (taskfile parameter)
8bf62ece
AL
4481 *
4482 * LOCKING:
6aff8f1f
TH
4483 * Kernel thread context (may sleep)
4484 *
4485 * RETURNS:
4486 * 0 on success, AC_ERR_* mask otherwise.
8bf62ece 4487 */
3373efd8
TH
4488static unsigned int ata_dev_init_params(struct ata_device *dev,
4489 u16 heads, u16 sectors)
8bf62ece 4490{
a0123703 4491 struct ata_taskfile tf;
6aff8f1f 4492 unsigned int err_mask;
8bf62ece
AL
4493
4494 /* Number of sectors per track 1-255. Number of heads 1-16 */
4495 if (sectors < 1 || sectors > 255 || heads < 1 || heads > 16)
00b6f5e9 4496 return AC_ERR_INVALID;
8bf62ece
AL
4497
4498 /* set up init dev params taskfile */
4499 DPRINTK("init dev params \n");
4500
3373efd8 4501 ata_tf_init(dev, &tf);
a0123703
TH
4502 tf.command = ATA_CMD_INIT_DEV_PARAMS;
4503 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
4504 tf.protocol = ATA_PROT_NODATA;
4505 tf.nsect = sectors;
4506 tf.device |= (heads - 1) & 0x0f; /* max head = num. of heads - 1 */
8bf62ece 4507
2b789108 4508 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0, 0);
18b2466c
AC
4509 /* A clean abort indicates an original or just out of spec drive
4510 and we should continue as we issue the setup based on the
4511 drive reported working geometry */
4512 if (err_mask == AC_ERR_DEV && (tf.feature & ATA_ABORTED))
4513 err_mask = 0;
8bf62ece 4514
6aff8f1f
TH
4515 DPRINTK("EXIT, err_mask=%x\n", err_mask);
4516 return err_mask;
8bf62ece
AL
4517}
4518
1da177e4 4519/**
0cba632b
JG
4520 * ata_sg_clean - Unmap DMA memory associated with command
4521 * @qc: Command containing DMA memory to be released
4522 *
4523 * Unmap all mapped DMA memory associated with this command.
1da177e4
LT
4524 *
4525 * LOCKING:
cca3974e 4526 * spin_lock_irqsave(host lock)
1da177e4 4527 */
70e6ad0c 4528void ata_sg_clean(struct ata_queued_cmd *qc)
1da177e4
LT
4529{
4530 struct ata_port *ap = qc->ap;
ff2aeb1e 4531 struct scatterlist *sg = qc->sg;
1da177e4
LT
4532 int dir = qc->dma_dir;
4533
efcb3cf7 4534 WARN_ON_ONCE(sg == NULL);
1da177e4 4535
dde20207 4536 VPRINTK("unmapping %u sg elements\n", qc->n_elem);
1da177e4 4537
dde20207 4538 if (qc->n_elem)
5825627c 4539 dma_unmap_sg(ap->dev, sg, qc->orig_n_elem, dir);
1da177e4
LT
4540
4541 qc->flags &= ~ATA_QCFLAG_DMAMAP;
ff2aeb1e 4542 qc->sg = NULL;
1da177e4
LT
4543}
4544
1da177e4 4545/**
5895ef9a 4546 * atapi_check_dma - Check whether ATAPI DMA can be supported
1da177e4
LT
4547 * @qc: Metadata associated with taskfile to check
4548 *
780a87f7
JG
4549 * Allow low-level driver to filter ATA PACKET commands, returning
4550 * a status indicating whether or not it is OK to use DMA for the
4551 * supplied PACKET command.
4552 *
1da177e4 4553 * LOCKING:
624d5c51
TH
4554 * spin_lock_irqsave(host lock)
4555 *
4556 * RETURNS: 0 when ATAPI DMA can be used
4557 * nonzero otherwise
4558 */
5895ef9a 4559int atapi_check_dma(struct ata_queued_cmd *qc)
624d5c51
TH
4560{
4561 struct ata_port *ap = qc->ap;
71601958 4562
624d5c51
TH
4563 /* Don't allow DMA if it isn't multiple of 16 bytes. Quite a
4564 * few ATAPI devices choke on such DMA requests.
4565 */
6a87e42e
TH
4566 if (!(qc->dev->horkage & ATA_HORKAGE_ATAPI_MOD16_DMA) &&
4567 unlikely(qc->nbytes & 15))
624d5c51 4568 return 1;
e2cec771 4569
624d5c51
TH
4570 if (ap->ops->check_atapi_dma)
4571 return ap->ops->check_atapi_dma(qc);
e2cec771 4572
624d5c51
TH
4573 return 0;
4574}
1da177e4 4575
624d5c51
TH
4576/**
4577 * ata_std_qc_defer - Check whether a qc needs to be deferred
4578 * @qc: ATA command in question
4579 *
4580 * Non-NCQ commands cannot run with any other command, NCQ or
4581 * not. As upper layer only knows the queue depth, we are
4582 * responsible for maintaining exclusion. This function checks
4583 * whether a new command @qc can be issued.
4584 *
4585 * LOCKING:
4586 * spin_lock_irqsave(host lock)
4587 *
4588 * RETURNS:
4589 * ATA_DEFER_* if deferring is needed, 0 otherwise.
4590 */
4591int ata_std_qc_defer(struct ata_queued_cmd *qc)
4592{
4593 struct ata_link *link = qc->dev->link;
e2cec771 4594
624d5c51
TH
4595 if (qc->tf.protocol == ATA_PROT_NCQ) {
4596 if (!ata_tag_valid(link->active_tag))
4597 return 0;
4598 } else {
4599 if (!ata_tag_valid(link->active_tag) && !link->sactive)
4600 return 0;
4601 }
e2cec771 4602
624d5c51
TH
4603 return ATA_DEFER_LINK;
4604}
6912ccd5 4605
624d5c51 4606void ata_noop_qc_prep(struct ata_queued_cmd *qc) { }
1da177e4 4607
624d5c51
TH
4608/**
4609 * ata_sg_init - Associate command with scatter-gather table.
4610 * @qc: Command to be associated
4611 * @sg: Scatter-gather table.
4612 * @n_elem: Number of elements in s/g table.
4613 *
4614 * Initialize the data-related elements of queued_cmd @qc
4615 * to point to a scatter-gather table @sg, containing @n_elem
4616 * elements.
4617 *
4618 * LOCKING:
4619 * spin_lock_irqsave(host lock)
4620 */
4621void ata_sg_init(struct ata_queued_cmd *qc, struct scatterlist *sg,
4622 unsigned int n_elem)
4623{
4624 qc->sg = sg;
4625 qc->n_elem = n_elem;
4626 qc->cursg = qc->sg;
4627}
bb5cb290 4628
624d5c51
TH
4629/**
4630 * ata_sg_setup - DMA-map the scatter-gather table associated with a command.
4631 * @qc: Command with scatter-gather table to be mapped.
4632 *
4633 * DMA-map the scatter-gather table associated with queued_cmd @qc.
4634 *
4635 * LOCKING:
4636 * spin_lock_irqsave(host lock)
4637 *
4638 * RETURNS:
4639 * Zero on success, negative on error.
4640 *
4641 */
4642static int ata_sg_setup(struct ata_queued_cmd *qc)
4643{
4644 struct ata_port *ap = qc->ap;
4645 unsigned int n_elem;
1da177e4 4646
624d5c51 4647 VPRINTK("ENTER, ata%u\n", ap->print_id);
e2cec771 4648
624d5c51
TH
4649 n_elem = dma_map_sg(ap->dev, qc->sg, qc->n_elem, qc->dma_dir);
4650 if (n_elem < 1)
4651 return -1;
bb5cb290 4652
624d5c51 4653 DPRINTK("%d sg elements mapped\n", n_elem);
5825627c 4654 qc->orig_n_elem = qc->n_elem;
624d5c51
TH
4655 qc->n_elem = n_elem;
4656 qc->flags |= ATA_QCFLAG_DMAMAP;
1da177e4 4657
624d5c51 4658 return 0;
1da177e4
LT
4659}
4660
624d5c51
TH
4661/**
4662 * swap_buf_le16 - swap halves of 16-bit words in place
4663 * @buf: Buffer to swap
4664 * @buf_words: Number of 16-bit words in buffer.
4665 *
4666 * Swap halves of 16-bit words if needed to convert from
4667 * little-endian byte order to native cpu byte order, or
4668 * vice-versa.
4669 *
4670 * LOCKING:
4671 * Inherited from caller.
4672 */
4673void swap_buf_le16(u16 *buf, unsigned int buf_words)
8061f5f0 4674{
624d5c51
TH
4675#ifdef __BIG_ENDIAN
4676 unsigned int i;
8061f5f0 4677
624d5c51
TH
4678 for (i = 0; i < buf_words; i++)
4679 buf[i] = le16_to_cpu(buf[i]);
4680#endif /* __BIG_ENDIAN */
8061f5f0
TH
4681}
4682
8a8bc223
TH
4683/**
4684 * ata_qc_new - Request an available ATA command, for queueing
5eb66fe0 4685 * @ap: target port
8a8bc223
TH
4686 *
4687 * LOCKING:
4688 * None.
4689 */
4690
4691static struct ata_queued_cmd *ata_qc_new(struct ata_port *ap)
4692{
4693 struct ata_queued_cmd *qc = NULL;
4694 unsigned int i;
4695
4696 /* no command while frozen */
4697 if (unlikely(ap->pflags & ATA_PFLAG_FROZEN))
4698 return NULL;
4699
4700 /* the last tag is reserved for internal command. */
4701 for (i = 0; i < ATA_MAX_QUEUE - 1; i++)
4702 if (!test_and_set_bit(i, &ap->qc_allocated)) {
4703 qc = __ata_qc_from_tag(ap, i);
4704 break;
4705 }
4706
4707 if (qc)
4708 qc->tag = i;
4709
4710 return qc;
4711}
4712
1da177e4
LT
4713/**
4714 * ata_qc_new_init - Request an available ATA command, and initialize it
1da177e4
LT
4715 * @dev: Device from whom we request an available command structure
4716 *
4717 * LOCKING:
0cba632b 4718 * None.
1da177e4
LT
4719 */
4720
8a8bc223 4721struct ata_queued_cmd *ata_qc_new_init(struct ata_device *dev)
1da177e4 4722{
9af5c9c9 4723 struct ata_port *ap = dev->link->ap;
1da177e4
LT
4724 struct ata_queued_cmd *qc;
4725
8a8bc223 4726 qc = ata_qc_new(ap);
1da177e4 4727 if (qc) {
1da177e4
LT
4728 qc->scsicmd = NULL;
4729 qc->ap = ap;
4730 qc->dev = dev;
1da177e4 4731
2c13b7ce 4732 ata_qc_reinit(qc);
1da177e4
LT
4733 }
4734
4735 return qc;
4736}
4737
8a8bc223
TH
4738/**
4739 * ata_qc_free - free unused ata_queued_cmd
4740 * @qc: Command to complete
4741 *
4742 * Designed to free unused ata_queued_cmd object
4743 * in case something prevents using it.
4744 *
4745 * LOCKING:
4746 * spin_lock_irqsave(host lock)
4747 */
4748void ata_qc_free(struct ata_queued_cmd *qc)
4749{
a1104016 4750 struct ata_port *ap;
8a8bc223
TH
4751 unsigned int tag;
4752
efcb3cf7 4753 WARN_ON_ONCE(qc == NULL); /* ata_qc_from_tag _might_ return NULL */
a1104016 4754 ap = qc->ap;
8a8bc223
TH
4755
4756 qc->flags = 0;
4757 tag = qc->tag;
4758 if (likely(ata_tag_valid(tag))) {
4759 qc->tag = ATA_TAG_POISON;
4760 clear_bit(tag, &ap->qc_allocated);
4761 }
4762}
4763
76014427 4764void __ata_qc_complete(struct ata_queued_cmd *qc)
1da177e4 4765{
a1104016
JL
4766 struct ata_port *ap;
4767 struct ata_link *link;
dedaf2b0 4768
efcb3cf7
TH
4769 WARN_ON_ONCE(qc == NULL); /* ata_qc_from_tag _might_ return NULL */
4770 WARN_ON_ONCE(!(qc->flags & ATA_QCFLAG_ACTIVE));
a1104016
JL
4771 ap = qc->ap;
4772 link = qc->dev->link;
1da177e4
LT
4773
4774 if (likely(qc->flags & ATA_QCFLAG_DMAMAP))
4775 ata_sg_clean(qc);
4776
7401abf2 4777 /* command should be marked inactive atomically with qc completion */
da917d69 4778 if (qc->tf.protocol == ATA_PROT_NCQ) {
9af5c9c9 4779 link->sactive &= ~(1 << qc->tag);
da917d69
TH
4780 if (!link->sactive)
4781 ap->nr_active_links--;
4782 } else {
9af5c9c9 4783 link->active_tag = ATA_TAG_POISON;
da917d69
TH
4784 ap->nr_active_links--;
4785 }
4786
4787 /* clear exclusive status */
4788 if (unlikely(qc->flags & ATA_QCFLAG_CLEAR_EXCL &&
4789 ap->excl_link == link))
4790 ap->excl_link = NULL;
7401abf2 4791
3f3791d3
AL
4792 /* atapi: mark qc as inactive to prevent the interrupt handler
4793 * from completing the command twice later, before the error handler
4794 * is called. (when rc != 0 and atapi request sense is needed)
4795 */
4796 qc->flags &= ~ATA_QCFLAG_ACTIVE;
dedaf2b0 4797 ap->qc_active &= ~(1 << qc->tag);
3f3791d3 4798
1da177e4 4799 /* call completion callback */
77853bf2 4800 qc->complete_fn(qc);
1da177e4
LT
4801}
4802
39599a53
TH
4803static void fill_result_tf(struct ata_queued_cmd *qc)
4804{
4805 struct ata_port *ap = qc->ap;
4806
39599a53 4807 qc->result_tf.flags = qc->tf.flags;
22183bf5 4808 ap->ops->qc_fill_rtf(qc);
39599a53
TH
4809}
4810
00115e0f
TH
4811static void ata_verify_xfer(struct ata_queued_cmd *qc)
4812{
4813 struct ata_device *dev = qc->dev;
4814
00115e0f
TH
4815 if (ata_is_nodata(qc->tf.protocol))
4816 return;
4817
4818 if ((dev->mwdma_mask || dev->udma_mask) && ata_is_pio(qc->tf.protocol))
4819 return;
4820
4821 dev->flags &= ~ATA_DFLAG_DUBIOUS_XFER;
4822}
4823
f686bcb8
TH
4824/**
4825 * ata_qc_complete - Complete an active ATA command
4826 * @qc: Command to complete
f686bcb8 4827 *
1aadf5c3
TH
4828 * Indicate to the mid and upper layers that an ATA command has
4829 * completed, with either an ok or not-ok status.
4830 *
4831 * Refrain from calling this function multiple times when
4832 * successfully completing multiple NCQ commands.
4833 * ata_qc_complete_multiple() should be used instead, which will
4834 * properly update IRQ expect state.
f686bcb8
TH
4835 *
4836 * LOCKING:
cca3974e 4837 * spin_lock_irqsave(host lock)
f686bcb8
TH
4838 */
4839void ata_qc_complete(struct ata_queued_cmd *qc)
4840{
4841 struct ata_port *ap = qc->ap;
4842
4843 /* XXX: New EH and old EH use different mechanisms to
4844 * synchronize EH with regular execution path.
4845 *
4846 * In new EH, a failed qc is marked with ATA_QCFLAG_FAILED.
4847 * Normal execution path is responsible for not accessing a
4848 * failed qc. libata core enforces the rule by returning NULL
4849 * from ata_qc_from_tag() for failed qcs.
4850 *
4851 * Old EH depends on ata_qc_complete() nullifying completion
4852 * requests if ATA_QCFLAG_EH_SCHEDULED is set. Old EH does
4853 * not synchronize with interrupt handler. Only PIO task is
4854 * taken care of.
4855 */
4856 if (ap->ops->error_handler) {
4dbfa39b
TH
4857 struct ata_device *dev = qc->dev;
4858 struct ata_eh_info *ehi = &dev->link->eh_info;
4859
f686bcb8
TH
4860 if (unlikely(qc->err_mask))
4861 qc->flags |= ATA_QCFLAG_FAILED;
4862
f08dc1ac
TH
4863 /*
4864 * Finish internal commands without any further processing
4865 * and always with the result TF filled.
4866 */
4867 if (unlikely(ata_tag_internal(qc->tag))) {
f4b31db9 4868 fill_result_tf(qc);
f08dc1ac
TH
4869 __ata_qc_complete(qc);
4870 return;
4871 }
f4b31db9 4872
f08dc1ac
TH
4873 /*
4874 * Non-internal qc has failed. Fill the result TF and
4875 * summon EH.
4876 */
4877 if (unlikely(qc->flags & ATA_QCFLAG_FAILED)) {
4878 fill_result_tf(qc);
4879 ata_qc_schedule_eh(qc);
f4b31db9 4880 return;
f686bcb8
TH
4881 }
4882
4dc738ed
TH
4883 WARN_ON_ONCE(ap->pflags & ATA_PFLAG_FROZEN);
4884
f686bcb8
TH
4885 /* read result TF if requested */
4886 if (qc->flags & ATA_QCFLAG_RESULT_TF)
39599a53 4887 fill_result_tf(qc);
f686bcb8 4888
4dbfa39b
TH
4889 /* Some commands need post-processing after successful
4890 * completion.
4891 */
4892 switch (qc->tf.command) {
4893 case ATA_CMD_SET_FEATURES:
4894 if (qc->tf.feature != SETFEATURES_WC_ON &&
4895 qc->tf.feature != SETFEATURES_WC_OFF)
4896 break;
4897 /* fall through */
4898 case ATA_CMD_INIT_DEV_PARAMS: /* CHS translation changed */
4899 case ATA_CMD_SET_MULTI: /* multi_count changed */
4900 /* revalidate device */
4901 ehi->dev_action[dev->devno] |= ATA_EH_REVALIDATE;
4902 ata_port_schedule_eh(ap);
4903 break;
054a5fba
TH
4904
4905 case ATA_CMD_SLEEP:
4906 dev->flags |= ATA_DFLAG_SLEEPING;
4907 break;
4dbfa39b
TH
4908 }
4909
00115e0f
TH
4910 if (unlikely(dev->flags & ATA_DFLAG_DUBIOUS_XFER))
4911 ata_verify_xfer(qc);
4912
f686bcb8
TH
4913 __ata_qc_complete(qc);
4914 } else {
4915 if (qc->flags & ATA_QCFLAG_EH_SCHEDULED)
4916 return;
4917
4918 /* read result TF if failed or requested */
4919 if (qc->err_mask || qc->flags & ATA_QCFLAG_RESULT_TF)
39599a53 4920 fill_result_tf(qc);
f686bcb8
TH
4921
4922 __ata_qc_complete(qc);
4923 }
4924}
4925
dedaf2b0
TH
4926/**
4927 * ata_qc_complete_multiple - Complete multiple qcs successfully
4928 * @ap: port in question
4929 * @qc_active: new qc_active mask
dedaf2b0
TH
4930 *
4931 * Complete in-flight commands. This functions is meant to be
4932 * called from low-level driver's interrupt routine to complete
4933 * requests normally. ap->qc_active and @qc_active is compared
4934 * and commands are completed accordingly.
4935 *
1aadf5c3
TH
4936 * Always use this function when completing multiple NCQ commands
4937 * from IRQ handlers instead of calling ata_qc_complete()
4938 * multiple times to keep IRQ expect status properly in sync.
4939 *
dedaf2b0 4940 * LOCKING:
cca3974e 4941 * spin_lock_irqsave(host lock)
dedaf2b0
TH
4942 *
4943 * RETURNS:
4944 * Number of completed commands on success, -errno otherwise.
4945 */
79f97dad 4946int ata_qc_complete_multiple(struct ata_port *ap, u32 qc_active)
dedaf2b0
TH
4947{
4948 int nr_done = 0;
4949 u32 done_mask;
dedaf2b0
TH
4950
4951 done_mask = ap->qc_active ^ qc_active;
4952
4953 if (unlikely(done_mask & qc_active)) {
a9a79dfe
JP
4954 ata_port_err(ap, "illegal qc_active transition (%08x->%08x)\n",
4955 ap->qc_active, qc_active);
dedaf2b0
TH
4956 return -EINVAL;
4957 }
4958
43768180 4959 while (done_mask) {
dedaf2b0 4960 struct ata_queued_cmd *qc;
43768180 4961 unsigned int tag = __ffs(done_mask);
dedaf2b0 4962
43768180
JA
4963 qc = ata_qc_from_tag(ap, tag);
4964 if (qc) {
dedaf2b0
TH
4965 ata_qc_complete(qc);
4966 nr_done++;
4967 }
43768180 4968 done_mask &= ~(1 << tag);
dedaf2b0
TH
4969 }
4970
4971 return nr_done;
4972}
4973
1da177e4
LT
4974/**
4975 * ata_qc_issue - issue taskfile to device
4976 * @qc: command to issue to device
4977 *
4978 * Prepare an ATA command to submission to device.
4979 * This includes mapping the data into a DMA-able
4980 * area, filling in the S/G table, and finally
4981 * writing the taskfile to hardware, starting the command.
4982 *
4983 * LOCKING:
cca3974e 4984 * spin_lock_irqsave(host lock)
1da177e4 4985 */
8e0e694a 4986void ata_qc_issue(struct ata_queued_cmd *qc)
1da177e4
LT
4987{
4988 struct ata_port *ap = qc->ap;
9af5c9c9 4989 struct ata_link *link = qc->dev->link;
405e66b3 4990 u8 prot = qc->tf.protocol;
1da177e4 4991
dedaf2b0
TH
4992 /* Make sure only one non-NCQ command is outstanding. The
4993 * check is skipped for old EH because it reuses active qc to
4994 * request ATAPI sense.
4995 */
efcb3cf7 4996 WARN_ON_ONCE(ap->ops->error_handler && ata_tag_valid(link->active_tag));
dedaf2b0 4997
1973a023 4998 if (ata_is_ncq(prot)) {
efcb3cf7 4999 WARN_ON_ONCE(link->sactive & (1 << qc->tag));
da917d69
TH
5000
5001 if (!link->sactive)
5002 ap->nr_active_links++;
9af5c9c9 5003 link->sactive |= 1 << qc->tag;
dedaf2b0 5004 } else {
efcb3cf7 5005 WARN_ON_ONCE(link->sactive);
da917d69
TH
5006
5007 ap->nr_active_links++;
9af5c9c9 5008 link->active_tag = qc->tag;
dedaf2b0
TH
5009 }
5010
e4a70e76 5011 qc->flags |= ATA_QCFLAG_ACTIVE;
dedaf2b0 5012 ap->qc_active |= 1 << qc->tag;
e4a70e76 5013
60f5d6ef
TH
5014 /*
5015 * We guarantee to LLDs that they will have at least one
f92a2636
TH
5016 * non-zero sg if the command is a data command.
5017 */
60f5d6ef
TH
5018 if (WARN_ON_ONCE(ata_is_data(prot) &&
5019 (!qc->sg || !qc->n_elem || !qc->nbytes)))
5020 goto sys_err;
f92a2636 5021
405e66b3 5022 if (ata_is_dma(prot) || (ata_is_pio(prot) &&
f92a2636 5023 (ap->flags & ATA_FLAG_PIO_DMA)))
001102d7 5024 if (ata_sg_setup(qc))
60f5d6ef 5025 goto sys_err;
1da177e4 5026
cf480626 5027 /* if device is sleeping, schedule reset and abort the link */
054a5fba 5028 if (unlikely(qc->dev->flags & ATA_DFLAG_SLEEPING)) {
cf480626 5029 link->eh_info.action |= ATA_EH_RESET;
054a5fba
TH
5030 ata_ehi_push_desc(&link->eh_info, "waking up from sleep");
5031 ata_link_abort(link);
5032 return;
5033 }
5034
1da177e4
LT
5035 ap->ops->qc_prep(qc);
5036
8e0e694a
TH
5037 qc->err_mask |= ap->ops->qc_issue(qc);
5038 if (unlikely(qc->err_mask))
5039 goto err;
5040 return;
1da177e4 5041
60f5d6ef 5042sys_err:
8e0e694a
TH
5043 qc->err_mask |= AC_ERR_SYSTEM;
5044err:
5045 ata_qc_complete(qc);
1da177e4
LT
5046}
5047
34bf2170
TH
5048/**
5049 * sata_scr_valid - test whether SCRs are accessible
936fd732 5050 * @link: ATA link to test SCR accessibility for
34bf2170 5051 *
936fd732 5052 * Test whether SCRs are accessible for @link.
34bf2170
TH
5053 *
5054 * LOCKING:
5055 * None.
5056 *
5057 * RETURNS:
5058 * 1 if SCRs are accessible, 0 otherwise.
5059 */
936fd732 5060int sata_scr_valid(struct ata_link *link)
34bf2170 5061{
936fd732
TH
5062 struct ata_port *ap = link->ap;
5063
a16abc0b 5064 return (ap->flags & ATA_FLAG_SATA) && ap->ops->scr_read;
34bf2170
TH
5065}
5066
5067/**
5068 * sata_scr_read - read SCR register of the specified port
936fd732 5069 * @link: ATA link to read SCR for
34bf2170
TH
5070 * @reg: SCR to read
5071 * @val: Place to store read value
5072 *
936fd732 5073 * Read SCR register @reg of @link into *@val. This function is
633273a3
TH
5074 * guaranteed to succeed if @link is ap->link, the cable type of
5075 * the port is SATA and the port implements ->scr_read.
34bf2170
TH
5076 *
5077 * LOCKING:
633273a3 5078 * None if @link is ap->link. Kernel thread context otherwise.
34bf2170
TH
5079 *
5080 * RETURNS:
5081 * 0 on success, negative errno on failure.
5082 */
936fd732 5083int sata_scr_read(struct ata_link *link, int reg, u32 *val)
34bf2170 5084{
633273a3 5085 if (ata_is_host_link(link)) {
633273a3 5086 if (sata_scr_valid(link))
82ef04fb 5087 return link->ap->ops->scr_read(link, reg, val);
633273a3
TH
5088 return -EOPNOTSUPP;
5089 }
5090
5091 return sata_pmp_scr_read(link, reg, val);
34bf2170
TH
5092}
5093
5094/**
5095 * sata_scr_write - write SCR register of the specified port
936fd732 5096 * @link: ATA link to write SCR for
34bf2170
TH
5097 * @reg: SCR to write
5098 * @val: value to write
5099 *
936fd732 5100 * Write @val to SCR register @reg of @link. This function is
633273a3
TH
5101 * guaranteed to succeed if @link is ap->link, the cable type of
5102 * the port is SATA and the port implements ->scr_read.
34bf2170
TH
5103 *
5104 * LOCKING:
633273a3 5105 * None if @link is ap->link. Kernel thread context otherwise.
34bf2170
TH
5106 *
5107 * RETURNS:
5108 * 0 on success, negative errno on failure.
5109 */
936fd732 5110int sata_scr_write(struct ata_link *link, int reg, u32 val)
34bf2170 5111{
633273a3 5112 if (ata_is_host_link(link)) {
633273a3 5113 if (sata_scr_valid(link))
82ef04fb 5114 return link->ap->ops->scr_write(link, reg, val);
633273a3
TH
5115 return -EOPNOTSUPP;
5116 }
936fd732 5117
633273a3 5118 return sata_pmp_scr_write(link, reg, val);
34bf2170
TH
5119}
5120
5121/**
5122 * sata_scr_write_flush - write SCR register of the specified port and flush
936fd732 5123 * @link: ATA link to write SCR for
34bf2170
TH
5124 * @reg: SCR to write
5125 * @val: value to write
5126 *
5127 * This function is identical to sata_scr_write() except that this
5128 * function performs flush after writing to the register.
5129 *
5130 * LOCKING:
633273a3 5131 * None if @link is ap->link. Kernel thread context otherwise.
34bf2170
TH
5132 *
5133 * RETURNS:
5134 * 0 on success, negative errno on failure.
5135 */
936fd732 5136int sata_scr_write_flush(struct ata_link *link, int reg, u32 val)
34bf2170 5137{
633273a3 5138 if (ata_is_host_link(link)) {
633273a3 5139 int rc;
da3dbb17 5140
633273a3 5141 if (sata_scr_valid(link)) {
82ef04fb 5142 rc = link->ap->ops->scr_write(link, reg, val);
633273a3 5143 if (rc == 0)
82ef04fb 5144 rc = link->ap->ops->scr_read(link, reg, &val);
633273a3
TH
5145 return rc;
5146 }
5147 return -EOPNOTSUPP;
34bf2170 5148 }
633273a3
TH
5149
5150 return sata_pmp_scr_write(link, reg, val);
34bf2170
TH
5151}
5152
5153/**
b1c72916 5154 * ata_phys_link_online - test whether the given link is online
936fd732 5155 * @link: ATA link to test
34bf2170 5156 *
936fd732
TH
5157 * Test whether @link is online. Note that this function returns
5158 * 0 if online status of @link cannot be obtained, so
5159 * ata_link_online(link) != !ata_link_offline(link).
34bf2170
TH
5160 *
5161 * LOCKING:
5162 * None.
5163 *
5164 * RETURNS:
b5b3fa38 5165 * True if the port online status is available and online.
34bf2170 5166 */
b1c72916 5167bool ata_phys_link_online(struct ata_link *link)
34bf2170
TH
5168{
5169 u32 sstatus;
5170
936fd732 5171 if (sata_scr_read(link, SCR_STATUS, &sstatus) == 0 &&
9913ff8a 5172 ata_sstatus_online(sstatus))
b5b3fa38
TH
5173 return true;
5174 return false;
34bf2170
TH
5175}
5176
5177/**
b1c72916 5178 * ata_phys_link_offline - test whether the given link is offline
936fd732 5179 * @link: ATA link to test
34bf2170 5180 *
936fd732
TH
5181 * Test whether @link is offline. Note that this function
5182 * returns 0 if offline status of @link cannot be obtained, so
5183 * ata_link_online(link) != !ata_link_offline(link).
34bf2170
TH
5184 *
5185 * LOCKING:
5186 * None.
5187 *
5188 * RETURNS:
b5b3fa38 5189 * True if the port offline status is available and offline.
34bf2170 5190 */
b1c72916 5191bool ata_phys_link_offline(struct ata_link *link)
34bf2170
TH
5192{
5193 u32 sstatus;
5194
936fd732 5195 if (sata_scr_read(link, SCR_STATUS, &sstatus) == 0 &&
9913ff8a 5196 !ata_sstatus_online(sstatus))
b5b3fa38
TH
5197 return true;
5198 return false;
34bf2170 5199}
0baab86b 5200
b1c72916
TH
5201/**
5202 * ata_link_online - test whether the given link is online
5203 * @link: ATA link to test
5204 *
5205 * Test whether @link is online. This is identical to
5206 * ata_phys_link_online() when there's no slave link. When
5207 * there's a slave link, this function should only be called on
5208 * the master link and will return true if any of M/S links is
5209 * online.
5210 *
5211 * LOCKING:
5212 * None.
5213 *
5214 * RETURNS:
5215 * True if the port online status is available and online.
5216 */
5217bool ata_link_online(struct ata_link *link)
5218{
5219 struct ata_link *slave = link->ap->slave_link;
5220
5221 WARN_ON(link == slave); /* shouldn't be called on slave link */
5222
5223 return ata_phys_link_online(link) ||
5224 (slave && ata_phys_link_online(slave));
5225}
5226
5227/**
5228 * ata_link_offline - test whether the given link is offline
5229 * @link: ATA link to test
5230 *
5231 * Test whether @link is offline. This is identical to
5232 * ata_phys_link_offline() when there's no slave link. When
5233 * there's a slave link, this function should only be called on
5234 * the master link and will return true if both M/S links are
5235 * offline.
5236 *
5237 * LOCKING:
5238 * None.
5239 *
5240 * RETURNS:
5241 * True if the port offline status is available and offline.
5242 */
5243bool ata_link_offline(struct ata_link *link)
5244{
5245 struct ata_link *slave = link->ap->slave_link;
5246
5247 WARN_ON(link == slave); /* shouldn't be called on slave link */
5248
5249 return ata_phys_link_offline(link) &&
5250 (!slave || ata_phys_link_offline(slave));
5251}
5252
6ffa01d8 5253#ifdef CONFIG_PM
5ef41082 5254static int ata_port_request_pm(struct ata_port *ap, pm_message_t mesg,
cca3974e
JG
5255 unsigned int action, unsigned int ehi_flags,
5256 int wait)
500530f6 5257{
5ef41082 5258 struct ata_link *link;
500530f6 5259 unsigned long flags;
5ef41082 5260 int rc;
500530f6 5261
5ef41082
LM
5262 /* Previous resume operation might still be in
5263 * progress. Wait for PM_PENDING to clear.
5264 */
5265 if (ap->pflags & ATA_PFLAG_PM_PENDING) {
5266 ata_port_wait_eh(ap);
5267 WARN_ON(ap->pflags & ATA_PFLAG_PM_PENDING);
5268 }
500530f6 5269
5ef41082
LM
5270 /* request PM ops to EH */
5271 spin_lock_irqsave(ap->lock, flags);
500530f6 5272
5ef41082
LM
5273 ap->pm_mesg = mesg;
5274 if (wait) {
5275 rc = 0;
5276 ap->pm_result = &rc;
5277 }
500530f6 5278
5ef41082
LM
5279 ap->pflags |= ATA_PFLAG_PM_PENDING;
5280 ata_for_each_link(link, ap, HOST_FIRST) {
5281 link->eh_info.action |= action;
5282 link->eh_info.flags |= ehi_flags;
5283 }
500530f6 5284
5ef41082 5285 ata_port_schedule_eh(ap);
500530f6 5286
5ef41082 5287 spin_unlock_irqrestore(ap->lock, flags);
500530f6 5288
5ef41082
LM
5289 /* wait and check result */
5290 if (wait) {
5291 ata_port_wait_eh(ap);
5292 WARN_ON(ap->pflags & ATA_PFLAG_PM_PENDING);
500530f6
TH
5293 }
5294
5ef41082 5295 return rc;
500530f6
TH
5296}
5297
33574d68 5298static int ata_port_suspend_common(struct device *dev, pm_message_t mesg)
5ef41082
LM
5299{
5300 struct ata_port *ap = to_ata_port(dev);
33574d68 5301 unsigned int ehi_flags = ATA_EHI_QUIET;
5ef41082
LM
5302 int rc;
5303
33574d68
LM
5304 /*
5305 * On some hardware, device fails to respond after spun down
5306 * for suspend. As the device won't be used before being
5307 * resumed, we don't need to touch the device. Ask EH to skip
5308 * the usual stuff and proceed directly to suspend.
5309 *
5310 * http://thread.gmane.org/gmane.linux.ide/46764
5311 */
5312 if (mesg.event == PM_EVENT_SUSPEND)
5313 ehi_flags |= ATA_EHI_NO_AUTOPSY | ATA_EHI_NO_RECOVERY;
5314
5315 rc = ata_port_request_pm(ap, mesg, 0, ehi_flags, 1);
5ef41082
LM
5316 return rc;
5317}
5318
5319static int ata_port_suspend(struct device *dev)
5320{
5321 if (pm_runtime_suspended(dev))
5322 return 0;
5323
33574d68
LM
5324 return ata_port_suspend_common(dev, PMSG_SUSPEND);
5325}
5326
5327static int ata_port_do_freeze(struct device *dev)
5328{
5329 if (pm_runtime_suspended(dev))
5330 pm_runtime_resume(dev);
5331
5332 return ata_port_suspend_common(dev, PMSG_FREEZE);
5333}
5334
5335static int ata_port_poweroff(struct device *dev)
5336{
5337 if (pm_runtime_suspended(dev))
5338 return 0;
5339
5340 return ata_port_suspend_common(dev, PMSG_HIBERNATE);
5ef41082
LM
5341}
5342
e90b1e5a 5343static int ata_port_resume_common(struct device *dev)
5ef41082
LM
5344{
5345 struct ata_port *ap = to_ata_port(dev);
5346 int rc;
5347
5348 rc = ata_port_request_pm(ap, PMSG_ON, ATA_EH_RESET,
5349 ATA_EHI_NO_AUTOPSY | ATA_EHI_QUIET, 1);
5350 return rc;
5351}
5352
e90b1e5a
LM
5353static int ata_port_resume(struct device *dev)
5354{
5355 int rc;
5356
5357 rc = ata_port_resume_common(dev);
5358 if (!rc) {
5359 pm_runtime_disable(dev);
5360 pm_runtime_set_active(dev);
5361 pm_runtime_enable(dev);
5362 }
5363
5364 return rc;
5365}
5366
9ee4f393
LM
5367static int ata_port_runtime_idle(struct device *dev)
5368{
5369 return pm_runtime_suspend(dev);
5370}
5371
5ef41082
LM
5372static const struct dev_pm_ops ata_port_pm_ops = {
5373 .suspend = ata_port_suspend,
5374 .resume = ata_port_resume,
33574d68
LM
5375 .freeze = ata_port_do_freeze,
5376 .thaw = ata_port_resume,
5377 .poweroff = ata_port_poweroff,
5378 .restore = ata_port_resume,
9ee4f393 5379
33574d68 5380 .runtime_suspend = ata_port_suspend,
e90b1e5a 5381 .runtime_resume = ata_port_resume_common,
9ee4f393 5382 .runtime_idle = ata_port_runtime_idle,
5ef41082
LM
5383};
5384
500530f6 5385/**
cca3974e
JG
5386 * ata_host_suspend - suspend host
5387 * @host: host to suspend
500530f6
TH
5388 * @mesg: PM message
5389 *
5ef41082 5390 * Suspend @host. Actual operation is performed by port suspend.
500530f6 5391 */
cca3974e 5392int ata_host_suspend(struct ata_host *host, pm_message_t mesg)
500530f6 5393{
5ef41082
LM
5394 host->dev->power.power_state = mesg;
5395 return 0;
500530f6
TH
5396}
5397
5398/**
cca3974e
JG
5399 * ata_host_resume - resume host
5400 * @host: host to resume
500530f6 5401 *
5ef41082 5402 * Resume @host. Actual operation is performed by port resume.
500530f6 5403 */
cca3974e 5404void ata_host_resume(struct ata_host *host)
500530f6 5405{
72ad6ec4 5406 host->dev->power.power_state = PMSG_ON;
500530f6 5407}
6ffa01d8 5408#endif
500530f6 5409
5ef41082
LM
5410struct device_type ata_port_type = {
5411 .name = "ata_port",
5412#ifdef CONFIG_PM
5413 .pm = &ata_port_pm_ops,
5414#endif
5415};
5416
3ef3b43d
TH
5417/**
5418 * ata_dev_init - Initialize an ata_device structure
5419 * @dev: Device structure to initialize
5420 *
5421 * Initialize @dev in preparation for probing.
5422 *
5423 * LOCKING:
5424 * Inherited from caller.
5425 */
5426void ata_dev_init(struct ata_device *dev)
5427{
b1c72916 5428 struct ata_link *link = ata_dev_phys_link(dev);
9af5c9c9 5429 struct ata_port *ap = link->ap;
72fa4b74
TH
5430 unsigned long flags;
5431
b1c72916 5432 /* SATA spd limit is bound to the attached device, reset together */
9af5c9c9
TH
5433 link->sata_spd_limit = link->hw_sata_spd_limit;
5434 link->sata_spd = 0;
5a04bf4b 5435
72fa4b74
TH
5436 /* High bits of dev->flags are used to record warm plug
5437 * requests which occur asynchronously. Synchronize using
cca3974e 5438 * host lock.
72fa4b74 5439 */
ba6a1308 5440 spin_lock_irqsave(ap->lock, flags);
72fa4b74 5441 dev->flags &= ~ATA_DFLAG_INIT_MASK;
3dcc323f 5442 dev->horkage = 0;
ba6a1308 5443 spin_unlock_irqrestore(ap->lock, flags);
3ef3b43d 5444
99cf610a
TH
5445 memset((void *)dev + ATA_DEVICE_CLEAR_BEGIN, 0,
5446 ATA_DEVICE_CLEAR_END - ATA_DEVICE_CLEAR_BEGIN);
3ef3b43d
TH
5447 dev->pio_mask = UINT_MAX;
5448 dev->mwdma_mask = UINT_MAX;
5449 dev->udma_mask = UINT_MAX;
5450}
5451
4fb37a25
TH
5452/**
5453 * ata_link_init - Initialize an ata_link structure
5454 * @ap: ATA port link is attached to
5455 * @link: Link structure to initialize
8989805d 5456 * @pmp: Port multiplier port number
4fb37a25
TH
5457 *
5458 * Initialize @link.
5459 *
5460 * LOCKING:
5461 * Kernel thread context (may sleep)
5462 */
fb7fd614 5463void ata_link_init(struct ata_port *ap, struct ata_link *link, int pmp)
4fb37a25
TH
5464{
5465 int i;
5466
5467 /* clear everything except for devices */
d9027470
GG
5468 memset((void *)link + ATA_LINK_CLEAR_BEGIN, 0,
5469 ATA_LINK_CLEAR_END - ATA_LINK_CLEAR_BEGIN);
4fb37a25
TH
5470
5471 link->ap = ap;
8989805d 5472 link->pmp = pmp;
4fb37a25
TH
5473 link->active_tag = ATA_TAG_POISON;
5474 link->hw_sata_spd_limit = UINT_MAX;
5475
5476 /* can't use iterator, ap isn't initialized yet */
5477 for (i = 0; i < ATA_MAX_DEVICES; i++) {
5478 struct ata_device *dev = &link->device[i];
5479
5480 dev->link = link;
5481 dev->devno = dev - link->device;
110f66d2
TH
5482#ifdef CONFIG_ATA_ACPI
5483 dev->gtf_filter = ata_acpi_gtf_filter;
5484#endif
4fb37a25
TH
5485 ata_dev_init(dev);
5486 }
5487}
5488
5489/**
5490 * sata_link_init_spd - Initialize link->sata_spd_limit
5491 * @link: Link to configure sata_spd_limit for
5492 *
5493 * Initialize @link->[hw_]sata_spd_limit to the currently
5494 * configured value.
5495 *
5496 * LOCKING:
5497 * Kernel thread context (may sleep).
5498 *
5499 * RETURNS:
5500 * 0 on success, -errno on failure.
5501 */
fb7fd614 5502int sata_link_init_spd(struct ata_link *link)
4fb37a25 5503{
33267325 5504 u8 spd;
4fb37a25
TH
5505 int rc;
5506
d127ea7b 5507 rc = sata_scr_read(link, SCR_CONTROL, &link->saved_scontrol);
4fb37a25
TH
5508 if (rc)
5509 return rc;
5510
d127ea7b 5511 spd = (link->saved_scontrol >> 4) & 0xf;
4fb37a25
TH
5512 if (spd)
5513 link->hw_sata_spd_limit &= (1 << spd) - 1;
5514
05944bdf 5515 ata_force_link_limits(link);
33267325 5516
4fb37a25
TH
5517 link->sata_spd_limit = link->hw_sata_spd_limit;
5518
5519 return 0;
5520}
5521
1da177e4 5522/**
f3187195
TH
5523 * ata_port_alloc - allocate and initialize basic ATA port resources
5524 * @host: ATA host this allocated port belongs to
1da177e4 5525 *
f3187195
TH
5526 * Allocate and initialize basic ATA port resources.
5527 *
5528 * RETURNS:
5529 * Allocate ATA port on success, NULL on failure.
0cba632b 5530 *
1da177e4 5531 * LOCKING:
f3187195 5532 * Inherited from calling layer (may sleep).
1da177e4 5533 */
f3187195 5534struct ata_port *ata_port_alloc(struct ata_host *host)
1da177e4 5535{
f3187195 5536 struct ata_port *ap;
1da177e4 5537
f3187195
TH
5538 DPRINTK("ENTER\n");
5539
5540 ap = kzalloc(sizeof(*ap), GFP_KERNEL);
5541 if (!ap)
5542 return NULL;
4fca377f 5543
7b3a24c5 5544 ap->pflags |= ATA_PFLAG_INITIALIZING | ATA_PFLAG_FROZEN;
cca3974e 5545 ap->lock = &host->lock;
f3187195 5546 ap->print_id = -1;
cca3974e 5547 ap->host = host;
f3187195 5548 ap->dev = host->dev;
bd5d825c
BP
5549
5550#if defined(ATA_VERBOSE_DEBUG)
5551 /* turn on all debugging levels */
5552 ap->msg_enable = 0x00FF;
5553#elif defined(ATA_DEBUG)
5554 ap->msg_enable = ATA_MSG_DRV | ATA_MSG_INFO | ATA_MSG_CTL | ATA_MSG_WARN | ATA_MSG_ERR;
88574551 5555#else
0dd4b21f 5556 ap->msg_enable = ATA_MSG_DRV | ATA_MSG_ERR | ATA_MSG_WARN;
bd5d825c 5557#endif
1da177e4 5558
ad72cf98 5559 mutex_init(&ap->scsi_scan_mutex);
65f27f38
DH
5560 INIT_DELAYED_WORK(&ap->hotplug_task, ata_scsi_hotplug);
5561 INIT_WORK(&ap->scsi_rescan_task, ata_scsi_dev_rescan);
a72ec4ce 5562 INIT_LIST_HEAD(&ap->eh_done_q);
c6cf9e99 5563 init_waitqueue_head(&ap->eh_wait_q);
45fabbb7 5564 init_completion(&ap->park_req_pending);
5ddf24c5
TH
5565 init_timer_deferrable(&ap->fastdrain_timer);
5566 ap->fastdrain_timer.function = ata_eh_fastdrain_timerfn;
5567 ap->fastdrain_timer.data = (unsigned long)ap;
1da177e4 5568
838df628 5569 ap->cbl = ATA_CBL_NONE;
838df628 5570
8989805d 5571 ata_link_init(ap, &ap->link, 0);
1da177e4
LT
5572
5573#ifdef ATA_IRQ_TRAP
5574 ap->stats.unhandled_irq = 1;
5575 ap->stats.idle_irq = 1;
5576#endif
270390e1
TH
5577 ata_sff_port_init(ap);
5578
1da177e4 5579 return ap;
1da177e4
LT
5580}
5581
f0d36efd
TH
5582static void ata_host_release(struct device *gendev, void *res)
5583{
5584 struct ata_host *host = dev_get_drvdata(gendev);
5585 int i;
5586
1aa506e4
TH
5587 for (i = 0; i < host->n_ports; i++) {
5588 struct ata_port *ap = host->ports[i];
5589
4911487a
TH
5590 if (!ap)
5591 continue;
5592
5593 if (ap->scsi_host)
1aa506e4
TH
5594 scsi_host_put(ap->scsi_host);
5595
633273a3 5596 kfree(ap->pmp_link);
b1c72916 5597 kfree(ap->slave_link);
4911487a 5598 kfree(ap);
1aa506e4
TH
5599 host->ports[i] = NULL;
5600 }
5601
1aa56cca 5602 dev_set_drvdata(gendev, NULL);
f0d36efd
TH
5603}
5604
f3187195
TH
5605/**
5606 * ata_host_alloc - allocate and init basic ATA host resources
5607 * @dev: generic device this host is associated with
5608 * @max_ports: maximum number of ATA ports associated with this host
5609 *
5610 * Allocate and initialize basic ATA host resources. LLD calls
5611 * this function to allocate a host, initializes it fully and
5612 * attaches it using ata_host_register().
5613 *
5614 * @max_ports ports are allocated and host->n_ports is
5615 * initialized to @max_ports. The caller is allowed to decrease
5616 * host->n_ports before calling ata_host_register(). The unused
5617 * ports will be automatically freed on registration.
5618 *
5619 * RETURNS:
5620 * Allocate ATA host on success, NULL on failure.
5621 *
5622 * LOCKING:
5623 * Inherited from calling layer (may sleep).
5624 */
5625struct ata_host *ata_host_alloc(struct device *dev, int max_ports)
5626{
5627 struct ata_host *host;
5628 size_t sz;
5629 int i;
5630
5631 DPRINTK("ENTER\n");
5632
5633 if (!devres_open_group(dev, NULL, GFP_KERNEL))
5634 return NULL;
5635
5636 /* alloc a container for our list of ATA ports (buses) */
5637 sz = sizeof(struct ata_host) + (max_ports + 1) * sizeof(void *);
5638 /* alloc a container for our list of ATA ports (buses) */
5639 host = devres_alloc(ata_host_release, sz, GFP_KERNEL);
5640 if (!host)
5641 goto err_out;
5642
5643 devres_add(dev, host);
5644 dev_set_drvdata(dev, host);
5645
5646 spin_lock_init(&host->lock);
c0c362b6 5647 mutex_init(&host->eh_mutex);
f3187195
TH
5648 host->dev = dev;
5649 host->n_ports = max_ports;
5650
5651 /* allocate ports bound to this host */
5652 for (i = 0; i < max_ports; i++) {
5653 struct ata_port *ap;
5654
5655 ap = ata_port_alloc(host);
5656 if (!ap)
5657 goto err_out;
5658
5659 ap->port_no = i;
5660 host->ports[i] = ap;
5661 }
5662
5663 devres_remove_group(dev, NULL);
5664 return host;
5665
5666 err_out:
5667 devres_release_group(dev, NULL);
5668 return NULL;
5669}
5670
f5cda257
TH
5671/**
5672 * ata_host_alloc_pinfo - alloc host and init with port_info array
5673 * @dev: generic device this host is associated with
5674 * @ppi: array of ATA port_info to initialize host with
5675 * @n_ports: number of ATA ports attached to this host
5676 *
5677 * Allocate ATA host and initialize with info from @ppi. If NULL
5678 * terminated, @ppi may contain fewer entries than @n_ports. The
5679 * last entry will be used for the remaining ports.
5680 *
5681 * RETURNS:
5682 * Allocate ATA host on success, NULL on failure.
5683 *
5684 * LOCKING:
5685 * Inherited from calling layer (may sleep).
5686 */
5687struct ata_host *ata_host_alloc_pinfo(struct device *dev,
5688 const struct ata_port_info * const * ppi,
5689 int n_ports)
5690{
5691 const struct ata_port_info *pi;
5692 struct ata_host *host;
5693 int i, j;
5694
5695 host = ata_host_alloc(dev, n_ports);
5696 if (!host)
5697 return NULL;
5698
5699 for (i = 0, j = 0, pi = NULL; i < host->n_ports; i++) {
5700 struct ata_port *ap = host->ports[i];
5701
5702 if (ppi[j])
5703 pi = ppi[j++];
5704
5705 ap->pio_mask = pi->pio_mask;
5706 ap->mwdma_mask = pi->mwdma_mask;
5707 ap->udma_mask = pi->udma_mask;
5708 ap->flags |= pi->flags;
0c88758b 5709 ap->link.flags |= pi->link_flags;
f5cda257
TH
5710 ap->ops = pi->port_ops;
5711
5712 if (!host->ops && (pi->port_ops != &ata_dummy_port_ops))
5713 host->ops = pi->port_ops;
f5cda257
TH
5714 }
5715
5716 return host;
5717}
5718
b1c72916
TH
5719/**
5720 * ata_slave_link_init - initialize slave link
5721 * @ap: port to initialize slave link for
5722 *
5723 * Create and initialize slave link for @ap. This enables slave
5724 * link handling on the port.
5725 *
5726 * In libata, a port contains links and a link contains devices.
5727 * There is single host link but if a PMP is attached to it,
5728 * there can be multiple fan-out links. On SATA, there's usually
5729 * a single device connected to a link but PATA and SATA
5730 * controllers emulating TF based interface can have two - master
5731 * and slave.
5732 *
5733 * However, there are a few controllers which don't fit into this
5734 * abstraction too well - SATA controllers which emulate TF
5735 * interface with both master and slave devices but also have
5736 * separate SCR register sets for each device. These controllers
5737 * need separate links for physical link handling
5738 * (e.g. onlineness, link speed) but should be treated like a
5739 * traditional M/S controller for everything else (e.g. command
5740 * issue, softreset).
5741 *
5742 * slave_link is libata's way of handling this class of
5743 * controllers without impacting core layer too much. For
5744 * anything other than physical link handling, the default host
5745 * link is used for both master and slave. For physical link
5746 * handling, separate @ap->slave_link is used. All dirty details
5747 * are implemented inside libata core layer. From LLD's POV, the
5748 * only difference is that prereset, hardreset and postreset are
5749 * called once more for the slave link, so the reset sequence
5750 * looks like the following.
5751 *
5752 * prereset(M) -> prereset(S) -> hardreset(M) -> hardreset(S) ->
5753 * softreset(M) -> postreset(M) -> postreset(S)
5754 *
5755 * Note that softreset is called only for the master. Softreset
5756 * resets both M/S by definition, so SRST on master should handle
5757 * both (the standard method will work just fine).
5758 *
5759 * LOCKING:
5760 * Should be called before host is registered.
5761 *
5762 * RETURNS:
5763 * 0 on success, -errno on failure.
5764 */
5765int ata_slave_link_init(struct ata_port *ap)
5766{
5767 struct ata_link *link;
5768
5769 WARN_ON(ap->slave_link);
5770 WARN_ON(ap->flags & ATA_FLAG_PMP);
5771
5772 link = kzalloc(sizeof(*link), GFP_KERNEL);
5773 if (!link)
5774 return -ENOMEM;
5775
5776 ata_link_init(ap, link, 1);
5777 ap->slave_link = link;
5778 return 0;
5779}
5780
32ebbc0c
TH
5781static void ata_host_stop(struct device *gendev, void *res)
5782{
5783 struct ata_host *host = dev_get_drvdata(gendev);
5784 int i;
5785
5786 WARN_ON(!(host->flags & ATA_HOST_STARTED));
5787
5788 for (i = 0; i < host->n_ports; i++) {
5789 struct ata_port *ap = host->ports[i];
5790
5791 if (ap->ops->port_stop)
5792 ap->ops->port_stop(ap);
5793 }
5794
5795 if (host->ops->host_stop)
5796 host->ops->host_stop(host);
5797}
5798
029cfd6b
TH
5799/**
5800 * ata_finalize_port_ops - finalize ata_port_operations
5801 * @ops: ata_port_operations to finalize
5802 *
5803 * An ata_port_operations can inherit from another ops and that
5804 * ops can again inherit from another. This can go on as many
5805 * times as necessary as long as there is no loop in the
5806 * inheritance chain.
5807 *
5808 * Ops tables are finalized when the host is started. NULL or
5809 * unspecified entries are inherited from the closet ancestor
5810 * which has the method and the entry is populated with it.
5811 * After finalization, the ops table directly points to all the
5812 * methods and ->inherits is no longer necessary and cleared.
5813 *
5814 * Using ATA_OP_NULL, inheriting ops can force a method to NULL.
5815 *
5816 * LOCKING:
5817 * None.
5818 */
5819static void ata_finalize_port_ops(struct ata_port_operations *ops)
5820{
2da67659 5821 static DEFINE_SPINLOCK(lock);
029cfd6b
TH
5822 const struct ata_port_operations *cur;
5823 void **begin = (void **)ops;
5824 void **end = (void **)&ops->inherits;
5825 void **pp;
5826
5827 if (!ops || !ops->inherits)
5828 return;
5829
5830 spin_lock(&lock);
5831
5832 for (cur = ops->inherits; cur; cur = cur->inherits) {
5833 void **inherit = (void **)cur;
5834
5835 for (pp = begin; pp < end; pp++, inherit++)
5836 if (!*pp)
5837 *pp = *inherit;
5838 }
5839
5840 for (pp = begin; pp < end; pp++)
5841 if (IS_ERR(*pp))
5842 *pp = NULL;
5843
5844 ops->inherits = NULL;
5845
5846 spin_unlock(&lock);
5847}
5848
ecef7253
TH
5849/**
5850 * ata_host_start - start and freeze ports of an ATA host
5851 * @host: ATA host to start ports for
5852 *
5853 * Start and then freeze ports of @host. Started status is
5854 * recorded in host->flags, so this function can be called
5855 * multiple times. Ports are guaranteed to get started only
f3187195
TH
5856 * once. If host->ops isn't initialized yet, its set to the
5857 * first non-dummy port ops.
ecef7253
TH
5858 *
5859 * LOCKING:
5860 * Inherited from calling layer (may sleep).
5861 *
5862 * RETURNS:
5863 * 0 if all ports are started successfully, -errno otherwise.
5864 */
5865int ata_host_start(struct ata_host *host)
5866{
32ebbc0c
TH
5867 int have_stop = 0;
5868 void *start_dr = NULL;
ecef7253
TH
5869 int i, rc;
5870
5871 if (host->flags & ATA_HOST_STARTED)
5872 return 0;
5873
029cfd6b
TH
5874 ata_finalize_port_ops(host->ops);
5875
ecef7253
TH
5876 for (i = 0; i < host->n_ports; i++) {
5877 struct ata_port *ap = host->ports[i];
5878
029cfd6b
TH
5879 ata_finalize_port_ops(ap->ops);
5880
f3187195
TH
5881 if (!host->ops && !ata_port_is_dummy(ap))
5882 host->ops = ap->ops;
5883
32ebbc0c
TH
5884 if (ap->ops->port_stop)
5885 have_stop = 1;
5886 }
5887
5888 if (host->ops->host_stop)
5889 have_stop = 1;
5890
5891 if (have_stop) {
5892 start_dr = devres_alloc(ata_host_stop, 0, GFP_KERNEL);
5893 if (!start_dr)
5894 return -ENOMEM;
5895 }
5896
5897 for (i = 0; i < host->n_ports; i++) {
5898 struct ata_port *ap = host->ports[i];
5899
ecef7253
TH
5900 if (ap->ops->port_start) {
5901 rc = ap->ops->port_start(ap);
5902 if (rc) {
0f9fe9b7 5903 if (rc != -ENODEV)
a44fec1f
JP
5904 dev_err(host->dev,
5905 "failed to start port %d (errno=%d)\n",
5906 i, rc);
ecef7253
TH
5907 goto err_out;
5908 }
5909 }
ecef7253
TH
5910 ata_eh_freeze_port(ap);
5911 }
5912
32ebbc0c
TH
5913 if (start_dr)
5914 devres_add(host->dev, start_dr);
ecef7253
TH
5915 host->flags |= ATA_HOST_STARTED;
5916 return 0;
5917
5918 err_out:
5919 while (--i >= 0) {
5920 struct ata_port *ap = host->ports[i];
5921
5922 if (ap->ops->port_stop)
5923 ap->ops->port_stop(ap);
5924 }
32ebbc0c 5925 devres_free(start_dr);
ecef7253
TH
5926 return rc;
5927}
5928
b03732f0 5929/**
cca3974e
JG
5930 * ata_sas_host_init - Initialize a host struct
5931 * @host: host to initialize
5932 * @dev: device host is attached to
5933 * @flags: host flags
5934 * @ops: port_ops
b03732f0
BK
5935 *
5936 * LOCKING:
5937 * PCI/etc. bus probe sem.
5938 *
5939 */
f3187195 5940/* KILLME - the only user left is ipr */
cca3974e 5941void ata_host_init(struct ata_host *host, struct device *dev,
029cfd6b 5942 unsigned long flags, struct ata_port_operations *ops)
b03732f0 5943{
cca3974e 5944 spin_lock_init(&host->lock);
c0c362b6 5945 mutex_init(&host->eh_mutex);
cca3974e
JG
5946 host->dev = dev;
5947 host->flags = flags;
5948 host->ops = ops;
b03732f0
BK
5949}
5950
9508a66f 5951void __ata_port_probe(struct ata_port *ap)
79318057 5952{
9508a66f
DW
5953 struct ata_eh_info *ehi = &ap->link.eh_info;
5954 unsigned long flags;
886ad09f 5955
9508a66f
DW
5956 /* kick EH for boot probing */
5957 spin_lock_irqsave(ap->lock, flags);
79318057 5958
9508a66f
DW
5959 ehi->probe_mask |= ATA_ALL_DEVICES;
5960 ehi->action |= ATA_EH_RESET;
5961 ehi->flags |= ATA_EHI_NO_AUTOPSY | ATA_EHI_QUIET;
79318057 5962
9508a66f
DW
5963 ap->pflags &= ~ATA_PFLAG_INITIALIZING;
5964 ap->pflags |= ATA_PFLAG_LOADING;
5965 ata_port_schedule_eh(ap);
79318057 5966
9508a66f
DW
5967 spin_unlock_irqrestore(ap->lock, flags);
5968}
79318057 5969
9508a66f
DW
5970int ata_port_probe(struct ata_port *ap)
5971{
5972 int rc = 0;
79318057 5973
9508a66f
DW
5974 if (ap->ops->error_handler) {
5975 __ata_port_probe(ap);
79318057
AV
5976 ata_port_wait_eh(ap);
5977 } else {
5978 DPRINTK("ata%u: bus probe begin\n", ap->print_id);
5979 rc = ata_bus_probe(ap);
5980 DPRINTK("ata%u: bus probe end\n", ap->print_id);
79318057 5981 }
238c9cf9
JB
5982 return rc;
5983}
5984
5985
5986static void async_port_probe(void *data, async_cookie_t cookie)
5987{
5988 struct ata_port *ap = data;
4fca377f 5989
238c9cf9
JB
5990 /*
5991 * If we're not allowed to scan this host in parallel,
5992 * we need to wait until all previous scans have completed
5993 * before going further.
5994 * Jeff Garzik says this is only within a controller, so we
5995 * don't need to wait for port 0, only for later ports.
5996 */
5997 if (!(ap->host->flags & ATA_HOST_PARALLEL_SCAN) && ap->port_no != 0)
5998 async_synchronize_cookie(cookie);
5999
6000 (void)ata_port_probe(ap);
f29d3b23
AV
6001
6002 /* in order to keep device order, we need to synchronize at this point */
6003 async_synchronize_cookie(cookie);
6004
6005 ata_scsi_scan_host(ap, 1);
79318057 6006}
238c9cf9 6007
f3187195
TH
6008/**
6009 * ata_host_register - register initialized ATA host
6010 * @host: ATA host to register
6011 * @sht: template for SCSI host
6012 *
6013 * Register initialized ATA host. @host is allocated using
6014 * ata_host_alloc() and fully initialized by LLD. This function
6015 * starts ports, registers @host with ATA and SCSI layers and
6016 * probe registered devices.
6017 *
6018 * LOCKING:
6019 * Inherited from calling layer (may sleep).
6020 *
6021 * RETURNS:
6022 * 0 on success, -errno otherwise.
6023 */
6024int ata_host_register(struct ata_host *host, struct scsi_host_template *sht)
6025{
6026 int i, rc;
6027
6028 /* host must have been started */
6029 if (!(host->flags & ATA_HOST_STARTED)) {
a44fec1f 6030 dev_err(host->dev, "BUG: trying to register unstarted host\n");
f3187195
TH
6031 WARN_ON(1);
6032 return -EINVAL;
6033 }
6034
6035 /* Blow away unused ports. This happens when LLD can't
6036 * determine the exact number of ports to allocate at
6037 * allocation time.
6038 */
6039 for (i = host->n_ports; host->ports[i]; i++)
6040 kfree(host->ports[i]);
6041
6042 /* give ports names and add SCSI hosts */
6043 for (i = 0; i < host->n_ports; i++)
85d6725b 6044 host->ports[i]->print_id = atomic_inc_return(&ata_print_id);
f3187195 6045
4fca377f 6046
d9027470
GG
6047 /* Create associated sysfs transport objects */
6048 for (i = 0; i < host->n_ports; i++) {
6049 rc = ata_tport_add(host->dev,host->ports[i]);
6050 if (rc) {
6051 goto err_tadd;
6052 }
6053 }
6054
f3187195
TH
6055 rc = ata_scsi_add_hosts(host, sht);
6056 if (rc)
d9027470 6057 goto err_tadd;
f3187195
TH
6058
6059 /* set cable, sata_spd_limit and report */
6060 for (i = 0; i < host->n_ports; i++) {
6061 struct ata_port *ap = host->ports[i];
f3187195
TH
6062 unsigned long xfer_mask;
6063
6064 /* set SATA cable type if still unset */
6065 if (ap->cbl == ATA_CBL_NONE && (ap->flags & ATA_FLAG_SATA))
6066 ap->cbl = ATA_CBL_SATA;
6067
6068 /* init sata_spd_limit to the current value */
4fb37a25 6069 sata_link_init_spd(&ap->link);
b1c72916
TH
6070 if (ap->slave_link)
6071 sata_link_init_spd(ap->slave_link);
f3187195 6072
cbcdd875 6073 /* print per-port info to dmesg */
f3187195
TH
6074 xfer_mask = ata_pack_xfermask(ap->pio_mask, ap->mwdma_mask,
6075 ap->udma_mask);
6076
abf6e8ed 6077 if (!ata_port_is_dummy(ap)) {
a9a79dfe
JP
6078 ata_port_info(ap, "%cATA max %s %s\n",
6079 (ap->flags & ATA_FLAG_SATA) ? 'S' : 'P',
6080 ata_mode_string(xfer_mask),
6081 ap->link.eh_info.desc);
abf6e8ed
TH
6082 ata_ehi_clear_desc(&ap->link.eh_info);
6083 } else
a9a79dfe 6084 ata_port_info(ap, "DUMMY\n");
f3187195
TH
6085 }
6086
f6005354 6087 /* perform each probe asynchronously */
f3187195
TH
6088 for (i = 0; i < host->n_ports; i++) {
6089 struct ata_port *ap = host->ports[i];
79318057 6090 async_schedule(async_port_probe, ap);
f3187195 6091 }
f3187195
TH
6092
6093 return 0;
d9027470
GG
6094
6095 err_tadd:
6096 while (--i >= 0) {
6097 ata_tport_delete(host->ports[i]);
6098 }
6099 return rc;
6100
f3187195
TH
6101}
6102
f5cda257
TH
6103/**
6104 * ata_host_activate - start host, request IRQ and register it
6105 * @host: target ATA host
6106 * @irq: IRQ to request
6107 * @irq_handler: irq_handler used when requesting IRQ
6108 * @irq_flags: irq_flags used when requesting IRQ
6109 * @sht: scsi_host_template to use when registering the host
6110 *
6111 * After allocating an ATA host and initializing it, most libata
6112 * LLDs perform three steps to activate the host - start host,
6113 * request IRQ and register it. This helper takes necessasry
6114 * arguments and performs the three steps in one go.
6115 *
3d46b2e2
PM
6116 * An invalid IRQ skips the IRQ registration and expects the host to
6117 * have set polling mode on the port. In this case, @irq_handler
6118 * should be NULL.
6119 *
f5cda257
TH
6120 * LOCKING:
6121 * Inherited from calling layer (may sleep).
6122 *
6123 * RETURNS:
6124 * 0 on success, -errno otherwise.
6125 */
6126int ata_host_activate(struct ata_host *host, int irq,
6127 irq_handler_t irq_handler, unsigned long irq_flags,
6128 struct scsi_host_template *sht)
6129{
cbcdd875 6130 int i, rc;
f5cda257
TH
6131
6132 rc = ata_host_start(host);
6133 if (rc)
6134 return rc;
6135
3d46b2e2
PM
6136 /* Special case for polling mode */
6137 if (!irq) {
6138 WARN_ON(irq_handler);
6139 return ata_host_register(host, sht);
6140 }
6141
f5cda257
TH
6142 rc = devm_request_irq(host->dev, irq, irq_handler, irq_flags,
6143 dev_driver_string(host->dev), host);
6144 if (rc)
6145 return rc;
6146
cbcdd875
TH
6147 for (i = 0; i < host->n_ports; i++)
6148 ata_port_desc(host->ports[i], "irq %d", irq);
4031826b 6149
f5cda257
TH
6150 rc = ata_host_register(host, sht);
6151 /* if failed, just free the IRQ and leave ports alone */
6152 if (rc)
6153 devm_free_irq(host->dev, irq, host);
6154
6155 return rc;
6156}
6157
720ba126
TH
6158/**
6159 * ata_port_detach - Detach ATA port in prepration of device removal
6160 * @ap: ATA port to be detached
6161 *
6162 * Detach all ATA devices and the associated SCSI devices of @ap;
6163 * then, remove the associated SCSI host. @ap is guaranteed to
6164 * be quiescent on return from this function.
6165 *
6166 * LOCKING:
6167 * Kernel thread context (may sleep).
6168 */
741b7763 6169static void ata_port_detach(struct ata_port *ap)
720ba126
TH
6170{
6171 unsigned long flags;
720ba126
TH
6172
6173 if (!ap->ops->error_handler)
c3cf30a9 6174 goto skip_eh;
720ba126
TH
6175
6176 /* tell EH we're leaving & flush EH */
ba6a1308 6177 spin_lock_irqsave(ap->lock, flags);
b51e9e5d 6178 ap->pflags |= ATA_PFLAG_UNLOADING;
ece180d1 6179 ata_port_schedule_eh(ap);
ba6a1308 6180 spin_unlock_irqrestore(ap->lock, flags);
720ba126 6181
ece180d1 6182 /* wait till EH commits suicide */
720ba126
TH
6183 ata_port_wait_eh(ap);
6184
ece180d1
TH
6185 /* it better be dead now */
6186 WARN_ON(!(ap->pflags & ATA_PFLAG_UNLOADED));
720ba126 6187
afe2c511 6188 cancel_delayed_work_sync(&ap->hotplug_task);
720ba126 6189
c3cf30a9 6190 skip_eh:
d9027470
GG
6191 if (ap->pmp_link) {
6192 int i;
6193 for (i = 0; i < SATA_PMP_MAX_PORTS; i++)
6194 ata_tlink_delete(&ap->pmp_link[i]);
6195 }
6196 ata_tport_delete(ap);
6197
720ba126 6198 /* remove the associated SCSI host */
cca3974e 6199 scsi_remove_host(ap->scsi_host);
720ba126
TH
6200}
6201
0529c159
TH
6202/**
6203 * ata_host_detach - Detach all ports of an ATA host
6204 * @host: Host to detach
6205 *
6206 * Detach all ports of @host.
6207 *
6208 * LOCKING:
6209 * Kernel thread context (may sleep).
6210 */
6211void ata_host_detach(struct ata_host *host)
6212{
6213 int i;
6214
6215 for (i = 0; i < host->n_ports; i++)
6216 ata_port_detach(host->ports[i]);
562f0c2d
TH
6217
6218 /* the host is dead now, dissociate ACPI */
6219 ata_acpi_dissociate(host);
0529c159
TH
6220}
6221
374b1873
JG
6222#ifdef CONFIG_PCI
6223
1da177e4
LT
6224/**
6225 * ata_pci_remove_one - PCI layer callback for device removal
6226 * @pdev: PCI device that was removed
6227 *
b878ca5d
TH
6228 * PCI layer indicates to libata via this hook that hot-unplug or
6229 * module unload event has occurred. Detach all ports. Resource
6230 * release is handled via devres.
1da177e4
LT
6231 *
6232 * LOCKING:
6233 * Inherited from PCI layer (may sleep).
6234 */
f0d36efd 6235void ata_pci_remove_one(struct pci_dev *pdev)
1da177e4 6236{
2855568b 6237 struct device *dev = &pdev->dev;
cca3974e 6238 struct ata_host *host = dev_get_drvdata(dev);
1da177e4 6239
b878ca5d 6240 ata_host_detach(host);
1da177e4
LT
6241}
6242
6243/* move to PCI subsystem */
057ace5e 6244int pci_test_config_bits(struct pci_dev *pdev, const struct pci_bits *bits)
1da177e4
LT
6245{
6246 unsigned long tmp = 0;
6247
6248 switch (bits->width) {
6249 case 1: {
6250 u8 tmp8 = 0;
6251 pci_read_config_byte(pdev, bits->reg, &tmp8);
6252 tmp = tmp8;
6253 break;
6254 }
6255 case 2: {
6256 u16 tmp16 = 0;
6257 pci_read_config_word(pdev, bits->reg, &tmp16);
6258 tmp = tmp16;
6259 break;
6260 }
6261 case 4: {
6262 u32 tmp32 = 0;
6263 pci_read_config_dword(pdev, bits->reg, &tmp32);
6264 tmp = tmp32;
6265 break;
6266 }
6267
6268 default:
6269 return -EINVAL;
6270 }
6271
6272 tmp &= bits->mask;
6273
6274 return (tmp == bits->val) ? 1 : 0;
6275}
9b847548 6276
6ffa01d8 6277#ifdef CONFIG_PM
3c5100c1 6278void ata_pci_device_do_suspend(struct pci_dev *pdev, pm_message_t mesg)
9b847548
JA
6279{
6280 pci_save_state(pdev);
4c90d971 6281 pci_disable_device(pdev);
500530f6 6282
3a2d5b70 6283 if (mesg.event & PM_EVENT_SLEEP)
500530f6 6284 pci_set_power_state(pdev, PCI_D3hot);
9b847548
JA
6285}
6286
553c4aa6 6287int ata_pci_device_do_resume(struct pci_dev *pdev)
9b847548 6288{
553c4aa6
TH
6289 int rc;
6290
9b847548
JA
6291 pci_set_power_state(pdev, PCI_D0);
6292 pci_restore_state(pdev);
553c4aa6 6293
b878ca5d 6294 rc = pcim_enable_device(pdev);
553c4aa6 6295 if (rc) {
a44fec1f
JP
6296 dev_err(&pdev->dev,
6297 "failed to enable device after resume (%d)\n", rc);
553c4aa6
TH
6298 return rc;
6299 }
6300
9b847548 6301 pci_set_master(pdev);
553c4aa6 6302 return 0;
500530f6
TH
6303}
6304
3c5100c1 6305int ata_pci_device_suspend(struct pci_dev *pdev, pm_message_t mesg)
500530f6 6306{
cca3974e 6307 struct ata_host *host = dev_get_drvdata(&pdev->dev);
500530f6
TH
6308 int rc = 0;
6309
cca3974e 6310 rc = ata_host_suspend(host, mesg);
500530f6
TH
6311 if (rc)
6312 return rc;
6313
3c5100c1 6314 ata_pci_device_do_suspend(pdev, mesg);
500530f6
TH
6315
6316 return 0;
6317}
6318
6319int ata_pci_device_resume(struct pci_dev *pdev)
6320{
cca3974e 6321 struct ata_host *host = dev_get_drvdata(&pdev->dev);
553c4aa6 6322 int rc;
500530f6 6323
553c4aa6
TH
6324 rc = ata_pci_device_do_resume(pdev);
6325 if (rc == 0)
6326 ata_host_resume(host);
6327 return rc;
9b847548 6328}
6ffa01d8
TH
6329#endif /* CONFIG_PM */
6330
1da177e4
LT
6331#endif /* CONFIG_PCI */
6332
33267325
TH
6333static int __init ata_parse_force_one(char **cur,
6334 struct ata_force_ent *force_ent,
6335 const char **reason)
6336{
6337 /* FIXME: Currently, there's no way to tag init const data and
6338 * using __initdata causes build failure on some versions of
6339 * gcc. Once __initdataconst is implemented, add const to the
6340 * following structure.
6341 */
6342 static struct ata_force_param force_tbl[] __initdata = {
6343 { "40c", .cbl = ATA_CBL_PATA40 },
6344 { "80c", .cbl = ATA_CBL_PATA80 },
6345 { "short40c", .cbl = ATA_CBL_PATA40_SHORT },
6346 { "unk", .cbl = ATA_CBL_PATA_UNK },
6347 { "ign", .cbl = ATA_CBL_PATA_IGN },
6348 { "sata", .cbl = ATA_CBL_SATA },
6349 { "1.5Gbps", .spd_limit = 1 },
6350 { "3.0Gbps", .spd_limit = 2 },
6351 { "noncq", .horkage_on = ATA_HORKAGE_NONCQ },
6352 { "ncq", .horkage_off = ATA_HORKAGE_NONCQ },
43c9c591 6353 { "dump_id", .horkage_on = ATA_HORKAGE_DUMP_ID },
33267325
TH
6354 { "pio0", .xfer_mask = 1 << (ATA_SHIFT_PIO + 0) },
6355 { "pio1", .xfer_mask = 1 << (ATA_SHIFT_PIO + 1) },
6356 { "pio2", .xfer_mask = 1 << (ATA_SHIFT_PIO + 2) },
6357 { "pio3", .xfer_mask = 1 << (ATA_SHIFT_PIO + 3) },
6358 { "pio4", .xfer_mask = 1 << (ATA_SHIFT_PIO + 4) },
6359 { "pio5", .xfer_mask = 1 << (ATA_SHIFT_PIO + 5) },
6360 { "pio6", .xfer_mask = 1 << (ATA_SHIFT_PIO + 6) },
6361 { "mwdma0", .xfer_mask = 1 << (ATA_SHIFT_MWDMA + 0) },
6362 { "mwdma1", .xfer_mask = 1 << (ATA_SHIFT_MWDMA + 1) },
6363 { "mwdma2", .xfer_mask = 1 << (ATA_SHIFT_MWDMA + 2) },
6364 { "mwdma3", .xfer_mask = 1 << (ATA_SHIFT_MWDMA + 3) },
6365 { "mwdma4", .xfer_mask = 1 << (ATA_SHIFT_MWDMA + 4) },
6366 { "udma0", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 0) },
6367 { "udma16", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 0) },
6368 { "udma/16", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 0) },
6369 { "udma1", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 1) },
6370 { "udma25", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 1) },
6371 { "udma/25", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 1) },
6372 { "udma2", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 2) },
6373 { "udma33", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 2) },
6374 { "udma/33", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 2) },
6375 { "udma3", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 3) },
6376 { "udma44", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 3) },
6377 { "udma/44", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 3) },
6378 { "udma4", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 4) },
6379 { "udma66", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 4) },
6380 { "udma/66", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 4) },
6381 { "udma5", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 5) },
6382 { "udma100", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 5) },
6383 { "udma/100", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 5) },
6384 { "udma6", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 6) },
6385 { "udma133", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 6) },
6386 { "udma/133", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 6) },
6387 { "udma7", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 7) },
05944bdf
TH
6388 { "nohrst", .lflags = ATA_LFLAG_NO_HRST },
6389 { "nosrst", .lflags = ATA_LFLAG_NO_SRST },
6390 { "norst", .lflags = ATA_LFLAG_NO_HRST | ATA_LFLAG_NO_SRST },
33267325
TH
6391 };
6392 char *start = *cur, *p = *cur;
6393 char *id, *val, *endp;
6394 const struct ata_force_param *match_fp = NULL;
6395 int nr_matches = 0, i;
6396
6397 /* find where this param ends and update *cur */
6398 while (*p != '\0' && *p != ',')
6399 p++;
6400
6401 if (*p == '\0')
6402 *cur = p;
6403 else
6404 *cur = p + 1;
6405
6406 *p = '\0';
6407
6408 /* parse */
6409 p = strchr(start, ':');
6410 if (!p) {
6411 val = strstrip(start);
6412 goto parse_val;
6413 }
6414 *p = '\0';
6415
6416 id = strstrip(start);
6417 val = strstrip(p + 1);
6418
6419 /* parse id */
6420 p = strchr(id, '.');
6421 if (p) {
6422 *p++ = '\0';
6423 force_ent->device = simple_strtoul(p, &endp, 10);
6424 if (p == endp || *endp != '\0') {
6425 *reason = "invalid device";
6426 return -EINVAL;
6427 }
6428 }
6429
6430 force_ent->port = simple_strtoul(id, &endp, 10);
6431 if (p == endp || *endp != '\0') {
6432 *reason = "invalid port/link";
6433 return -EINVAL;
6434 }
6435
6436 parse_val:
6437 /* parse val, allow shortcuts so that both 1.5 and 1.5Gbps work */
6438 for (i = 0; i < ARRAY_SIZE(force_tbl); i++) {
6439 const struct ata_force_param *fp = &force_tbl[i];
6440
6441 if (strncasecmp(val, fp->name, strlen(val)))
6442 continue;
6443
6444 nr_matches++;
6445 match_fp = fp;
6446
6447 if (strcasecmp(val, fp->name) == 0) {
6448 nr_matches = 1;
6449 break;
6450 }
6451 }
6452
6453 if (!nr_matches) {
6454 *reason = "unknown value";
6455 return -EINVAL;
6456 }
6457 if (nr_matches > 1) {
6458 *reason = "ambigious value";
6459 return -EINVAL;
6460 }
6461
6462 force_ent->param = *match_fp;
6463
6464 return 0;
6465}
6466
6467static void __init ata_parse_force_param(void)
6468{
6469 int idx = 0, size = 1;
6470 int last_port = -1, last_device = -1;
6471 char *p, *cur, *next;
6472
6473 /* calculate maximum number of params and allocate force_tbl */
6474 for (p = ata_force_param_buf; *p; p++)
6475 if (*p == ',')
6476 size++;
6477
6478 ata_force_tbl = kzalloc(sizeof(ata_force_tbl[0]) * size, GFP_KERNEL);
6479 if (!ata_force_tbl) {
6480 printk(KERN_WARNING "ata: failed to extend force table, "
6481 "libata.force ignored\n");
6482 return;
6483 }
6484
6485 /* parse and populate the table */
6486 for (cur = ata_force_param_buf; *cur != '\0'; cur = next) {
6487 const char *reason = "";
6488 struct ata_force_ent te = { .port = -1, .device = -1 };
6489
6490 next = cur;
6491 if (ata_parse_force_one(&next, &te, &reason)) {
6492 printk(KERN_WARNING "ata: failed to parse force "
6493 "parameter \"%s\" (%s)\n",
6494 cur, reason);
6495 continue;
6496 }
6497
6498 if (te.port == -1) {
6499 te.port = last_port;
6500 te.device = last_device;
6501 }
6502
6503 ata_force_tbl[idx++] = te;
6504
6505 last_port = te.port;
6506 last_device = te.device;
6507 }
6508
6509 ata_force_tbl_size = idx;
6510}
1da177e4 6511
1da177e4
LT
6512static int __init ata_init(void)
6513{
d9027470 6514 int rc;
270390e1 6515
33267325
TH
6516 ata_parse_force_param();
6517
6b66d958
MG
6518 ata_acpi_register();
6519
270390e1 6520 rc = ata_sff_init();
ad72cf98
TH
6521 if (rc) {
6522 kfree(ata_force_tbl);
6523 return rc;
6524 }
453b07ac 6525
d9027470
GG
6526 libata_transport_init();
6527 ata_scsi_transport_template = ata_attach_transport();
6528 if (!ata_scsi_transport_template) {
6529 ata_sff_exit();
6530 rc = -ENOMEM;
6531 goto err_out;
4fca377f 6532 }
d9027470 6533
1da177e4
LT
6534 printk(KERN_DEBUG "libata version " DRV_VERSION " loaded.\n");
6535 return 0;
d9027470
GG
6536
6537err_out:
6538 return rc;
1da177e4
LT
6539}
6540
6541static void __exit ata_exit(void)
6542{
d9027470
GG
6543 ata_release_transport(ata_scsi_transport_template);
6544 libata_transport_exit();
270390e1 6545 ata_sff_exit();
6b66d958 6546 ata_acpi_unregister();
33267325 6547 kfree(ata_force_tbl);
1da177e4
LT
6548}
6549
a4625085 6550subsys_initcall(ata_init);
1da177e4
LT
6551module_exit(ata_exit);
6552
9990b6f3 6553static DEFINE_RATELIMIT_STATE(ratelimit, HZ / 5, 1);
67846b30
JG
6554
6555int ata_ratelimit(void)
6556{
9990b6f3 6557 return __ratelimit(&ratelimit);
67846b30
JG
6558}
6559
c0c362b6
TH
6560/**
6561 * ata_msleep - ATA EH owner aware msleep
6562 * @ap: ATA port to attribute the sleep to
6563 * @msecs: duration to sleep in milliseconds
6564 *
6565 * Sleeps @msecs. If the current task is owner of @ap's EH, the
6566 * ownership is released before going to sleep and reacquired
6567 * after the sleep is complete. IOW, other ports sharing the
6568 * @ap->host will be allowed to own the EH while this task is
6569 * sleeping.
6570 *
6571 * LOCKING:
6572 * Might sleep.
6573 */
97750ceb
TH
6574void ata_msleep(struct ata_port *ap, unsigned int msecs)
6575{
c0c362b6
TH
6576 bool owns_eh = ap && ap->host->eh_owner == current;
6577
6578 if (owns_eh)
6579 ata_eh_release(ap);
6580
97750ceb 6581 msleep(msecs);
c0c362b6
TH
6582
6583 if (owns_eh)
6584 ata_eh_acquire(ap);
97750ceb
TH
6585}
6586
c22daff4
TH
6587/**
6588 * ata_wait_register - wait until register value changes
97750ceb 6589 * @ap: ATA port to wait register for, can be NULL
c22daff4
TH
6590 * @reg: IO-mapped register
6591 * @mask: Mask to apply to read register value
6592 * @val: Wait condition
341c2c95
TH
6593 * @interval: polling interval in milliseconds
6594 * @timeout: timeout in milliseconds
c22daff4
TH
6595 *
6596 * Waiting for some bits of register to change is a common
6597 * operation for ATA controllers. This function reads 32bit LE
6598 * IO-mapped register @reg and tests for the following condition.
6599 *
6600 * (*@reg & mask) != val
6601 *
6602 * If the condition is met, it returns; otherwise, the process is
6603 * repeated after @interval_msec until timeout.
6604 *
6605 * LOCKING:
6606 * Kernel thread context (may sleep)
6607 *
6608 * RETURNS:
6609 * The final register value.
6610 */
97750ceb 6611u32 ata_wait_register(struct ata_port *ap, void __iomem *reg, u32 mask, u32 val,
341c2c95 6612 unsigned long interval, unsigned long timeout)
c22daff4 6613{
341c2c95 6614 unsigned long deadline;
c22daff4
TH
6615 u32 tmp;
6616
6617 tmp = ioread32(reg);
6618
6619 /* Calculate timeout _after_ the first read to make sure
6620 * preceding writes reach the controller before starting to
6621 * eat away the timeout.
6622 */
341c2c95 6623 deadline = ata_deadline(jiffies, timeout);
c22daff4 6624
341c2c95 6625 while ((tmp & mask) == val && time_before(jiffies, deadline)) {
97750ceb 6626 ata_msleep(ap, interval);
c22daff4
TH
6627 tmp = ioread32(reg);
6628 }
6629
6630 return tmp;
6631}
6632
dd5b06c4
TH
6633/*
6634 * Dummy port_ops
6635 */
182d7bba 6636static unsigned int ata_dummy_qc_issue(struct ata_queued_cmd *qc)
dd5b06c4 6637{
182d7bba 6638 return AC_ERR_SYSTEM;
dd5b06c4
TH
6639}
6640
182d7bba 6641static void ata_dummy_error_handler(struct ata_port *ap)
dd5b06c4 6642{
182d7bba 6643 /* truly dummy */
dd5b06c4
TH
6644}
6645
029cfd6b 6646struct ata_port_operations ata_dummy_port_ops = {
dd5b06c4
TH
6647 .qc_prep = ata_noop_qc_prep,
6648 .qc_issue = ata_dummy_qc_issue,
182d7bba 6649 .error_handler = ata_dummy_error_handler,
e4a9c373
DW
6650 .sched_eh = ata_std_sched_eh,
6651 .end_eh = ata_std_end_eh,
dd5b06c4
TH
6652};
6653
21b0ad4f
TH
6654const struct ata_port_info ata_dummy_port_info = {
6655 .port_ops = &ata_dummy_port_ops,
6656};
6657
a9a79dfe
JP
6658/*
6659 * Utility print functions
6660 */
6661int ata_port_printk(const struct ata_port *ap, const char *level,
6662 const char *fmt, ...)
6663{
6664 struct va_format vaf;
6665 va_list args;
6666 int r;
6667
6668 va_start(args, fmt);
6669
6670 vaf.fmt = fmt;
6671 vaf.va = &args;
6672
6673 r = printk("%sata%u: %pV", level, ap->print_id, &vaf);
6674
6675 va_end(args);
6676
6677 return r;
6678}
6679EXPORT_SYMBOL(ata_port_printk);
6680
6681int ata_link_printk(const struct ata_link *link, const char *level,
6682 const char *fmt, ...)
6683{
6684 struct va_format vaf;
6685 va_list args;
6686 int r;
6687
6688 va_start(args, fmt);
6689
6690 vaf.fmt = fmt;
6691 vaf.va = &args;
6692
6693 if (sata_pmp_attached(link->ap) || link->ap->slave_link)
6694 r = printk("%sata%u.%02u: %pV",
6695 level, link->ap->print_id, link->pmp, &vaf);
6696 else
6697 r = printk("%sata%u: %pV",
6698 level, link->ap->print_id, &vaf);
6699
6700 va_end(args);
6701
6702 return r;
6703}
6704EXPORT_SYMBOL(ata_link_printk);
6705
6706int ata_dev_printk(const struct ata_device *dev, const char *level,
6707 const char *fmt, ...)
6708{
6709 struct va_format vaf;
6710 va_list args;
6711 int r;
6712
6713 va_start(args, fmt);
6714
6715 vaf.fmt = fmt;
6716 vaf.va = &args;
6717
6718 r = printk("%sata%u.%02u: %pV",
6719 level, dev->link->ap->print_id, dev->link->pmp + dev->devno,
6720 &vaf);
6721
6722 va_end(args);
6723
6724 return r;
6725}
6726EXPORT_SYMBOL(ata_dev_printk);
6727
06296a1e
JP
6728void ata_print_version(const struct device *dev, const char *version)
6729{
6730 dev_printk(KERN_DEBUG, dev, "version %s\n", version);
6731}
6732EXPORT_SYMBOL(ata_print_version);
6733
1da177e4
LT
6734/*
6735 * libata is essentially a library of internal helper functions for
6736 * low-level ATA host controller drivers. As such, the API/ABI is
6737 * likely to change as new drivers are added and updated.
6738 * Do not depend on ABI/API stability.
6739 */
e9c83914
TH
6740EXPORT_SYMBOL_GPL(sata_deb_timing_normal);
6741EXPORT_SYMBOL_GPL(sata_deb_timing_hotplug);
6742EXPORT_SYMBOL_GPL(sata_deb_timing_long);
029cfd6b
TH
6743EXPORT_SYMBOL_GPL(ata_base_port_ops);
6744EXPORT_SYMBOL_GPL(sata_port_ops);
dd5b06c4 6745EXPORT_SYMBOL_GPL(ata_dummy_port_ops);
21b0ad4f 6746EXPORT_SYMBOL_GPL(ata_dummy_port_info);
1eca4365
TH
6747EXPORT_SYMBOL_GPL(ata_link_next);
6748EXPORT_SYMBOL_GPL(ata_dev_next);
1da177e4 6749EXPORT_SYMBOL_GPL(ata_std_bios_param);
d8d9129e 6750EXPORT_SYMBOL_GPL(ata_scsi_unlock_native_capacity);
cca3974e 6751EXPORT_SYMBOL_GPL(ata_host_init);
f3187195 6752EXPORT_SYMBOL_GPL(ata_host_alloc);
f5cda257 6753EXPORT_SYMBOL_GPL(ata_host_alloc_pinfo);
b1c72916 6754EXPORT_SYMBOL_GPL(ata_slave_link_init);
ecef7253 6755EXPORT_SYMBOL_GPL(ata_host_start);
f3187195 6756EXPORT_SYMBOL_GPL(ata_host_register);
f5cda257 6757EXPORT_SYMBOL_GPL(ata_host_activate);
0529c159 6758EXPORT_SYMBOL_GPL(ata_host_detach);
1da177e4 6759EXPORT_SYMBOL_GPL(ata_sg_init);
f686bcb8 6760EXPORT_SYMBOL_GPL(ata_qc_complete);
dedaf2b0 6761EXPORT_SYMBOL_GPL(ata_qc_complete_multiple);
436d34b3 6762EXPORT_SYMBOL_GPL(atapi_cmd_type);
1da177e4
LT
6763EXPORT_SYMBOL_GPL(ata_tf_to_fis);
6764EXPORT_SYMBOL_GPL(ata_tf_from_fis);
6357357c
TH
6765EXPORT_SYMBOL_GPL(ata_pack_xfermask);
6766EXPORT_SYMBOL_GPL(ata_unpack_xfermask);
6767EXPORT_SYMBOL_GPL(ata_xfer_mask2mode);
6768EXPORT_SYMBOL_GPL(ata_xfer_mode2mask);
6769EXPORT_SYMBOL_GPL(ata_xfer_mode2shift);
6770EXPORT_SYMBOL_GPL(ata_mode_string);
6771EXPORT_SYMBOL_GPL(ata_id_xfermask);
04351821 6772EXPORT_SYMBOL_GPL(ata_do_set_mode);
31cc23b3 6773EXPORT_SYMBOL_GPL(ata_std_qc_defer);
e46834cd 6774EXPORT_SYMBOL_GPL(ata_noop_qc_prep);
10305f0f 6775EXPORT_SYMBOL_GPL(ata_dev_disable);
3c567b7d 6776EXPORT_SYMBOL_GPL(sata_set_spd);
aa2731ad 6777EXPORT_SYMBOL_GPL(ata_wait_after_reset);
936fd732
TH
6778EXPORT_SYMBOL_GPL(sata_link_debounce);
6779EXPORT_SYMBOL_GPL(sata_link_resume);
1152b261 6780EXPORT_SYMBOL_GPL(sata_link_scr_lpm);
0aa1113d 6781EXPORT_SYMBOL_GPL(ata_std_prereset);
cc0680a5 6782EXPORT_SYMBOL_GPL(sata_link_hardreset);
57c9efdf 6783EXPORT_SYMBOL_GPL(sata_std_hardreset);
203c75b8 6784EXPORT_SYMBOL_GPL(ata_std_postreset);
2e9edbf8
JG
6785EXPORT_SYMBOL_GPL(ata_dev_classify);
6786EXPORT_SYMBOL_GPL(ata_dev_pair);
67846b30 6787EXPORT_SYMBOL_GPL(ata_ratelimit);
97750ceb 6788EXPORT_SYMBOL_GPL(ata_msleep);
c22daff4 6789EXPORT_SYMBOL_GPL(ata_wait_register);
1da177e4 6790EXPORT_SYMBOL_GPL(ata_scsi_queuecmd);
1da177e4 6791EXPORT_SYMBOL_GPL(ata_scsi_slave_config);
83c47bcb 6792EXPORT_SYMBOL_GPL(ata_scsi_slave_destroy);
a6e6ce8e 6793EXPORT_SYMBOL_GPL(ata_scsi_change_queue_depth);
f6e67035 6794EXPORT_SYMBOL_GPL(__ata_change_queue_depth);
34bf2170
TH
6795EXPORT_SYMBOL_GPL(sata_scr_valid);
6796EXPORT_SYMBOL_GPL(sata_scr_read);
6797EXPORT_SYMBOL_GPL(sata_scr_write);
6798EXPORT_SYMBOL_GPL(sata_scr_write_flush);
936fd732
TH
6799EXPORT_SYMBOL_GPL(ata_link_online);
6800EXPORT_SYMBOL_GPL(ata_link_offline);
6ffa01d8 6801#ifdef CONFIG_PM
cca3974e
JG
6802EXPORT_SYMBOL_GPL(ata_host_suspend);
6803EXPORT_SYMBOL_GPL(ata_host_resume);
6ffa01d8 6804#endif /* CONFIG_PM */
6a62a04d
TH
6805EXPORT_SYMBOL_GPL(ata_id_string);
6806EXPORT_SYMBOL_GPL(ata_id_c_string);
963e4975 6807EXPORT_SYMBOL_GPL(ata_do_dev_read_id);
1da177e4
LT
6808EXPORT_SYMBOL_GPL(ata_scsi_simulate);
6809
1bc4ccff 6810EXPORT_SYMBOL_GPL(ata_pio_need_iordy);
6357357c 6811EXPORT_SYMBOL_GPL(ata_timing_find_mode);
452503f9
AC
6812EXPORT_SYMBOL_GPL(ata_timing_compute);
6813EXPORT_SYMBOL_GPL(ata_timing_merge);
a0f79b92 6814EXPORT_SYMBOL_GPL(ata_timing_cycle2mode);
452503f9 6815
1da177e4
LT
6816#ifdef CONFIG_PCI
6817EXPORT_SYMBOL_GPL(pci_test_config_bits);
1da177e4 6818EXPORT_SYMBOL_GPL(ata_pci_remove_one);
6ffa01d8 6819#ifdef CONFIG_PM
500530f6
TH
6820EXPORT_SYMBOL_GPL(ata_pci_device_do_suspend);
6821EXPORT_SYMBOL_GPL(ata_pci_device_do_resume);
9b847548
JA
6822EXPORT_SYMBOL_GPL(ata_pci_device_suspend);
6823EXPORT_SYMBOL_GPL(ata_pci_device_resume);
6ffa01d8 6824#endif /* CONFIG_PM */
1da177e4 6825#endif /* CONFIG_PCI */
9b847548 6826
b64bbc39
TH
6827EXPORT_SYMBOL_GPL(__ata_ehi_push_desc);
6828EXPORT_SYMBOL_GPL(ata_ehi_push_desc);
6829EXPORT_SYMBOL_GPL(ata_ehi_clear_desc);
cbcdd875
TH
6830EXPORT_SYMBOL_GPL(ata_port_desc);
6831#ifdef CONFIG_PCI
6832EXPORT_SYMBOL_GPL(ata_port_pbar_desc);
6833#endif /* CONFIG_PCI */
7b70fc03 6834EXPORT_SYMBOL_GPL(ata_port_schedule_eh);
dbd82616 6835EXPORT_SYMBOL_GPL(ata_link_abort);
7b70fc03 6836EXPORT_SYMBOL_GPL(ata_port_abort);
e3180499 6837EXPORT_SYMBOL_GPL(ata_port_freeze);
7d77b247 6838EXPORT_SYMBOL_GPL(sata_async_notification);
e3180499
TH
6839EXPORT_SYMBOL_GPL(ata_eh_freeze_port);
6840EXPORT_SYMBOL_GPL(ata_eh_thaw_port);
ece1d636
TH
6841EXPORT_SYMBOL_GPL(ata_eh_qc_complete);
6842EXPORT_SYMBOL_GPL(ata_eh_qc_retry);
10acf3b0 6843EXPORT_SYMBOL_GPL(ata_eh_analyze_ncq_error);
022bdb07 6844EXPORT_SYMBOL_GPL(ata_do_eh);
a1efdaba 6845EXPORT_SYMBOL_GPL(ata_std_error_handler);
be0d18df
AC
6846
6847EXPORT_SYMBOL_GPL(ata_cable_40wire);
6848EXPORT_SYMBOL_GPL(ata_cable_80wire);
6849EXPORT_SYMBOL_GPL(ata_cable_unknown);
c88f90c3 6850EXPORT_SYMBOL_GPL(ata_cable_ignore);
be0d18df 6851EXPORT_SYMBOL_GPL(ata_cable_sata);