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1da177e4 | 1 | /* |
af36d7f0 JG |
2 | * libata-core.c - helper library for ATA |
3 | * | |
4 | * Maintained by: Jeff Garzik <jgarzik@pobox.com> | |
5 | * Please ALWAYS copy linux-ide@vger.kernel.org | |
6 | * on emails. | |
7 | * | |
8 | * Copyright 2003-2004 Red Hat, Inc. All rights reserved. | |
9 | * Copyright 2003-2004 Jeff Garzik | |
10 | * | |
11 | * | |
12 | * This program is free software; you can redistribute it and/or modify | |
13 | * it under the terms of the GNU General Public License as published by | |
14 | * the Free Software Foundation; either version 2, or (at your option) | |
15 | * any later version. | |
16 | * | |
17 | * This program is distributed in the hope that it will be useful, | |
18 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
19 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
20 | * GNU General Public License for more details. | |
21 | * | |
22 | * You should have received a copy of the GNU General Public License | |
23 | * along with this program; see the file COPYING. If not, write to | |
24 | * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. | |
25 | * | |
26 | * | |
27 | * libata documentation is available via 'make {ps|pdf}docs', | |
28 | * as Documentation/DocBook/libata.* | |
29 | * | |
30 | * Hardware documentation available from http://www.t13.org/ and | |
31 | * http://www.sata-io.org/ | |
32 | * | |
1da177e4 LT |
33 | */ |
34 | ||
1da177e4 LT |
35 | #include <linux/kernel.h> |
36 | #include <linux/module.h> | |
37 | #include <linux/pci.h> | |
38 | #include <linux/init.h> | |
39 | #include <linux/list.h> | |
40 | #include <linux/mm.h> | |
41 | #include <linux/highmem.h> | |
42 | #include <linux/spinlock.h> | |
43 | #include <linux/blkdev.h> | |
44 | #include <linux/delay.h> | |
45 | #include <linux/timer.h> | |
46 | #include <linux/interrupt.h> | |
47 | #include <linux/completion.h> | |
48 | #include <linux/suspend.h> | |
49 | #include <linux/workqueue.h> | |
67846b30 | 50 | #include <linux/jiffies.h> |
378f058c | 51 | #include <linux/scatterlist.h> |
2dcb407e | 52 | #include <linux/io.h> |
1da177e4 | 53 | #include <scsi/scsi.h> |
193515d5 | 54 | #include <scsi/scsi_cmnd.h> |
1da177e4 LT |
55 | #include <scsi/scsi_host.h> |
56 | #include <linux/libata.h> | |
1da177e4 LT |
57 | #include <asm/semaphore.h> |
58 | #include <asm/byteorder.h> | |
59 | ||
60 | #include "libata.h" | |
61 | ||
fda0efc5 | 62 | |
d7bb4cc7 | 63 | /* debounce timing parameters in msecs { interval, duration, timeout } */ |
e9c83914 TH |
64 | const unsigned long sata_deb_timing_normal[] = { 5, 100, 2000 }; |
65 | const unsigned long sata_deb_timing_hotplug[] = { 25, 500, 2000 }; | |
66 | const unsigned long sata_deb_timing_long[] = { 100, 2000, 5000 }; | |
d7bb4cc7 | 67 | |
3373efd8 TH |
68 | static unsigned int ata_dev_init_params(struct ata_device *dev, |
69 | u16 heads, u16 sectors); | |
70 | static unsigned int ata_dev_set_xfermode(struct ata_device *dev); | |
218f3d30 JG |
71 | static unsigned int ata_dev_set_feature(struct ata_device *dev, |
72 | u8 enable, u8 feature); | |
3373efd8 | 73 | static void ata_dev_xfermask(struct ata_device *dev); |
75683fe7 | 74 | static unsigned long ata_dev_blacklisted(const struct ata_device *dev); |
1da177e4 | 75 | |
f3187195 | 76 | unsigned int ata_print_id = 1; |
1da177e4 LT |
77 | static struct workqueue_struct *ata_wq; |
78 | ||
453b07ac TH |
79 | struct workqueue_struct *ata_aux_wq; |
80 | ||
418dc1f5 | 81 | int atapi_enabled = 1; |
1623c81e JG |
82 | module_param(atapi_enabled, int, 0444); |
83 | MODULE_PARM_DESC(atapi_enabled, "Enable discovery of ATAPI devices (0=off, 1=on)"); | |
84 | ||
95de719a AL |
85 | int atapi_dmadir = 0; |
86 | module_param(atapi_dmadir, int, 0444); | |
87 | MODULE_PARM_DESC(atapi_dmadir, "Enable ATAPI DMADIR bridge support (0=off, 1=on)"); | |
88 | ||
baf4fdfa ML |
89 | int atapi_passthru16 = 1; |
90 | module_param(atapi_passthru16, int, 0444); | |
91 | MODULE_PARM_DESC(atapi_passthru16, "Enable ATA_16 passthru for ATAPI devices; on by default (0=off, 1=on)"); | |
92 | ||
c3c013a2 JG |
93 | int libata_fua = 0; |
94 | module_param_named(fua, libata_fua, int, 0444); | |
95 | MODULE_PARM_DESC(fua, "FUA support (0=off, 1=on)"); | |
96 | ||
2dcb407e | 97 | static int ata_ignore_hpa; |
1e999736 AC |
98 | module_param_named(ignore_hpa, ata_ignore_hpa, int, 0644); |
99 | MODULE_PARM_DESC(ignore_hpa, "Ignore HPA limit (0=keep BIOS limits, 1=ignore limits, using full disk)"); | |
100 | ||
b3a70601 AC |
101 | static int libata_dma_mask = ATA_DMA_MASK_ATA|ATA_DMA_MASK_ATAPI|ATA_DMA_MASK_CFA; |
102 | module_param_named(dma, libata_dma_mask, int, 0444); | |
103 | MODULE_PARM_DESC(dma, "DMA enable/disable (0x1==ATA, 0x2==ATAPI, 0x4==CF)"); | |
104 | ||
a8601e5f AM |
105 | static int ata_probe_timeout = ATA_TMOUT_INTERNAL / HZ; |
106 | module_param(ata_probe_timeout, int, 0444); | |
107 | MODULE_PARM_DESC(ata_probe_timeout, "Set ATA probing timeout (seconds)"); | |
108 | ||
6ebe9d86 | 109 | int libata_noacpi = 0; |
d7d0dad6 | 110 | module_param_named(noacpi, libata_noacpi, int, 0444); |
6ebe9d86 | 111 | MODULE_PARM_DESC(noacpi, "Disables the use of ACPI in probe/suspend/resume when set"); |
11ef697b | 112 | |
1da177e4 LT |
113 | MODULE_AUTHOR("Jeff Garzik"); |
114 | MODULE_DESCRIPTION("Library module for ATA devices"); | |
115 | MODULE_LICENSE("GPL"); | |
116 | MODULE_VERSION(DRV_VERSION); | |
117 | ||
0baab86b | 118 | |
1da177e4 LT |
119 | /** |
120 | * ata_tf_to_fis - Convert ATA taskfile to SATA FIS structure | |
121 | * @tf: Taskfile to convert | |
1da177e4 | 122 | * @pmp: Port multiplier port |
9977126c TH |
123 | * @is_cmd: This FIS is for command |
124 | * @fis: Buffer into which data will output | |
1da177e4 LT |
125 | * |
126 | * Converts a standard ATA taskfile to a Serial ATA | |
127 | * FIS structure (Register - Host to Device). | |
128 | * | |
129 | * LOCKING: | |
130 | * Inherited from caller. | |
131 | */ | |
9977126c | 132 | void ata_tf_to_fis(const struct ata_taskfile *tf, u8 pmp, int is_cmd, u8 *fis) |
1da177e4 | 133 | { |
9977126c TH |
134 | fis[0] = 0x27; /* Register - Host to Device FIS */ |
135 | fis[1] = pmp & 0xf; /* Port multiplier number*/ | |
136 | if (is_cmd) | |
137 | fis[1] |= (1 << 7); /* bit 7 indicates Command FIS */ | |
138 | ||
1da177e4 LT |
139 | fis[2] = tf->command; |
140 | fis[3] = tf->feature; | |
141 | ||
142 | fis[4] = tf->lbal; | |
143 | fis[5] = tf->lbam; | |
144 | fis[6] = tf->lbah; | |
145 | fis[7] = tf->device; | |
146 | ||
147 | fis[8] = tf->hob_lbal; | |
148 | fis[9] = tf->hob_lbam; | |
149 | fis[10] = tf->hob_lbah; | |
150 | fis[11] = tf->hob_feature; | |
151 | ||
152 | fis[12] = tf->nsect; | |
153 | fis[13] = tf->hob_nsect; | |
154 | fis[14] = 0; | |
155 | fis[15] = tf->ctl; | |
156 | ||
157 | fis[16] = 0; | |
158 | fis[17] = 0; | |
159 | fis[18] = 0; | |
160 | fis[19] = 0; | |
161 | } | |
162 | ||
163 | /** | |
164 | * ata_tf_from_fis - Convert SATA FIS to ATA taskfile | |
165 | * @fis: Buffer from which data will be input | |
166 | * @tf: Taskfile to output | |
167 | * | |
e12a1be6 | 168 | * Converts a serial ATA FIS structure to a standard ATA taskfile. |
1da177e4 LT |
169 | * |
170 | * LOCKING: | |
171 | * Inherited from caller. | |
172 | */ | |
173 | ||
057ace5e | 174 | void ata_tf_from_fis(const u8 *fis, struct ata_taskfile *tf) |
1da177e4 LT |
175 | { |
176 | tf->command = fis[2]; /* status */ | |
177 | tf->feature = fis[3]; /* error */ | |
178 | ||
179 | tf->lbal = fis[4]; | |
180 | tf->lbam = fis[5]; | |
181 | tf->lbah = fis[6]; | |
182 | tf->device = fis[7]; | |
183 | ||
184 | tf->hob_lbal = fis[8]; | |
185 | tf->hob_lbam = fis[9]; | |
186 | tf->hob_lbah = fis[10]; | |
187 | ||
188 | tf->nsect = fis[12]; | |
189 | tf->hob_nsect = fis[13]; | |
190 | } | |
191 | ||
8cbd6df1 AL |
192 | static const u8 ata_rw_cmds[] = { |
193 | /* pio multi */ | |
194 | ATA_CMD_READ_MULTI, | |
195 | ATA_CMD_WRITE_MULTI, | |
196 | ATA_CMD_READ_MULTI_EXT, | |
197 | ATA_CMD_WRITE_MULTI_EXT, | |
9a3dccc4 TH |
198 | 0, |
199 | 0, | |
200 | 0, | |
201 | ATA_CMD_WRITE_MULTI_FUA_EXT, | |
8cbd6df1 AL |
202 | /* pio */ |
203 | ATA_CMD_PIO_READ, | |
204 | ATA_CMD_PIO_WRITE, | |
205 | ATA_CMD_PIO_READ_EXT, | |
206 | ATA_CMD_PIO_WRITE_EXT, | |
9a3dccc4 TH |
207 | 0, |
208 | 0, | |
209 | 0, | |
210 | 0, | |
8cbd6df1 AL |
211 | /* dma */ |
212 | ATA_CMD_READ, | |
213 | ATA_CMD_WRITE, | |
214 | ATA_CMD_READ_EXT, | |
9a3dccc4 TH |
215 | ATA_CMD_WRITE_EXT, |
216 | 0, | |
217 | 0, | |
218 | 0, | |
219 | ATA_CMD_WRITE_FUA_EXT | |
8cbd6df1 | 220 | }; |
1da177e4 LT |
221 | |
222 | /** | |
8cbd6df1 | 223 | * ata_rwcmd_protocol - set taskfile r/w commands and protocol |
bd056d7e TH |
224 | * @tf: command to examine and configure |
225 | * @dev: device tf belongs to | |
1da177e4 | 226 | * |
2e9edbf8 | 227 | * Examine the device configuration and tf->flags to calculate |
8cbd6df1 | 228 | * the proper read/write commands and protocol to use. |
1da177e4 LT |
229 | * |
230 | * LOCKING: | |
231 | * caller. | |
232 | */ | |
bd056d7e | 233 | static int ata_rwcmd_protocol(struct ata_taskfile *tf, struct ata_device *dev) |
1da177e4 | 234 | { |
9a3dccc4 | 235 | u8 cmd; |
1da177e4 | 236 | |
9a3dccc4 | 237 | int index, fua, lba48, write; |
2e9edbf8 | 238 | |
9a3dccc4 | 239 | fua = (tf->flags & ATA_TFLAG_FUA) ? 4 : 0; |
8cbd6df1 AL |
240 | lba48 = (tf->flags & ATA_TFLAG_LBA48) ? 2 : 0; |
241 | write = (tf->flags & ATA_TFLAG_WRITE) ? 1 : 0; | |
1da177e4 | 242 | |
8cbd6df1 AL |
243 | if (dev->flags & ATA_DFLAG_PIO) { |
244 | tf->protocol = ATA_PROT_PIO; | |
9a3dccc4 | 245 | index = dev->multi_count ? 0 : 8; |
9af5c9c9 | 246 | } else if (lba48 && (dev->link->ap->flags & ATA_FLAG_PIO_LBA48)) { |
8d238e01 AC |
247 | /* Unable to use DMA due to host limitation */ |
248 | tf->protocol = ATA_PROT_PIO; | |
0565c26d | 249 | index = dev->multi_count ? 0 : 8; |
8cbd6df1 AL |
250 | } else { |
251 | tf->protocol = ATA_PROT_DMA; | |
9a3dccc4 | 252 | index = 16; |
8cbd6df1 | 253 | } |
1da177e4 | 254 | |
9a3dccc4 TH |
255 | cmd = ata_rw_cmds[index + fua + lba48 + write]; |
256 | if (cmd) { | |
257 | tf->command = cmd; | |
258 | return 0; | |
259 | } | |
260 | return -1; | |
1da177e4 LT |
261 | } |
262 | ||
35b649fe TH |
263 | /** |
264 | * ata_tf_read_block - Read block address from ATA taskfile | |
265 | * @tf: ATA taskfile of interest | |
266 | * @dev: ATA device @tf belongs to | |
267 | * | |
268 | * LOCKING: | |
269 | * None. | |
270 | * | |
271 | * Read block address from @tf. This function can handle all | |
272 | * three address formats - LBA, LBA48 and CHS. tf->protocol and | |
273 | * flags select the address format to use. | |
274 | * | |
275 | * RETURNS: | |
276 | * Block address read from @tf. | |
277 | */ | |
278 | u64 ata_tf_read_block(struct ata_taskfile *tf, struct ata_device *dev) | |
279 | { | |
280 | u64 block = 0; | |
281 | ||
282 | if (tf->flags & ATA_TFLAG_LBA) { | |
283 | if (tf->flags & ATA_TFLAG_LBA48) { | |
284 | block |= (u64)tf->hob_lbah << 40; | |
285 | block |= (u64)tf->hob_lbam << 32; | |
286 | block |= tf->hob_lbal << 24; | |
287 | } else | |
288 | block |= (tf->device & 0xf) << 24; | |
289 | ||
290 | block |= tf->lbah << 16; | |
291 | block |= tf->lbam << 8; | |
292 | block |= tf->lbal; | |
293 | } else { | |
294 | u32 cyl, head, sect; | |
295 | ||
296 | cyl = tf->lbam | (tf->lbah << 8); | |
297 | head = tf->device & 0xf; | |
298 | sect = tf->lbal; | |
299 | ||
300 | block = (cyl * dev->heads + head) * dev->sectors + sect; | |
301 | } | |
302 | ||
303 | return block; | |
304 | } | |
305 | ||
bd056d7e TH |
306 | /** |
307 | * ata_build_rw_tf - Build ATA taskfile for given read/write request | |
308 | * @tf: Target ATA taskfile | |
309 | * @dev: ATA device @tf belongs to | |
310 | * @block: Block address | |
311 | * @n_block: Number of blocks | |
312 | * @tf_flags: RW/FUA etc... | |
313 | * @tag: tag | |
314 | * | |
315 | * LOCKING: | |
316 | * None. | |
317 | * | |
318 | * Build ATA taskfile @tf for read/write request described by | |
319 | * @block, @n_block, @tf_flags and @tag on @dev. | |
320 | * | |
321 | * RETURNS: | |
322 | * | |
323 | * 0 on success, -ERANGE if the request is too large for @dev, | |
324 | * -EINVAL if the request is invalid. | |
325 | */ | |
326 | int ata_build_rw_tf(struct ata_taskfile *tf, struct ata_device *dev, | |
327 | u64 block, u32 n_block, unsigned int tf_flags, | |
328 | unsigned int tag) | |
329 | { | |
330 | tf->flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE; | |
331 | tf->flags |= tf_flags; | |
332 | ||
6d1245bf | 333 | if (ata_ncq_enabled(dev) && likely(tag != ATA_TAG_INTERNAL)) { |
bd056d7e TH |
334 | /* yay, NCQ */ |
335 | if (!lba_48_ok(block, n_block)) | |
336 | return -ERANGE; | |
337 | ||
338 | tf->protocol = ATA_PROT_NCQ; | |
339 | tf->flags |= ATA_TFLAG_LBA | ATA_TFLAG_LBA48; | |
340 | ||
341 | if (tf->flags & ATA_TFLAG_WRITE) | |
342 | tf->command = ATA_CMD_FPDMA_WRITE; | |
343 | else | |
344 | tf->command = ATA_CMD_FPDMA_READ; | |
345 | ||
346 | tf->nsect = tag << 3; | |
347 | tf->hob_feature = (n_block >> 8) & 0xff; | |
348 | tf->feature = n_block & 0xff; | |
349 | ||
350 | tf->hob_lbah = (block >> 40) & 0xff; | |
351 | tf->hob_lbam = (block >> 32) & 0xff; | |
352 | tf->hob_lbal = (block >> 24) & 0xff; | |
353 | tf->lbah = (block >> 16) & 0xff; | |
354 | tf->lbam = (block >> 8) & 0xff; | |
355 | tf->lbal = block & 0xff; | |
356 | ||
357 | tf->device = 1 << 6; | |
358 | if (tf->flags & ATA_TFLAG_FUA) | |
359 | tf->device |= 1 << 7; | |
360 | } else if (dev->flags & ATA_DFLAG_LBA) { | |
361 | tf->flags |= ATA_TFLAG_LBA; | |
362 | ||
363 | if (lba_28_ok(block, n_block)) { | |
364 | /* use LBA28 */ | |
365 | tf->device |= (block >> 24) & 0xf; | |
366 | } else if (lba_48_ok(block, n_block)) { | |
367 | if (!(dev->flags & ATA_DFLAG_LBA48)) | |
368 | return -ERANGE; | |
369 | ||
370 | /* use LBA48 */ | |
371 | tf->flags |= ATA_TFLAG_LBA48; | |
372 | ||
373 | tf->hob_nsect = (n_block >> 8) & 0xff; | |
374 | ||
375 | tf->hob_lbah = (block >> 40) & 0xff; | |
376 | tf->hob_lbam = (block >> 32) & 0xff; | |
377 | tf->hob_lbal = (block >> 24) & 0xff; | |
378 | } else | |
379 | /* request too large even for LBA48 */ | |
380 | return -ERANGE; | |
381 | ||
382 | if (unlikely(ata_rwcmd_protocol(tf, dev) < 0)) | |
383 | return -EINVAL; | |
384 | ||
385 | tf->nsect = n_block & 0xff; | |
386 | ||
387 | tf->lbah = (block >> 16) & 0xff; | |
388 | tf->lbam = (block >> 8) & 0xff; | |
389 | tf->lbal = block & 0xff; | |
390 | ||
391 | tf->device |= ATA_LBA; | |
392 | } else { | |
393 | /* CHS */ | |
394 | u32 sect, head, cyl, track; | |
395 | ||
396 | /* The request -may- be too large for CHS addressing. */ | |
397 | if (!lba_28_ok(block, n_block)) | |
398 | return -ERANGE; | |
399 | ||
400 | if (unlikely(ata_rwcmd_protocol(tf, dev) < 0)) | |
401 | return -EINVAL; | |
402 | ||
403 | /* Convert LBA to CHS */ | |
404 | track = (u32)block / dev->sectors; | |
405 | cyl = track / dev->heads; | |
406 | head = track % dev->heads; | |
407 | sect = (u32)block % dev->sectors + 1; | |
408 | ||
409 | DPRINTK("block %u track %u cyl %u head %u sect %u\n", | |
410 | (u32)block, track, cyl, head, sect); | |
411 | ||
412 | /* Check whether the converted CHS can fit. | |
413 | Cylinder: 0-65535 | |
414 | Head: 0-15 | |
415 | Sector: 1-255*/ | |
416 | if ((cyl >> 16) || (head >> 4) || (sect >> 8) || (!sect)) | |
417 | return -ERANGE; | |
418 | ||
419 | tf->nsect = n_block & 0xff; /* Sector count 0 means 256 sectors */ | |
420 | tf->lbal = sect; | |
421 | tf->lbam = cyl; | |
422 | tf->lbah = cyl >> 8; | |
423 | tf->device |= head; | |
424 | } | |
425 | ||
426 | return 0; | |
427 | } | |
428 | ||
cb95d562 TH |
429 | /** |
430 | * ata_pack_xfermask - Pack pio, mwdma and udma masks into xfer_mask | |
431 | * @pio_mask: pio_mask | |
432 | * @mwdma_mask: mwdma_mask | |
433 | * @udma_mask: udma_mask | |
434 | * | |
435 | * Pack @pio_mask, @mwdma_mask and @udma_mask into a single | |
436 | * unsigned int xfer_mask. | |
437 | * | |
438 | * LOCKING: | |
439 | * None. | |
440 | * | |
441 | * RETURNS: | |
442 | * Packed xfer_mask. | |
443 | */ | |
444 | static unsigned int ata_pack_xfermask(unsigned int pio_mask, | |
445 | unsigned int mwdma_mask, | |
446 | unsigned int udma_mask) | |
447 | { | |
448 | return ((pio_mask << ATA_SHIFT_PIO) & ATA_MASK_PIO) | | |
449 | ((mwdma_mask << ATA_SHIFT_MWDMA) & ATA_MASK_MWDMA) | | |
450 | ((udma_mask << ATA_SHIFT_UDMA) & ATA_MASK_UDMA); | |
451 | } | |
452 | ||
c0489e4e TH |
453 | /** |
454 | * ata_unpack_xfermask - Unpack xfer_mask into pio, mwdma and udma masks | |
455 | * @xfer_mask: xfer_mask to unpack | |
456 | * @pio_mask: resulting pio_mask | |
457 | * @mwdma_mask: resulting mwdma_mask | |
458 | * @udma_mask: resulting udma_mask | |
459 | * | |
460 | * Unpack @xfer_mask into @pio_mask, @mwdma_mask and @udma_mask. | |
461 | * Any NULL distination masks will be ignored. | |
462 | */ | |
463 | static void ata_unpack_xfermask(unsigned int xfer_mask, | |
464 | unsigned int *pio_mask, | |
465 | unsigned int *mwdma_mask, | |
466 | unsigned int *udma_mask) | |
467 | { | |
468 | if (pio_mask) | |
469 | *pio_mask = (xfer_mask & ATA_MASK_PIO) >> ATA_SHIFT_PIO; | |
470 | if (mwdma_mask) | |
471 | *mwdma_mask = (xfer_mask & ATA_MASK_MWDMA) >> ATA_SHIFT_MWDMA; | |
472 | if (udma_mask) | |
473 | *udma_mask = (xfer_mask & ATA_MASK_UDMA) >> ATA_SHIFT_UDMA; | |
474 | } | |
475 | ||
cb95d562 | 476 | static const struct ata_xfer_ent { |
be9a50c8 | 477 | int shift, bits; |
cb95d562 TH |
478 | u8 base; |
479 | } ata_xfer_tbl[] = { | |
480 | { ATA_SHIFT_PIO, ATA_BITS_PIO, XFER_PIO_0 }, | |
481 | { ATA_SHIFT_MWDMA, ATA_BITS_MWDMA, XFER_MW_DMA_0 }, | |
482 | { ATA_SHIFT_UDMA, ATA_BITS_UDMA, XFER_UDMA_0 }, | |
483 | { -1, }, | |
484 | }; | |
485 | ||
486 | /** | |
487 | * ata_xfer_mask2mode - Find matching XFER_* for the given xfer_mask | |
488 | * @xfer_mask: xfer_mask of interest | |
489 | * | |
490 | * Return matching XFER_* value for @xfer_mask. Only the highest | |
491 | * bit of @xfer_mask is considered. | |
492 | * | |
493 | * LOCKING: | |
494 | * None. | |
495 | * | |
496 | * RETURNS: | |
497 | * Matching XFER_* value, 0 if no match found. | |
498 | */ | |
499 | static u8 ata_xfer_mask2mode(unsigned int xfer_mask) | |
500 | { | |
501 | int highbit = fls(xfer_mask) - 1; | |
502 | const struct ata_xfer_ent *ent; | |
503 | ||
504 | for (ent = ata_xfer_tbl; ent->shift >= 0; ent++) | |
505 | if (highbit >= ent->shift && highbit < ent->shift + ent->bits) | |
506 | return ent->base + highbit - ent->shift; | |
507 | return 0; | |
508 | } | |
509 | ||
510 | /** | |
511 | * ata_xfer_mode2mask - Find matching xfer_mask for XFER_* | |
512 | * @xfer_mode: XFER_* of interest | |
513 | * | |
514 | * Return matching xfer_mask for @xfer_mode. | |
515 | * | |
516 | * LOCKING: | |
517 | * None. | |
518 | * | |
519 | * RETURNS: | |
520 | * Matching xfer_mask, 0 if no match found. | |
521 | */ | |
522 | static unsigned int ata_xfer_mode2mask(u8 xfer_mode) | |
523 | { | |
524 | const struct ata_xfer_ent *ent; | |
525 | ||
526 | for (ent = ata_xfer_tbl; ent->shift >= 0; ent++) | |
527 | if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits) | |
528 | return 1 << (ent->shift + xfer_mode - ent->base); | |
529 | return 0; | |
530 | } | |
531 | ||
532 | /** | |
533 | * ata_xfer_mode2shift - Find matching xfer_shift for XFER_* | |
534 | * @xfer_mode: XFER_* of interest | |
535 | * | |
536 | * Return matching xfer_shift for @xfer_mode. | |
537 | * | |
538 | * LOCKING: | |
539 | * None. | |
540 | * | |
541 | * RETURNS: | |
542 | * Matching xfer_shift, -1 if no match found. | |
543 | */ | |
544 | static int ata_xfer_mode2shift(unsigned int xfer_mode) | |
545 | { | |
546 | const struct ata_xfer_ent *ent; | |
547 | ||
548 | for (ent = ata_xfer_tbl; ent->shift >= 0; ent++) | |
549 | if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits) | |
550 | return ent->shift; | |
551 | return -1; | |
552 | } | |
553 | ||
1da177e4 | 554 | /** |
1da7b0d0 TH |
555 | * ata_mode_string - convert xfer_mask to string |
556 | * @xfer_mask: mask of bits supported; only highest bit counts. | |
1da177e4 LT |
557 | * |
558 | * Determine string which represents the highest speed | |
1da7b0d0 | 559 | * (highest bit in @modemask). |
1da177e4 LT |
560 | * |
561 | * LOCKING: | |
562 | * None. | |
563 | * | |
564 | * RETURNS: | |
565 | * Constant C string representing highest speed listed in | |
1da7b0d0 | 566 | * @mode_mask, or the constant C string "<n/a>". |
1da177e4 | 567 | */ |
1da7b0d0 | 568 | static const char *ata_mode_string(unsigned int xfer_mask) |
1da177e4 | 569 | { |
75f554bc TH |
570 | static const char * const xfer_mode_str[] = { |
571 | "PIO0", | |
572 | "PIO1", | |
573 | "PIO2", | |
574 | "PIO3", | |
575 | "PIO4", | |
b352e57d AC |
576 | "PIO5", |
577 | "PIO6", | |
75f554bc TH |
578 | "MWDMA0", |
579 | "MWDMA1", | |
580 | "MWDMA2", | |
b352e57d AC |
581 | "MWDMA3", |
582 | "MWDMA4", | |
75f554bc TH |
583 | "UDMA/16", |
584 | "UDMA/25", | |
585 | "UDMA/33", | |
586 | "UDMA/44", | |
587 | "UDMA/66", | |
588 | "UDMA/100", | |
589 | "UDMA/133", | |
590 | "UDMA7", | |
591 | }; | |
1da7b0d0 | 592 | int highbit; |
1da177e4 | 593 | |
1da7b0d0 TH |
594 | highbit = fls(xfer_mask) - 1; |
595 | if (highbit >= 0 && highbit < ARRAY_SIZE(xfer_mode_str)) | |
596 | return xfer_mode_str[highbit]; | |
1da177e4 | 597 | return "<n/a>"; |
1da177e4 LT |
598 | } |
599 | ||
4c360c81 TH |
600 | static const char *sata_spd_string(unsigned int spd) |
601 | { | |
602 | static const char * const spd_str[] = { | |
603 | "1.5 Gbps", | |
604 | "3.0 Gbps", | |
605 | }; | |
606 | ||
607 | if (spd == 0 || (spd - 1) >= ARRAY_SIZE(spd_str)) | |
608 | return "<unknown>"; | |
609 | return spd_str[spd - 1]; | |
610 | } | |
611 | ||
3373efd8 | 612 | void ata_dev_disable(struct ata_device *dev) |
0b8efb0a | 613 | { |
09d7f9b0 | 614 | if (ata_dev_enabled(dev)) { |
9af5c9c9 | 615 | if (ata_msg_drv(dev->link->ap)) |
09d7f9b0 | 616 | ata_dev_printk(dev, KERN_WARNING, "disabled\n"); |
4ae72a1e TH |
617 | ata_down_xfermask_limit(dev, ATA_DNXFER_FORCE_PIO0 | |
618 | ATA_DNXFER_QUIET); | |
0b8efb0a TH |
619 | dev->class++; |
620 | } | |
621 | } | |
622 | ||
ca77329f KCA |
623 | static int ata_dev_set_dipm(struct ata_device *dev, enum link_pm policy) |
624 | { | |
625 | struct ata_link *link = dev->link; | |
626 | struct ata_port *ap = link->ap; | |
627 | u32 scontrol; | |
628 | unsigned int err_mask; | |
629 | int rc; | |
630 | ||
631 | /* | |
632 | * disallow DIPM for drivers which haven't set | |
633 | * ATA_FLAG_IPM. This is because when DIPM is enabled, | |
634 | * phy ready will be set in the interrupt status on | |
635 | * state changes, which will cause some drivers to | |
636 | * think there are errors - additionally drivers will | |
637 | * need to disable hot plug. | |
638 | */ | |
639 | if (!(ap->flags & ATA_FLAG_IPM) || !ata_dev_enabled(dev)) { | |
640 | ap->pm_policy = NOT_AVAILABLE; | |
641 | return -EINVAL; | |
642 | } | |
643 | ||
644 | /* | |
645 | * For DIPM, we will only enable it for the | |
646 | * min_power setting. | |
647 | * | |
648 | * Why? Because Disks are too stupid to know that | |
649 | * If the host rejects a request to go to SLUMBER | |
650 | * they should retry at PARTIAL, and instead it | |
651 | * just would give up. So, for medium_power to | |
652 | * work at all, we need to only allow HIPM. | |
653 | */ | |
654 | rc = sata_scr_read(link, SCR_CONTROL, &scontrol); | |
655 | if (rc) | |
656 | return rc; | |
657 | ||
658 | switch (policy) { | |
659 | case MIN_POWER: | |
660 | /* no restrictions on IPM transitions */ | |
661 | scontrol &= ~(0x3 << 8); | |
662 | rc = sata_scr_write(link, SCR_CONTROL, scontrol); | |
663 | if (rc) | |
664 | return rc; | |
665 | ||
666 | /* enable DIPM */ | |
667 | if (dev->flags & ATA_DFLAG_DIPM) | |
668 | err_mask = ata_dev_set_feature(dev, | |
669 | SETFEATURES_SATA_ENABLE, SATA_DIPM); | |
670 | break; | |
671 | case MEDIUM_POWER: | |
672 | /* allow IPM to PARTIAL */ | |
673 | scontrol &= ~(0x1 << 8); | |
674 | scontrol |= (0x2 << 8); | |
675 | rc = sata_scr_write(link, SCR_CONTROL, scontrol); | |
676 | if (rc) | |
677 | return rc; | |
678 | ||
f5456b63 KCA |
679 | /* |
680 | * we don't have to disable DIPM since IPM flags | |
681 | * disallow transitions to SLUMBER, which effectively | |
682 | * disable DIPM if it does not support PARTIAL | |
683 | */ | |
ca77329f KCA |
684 | break; |
685 | case NOT_AVAILABLE: | |
686 | case MAX_PERFORMANCE: | |
687 | /* disable all IPM transitions */ | |
688 | scontrol |= (0x3 << 8); | |
689 | rc = sata_scr_write(link, SCR_CONTROL, scontrol); | |
690 | if (rc) | |
691 | return rc; | |
692 | ||
f5456b63 KCA |
693 | /* |
694 | * we don't have to disable DIPM since IPM flags | |
695 | * disallow all transitions which effectively | |
696 | * disable DIPM anyway. | |
697 | */ | |
ca77329f KCA |
698 | break; |
699 | } | |
700 | ||
701 | /* FIXME: handle SET FEATURES failure */ | |
702 | (void) err_mask; | |
703 | ||
704 | return 0; | |
705 | } | |
706 | ||
707 | /** | |
708 | * ata_dev_enable_pm - enable SATA interface power management | |
48166fd9 SH |
709 | * @dev: device to enable power management |
710 | * @policy: the link power management policy | |
ca77329f KCA |
711 | * |
712 | * Enable SATA Interface power management. This will enable | |
713 | * Device Interface Power Management (DIPM) for min_power | |
714 | * policy, and then call driver specific callbacks for | |
715 | * enabling Host Initiated Power management. | |
716 | * | |
717 | * Locking: Caller. | |
718 | * Returns: -EINVAL if IPM is not supported, 0 otherwise. | |
719 | */ | |
720 | void ata_dev_enable_pm(struct ata_device *dev, enum link_pm policy) | |
721 | { | |
722 | int rc = 0; | |
723 | struct ata_port *ap = dev->link->ap; | |
724 | ||
725 | /* set HIPM first, then DIPM */ | |
726 | if (ap->ops->enable_pm) | |
727 | rc = ap->ops->enable_pm(ap, policy); | |
728 | if (rc) | |
729 | goto enable_pm_out; | |
730 | rc = ata_dev_set_dipm(dev, policy); | |
731 | ||
732 | enable_pm_out: | |
733 | if (rc) | |
734 | ap->pm_policy = MAX_PERFORMANCE; | |
735 | else | |
736 | ap->pm_policy = policy; | |
737 | return /* rc */; /* hopefully we can use 'rc' eventually */ | |
738 | } | |
739 | ||
1992a5ed | 740 | #ifdef CONFIG_PM |
ca77329f KCA |
741 | /** |
742 | * ata_dev_disable_pm - disable SATA interface power management | |
48166fd9 | 743 | * @dev: device to disable power management |
ca77329f KCA |
744 | * |
745 | * Disable SATA Interface power management. This will disable | |
746 | * Device Interface Power Management (DIPM) without changing | |
747 | * policy, call driver specific callbacks for disabling Host | |
748 | * Initiated Power management. | |
749 | * | |
750 | * Locking: Caller. | |
751 | * Returns: void | |
752 | */ | |
753 | static void ata_dev_disable_pm(struct ata_device *dev) | |
754 | { | |
755 | struct ata_port *ap = dev->link->ap; | |
756 | ||
757 | ata_dev_set_dipm(dev, MAX_PERFORMANCE); | |
758 | if (ap->ops->disable_pm) | |
759 | ap->ops->disable_pm(ap); | |
760 | } | |
1992a5ed | 761 | #endif /* CONFIG_PM */ |
ca77329f KCA |
762 | |
763 | void ata_lpm_schedule(struct ata_port *ap, enum link_pm policy) | |
764 | { | |
765 | ap->pm_policy = policy; | |
766 | ap->link.eh_info.action |= ATA_EHI_LPM; | |
767 | ap->link.eh_info.flags |= ATA_EHI_NO_AUTOPSY; | |
768 | ata_port_schedule_eh(ap); | |
769 | } | |
770 | ||
1992a5ed | 771 | #ifdef CONFIG_PM |
ca77329f KCA |
772 | static void ata_lpm_enable(struct ata_host *host) |
773 | { | |
774 | struct ata_link *link; | |
775 | struct ata_port *ap; | |
776 | struct ata_device *dev; | |
777 | int i; | |
778 | ||
779 | for (i = 0; i < host->n_ports; i++) { | |
780 | ap = host->ports[i]; | |
781 | ata_port_for_each_link(link, ap) { | |
782 | ata_link_for_each_dev(dev, link) | |
783 | ata_dev_disable_pm(dev); | |
784 | } | |
785 | } | |
786 | } | |
787 | ||
788 | static void ata_lpm_disable(struct ata_host *host) | |
789 | { | |
790 | int i; | |
791 | ||
792 | for (i = 0; i < host->n_ports; i++) { | |
793 | struct ata_port *ap = host->ports[i]; | |
794 | ata_lpm_schedule(ap, ap->pm_policy); | |
795 | } | |
796 | } | |
1992a5ed | 797 | #endif /* CONFIG_PM */ |
ca77329f KCA |
798 | |
799 | ||
1da177e4 | 800 | /** |
0d5ff566 | 801 | * ata_devchk - PATA device presence detection |
1da177e4 LT |
802 | * @ap: ATA channel to examine |
803 | * @device: Device to examine (starting at zero) | |
804 | * | |
805 | * This technique was originally described in | |
806 | * Hale Landis's ATADRVR (www.ata-atapi.com), and | |
807 | * later found its way into the ATA/ATAPI spec. | |
808 | * | |
809 | * Write a pattern to the ATA shadow registers, | |
810 | * and if a device is present, it will respond by | |
811 | * correctly storing and echoing back the | |
812 | * ATA shadow register contents. | |
813 | * | |
814 | * LOCKING: | |
815 | * caller. | |
816 | */ | |
817 | ||
0d5ff566 | 818 | static unsigned int ata_devchk(struct ata_port *ap, unsigned int device) |
1da177e4 LT |
819 | { |
820 | struct ata_ioports *ioaddr = &ap->ioaddr; | |
821 | u8 nsect, lbal; | |
822 | ||
823 | ap->ops->dev_select(ap, device); | |
824 | ||
0d5ff566 TH |
825 | iowrite8(0x55, ioaddr->nsect_addr); |
826 | iowrite8(0xaa, ioaddr->lbal_addr); | |
1da177e4 | 827 | |
0d5ff566 TH |
828 | iowrite8(0xaa, ioaddr->nsect_addr); |
829 | iowrite8(0x55, ioaddr->lbal_addr); | |
1da177e4 | 830 | |
0d5ff566 TH |
831 | iowrite8(0x55, ioaddr->nsect_addr); |
832 | iowrite8(0xaa, ioaddr->lbal_addr); | |
1da177e4 | 833 | |
0d5ff566 TH |
834 | nsect = ioread8(ioaddr->nsect_addr); |
835 | lbal = ioread8(ioaddr->lbal_addr); | |
1da177e4 LT |
836 | |
837 | if ((nsect == 0x55) && (lbal == 0xaa)) | |
838 | return 1; /* we found a device */ | |
839 | ||
840 | return 0; /* nothing found */ | |
841 | } | |
842 | ||
1da177e4 LT |
843 | /** |
844 | * ata_dev_classify - determine device type based on ATA-spec signature | |
845 | * @tf: ATA taskfile register set for device to be identified | |
846 | * | |
847 | * Determine from taskfile register contents whether a device is | |
848 | * ATA or ATAPI, as per "Signature and persistence" section | |
849 | * of ATA/PI spec (volume 1, sect 5.14). | |
850 | * | |
851 | * LOCKING: | |
852 | * None. | |
853 | * | |
854 | * RETURNS: | |
633273a3 TH |
855 | * Device type, %ATA_DEV_ATA, %ATA_DEV_ATAPI, %ATA_DEV_PMP or |
856 | * %ATA_DEV_UNKNOWN the event of failure. | |
1da177e4 | 857 | */ |
057ace5e | 858 | unsigned int ata_dev_classify(const struct ata_taskfile *tf) |
1da177e4 LT |
859 | { |
860 | /* Apple's open source Darwin code hints that some devices only | |
861 | * put a proper signature into the LBA mid/high registers, | |
862 | * So, we only check those. It's sufficient for uniqueness. | |
633273a3 TH |
863 | * |
864 | * ATA/ATAPI-7 (d1532v1r1: Feb. 19, 2003) specified separate | |
865 | * signatures for ATA and ATAPI devices attached on SerialATA, | |
866 | * 0x3c/0xc3 and 0x69/0x96 respectively. However, SerialATA | |
867 | * spec has never mentioned about using different signatures | |
868 | * for ATA/ATAPI devices. Then, Serial ATA II: Port | |
869 | * Multiplier specification began to use 0x69/0x96 to identify | |
870 | * port multpliers and 0x3c/0xc3 to identify SEMB device. | |
871 | * ATA/ATAPI-7 dropped descriptions about 0x3c/0xc3 and | |
872 | * 0x69/0x96 shortly and described them as reserved for | |
873 | * SerialATA. | |
874 | * | |
875 | * We follow the current spec and consider that 0x69/0x96 | |
876 | * identifies a port multiplier and 0x3c/0xc3 a SEMB device. | |
1da177e4 | 877 | */ |
633273a3 | 878 | if ((tf->lbam == 0) && (tf->lbah == 0)) { |
1da177e4 LT |
879 | DPRINTK("found ATA device by sig\n"); |
880 | return ATA_DEV_ATA; | |
881 | } | |
882 | ||
633273a3 | 883 | if ((tf->lbam == 0x14) && (tf->lbah == 0xeb)) { |
1da177e4 LT |
884 | DPRINTK("found ATAPI device by sig\n"); |
885 | return ATA_DEV_ATAPI; | |
886 | } | |
887 | ||
633273a3 TH |
888 | if ((tf->lbam == 0x69) && (tf->lbah == 0x96)) { |
889 | DPRINTK("found PMP device by sig\n"); | |
890 | return ATA_DEV_PMP; | |
891 | } | |
892 | ||
893 | if ((tf->lbam == 0x3c) && (tf->lbah == 0xc3)) { | |
2dcb407e | 894 | printk(KERN_INFO "ata: SEMB device ignored\n"); |
633273a3 TH |
895 | return ATA_DEV_SEMB_UNSUP; /* not yet */ |
896 | } | |
897 | ||
1da177e4 LT |
898 | DPRINTK("unknown device\n"); |
899 | return ATA_DEV_UNKNOWN; | |
900 | } | |
901 | ||
902 | /** | |
903 | * ata_dev_try_classify - Parse returned ATA device signature | |
3f19859e TH |
904 | * @dev: ATA device to classify (starting at zero) |
905 | * @present: device seems present | |
b4dc7623 | 906 | * @r_err: Value of error register on completion |
1da177e4 LT |
907 | * |
908 | * After an event -- SRST, E.D.D., or SATA COMRESET -- occurs, | |
909 | * an ATA/ATAPI-defined set of values is placed in the ATA | |
910 | * shadow registers, indicating the results of device detection | |
911 | * and diagnostics. | |
912 | * | |
913 | * Select the ATA device, and read the values from the ATA shadow | |
914 | * registers. Then parse according to the Error register value, | |
915 | * and the spec-defined values examined by ata_dev_classify(). | |
916 | * | |
917 | * LOCKING: | |
918 | * caller. | |
b4dc7623 TH |
919 | * |
920 | * RETURNS: | |
921 | * Device type - %ATA_DEV_ATA, %ATA_DEV_ATAPI or %ATA_DEV_NONE. | |
1da177e4 | 922 | */ |
3f19859e TH |
923 | unsigned int ata_dev_try_classify(struct ata_device *dev, int present, |
924 | u8 *r_err) | |
1da177e4 | 925 | { |
3f19859e | 926 | struct ata_port *ap = dev->link->ap; |
1da177e4 LT |
927 | struct ata_taskfile tf; |
928 | unsigned int class; | |
929 | u8 err; | |
930 | ||
3f19859e | 931 | ap->ops->dev_select(ap, dev->devno); |
1da177e4 LT |
932 | |
933 | memset(&tf, 0, sizeof(tf)); | |
934 | ||
1da177e4 | 935 | ap->ops->tf_read(ap, &tf); |
0169e284 | 936 | err = tf.feature; |
b4dc7623 TH |
937 | if (r_err) |
938 | *r_err = err; | |
1da177e4 | 939 | |
93590859 | 940 | /* see if device passed diags: if master then continue and warn later */ |
3f19859e | 941 | if (err == 0 && dev->devno == 0) |
93590859 | 942 | /* diagnostic fail : do nothing _YET_ */ |
3f19859e | 943 | dev->horkage |= ATA_HORKAGE_DIAGNOSTIC; |
93590859 | 944 | else if (err == 1) |
1da177e4 | 945 | /* do nothing */ ; |
3f19859e | 946 | else if ((dev->devno == 0) && (err == 0x81)) |
1da177e4 LT |
947 | /* do nothing */ ; |
948 | else | |
b4dc7623 | 949 | return ATA_DEV_NONE; |
1da177e4 | 950 | |
b4dc7623 | 951 | /* determine if device is ATA or ATAPI */ |
1da177e4 | 952 | class = ata_dev_classify(&tf); |
b4dc7623 | 953 | |
d7fbee05 TH |
954 | if (class == ATA_DEV_UNKNOWN) { |
955 | /* If the device failed diagnostic, it's likely to | |
956 | * have reported incorrect device signature too. | |
957 | * Assume ATA device if the device seems present but | |
958 | * device signature is invalid with diagnostic | |
959 | * failure. | |
960 | */ | |
961 | if (present && (dev->horkage & ATA_HORKAGE_DIAGNOSTIC)) | |
962 | class = ATA_DEV_ATA; | |
963 | else | |
964 | class = ATA_DEV_NONE; | |
965 | } else if ((class == ATA_DEV_ATA) && (ata_chk_status(ap) == 0)) | |
966 | class = ATA_DEV_NONE; | |
967 | ||
b4dc7623 | 968 | return class; |
1da177e4 LT |
969 | } |
970 | ||
971 | /** | |
6a62a04d | 972 | * ata_id_string - Convert IDENTIFY DEVICE page into string |
1da177e4 LT |
973 | * @id: IDENTIFY DEVICE results we will examine |
974 | * @s: string into which data is output | |
975 | * @ofs: offset into identify device page | |
976 | * @len: length of string to return. must be an even number. | |
977 | * | |
978 | * The strings in the IDENTIFY DEVICE page are broken up into | |
979 | * 16-bit chunks. Run through the string, and output each | |
980 | * 8-bit chunk linearly, regardless of platform. | |
981 | * | |
982 | * LOCKING: | |
983 | * caller. | |
984 | */ | |
985 | ||
6a62a04d TH |
986 | void ata_id_string(const u16 *id, unsigned char *s, |
987 | unsigned int ofs, unsigned int len) | |
1da177e4 LT |
988 | { |
989 | unsigned int c; | |
990 | ||
991 | while (len > 0) { | |
992 | c = id[ofs] >> 8; | |
993 | *s = c; | |
994 | s++; | |
995 | ||
996 | c = id[ofs] & 0xff; | |
997 | *s = c; | |
998 | s++; | |
999 | ||
1000 | ofs++; | |
1001 | len -= 2; | |
1002 | } | |
1003 | } | |
1004 | ||
0e949ff3 | 1005 | /** |
6a62a04d | 1006 | * ata_id_c_string - Convert IDENTIFY DEVICE page into C string |
0e949ff3 TH |
1007 | * @id: IDENTIFY DEVICE results we will examine |
1008 | * @s: string into which data is output | |
1009 | * @ofs: offset into identify device page | |
1010 | * @len: length of string to return. must be an odd number. | |
1011 | * | |
6a62a04d | 1012 | * This function is identical to ata_id_string except that it |
0e949ff3 TH |
1013 | * trims trailing spaces and terminates the resulting string with |
1014 | * null. @len must be actual maximum length (even number) + 1. | |
1015 | * | |
1016 | * LOCKING: | |
1017 | * caller. | |
1018 | */ | |
6a62a04d TH |
1019 | void ata_id_c_string(const u16 *id, unsigned char *s, |
1020 | unsigned int ofs, unsigned int len) | |
0e949ff3 TH |
1021 | { |
1022 | unsigned char *p; | |
1023 | ||
1024 | WARN_ON(!(len & 1)); | |
1025 | ||
6a62a04d | 1026 | ata_id_string(id, s, ofs, len - 1); |
0e949ff3 TH |
1027 | |
1028 | p = s + strnlen(s, len - 1); | |
1029 | while (p > s && p[-1] == ' ') | |
1030 | p--; | |
1031 | *p = '\0'; | |
1032 | } | |
0baab86b | 1033 | |
db6f8759 TH |
1034 | static u64 ata_id_n_sectors(const u16 *id) |
1035 | { | |
1036 | if (ata_id_has_lba(id)) { | |
1037 | if (ata_id_has_lba48(id)) | |
1038 | return ata_id_u64(id, 100); | |
1039 | else | |
1040 | return ata_id_u32(id, 60); | |
1041 | } else { | |
1042 | if (ata_id_current_chs_valid(id)) | |
1043 | return ata_id_u32(id, 57); | |
1044 | else | |
1045 | return id[1] * id[3] * id[6]; | |
1046 | } | |
1047 | } | |
1048 | ||
1e999736 AC |
1049 | static u64 ata_tf_to_lba48(struct ata_taskfile *tf) |
1050 | { | |
1051 | u64 sectors = 0; | |
1052 | ||
1053 | sectors |= ((u64)(tf->hob_lbah & 0xff)) << 40; | |
1054 | sectors |= ((u64)(tf->hob_lbam & 0xff)) << 32; | |
1055 | sectors |= (tf->hob_lbal & 0xff) << 24; | |
1056 | sectors |= (tf->lbah & 0xff) << 16; | |
1057 | sectors |= (tf->lbam & 0xff) << 8; | |
1058 | sectors |= (tf->lbal & 0xff); | |
1059 | ||
1060 | return ++sectors; | |
1061 | } | |
1062 | ||
1063 | static u64 ata_tf_to_lba(struct ata_taskfile *tf) | |
1064 | { | |
1065 | u64 sectors = 0; | |
1066 | ||
1067 | sectors |= (tf->device & 0x0f) << 24; | |
1068 | sectors |= (tf->lbah & 0xff) << 16; | |
1069 | sectors |= (tf->lbam & 0xff) << 8; | |
1070 | sectors |= (tf->lbal & 0xff); | |
1071 | ||
1072 | return ++sectors; | |
1073 | } | |
1074 | ||
1075 | /** | |
c728a914 TH |
1076 | * ata_read_native_max_address - Read native max address |
1077 | * @dev: target device | |
1078 | * @max_sectors: out parameter for the result native max address | |
1e999736 | 1079 | * |
c728a914 TH |
1080 | * Perform an LBA48 or LBA28 native size query upon the device in |
1081 | * question. | |
1e999736 | 1082 | * |
c728a914 TH |
1083 | * RETURNS: |
1084 | * 0 on success, -EACCES if command is aborted by the drive. | |
1085 | * -EIO on other errors. | |
1e999736 | 1086 | */ |
c728a914 | 1087 | static int ata_read_native_max_address(struct ata_device *dev, u64 *max_sectors) |
1e999736 | 1088 | { |
c728a914 | 1089 | unsigned int err_mask; |
1e999736 | 1090 | struct ata_taskfile tf; |
c728a914 | 1091 | int lba48 = ata_id_has_lba48(dev->id); |
1e999736 AC |
1092 | |
1093 | ata_tf_init(dev, &tf); | |
1094 | ||
c728a914 | 1095 | /* always clear all address registers */ |
1e999736 | 1096 | tf.flags |= ATA_TFLAG_DEVICE | ATA_TFLAG_ISADDR; |
1e999736 | 1097 | |
c728a914 TH |
1098 | if (lba48) { |
1099 | tf.command = ATA_CMD_READ_NATIVE_MAX_EXT; | |
1100 | tf.flags |= ATA_TFLAG_LBA48; | |
1101 | } else | |
1102 | tf.command = ATA_CMD_READ_NATIVE_MAX; | |
1e999736 | 1103 | |
1e999736 | 1104 | tf.protocol |= ATA_PROT_NODATA; |
c728a914 TH |
1105 | tf.device |= ATA_LBA; |
1106 | ||
2b789108 | 1107 | err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0, 0); |
c728a914 TH |
1108 | if (err_mask) { |
1109 | ata_dev_printk(dev, KERN_WARNING, "failed to read native " | |
1110 | "max address (err_mask=0x%x)\n", err_mask); | |
1111 | if (err_mask == AC_ERR_DEV && (tf.feature & ATA_ABORTED)) | |
1112 | return -EACCES; | |
1113 | return -EIO; | |
1114 | } | |
1e999736 | 1115 | |
c728a914 TH |
1116 | if (lba48) |
1117 | *max_sectors = ata_tf_to_lba48(&tf); | |
1118 | else | |
1119 | *max_sectors = ata_tf_to_lba(&tf); | |
2dcb407e | 1120 | if (dev->horkage & ATA_HORKAGE_HPA_SIZE) |
93328e11 | 1121 | (*max_sectors)--; |
c728a914 | 1122 | return 0; |
1e999736 AC |
1123 | } |
1124 | ||
1125 | /** | |
c728a914 TH |
1126 | * ata_set_max_sectors - Set max sectors |
1127 | * @dev: target device | |
6b38d1d1 | 1128 | * @new_sectors: new max sectors value to set for the device |
1e999736 | 1129 | * |
c728a914 TH |
1130 | * Set max sectors of @dev to @new_sectors. |
1131 | * | |
1132 | * RETURNS: | |
1133 | * 0 on success, -EACCES if command is aborted or denied (due to | |
1134 | * previous non-volatile SET_MAX) by the drive. -EIO on other | |
1135 | * errors. | |
1e999736 | 1136 | */ |
05027adc | 1137 | static int ata_set_max_sectors(struct ata_device *dev, u64 new_sectors) |
1e999736 | 1138 | { |
c728a914 | 1139 | unsigned int err_mask; |
1e999736 | 1140 | struct ata_taskfile tf; |
c728a914 | 1141 | int lba48 = ata_id_has_lba48(dev->id); |
1e999736 AC |
1142 | |
1143 | new_sectors--; | |
1144 | ||
1145 | ata_tf_init(dev, &tf); | |
1146 | ||
1e999736 | 1147 | tf.flags |= ATA_TFLAG_DEVICE | ATA_TFLAG_ISADDR; |
c728a914 TH |
1148 | |
1149 | if (lba48) { | |
1150 | tf.command = ATA_CMD_SET_MAX_EXT; | |
1151 | tf.flags |= ATA_TFLAG_LBA48; | |
1152 | ||
1153 | tf.hob_lbal = (new_sectors >> 24) & 0xff; | |
1154 | tf.hob_lbam = (new_sectors >> 32) & 0xff; | |
1155 | tf.hob_lbah = (new_sectors >> 40) & 0xff; | |
1e582ba4 | 1156 | } else { |
c728a914 TH |
1157 | tf.command = ATA_CMD_SET_MAX; |
1158 | ||
1e582ba4 TH |
1159 | tf.device |= (new_sectors >> 24) & 0xf; |
1160 | } | |
1161 | ||
1e999736 | 1162 | tf.protocol |= ATA_PROT_NODATA; |
c728a914 | 1163 | tf.device |= ATA_LBA; |
1e999736 AC |
1164 | |
1165 | tf.lbal = (new_sectors >> 0) & 0xff; | |
1166 | tf.lbam = (new_sectors >> 8) & 0xff; | |
1167 | tf.lbah = (new_sectors >> 16) & 0xff; | |
1e999736 | 1168 | |
2b789108 | 1169 | err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0, 0); |
c728a914 TH |
1170 | if (err_mask) { |
1171 | ata_dev_printk(dev, KERN_WARNING, "failed to set " | |
1172 | "max address (err_mask=0x%x)\n", err_mask); | |
1173 | if (err_mask == AC_ERR_DEV && | |
1174 | (tf.feature & (ATA_ABORTED | ATA_IDNF))) | |
1175 | return -EACCES; | |
1176 | return -EIO; | |
1177 | } | |
1178 | ||
c728a914 | 1179 | return 0; |
1e999736 AC |
1180 | } |
1181 | ||
1182 | /** | |
1183 | * ata_hpa_resize - Resize a device with an HPA set | |
1184 | * @dev: Device to resize | |
1185 | * | |
1186 | * Read the size of an LBA28 or LBA48 disk with HPA features and resize | |
1187 | * it if required to the full size of the media. The caller must check | |
1188 | * the drive has the HPA feature set enabled. | |
05027adc TH |
1189 | * |
1190 | * RETURNS: | |
1191 | * 0 on success, -errno on failure. | |
1e999736 | 1192 | */ |
05027adc | 1193 | static int ata_hpa_resize(struct ata_device *dev) |
1e999736 | 1194 | { |
05027adc TH |
1195 | struct ata_eh_context *ehc = &dev->link->eh_context; |
1196 | int print_info = ehc->i.flags & ATA_EHI_PRINTINFO; | |
1197 | u64 sectors = ata_id_n_sectors(dev->id); | |
1198 | u64 native_sectors; | |
c728a914 | 1199 | int rc; |
a617c09f | 1200 | |
05027adc TH |
1201 | /* do we need to do it? */ |
1202 | if (dev->class != ATA_DEV_ATA || | |
1203 | !ata_id_has_lba(dev->id) || !ata_id_hpa_enabled(dev->id) || | |
1204 | (dev->horkage & ATA_HORKAGE_BROKEN_HPA)) | |
c728a914 | 1205 | return 0; |
1e999736 | 1206 | |
05027adc TH |
1207 | /* read native max address */ |
1208 | rc = ata_read_native_max_address(dev, &native_sectors); | |
1209 | if (rc) { | |
1210 | /* If HPA isn't going to be unlocked, skip HPA | |
1211 | * resizing from the next try. | |
1212 | */ | |
1213 | if (!ata_ignore_hpa) { | |
1214 | ata_dev_printk(dev, KERN_WARNING, "HPA support seems " | |
1215 | "broken, will skip HPA handling\n"); | |
1216 | dev->horkage |= ATA_HORKAGE_BROKEN_HPA; | |
1217 | ||
1218 | /* we can continue if device aborted the command */ | |
1219 | if (rc == -EACCES) | |
1220 | rc = 0; | |
1e999736 | 1221 | } |
37301a55 | 1222 | |
05027adc TH |
1223 | return rc; |
1224 | } | |
1225 | ||
1226 | /* nothing to do? */ | |
1227 | if (native_sectors <= sectors || !ata_ignore_hpa) { | |
1228 | if (!print_info || native_sectors == sectors) | |
1229 | return 0; | |
1230 | ||
1231 | if (native_sectors > sectors) | |
1232 | ata_dev_printk(dev, KERN_INFO, | |
1233 | "HPA detected: current %llu, native %llu\n", | |
1234 | (unsigned long long)sectors, | |
1235 | (unsigned long long)native_sectors); | |
1236 | else if (native_sectors < sectors) | |
1237 | ata_dev_printk(dev, KERN_WARNING, | |
1238 | "native sectors (%llu) is smaller than " | |
1239 | "sectors (%llu)\n", | |
1240 | (unsigned long long)native_sectors, | |
1241 | (unsigned long long)sectors); | |
1242 | return 0; | |
1243 | } | |
1244 | ||
1245 | /* let's unlock HPA */ | |
1246 | rc = ata_set_max_sectors(dev, native_sectors); | |
1247 | if (rc == -EACCES) { | |
1248 | /* if device aborted the command, skip HPA resizing */ | |
1249 | ata_dev_printk(dev, KERN_WARNING, "device aborted resize " | |
1250 | "(%llu -> %llu), skipping HPA handling\n", | |
1251 | (unsigned long long)sectors, | |
1252 | (unsigned long long)native_sectors); | |
1253 | dev->horkage |= ATA_HORKAGE_BROKEN_HPA; | |
1254 | return 0; | |
1255 | } else if (rc) | |
1256 | return rc; | |
1257 | ||
1258 | /* re-read IDENTIFY data */ | |
1259 | rc = ata_dev_reread_id(dev, 0); | |
1260 | if (rc) { | |
1261 | ata_dev_printk(dev, KERN_ERR, "failed to re-read IDENTIFY " | |
1262 | "data after HPA resizing\n"); | |
1263 | return rc; | |
1264 | } | |
1265 | ||
1266 | if (print_info) { | |
1267 | u64 new_sectors = ata_id_n_sectors(dev->id); | |
1268 | ata_dev_printk(dev, KERN_INFO, | |
1269 | "HPA unlocked: %llu -> %llu, native %llu\n", | |
1270 | (unsigned long long)sectors, | |
1271 | (unsigned long long)new_sectors, | |
1272 | (unsigned long long)native_sectors); | |
1273 | } | |
1274 | ||
1275 | return 0; | |
1e999736 AC |
1276 | } |
1277 | ||
10305f0f AC |
1278 | /** |
1279 | * ata_id_to_dma_mode - Identify DMA mode from id block | |
1280 | * @dev: device to identify | |
cc261267 | 1281 | * @unknown: mode to assume if we cannot tell |
10305f0f AC |
1282 | * |
1283 | * Set up the timing values for the device based upon the identify | |
1284 | * reported values for the DMA mode. This function is used by drivers | |
1285 | * which rely upon firmware configured modes, but wish to report the | |
1286 | * mode correctly when possible. | |
1287 | * | |
1288 | * In addition we emit similarly formatted messages to the default | |
1289 | * ata_dev_set_mode handler, in order to provide consistency of | |
1290 | * presentation. | |
1291 | */ | |
1292 | ||
1293 | void ata_id_to_dma_mode(struct ata_device *dev, u8 unknown) | |
1294 | { | |
1295 | unsigned int mask; | |
1296 | u8 mode; | |
1297 | ||
1298 | /* Pack the DMA modes */ | |
1299 | mask = ((dev->id[63] >> 8) << ATA_SHIFT_MWDMA) & ATA_MASK_MWDMA; | |
1300 | if (dev->id[53] & 0x04) | |
1301 | mask |= ((dev->id[88] >> 8) << ATA_SHIFT_UDMA) & ATA_MASK_UDMA; | |
1302 | ||
1303 | /* Select the mode in use */ | |
1304 | mode = ata_xfer_mask2mode(mask); | |
1305 | ||
1306 | if (mode != 0) { | |
1307 | ata_dev_printk(dev, KERN_INFO, "configured for %s\n", | |
1308 | ata_mode_string(mask)); | |
1309 | } else { | |
1310 | /* SWDMA perhaps ? */ | |
1311 | mode = unknown; | |
1312 | ata_dev_printk(dev, KERN_INFO, "configured for DMA\n"); | |
1313 | } | |
1314 | ||
1315 | /* Configure the device reporting */ | |
1316 | dev->xfer_mode = mode; | |
1317 | dev->xfer_shift = ata_xfer_mode2shift(mode); | |
1318 | } | |
1319 | ||
0baab86b EF |
1320 | /** |
1321 | * ata_noop_dev_select - Select device 0/1 on ATA bus | |
1322 | * @ap: ATA channel to manipulate | |
1323 | * @device: ATA device (numbered from zero) to select | |
1324 | * | |
1325 | * This function performs no actual function. | |
1326 | * | |
1327 | * May be used as the dev_select() entry in ata_port_operations. | |
1328 | * | |
1329 | * LOCKING: | |
1330 | * caller. | |
1331 | */ | |
2dcb407e | 1332 | void ata_noop_dev_select(struct ata_port *ap, unsigned int device) |
1da177e4 LT |
1333 | { |
1334 | } | |
1335 | ||
0baab86b | 1336 | |
1da177e4 LT |
1337 | /** |
1338 | * ata_std_dev_select - Select device 0/1 on ATA bus | |
1339 | * @ap: ATA channel to manipulate | |
1340 | * @device: ATA device (numbered from zero) to select | |
1341 | * | |
1342 | * Use the method defined in the ATA specification to | |
1343 | * make either device 0, or device 1, active on the | |
0baab86b EF |
1344 | * ATA channel. Works with both PIO and MMIO. |
1345 | * | |
1346 | * May be used as the dev_select() entry in ata_port_operations. | |
1da177e4 LT |
1347 | * |
1348 | * LOCKING: | |
1349 | * caller. | |
1350 | */ | |
1351 | ||
2dcb407e | 1352 | void ata_std_dev_select(struct ata_port *ap, unsigned int device) |
1da177e4 LT |
1353 | { |
1354 | u8 tmp; | |
1355 | ||
1356 | if (device == 0) | |
1357 | tmp = ATA_DEVICE_OBS; | |
1358 | else | |
1359 | tmp = ATA_DEVICE_OBS | ATA_DEV1; | |
1360 | ||
0d5ff566 | 1361 | iowrite8(tmp, ap->ioaddr.device_addr); |
1da177e4 LT |
1362 | ata_pause(ap); /* needed; also flushes, for mmio */ |
1363 | } | |
1364 | ||
1365 | /** | |
1366 | * ata_dev_select - Select device 0/1 on ATA bus | |
1367 | * @ap: ATA channel to manipulate | |
1368 | * @device: ATA device (numbered from zero) to select | |
1369 | * @wait: non-zero to wait for Status register BSY bit to clear | |
1370 | * @can_sleep: non-zero if context allows sleeping | |
1371 | * | |
1372 | * Use the method defined in the ATA specification to | |
1373 | * make either device 0, or device 1, active on the | |
1374 | * ATA channel. | |
1375 | * | |
1376 | * This is a high-level version of ata_std_dev_select(), | |
1377 | * which additionally provides the services of inserting | |
1378 | * the proper pauses and status polling, where needed. | |
1379 | * | |
1380 | * LOCKING: | |
1381 | * caller. | |
1382 | */ | |
1383 | ||
1384 | void ata_dev_select(struct ata_port *ap, unsigned int device, | |
1385 | unsigned int wait, unsigned int can_sleep) | |
1386 | { | |
88574551 | 1387 | if (ata_msg_probe(ap)) |
44877b4e TH |
1388 | ata_port_printk(ap, KERN_INFO, "ata_dev_select: ENTER, " |
1389 | "device %u, wait %u\n", device, wait); | |
1da177e4 LT |
1390 | |
1391 | if (wait) | |
1392 | ata_wait_idle(ap); | |
1393 | ||
1394 | ap->ops->dev_select(ap, device); | |
1395 | ||
1396 | if (wait) { | |
9af5c9c9 | 1397 | if (can_sleep && ap->link.device[device].class == ATA_DEV_ATAPI) |
1da177e4 LT |
1398 | msleep(150); |
1399 | ata_wait_idle(ap); | |
1400 | } | |
1401 | } | |
1402 | ||
1403 | /** | |
1404 | * ata_dump_id - IDENTIFY DEVICE info debugging output | |
0bd3300a | 1405 | * @id: IDENTIFY DEVICE page to dump |
1da177e4 | 1406 | * |
0bd3300a TH |
1407 | * Dump selected 16-bit words from the given IDENTIFY DEVICE |
1408 | * page. | |
1da177e4 LT |
1409 | * |
1410 | * LOCKING: | |
1411 | * caller. | |
1412 | */ | |
1413 | ||
0bd3300a | 1414 | static inline void ata_dump_id(const u16 *id) |
1da177e4 LT |
1415 | { |
1416 | DPRINTK("49==0x%04x " | |
1417 | "53==0x%04x " | |
1418 | "63==0x%04x " | |
1419 | "64==0x%04x " | |
1420 | "75==0x%04x \n", | |
0bd3300a TH |
1421 | id[49], |
1422 | id[53], | |
1423 | id[63], | |
1424 | id[64], | |
1425 | id[75]); | |
1da177e4 LT |
1426 | DPRINTK("80==0x%04x " |
1427 | "81==0x%04x " | |
1428 | "82==0x%04x " | |
1429 | "83==0x%04x " | |
1430 | "84==0x%04x \n", | |
0bd3300a TH |
1431 | id[80], |
1432 | id[81], | |
1433 | id[82], | |
1434 | id[83], | |
1435 | id[84]); | |
1da177e4 LT |
1436 | DPRINTK("88==0x%04x " |
1437 | "93==0x%04x\n", | |
0bd3300a TH |
1438 | id[88], |
1439 | id[93]); | |
1da177e4 LT |
1440 | } |
1441 | ||
cb95d562 TH |
1442 | /** |
1443 | * ata_id_xfermask - Compute xfermask from the given IDENTIFY data | |
1444 | * @id: IDENTIFY data to compute xfer mask from | |
1445 | * | |
1446 | * Compute the xfermask for this device. This is not as trivial | |
1447 | * as it seems if we must consider early devices correctly. | |
1448 | * | |
1449 | * FIXME: pre IDE drive timing (do we care ?). | |
1450 | * | |
1451 | * LOCKING: | |
1452 | * None. | |
1453 | * | |
1454 | * RETURNS: | |
1455 | * Computed xfermask | |
1456 | */ | |
1457 | static unsigned int ata_id_xfermask(const u16 *id) | |
1458 | { | |
1459 | unsigned int pio_mask, mwdma_mask, udma_mask; | |
1460 | ||
1461 | /* Usual case. Word 53 indicates word 64 is valid */ | |
1462 | if (id[ATA_ID_FIELD_VALID] & (1 << 1)) { | |
1463 | pio_mask = id[ATA_ID_PIO_MODES] & 0x03; | |
1464 | pio_mask <<= 3; | |
1465 | pio_mask |= 0x7; | |
1466 | } else { | |
1467 | /* If word 64 isn't valid then Word 51 high byte holds | |
1468 | * the PIO timing number for the maximum. Turn it into | |
1469 | * a mask. | |
1470 | */ | |
7a0f1c8a | 1471 | u8 mode = (id[ATA_ID_OLD_PIO_MODES] >> 8) & 0xFF; |
46767aeb | 1472 | if (mode < 5) /* Valid PIO range */ |
2dcb407e | 1473 | pio_mask = (2 << mode) - 1; |
46767aeb AC |
1474 | else |
1475 | pio_mask = 1; | |
cb95d562 TH |
1476 | |
1477 | /* But wait.. there's more. Design your standards by | |
1478 | * committee and you too can get a free iordy field to | |
1479 | * process. However its the speeds not the modes that | |
1480 | * are supported... Note drivers using the timing API | |
1481 | * will get this right anyway | |
1482 | */ | |
1483 | } | |
1484 | ||
1485 | mwdma_mask = id[ATA_ID_MWDMA_MODES] & 0x07; | |
fb21f0d0 | 1486 | |
b352e57d AC |
1487 | if (ata_id_is_cfa(id)) { |
1488 | /* | |
1489 | * Process compact flash extended modes | |
1490 | */ | |
1491 | int pio = id[163] & 0x7; | |
1492 | int dma = (id[163] >> 3) & 7; | |
1493 | ||
1494 | if (pio) | |
1495 | pio_mask |= (1 << 5); | |
1496 | if (pio > 1) | |
1497 | pio_mask |= (1 << 6); | |
1498 | if (dma) | |
1499 | mwdma_mask |= (1 << 3); | |
1500 | if (dma > 1) | |
1501 | mwdma_mask |= (1 << 4); | |
1502 | } | |
1503 | ||
fb21f0d0 TH |
1504 | udma_mask = 0; |
1505 | if (id[ATA_ID_FIELD_VALID] & (1 << 2)) | |
1506 | udma_mask = id[ATA_ID_UDMA_MODES] & 0xff; | |
cb95d562 TH |
1507 | |
1508 | return ata_pack_xfermask(pio_mask, mwdma_mask, udma_mask); | |
1509 | } | |
1510 | ||
86e45b6b TH |
1511 | /** |
1512 | * ata_port_queue_task - Queue port_task | |
1513 | * @ap: The ata_port to queue port_task for | |
e2a7f77a | 1514 | * @fn: workqueue function to be scheduled |
65f27f38 | 1515 | * @data: data for @fn to use |
e2a7f77a | 1516 | * @delay: delay time for workqueue function |
86e45b6b TH |
1517 | * |
1518 | * Schedule @fn(@data) for execution after @delay jiffies using | |
1519 | * port_task. There is one port_task per port and it's the | |
1520 | * user(low level driver)'s responsibility to make sure that only | |
1521 | * one task is active at any given time. | |
1522 | * | |
1523 | * libata core layer takes care of synchronization between | |
1524 | * port_task and EH. ata_port_queue_task() may be ignored for EH | |
1525 | * synchronization. | |
1526 | * | |
1527 | * LOCKING: | |
1528 | * Inherited from caller. | |
1529 | */ | |
65f27f38 | 1530 | void ata_port_queue_task(struct ata_port *ap, work_func_t fn, void *data, |
86e45b6b TH |
1531 | unsigned long delay) |
1532 | { | |
65f27f38 DH |
1533 | PREPARE_DELAYED_WORK(&ap->port_task, fn); |
1534 | ap->port_task_data = data; | |
86e45b6b | 1535 | |
45a66c1c ON |
1536 | /* may fail if ata_port_flush_task() in progress */ |
1537 | queue_delayed_work(ata_wq, &ap->port_task, delay); | |
86e45b6b TH |
1538 | } |
1539 | ||
1540 | /** | |
1541 | * ata_port_flush_task - Flush port_task | |
1542 | * @ap: The ata_port to flush port_task for | |
1543 | * | |
1544 | * After this function completes, port_task is guranteed not to | |
1545 | * be running or scheduled. | |
1546 | * | |
1547 | * LOCKING: | |
1548 | * Kernel thread context (may sleep) | |
1549 | */ | |
1550 | void ata_port_flush_task(struct ata_port *ap) | |
1551 | { | |
86e45b6b TH |
1552 | DPRINTK("ENTER\n"); |
1553 | ||
45a66c1c | 1554 | cancel_rearming_delayed_work(&ap->port_task); |
86e45b6b | 1555 | |
0dd4b21f BP |
1556 | if (ata_msg_ctl(ap)) |
1557 | ata_port_printk(ap, KERN_DEBUG, "%s: EXIT\n", __FUNCTION__); | |
86e45b6b TH |
1558 | } |
1559 | ||
7102d230 | 1560 | static void ata_qc_complete_internal(struct ata_queued_cmd *qc) |
a2a7a662 | 1561 | { |
77853bf2 | 1562 | struct completion *waiting = qc->private_data; |
a2a7a662 | 1563 | |
a2a7a662 | 1564 | complete(waiting); |
a2a7a662 TH |
1565 | } |
1566 | ||
1567 | /** | |
2432697b | 1568 | * ata_exec_internal_sg - execute libata internal command |
a2a7a662 TH |
1569 | * @dev: Device to which the command is sent |
1570 | * @tf: Taskfile registers for the command and the result | |
d69cf37d | 1571 | * @cdb: CDB for packet command |
a2a7a662 | 1572 | * @dma_dir: Data tranfer direction of the command |
5c1ad8b3 | 1573 | * @sgl: sg list for the data buffer of the command |
2432697b | 1574 | * @n_elem: Number of sg entries |
2b789108 | 1575 | * @timeout: Timeout in msecs (0 for default) |
a2a7a662 TH |
1576 | * |
1577 | * Executes libata internal command with timeout. @tf contains | |
1578 | * command on entry and result on return. Timeout and error | |
1579 | * conditions are reported via return value. No recovery action | |
1580 | * is taken after a command times out. It's caller's duty to | |
1581 | * clean up after timeout. | |
1582 | * | |
1583 | * LOCKING: | |
1584 | * None. Should be called with kernel context, might sleep. | |
551e8889 TH |
1585 | * |
1586 | * RETURNS: | |
1587 | * Zero on success, AC_ERR_* mask on failure | |
a2a7a662 | 1588 | */ |
2432697b TH |
1589 | unsigned ata_exec_internal_sg(struct ata_device *dev, |
1590 | struct ata_taskfile *tf, const u8 *cdb, | |
87260216 | 1591 | int dma_dir, struct scatterlist *sgl, |
2b789108 | 1592 | unsigned int n_elem, unsigned long timeout) |
a2a7a662 | 1593 | { |
9af5c9c9 TH |
1594 | struct ata_link *link = dev->link; |
1595 | struct ata_port *ap = link->ap; | |
a2a7a662 TH |
1596 | u8 command = tf->command; |
1597 | struct ata_queued_cmd *qc; | |
2ab7db1f | 1598 | unsigned int tag, preempted_tag; |
dedaf2b0 | 1599 | u32 preempted_sactive, preempted_qc_active; |
da917d69 | 1600 | int preempted_nr_active_links; |
60be6b9a | 1601 | DECLARE_COMPLETION_ONSTACK(wait); |
a2a7a662 | 1602 | unsigned long flags; |
77853bf2 | 1603 | unsigned int err_mask; |
d95a717f | 1604 | int rc; |
a2a7a662 | 1605 | |
ba6a1308 | 1606 | spin_lock_irqsave(ap->lock, flags); |
a2a7a662 | 1607 | |
e3180499 | 1608 | /* no internal command while frozen */ |
b51e9e5d | 1609 | if (ap->pflags & ATA_PFLAG_FROZEN) { |
ba6a1308 | 1610 | spin_unlock_irqrestore(ap->lock, flags); |
e3180499 TH |
1611 | return AC_ERR_SYSTEM; |
1612 | } | |
1613 | ||
2ab7db1f | 1614 | /* initialize internal qc */ |
a2a7a662 | 1615 | |
2ab7db1f TH |
1616 | /* XXX: Tag 0 is used for drivers with legacy EH as some |
1617 | * drivers choke if any other tag is given. This breaks | |
1618 | * ata_tag_internal() test for those drivers. Don't use new | |
1619 | * EH stuff without converting to it. | |
1620 | */ | |
1621 | if (ap->ops->error_handler) | |
1622 | tag = ATA_TAG_INTERNAL; | |
1623 | else | |
1624 | tag = 0; | |
1625 | ||
6cec4a39 | 1626 | if (test_and_set_bit(tag, &ap->qc_allocated)) |
2ab7db1f | 1627 | BUG(); |
f69499f4 | 1628 | qc = __ata_qc_from_tag(ap, tag); |
2ab7db1f TH |
1629 | |
1630 | qc->tag = tag; | |
1631 | qc->scsicmd = NULL; | |
1632 | qc->ap = ap; | |
1633 | qc->dev = dev; | |
1634 | ata_qc_reinit(qc); | |
1635 | ||
9af5c9c9 TH |
1636 | preempted_tag = link->active_tag; |
1637 | preempted_sactive = link->sactive; | |
dedaf2b0 | 1638 | preempted_qc_active = ap->qc_active; |
da917d69 | 1639 | preempted_nr_active_links = ap->nr_active_links; |
9af5c9c9 TH |
1640 | link->active_tag = ATA_TAG_POISON; |
1641 | link->sactive = 0; | |
dedaf2b0 | 1642 | ap->qc_active = 0; |
da917d69 | 1643 | ap->nr_active_links = 0; |
2ab7db1f TH |
1644 | |
1645 | /* prepare & issue qc */ | |
a2a7a662 | 1646 | qc->tf = *tf; |
d69cf37d TH |
1647 | if (cdb) |
1648 | memcpy(qc->cdb, cdb, ATAPI_CDB_LEN); | |
e61e0672 | 1649 | qc->flags |= ATA_QCFLAG_RESULT_TF; |
a2a7a662 TH |
1650 | qc->dma_dir = dma_dir; |
1651 | if (dma_dir != DMA_NONE) { | |
2432697b | 1652 | unsigned int i, buflen = 0; |
87260216 | 1653 | struct scatterlist *sg; |
2432697b | 1654 | |
87260216 JA |
1655 | for_each_sg(sgl, sg, n_elem, i) |
1656 | buflen += sg->length; | |
2432697b | 1657 | |
87260216 | 1658 | ata_sg_init(qc, sgl, n_elem); |
49c80429 | 1659 | qc->nbytes = buflen; |
a2a7a662 TH |
1660 | } |
1661 | ||
77853bf2 | 1662 | qc->private_data = &wait; |
a2a7a662 TH |
1663 | qc->complete_fn = ata_qc_complete_internal; |
1664 | ||
8e0e694a | 1665 | ata_qc_issue(qc); |
a2a7a662 | 1666 | |
ba6a1308 | 1667 | spin_unlock_irqrestore(ap->lock, flags); |
a2a7a662 | 1668 | |
2b789108 TH |
1669 | if (!timeout) |
1670 | timeout = ata_probe_timeout * 1000 / HZ; | |
1671 | ||
1672 | rc = wait_for_completion_timeout(&wait, msecs_to_jiffies(timeout)); | |
d95a717f TH |
1673 | |
1674 | ata_port_flush_task(ap); | |
41ade50c | 1675 | |
d95a717f | 1676 | if (!rc) { |
ba6a1308 | 1677 | spin_lock_irqsave(ap->lock, flags); |
a2a7a662 TH |
1678 | |
1679 | /* We're racing with irq here. If we lose, the | |
1680 | * following test prevents us from completing the qc | |
d95a717f TH |
1681 | * twice. If we win, the port is frozen and will be |
1682 | * cleaned up by ->post_internal_cmd(). | |
a2a7a662 | 1683 | */ |
77853bf2 | 1684 | if (qc->flags & ATA_QCFLAG_ACTIVE) { |
d95a717f TH |
1685 | qc->err_mask |= AC_ERR_TIMEOUT; |
1686 | ||
1687 | if (ap->ops->error_handler) | |
1688 | ata_port_freeze(ap); | |
1689 | else | |
1690 | ata_qc_complete(qc); | |
f15a1daf | 1691 | |
0dd4b21f BP |
1692 | if (ata_msg_warn(ap)) |
1693 | ata_dev_printk(dev, KERN_WARNING, | |
88574551 | 1694 | "qc timeout (cmd 0x%x)\n", command); |
a2a7a662 TH |
1695 | } |
1696 | ||
ba6a1308 | 1697 | spin_unlock_irqrestore(ap->lock, flags); |
a2a7a662 TH |
1698 | } |
1699 | ||
d95a717f TH |
1700 | /* do post_internal_cmd */ |
1701 | if (ap->ops->post_internal_cmd) | |
1702 | ap->ops->post_internal_cmd(qc); | |
1703 | ||
a51d644a TH |
1704 | /* perform minimal error analysis */ |
1705 | if (qc->flags & ATA_QCFLAG_FAILED) { | |
1706 | if (qc->result_tf.command & (ATA_ERR | ATA_DF)) | |
1707 | qc->err_mask |= AC_ERR_DEV; | |
1708 | ||
1709 | if (!qc->err_mask) | |
1710 | qc->err_mask |= AC_ERR_OTHER; | |
1711 | ||
1712 | if (qc->err_mask & ~AC_ERR_OTHER) | |
1713 | qc->err_mask &= ~AC_ERR_OTHER; | |
d95a717f TH |
1714 | } |
1715 | ||
15869303 | 1716 | /* finish up */ |
ba6a1308 | 1717 | spin_lock_irqsave(ap->lock, flags); |
15869303 | 1718 | |
e61e0672 | 1719 | *tf = qc->result_tf; |
77853bf2 TH |
1720 | err_mask = qc->err_mask; |
1721 | ||
1722 | ata_qc_free(qc); | |
9af5c9c9 TH |
1723 | link->active_tag = preempted_tag; |
1724 | link->sactive = preempted_sactive; | |
dedaf2b0 | 1725 | ap->qc_active = preempted_qc_active; |
da917d69 | 1726 | ap->nr_active_links = preempted_nr_active_links; |
77853bf2 | 1727 | |
1f7dd3e9 TH |
1728 | /* XXX - Some LLDDs (sata_mv) disable port on command failure. |
1729 | * Until those drivers are fixed, we detect the condition | |
1730 | * here, fail the command with AC_ERR_SYSTEM and reenable the | |
1731 | * port. | |
1732 | * | |
1733 | * Note that this doesn't change any behavior as internal | |
1734 | * command failure results in disabling the device in the | |
1735 | * higher layer for LLDDs without new reset/EH callbacks. | |
1736 | * | |
1737 | * Kill the following code as soon as those drivers are fixed. | |
1738 | */ | |
198e0fed | 1739 | if (ap->flags & ATA_FLAG_DISABLED) { |
1f7dd3e9 TH |
1740 | err_mask |= AC_ERR_SYSTEM; |
1741 | ata_port_probe(ap); | |
1742 | } | |
1743 | ||
ba6a1308 | 1744 | spin_unlock_irqrestore(ap->lock, flags); |
15869303 | 1745 | |
77853bf2 | 1746 | return err_mask; |
a2a7a662 TH |
1747 | } |
1748 | ||
2432697b | 1749 | /** |
33480a0e | 1750 | * ata_exec_internal - execute libata internal command |
2432697b TH |
1751 | * @dev: Device to which the command is sent |
1752 | * @tf: Taskfile registers for the command and the result | |
1753 | * @cdb: CDB for packet command | |
1754 | * @dma_dir: Data tranfer direction of the command | |
1755 | * @buf: Data buffer of the command | |
1756 | * @buflen: Length of data buffer | |
2b789108 | 1757 | * @timeout: Timeout in msecs (0 for default) |
2432697b TH |
1758 | * |
1759 | * Wrapper around ata_exec_internal_sg() which takes simple | |
1760 | * buffer instead of sg list. | |
1761 | * | |
1762 | * LOCKING: | |
1763 | * None. Should be called with kernel context, might sleep. | |
1764 | * | |
1765 | * RETURNS: | |
1766 | * Zero on success, AC_ERR_* mask on failure | |
1767 | */ | |
1768 | unsigned ata_exec_internal(struct ata_device *dev, | |
1769 | struct ata_taskfile *tf, const u8 *cdb, | |
2b789108 TH |
1770 | int dma_dir, void *buf, unsigned int buflen, |
1771 | unsigned long timeout) | |
2432697b | 1772 | { |
33480a0e TH |
1773 | struct scatterlist *psg = NULL, sg; |
1774 | unsigned int n_elem = 0; | |
2432697b | 1775 | |
33480a0e TH |
1776 | if (dma_dir != DMA_NONE) { |
1777 | WARN_ON(!buf); | |
1778 | sg_init_one(&sg, buf, buflen); | |
1779 | psg = &sg; | |
1780 | n_elem++; | |
1781 | } | |
2432697b | 1782 | |
2b789108 TH |
1783 | return ata_exec_internal_sg(dev, tf, cdb, dma_dir, psg, n_elem, |
1784 | timeout); | |
2432697b TH |
1785 | } |
1786 | ||
977e6b9f TH |
1787 | /** |
1788 | * ata_do_simple_cmd - execute simple internal command | |
1789 | * @dev: Device to which the command is sent | |
1790 | * @cmd: Opcode to execute | |
1791 | * | |
1792 | * Execute a 'simple' command, that only consists of the opcode | |
1793 | * 'cmd' itself, without filling any other registers | |
1794 | * | |
1795 | * LOCKING: | |
1796 | * Kernel thread context (may sleep). | |
1797 | * | |
1798 | * RETURNS: | |
1799 | * Zero on success, AC_ERR_* mask on failure | |
e58eb583 | 1800 | */ |
77b08fb5 | 1801 | unsigned int ata_do_simple_cmd(struct ata_device *dev, u8 cmd) |
e58eb583 TH |
1802 | { |
1803 | struct ata_taskfile tf; | |
e58eb583 TH |
1804 | |
1805 | ata_tf_init(dev, &tf); | |
1806 | ||
1807 | tf.command = cmd; | |
1808 | tf.flags |= ATA_TFLAG_DEVICE; | |
1809 | tf.protocol = ATA_PROT_NODATA; | |
1810 | ||
2b789108 | 1811 | return ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0, 0); |
e58eb583 TH |
1812 | } |
1813 | ||
1bc4ccff AC |
1814 | /** |
1815 | * ata_pio_need_iordy - check if iordy needed | |
1816 | * @adev: ATA device | |
1817 | * | |
1818 | * Check if the current speed of the device requires IORDY. Used | |
1819 | * by various controllers for chip configuration. | |
1820 | */ | |
a617c09f | 1821 | |
1bc4ccff AC |
1822 | unsigned int ata_pio_need_iordy(const struct ata_device *adev) |
1823 | { | |
432729f0 AC |
1824 | /* Controller doesn't support IORDY. Probably a pointless check |
1825 | as the caller should know this */ | |
9af5c9c9 | 1826 | if (adev->link->ap->flags & ATA_FLAG_NO_IORDY) |
1bc4ccff | 1827 | return 0; |
432729f0 AC |
1828 | /* PIO3 and higher it is mandatory */ |
1829 | if (adev->pio_mode > XFER_PIO_2) | |
1830 | return 1; | |
1831 | /* We turn it on when possible */ | |
1832 | if (ata_id_has_iordy(adev->id)) | |
1bc4ccff | 1833 | return 1; |
432729f0 AC |
1834 | return 0; |
1835 | } | |
2e9edbf8 | 1836 | |
432729f0 AC |
1837 | /** |
1838 | * ata_pio_mask_no_iordy - Return the non IORDY mask | |
1839 | * @adev: ATA device | |
1840 | * | |
1841 | * Compute the highest mode possible if we are not using iordy. Return | |
1842 | * -1 if no iordy mode is available. | |
1843 | */ | |
a617c09f | 1844 | |
432729f0 AC |
1845 | static u32 ata_pio_mask_no_iordy(const struct ata_device *adev) |
1846 | { | |
1bc4ccff | 1847 | /* If we have no drive specific rule, then PIO 2 is non IORDY */ |
1bc4ccff | 1848 | if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE */ |
432729f0 | 1849 | u16 pio = adev->id[ATA_ID_EIDE_PIO]; |
1bc4ccff AC |
1850 | /* Is the speed faster than the drive allows non IORDY ? */ |
1851 | if (pio) { | |
1852 | /* This is cycle times not frequency - watch the logic! */ | |
1853 | if (pio > 240) /* PIO2 is 240nS per cycle */ | |
432729f0 AC |
1854 | return 3 << ATA_SHIFT_PIO; |
1855 | return 7 << ATA_SHIFT_PIO; | |
1bc4ccff AC |
1856 | } |
1857 | } | |
432729f0 | 1858 | return 3 << ATA_SHIFT_PIO; |
1bc4ccff AC |
1859 | } |
1860 | ||
1da177e4 | 1861 | /** |
49016aca | 1862 | * ata_dev_read_id - Read ID data from the specified device |
49016aca TH |
1863 | * @dev: target device |
1864 | * @p_class: pointer to class of the target device (may be changed) | |
bff04647 | 1865 | * @flags: ATA_READID_* flags |
fe635c7e | 1866 | * @id: buffer to read IDENTIFY data into |
1da177e4 | 1867 | * |
49016aca TH |
1868 | * Read ID data from the specified device. ATA_CMD_ID_ATA is |
1869 | * performed on ATA devices and ATA_CMD_ID_ATAPI on ATAPI | |
aec5c3c1 TH |
1870 | * devices. This function also issues ATA_CMD_INIT_DEV_PARAMS |
1871 | * for pre-ATA4 drives. | |
1da177e4 | 1872 | * |
50a99018 | 1873 | * FIXME: ATA_CMD_ID_ATA is optional for early drives and right |
2dcb407e | 1874 | * now we abort if we hit that case. |
50a99018 | 1875 | * |
1da177e4 | 1876 | * LOCKING: |
49016aca TH |
1877 | * Kernel thread context (may sleep) |
1878 | * | |
1879 | * RETURNS: | |
1880 | * 0 on success, -errno otherwise. | |
1da177e4 | 1881 | */ |
a9beec95 | 1882 | int ata_dev_read_id(struct ata_device *dev, unsigned int *p_class, |
bff04647 | 1883 | unsigned int flags, u16 *id) |
1da177e4 | 1884 | { |
9af5c9c9 | 1885 | struct ata_port *ap = dev->link->ap; |
49016aca | 1886 | unsigned int class = *p_class; |
a0123703 | 1887 | struct ata_taskfile tf; |
49016aca TH |
1888 | unsigned int err_mask = 0; |
1889 | const char *reason; | |
54936f8b | 1890 | int may_fallback = 1, tried_spinup = 0; |
49016aca | 1891 | int rc; |
1da177e4 | 1892 | |
0dd4b21f | 1893 | if (ata_msg_ctl(ap)) |
44877b4e | 1894 | ata_dev_printk(dev, KERN_DEBUG, "%s: ENTER\n", __FUNCTION__); |
1da177e4 | 1895 | |
49016aca | 1896 | ata_dev_select(ap, dev->devno, 1, 1); /* select device 0/1 */ |
49016aca | 1897 | retry: |
3373efd8 | 1898 | ata_tf_init(dev, &tf); |
a0123703 | 1899 | |
49016aca TH |
1900 | switch (class) { |
1901 | case ATA_DEV_ATA: | |
a0123703 | 1902 | tf.command = ATA_CMD_ID_ATA; |
49016aca TH |
1903 | break; |
1904 | case ATA_DEV_ATAPI: | |
a0123703 | 1905 | tf.command = ATA_CMD_ID_ATAPI; |
49016aca TH |
1906 | break; |
1907 | default: | |
1908 | rc = -ENODEV; | |
1909 | reason = "unsupported class"; | |
1910 | goto err_out; | |
1da177e4 LT |
1911 | } |
1912 | ||
a0123703 | 1913 | tf.protocol = ATA_PROT_PIO; |
81afe893 TH |
1914 | |
1915 | /* Some devices choke if TF registers contain garbage. Make | |
1916 | * sure those are properly initialized. | |
1917 | */ | |
1918 | tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE; | |
1919 | ||
1920 | /* Device presence detection is unreliable on some | |
1921 | * controllers. Always poll IDENTIFY if available. | |
1922 | */ | |
1923 | tf.flags |= ATA_TFLAG_POLLING; | |
1da177e4 | 1924 | |
3373efd8 | 1925 | err_mask = ata_exec_internal(dev, &tf, NULL, DMA_FROM_DEVICE, |
2b789108 | 1926 | id, sizeof(id[0]) * ATA_ID_WORDS, 0); |
a0123703 | 1927 | if (err_mask) { |
800b3996 | 1928 | if (err_mask & AC_ERR_NODEV_HINT) { |
55a8e2c8 | 1929 | DPRINTK("ata%u.%d: NODEV after polling detection\n", |
44877b4e | 1930 | ap->print_id, dev->devno); |
55a8e2c8 TH |
1931 | return -ENOENT; |
1932 | } | |
1933 | ||
54936f8b TH |
1934 | /* Device or controller might have reported the wrong |
1935 | * device class. Give a shot at the other IDENTIFY if | |
1936 | * the current one is aborted by the device. | |
1937 | */ | |
1938 | if (may_fallback && | |
1939 | (err_mask == AC_ERR_DEV) && (tf.feature & ATA_ABORTED)) { | |
1940 | may_fallback = 0; | |
1941 | ||
1942 | if (class == ATA_DEV_ATA) | |
1943 | class = ATA_DEV_ATAPI; | |
1944 | else | |
1945 | class = ATA_DEV_ATA; | |
1946 | goto retry; | |
1947 | } | |
1948 | ||
49016aca TH |
1949 | rc = -EIO; |
1950 | reason = "I/O error"; | |
1da177e4 LT |
1951 | goto err_out; |
1952 | } | |
1953 | ||
54936f8b TH |
1954 | /* Falling back doesn't make sense if ID data was read |
1955 | * successfully at least once. | |
1956 | */ | |
1957 | may_fallback = 0; | |
1958 | ||
49016aca | 1959 | swap_buf_le16(id, ATA_ID_WORDS); |
1da177e4 | 1960 | |
49016aca | 1961 | /* sanity check */ |
a4f5749b | 1962 | rc = -EINVAL; |
6070068b | 1963 | reason = "device reports invalid type"; |
a4f5749b TH |
1964 | |
1965 | if (class == ATA_DEV_ATA) { | |
1966 | if (!ata_id_is_ata(id) && !ata_id_is_cfa(id)) | |
1967 | goto err_out; | |
1968 | } else { | |
1969 | if (ata_id_is_ata(id)) | |
1970 | goto err_out; | |
49016aca TH |
1971 | } |
1972 | ||
169439c2 ML |
1973 | if (!tried_spinup && (id[2] == 0x37c8 || id[2] == 0x738c)) { |
1974 | tried_spinup = 1; | |
1975 | /* | |
1976 | * Drive powered-up in standby mode, and requires a specific | |
1977 | * SET_FEATURES spin-up subcommand before it will accept | |
1978 | * anything other than the original IDENTIFY command. | |
1979 | */ | |
218f3d30 | 1980 | err_mask = ata_dev_set_feature(dev, SETFEATURES_SPINUP, 0); |
fb0582f9 | 1981 | if (err_mask && id[2] != 0x738c) { |
169439c2 ML |
1982 | rc = -EIO; |
1983 | reason = "SPINUP failed"; | |
1984 | goto err_out; | |
1985 | } | |
1986 | /* | |
1987 | * If the drive initially returned incomplete IDENTIFY info, | |
1988 | * we now must reissue the IDENTIFY command. | |
1989 | */ | |
1990 | if (id[2] == 0x37c8) | |
1991 | goto retry; | |
1992 | } | |
1993 | ||
bff04647 | 1994 | if ((flags & ATA_READID_POSTRESET) && class == ATA_DEV_ATA) { |
49016aca TH |
1995 | /* |
1996 | * The exact sequence expected by certain pre-ATA4 drives is: | |
1997 | * SRST RESET | |
50a99018 AC |
1998 | * IDENTIFY (optional in early ATA) |
1999 | * INITIALIZE DEVICE PARAMETERS (later IDE and ATA) | |
49016aca TH |
2000 | * anything else.. |
2001 | * Some drives were very specific about that exact sequence. | |
50a99018 AC |
2002 | * |
2003 | * Note that ATA4 says lba is mandatory so the second check | |
2004 | * shoud never trigger. | |
49016aca TH |
2005 | */ |
2006 | if (ata_id_major_version(id) < 4 || !ata_id_has_lba(id)) { | |
3373efd8 | 2007 | err_mask = ata_dev_init_params(dev, id[3], id[6]); |
49016aca TH |
2008 | if (err_mask) { |
2009 | rc = -EIO; | |
2010 | reason = "INIT_DEV_PARAMS failed"; | |
2011 | goto err_out; | |
2012 | } | |
2013 | ||
2014 | /* current CHS translation info (id[53-58]) might be | |
2015 | * changed. reread the identify device info. | |
2016 | */ | |
bff04647 | 2017 | flags &= ~ATA_READID_POSTRESET; |
49016aca TH |
2018 | goto retry; |
2019 | } | |
2020 | } | |
2021 | ||
2022 | *p_class = class; | |
fe635c7e | 2023 | |
49016aca TH |
2024 | return 0; |
2025 | ||
2026 | err_out: | |
88574551 | 2027 | if (ata_msg_warn(ap)) |
0dd4b21f | 2028 | ata_dev_printk(dev, KERN_WARNING, "failed to IDENTIFY " |
88574551 | 2029 | "(%s, err_mask=0x%x)\n", reason, err_mask); |
49016aca TH |
2030 | return rc; |
2031 | } | |
2032 | ||
3373efd8 | 2033 | static inline u8 ata_dev_knobble(struct ata_device *dev) |
4b2f3ede | 2034 | { |
9af5c9c9 TH |
2035 | struct ata_port *ap = dev->link->ap; |
2036 | return ((ap->cbl == ATA_CBL_SATA) && (!ata_id_is_sata(dev->id))); | |
4b2f3ede TH |
2037 | } |
2038 | ||
a6e6ce8e TH |
2039 | static void ata_dev_config_ncq(struct ata_device *dev, |
2040 | char *desc, size_t desc_sz) | |
2041 | { | |
9af5c9c9 | 2042 | struct ata_port *ap = dev->link->ap; |
a6e6ce8e TH |
2043 | int hdepth = 0, ddepth = ata_id_queue_depth(dev->id); |
2044 | ||
2045 | if (!ata_id_has_ncq(dev->id)) { | |
2046 | desc[0] = '\0'; | |
2047 | return; | |
2048 | } | |
75683fe7 | 2049 | if (dev->horkage & ATA_HORKAGE_NONCQ) { |
6919a0a6 AC |
2050 | snprintf(desc, desc_sz, "NCQ (not used)"); |
2051 | return; | |
2052 | } | |
a6e6ce8e | 2053 | if (ap->flags & ATA_FLAG_NCQ) { |
cca3974e | 2054 | hdepth = min(ap->scsi_host->can_queue, ATA_MAX_QUEUE - 1); |
a6e6ce8e TH |
2055 | dev->flags |= ATA_DFLAG_NCQ; |
2056 | } | |
2057 | ||
2058 | if (hdepth >= ddepth) | |
2059 | snprintf(desc, desc_sz, "NCQ (depth %d)", ddepth); | |
2060 | else | |
2061 | snprintf(desc, desc_sz, "NCQ (depth %d/%d)", hdepth, ddepth); | |
2062 | } | |
2063 | ||
49016aca | 2064 | /** |
ffeae418 | 2065 | * ata_dev_configure - Configure the specified ATA/ATAPI device |
ffeae418 TH |
2066 | * @dev: Target device to configure |
2067 | * | |
2068 | * Configure @dev according to @dev->id. Generic and low-level | |
2069 | * driver specific fixups are also applied. | |
49016aca TH |
2070 | * |
2071 | * LOCKING: | |
ffeae418 TH |
2072 | * Kernel thread context (may sleep) |
2073 | * | |
2074 | * RETURNS: | |
2075 | * 0 on success, -errno otherwise | |
49016aca | 2076 | */ |
efdaedc4 | 2077 | int ata_dev_configure(struct ata_device *dev) |
49016aca | 2078 | { |
9af5c9c9 TH |
2079 | struct ata_port *ap = dev->link->ap; |
2080 | struct ata_eh_context *ehc = &dev->link->eh_context; | |
6746544c | 2081 | int print_info = ehc->i.flags & ATA_EHI_PRINTINFO; |
1148c3a7 | 2082 | const u16 *id = dev->id; |
ff8854b2 | 2083 | unsigned int xfer_mask; |
b352e57d | 2084 | char revbuf[7]; /* XYZ-99\0 */ |
3f64f565 EM |
2085 | char fwrevbuf[ATA_ID_FW_REV_LEN+1]; |
2086 | char modelbuf[ATA_ID_PROD_LEN+1]; | |
e6d902a3 | 2087 | int rc; |
49016aca | 2088 | |
0dd4b21f | 2089 | if (!ata_dev_enabled(dev) && ata_msg_info(ap)) { |
44877b4e TH |
2090 | ata_dev_printk(dev, KERN_INFO, "%s: ENTER/EXIT -- nodev\n", |
2091 | __FUNCTION__); | |
ffeae418 | 2092 | return 0; |
49016aca TH |
2093 | } |
2094 | ||
0dd4b21f | 2095 | if (ata_msg_probe(ap)) |
44877b4e | 2096 | ata_dev_printk(dev, KERN_DEBUG, "%s: ENTER\n", __FUNCTION__); |
1da177e4 | 2097 | |
75683fe7 TH |
2098 | /* set horkage */ |
2099 | dev->horkage |= ata_dev_blacklisted(dev); | |
2100 | ||
6746544c TH |
2101 | /* let ACPI work its magic */ |
2102 | rc = ata_acpi_on_devcfg(dev); | |
2103 | if (rc) | |
2104 | return rc; | |
08573a86 | 2105 | |
05027adc TH |
2106 | /* massage HPA, do it early as it might change IDENTIFY data */ |
2107 | rc = ata_hpa_resize(dev); | |
2108 | if (rc) | |
2109 | return rc; | |
2110 | ||
c39f5ebe | 2111 | /* print device capabilities */ |
0dd4b21f | 2112 | if (ata_msg_probe(ap)) |
88574551 TH |
2113 | ata_dev_printk(dev, KERN_DEBUG, |
2114 | "%s: cfg 49:%04x 82:%04x 83:%04x 84:%04x " | |
2115 | "85:%04x 86:%04x 87:%04x 88:%04x\n", | |
0dd4b21f | 2116 | __FUNCTION__, |
f15a1daf TH |
2117 | id[49], id[82], id[83], id[84], |
2118 | id[85], id[86], id[87], id[88]); | |
c39f5ebe | 2119 | |
208a9933 | 2120 | /* initialize to-be-configured parameters */ |
ea1dd4e1 | 2121 | dev->flags &= ~ATA_DFLAG_CFG_MASK; |
208a9933 TH |
2122 | dev->max_sectors = 0; |
2123 | dev->cdb_len = 0; | |
2124 | dev->n_sectors = 0; | |
2125 | dev->cylinders = 0; | |
2126 | dev->heads = 0; | |
2127 | dev->sectors = 0; | |
2128 | ||
1da177e4 LT |
2129 | /* |
2130 | * common ATA, ATAPI feature tests | |
2131 | */ | |
2132 | ||
ff8854b2 | 2133 | /* find max transfer mode; for printk only */ |
1148c3a7 | 2134 | xfer_mask = ata_id_xfermask(id); |
1da177e4 | 2135 | |
0dd4b21f BP |
2136 | if (ata_msg_probe(ap)) |
2137 | ata_dump_id(id); | |
1da177e4 | 2138 | |
ef143d57 AL |
2139 | /* SCSI only uses 4-char revisions, dump full 8 chars from ATA */ |
2140 | ata_id_c_string(dev->id, fwrevbuf, ATA_ID_FW_REV, | |
2141 | sizeof(fwrevbuf)); | |
2142 | ||
2143 | ata_id_c_string(dev->id, modelbuf, ATA_ID_PROD, | |
2144 | sizeof(modelbuf)); | |
2145 | ||
1da177e4 LT |
2146 | /* ATA-specific feature tests */ |
2147 | if (dev->class == ATA_DEV_ATA) { | |
b352e57d AC |
2148 | if (ata_id_is_cfa(id)) { |
2149 | if (id[162] & 1) /* CPRM may make this media unusable */ | |
44877b4e TH |
2150 | ata_dev_printk(dev, KERN_WARNING, |
2151 | "supports DRM functions and may " | |
2152 | "not be fully accessable.\n"); | |
b352e57d | 2153 | snprintf(revbuf, 7, "CFA"); |
2dcb407e JG |
2154 | } else |
2155 | snprintf(revbuf, 7, "ATA-%d", ata_id_major_version(id)); | |
b352e57d | 2156 | |
1148c3a7 | 2157 | dev->n_sectors = ata_id_n_sectors(id); |
2940740b | 2158 | |
3f64f565 EM |
2159 | if (dev->id[59] & 0x100) |
2160 | dev->multi_count = dev->id[59] & 0xff; | |
2161 | ||
1148c3a7 | 2162 | if (ata_id_has_lba(id)) { |
4c2d721a | 2163 | const char *lba_desc; |
a6e6ce8e | 2164 | char ncq_desc[20]; |
8bf62ece | 2165 | |
4c2d721a TH |
2166 | lba_desc = "LBA"; |
2167 | dev->flags |= ATA_DFLAG_LBA; | |
1148c3a7 | 2168 | if (ata_id_has_lba48(id)) { |
8bf62ece | 2169 | dev->flags |= ATA_DFLAG_LBA48; |
4c2d721a | 2170 | lba_desc = "LBA48"; |
6fc49adb TH |
2171 | |
2172 | if (dev->n_sectors >= (1UL << 28) && | |
2173 | ata_id_has_flush_ext(id)) | |
2174 | dev->flags |= ATA_DFLAG_FLUSH_EXT; | |
4c2d721a | 2175 | } |
8bf62ece | 2176 | |
a6e6ce8e TH |
2177 | /* config NCQ */ |
2178 | ata_dev_config_ncq(dev, ncq_desc, sizeof(ncq_desc)); | |
2179 | ||
8bf62ece | 2180 | /* print device info to dmesg */ |
3f64f565 EM |
2181 | if (ata_msg_drv(ap) && print_info) { |
2182 | ata_dev_printk(dev, KERN_INFO, | |
2183 | "%s: %s, %s, max %s\n", | |
2184 | revbuf, modelbuf, fwrevbuf, | |
2185 | ata_mode_string(xfer_mask)); | |
2186 | ata_dev_printk(dev, KERN_INFO, | |
2187 | "%Lu sectors, multi %u: %s %s\n", | |
f15a1daf | 2188 | (unsigned long long)dev->n_sectors, |
3f64f565 EM |
2189 | dev->multi_count, lba_desc, ncq_desc); |
2190 | } | |
ffeae418 | 2191 | } else { |
8bf62ece AL |
2192 | /* CHS */ |
2193 | ||
2194 | /* Default translation */ | |
1148c3a7 TH |
2195 | dev->cylinders = id[1]; |
2196 | dev->heads = id[3]; | |
2197 | dev->sectors = id[6]; | |
8bf62ece | 2198 | |
1148c3a7 | 2199 | if (ata_id_current_chs_valid(id)) { |
8bf62ece | 2200 | /* Current CHS translation is valid. */ |
1148c3a7 TH |
2201 | dev->cylinders = id[54]; |
2202 | dev->heads = id[55]; | |
2203 | dev->sectors = id[56]; | |
8bf62ece AL |
2204 | } |
2205 | ||
2206 | /* print device info to dmesg */ | |
3f64f565 | 2207 | if (ata_msg_drv(ap) && print_info) { |
88574551 | 2208 | ata_dev_printk(dev, KERN_INFO, |
3f64f565 EM |
2209 | "%s: %s, %s, max %s\n", |
2210 | revbuf, modelbuf, fwrevbuf, | |
2211 | ata_mode_string(xfer_mask)); | |
a84471fe | 2212 | ata_dev_printk(dev, KERN_INFO, |
3f64f565 EM |
2213 | "%Lu sectors, multi %u, CHS %u/%u/%u\n", |
2214 | (unsigned long long)dev->n_sectors, | |
2215 | dev->multi_count, dev->cylinders, | |
2216 | dev->heads, dev->sectors); | |
2217 | } | |
07f6f7d0 AL |
2218 | } |
2219 | ||
6e7846e9 | 2220 | dev->cdb_len = 16; |
1da177e4 LT |
2221 | } |
2222 | ||
2223 | /* ATAPI-specific feature tests */ | |
2c13b7ce | 2224 | else if (dev->class == ATA_DEV_ATAPI) { |
854c73a2 TH |
2225 | const char *cdb_intr_string = ""; |
2226 | const char *atapi_an_string = ""; | |
7d77b247 | 2227 | u32 sntf; |
08a556db | 2228 | |
1148c3a7 | 2229 | rc = atapi_cdb_len(id); |
1da177e4 | 2230 | if ((rc < 12) || (rc > ATAPI_CDB_LEN)) { |
0dd4b21f | 2231 | if (ata_msg_warn(ap)) |
88574551 TH |
2232 | ata_dev_printk(dev, KERN_WARNING, |
2233 | "unsupported CDB len\n"); | |
ffeae418 | 2234 | rc = -EINVAL; |
1da177e4 LT |
2235 | goto err_out_nosup; |
2236 | } | |
6e7846e9 | 2237 | dev->cdb_len = (unsigned int) rc; |
1da177e4 | 2238 | |
7d77b247 TH |
2239 | /* Enable ATAPI AN if both the host and device have |
2240 | * the support. If PMP is attached, SNTF is required | |
2241 | * to enable ATAPI AN to discern between PHY status | |
2242 | * changed notifications and ATAPI ANs. | |
9f45cbd3 | 2243 | */ |
7d77b247 TH |
2244 | if ((ap->flags & ATA_FLAG_AN) && ata_id_has_atapi_AN(id) && |
2245 | (!ap->nr_pmp_links || | |
2246 | sata_scr_read(&ap->link, SCR_NOTIFICATION, &sntf) == 0)) { | |
854c73a2 TH |
2247 | unsigned int err_mask; |
2248 | ||
9f45cbd3 | 2249 | /* issue SET feature command to turn this on */ |
218f3d30 JG |
2250 | err_mask = ata_dev_set_feature(dev, |
2251 | SETFEATURES_SATA_ENABLE, SATA_AN); | |
854c73a2 | 2252 | if (err_mask) |
9f45cbd3 | 2253 | ata_dev_printk(dev, KERN_ERR, |
854c73a2 TH |
2254 | "failed to enable ATAPI AN " |
2255 | "(err_mask=0x%x)\n", err_mask); | |
2256 | else { | |
9f45cbd3 | 2257 | dev->flags |= ATA_DFLAG_AN; |
854c73a2 TH |
2258 | atapi_an_string = ", ATAPI AN"; |
2259 | } | |
9f45cbd3 KCA |
2260 | } |
2261 | ||
08a556db | 2262 | if (ata_id_cdb_intr(dev->id)) { |
312f7da2 | 2263 | dev->flags |= ATA_DFLAG_CDB_INTR; |
08a556db AL |
2264 | cdb_intr_string = ", CDB intr"; |
2265 | } | |
312f7da2 | 2266 | |
1da177e4 | 2267 | /* print device info to dmesg */ |
5afc8142 | 2268 | if (ata_msg_drv(ap) && print_info) |
ef143d57 | 2269 | ata_dev_printk(dev, KERN_INFO, |
854c73a2 | 2270 | "ATAPI: %s, %s, max %s%s%s\n", |
ef143d57 | 2271 | modelbuf, fwrevbuf, |
12436c30 | 2272 | ata_mode_string(xfer_mask), |
854c73a2 | 2273 | cdb_intr_string, atapi_an_string); |
1da177e4 LT |
2274 | } |
2275 | ||
914ed354 TH |
2276 | /* determine max_sectors */ |
2277 | dev->max_sectors = ATA_MAX_SECTORS; | |
2278 | if (dev->flags & ATA_DFLAG_LBA48) | |
2279 | dev->max_sectors = ATA_MAX_SECTORS_LBA48; | |
2280 | ||
ca77329f KCA |
2281 | if (!(dev->horkage & ATA_HORKAGE_IPM)) { |
2282 | if (ata_id_has_hipm(dev->id)) | |
2283 | dev->flags |= ATA_DFLAG_HIPM; | |
2284 | if (ata_id_has_dipm(dev->id)) | |
2285 | dev->flags |= ATA_DFLAG_DIPM; | |
2286 | } | |
2287 | ||
93590859 AC |
2288 | if (dev->horkage & ATA_HORKAGE_DIAGNOSTIC) { |
2289 | /* Let the user know. We don't want to disallow opens for | |
2290 | rescue purposes, or in case the vendor is just a blithering | |
2291 | idiot */ | |
2dcb407e | 2292 | if (print_info) { |
93590859 AC |
2293 | ata_dev_printk(dev, KERN_WARNING, |
2294 | "Drive reports diagnostics failure. This may indicate a drive\n"); | |
2295 | ata_dev_printk(dev, KERN_WARNING, | |
2296 | "fault or invalid emulation. Contact drive vendor for information.\n"); | |
2297 | } | |
2298 | } | |
2299 | ||
4b2f3ede | 2300 | /* limit bridge transfers to udma5, 200 sectors */ |
3373efd8 | 2301 | if (ata_dev_knobble(dev)) { |
5afc8142 | 2302 | if (ata_msg_drv(ap) && print_info) |
f15a1daf TH |
2303 | ata_dev_printk(dev, KERN_INFO, |
2304 | "applying bridge limits\n"); | |
5a529139 | 2305 | dev->udma_mask &= ATA_UDMA5; |
4b2f3ede TH |
2306 | dev->max_sectors = ATA_MAX_SECTORS; |
2307 | } | |
2308 | ||
f8d8e579 TB |
2309 | if ((dev->class == ATA_DEV_ATAPI) && |
2310 | (atapi_command_packet_set(id) == TYPE_TAPE)) | |
2311 | dev->max_sectors = ATA_MAX_SECTORS_TAPE; | |
2312 | ||
75683fe7 | 2313 | if (dev->horkage & ATA_HORKAGE_MAX_SEC_128) |
03ec52de TH |
2314 | dev->max_sectors = min_t(unsigned int, ATA_MAX_SECTORS_128, |
2315 | dev->max_sectors); | |
18d6e9d5 | 2316 | |
ca77329f KCA |
2317 | if (ata_dev_blacklisted(dev) & ATA_HORKAGE_IPM) { |
2318 | dev->horkage |= ATA_HORKAGE_IPM; | |
2319 | ||
2320 | /* reset link pm_policy for this port to no pm */ | |
2321 | ap->pm_policy = MAX_PERFORMANCE; | |
2322 | } | |
2323 | ||
4b2f3ede | 2324 | if (ap->ops->dev_config) |
cd0d3bbc | 2325 | ap->ops->dev_config(dev); |
4b2f3ede | 2326 | |
0dd4b21f BP |
2327 | if (ata_msg_probe(ap)) |
2328 | ata_dev_printk(dev, KERN_DEBUG, "%s: EXIT, drv_stat = 0x%x\n", | |
2329 | __FUNCTION__, ata_chk_status(ap)); | |
ffeae418 | 2330 | return 0; |
1da177e4 LT |
2331 | |
2332 | err_out_nosup: | |
0dd4b21f | 2333 | if (ata_msg_probe(ap)) |
88574551 TH |
2334 | ata_dev_printk(dev, KERN_DEBUG, |
2335 | "%s: EXIT, err\n", __FUNCTION__); | |
ffeae418 | 2336 | return rc; |
1da177e4 LT |
2337 | } |
2338 | ||
be0d18df | 2339 | /** |
2e41e8e6 | 2340 | * ata_cable_40wire - return 40 wire cable type |
be0d18df AC |
2341 | * @ap: port |
2342 | * | |
2e41e8e6 | 2343 | * Helper method for drivers which want to hardwire 40 wire cable |
be0d18df AC |
2344 | * detection. |
2345 | */ | |
2346 | ||
2347 | int ata_cable_40wire(struct ata_port *ap) | |
2348 | { | |
2349 | return ATA_CBL_PATA40; | |
2350 | } | |
2351 | ||
2352 | /** | |
2e41e8e6 | 2353 | * ata_cable_80wire - return 80 wire cable type |
be0d18df AC |
2354 | * @ap: port |
2355 | * | |
2e41e8e6 | 2356 | * Helper method for drivers which want to hardwire 80 wire cable |
be0d18df AC |
2357 | * detection. |
2358 | */ | |
2359 | ||
2360 | int ata_cable_80wire(struct ata_port *ap) | |
2361 | { | |
2362 | return ATA_CBL_PATA80; | |
2363 | } | |
2364 | ||
2365 | /** | |
2366 | * ata_cable_unknown - return unknown PATA cable. | |
2367 | * @ap: port | |
2368 | * | |
2369 | * Helper method for drivers which have no PATA cable detection. | |
2370 | */ | |
2371 | ||
2372 | int ata_cable_unknown(struct ata_port *ap) | |
2373 | { | |
2374 | return ATA_CBL_PATA_UNK; | |
2375 | } | |
2376 | ||
2377 | /** | |
2378 | * ata_cable_sata - return SATA cable type | |
2379 | * @ap: port | |
2380 | * | |
2381 | * Helper method for drivers which have SATA cables | |
2382 | */ | |
2383 | ||
2384 | int ata_cable_sata(struct ata_port *ap) | |
2385 | { | |
2386 | return ATA_CBL_SATA; | |
2387 | } | |
2388 | ||
1da177e4 LT |
2389 | /** |
2390 | * ata_bus_probe - Reset and probe ATA bus | |
2391 | * @ap: Bus to probe | |
2392 | * | |
0cba632b JG |
2393 | * Master ATA bus probing function. Initiates a hardware-dependent |
2394 | * bus reset, then attempts to identify any devices found on | |
2395 | * the bus. | |
2396 | * | |
1da177e4 | 2397 | * LOCKING: |
0cba632b | 2398 | * PCI/etc. bus probe sem. |
1da177e4 LT |
2399 | * |
2400 | * RETURNS: | |
96072e69 | 2401 | * Zero on success, negative errno otherwise. |
1da177e4 LT |
2402 | */ |
2403 | ||
80289167 | 2404 | int ata_bus_probe(struct ata_port *ap) |
1da177e4 | 2405 | { |
28ca5c57 | 2406 | unsigned int classes[ATA_MAX_DEVICES]; |
14d2bac1 | 2407 | int tries[ATA_MAX_DEVICES]; |
f58229f8 | 2408 | int rc; |
e82cbdb9 | 2409 | struct ata_device *dev; |
1da177e4 | 2410 | |
28ca5c57 | 2411 | ata_port_probe(ap); |
c19ba8af | 2412 | |
f58229f8 TH |
2413 | ata_link_for_each_dev(dev, &ap->link) |
2414 | tries[dev->devno] = ATA_PROBE_MAX_TRIES; | |
14d2bac1 TH |
2415 | |
2416 | retry: | |
cdeab114 TH |
2417 | ata_link_for_each_dev(dev, &ap->link) { |
2418 | /* If we issue an SRST then an ATA drive (not ATAPI) | |
2419 | * may change configuration and be in PIO0 timing. If | |
2420 | * we do a hard reset (or are coming from power on) | |
2421 | * this is true for ATA or ATAPI. Until we've set a | |
2422 | * suitable controller mode we should not touch the | |
2423 | * bus as we may be talking too fast. | |
2424 | */ | |
2425 | dev->pio_mode = XFER_PIO_0; | |
2426 | ||
2427 | /* If the controller has a pio mode setup function | |
2428 | * then use it to set the chipset to rights. Don't | |
2429 | * touch the DMA setup as that will be dealt with when | |
2430 | * configuring devices. | |
2431 | */ | |
2432 | if (ap->ops->set_piomode) | |
2433 | ap->ops->set_piomode(ap, dev); | |
2434 | } | |
2435 | ||
2044470c | 2436 | /* reset and determine device classes */ |
52783c5d | 2437 | ap->ops->phy_reset(ap); |
2061a47a | 2438 | |
f58229f8 | 2439 | ata_link_for_each_dev(dev, &ap->link) { |
52783c5d TH |
2440 | if (!(ap->flags & ATA_FLAG_DISABLED) && |
2441 | dev->class != ATA_DEV_UNKNOWN) | |
2442 | classes[dev->devno] = dev->class; | |
2443 | else | |
2444 | classes[dev->devno] = ATA_DEV_NONE; | |
2044470c | 2445 | |
52783c5d | 2446 | dev->class = ATA_DEV_UNKNOWN; |
28ca5c57 | 2447 | } |
1da177e4 | 2448 | |
52783c5d | 2449 | ata_port_probe(ap); |
2044470c | 2450 | |
f31f0cc2 JG |
2451 | /* read IDENTIFY page and configure devices. We have to do the identify |
2452 | specific sequence bass-ackwards so that PDIAG- is released by | |
2453 | the slave device */ | |
2454 | ||
f58229f8 TH |
2455 | ata_link_for_each_dev(dev, &ap->link) { |
2456 | if (tries[dev->devno]) | |
2457 | dev->class = classes[dev->devno]; | |
ffeae418 | 2458 | |
14d2bac1 | 2459 | if (!ata_dev_enabled(dev)) |
ffeae418 | 2460 | continue; |
ffeae418 | 2461 | |
bff04647 TH |
2462 | rc = ata_dev_read_id(dev, &dev->class, ATA_READID_POSTRESET, |
2463 | dev->id); | |
14d2bac1 TH |
2464 | if (rc) |
2465 | goto fail; | |
f31f0cc2 JG |
2466 | } |
2467 | ||
be0d18df AC |
2468 | /* Now ask for the cable type as PDIAG- should have been released */ |
2469 | if (ap->ops->cable_detect) | |
2470 | ap->cbl = ap->ops->cable_detect(ap); | |
2471 | ||
614fe29b AC |
2472 | /* We may have SATA bridge glue hiding here irrespective of the |
2473 | reported cable types and sensed types */ | |
2474 | ata_link_for_each_dev(dev, &ap->link) { | |
2475 | if (!ata_dev_enabled(dev)) | |
2476 | continue; | |
2477 | /* SATA drives indicate we have a bridge. We don't know which | |
2478 | end of the link the bridge is which is a problem */ | |
2479 | if (ata_id_is_sata(dev->id)) | |
2480 | ap->cbl = ATA_CBL_SATA; | |
2481 | } | |
2482 | ||
f31f0cc2 JG |
2483 | /* After the identify sequence we can now set up the devices. We do |
2484 | this in the normal order so that the user doesn't get confused */ | |
2485 | ||
f58229f8 | 2486 | ata_link_for_each_dev(dev, &ap->link) { |
f31f0cc2 JG |
2487 | if (!ata_dev_enabled(dev)) |
2488 | continue; | |
14d2bac1 | 2489 | |
9af5c9c9 | 2490 | ap->link.eh_context.i.flags |= ATA_EHI_PRINTINFO; |
efdaedc4 | 2491 | rc = ata_dev_configure(dev); |
9af5c9c9 | 2492 | ap->link.eh_context.i.flags &= ~ATA_EHI_PRINTINFO; |
14d2bac1 TH |
2493 | if (rc) |
2494 | goto fail; | |
1da177e4 LT |
2495 | } |
2496 | ||
e82cbdb9 | 2497 | /* configure transfer mode */ |
0260731f | 2498 | rc = ata_set_mode(&ap->link, &dev); |
4ae72a1e | 2499 | if (rc) |
51713d35 | 2500 | goto fail; |
1da177e4 | 2501 | |
f58229f8 TH |
2502 | ata_link_for_each_dev(dev, &ap->link) |
2503 | if (ata_dev_enabled(dev)) | |
e82cbdb9 | 2504 | return 0; |
1da177e4 | 2505 | |
e82cbdb9 TH |
2506 | /* no device present, disable port */ |
2507 | ata_port_disable(ap); | |
96072e69 | 2508 | return -ENODEV; |
14d2bac1 TH |
2509 | |
2510 | fail: | |
4ae72a1e TH |
2511 | tries[dev->devno]--; |
2512 | ||
14d2bac1 TH |
2513 | switch (rc) { |
2514 | case -EINVAL: | |
4ae72a1e | 2515 | /* eeek, something went very wrong, give up */ |
14d2bac1 TH |
2516 | tries[dev->devno] = 0; |
2517 | break; | |
4ae72a1e TH |
2518 | |
2519 | case -ENODEV: | |
2520 | /* give it just one more chance */ | |
2521 | tries[dev->devno] = min(tries[dev->devno], 1); | |
14d2bac1 | 2522 | case -EIO: |
4ae72a1e TH |
2523 | if (tries[dev->devno] == 1) { |
2524 | /* This is the last chance, better to slow | |
2525 | * down than lose it. | |
2526 | */ | |
936fd732 | 2527 | sata_down_spd_limit(&ap->link); |
4ae72a1e TH |
2528 | ata_down_xfermask_limit(dev, ATA_DNXFER_PIO); |
2529 | } | |
14d2bac1 TH |
2530 | } |
2531 | ||
4ae72a1e | 2532 | if (!tries[dev->devno]) |
3373efd8 | 2533 | ata_dev_disable(dev); |
ec573755 | 2534 | |
14d2bac1 | 2535 | goto retry; |
1da177e4 LT |
2536 | } |
2537 | ||
2538 | /** | |
0cba632b JG |
2539 | * ata_port_probe - Mark port as enabled |
2540 | * @ap: Port for which we indicate enablement | |
1da177e4 | 2541 | * |
0cba632b JG |
2542 | * Modify @ap data structure such that the system |
2543 | * thinks that the entire port is enabled. | |
2544 | * | |
cca3974e | 2545 | * LOCKING: host lock, or some other form of |
0cba632b | 2546 | * serialization. |
1da177e4 LT |
2547 | */ |
2548 | ||
2549 | void ata_port_probe(struct ata_port *ap) | |
2550 | { | |
198e0fed | 2551 | ap->flags &= ~ATA_FLAG_DISABLED; |
1da177e4 LT |
2552 | } |
2553 | ||
3be680b7 TH |
2554 | /** |
2555 | * sata_print_link_status - Print SATA link status | |
936fd732 | 2556 | * @link: SATA link to printk link status about |
3be680b7 TH |
2557 | * |
2558 | * This function prints link speed and status of a SATA link. | |
2559 | * | |
2560 | * LOCKING: | |
2561 | * None. | |
2562 | */ | |
936fd732 | 2563 | void sata_print_link_status(struct ata_link *link) |
3be680b7 | 2564 | { |
6d5f9732 | 2565 | u32 sstatus, scontrol, tmp; |
3be680b7 | 2566 | |
936fd732 | 2567 | if (sata_scr_read(link, SCR_STATUS, &sstatus)) |
3be680b7 | 2568 | return; |
936fd732 | 2569 | sata_scr_read(link, SCR_CONTROL, &scontrol); |
3be680b7 | 2570 | |
936fd732 | 2571 | if (ata_link_online(link)) { |
3be680b7 | 2572 | tmp = (sstatus >> 4) & 0xf; |
936fd732 | 2573 | ata_link_printk(link, KERN_INFO, |
f15a1daf TH |
2574 | "SATA link up %s (SStatus %X SControl %X)\n", |
2575 | sata_spd_string(tmp), sstatus, scontrol); | |
3be680b7 | 2576 | } else { |
936fd732 | 2577 | ata_link_printk(link, KERN_INFO, |
f15a1daf TH |
2578 | "SATA link down (SStatus %X SControl %X)\n", |
2579 | sstatus, scontrol); | |
3be680b7 TH |
2580 | } |
2581 | } | |
2582 | ||
1da177e4 | 2583 | /** |
780a87f7 JG |
2584 | * __sata_phy_reset - Wake/reset a low-level SATA PHY |
2585 | * @ap: SATA port associated with target SATA PHY. | |
1da177e4 | 2586 | * |
780a87f7 JG |
2587 | * This function issues commands to standard SATA Sxxx |
2588 | * PHY registers, to wake up the phy (and device), and | |
2589 | * clear any reset condition. | |
1da177e4 LT |
2590 | * |
2591 | * LOCKING: | |
0cba632b | 2592 | * PCI/etc. bus probe sem. |
1da177e4 LT |
2593 | * |
2594 | */ | |
2595 | void __sata_phy_reset(struct ata_port *ap) | |
2596 | { | |
936fd732 | 2597 | struct ata_link *link = &ap->link; |
1da177e4 | 2598 | unsigned long timeout = jiffies + (HZ * 5); |
936fd732 | 2599 | u32 sstatus; |
1da177e4 LT |
2600 | |
2601 | if (ap->flags & ATA_FLAG_SATA_RESET) { | |
cdcca89e | 2602 | /* issue phy wake/reset */ |
936fd732 | 2603 | sata_scr_write_flush(link, SCR_CONTROL, 0x301); |
62ba2841 TH |
2604 | /* Couldn't find anything in SATA I/II specs, but |
2605 | * AHCI-1.1 10.4.2 says at least 1 ms. */ | |
2606 | mdelay(1); | |
1da177e4 | 2607 | } |
81952c54 | 2608 | /* phy wake/clear reset */ |
936fd732 | 2609 | sata_scr_write_flush(link, SCR_CONTROL, 0x300); |
1da177e4 LT |
2610 | |
2611 | /* wait for phy to become ready, if necessary */ | |
2612 | do { | |
2613 | msleep(200); | |
936fd732 | 2614 | sata_scr_read(link, SCR_STATUS, &sstatus); |
1da177e4 LT |
2615 | if ((sstatus & 0xf) != 1) |
2616 | break; | |
2617 | } while (time_before(jiffies, timeout)); | |
2618 | ||
3be680b7 | 2619 | /* print link status */ |
936fd732 | 2620 | sata_print_link_status(link); |
656563e3 | 2621 | |
3be680b7 | 2622 | /* TODO: phy layer with polling, timeouts, etc. */ |
936fd732 | 2623 | if (!ata_link_offline(link)) |
1da177e4 | 2624 | ata_port_probe(ap); |
3be680b7 | 2625 | else |
1da177e4 | 2626 | ata_port_disable(ap); |
1da177e4 | 2627 | |
198e0fed | 2628 | if (ap->flags & ATA_FLAG_DISABLED) |
1da177e4 LT |
2629 | return; |
2630 | ||
2631 | if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) { | |
2632 | ata_port_disable(ap); | |
2633 | return; | |
2634 | } | |
2635 | ||
2636 | ap->cbl = ATA_CBL_SATA; | |
2637 | } | |
2638 | ||
2639 | /** | |
780a87f7 JG |
2640 | * sata_phy_reset - Reset SATA bus. |
2641 | * @ap: SATA port associated with target SATA PHY. | |
1da177e4 | 2642 | * |
780a87f7 JG |
2643 | * This function resets the SATA bus, and then probes |
2644 | * the bus for devices. | |
1da177e4 LT |
2645 | * |
2646 | * LOCKING: | |
0cba632b | 2647 | * PCI/etc. bus probe sem. |
1da177e4 LT |
2648 | * |
2649 | */ | |
2650 | void sata_phy_reset(struct ata_port *ap) | |
2651 | { | |
2652 | __sata_phy_reset(ap); | |
198e0fed | 2653 | if (ap->flags & ATA_FLAG_DISABLED) |
1da177e4 LT |
2654 | return; |
2655 | ata_bus_reset(ap); | |
2656 | } | |
2657 | ||
ebdfca6e AC |
2658 | /** |
2659 | * ata_dev_pair - return other device on cable | |
ebdfca6e AC |
2660 | * @adev: device |
2661 | * | |
2662 | * Obtain the other device on the same cable, or if none is | |
2663 | * present NULL is returned | |
2664 | */ | |
2e9edbf8 | 2665 | |
3373efd8 | 2666 | struct ata_device *ata_dev_pair(struct ata_device *adev) |
ebdfca6e | 2667 | { |
9af5c9c9 TH |
2668 | struct ata_link *link = adev->link; |
2669 | struct ata_device *pair = &link->device[1 - adev->devno]; | |
e1211e3f | 2670 | if (!ata_dev_enabled(pair)) |
ebdfca6e AC |
2671 | return NULL; |
2672 | return pair; | |
2673 | } | |
2674 | ||
1da177e4 | 2675 | /** |
780a87f7 JG |
2676 | * ata_port_disable - Disable port. |
2677 | * @ap: Port to be disabled. | |
1da177e4 | 2678 | * |
780a87f7 JG |
2679 | * Modify @ap data structure such that the system |
2680 | * thinks that the entire port is disabled, and should | |
2681 | * never attempt to probe or communicate with devices | |
2682 | * on this port. | |
2683 | * | |
cca3974e | 2684 | * LOCKING: host lock, or some other form of |
780a87f7 | 2685 | * serialization. |
1da177e4 LT |
2686 | */ |
2687 | ||
2688 | void ata_port_disable(struct ata_port *ap) | |
2689 | { | |
9af5c9c9 TH |
2690 | ap->link.device[0].class = ATA_DEV_NONE; |
2691 | ap->link.device[1].class = ATA_DEV_NONE; | |
198e0fed | 2692 | ap->flags |= ATA_FLAG_DISABLED; |
1da177e4 LT |
2693 | } |
2694 | ||
1c3fae4d | 2695 | /** |
3c567b7d | 2696 | * sata_down_spd_limit - adjust SATA spd limit downward |
936fd732 | 2697 | * @link: Link to adjust SATA spd limit for |
1c3fae4d | 2698 | * |
936fd732 | 2699 | * Adjust SATA spd limit of @link downward. Note that this |
1c3fae4d | 2700 | * function only adjusts the limit. The change must be applied |
3c567b7d | 2701 | * using sata_set_spd(). |
1c3fae4d TH |
2702 | * |
2703 | * LOCKING: | |
2704 | * Inherited from caller. | |
2705 | * | |
2706 | * RETURNS: | |
2707 | * 0 on success, negative errno on failure | |
2708 | */ | |
936fd732 | 2709 | int sata_down_spd_limit(struct ata_link *link) |
1c3fae4d | 2710 | { |
81952c54 TH |
2711 | u32 sstatus, spd, mask; |
2712 | int rc, highbit; | |
1c3fae4d | 2713 | |
936fd732 | 2714 | if (!sata_scr_valid(link)) |
008a7896 TH |
2715 | return -EOPNOTSUPP; |
2716 | ||
2717 | /* If SCR can be read, use it to determine the current SPD. | |
936fd732 | 2718 | * If not, use cached value in link->sata_spd. |
008a7896 | 2719 | */ |
936fd732 | 2720 | rc = sata_scr_read(link, SCR_STATUS, &sstatus); |
008a7896 TH |
2721 | if (rc == 0) |
2722 | spd = (sstatus >> 4) & 0xf; | |
2723 | else | |
936fd732 | 2724 | spd = link->sata_spd; |
1c3fae4d | 2725 | |
936fd732 | 2726 | mask = link->sata_spd_limit; |
1c3fae4d TH |
2727 | if (mask <= 1) |
2728 | return -EINVAL; | |
008a7896 TH |
2729 | |
2730 | /* unconditionally mask off the highest bit */ | |
1c3fae4d TH |
2731 | highbit = fls(mask) - 1; |
2732 | mask &= ~(1 << highbit); | |
2733 | ||
008a7896 TH |
2734 | /* Mask off all speeds higher than or equal to the current |
2735 | * one. Force 1.5Gbps if current SPD is not available. | |
2736 | */ | |
2737 | if (spd > 1) | |
2738 | mask &= (1 << (spd - 1)) - 1; | |
2739 | else | |
2740 | mask &= 1; | |
2741 | ||
2742 | /* were we already at the bottom? */ | |
1c3fae4d TH |
2743 | if (!mask) |
2744 | return -EINVAL; | |
2745 | ||
936fd732 | 2746 | link->sata_spd_limit = mask; |
1c3fae4d | 2747 | |
936fd732 | 2748 | ata_link_printk(link, KERN_WARNING, "limiting SATA link speed to %s\n", |
f15a1daf | 2749 | sata_spd_string(fls(mask))); |
1c3fae4d TH |
2750 | |
2751 | return 0; | |
2752 | } | |
2753 | ||
936fd732 | 2754 | static int __sata_set_spd_needed(struct ata_link *link, u32 *scontrol) |
1c3fae4d | 2755 | { |
5270222f TH |
2756 | struct ata_link *host_link = &link->ap->link; |
2757 | u32 limit, target, spd; | |
1c3fae4d | 2758 | |
5270222f TH |
2759 | limit = link->sata_spd_limit; |
2760 | ||
2761 | /* Don't configure downstream link faster than upstream link. | |
2762 | * It doesn't speed up anything and some PMPs choke on such | |
2763 | * configuration. | |
2764 | */ | |
2765 | if (!ata_is_host_link(link) && host_link->sata_spd) | |
2766 | limit &= (1 << host_link->sata_spd) - 1; | |
2767 | ||
2768 | if (limit == UINT_MAX) | |
2769 | target = 0; | |
1c3fae4d | 2770 | else |
5270222f | 2771 | target = fls(limit); |
1c3fae4d TH |
2772 | |
2773 | spd = (*scontrol >> 4) & 0xf; | |
5270222f | 2774 | *scontrol = (*scontrol & ~0xf0) | ((target & 0xf) << 4); |
1c3fae4d | 2775 | |
5270222f | 2776 | return spd != target; |
1c3fae4d TH |
2777 | } |
2778 | ||
2779 | /** | |
3c567b7d | 2780 | * sata_set_spd_needed - is SATA spd configuration needed |
936fd732 | 2781 | * @link: Link in question |
1c3fae4d TH |
2782 | * |
2783 | * Test whether the spd limit in SControl matches | |
936fd732 | 2784 | * @link->sata_spd_limit. This function is used to determine |
1c3fae4d TH |
2785 | * whether hardreset is necessary to apply SATA spd |
2786 | * configuration. | |
2787 | * | |
2788 | * LOCKING: | |
2789 | * Inherited from caller. | |
2790 | * | |
2791 | * RETURNS: | |
2792 | * 1 if SATA spd configuration is needed, 0 otherwise. | |
2793 | */ | |
936fd732 | 2794 | int sata_set_spd_needed(struct ata_link *link) |
1c3fae4d TH |
2795 | { |
2796 | u32 scontrol; | |
2797 | ||
936fd732 | 2798 | if (sata_scr_read(link, SCR_CONTROL, &scontrol)) |
db64bcf3 | 2799 | return 1; |
1c3fae4d | 2800 | |
936fd732 | 2801 | return __sata_set_spd_needed(link, &scontrol); |
1c3fae4d TH |
2802 | } |
2803 | ||
2804 | /** | |
3c567b7d | 2805 | * sata_set_spd - set SATA spd according to spd limit |
936fd732 | 2806 | * @link: Link to set SATA spd for |
1c3fae4d | 2807 | * |
936fd732 | 2808 | * Set SATA spd of @link according to sata_spd_limit. |
1c3fae4d TH |
2809 | * |
2810 | * LOCKING: | |
2811 | * Inherited from caller. | |
2812 | * | |
2813 | * RETURNS: | |
2814 | * 0 if spd doesn't need to be changed, 1 if spd has been | |
81952c54 | 2815 | * changed. Negative errno if SCR registers are inaccessible. |
1c3fae4d | 2816 | */ |
936fd732 | 2817 | int sata_set_spd(struct ata_link *link) |
1c3fae4d TH |
2818 | { |
2819 | u32 scontrol; | |
81952c54 | 2820 | int rc; |
1c3fae4d | 2821 | |
936fd732 | 2822 | if ((rc = sata_scr_read(link, SCR_CONTROL, &scontrol))) |
81952c54 | 2823 | return rc; |
1c3fae4d | 2824 | |
936fd732 | 2825 | if (!__sata_set_spd_needed(link, &scontrol)) |
1c3fae4d TH |
2826 | return 0; |
2827 | ||
936fd732 | 2828 | if ((rc = sata_scr_write(link, SCR_CONTROL, scontrol))) |
81952c54 TH |
2829 | return rc; |
2830 | ||
1c3fae4d TH |
2831 | return 1; |
2832 | } | |
2833 | ||
452503f9 AC |
2834 | /* |
2835 | * This mode timing computation functionality is ported over from | |
2836 | * drivers/ide/ide-timing.h and was originally written by Vojtech Pavlik | |
2837 | */ | |
2838 | /* | |
b352e57d | 2839 | * PIO 0-4, MWDMA 0-2 and UDMA 0-6 timings (in nanoseconds). |
452503f9 | 2840 | * These were taken from ATA/ATAPI-6 standard, rev 0a, except |
b352e57d AC |
2841 | * for UDMA6, which is currently supported only by Maxtor drives. |
2842 | * | |
2843 | * For PIO 5/6 MWDMA 3/4 see the CFA specification 3.0. | |
452503f9 AC |
2844 | */ |
2845 | ||
2846 | static const struct ata_timing ata_timing[] = { | |
2847 | ||
2848 | { XFER_UDMA_6, 0, 0, 0, 0, 0, 0, 0, 15 }, | |
2849 | { XFER_UDMA_5, 0, 0, 0, 0, 0, 0, 0, 20 }, | |
2850 | { XFER_UDMA_4, 0, 0, 0, 0, 0, 0, 0, 30 }, | |
2851 | { XFER_UDMA_3, 0, 0, 0, 0, 0, 0, 0, 45 }, | |
2852 | ||
b352e57d AC |
2853 | { XFER_MW_DMA_4, 25, 0, 0, 0, 55, 20, 80, 0 }, |
2854 | { XFER_MW_DMA_3, 25, 0, 0, 0, 65, 25, 100, 0 }, | |
452503f9 AC |
2855 | { XFER_UDMA_2, 0, 0, 0, 0, 0, 0, 0, 60 }, |
2856 | { XFER_UDMA_1, 0, 0, 0, 0, 0, 0, 0, 80 }, | |
2857 | { XFER_UDMA_0, 0, 0, 0, 0, 0, 0, 0, 120 }, | |
2858 | ||
2859 | /* { XFER_UDMA_SLOW, 0, 0, 0, 0, 0, 0, 0, 150 }, */ | |
2e9edbf8 | 2860 | |
452503f9 AC |
2861 | { XFER_MW_DMA_2, 25, 0, 0, 0, 70, 25, 120, 0 }, |
2862 | { XFER_MW_DMA_1, 45, 0, 0, 0, 80, 50, 150, 0 }, | |
2863 | { XFER_MW_DMA_0, 60, 0, 0, 0, 215, 215, 480, 0 }, | |
2e9edbf8 | 2864 | |
452503f9 AC |
2865 | { XFER_SW_DMA_2, 60, 0, 0, 0, 120, 120, 240, 0 }, |
2866 | { XFER_SW_DMA_1, 90, 0, 0, 0, 240, 240, 480, 0 }, | |
2867 | { XFER_SW_DMA_0, 120, 0, 0, 0, 480, 480, 960, 0 }, | |
2868 | ||
b352e57d AC |
2869 | { XFER_PIO_6, 10, 55, 20, 80, 55, 20, 80, 0 }, |
2870 | { XFER_PIO_5, 15, 65, 25, 100, 65, 25, 100, 0 }, | |
452503f9 AC |
2871 | { XFER_PIO_4, 25, 70, 25, 120, 70, 25, 120, 0 }, |
2872 | { XFER_PIO_3, 30, 80, 70, 180, 80, 70, 180, 0 }, | |
2873 | ||
2874 | { XFER_PIO_2, 30, 290, 40, 330, 100, 90, 240, 0 }, | |
2875 | { XFER_PIO_1, 50, 290, 93, 383, 125, 100, 383, 0 }, | |
2876 | { XFER_PIO_0, 70, 290, 240, 600, 165, 150, 600, 0 }, | |
2877 | ||
2878 | /* { XFER_PIO_SLOW, 120, 290, 240, 960, 290, 240, 960, 0 }, */ | |
2879 | ||
2880 | { 0xFF } | |
2881 | }; | |
2882 | ||
2dcb407e JG |
2883 | #define ENOUGH(v, unit) (((v)-1)/(unit)+1) |
2884 | #define EZ(v, unit) ((v)?ENOUGH(v, unit):0) | |
452503f9 AC |
2885 | |
2886 | static void ata_timing_quantize(const struct ata_timing *t, struct ata_timing *q, int T, int UT) | |
2887 | { | |
2888 | q->setup = EZ(t->setup * 1000, T); | |
2889 | q->act8b = EZ(t->act8b * 1000, T); | |
2890 | q->rec8b = EZ(t->rec8b * 1000, T); | |
2891 | q->cyc8b = EZ(t->cyc8b * 1000, T); | |
2892 | q->active = EZ(t->active * 1000, T); | |
2893 | q->recover = EZ(t->recover * 1000, T); | |
2894 | q->cycle = EZ(t->cycle * 1000, T); | |
2895 | q->udma = EZ(t->udma * 1000, UT); | |
2896 | } | |
2897 | ||
2898 | void ata_timing_merge(const struct ata_timing *a, const struct ata_timing *b, | |
2899 | struct ata_timing *m, unsigned int what) | |
2900 | { | |
2901 | if (what & ATA_TIMING_SETUP ) m->setup = max(a->setup, b->setup); | |
2902 | if (what & ATA_TIMING_ACT8B ) m->act8b = max(a->act8b, b->act8b); | |
2903 | if (what & ATA_TIMING_REC8B ) m->rec8b = max(a->rec8b, b->rec8b); | |
2904 | if (what & ATA_TIMING_CYC8B ) m->cyc8b = max(a->cyc8b, b->cyc8b); | |
2905 | if (what & ATA_TIMING_ACTIVE ) m->active = max(a->active, b->active); | |
2906 | if (what & ATA_TIMING_RECOVER) m->recover = max(a->recover, b->recover); | |
2907 | if (what & ATA_TIMING_CYCLE ) m->cycle = max(a->cycle, b->cycle); | |
2908 | if (what & ATA_TIMING_UDMA ) m->udma = max(a->udma, b->udma); | |
2909 | } | |
2910 | ||
2dcb407e | 2911 | static const struct ata_timing *ata_timing_find_mode(unsigned short speed) |
452503f9 AC |
2912 | { |
2913 | const struct ata_timing *t; | |
2914 | ||
2915 | for (t = ata_timing; t->mode != speed; t++) | |
91190758 | 2916 | if (t->mode == 0xFF) |
452503f9 | 2917 | return NULL; |
2e9edbf8 | 2918 | return t; |
452503f9 AC |
2919 | } |
2920 | ||
2921 | int ata_timing_compute(struct ata_device *adev, unsigned short speed, | |
2922 | struct ata_timing *t, int T, int UT) | |
2923 | { | |
2924 | const struct ata_timing *s; | |
2925 | struct ata_timing p; | |
2926 | ||
2927 | /* | |
2e9edbf8 | 2928 | * Find the mode. |
75b1f2f8 | 2929 | */ |
452503f9 AC |
2930 | |
2931 | if (!(s = ata_timing_find_mode(speed))) | |
2932 | return -EINVAL; | |
2933 | ||
75b1f2f8 AL |
2934 | memcpy(t, s, sizeof(*s)); |
2935 | ||
452503f9 AC |
2936 | /* |
2937 | * If the drive is an EIDE drive, it can tell us it needs extended | |
2938 | * PIO/MW_DMA cycle timing. | |
2939 | */ | |
2940 | ||
2941 | if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE drive */ | |
2942 | memset(&p, 0, sizeof(p)); | |
2dcb407e | 2943 | if (speed >= XFER_PIO_0 && speed <= XFER_SW_DMA_0) { |
452503f9 AC |
2944 | if (speed <= XFER_PIO_2) p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO]; |
2945 | else p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO_IORDY]; | |
2dcb407e | 2946 | } else if (speed >= XFER_MW_DMA_0 && speed <= XFER_MW_DMA_2) { |
452503f9 AC |
2947 | p.cycle = adev->id[ATA_ID_EIDE_DMA_MIN]; |
2948 | } | |
2949 | ata_timing_merge(&p, t, t, ATA_TIMING_CYCLE | ATA_TIMING_CYC8B); | |
2950 | } | |
2951 | ||
2952 | /* | |
2953 | * Convert the timing to bus clock counts. | |
2954 | */ | |
2955 | ||
75b1f2f8 | 2956 | ata_timing_quantize(t, t, T, UT); |
452503f9 AC |
2957 | |
2958 | /* | |
c893a3ae RD |
2959 | * Even in DMA/UDMA modes we still use PIO access for IDENTIFY, |
2960 | * S.M.A.R.T * and some other commands. We have to ensure that the | |
2961 | * DMA cycle timing is slower/equal than the fastest PIO timing. | |
452503f9 AC |
2962 | */ |
2963 | ||
fd3367af | 2964 | if (speed > XFER_PIO_6) { |
452503f9 AC |
2965 | ata_timing_compute(adev, adev->pio_mode, &p, T, UT); |
2966 | ata_timing_merge(&p, t, t, ATA_TIMING_ALL); | |
2967 | } | |
2968 | ||
2969 | /* | |
c893a3ae | 2970 | * Lengthen active & recovery time so that cycle time is correct. |
452503f9 AC |
2971 | */ |
2972 | ||
2973 | if (t->act8b + t->rec8b < t->cyc8b) { | |
2974 | t->act8b += (t->cyc8b - (t->act8b + t->rec8b)) / 2; | |
2975 | t->rec8b = t->cyc8b - t->act8b; | |
2976 | } | |
2977 | ||
2978 | if (t->active + t->recover < t->cycle) { | |
2979 | t->active += (t->cycle - (t->active + t->recover)) / 2; | |
2980 | t->recover = t->cycle - t->active; | |
2981 | } | |
a617c09f | 2982 | |
4f701d1e AC |
2983 | /* In a few cases quantisation may produce enough errors to |
2984 | leave t->cycle too low for the sum of active and recovery | |
2985 | if so we must correct this */ | |
2986 | if (t->active + t->recover > t->cycle) | |
2987 | t->cycle = t->active + t->recover; | |
452503f9 AC |
2988 | |
2989 | return 0; | |
2990 | } | |
2991 | ||
cf176e1a TH |
2992 | /** |
2993 | * ata_down_xfermask_limit - adjust dev xfer masks downward | |
cf176e1a | 2994 | * @dev: Device to adjust xfer masks |
458337db | 2995 | * @sel: ATA_DNXFER_* selector |
cf176e1a TH |
2996 | * |
2997 | * Adjust xfer masks of @dev downward. Note that this function | |
2998 | * does not apply the change. Invoking ata_set_mode() afterwards | |
2999 | * will apply the limit. | |
3000 | * | |
3001 | * LOCKING: | |
3002 | * Inherited from caller. | |
3003 | * | |
3004 | * RETURNS: | |
3005 | * 0 on success, negative errno on failure | |
3006 | */ | |
458337db | 3007 | int ata_down_xfermask_limit(struct ata_device *dev, unsigned int sel) |
cf176e1a | 3008 | { |
458337db TH |
3009 | char buf[32]; |
3010 | unsigned int orig_mask, xfer_mask; | |
3011 | unsigned int pio_mask, mwdma_mask, udma_mask; | |
3012 | int quiet, highbit; | |
cf176e1a | 3013 | |
458337db TH |
3014 | quiet = !!(sel & ATA_DNXFER_QUIET); |
3015 | sel &= ~ATA_DNXFER_QUIET; | |
cf176e1a | 3016 | |
458337db TH |
3017 | xfer_mask = orig_mask = ata_pack_xfermask(dev->pio_mask, |
3018 | dev->mwdma_mask, | |
3019 | dev->udma_mask); | |
3020 | ata_unpack_xfermask(xfer_mask, &pio_mask, &mwdma_mask, &udma_mask); | |
cf176e1a | 3021 | |
458337db TH |
3022 | switch (sel) { |
3023 | case ATA_DNXFER_PIO: | |
3024 | highbit = fls(pio_mask) - 1; | |
3025 | pio_mask &= ~(1 << highbit); | |
3026 | break; | |
3027 | ||
3028 | case ATA_DNXFER_DMA: | |
3029 | if (udma_mask) { | |
3030 | highbit = fls(udma_mask) - 1; | |
3031 | udma_mask &= ~(1 << highbit); | |
3032 | if (!udma_mask) | |
3033 | return -ENOENT; | |
3034 | } else if (mwdma_mask) { | |
3035 | highbit = fls(mwdma_mask) - 1; | |
3036 | mwdma_mask &= ~(1 << highbit); | |
3037 | if (!mwdma_mask) | |
3038 | return -ENOENT; | |
3039 | } | |
3040 | break; | |
3041 | ||
3042 | case ATA_DNXFER_40C: | |
3043 | udma_mask &= ATA_UDMA_MASK_40C; | |
3044 | break; | |
3045 | ||
3046 | case ATA_DNXFER_FORCE_PIO0: | |
3047 | pio_mask &= 1; | |
3048 | case ATA_DNXFER_FORCE_PIO: | |
3049 | mwdma_mask = 0; | |
3050 | udma_mask = 0; | |
3051 | break; | |
3052 | ||
458337db TH |
3053 | default: |
3054 | BUG(); | |
3055 | } | |
3056 | ||
3057 | xfer_mask &= ata_pack_xfermask(pio_mask, mwdma_mask, udma_mask); | |
3058 | ||
3059 | if (!(xfer_mask & ATA_MASK_PIO) || xfer_mask == orig_mask) | |
3060 | return -ENOENT; | |
3061 | ||
3062 | if (!quiet) { | |
3063 | if (xfer_mask & (ATA_MASK_MWDMA | ATA_MASK_UDMA)) | |
3064 | snprintf(buf, sizeof(buf), "%s:%s", | |
3065 | ata_mode_string(xfer_mask), | |
3066 | ata_mode_string(xfer_mask & ATA_MASK_PIO)); | |
3067 | else | |
3068 | snprintf(buf, sizeof(buf), "%s", | |
3069 | ata_mode_string(xfer_mask)); | |
3070 | ||
3071 | ata_dev_printk(dev, KERN_WARNING, | |
3072 | "limiting speed to %s\n", buf); | |
3073 | } | |
cf176e1a TH |
3074 | |
3075 | ata_unpack_xfermask(xfer_mask, &dev->pio_mask, &dev->mwdma_mask, | |
3076 | &dev->udma_mask); | |
3077 | ||
cf176e1a | 3078 | return 0; |
cf176e1a TH |
3079 | } |
3080 | ||
3373efd8 | 3081 | static int ata_dev_set_mode(struct ata_device *dev) |
1da177e4 | 3082 | { |
9af5c9c9 | 3083 | struct ata_eh_context *ehc = &dev->link->eh_context; |
83206a29 TH |
3084 | unsigned int err_mask; |
3085 | int rc; | |
1da177e4 | 3086 | |
e8384607 | 3087 | dev->flags &= ~ATA_DFLAG_PIO; |
1da177e4 LT |
3088 | if (dev->xfer_shift == ATA_SHIFT_PIO) |
3089 | dev->flags |= ATA_DFLAG_PIO; | |
3090 | ||
3373efd8 | 3091 | err_mask = ata_dev_set_xfermode(dev); |
2dcb407e | 3092 | |
11750a40 AC |
3093 | /* Old CFA may refuse this command, which is just fine */ |
3094 | if (dev->xfer_shift == ATA_SHIFT_PIO && ata_id_is_cfa(dev->id)) | |
2dcb407e JG |
3095 | err_mask &= ~AC_ERR_DEV; |
3096 | ||
0bc2a79a AC |
3097 | /* Some very old devices and some bad newer ones fail any kind of |
3098 | SET_XFERMODE request but support PIO0-2 timings and no IORDY */ | |
3099 | if (dev->xfer_shift == ATA_SHIFT_PIO && !ata_id_has_iordy(dev->id) && | |
3100 | dev->pio_mode <= XFER_PIO_2) | |
3101 | err_mask &= ~AC_ERR_DEV; | |
2dcb407e | 3102 | |
3acaf94b AC |
3103 | /* Early MWDMA devices do DMA but don't allow DMA mode setting. |
3104 | Don't fail an MWDMA0 set IFF the device indicates it is in MWDMA0 */ | |
3105 | if (dev->xfer_shift == ATA_SHIFT_MWDMA && | |
3106 | dev->dma_mode == XFER_MW_DMA_0 && | |
3107 | (dev->id[63] >> 8) & 1) | |
3108 | err_mask &= ~AC_ERR_DEV; | |
3109 | ||
83206a29 | 3110 | if (err_mask) { |
f15a1daf TH |
3111 | ata_dev_printk(dev, KERN_ERR, "failed to set xfermode " |
3112 | "(err_mask=0x%x)\n", err_mask); | |
83206a29 TH |
3113 | return -EIO; |
3114 | } | |
1da177e4 | 3115 | |
baa1e78a | 3116 | ehc->i.flags |= ATA_EHI_POST_SETMODE; |
422c9daa | 3117 | rc = ata_dev_revalidate(dev, ATA_DEV_UNKNOWN, 0); |
baa1e78a | 3118 | ehc->i.flags &= ~ATA_EHI_POST_SETMODE; |
5eb45c02 | 3119 | if (rc) |
83206a29 | 3120 | return rc; |
48a8a14f | 3121 | |
23e71c3d TH |
3122 | DPRINTK("xfer_shift=%u, xfer_mode=0x%x\n", |
3123 | dev->xfer_shift, (int)dev->xfer_mode); | |
1da177e4 | 3124 | |
f15a1daf TH |
3125 | ata_dev_printk(dev, KERN_INFO, "configured for %s\n", |
3126 | ata_mode_string(ata_xfer_mode2mask(dev->xfer_mode))); | |
83206a29 | 3127 | return 0; |
1da177e4 LT |
3128 | } |
3129 | ||
1da177e4 | 3130 | /** |
04351821 | 3131 | * ata_do_set_mode - Program timings and issue SET FEATURES - XFER |
0260731f | 3132 | * @link: link on which timings will be programmed |
e82cbdb9 | 3133 | * @r_failed_dev: out paramter for failed device |
1da177e4 | 3134 | * |
04351821 AC |
3135 | * Standard implementation of the function used to tune and set |
3136 | * ATA device disk transfer mode (PIO3, UDMA6, etc.). If | |
3137 | * ata_dev_set_mode() fails, pointer to the failing device is | |
e82cbdb9 | 3138 | * returned in @r_failed_dev. |
780a87f7 | 3139 | * |
1da177e4 | 3140 | * LOCKING: |
0cba632b | 3141 | * PCI/etc. bus probe sem. |
e82cbdb9 TH |
3142 | * |
3143 | * RETURNS: | |
3144 | * 0 on success, negative errno otherwise | |
1da177e4 | 3145 | */ |
04351821 | 3146 | |
0260731f | 3147 | int ata_do_set_mode(struct ata_link *link, struct ata_device **r_failed_dev) |
1da177e4 | 3148 | { |
0260731f | 3149 | struct ata_port *ap = link->ap; |
e8e0619f | 3150 | struct ata_device *dev; |
f58229f8 | 3151 | int rc = 0, used_dma = 0, found = 0; |
3adcebb2 | 3152 | |
a6d5a51c | 3153 | /* step 1: calculate xfer_mask */ |
f58229f8 | 3154 | ata_link_for_each_dev(dev, link) { |
acf356b1 | 3155 | unsigned int pio_mask, dma_mask; |
b3a70601 | 3156 | unsigned int mode_mask; |
a6d5a51c | 3157 | |
e1211e3f | 3158 | if (!ata_dev_enabled(dev)) |
a6d5a51c TH |
3159 | continue; |
3160 | ||
b3a70601 AC |
3161 | mode_mask = ATA_DMA_MASK_ATA; |
3162 | if (dev->class == ATA_DEV_ATAPI) | |
3163 | mode_mask = ATA_DMA_MASK_ATAPI; | |
3164 | else if (ata_id_is_cfa(dev->id)) | |
3165 | mode_mask = ATA_DMA_MASK_CFA; | |
3166 | ||
3373efd8 | 3167 | ata_dev_xfermask(dev); |
1da177e4 | 3168 | |
acf356b1 TH |
3169 | pio_mask = ata_pack_xfermask(dev->pio_mask, 0, 0); |
3170 | dma_mask = ata_pack_xfermask(0, dev->mwdma_mask, dev->udma_mask); | |
b3a70601 AC |
3171 | |
3172 | if (libata_dma_mask & mode_mask) | |
3173 | dma_mask = ata_pack_xfermask(0, dev->mwdma_mask, dev->udma_mask); | |
3174 | else | |
3175 | dma_mask = 0; | |
3176 | ||
acf356b1 TH |
3177 | dev->pio_mode = ata_xfer_mask2mode(pio_mask); |
3178 | dev->dma_mode = ata_xfer_mask2mode(dma_mask); | |
5444a6f4 | 3179 | |
4f65977d | 3180 | found = 1; |
5444a6f4 AC |
3181 | if (dev->dma_mode) |
3182 | used_dma = 1; | |
a6d5a51c | 3183 | } |
4f65977d | 3184 | if (!found) |
e82cbdb9 | 3185 | goto out; |
a6d5a51c TH |
3186 | |
3187 | /* step 2: always set host PIO timings */ | |
f58229f8 | 3188 | ata_link_for_each_dev(dev, link) { |
e8e0619f TH |
3189 | if (!ata_dev_enabled(dev)) |
3190 | continue; | |
3191 | ||
3192 | if (!dev->pio_mode) { | |
f15a1daf | 3193 | ata_dev_printk(dev, KERN_WARNING, "no PIO support\n"); |
e8e0619f | 3194 | rc = -EINVAL; |
e82cbdb9 | 3195 | goto out; |
e8e0619f TH |
3196 | } |
3197 | ||
3198 | dev->xfer_mode = dev->pio_mode; | |
3199 | dev->xfer_shift = ATA_SHIFT_PIO; | |
3200 | if (ap->ops->set_piomode) | |
3201 | ap->ops->set_piomode(ap, dev); | |
3202 | } | |
1da177e4 | 3203 | |
a6d5a51c | 3204 | /* step 3: set host DMA timings */ |
f58229f8 | 3205 | ata_link_for_each_dev(dev, link) { |
e8e0619f TH |
3206 | if (!ata_dev_enabled(dev) || !dev->dma_mode) |
3207 | continue; | |
3208 | ||
3209 | dev->xfer_mode = dev->dma_mode; | |
3210 | dev->xfer_shift = ata_xfer_mode2shift(dev->dma_mode); | |
3211 | if (ap->ops->set_dmamode) | |
3212 | ap->ops->set_dmamode(ap, dev); | |
3213 | } | |
1da177e4 LT |
3214 | |
3215 | /* step 4: update devices' xfer mode */ | |
f58229f8 | 3216 | ata_link_for_each_dev(dev, link) { |
18d90deb | 3217 | /* don't update suspended devices' xfer mode */ |
9666f400 | 3218 | if (!ata_dev_enabled(dev)) |
83206a29 TH |
3219 | continue; |
3220 | ||
3373efd8 | 3221 | rc = ata_dev_set_mode(dev); |
5bbc53f4 | 3222 | if (rc) |
e82cbdb9 | 3223 | goto out; |
83206a29 | 3224 | } |
1da177e4 | 3225 | |
e8e0619f TH |
3226 | /* Record simplex status. If we selected DMA then the other |
3227 | * host channels are not permitted to do so. | |
5444a6f4 | 3228 | */ |
cca3974e | 3229 | if (used_dma && (ap->host->flags & ATA_HOST_SIMPLEX)) |
032af1ce | 3230 | ap->host->simplex_claimed = ap; |
5444a6f4 | 3231 | |
e82cbdb9 TH |
3232 | out: |
3233 | if (rc) | |
3234 | *r_failed_dev = dev; | |
3235 | return rc; | |
1da177e4 LT |
3236 | } |
3237 | ||
04351821 AC |
3238 | /** |
3239 | * ata_set_mode - Program timings and issue SET FEATURES - XFER | |
0260731f | 3240 | * @link: link on which timings will be programmed |
04351821 AC |
3241 | * @r_failed_dev: out paramter for failed device |
3242 | * | |
3243 | * Set ATA device disk transfer mode (PIO3, UDMA6, etc.). If | |
3244 | * ata_set_mode() fails, pointer to the failing device is | |
3245 | * returned in @r_failed_dev. | |
3246 | * | |
3247 | * LOCKING: | |
3248 | * PCI/etc. bus probe sem. | |
3249 | * | |
3250 | * RETURNS: | |
3251 | * 0 on success, negative errno otherwise | |
3252 | */ | |
0260731f | 3253 | int ata_set_mode(struct ata_link *link, struct ata_device **r_failed_dev) |
04351821 | 3254 | { |
0260731f TH |
3255 | struct ata_port *ap = link->ap; |
3256 | ||
04351821 AC |
3257 | /* has private set_mode? */ |
3258 | if (ap->ops->set_mode) | |
0260731f TH |
3259 | return ap->ops->set_mode(link, r_failed_dev); |
3260 | return ata_do_set_mode(link, r_failed_dev); | |
04351821 AC |
3261 | } |
3262 | ||
1fdffbce JG |
3263 | /** |
3264 | * ata_tf_to_host - issue ATA taskfile to host controller | |
3265 | * @ap: port to which command is being issued | |
3266 | * @tf: ATA taskfile register set | |
3267 | * | |
3268 | * Issues ATA taskfile register set to ATA host controller, | |
3269 | * with proper synchronization with interrupt handler and | |
3270 | * other threads. | |
3271 | * | |
3272 | * LOCKING: | |
cca3974e | 3273 | * spin_lock_irqsave(host lock) |
1fdffbce JG |
3274 | */ |
3275 | ||
3276 | static inline void ata_tf_to_host(struct ata_port *ap, | |
3277 | const struct ata_taskfile *tf) | |
3278 | { | |
3279 | ap->ops->tf_load(ap, tf); | |
3280 | ap->ops->exec_command(ap, tf); | |
3281 | } | |
3282 | ||
1da177e4 LT |
3283 | /** |
3284 | * ata_busy_sleep - sleep until BSY clears, or timeout | |
3285 | * @ap: port containing status register to be polled | |
3286 | * @tmout_pat: impatience timeout | |
3287 | * @tmout: overall timeout | |
3288 | * | |
780a87f7 JG |
3289 | * Sleep until ATA Status register bit BSY clears, |
3290 | * or a timeout occurs. | |
3291 | * | |
d1adc1bb TH |
3292 | * LOCKING: |
3293 | * Kernel thread context (may sleep). | |
3294 | * | |
3295 | * RETURNS: | |
3296 | * 0 on success, -errno otherwise. | |
1da177e4 | 3297 | */ |
d1adc1bb TH |
3298 | int ata_busy_sleep(struct ata_port *ap, |
3299 | unsigned long tmout_pat, unsigned long tmout) | |
1da177e4 LT |
3300 | { |
3301 | unsigned long timer_start, timeout; | |
3302 | u8 status; | |
3303 | ||
3304 | status = ata_busy_wait(ap, ATA_BUSY, 300); | |
3305 | timer_start = jiffies; | |
3306 | timeout = timer_start + tmout_pat; | |
d1adc1bb TH |
3307 | while (status != 0xff && (status & ATA_BUSY) && |
3308 | time_before(jiffies, timeout)) { | |
1da177e4 LT |
3309 | msleep(50); |
3310 | status = ata_busy_wait(ap, ATA_BUSY, 3); | |
3311 | } | |
3312 | ||
d1adc1bb | 3313 | if (status != 0xff && (status & ATA_BUSY)) |
f15a1daf | 3314 | ata_port_printk(ap, KERN_WARNING, |
35aa7a43 JG |
3315 | "port is slow to respond, please be patient " |
3316 | "(Status 0x%x)\n", status); | |
1da177e4 LT |
3317 | |
3318 | timeout = timer_start + tmout; | |
d1adc1bb TH |
3319 | while (status != 0xff && (status & ATA_BUSY) && |
3320 | time_before(jiffies, timeout)) { | |
1da177e4 LT |
3321 | msleep(50); |
3322 | status = ata_chk_status(ap); | |
3323 | } | |
3324 | ||
d1adc1bb TH |
3325 | if (status == 0xff) |
3326 | return -ENODEV; | |
3327 | ||
1da177e4 | 3328 | if (status & ATA_BUSY) { |
f15a1daf | 3329 | ata_port_printk(ap, KERN_ERR, "port failed to respond " |
35aa7a43 JG |
3330 | "(%lu secs, Status 0x%x)\n", |
3331 | tmout / HZ, status); | |
d1adc1bb | 3332 | return -EBUSY; |
1da177e4 LT |
3333 | } |
3334 | ||
3335 | return 0; | |
3336 | } | |
3337 | ||
88ff6eaf TH |
3338 | /** |
3339 | * ata_wait_after_reset - wait before checking status after reset | |
3340 | * @ap: port containing status register to be polled | |
3341 | * @deadline: deadline jiffies for the operation | |
3342 | * | |
3343 | * After reset, we need to pause a while before reading status. | |
3344 | * Also, certain combination of controller and device report 0xff | |
3345 | * for some duration (e.g. until SATA PHY is up and running) | |
3346 | * which is interpreted as empty port in ATA world. This | |
3347 | * function also waits for such devices to get out of 0xff | |
3348 | * status. | |
3349 | * | |
3350 | * LOCKING: | |
3351 | * Kernel thread context (may sleep). | |
3352 | */ | |
3353 | void ata_wait_after_reset(struct ata_port *ap, unsigned long deadline) | |
3354 | { | |
3355 | unsigned long until = jiffies + ATA_TMOUT_FF_WAIT; | |
3356 | ||
3357 | if (time_before(until, deadline)) | |
3358 | deadline = until; | |
3359 | ||
3360 | /* Spec mandates ">= 2ms" before checking status. We wait | |
3361 | * 150ms, because that was the magic delay used for ATAPI | |
3362 | * devices in Hale Landis's ATADRVR, for the period of time | |
3363 | * between when the ATA command register is written, and then | |
3364 | * status is checked. Because waiting for "a while" before | |
3365 | * checking status is fine, post SRST, we perform this magic | |
3366 | * delay here as well. | |
3367 | * | |
3368 | * Old drivers/ide uses the 2mS rule and then waits for ready. | |
3369 | */ | |
3370 | msleep(150); | |
3371 | ||
3372 | /* Wait for 0xff to clear. Some SATA devices take a long time | |
3373 | * to clear 0xff after reset. For example, HHD424020F7SV00 | |
3374 | * iVDR needs >= 800ms while. Quantum GoVault needs even more | |
3375 | * than that. | |
3376 | */ | |
3377 | while (1) { | |
3378 | u8 status = ata_chk_status(ap); | |
3379 | ||
3380 | if (status != 0xff || time_after(jiffies, deadline)) | |
3381 | return; | |
3382 | ||
3383 | msleep(50); | |
3384 | } | |
3385 | } | |
3386 | ||
d4b2bab4 TH |
3387 | /** |
3388 | * ata_wait_ready - sleep until BSY clears, or timeout | |
3389 | * @ap: port containing status register to be polled | |
3390 | * @deadline: deadline jiffies for the operation | |
3391 | * | |
3392 | * Sleep until ATA Status register bit BSY clears, or timeout | |
3393 | * occurs. | |
3394 | * | |
3395 | * LOCKING: | |
3396 | * Kernel thread context (may sleep). | |
3397 | * | |
3398 | * RETURNS: | |
3399 | * 0 on success, -errno otherwise. | |
3400 | */ | |
3401 | int ata_wait_ready(struct ata_port *ap, unsigned long deadline) | |
3402 | { | |
3403 | unsigned long start = jiffies; | |
3404 | int warned = 0; | |
3405 | ||
3406 | while (1) { | |
3407 | u8 status = ata_chk_status(ap); | |
3408 | unsigned long now = jiffies; | |
3409 | ||
3410 | if (!(status & ATA_BUSY)) | |
3411 | return 0; | |
936fd732 | 3412 | if (!ata_link_online(&ap->link) && status == 0xff) |
d4b2bab4 TH |
3413 | return -ENODEV; |
3414 | if (time_after(now, deadline)) | |
3415 | return -EBUSY; | |
3416 | ||
3417 | if (!warned && time_after(now, start + 5 * HZ) && | |
3418 | (deadline - now > 3 * HZ)) { | |
3419 | ata_port_printk(ap, KERN_WARNING, | |
3420 | "port is slow to respond, please be patient " | |
3421 | "(Status 0x%x)\n", status); | |
3422 | warned = 1; | |
3423 | } | |
3424 | ||
3425 | msleep(50); | |
3426 | } | |
3427 | } | |
3428 | ||
3429 | static int ata_bus_post_reset(struct ata_port *ap, unsigned int devmask, | |
3430 | unsigned long deadline) | |
1da177e4 LT |
3431 | { |
3432 | struct ata_ioports *ioaddr = &ap->ioaddr; | |
3433 | unsigned int dev0 = devmask & (1 << 0); | |
3434 | unsigned int dev1 = devmask & (1 << 1); | |
9b89391c | 3435 | int rc, ret = 0; |
1da177e4 LT |
3436 | |
3437 | /* if device 0 was found in ata_devchk, wait for its | |
3438 | * BSY bit to clear | |
3439 | */ | |
d4b2bab4 TH |
3440 | if (dev0) { |
3441 | rc = ata_wait_ready(ap, deadline); | |
9b89391c TH |
3442 | if (rc) { |
3443 | if (rc != -ENODEV) | |
3444 | return rc; | |
3445 | ret = rc; | |
3446 | } | |
d4b2bab4 | 3447 | } |
1da177e4 | 3448 | |
e141d999 TH |
3449 | /* if device 1 was found in ata_devchk, wait for register |
3450 | * access briefly, then wait for BSY to clear. | |
1da177e4 | 3451 | */ |
e141d999 TH |
3452 | if (dev1) { |
3453 | int i; | |
1da177e4 LT |
3454 | |
3455 | ap->ops->dev_select(ap, 1); | |
e141d999 TH |
3456 | |
3457 | /* Wait for register access. Some ATAPI devices fail | |
3458 | * to set nsect/lbal after reset, so don't waste too | |
3459 | * much time on it. We're gonna wait for !BSY anyway. | |
3460 | */ | |
3461 | for (i = 0; i < 2; i++) { | |
3462 | u8 nsect, lbal; | |
3463 | ||
3464 | nsect = ioread8(ioaddr->nsect_addr); | |
3465 | lbal = ioread8(ioaddr->lbal_addr); | |
3466 | if ((nsect == 1) && (lbal == 1)) | |
3467 | break; | |
3468 | msleep(50); /* give drive a breather */ | |
3469 | } | |
3470 | ||
d4b2bab4 | 3471 | rc = ata_wait_ready(ap, deadline); |
9b89391c TH |
3472 | if (rc) { |
3473 | if (rc != -ENODEV) | |
3474 | return rc; | |
3475 | ret = rc; | |
3476 | } | |
d4b2bab4 | 3477 | } |
1da177e4 LT |
3478 | |
3479 | /* is all this really necessary? */ | |
3480 | ap->ops->dev_select(ap, 0); | |
3481 | if (dev1) | |
3482 | ap->ops->dev_select(ap, 1); | |
3483 | if (dev0) | |
3484 | ap->ops->dev_select(ap, 0); | |
d4b2bab4 | 3485 | |
9b89391c | 3486 | return ret; |
1da177e4 LT |
3487 | } |
3488 | ||
d4b2bab4 TH |
3489 | static int ata_bus_softreset(struct ata_port *ap, unsigned int devmask, |
3490 | unsigned long deadline) | |
1da177e4 LT |
3491 | { |
3492 | struct ata_ioports *ioaddr = &ap->ioaddr; | |
3493 | ||
44877b4e | 3494 | DPRINTK("ata%u: bus reset via SRST\n", ap->print_id); |
1da177e4 LT |
3495 | |
3496 | /* software reset. causes dev0 to be selected */ | |
0d5ff566 TH |
3497 | iowrite8(ap->ctl, ioaddr->ctl_addr); |
3498 | udelay(20); /* FIXME: flush */ | |
3499 | iowrite8(ap->ctl | ATA_SRST, ioaddr->ctl_addr); | |
3500 | udelay(20); /* FIXME: flush */ | |
3501 | iowrite8(ap->ctl, ioaddr->ctl_addr); | |
1da177e4 | 3502 | |
88ff6eaf TH |
3503 | /* wait a while before checking status */ |
3504 | ata_wait_after_reset(ap, deadline); | |
1da177e4 | 3505 | |
2e9edbf8 | 3506 | /* Before we perform post reset processing we want to see if |
298a41ca TH |
3507 | * the bus shows 0xFF because the odd clown forgets the D7 |
3508 | * pulldown resistor. | |
3509 | */ | |
150981b0 | 3510 | if (ata_chk_status(ap) == 0xFF) |
9b89391c | 3511 | return -ENODEV; |
09c7ad79 | 3512 | |
d4b2bab4 | 3513 | return ata_bus_post_reset(ap, devmask, deadline); |
1da177e4 LT |
3514 | } |
3515 | ||
3516 | /** | |
3517 | * ata_bus_reset - reset host port and associated ATA channel | |
3518 | * @ap: port to reset | |
3519 | * | |
3520 | * This is typically the first time we actually start issuing | |
3521 | * commands to the ATA channel. We wait for BSY to clear, then | |
3522 | * issue EXECUTE DEVICE DIAGNOSTIC command, polling for its | |
3523 | * result. Determine what devices, if any, are on the channel | |
3524 | * by looking at the device 0/1 error register. Look at the signature | |
3525 | * stored in each device's taskfile registers, to determine if | |
3526 | * the device is ATA or ATAPI. | |
3527 | * | |
3528 | * LOCKING: | |
0cba632b | 3529 | * PCI/etc. bus probe sem. |
cca3974e | 3530 | * Obtains host lock. |
1da177e4 LT |
3531 | * |
3532 | * SIDE EFFECTS: | |
198e0fed | 3533 | * Sets ATA_FLAG_DISABLED if bus reset fails. |
1da177e4 LT |
3534 | */ |
3535 | ||
3536 | void ata_bus_reset(struct ata_port *ap) | |
3537 | { | |
9af5c9c9 | 3538 | struct ata_device *device = ap->link.device; |
1da177e4 LT |
3539 | struct ata_ioports *ioaddr = &ap->ioaddr; |
3540 | unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS; | |
3541 | u8 err; | |
aec5c3c1 | 3542 | unsigned int dev0, dev1 = 0, devmask = 0; |
9b89391c | 3543 | int rc; |
1da177e4 | 3544 | |
44877b4e | 3545 | DPRINTK("ENTER, host %u, port %u\n", ap->print_id, ap->port_no); |
1da177e4 LT |
3546 | |
3547 | /* determine if device 0/1 are present */ | |
3548 | if (ap->flags & ATA_FLAG_SATA_RESET) | |
3549 | dev0 = 1; | |
3550 | else { | |
3551 | dev0 = ata_devchk(ap, 0); | |
3552 | if (slave_possible) | |
3553 | dev1 = ata_devchk(ap, 1); | |
3554 | } | |
3555 | ||
3556 | if (dev0) | |
3557 | devmask |= (1 << 0); | |
3558 | if (dev1) | |
3559 | devmask |= (1 << 1); | |
3560 | ||
3561 | /* select device 0 again */ | |
3562 | ap->ops->dev_select(ap, 0); | |
3563 | ||
3564 | /* issue bus reset */ | |
9b89391c TH |
3565 | if (ap->flags & ATA_FLAG_SRST) { |
3566 | rc = ata_bus_softreset(ap, devmask, jiffies + 40 * HZ); | |
3567 | if (rc && rc != -ENODEV) | |
aec5c3c1 | 3568 | goto err_out; |
9b89391c | 3569 | } |
1da177e4 LT |
3570 | |
3571 | /* | |
3572 | * determine by signature whether we have ATA or ATAPI devices | |
3573 | */ | |
3f19859e | 3574 | device[0].class = ata_dev_try_classify(&device[0], dev0, &err); |
1da177e4 | 3575 | if ((slave_possible) && (err != 0x81)) |
3f19859e | 3576 | device[1].class = ata_dev_try_classify(&device[1], dev1, &err); |
1da177e4 | 3577 | |
1da177e4 | 3578 | /* is double-select really necessary? */ |
9af5c9c9 | 3579 | if (device[1].class != ATA_DEV_NONE) |
1da177e4 | 3580 | ap->ops->dev_select(ap, 1); |
9af5c9c9 | 3581 | if (device[0].class != ATA_DEV_NONE) |
1da177e4 LT |
3582 | ap->ops->dev_select(ap, 0); |
3583 | ||
3584 | /* if no devices were detected, disable this port */ | |
9af5c9c9 TH |
3585 | if ((device[0].class == ATA_DEV_NONE) && |
3586 | (device[1].class == ATA_DEV_NONE)) | |
1da177e4 LT |
3587 | goto err_out; |
3588 | ||
3589 | if (ap->flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST)) { | |
3590 | /* set up device control for ATA_FLAG_SATA_RESET */ | |
0d5ff566 | 3591 | iowrite8(ap->ctl, ioaddr->ctl_addr); |
1da177e4 LT |
3592 | } |
3593 | ||
3594 | DPRINTK("EXIT\n"); | |
3595 | return; | |
3596 | ||
3597 | err_out: | |
f15a1daf | 3598 | ata_port_printk(ap, KERN_ERR, "disabling port\n"); |
ac8869d5 | 3599 | ata_port_disable(ap); |
1da177e4 LT |
3600 | |
3601 | DPRINTK("EXIT\n"); | |
3602 | } | |
3603 | ||
d7bb4cc7 | 3604 | /** |
936fd732 TH |
3605 | * sata_link_debounce - debounce SATA phy status |
3606 | * @link: ATA link to debounce SATA phy status for | |
d7bb4cc7 | 3607 | * @params: timing parameters { interval, duratinon, timeout } in msec |
d4b2bab4 | 3608 | * @deadline: deadline jiffies for the operation |
d7bb4cc7 | 3609 | * |
936fd732 | 3610 | * Make sure SStatus of @link reaches stable state, determined by |
d7bb4cc7 TH |
3611 | * holding the same value where DET is not 1 for @duration polled |
3612 | * every @interval, before @timeout. Timeout constraints the | |
d4b2bab4 TH |
3613 | * beginning of the stable state. Because DET gets stuck at 1 on |
3614 | * some controllers after hot unplugging, this functions waits | |
d7bb4cc7 TH |
3615 | * until timeout then returns 0 if DET is stable at 1. |
3616 | * | |
d4b2bab4 TH |
3617 | * @timeout is further limited by @deadline. The sooner of the |
3618 | * two is used. | |
3619 | * | |
d7bb4cc7 TH |
3620 | * LOCKING: |
3621 | * Kernel thread context (may sleep) | |
3622 | * | |
3623 | * RETURNS: | |
3624 | * 0 on success, -errno on failure. | |
3625 | */ | |
936fd732 TH |
3626 | int sata_link_debounce(struct ata_link *link, const unsigned long *params, |
3627 | unsigned long deadline) | |
7a7921e8 | 3628 | { |
d7bb4cc7 | 3629 | unsigned long interval_msec = params[0]; |
d4b2bab4 TH |
3630 | unsigned long duration = msecs_to_jiffies(params[1]); |
3631 | unsigned long last_jiffies, t; | |
d7bb4cc7 TH |
3632 | u32 last, cur; |
3633 | int rc; | |
3634 | ||
d4b2bab4 TH |
3635 | t = jiffies + msecs_to_jiffies(params[2]); |
3636 | if (time_before(t, deadline)) | |
3637 | deadline = t; | |
3638 | ||
936fd732 | 3639 | if ((rc = sata_scr_read(link, SCR_STATUS, &cur))) |
d7bb4cc7 TH |
3640 | return rc; |
3641 | cur &= 0xf; | |
3642 | ||
3643 | last = cur; | |
3644 | last_jiffies = jiffies; | |
3645 | ||
3646 | while (1) { | |
3647 | msleep(interval_msec); | |
936fd732 | 3648 | if ((rc = sata_scr_read(link, SCR_STATUS, &cur))) |
d7bb4cc7 TH |
3649 | return rc; |
3650 | cur &= 0xf; | |
3651 | ||
3652 | /* DET stable? */ | |
3653 | if (cur == last) { | |
d4b2bab4 | 3654 | if (cur == 1 && time_before(jiffies, deadline)) |
d7bb4cc7 TH |
3655 | continue; |
3656 | if (time_after(jiffies, last_jiffies + duration)) | |
3657 | return 0; | |
3658 | continue; | |
3659 | } | |
3660 | ||
3661 | /* unstable, start over */ | |
3662 | last = cur; | |
3663 | last_jiffies = jiffies; | |
3664 | ||
f1545154 TH |
3665 | /* Check deadline. If debouncing failed, return |
3666 | * -EPIPE to tell upper layer to lower link speed. | |
3667 | */ | |
d4b2bab4 | 3668 | if (time_after(jiffies, deadline)) |
f1545154 | 3669 | return -EPIPE; |
d7bb4cc7 TH |
3670 | } |
3671 | } | |
3672 | ||
3673 | /** | |
936fd732 TH |
3674 | * sata_link_resume - resume SATA link |
3675 | * @link: ATA link to resume SATA | |
d7bb4cc7 | 3676 | * @params: timing parameters { interval, duratinon, timeout } in msec |
d4b2bab4 | 3677 | * @deadline: deadline jiffies for the operation |
d7bb4cc7 | 3678 | * |
936fd732 | 3679 | * Resume SATA phy @link and debounce it. |
d7bb4cc7 TH |
3680 | * |
3681 | * LOCKING: | |
3682 | * Kernel thread context (may sleep) | |
3683 | * | |
3684 | * RETURNS: | |
3685 | * 0 on success, -errno on failure. | |
3686 | */ | |
936fd732 TH |
3687 | int sata_link_resume(struct ata_link *link, const unsigned long *params, |
3688 | unsigned long deadline) | |
d7bb4cc7 TH |
3689 | { |
3690 | u32 scontrol; | |
81952c54 TH |
3691 | int rc; |
3692 | ||
936fd732 | 3693 | if ((rc = sata_scr_read(link, SCR_CONTROL, &scontrol))) |
81952c54 | 3694 | return rc; |
7a7921e8 | 3695 | |
852ee16a | 3696 | scontrol = (scontrol & 0x0f0) | 0x300; |
81952c54 | 3697 | |
936fd732 | 3698 | if ((rc = sata_scr_write(link, SCR_CONTROL, scontrol))) |
81952c54 | 3699 | return rc; |
7a7921e8 | 3700 | |
d7bb4cc7 TH |
3701 | /* Some PHYs react badly if SStatus is pounded immediately |
3702 | * after resuming. Delay 200ms before debouncing. | |
3703 | */ | |
3704 | msleep(200); | |
7a7921e8 | 3705 | |
936fd732 | 3706 | return sata_link_debounce(link, params, deadline); |
7a7921e8 TH |
3707 | } |
3708 | ||
f5914a46 TH |
3709 | /** |
3710 | * ata_std_prereset - prepare for reset | |
cc0680a5 | 3711 | * @link: ATA link to be reset |
d4b2bab4 | 3712 | * @deadline: deadline jiffies for the operation |
f5914a46 | 3713 | * |
cc0680a5 | 3714 | * @link is about to be reset. Initialize it. Failure from |
b8cffc6a TH |
3715 | * prereset makes libata abort whole reset sequence and give up |
3716 | * that port, so prereset should be best-effort. It does its | |
3717 | * best to prepare for reset sequence but if things go wrong, it | |
3718 | * should just whine, not fail. | |
f5914a46 TH |
3719 | * |
3720 | * LOCKING: | |
3721 | * Kernel thread context (may sleep) | |
3722 | * | |
3723 | * RETURNS: | |
3724 | * 0 on success, -errno otherwise. | |
3725 | */ | |
cc0680a5 | 3726 | int ata_std_prereset(struct ata_link *link, unsigned long deadline) |
f5914a46 | 3727 | { |
cc0680a5 | 3728 | struct ata_port *ap = link->ap; |
936fd732 | 3729 | struct ata_eh_context *ehc = &link->eh_context; |
e9c83914 | 3730 | const unsigned long *timing = sata_ehc_deb_timing(ehc); |
f5914a46 TH |
3731 | int rc; |
3732 | ||
31daabda | 3733 | /* handle link resume */ |
28324304 | 3734 | if ((ehc->i.flags & ATA_EHI_RESUME_LINK) && |
0c88758b | 3735 | (link->flags & ATA_LFLAG_HRST_TO_RESUME)) |
28324304 TH |
3736 | ehc->i.action |= ATA_EH_HARDRESET; |
3737 | ||
633273a3 TH |
3738 | /* Some PMPs don't work with only SRST, force hardreset if PMP |
3739 | * is supported. | |
3740 | */ | |
3741 | if (ap->flags & ATA_FLAG_PMP) | |
3742 | ehc->i.action |= ATA_EH_HARDRESET; | |
3743 | ||
f5914a46 TH |
3744 | /* if we're about to do hardreset, nothing more to do */ |
3745 | if (ehc->i.action & ATA_EH_HARDRESET) | |
3746 | return 0; | |
3747 | ||
936fd732 | 3748 | /* if SATA, resume link */ |
a16abc0b | 3749 | if (ap->flags & ATA_FLAG_SATA) { |
936fd732 | 3750 | rc = sata_link_resume(link, timing, deadline); |
b8cffc6a TH |
3751 | /* whine about phy resume failure but proceed */ |
3752 | if (rc && rc != -EOPNOTSUPP) | |
cc0680a5 | 3753 | ata_link_printk(link, KERN_WARNING, "failed to resume " |
f5914a46 | 3754 | "link for reset (errno=%d)\n", rc); |
f5914a46 TH |
3755 | } |
3756 | ||
3757 | /* Wait for !BSY if the controller can wait for the first D2H | |
3758 | * Reg FIS and we don't know that no device is attached. | |
3759 | */ | |
0c88758b | 3760 | if (!(link->flags & ATA_LFLAG_SKIP_D2H_BSY) && !ata_link_offline(link)) { |
b8cffc6a | 3761 | rc = ata_wait_ready(ap, deadline); |
6dffaf61 | 3762 | if (rc && rc != -ENODEV) { |
cc0680a5 | 3763 | ata_link_printk(link, KERN_WARNING, "device not ready " |
b8cffc6a TH |
3764 | "(errno=%d), forcing hardreset\n", rc); |
3765 | ehc->i.action |= ATA_EH_HARDRESET; | |
3766 | } | |
3767 | } | |
f5914a46 TH |
3768 | |
3769 | return 0; | |
3770 | } | |
3771 | ||
c2bd5804 TH |
3772 | /** |
3773 | * ata_std_softreset - reset host port via ATA SRST | |
cc0680a5 | 3774 | * @link: ATA link to reset |
c2bd5804 | 3775 | * @classes: resulting classes of attached devices |
d4b2bab4 | 3776 | * @deadline: deadline jiffies for the operation |
c2bd5804 | 3777 | * |
52783c5d | 3778 | * Reset host port using ATA SRST. |
c2bd5804 TH |
3779 | * |
3780 | * LOCKING: | |
3781 | * Kernel thread context (may sleep) | |
3782 | * | |
3783 | * RETURNS: | |
3784 | * 0 on success, -errno otherwise. | |
3785 | */ | |
cc0680a5 | 3786 | int ata_std_softreset(struct ata_link *link, unsigned int *classes, |
d4b2bab4 | 3787 | unsigned long deadline) |
c2bd5804 | 3788 | { |
cc0680a5 | 3789 | struct ata_port *ap = link->ap; |
c2bd5804 | 3790 | unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS; |
d4b2bab4 TH |
3791 | unsigned int devmask = 0; |
3792 | int rc; | |
c2bd5804 TH |
3793 | u8 err; |
3794 | ||
3795 | DPRINTK("ENTER\n"); | |
3796 | ||
936fd732 | 3797 | if (ata_link_offline(link)) { |
3a39746a TH |
3798 | classes[0] = ATA_DEV_NONE; |
3799 | goto out; | |
3800 | } | |
3801 | ||
c2bd5804 TH |
3802 | /* determine if device 0/1 are present */ |
3803 | if (ata_devchk(ap, 0)) | |
3804 | devmask |= (1 << 0); | |
3805 | if (slave_possible && ata_devchk(ap, 1)) | |
3806 | devmask |= (1 << 1); | |
3807 | ||
c2bd5804 TH |
3808 | /* select device 0 again */ |
3809 | ap->ops->dev_select(ap, 0); | |
3810 | ||
3811 | /* issue bus reset */ | |
3812 | DPRINTK("about to softreset, devmask=%x\n", devmask); | |
d4b2bab4 | 3813 | rc = ata_bus_softreset(ap, devmask, deadline); |
9b89391c | 3814 | /* if link is occupied, -ENODEV too is an error */ |
936fd732 | 3815 | if (rc && (rc != -ENODEV || sata_scr_valid(link))) { |
cc0680a5 | 3816 | ata_link_printk(link, KERN_ERR, "SRST failed (errno=%d)\n", rc); |
d4b2bab4 | 3817 | return rc; |
c2bd5804 TH |
3818 | } |
3819 | ||
3820 | /* determine by signature whether we have ATA or ATAPI devices */ | |
3f19859e TH |
3821 | classes[0] = ata_dev_try_classify(&link->device[0], |
3822 | devmask & (1 << 0), &err); | |
c2bd5804 | 3823 | if (slave_possible && err != 0x81) |
3f19859e TH |
3824 | classes[1] = ata_dev_try_classify(&link->device[1], |
3825 | devmask & (1 << 1), &err); | |
c2bd5804 | 3826 | |
3a39746a | 3827 | out: |
c2bd5804 TH |
3828 | DPRINTK("EXIT, classes[0]=%u [1]=%u\n", classes[0], classes[1]); |
3829 | return 0; | |
3830 | } | |
3831 | ||
3832 | /** | |
cc0680a5 TH |
3833 | * sata_link_hardreset - reset link via SATA phy reset |
3834 | * @link: link to reset | |
b6103f6d | 3835 | * @timing: timing parameters { interval, duratinon, timeout } in msec |
d4b2bab4 | 3836 | * @deadline: deadline jiffies for the operation |
c2bd5804 | 3837 | * |
cc0680a5 | 3838 | * SATA phy-reset @link using DET bits of SControl register. |
c2bd5804 TH |
3839 | * |
3840 | * LOCKING: | |
3841 | * Kernel thread context (may sleep) | |
3842 | * | |
3843 | * RETURNS: | |
3844 | * 0 on success, -errno otherwise. | |
3845 | */ | |
cc0680a5 | 3846 | int sata_link_hardreset(struct ata_link *link, const unsigned long *timing, |
d4b2bab4 | 3847 | unsigned long deadline) |
c2bd5804 | 3848 | { |
852ee16a | 3849 | u32 scontrol; |
81952c54 | 3850 | int rc; |
852ee16a | 3851 | |
c2bd5804 TH |
3852 | DPRINTK("ENTER\n"); |
3853 | ||
936fd732 | 3854 | if (sata_set_spd_needed(link)) { |
1c3fae4d TH |
3855 | /* SATA spec says nothing about how to reconfigure |
3856 | * spd. To be on the safe side, turn off phy during | |
3857 | * reconfiguration. This works for at least ICH7 AHCI | |
3858 | * and Sil3124. | |
3859 | */ | |
936fd732 | 3860 | if ((rc = sata_scr_read(link, SCR_CONTROL, &scontrol))) |
b6103f6d | 3861 | goto out; |
81952c54 | 3862 | |
a34b6fc0 | 3863 | scontrol = (scontrol & 0x0f0) | 0x304; |
81952c54 | 3864 | |
936fd732 | 3865 | if ((rc = sata_scr_write(link, SCR_CONTROL, scontrol))) |
b6103f6d | 3866 | goto out; |
1c3fae4d | 3867 | |
936fd732 | 3868 | sata_set_spd(link); |
1c3fae4d TH |
3869 | } |
3870 | ||
3871 | /* issue phy wake/reset */ | |
936fd732 | 3872 | if ((rc = sata_scr_read(link, SCR_CONTROL, &scontrol))) |
b6103f6d | 3873 | goto out; |
81952c54 | 3874 | |
852ee16a | 3875 | scontrol = (scontrol & 0x0f0) | 0x301; |
81952c54 | 3876 | |
936fd732 | 3877 | if ((rc = sata_scr_write_flush(link, SCR_CONTROL, scontrol))) |
b6103f6d | 3878 | goto out; |
c2bd5804 | 3879 | |
1c3fae4d | 3880 | /* Couldn't find anything in SATA I/II specs, but AHCI-1.1 |
c2bd5804 TH |
3881 | * 10.4.2 says at least 1 ms. |
3882 | */ | |
3883 | msleep(1); | |
3884 | ||
936fd732 TH |
3885 | /* bring link back */ |
3886 | rc = sata_link_resume(link, timing, deadline); | |
b6103f6d TH |
3887 | out: |
3888 | DPRINTK("EXIT, rc=%d\n", rc); | |
3889 | return rc; | |
3890 | } | |
3891 | ||
3892 | /** | |
3893 | * sata_std_hardreset - reset host port via SATA phy reset | |
cc0680a5 | 3894 | * @link: link to reset |
b6103f6d | 3895 | * @class: resulting class of attached device |
d4b2bab4 | 3896 | * @deadline: deadline jiffies for the operation |
b6103f6d TH |
3897 | * |
3898 | * SATA phy-reset host port using DET bits of SControl register, | |
3899 | * wait for !BSY and classify the attached device. | |
3900 | * | |
3901 | * LOCKING: | |
3902 | * Kernel thread context (may sleep) | |
3903 | * | |
3904 | * RETURNS: | |
3905 | * 0 on success, -errno otherwise. | |
3906 | */ | |
cc0680a5 | 3907 | int sata_std_hardreset(struct ata_link *link, unsigned int *class, |
d4b2bab4 | 3908 | unsigned long deadline) |
b6103f6d | 3909 | { |
cc0680a5 | 3910 | struct ata_port *ap = link->ap; |
936fd732 | 3911 | const unsigned long *timing = sata_ehc_deb_timing(&link->eh_context); |
b6103f6d TH |
3912 | int rc; |
3913 | ||
3914 | DPRINTK("ENTER\n"); | |
3915 | ||
3916 | /* do hardreset */ | |
cc0680a5 | 3917 | rc = sata_link_hardreset(link, timing, deadline); |
b6103f6d | 3918 | if (rc) { |
cc0680a5 | 3919 | ata_link_printk(link, KERN_ERR, |
b6103f6d TH |
3920 | "COMRESET failed (errno=%d)\n", rc); |
3921 | return rc; | |
3922 | } | |
c2bd5804 | 3923 | |
c2bd5804 | 3924 | /* TODO: phy layer with polling, timeouts, etc. */ |
936fd732 | 3925 | if (ata_link_offline(link)) { |
c2bd5804 TH |
3926 | *class = ATA_DEV_NONE; |
3927 | DPRINTK("EXIT, link offline\n"); | |
3928 | return 0; | |
3929 | } | |
3930 | ||
88ff6eaf TH |
3931 | /* wait a while before checking status */ |
3932 | ata_wait_after_reset(ap, deadline); | |
34fee227 | 3933 | |
633273a3 TH |
3934 | /* If PMP is supported, we have to do follow-up SRST. Note |
3935 | * that some PMPs don't send D2H Reg FIS after hardreset at | |
3936 | * all if the first port is empty. Wait for it just for a | |
3937 | * second and request follow-up SRST. | |
3938 | */ | |
3939 | if (ap->flags & ATA_FLAG_PMP) { | |
3940 | ata_wait_ready(ap, jiffies + HZ); | |
3941 | return -EAGAIN; | |
3942 | } | |
3943 | ||
d4b2bab4 | 3944 | rc = ata_wait_ready(ap, deadline); |
9b89391c TH |
3945 | /* link occupied, -ENODEV too is an error */ |
3946 | if (rc) { | |
cc0680a5 | 3947 | ata_link_printk(link, KERN_ERR, |
d4b2bab4 TH |
3948 | "COMRESET failed (errno=%d)\n", rc); |
3949 | return rc; | |
c2bd5804 TH |
3950 | } |
3951 | ||
3a39746a TH |
3952 | ap->ops->dev_select(ap, 0); /* probably unnecessary */ |
3953 | ||
3f19859e | 3954 | *class = ata_dev_try_classify(link->device, 1, NULL); |
c2bd5804 TH |
3955 | |
3956 | DPRINTK("EXIT, class=%u\n", *class); | |
3957 | return 0; | |
3958 | } | |
3959 | ||
3960 | /** | |
3961 | * ata_std_postreset - standard postreset callback | |
cc0680a5 | 3962 | * @link: the target ata_link |
c2bd5804 TH |
3963 | * @classes: classes of attached devices |
3964 | * | |
3965 | * This function is invoked after a successful reset. Note that | |
3966 | * the device might have been reset more than once using | |
3967 | * different reset methods before postreset is invoked. | |
c2bd5804 | 3968 | * |
c2bd5804 TH |
3969 | * LOCKING: |
3970 | * Kernel thread context (may sleep) | |
3971 | */ | |
cc0680a5 | 3972 | void ata_std_postreset(struct ata_link *link, unsigned int *classes) |
c2bd5804 | 3973 | { |
cc0680a5 | 3974 | struct ata_port *ap = link->ap; |
dc2b3515 TH |
3975 | u32 serror; |
3976 | ||
c2bd5804 TH |
3977 | DPRINTK("ENTER\n"); |
3978 | ||
c2bd5804 | 3979 | /* print link status */ |
936fd732 | 3980 | sata_print_link_status(link); |
c2bd5804 | 3981 | |
dc2b3515 | 3982 | /* clear SError */ |
936fd732 TH |
3983 | if (sata_scr_read(link, SCR_ERROR, &serror) == 0) |
3984 | sata_scr_write(link, SCR_ERROR, serror); | |
dc2b3515 | 3985 | |
c2bd5804 TH |
3986 | /* is double-select really necessary? */ |
3987 | if (classes[0] != ATA_DEV_NONE) | |
3988 | ap->ops->dev_select(ap, 1); | |
3989 | if (classes[1] != ATA_DEV_NONE) | |
3990 | ap->ops->dev_select(ap, 0); | |
3991 | ||
3a39746a TH |
3992 | /* bail out if no device is present */ |
3993 | if (classes[0] == ATA_DEV_NONE && classes[1] == ATA_DEV_NONE) { | |
3994 | DPRINTK("EXIT, no device\n"); | |
3995 | return; | |
3996 | } | |
3997 | ||
3998 | /* set up device control */ | |
0d5ff566 TH |
3999 | if (ap->ioaddr.ctl_addr) |
4000 | iowrite8(ap->ctl, ap->ioaddr.ctl_addr); | |
c2bd5804 TH |
4001 | |
4002 | DPRINTK("EXIT\n"); | |
4003 | } | |
4004 | ||
623a3128 TH |
4005 | /** |
4006 | * ata_dev_same_device - Determine whether new ID matches configured device | |
623a3128 TH |
4007 | * @dev: device to compare against |
4008 | * @new_class: class of the new device | |
4009 | * @new_id: IDENTIFY page of the new device | |
4010 | * | |
4011 | * Compare @new_class and @new_id against @dev and determine | |
4012 | * whether @dev is the device indicated by @new_class and | |
4013 | * @new_id. | |
4014 | * | |
4015 | * LOCKING: | |
4016 | * None. | |
4017 | * | |
4018 | * RETURNS: | |
4019 | * 1 if @dev matches @new_class and @new_id, 0 otherwise. | |
4020 | */ | |
3373efd8 TH |
4021 | static int ata_dev_same_device(struct ata_device *dev, unsigned int new_class, |
4022 | const u16 *new_id) | |
623a3128 TH |
4023 | { |
4024 | const u16 *old_id = dev->id; | |
a0cf733b TH |
4025 | unsigned char model[2][ATA_ID_PROD_LEN + 1]; |
4026 | unsigned char serial[2][ATA_ID_SERNO_LEN + 1]; | |
623a3128 TH |
4027 | |
4028 | if (dev->class != new_class) { | |
f15a1daf TH |
4029 | ata_dev_printk(dev, KERN_INFO, "class mismatch %d != %d\n", |
4030 | dev->class, new_class); | |
623a3128 TH |
4031 | return 0; |
4032 | } | |
4033 | ||
a0cf733b TH |
4034 | ata_id_c_string(old_id, model[0], ATA_ID_PROD, sizeof(model[0])); |
4035 | ata_id_c_string(new_id, model[1], ATA_ID_PROD, sizeof(model[1])); | |
4036 | ata_id_c_string(old_id, serial[0], ATA_ID_SERNO, sizeof(serial[0])); | |
4037 | ata_id_c_string(new_id, serial[1], ATA_ID_SERNO, sizeof(serial[1])); | |
623a3128 TH |
4038 | |
4039 | if (strcmp(model[0], model[1])) { | |
f15a1daf TH |
4040 | ata_dev_printk(dev, KERN_INFO, "model number mismatch " |
4041 | "'%s' != '%s'\n", model[0], model[1]); | |
623a3128 TH |
4042 | return 0; |
4043 | } | |
4044 | ||
4045 | if (strcmp(serial[0], serial[1])) { | |
f15a1daf TH |
4046 | ata_dev_printk(dev, KERN_INFO, "serial number mismatch " |
4047 | "'%s' != '%s'\n", serial[0], serial[1]); | |
623a3128 TH |
4048 | return 0; |
4049 | } | |
4050 | ||
623a3128 TH |
4051 | return 1; |
4052 | } | |
4053 | ||
4054 | /** | |
fe30911b | 4055 | * ata_dev_reread_id - Re-read IDENTIFY data |
3fae450c | 4056 | * @dev: target ATA device |
bff04647 | 4057 | * @readid_flags: read ID flags |
623a3128 TH |
4058 | * |
4059 | * Re-read IDENTIFY page and make sure @dev is still attached to | |
4060 | * the port. | |
4061 | * | |
4062 | * LOCKING: | |
4063 | * Kernel thread context (may sleep) | |
4064 | * | |
4065 | * RETURNS: | |
4066 | * 0 on success, negative errno otherwise | |
4067 | */ | |
fe30911b | 4068 | int ata_dev_reread_id(struct ata_device *dev, unsigned int readid_flags) |
623a3128 | 4069 | { |
5eb45c02 | 4070 | unsigned int class = dev->class; |
9af5c9c9 | 4071 | u16 *id = (void *)dev->link->ap->sector_buf; |
623a3128 TH |
4072 | int rc; |
4073 | ||
fe635c7e | 4074 | /* read ID data */ |
bff04647 | 4075 | rc = ata_dev_read_id(dev, &class, readid_flags, id); |
623a3128 | 4076 | if (rc) |
fe30911b | 4077 | return rc; |
623a3128 TH |
4078 | |
4079 | /* is the device still there? */ | |
fe30911b TH |
4080 | if (!ata_dev_same_device(dev, class, id)) |
4081 | return -ENODEV; | |
623a3128 | 4082 | |
fe635c7e | 4083 | memcpy(dev->id, id, sizeof(id[0]) * ATA_ID_WORDS); |
fe30911b TH |
4084 | return 0; |
4085 | } | |
4086 | ||
4087 | /** | |
4088 | * ata_dev_revalidate - Revalidate ATA device | |
4089 | * @dev: device to revalidate | |
422c9daa | 4090 | * @new_class: new class code |
fe30911b TH |
4091 | * @readid_flags: read ID flags |
4092 | * | |
4093 | * Re-read IDENTIFY page, make sure @dev is still attached to the | |
4094 | * port and reconfigure it according to the new IDENTIFY page. | |
4095 | * | |
4096 | * LOCKING: | |
4097 | * Kernel thread context (may sleep) | |
4098 | * | |
4099 | * RETURNS: | |
4100 | * 0 on success, negative errno otherwise | |
4101 | */ | |
422c9daa TH |
4102 | int ata_dev_revalidate(struct ata_device *dev, unsigned int new_class, |
4103 | unsigned int readid_flags) | |
fe30911b | 4104 | { |
6ddcd3b0 | 4105 | u64 n_sectors = dev->n_sectors; |
fe30911b TH |
4106 | int rc; |
4107 | ||
4108 | if (!ata_dev_enabled(dev)) | |
4109 | return -ENODEV; | |
4110 | ||
422c9daa TH |
4111 | /* fail early if !ATA && !ATAPI to avoid issuing [P]IDENTIFY to PMP */ |
4112 | if (ata_class_enabled(new_class) && | |
4113 | new_class != ATA_DEV_ATA && new_class != ATA_DEV_ATAPI) { | |
4114 | ata_dev_printk(dev, KERN_INFO, "class mismatch %u != %u\n", | |
4115 | dev->class, new_class); | |
4116 | rc = -ENODEV; | |
4117 | goto fail; | |
4118 | } | |
4119 | ||
fe30911b TH |
4120 | /* re-read ID */ |
4121 | rc = ata_dev_reread_id(dev, readid_flags); | |
4122 | if (rc) | |
4123 | goto fail; | |
623a3128 TH |
4124 | |
4125 | /* configure device according to the new ID */ | |
efdaedc4 | 4126 | rc = ata_dev_configure(dev); |
6ddcd3b0 TH |
4127 | if (rc) |
4128 | goto fail; | |
4129 | ||
4130 | /* verify n_sectors hasn't changed */ | |
b54eebd6 TH |
4131 | if (dev->class == ATA_DEV_ATA && n_sectors && |
4132 | dev->n_sectors != n_sectors) { | |
6ddcd3b0 TH |
4133 | ata_dev_printk(dev, KERN_INFO, "n_sectors mismatch " |
4134 | "%llu != %llu\n", | |
4135 | (unsigned long long)n_sectors, | |
4136 | (unsigned long long)dev->n_sectors); | |
8270bec4 TH |
4137 | |
4138 | /* restore original n_sectors */ | |
4139 | dev->n_sectors = n_sectors; | |
4140 | ||
6ddcd3b0 TH |
4141 | rc = -ENODEV; |
4142 | goto fail; | |
4143 | } | |
4144 | ||
4145 | return 0; | |
623a3128 TH |
4146 | |
4147 | fail: | |
f15a1daf | 4148 | ata_dev_printk(dev, KERN_ERR, "revalidation failed (errno=%d)\n", rc); |
623a3128 TH |
4149 | return rc; |
4150 | } | |
4151 | ||
6919a0a6 AC |
4152 | struct ata_blacklist_entry { |
4153 | const char *model_num; | |
4154 | const char *model_rev; | |
4155 | unsigned long horkage; | |
4156 | }; | |
4157 | ||
4158 | static const struct ata_blacklist_entry ata_device_blacklist [] = { | |
4159 | /* Devices with DMA related problems under Linux */ | |
4160 | { "WDC AC11000H", NULL, ATA_HORKAGE_NODMA }, | |
4161 | { "WDC AC22100H", NULL, ATA_HORKAGE_NODMA }, | |
4162 | { "WDC AC32500H", NULL, ATA_HORKAGE_NODMA }, | |
4163 | { "WDC AC33100H", NULL, ATA_HORKAGE_NODMA }, | |
4164 | { "WDC AC31600H", NULL, ATA_HORKAGE_NODMA }, | |
4165 | { "WDC AC32100H", "24.09P07", ATA_HORKAGE_NODMA }, | |
4166 | { "WDC AC23200L", "21.10N21", ATA_HORKAGE_NODMA }, | |
4167 | { "Compaq CRD-8241B", NULL, ATA_HORKAGE_NODMA }, | |
4168 | { "CRD-8400B", NULL, ATA_HORKAGE_NODMA }, | |
4169 | { "CRD-8480B", NULL, ATA_HORKAGE_NODMA }, | |
4170 | { "CRD-8482B", NULL, ATA_HORKAGE_NODMA }, | |
4171 | { "CRD-84", NULL, ATA_HORKAGE_NODMA }, | |
4172 | { "SanDisk SDP3B", NULL, ATA_HORKAGE_NODMA }, | |
4173 | { "SanDisk SDP3B-64", NULL, ATA_HORKAGE_NODMA }, | |
4174 | { "SANYO CD-ROM CRD", NULL, ATA_HORKAGE_NODMA }, | |
4175 | { "HITACHI CDR-8", NULL, ATA_HORKAGE_NODMA }, | |
4176 | { "HITACHI CDR-8335", NULL, ATA_HORKAGE_NODMA }, | |
4177 | { "HITACHI CDR-8435", NULL, ATA_HORKAGE_NODMA }, | |
4178 | { "Toshiba CD-ROM XM-6202B", NULL, ATA_HORKAGE_NODMA }, | |
4179 | { "TOSHIBA CD-ROM XM-1702BC", NULL, ATA_HORKAGE_NODMA }, | |
4180 | { "CD-532E-A", NULL, ATA_HORKAGE_NODMA }, | |
4181 | { "E-IDE CD-ROM CR-840",NULL, ATA_HORKAGE_NODMA }, | |
4182 | { "CD-ROM Drive/F5A", NULL, ATA_HORKAGE_NODMA }, | |
4183 | { "WPI CDD-820", NULL, ATA_HORKAGE_NODMA }, | |
4184 | { "SAMSUNG CD-ROM SC-148C", NULL, ATA_HORKAGE_NODMA }, | |
4185 | { "SAMSUNG CD-ROM SC", NULL, ATA_HORKAGE_NODMA }, | |
6919a0a6 AC |
4186 | { "ATAPI CD-ROM DRIVE 40X MAXIMUM",NULL,ATA_HORKAGE_NODMA }, |
4187 | { "_NEC DV5800A", NULL, ATA_HORKAGE_NODMA }, | |
2dcb407e | 4188 | { "SAMSUNG CD-ROM SN-124", "N001", ATA_HORKAGE_NODMA }, |
39f19886 | 4189 | { "Seagate STT20000A", NULL, ATA_HORKAGE_NODMA }, |
3af9a77a TH |
4190 | /* Odd clown on sil3726/4726 PMPs */ |
4191 | { "Config Disk", NULL, ATA_HORKAGE_NODMA | | |
4192 | ATA_HORKAGE_SKIP_PM }, | |
6919a0a6 | 4193 | |
18d6e9d5 | 4194 | /* Weird ATAPI devices */ |
40a1d531 | 4195 | { "TORiSAN DVD-ROM DRD-N216", NULL, ATA_HORKAGE_MAX_SEC_128 }, |
18d6e9d5 | 4196 | |
6919a0a6 AC |
4197 | /* Devices we expect to fail diagnostics */ |
4198 | ||
4199 | /* Devices where NCQ should be avoided */ | |
4200 | /* NCQ is slow */ | |
2dcb407e | 4201 | { "WDC WD740ADFD-00", NULL, ATA_HORKAGE_NONCQ }, |
09125ea6 TH |
4202 | /* http://thread.gmane.org/gmane.linux.ide/14907 */ |
4203 | { "FUJITSU MHT2060BH", NULL, ATA_HORKAGE_NONCQ }, | |
7acfaf30 | 4204 | /* NCQ is broken */ |
539cc7c7 | 4205 | { "Maxtor *", "BANC*", ATA_HORKAGE_NONCQ }, |
0e3dbc01 | 4206 | { "Maxtor 7V300F0", "VA111630", ATA_HORKAGE_NONCQ }, |
0b0a43e0 DM |
4207 | { "HITACHI HDS7250SASUN500G*", NULL, ATA_HORKAGE_NONCQ }, |
4208 | { "HITACHI HDS7225SBSUN250G*", NULL, ATA_HORKAGE_NONCQ }, | |
da6f0ec2 | 4209 | { "ST380817AS", "3.42", ATA_HORKAGE_NONCQ }, |
539cc7c7 | 4210 | |
36e337d0 RH |
4211 | /* Blacklist entries taken from Silicon Image 3124/3132 |
4212 | Windows driver .inf file - also several Linux problem reports */ | |
4213 | { "HTS541060G9SA00", "MB3OC60D", ATA_HORKAGE_NONCQ, }, | |
4214 | { "HTS541080G9SA00", "MB4OC60D", ATA_HORKAGE_NONCQ, }, | |
4215 | { "HTS541010G9SA00", "MBZOC60D", ATA_HORKAGE_NONCQ, }, | |
bd9c5a39 TH |
4216 | /* Drives which do spurious command completion */ |
4217 | { "HTS541680J9SA00", "SB2IC7EP", ATA_HORKAGE_NONCQ, }, | |
2f8fcebb | 4218 | { "HTS541612J9SA00", "SBDIC7JP", ATA_HORKAGE_NONCQ, }, |
70edb185 | 4219 | { "HDT722516DLA380", "V43OA96A", ATA_HORKAGE_NONCQ, }, |
e14cbfa6 | 4220 | { "Hitachi HTS541616J9SA00", "SB4OC70P", ATA_HORKAGE_NONCQ, }, |
0c173174 | 4221 | { "Hitachi HTS542525K9SA00", "BBFOC31P", ATA_HORKAGE_NONCQ, }, |
2f8fcebb | 4222 | { "WDC WD740ADFD-00NLR1", NULL, ATA_HORKAGE_NONCQ, }, |
7f567620 | 4223 | { "WDC WD3200AAJS-00RYA0", "12.01B01", ATA_HORKAGE_NONCQ, }, |
a520f261 | 4224 | { "FUJITSU MHV2080BH", "00840028", ATA_HORKAGE_NONCQ, }, |
7f567620 | 4225 | { "ST9120822AS", "3.CLF", ATA_HORKAGE_NONCQ, }, |
3fb6589c | 4226 | { "ST9160821AS", "3.CLF", ATA_HORKAGE_NONCQ, }, |
954bb005 | 4227 | { "ST9160821AS", "3.ALD", ATA_HORKAGE_NONCQ, }, |
13587960 | 4228 | { "ST9160821AS", "3.CCD", ATA_HORKAGE_NONCQ, }, |
7f567620 TH |
4229 | { "ST3160812AS", "3.ADJ", ATA_HORKAGE_NONCQ, }, |
4230 | { "ST980813AS", "3.ADB", ATA_HORKAGE_NONCQ, }, | |
5d6aca8d | 4231 | { "SAMSUNG HD401LJ", "ZZ100-15", ATA_HORKAGE_NONCQ, }, |
12850ffe | 4232 | { "Maxtor 7V300F0", "VA111900", ATA_HORKAGE_NONCQ, }, |
6919a0a6 | 4233 | |
16c55b03 TH |
4234 | /* devices which puke on READ_NATIVE_MAX */ |
4235 | { "HDS724040KLSA80", "KFAOA20N", ATA_HORKAGE_BROKEN_HPA, }, | |
4236 | { "WDC WD3200JD-00KLB0", "WD-WCAMR1130137", ATA_HORKAGE_BROKEN_HPA }, | |
4237 | { "WDC WD2500JD-00HBB0", "WD-WMAL71490727", ATA_HORKAGE_BROKEN_HPA }, | |
4238 | { "MAXTOR 6L080L4", "A93.0500", ATA_HORKAGE_BROKEN_HPA }, | |
6919a0a6 | 4239 | |
93328e11 AC |
4240 | /* Devices which report 1 sector over size HPA */ |
4241 | { "ST340823A", NULL, ATA_HORKAGE_HPA_SIZE, }, | |
4242 | { "ST320413A", NULL, ATA_HORKAGE_HPA_SIZE, }, | |
4243 | ||
6919a0a6 AC |
4244 | /* End Marker */ |
4245 | { } | |
1da177e4 | 4246 | }; |
2e9edbf8 | 4247 | |
741b7763 | 4248 | static int strn_pattern_cmp(const char *patt, const char *name, int wildchar) |
539cc7c7 JG |
4249 | { |
4250 | const char *p; | |
4251 | int len; | |
4252 | ||
4253 | /* | |
4254 | * check for trailing wildcard: *\0 | |
4255 | */ | |
4256 | p = strchr(patt, wildchar); | |
4257 | if (p && ((*(p + 1)) == 0)) | |
4258 | len = p - patt; | |
317b50b8 | 4259 | else { |
539cc7c7 | 4260 | len = strlen(name); |
317b50b8 AP |
4261 | if (!len) { |
4262 | if (!*patt) | |
4263 | return 0; | |
4264 | return -1; | |
4265 | } | |
4266 | } | |
539cc7c7 JG |
4267 | |
4268 | return strncmp(patt, name, len); | |
4269 | } | |
4270 | ||
75683fe7 | 4271 | static unsigned long ata_dev_blacklisted(const struct ata_device *dev) |
1da177e4 | 4272 | { |
8bfa79fc TH |
4273 | unsigned char model_num[ATA_ID_PROD_LEN + 1]; |
4274 | unsigned char model_rev[ATA_ID_FW_REV_LEN + 1]; | |
6919a0a6 | 4275 | const struct ata_blacklist_entry *ad = ata_device_blacklist; |
3a778275 | 4276 | |
8bfa79fc TH |
4277 | ata_id_c_string(dev->id, model_num, ATA_ID_PROD, sizeof(model_num)); |
4278 | ata_id_c_string(dev->id, model_rev, ATA_ID_FW_REV, sizeof(model_rev)); | |
1da177e4 | 4279 | |
6919a0a6 | 4280 | while (ad->model_num) { |
539cc7c7 | 4281 | if (!strn_pattern_cmp(ad->model_num, model_num, '*')) { |
6919a0a6 AC |
4282 | if (ad->model_rev == NULL) |
4283 | return ad->horkage; | |
539cc7c7 | 4284 | if (!strn_pattern_cmp(ad->model_rev, model_rev, '*')) |
6919a0a6 | 4285 | return ad->horkage; |
f4b15fef | 4286 | } |
6919a0a6 | 4287 | ad++; |
f4b15fef | 4288 | } |
1da177e4 LT |
4289 | return 0; |
4290 | } | |
4291 | ||
6919a0a6 AC |
4292 | static int ata_dma_blacklisted(const struct ata_device *dev) |
4293 | { | |
4294 | /* We don't support polling DMA. | |
4295 | * DMA blacklist those ATAPI devices with CDB-intr (and use PIO) | |
4296 | * if the LLDD handles only interrupts in the HSM_ST_LAST state. | |
4297 | */ | |
9af5c9c9 | 4298 | if ((dev->link->ap->flags & ATA_FLAG_PIO_POLLING) && |
6919a0a6 AC |
4299 | (dev->flags & ATA_DFLAG_CDB_INTR)) |
4300 | return 1; | |
75683fe7 | 4301 | return (dev->horkage & ATA_HORKAGE_NODMA) ? 1 : 0; |
6919a0a6 AC |
4302 | } |
4303 | ||
a6d5a51c TH |
4304 | /** |
4305 | * ata_dev_xfermask - Compute supported xfermask of the given device | |
a6d5a51c TH |
4306 | * @dev: Device to compute xfermask for |
4307 | * | |
acf356b1 TH |
4308 | * Compute supported xfermask of @dev and store it in |
4309 | * dev->*_mask. This function is responsible for applying all | |
4310 | * known limits including host controller limits, device | |
4311 | * blacklist, etc... | |
a6d5a51c TH |
4312 | * |
4313 | * LOCKING: | |
4314 | * None. | |
a6d5a51c | 4315 | */ |
3373efd8 | 4316 | static void ata_dev_xfermask(struct ata_device *dev) |
1da177e4 | 4317 | { |
9af5c9c9 TH |
4318 | struct ata_link *link = dev->link; |
4319 | struct ata_port *ap = link->ap; | |
cca3974e | 4320 | struct ata_host *host = ap->host; |
a6d5a51c | 4321 | unsigned long xfer_mask; |
1da177e4 | 4322 | |
37deecb5 | 4323 | /* controller modes available */ |
565083e1 TH |
4324 | xfer_mask = ata_pack_xfermask(ap->pio_mask, |
4325 | ap->mwdma_mask, ap->udma_mask); | |
4326 | ||
8343f889 | 4327 | /* drive modes available */ |
37deecb5 TH |
4328 | xfer_mask &= ata_pack_xfermask(dev->pio_mask, |
4329 | dev->mwdma_mask, dev->udma_mask); | |
4330 | xfer_mask &= ata_id_xfermask(dev->id); | |
565083e1 | 4331 | |
b352e57d AC |
4332 | /* |
4333 | * CFA Advanced TrueIDE timings are not allowed on a shared | |
4334 | * cable | |
4335 | */ | |
4336 | if (ata_dev_pair(dev)) { | |
4337 | /* No PIO5 or PIO6 */ | |
4338 | xfer_mask &= ~(0x03 << (ATA_SHIFT_PIO + 5)); | |
4339 | /* No MWDMA3 or MWDMA 4 */ | |
4340 | xfer_mask &= ~(0x03 << (ATA_SHIFT_MWDMA + 3)); | |
4341 | } | |
4342 | ||
37deecb5 TH |
4343 | if (ata_dma_blacklisted(dev)) { |
4344 | xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA); | |
f15a1daf TH |
4345 | ata_dev_printk(dev, KERN_WARNING, |
4346 | "device is on DMA blacklist, disabling DMA\n"); | |
37deecb5 | 4347 | } |
a6d5a51c | 4348 | |
14d66ab7 | 4349 | if ((host->flags & ATA_HOST_SIMPLEX) && |
2dcb407e | 4350 | host->simplex_claimed && host->simplex_claimed != ap) { |
37deecb5 TH |
4351 | xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA); |
4352 | ata_dev_printk(dev, KERN_WARNING, "simplex DMA is claimed by " | |
4353 | "other device, disabling DMA\n"); | |
5444a6f4 | 4354 | } |
565083e1 | 4355 | |
e424675f JG |
4356 | if (ap->flags & ATA_FLAG_NO_IORDY) |
4357 | xfer_mask &= ata_pio_mask_no_iordy(dev); | |
4358 | ||
5444a6f4 | 4359 | if (ap->ops->mode_filter) |
a76b62ca | 4360 | xfer_mask = ap->ops->mode_filter(dev, xfer_mask); |
5444a6f4 | 4361 | |
8343f889 RH |
4362 | /* Apply cable rule here. Don't apply it early because when |
4363 | * we handle hot plug the cable type can itself change. | |
4364 | * Check this last so that we know if the transfer rate was | |
4365 | * solely limited by the cable. | |
4366 | * Unknown or 80 wire cables reported host side are checked | |
4367 | * drive side as well. Cases where we know a 40wire cable | |
4368 | * is used safely for 80 are not checked here. | |
4369 | */ | |
4370 | if (xfer_mask & (0xF8 << ATA_SHIFT_UDMA)) | |
4371 | /* UDMA/44 or higher would be available */ | |
2dcb407e JG |
4372 | if ((ap->cbl == ATA_CBL_PATA40) || |
4373 | (ata_drive_40wire(dev->id) && | |
4374 | (ap->cbl == ATA_CBL_PATA_UNK || | |
4375 | ap->cbl == ATA_CBL_PATA80))) { | |
4376 | ata_dev_printk(dev, KERN_WARNING, | |
8343f889 RH |
4377 | "limited to UDMA/33 due to 40-wire cable\n"); |
4378 | xfer_mask &= ~(0xF8 << ATA_SHIFT_UDMA); | |
4379 | } | |
4380 | ||
565083e1 TH |
4381 | ata_unpack_xfermask(xfer_mask, &dev->pio_mask, |
4382 | &dev->mwdma_mask, &dev->udma_mask); | |
1da177e4 LT |
4383 | } |
4384 | ||
1da177e4 LT |
4385 | /** |
4386 | * ata_dev_set_xfermode - Issue SET FEATURES - XFER MODE command | |
1da177e4 LT |
4387 | * @dev: Device to which command will be sent |
4388 | * | |
780a87f7 JG |
4389 | * Issue SET FEATURES - XFER MODE command to device @dev |
4390 | * on port @ap. | |
4391 | * | |
1da177e4 | 4392 | * LOCKING: |
0cba632b | 4393 | * PCI/etc. bus probe sem. |
83206a29 TH |
4394 | * |
4395 | * RETURNS: | |
4396 | * 0 on success, AC_ERR_* mask otherwise. | |
1da177e4 LT |
4397 | */ |
4398 | ||
3373efd8 | 4399 | static unsigned int ata_dev_set_xfermode(struct ata_device *dev) |
1da177e4 | 4400 | { |
a0123703 | 4401 | struct ata_taskfile tf; |
83206a29 | 4402 | unsigned int err_mask; |
1da177e4 LT |
4403 | |
4404 | /* set up set-features taskfile */ | |
4405 | DPRINTK("set features - xfer mode\n"); | |
4406 | ||
464cf177 TH |
4407 | /* Some controllers and ATAPI devices show flaky interrupt |
4408 | * behavior after setting xfer mode. Use polling instead. | |
4409 | */ | |
3373efd8 | 4410 | ata_tf_init(dev, &tf); |
a0123703 TH |
4411 | tf.command = ATA_CMD_SET_FEATURES; |
4412 | tf.feature = SETFEATURES_XFER; | |
464cf177 | 4413 | tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE | ATA_TFLAG_POLLING; |
a0123703 TH |
4414 | tf.protocol = ATA_PROT_NODATA; |
4415 | tf.nsect = dev->xfer_mode; | |
1da177e4 | 4416 | |
2b789108 | 4417 | err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0, 0); |
9f45cbd3 KCA |
4418 | |
4419 | DPRINTK("EXIT, err_mask=%x\n", err_mask); | |
4420 | return err_mask; | |
4421 | } | |
9f45cbd3 | 4422 | /** |
218f3d30 | 4423 | * ata_dev_set_feature - Issue SET FEATURES - SATA FEATURES |
9f45cbd3 KCA |
4424 | * @dev: Device to which command will be sent |
4425 | * @enable: Whether to enable or disable the feature | |
218f3d30 | 4426 | * @feature: The sector count represents the feature to set |
9f45cbd3 KCA |
4427 | * |
4428 | * Issue SET FEATURES - SATA FEATURES command to device @dev | |
218f3d30 | 4429 | * on port @ap with sector count |
9f45cbd3 KCA |
4430 | * |
4431 | * LOCKING: | |
4432 | * PCI/etc. bus probe sem. | |
4433 | * | |
4434 | * RETURNS: | |
4435 | * 0 on success, AC_ERR_* mask otherwise. | |
4436 | */ | |
218f3d30 JG |
4437 | static unsigned int ata_dev_set_feature(struct ata_device *dev, u8 enable, |
4438 | u8 feature) | |
9f45cbd3 KCA |
4439 | { |
4440 | struct ata_taskfile tf; | |
4441 | unsigned int err_mask; | |
4442 | ||
4443 | /* set up set-features taskfile */ | |
4444 | DPRINTK("set features - SATA features\n"); | |
4445 | ||
4446 | ata_tf_init(dev, &tf); | |
4447 | tf.command = ATA_CMD_SET_FEATURES; | |
4448 | tf.feature = enable; | |
4449 | tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE; | |
4450 | tf.protocol = ATA_PROT_NODATA; | |
218f3d30 | 4451 | tf.nsect = feature; |
9f45cbd3 | 4452 | |
2b789108 | 4453 | err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0, 0); |
1da177e4 | 4454 | |
83206a29 TH |
4455 | DPRINTK("EXIT, err_mask=%x\n", err_mask); |
4456 | return err_mask; | |
1da177e4 LT |
4457 | } |
4458 | ||
8bf62ece AL |
4459 | /** |
4460 | * ata_dev_init_params - Issue INIT DEV PARAMS command | |
8bf62ece | 4461 | * @dev: Device to which command will be sent |
e2a7f77a RD |
4462 | * @heads: Number of heads (taskfile parameter) |
4463 | * @sectors: Number of sectors (taskfile parameter) | |
8bf62ece AL |
4464 | * |
4465 | * LOCKING: | |
6aff8f1f TH |
4466 | * Kernel thread context (may sleep) |
4467 | * | |
4468 | * RETURNS: | |
4469 | * 0 on success, AC_ERR_* mask otherwise. | |
8bf62ece | 4470 | */ |
3373efd8 TH |
4471 | static unsigned int ata_dev_init_params(struct ata_device *dev, |
4472 | u16 heads, u16 sectors) | |
8bf62ece | 4473 | { |
a0123703 | 4474 | struct ata_taskfile tf; |
6aff8f1f | 4475 | unsigned int err_mask; |
8bf62ece AL |
4476 | |
4477 | /* Number of sectors per track 1-255. Number of heads 1-16 */ | |
4478 | if (sectors < 1 || sectors > 255 || heads < 1 || heads > 16) | |
00b6f5e9 | 4479 | return AC_ERR_INVALID; |
8bf62ece AL |
4480 | |
4481 | /* set up init dev params taskfile */ | |
4482 | DPRINTK("init dev params \n"); | |
4483 | ||
3373efd8 | 4484 | ata_tf_init(dev, &tf); |
a0123703 TH |
4485 | tf.command = ATA_CMD_INIT_DEV_PARAMS; |
4486 | tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE; | |
4487 | tf.protocol = ATA_PROT_NODATA; | |
4488 | tf.nsect = sectors; | |
4489 | tf.device |= (heads - 1) & 0x0f; /* max head = num. of heads - 1 */ | |
8bf62ece | 4490 | |
2b789108 | 4491 | err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0, 0); |
18b2466c AC |
4492 | /* A clean abort indicates an original or just out of spec drive |
4493 | and we should continue as we issue the setup based on the | |
4494 | drive reported working geometry */ | |
4495 | if (err_mask == AC_ERR_DEV && (tf.feature & ATA_ABORTED)) | |
4496 | err_mask = 0; | |
8bf62ece | 4497 | |
6aff8f1f TH |
4498 | DPRINTK("EXIT, err_mask=%x\n", err_mask); |
4499 | return err_mask; | |
8bf62ece AL |
4500 | } |
4501 | ||
1da177e4 | 4502 | /** |
0cba632b JG |
4503 | * ata_sg_clean - Unmap DMA memory associated with command |
4504 | * @qc: Command containing DMA memory to be released | |
4505 | * | |
4506 | * Unmap all mapped DMA memory associated with this command. | |
1da177e4 LT |
4507 | * |
4508 | * LOCKING: | |
cca3974e | 4509 | * spin_lock_irqsave(host lock) |
1da177e4 | 4510 | */ |
70e6ad0c | 4511 | void ata_sg_clean(struct ata_queued_cmd *qc) |
1da177e4 LT |
4512 | { |
4513 | struct ata_port *ap = qc->ap; | |
cedc9a47 | 4514 | struct scatterlist *sg = qc->__sg; |
1da177e4 | 4515 | int dir = qc->dma_dir; |
cedc9a47 | 4516 | void *pad_buf = NULL; |
1da177e4 | 4517 | |
a4631474 TH |
4518 | WARN_ON(!(qc->flags & ATA_QCFLAG_DMAMAP)); |
4519 | WARN_ON(sg == NULL); | |
1da177e4 LT |
4520 | |
4521 | if (qc->flags & ATA_QCFLAG_SINGLE) | |
f131883e | 4522 | WARN_ON(qc->n_elem > 1); |
1da177e4 | 4523 | |
2c13b7ce | 4524 | VPRINTK("unmapping %u sg elements\n", qc->n_elem); |
1da177e4 | 4525 | |
cedc9a47 JG |
4526 | /* if we padded the buffer out to 32-bit bound, and data |
4527 | * xfer direction is from-device, we must copy from the | |
4528 | * pad buffer back into the supplied buffer | |
4529 | */ | |
4530 | if (qc->pad_len && !(qc->tf.flags & ATA_TFLAG_WRITE)) | |
4531 | pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ); | |
4532 | ||
4533 | if (qc->flags & ATA_QCFLAG_SG) { | |
e1410f2d | 4534 | if (qc->n_elem) |
2f1f610b | 4535 | dma_unmap_sg(ap->dev, sg, qc->n_elem, dir); |
cedc9a47 | 4536 | /* restore last sg */ |
87260216 | 4537 | sg_last(sg, qc->orig_n_elem)->length += qc->pad_len; |
cedc9a47 JG |
4538 | if (pad_buf) { |
4539 | struct scatterlist *psg = &qc->pad_sgent; | |
45711f1a | 4540 | void *addr = kmap_atomic(sg_page(psg), KM_IRQ0); |
cedc9a47 | 4541 | memcpy(addr + psg->offset, pad_buf, qc->pad_len); |
dfa15988 | 4542 | kunmap_atomic(addr, KM_IRQ0); |
cedc9a47 JG |
4543 | } |
4544 | } else { | |
2e242fa9 | 4545 | if (qc->n_elem) |
2f1f610b | 4546 | dma_unmap_single(ap->dev, |
e1410f2d JG |
4547 | sg_dma_address(&sg[0]), sg_dma_len(&sg[0]), |
4548 | dir); | |
cedc9a47 JG |
4549 | /* restore sg */ |
4550 | sg->length += qc->pad_len; | |
4551 | if (pad_buf) | |
4552 | memcpy(qc->buf_virt + sg->length - qc->pad_len, | |
4553 | pad_buf, qc->pad_len); | |
4554 | } | |
1da177e4 LT |
4555 | |
4556 | qc->flags &= ~ATA_QCFLAG_DMAMAP; | |
cedc9a47 | 4557 | qc->__sg = NULL; |
1da177e4 LT |
4558 | } |
4559 | ||
4560 | /** | |
4561 | * ata_fill_sg - Fill PCI IDE PRD table | |
4562 | * @qc: Metadata associated with taskfile to be transferred | |
4563 | * | |
780a87f7 JG |
4564 | * Fill PCI IDE PRD (scatter-gather) table with segments |
4565 | * associated with the current disk command. | |
4566 | * | |
1da177e4 | 4567 | * LOCKING: |
cca3974e | 4568 | * spin_lock_irqsave(host lock) |
1da177e4 LT |
4569 | * |
4570 | */ | |
4571 | static void ata_fill_sg(struct ata_queued_cmd *qc) | |
4572 | { | |
1da177e4 | 4573 | struct ata_port *ap = qc->ap; |
cedc9a47 JG |
4574 | struct scatterlist *sg; |
4575 | unsigned int idx; | |
1da177e4 | 4576 | |
a4631474 | 4577 | WARN_ON(qc->__sg == NULL); |
f131883e | 4578 | WARN_ON(qc->n_elem == 0 && qc->pad_len == 0); |
1da177e4 LT |
4579 | |
4580 | idx = 0; | |
cedc9a47 | 4581 | ata_for_each_sg(sg, qc) { |
1da177e4 LT |
4582 | u32 addr, offset; |
4583 | u32 sg_len, len; | |
4584 | ||
4585 | /* determine if physical DMA addr spans 64K boundary. | |
4586 | * Note h/w doesn't support 64-bit, so we unconditionally | |
4587 | * truncate dma_addr_t to u32. | |
4588 | */ | |
4589 | addr = (u32) sg_dma_address(sg); | |
4590 | sg_len = sg_dma_len(sg); | |
4591 | ||
4592 | while (sg_len) { | |
4593 | offset = addr & 0xffff; | |
4594 | len = sg_len; | |
4595 | if ((offset + sg_len) > 0x10000) | |
4596 | len = 0x10000 - offset; | |
4597 | ||
4598 | ap->prd[idx].addr = cpu_to_le32(addr); | |
4599 | ap->prd[idx].flags_len = cpu_to_le32(len & 0xffff); | |
4600 | VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", idx, addr, len); | |
4601 | ||
4602 | idx++; | |
4603 | sg_len -= len; | |
4604 | addr += len; | |
4605 | } | |
4606 | } | |
4607 | ||
4608 | if (idx) | |
4609 | ap->prd[idx - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT); | |
4610 | } | |
b9a4197e | 4611 | |
d26fc955 AC |
4612 | /** |
4613 | * ata_fill_sg_dumb - Fill PCI IDE PRD table | |
4614 | * @qc: Metadata associated with taskfile to be transferred | |
4615 | * | |
4616 | * Fill PCI IDE PRD (scatter-gather) table with segments | |
4617 | * associated with the current disk command. Perform the fill | |
4618 | * so that we avoid writing any length 64K records for | |
4619 | * controllers that don't follow the spec. | |
4620 | * | |
4621 | * LOCKING: | |
4622 | * spin_lock_irqsave(host lock) | |
4623 | * | |
4624 | */ | |
4625 | static void ata_fill_sg_dumb(struct ata_queued_cmd *qc) | |
4626 | { | |
4627 | struct ata_port *ap = qc->ap; | |
4628 | struct scatterlist *sg; | |
4629 | unsigned int idx; | |
4630 | ||
4631 | WARN_ON(qc->__sg == NULL); | |
4632 | WARN_ON(qc->n_elem == 0 && qc->pad_len == 0); | |
4633 | ||
4634 | idx = 0; | |
4635 | ata_for_each_sg(sg, qc) { | |
4636 | u32 addr, offset; | |
4637 | u32 sg_len, len, blen; | |
4638 | ||
2dcb407e | 4639 | /* determine if physical DMA addr spans 64K boundary. |
d26fc955 AC |
4640 | * Note h/w doesn't support 64-bit, so we unconditionally |
4641 | * truncate dma_addr_t to u32. | |
4642 | */ | |
4643 | addr = (u32) sg_dma_address(sg); | |
4644 | sg_len = sg_dma_len(sg); | |
4645 | ||
4646 | while (sg_len) { | |
4647 | offset = addr & 0xffff; | |
4648 | len = sg_len; | |
4649 | if ((offset + sg_len) > 0x10000) | |
4650 | len = 0x10000 - offset; | |
4651 | ||
4652 | blen = len & 0xffff; | |
4653 | ap->prd[idx].addr = cpu_to_le32(addr); | |
4654 | if (blen == 0) { | |
4655 | /* Some PATA chipsets like the CS5530 can't | |
4656 | cope with 0x0000 meaning 64K as the spec says */ | |
4657 | ap->prd[idx].flags_len = cpu_to_le32(0x8000); | |
4658 | blen = 0x8000; | |
4659 | ap->prd[++idx].addr = cpu_to_le32(addr + 0x8000); | |
4660 | } | |
4661 | ap->prd[idx].flags_len = cpu_to_le32(blen); | |
4662 | VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", idx, addr, len); | |
4663 | ||
4664 | idx++; | |
4665 | sg_len -= len; | |
4666 | addr += len; | |
4667 | } | |
4668 | } | |
4669 | ||
4670 | if (idx) | |
4671 | ap->prd[idx - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT); | |
4672 | } | |
4673 | ||
1da177e4 LT |
4674 | /** |
4675 | * ata_check_atapi_dma - Check whether ATAPI DMA can be supported | |
4676 | * @qc: Metadata associated with taskfile to check | |
4677 | * | |
780a87f7 JG |
4678 | * Allow low-level driver to filter ATA PACKET commands, returning |
4679 | * a status indicating whether or not it is OK to use DMA for the | |
4680 | * supplied PACKET command. | |
4681 | * | |
1da177e4 | 4682 | * LOCKING: |
cca3974e | 4683 | * spin_lock_irqsave(host lock) |
0cba632b | 4684 | * |
1da177e4 LT |
4685 | * RETURNS: 0 when ATAPI DMA can be used |
4686 | * nonzero otherwise | |
4687 | */ | |
4688 | int ata_check_atapi_dma(struct ata_queued_cmd *qc) | |
4689 | { | |
4690 | struct ata_port *ap = qc->ap; | |
b9a4197e TH |
4691 | |
4692 | /* Don't allow DMA if it isn't multiple of 16 bytes. Quite a | |
4693 | * few ATAPI devices choke on such DMA requests. | |
4694 | */ | |
4695 | if (unlikely(qc->nbytes & 15)) | |
4696 | return 1; | |
6f23a31d | 4697 | |
1da177e4 | 4698 | if (ap->ops->check_atapi_dma) |
b9a4197e | 4699 | return ap->ops->check_atapi_dma(qc); |
1da177e4 | 4700 | |
b9a4197e | 4701 | return 0; |
1da177e4 | 4702 | } |
b9a4197e | 4703 | |
31cc23b3 TH |
4704 | /** |
4705 | * ata_std_qc_defer - Check whether a qc needs to be deferred | |
4706 | * @qc: ATA command in question | |
4707 | * | |
4708 | * Non-NCQ commands cannot run with any other command, NCQ or | |
4709 | * not. As upper layer only knows the queue depth, we are | |
4710 | * responsible for maintaining exclusion. This function checks | |
4711 | * whether a new command @qc can be issued. | |
4712 | * | |
4713 | * LOCKING: | |
4714 | * spin_lock_irqsave(host lock) | |
4715 | * | |
4716 | * RETURNS: | |
4717 | * ATA_DEFER_* if deferring is needed, 0 otherwise. | |
4718 | */ | |
4719 | int ata_std_qc_defer(struct ata_queued_cmd *qc) | |
4720 | { | |
4721 | struct ata_link *link = qc->dev->link; | |
4722 | ||
4723 | if (qc->tf.protocol == ATA_PROT_NCQ) { | |
4724 | if (!ata_tag_valid(link->active_tag)) | |
4725 | return 0; | |
4726 | } else { | |
4727 | if (!ata_tag_valid(link->active_tag) && !link->sactive) | |
4728 | return 0; | |
4729 | } | |
4730 | ||
4731 | return ATA_DEFER_LINK; | |
4732 | } | |
4733 | ||
1da177e4 LT |
4734 | /** |
4735 | * ata_qc_prep - Prepare taskfile for submission | |
4736 | * @qc: Metadata associated with taskfile to be prepared | |
4737 | * | |
780a87f7 JG |
4738 | * Prepare ATA taskfile for submission. |
4739 | * | |
1da177e4 | 4740 | * LOCKING: |
cca3974e | 4741 | * spin_lock_irqsave(host lock) |
1da177e4 LT |
4742 | */ |
4743 | void ata_qc_prep(struct ata_queued_cmd *qc) | |
4744 | { | |
4745 | if (!(qc->flags & ATA_QCFLAG_DMAMAP)) | |
4746 | return; | |
4747 | ||
4748 | ata_fill_sg(qc); | |
4749 | } | |
4750 | ||
d26fc955 AC |
4751 | /** |
4752 | * ata_dumb_qc_prep - Prepare taskfile for submission | |
4753 | * @qc: Metadata associated with taskfile to be prepared | |
4754 | * | |
4755 | * Prepare ATA taskfile for submission. | |
4756 | * | |
4757 | * LOCKING: | |
4758 | * spin_lock_irqsave(host lock) | |
4759 | */ | |
4760 | void ata_dumb_qc_prep(struct ata_queued_cmd *qc) | |
4761 | { | |
4762 | if (!(qc->flags & ATA_QCFLAG_DMAMAP)) | |
4763 | return; | |
4764 | ||
4765 | ata_fill_sg_dumb(qc); | |
4766 | } | |
4767 | ||
e46834cd BK |
4768 | void ata_noop_qc_prep(struct ata_queued_cmd *qc) { } |
4769 | ||
0cba632b JG |
4770 | /** |
4771 | * ata_sg_init_one - Associate command with memory buffer | |
4772 | * @qc: Command to be associated | |
4773 | * @buf: Memory buffer | |
4774 | * @buflen: Length of memory buffer, in bytes. | |
4775 | * | |
4776 | * Initialize the data-related elements of queued_cmd @qc | |
4777 | * to point to a single memory buffer, @buf of byte length @buflen. | |
4778 | * | |
4779 | * LOCKING: | |
cca3974e | 4780 | * spin_lock_irqsave(host lock) |
0cba632b JG |
4781 | */ |
4782 | ||
1da177e4 LT |
4783 | void ata_sg_init_one(struct ata_queued_cmd *qc, void *buf, unsigned int buflen) |
4784 | { | |
1da177e4 LT |
4785 | qc->flags |= ATA_QCFLAG_SINGLE; |
4786 | ||
cedc9a47 | 4787 | qc->__sg = &qc->sgent; |
1da177e4 | 4788 | qc->n_elem = 1; |
cedc9a47 | 4789 | qc->orig_n_elem = 1; |
1da177e4 | 4790 | qc->buf_virt = buf; |
233277ca | 4791 | qc->nbytes = buflen; |
87260216 | 4792 | qc->cursg = qc->__sg; |
1da177e4 | 4793 | |
61c0596c | 4794 | sg_init_one(&qc->sgent, buf, buflen); |
1da177e4 LT |
4795 | } |
4796 | ||
0cba632b JG |
4797 | /** |
4798 | * ata_sg_init - Associate command with scatter-gather table. | |
4799 | * @qc: Command to be associated | |
4800 | * @sg: Scatter-gather table. | |
4801 | * @n_elem: Number of elements in s/g table. | |
4802 | * | |
4803 | * Initialize the data-related elements of queued_cmd @qc | |
4804 | * to point to a scatter-gather table @sg, containing @n_elem | |
4805 | * elements. | |
4806 | * | |
4807 | * LOCKING: | |
cca3974e | 4808 | * spin_lock_irqsave(host lock) |
0cba632b JG |
4809 | */ |
4810 | ||
1da177e4 LT |
4811 | void ata_sg_init(struct ata_queued_cmd *qc, struct scatterlist *sg, |
4812 | unsigned int n_elem) | |
4813 | { | |
4814 | qc->flags |= ATA_QCFLAG_SG; | |
cedc9a47 | 4815 | qc->__sg = sg; |
1da177e4 | 4816 | qc->n_elem = n_elem; |
cedc9a47 | 4817 | qc->orig_n_elem = n_elem; |
87260216 | 4818 | qc->cursg = qc->__sg; |
1da177e4 LT |
4819 | } |
4820 | ||
4821 | /** | |
0cba632b JG |
4822 | * ata_sg_setup_one - DMA-map the memory buffer associated with a command. |
4823 | * @qc: Command with memory buffer to be mapped. | |
4824 | * | |
4825 | * DMA-map the memory buffer associated with queued_cmd @qc. | |
1da177e4 LT |
4826 | * |
4827 | * LOCKING: | |
cca3974e | 4828 | * spin_lock_irqsave(host lock) |
1da177e4 LT |
4829 | * |
4830 | * RETURNS: | |
0cba632b | 4831 | * Zero on success, negative on error. |
1da177e4 LT |
4832 | */ |
4833 | ||
4834 | static int ata_sg_setup_one(struct ata_queued_cmd *qc) | |
4835 | { | |
4836 | struct ata_port *ap = qc->ap; | |
4837 | int dir = qc->dma_dir; | |
cedc9a47 | 4838 | struct scatterlist *sg = qc->__sg; |
1da177e4 | 4839 | dma_addr_t dma_address; |
2e242fa9 | 4840 | int trim_sg = 0; |
1da177e4 | 4841 | |
cedc9a47 JG |
4842 | /* we must lengthen transfers to end on a 32-bit boundary */ |
4843 | qc->pad_len = sg->length & 3; | |
4844 | if (qc->pad_len) { | |
4845 | void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ); | |
4846 | struct scatterlist *psg = &qc->pad_sgent; | |
4847 | ||
a4631474 | 4848 | WARN_ON(qc->dev->class != ATA_DEV_ATAPI); |
cedc9a47 JG |
4849 | |
4850 | memset(pad_buf, 0, ATA_DMA_PAD_SZ); | |
4851 | ||
4852 | if (qc->tf.flags & ATA_TFLAG_WRITE) | |
4853 | memcpy(pad_buf, qc->buf_virt + sg->length - qc->pad_len, | |
4854 | qc->pad_len); | |
4855 | ||
4856 | sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ); | |
4857 | sg_dma_len(psg) = ATA_DMA_PAD_SZ; | |
4858 | /* trim sg */ | |
4859 | sg->length -= qc->pad_len; | |
2e242fa9 TH |
4860 | if (sg->length == 0) |
4861 | trim_sg = 1; | |
cedc9a47 JG |
4862 | |
4863 | DPRINTK("padding done, sg->length=%u pad_len=%u\n", | |
4864 | sg->length, qc->pad_len); | |
4865 | } | |
4866 | ||
2e242fa9 TH |
4867 | if (trim_sg) { |
4868 | qc->n_elem--; | |
e1410f2d JG |
4869 | goto skip_map; |
4870 | } | |
4871 | ||
2f1f610b | 4872 | dma_address = dma_map_single(ap->dev, qc->buf_virt, |
32529e01 | 4873 | sg->length, dir); |
537a95d9 TH |
4874 | if (dma_mapping_error(dma_address)) { |
4875 | /* restore sg */ | |
4876 | sg->length += qc->pad_len; | |
1da177e4 | 4877 | return -1; |
537a95d9 | 4878 | } |
1da177e4 LT |
4879 | |
4880 | sg_dma_address(sg) = dma_address; | |
32529e01 | 4881 | sg_dma_len(sg) = sg->length; |
1da177e4 | 4882 | |
2e242fa9 | 4883 | skip_map: |
1da177e4 LT |
4884 | DPRINTK("mapped buffer of %d bytes for %s\n", sg_dma_len(sg), |
4885 | qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read"); | |
4886 | ||
4887 | return 0; | |
4888 | } | |
4889 | ||
4890 | /** | |
0cba632b JG |
4891 | * ata_sg_setup - DMA-map the scatter-gather table associated with a command. |
4892 | * @qc: Command with scatter-gather table to be mapped. | |
4893 | * | |
4894 | * DMA-map the scatter-gather table associated with queued_cmd @qc. | |
1da177e4 LT |
4895 | * |
4896 | * LOCKING: | |
cca3974e | 4897 | * spin_lock_irqsave(host lock) |
1da177e4 LT |
4898 | * |
4899 | * RETURNS: | |
0cba632b | 4900 | * Zero on success, negative on error. |
1da177e4 LT |
4901 | * |
4902 | */ | |
4903 | ||
4904 | static int ata_sg_setup(struct ata_queued_cmd *qc) | |
4905 | { | |
4906 | struct ata_port *ap = qc->ap; | |
cedc9a47 | 4907 | struct scatterlist *sg = qc->__sg; |
87260216 | 4908 | struct scatterlist *lsg = sg_last(qc->__sg, qc->n_elem); |
e1410f2d | 4909 | int n_elem, pre_n_elem, dir, trim_sg = 0; |
1da177e4 | 4910 | |
44877b4e | 4911 | VPRINTK("ENTER, ata%u\n", ap->print_id); |
a4631474 | 4912 | WARN_ON(!(qc->flags & ATA_QCFLAG_SG)); |
1da177e4 | 4913 | |
cedc9a47 JG |
4914 | /* we must lengthen transfers to end on a 32-bit boundary */ |
4915 | qc->pad_len = lsg->length & 3; | |
4916 | if (qc->pad_len) { | |
4917 | void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ); | |
4918 | struct scatterlist *psg = &qc->pad_sgent; | |
4919 | unsigned int offset; | |
4920 | ||
a4631474 | 4921 | WARN_ON(qc->dev->class != ATA_DEV_ATAPI); |
cedc9a47 JG |
4922 | |
4923 | memset(pad_buf, 0, ATA_DMA_PAD_SZ); | |
4924 | ||
4925 | /* | |
4926 | * psg->page/offset are used to copy to-be-written | |
4927 | * data in this function or read data in ata_sg_clean. | |
4928 | */ | |
4929 | offset = lsg->offset + lsg->length - qc->pad_len; | |
acd054a5 | 4930 | sg_init_table(psg, 1); |
642f1490 JA |
4931 | sg_set_page(psg, nth_page(sg_page(lsg), offset >> PAGE_SHIFT), |
4932 | qc->pad_len, offset_in_page(offset)); | |
cedc9a47 JG |
4933 | |
4934 | if (qc->tf.flags & ATA_TFLAG_WRITE) { | |
45711f1a | 4935 | void *addr = kmap_atomic(sg_page(psg), KM_IRQ0); |
cedc9a47 | 4936 | memcpy(pad_buf, addr + psg->offset, qc->pad_len); |
dfa15988 | 4937 | kunmap_atomic(addr, KM_IRQ0); |
cedc9a47 JG |
4938 | } |
4939 | ||
4940 | sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ); | |
4941 | sg_dma_len(psg) = ATA_DMA_PAD_SZ; | |
4942 | /* trim last sg */ | |
4943 | lsg->length -= qc->pad_len; | |
e1410f2d JG |
4944 | if (lsg->length == 0) |
4945 | trim_sg = 1; | |
cedc9a47 JG |
4946 | |
4947 | DPRINTK("padding done, sg[%d].length=%u pad_len=%u\n", | |
4948 | qc->n_elem - 1, lsg->length, qc->pad_len); | |
4949 | } | |
4950 | ||
e1410f2d JG |
4951 | pre_n_elem = qc->n_elem; |
4952 | if (trim_sg && pre_n_elem) | |
4953 | pre_n_elem--; | |
4954 | ||
4955 | if (!pre_n_elem) { | |
4956 | n_elem = 0; | |
4957 | goto skip_map; | |
4958 | } | |
4959 | ||
1da177e4 | 4960 | dir = qc->dma_dir; |
2f1f610b | 4961 | n_elem = dma_map_sg(ap->dev, sg, pre_n_elem, dir); |
537a95d9 TH |
4962 | if (n_elem < 1) { |
4963 | /* restore last sg */ | |
4964 | lsg->length += qc->pad_len; | |
1da177e4 | 4965 | return -1; |
537a95d9 | 4966 | } |
1da177e4 LT |
4967 | |
4968 | DPRINTK("%d sg elements mapped\n", n_elem); | |
4969 | ||
e1410f2d | 4970 | skip_map: |
1da177e4 LT |
4971 | qc->n_elem = n_elem; |
4972 | ||
4973 | return 0; | |
4974 | } | |
4975 | ||
0baab86b | 4976 | /** |
c893a3ae | 4977 | * swap_buf_le16 - swap halves of 16-bit words in place |
0baab86b EF |
4978 | * @buf: Buffer to swap |
4979 | * @buf_words: Number of 16-bit words in buffer. | |
4980 | * | |
4981 | * Swap halves of 16-bit words if needed to convert from | |
4982 | * little-endian byte order to native cpu byte order, or | |
4983 | * vice-versa. | |
4984 | * | |
4985 | * LOCKING: | |
6f0ef4fa | 4986 | * Inherited from caller. |
0baab86b | 4987 | */ |
1da177e4 LT |
4988 | void swap_buf_le16(u16 *buf, unsigned int buf_words) |
4989 | { | |
4990 | #ifdef __BIG_ENDIAN | |
4991 | unsigned int i; | |
4992 | ||
4993 | for (i = 0; i < buf_words; i++) | |
4994 | buf[i] = le16_to_cpu(buf[i]); | |
4995 | #endif /* __BIG_ENDIAN */ | |
4996 | } | |
4997 | ||
6ae4cfb5 | 4998 | /** |
0d5ff566 | 4999 | * ata_data_xfer - Transfer data by PIO |
a6b2c5d4 | 5000 | * @adev: device to target |
6ae4cfb5 AL |
5001 | * @buf: data buffer |
5002 | * @buflen: buffer length | |
344babaa | 5003 | * @write_data: read/write |
6ae4cfb5 AL |
5004 | * |
5005 | * Transfer data from/to the device data register by PIO. | |
5006 | * | |
5007 | * LOCKING: | |
5008 | * Inherited from caller. | |
6ae4cfb5 | 5009 | */ |
0d5ff566 TH |
5010 | void ata_data_xfer(struct ata_device *adev, unsigned char *buf, |
5011 | unsigned int buflen, int write_data) | |
1da177e4 | 5012 | { |
9af5c9c9 | 5013 | struct ata_port *ap = adev->link->ap; |
6ae4cfb5 | 5014 | unsigned int words = buflen >> 1; |
1da177e4 | 5015 | |
6ae4cfb5 | 5016 | /* Transfer multiple of 2 bytes */ |
1da177e4 | 5017 | if (write_data) |
0d5ff566 | 5018 | iowrite16_rep(ap->ioaddr.data_addr, buf, words); |
1da177e4 | 5019 | else |
0d5ff566 | 5020 | ioread16_rep(ap->ioaddr.data_addr, buf, words); |
6ae4cfb5 AL |
5021 | |
5022 | /* Transfer trailing 1 byte, if any. */ | |
5023 | if (unlikely(buflen & 0x01)) { | |
5024 | u16 align_buf[1] = { 0 }; | |
5025 | unsigned char *trailing_buf = buf + buflen - 1; | |
5026 | ||
5027 | if (write_data) { | |
5028 | memcpy(align_buf, trailing_buf, 1); | |
0d5ff566 | 5029 | iowrite16(le16_to_cpu(align_buf[0]), ap->ioaddr.data_addr); |
6ae4cfb5 | 5030 | } else { |
0d5ff566 | 5031 | align_buf[0] = cpu_to_le16(ioread16(ap->ioaddr.data_addr)); |
6ae4cfb5 AL |
5032 | memcpy(trailing_buf, align_buf, 1); |
5033 | } | |
5034 | } | |
1da177e4 LT |
5035 | } |
5036 | ||
75e99585 | 5037 | /** |
0d5ff566 | 5038 | * ata_data_xfer_noirq - Transfer data by PIO |
75e99585 AC |
5039 | * @adev: device to target |
5040 | * @buf: data buffer | |
5041 | * @buflen: buffer length | |
5042 | * @write_data: read/write | |
5043 | * | |
88574551 | 5044 | * Transfer data from/to the device data register by PIO. Do the |
75e99585 AC |
5045 | * transfer with interrupts disabled. |
5046 | * | |
5047 | * LOCKING: | |
5048 | * Inherited from caller. | |
5049 | */ | |
0d5ff566 TH |
5050 | void ata_data_xfer_noirq(struct ata_device *adev, unsigned char *buf, |
5051 | unsigned int buflen, int write_data) | |
75e99585 AC |
5052 | { |
5053 | unsigned long flags; | |
5054 | local_irq_save(flags); | |
0d5ff566 | 5055 | ata_data_xfer(adev, buf, buflen, write_data); |
75e99585 AC |
5056 | local_irq_restore(flags); |
5057 | } | |
5058 | ||
5059 | ||
6ae4cfb5 | 5060 | /** |
5a5dbd18 | 5061 | * ata_pio_sector - Transfer a sector of data. |
6ae4cfb5 AL |
5062 | * @qc: Command on going |
5063 | * | |
5a5dbd18 | 5064 | * Transfer qc->sect_size bytes of data from/to the ATA device. |
6ae4cfb5 AL |
5065 | * |
5066 | * LOCKING: | |
5067 | * Inherited from caller. | |
5068 | */ | |
5069 | ||
1da177e4 LT |
5070 | static void ata_pio_sector(struct ata_queued_cmd *qc) |
5071 | { | |
5072 | int do_write = (qc->tf.flags & ATA_TFLAG_WRITE); | |
1da177e4 LT |
5073 | struct ata_port *ap = qc->ap; |
5074 | struct page *page; | |
5075 | unsigned int offset; | |
5076 | unsigned char *buf; | |
5077 | ||
5a5dbd18 | 5078 | if (qc->curbytes == qc->nbytes - qc->sect_size) |
14be71f4 | 5079 | ap->hsm_task_state = HSM_ST_LAST; |
1da177e4 | 5080 | |
45711f1a | 5081 | page = sg_page(qc->cursg); |
87260216 | 5082 | offset = qc->cursg->offset + qc->cursg_ofs; |
1da177e4 LT |
5083 | |
5084 | /* get the current page and offset */ | |
5085 | page = nth_page(page, (offset >> PAGE_SHIFT)); | |
5086 | offset %= PAGE_SIZE; | |
5087 | ||
1da177e4 LT |
5088 | DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read"); |
5089 | ||
91b8b313 AL |
5090 | if (PageHighMem(page)) { |
5091 | unsigned long flags; | |
5092 | ||
a6b2c5d4 | 5093 | /* FIXME: use a bounce buffer */ |
91b8b313 AL |
5094 | local_irq_save(flags); |
5095 | buf = kmap_atomic(page, KM_IRQ0); | |
083958d3 | 5096 | |
91b8b313 | 5097 | /* do the actual data transfer */ |
5a5dbd18 | 5098 | ap->ops->data_xfer(qc->dev, buf + offset, qc->sect_size, do_write); |
1da177e4 | 5099 | |
91b8b313 AL |
5100 | kunmap_atomic(buf, KM_IRQ0); |
5101 | local_irq_restore(flags); | |
5102 | } else { | |
5103 | buf = page_address(page); | |
5a5dbd18 | 5104 | ap->ops->data_xfer(qc->dev, buf + offset, qc->sect_size, do_write); |
91b8b313 | 5105 | } |
1da177e4 | 5106 | |
5a5dbd18 ML |
5107 | qc->curbytes += qc->sect_size; |
5108 | qc->cursg_ofs += qc->sect_size; | |
1da177e4 | 5109 | |
87260216 JA |
5110 | if (qc->cursg_ofs == qc->cursg->length) { |
5111 | qc->cursg = sg_next(qc->cursg); | |
1da177e4 LT |
5112 | qc->cursg_ofs = 0; |
5113 | } | |
1da177e4 | 5114 | } |
1da177e4 | 5115 | |
07f6f7d0 | 5116 | /** |
5a5dbd18 | 5117 | * ata_pio_sectors - Transfer one or many sectors. |
07f6f7d0 AL |
5118 | * @qc: Command on going |
5119 | * | |
5a5dbd18 | 5120 | * Transfer one or many sectors of data from/to the |
07f6f7d0 AL |
5121 | * ATA device for the DRQ request. |
5122 | * | |
5123 | * LOCKING: | |
5124 | * Inherited from caller. | |
5125 | */ | |
1da177e4 | 5126 | |
07f6f7d0 AL |
5127 | static void ata_pio_sectors(struct ata_queued_cmd *qc) |
5128 | { | |
5129 | if (is_multi_taskfile(&qc->tf)) { | |
5130 | /* READ/WRITE MULTIPLE */ | |
5131 | unsigned int nsect; | |
5132 | ||
587005de | 5133 | WARN_ON(qc->dev->multi_count == 0); |
1da177e4 | 5134 | |
5a5dbd18 | 5135 | nsect = min((qc->nbytes - qc->curbytes) / qc->sect_size, |
726f0785 | 5136 | qc->dev->multi_count); |
07f6f7d0 AL |
5137 | while (nsect--) |
5138 | ata_pio_sector(qc); | |
5139 | } else | |
5140 | ata_pio_sector(qc); | |
4cc980b3 AL |
5141 | |
5142 | ata_altstatus(qc->ap); /* flush */ | |
07f6f7d0 AL |
5143 | } |
5144 | ||
c71c1857 AL |
5145 | /** |
5146 | * atapi_send_cdb - Write CDB bytes to hardware | |
5147 | * @ap: Port to which ATAPI device is attached. | |
5148 | * @qc: Taskfile currently active | |
5149 | * | |
5150 | * When device has indicated its readiness to accept | |
5151 | * a CDB, this function is called. Send the CDB. | |
5152 | * | |
5153 | * LOCKING: | |
5154 | * caller. | |
5155 | */ | |
5156 | ||
5157 | static void atapi_send_cdb(struct ata_port *ap, struct ata_queued_cmd *qc) | |
5158 | { | |
5159 | /* send SCSI cdb */ | |
5160 | DPRINTK("send cdb\n"); | |
db024d53 | 5161 | WARN_ON(qc->dev->cdb_len < 12); |
c71c1857 | 5162 | |
a6b2c5d4 | 5163 | ap->ops->data_xfer(qc->dev, qc->cdb, qc->dev->cdb_len, 1); |
c71c1857 AL |
5164 | ata_altstatus(ap); /* flush */ |
5165 | ||
5166 | switch (qc->tf.protocol) { | |
5167 | case ATA_PROT_ATAPI: | |
5168 | ap->hsm_task_state = HSM_ST; | |
5169 | break; | |
5170 | case ATA_PROT_ATAPI_NODATA: | |
5171 | ap->hsm_task_state = HSM_ST_LAST; | |
5172 | break; | |
5173 | case ATA_PROT_ATAPI_DMA: | |
5174 | ap->hsm_task_state = HSM_ST_LAST; | |
5175 | /* initiate bmdma */ | |
5176 | ap->ops->bmdma_start(qc); | |
5177 | break; | |
5178 | } | |
1da177e4 LT |
5179 | } |
5180 | ||
6ae4cfb5 AL |
5181 | /** |
5182 | * __atapi_pio_bytes - Transfer data from/to the ATAPI device. | |
5183 | * @qc: Command on going | |
5184 | * @bytes: number of bytes | |
5185 | * | |
5186 | * Transfer Transfer data from/to the ATAPI device. | |
5187 | * | |
5188 | * LOCKING: | |
5189 | * Inherited from caller. | |
5190 | * | |
5191 | */ | |
5192 | ||
1da177e4 LT |
5193 | static void __atapi_pio_bytes(struct ata_queued_cmd *qc, unsigned int bytes) |
5194 | { | |
5195 | int do_write = (qc->tf.flags & ATA_TFLAG_WRITE); | |
cedc9a47 | 5196 | struct scatterlist *sg = qc->__sg; |
0874ee76 | 5197 | struct scatterlist *lsg = sg_last(qc->__sg, qc->n_elem); |
1da177e4 LT |
5198 | struct ata_port *ap = qc->ap; |
5199 | struct page *page; | |
5200 | unsigned char *buf; | |
5201 | unsigned int offset, count; | |
0874ee76 | 5202 | int no_more_sg = 0; |
1da177e4 | 5203 | |
563a6e1f | 5204 | if (qc->curbytes + bytes >= qc->nbytes) |
14be71f4 | 5205 | ap->hsm_task_state = HSM_ST_LAST; |
1da177e4 LT |
5206 | |
5207 | next_sg: | |
0874ee76 | 5208 | if (unlikely(no_more_sg)) { |
7fb6ec28 | 5209 | /* |
563a6e1f AL |
5210 | * The end of qc->sg is reached and the device expects |
5211 | * more data to transfer. In order not to overrun qc->sg | |
5212 | * and fulfill length specified in the byte count register, | |
5213 | * - for read case, discard trailing data from the device | |
5214 | * - for write case, padding zero data to the device | |
5215 | */ | |
5216 | u16 pad_buf[1] = { 0 }; | |
5217 | unsigned int words = bytes >> 1; | |
5218 | unsigned int i; | |
5219 | ||
5220 | if (words) /* warning if bytes > 1 */ | |
f15a1daf TH |
5221 | ata_dev_printk(qc->dev, KERN_WARNING, |
5222 | "%u bytes trailing data\n", bytes); | |
563a6e1f AL |
5223 | |
5224 | for (i = 0; i < words; i++) | |
2dcb407e | 5225 | ap->ops->data_xfer(qc->dev, (unsigned char *)pad_buf, 2, do_write); |
563a6e1f | 5226 | |
14be71f4 | 5227 | ap->hsm_task_state = HSM_ST_LAST; |
563a6e1f AL |
5228 | return; |
5229 | } | |
5230 | ||
87260216 | 5231 | sg = qc->cursg; |
1da177e4 | 5232 | |
45711f1a | 5233 | page = sg_page(sg); |
1da177e4 LT |
5234 | offset = sg->offset + qc->cursg_ofs; |
5235 | ||
5236 | /* get the current page and offset */ | |
5237 | page = nth_page(page, (offset >> PAGE_SHIFT)); | |
5238 | offset %= PAGE_SIZE; | |
5239 | ||
6952df03 | 5240 | /* don't overrun current sg */ |
32529e01 | 5241 | count = min(sg->length - qc->cursg_ofs, bytes); |
1da177e4 LT |
5242 | |
5243 | /* don't cross page boundaries */ | |
5244 | count = min(count, (unsigned int)PAGE_SIZE - offset); | |
5245 | ||
7282aa4b AL |
5246 | DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read"); |
5247 | ||
91b8b313 AL |
5248 | if (PageHighMem(page)) { |
5249 | unsigned long flags; | |
5250 | ||
a6b2c5d4 | 5251 | /* FIXME: use bounce buffer */ |
91b8b313 AL |
5252 | local_irq_save(flags); |
5253 | buf = kmap_atomic(page, KM_IRQ0); | |
083958d3 | 5254 | |
91b8b313 | 5255 | /* do the actual data transfer */ |
a6b2c5d4 | 5256 | ap->ops->data_xfer(qc->dev, buf + offset, count, do_write); |
7282aa4b | 5257 | |
91b8b313 AL |
5258 | kunmap_atomic(buf, KM_IRQ0); |
5259 | local_irq_restore(flags); | |
5260 | } else { | |
5261 | buf = page_address(page); | |
a6b2c5d4 | 5262 | ap->ops->data_xfer(qc->dev, buf + offset, count, do_write); |
91b8b313 | 5263 | } |
1da177e4 LT |
5264 | |
5265 | bytes -= count; | |
5266 | qc->curbytes += count; | |
5267 | qc->cursg_ofs += count; | |
5268 | ||
32529e01 | 5269 | if (qc->cursg_ofs == sg->length) { |
0874ee76 FT |
5270 | if (qc->cursg == lsg) |
5271 | no_more_sg = 1; | |
5272 | ||
87260216 | 5273 | qc->cursg = sg_next(qc->cursg); |
1da177e4 LT |
5274 | qc->cursg_ofs = 0; |
5275 | } | |
5276 | ||
563a6e1f | 5277 | if (bytes) |
1da177e4 | 5278 | goto next_sg; |
1da177e4 LT |
5279 | } |
5280 | ||
6ae4cfb5 AL |
5281 | /** |
5282 | * atapi_pio_bytes - Transfer data from/to the ATAPI device. | |
5283 | * @qc: Command on going | |
5284 | * | |
5285 | * Transfer Transfer data from/to the ATAPI device. | |
5286 | * | |
5287 | * LOCKING: | |
5288 | * Inherited from caller. | |
6ae4cfb5 AL |
5289 | */ |
5290 | ||
1da177e4 LT |
5291 | static void atapi_pio_bytes(struct ata_queued_cmd *qc) |
5292 | { | |
5293 | struct ata_port *ap = qc->ap; | |
5294 | struct ata_device *dev = qc->dev; | |
5295 | unsigned int ireason, bc_lo, bc_hi, bytes; | |
5296 | int i_write, do_write = (qc->tf.flags & ATA_TFLAG_WRITE) ? 1 : 0; | |
5297 | ||
eec4c3f3 AL |
5298 | /* Abuse qc->result_tf for temp storage of intermediate TF |
5299 | * here to save some kernel stack usage. | |
5300 | * For normal completion, qc->result_tf is not relevant. For | |
5301 | * error, qc->result_tf is later overwritten by ata_qc_complete(). | |
5302 | * So, the correctness of qc->result_tf is not affected. | |
5303 | */ | |
5304 | ap->ops->tf_read(ap, &qc->result_tf); | |
5305 | ireason = qc->result_tf.nsect; | |
5306 | bc_lo = qc->result_tf.lbam; | |
5307 | bc_hi = qc->result_tf.lbah; | |
1da177e4 LT |
5308 | bytes = (bc_hi << 8) | bc_lo; |
5309 | ||
5310 | /* shall be cleared to zero, indicating xfer of data */ | |
5311 | if (ireason & (1 << 0)) | |
5312 | goto err_out; | |
5313 | ||
5314 | /* make sure transfer direction matches expected */ | |
5315 | i_write = ((ireason & (1 << 1)) == 0) ? 1 : 0; | |
5316 | if (do_write != i_write) | |
5317 | goto err_out; | |
5318 | ||
44877b4e | 5319 | VPRINTK("ata%u: xfering %d bytes\n", ap->print_id, bytes); |
312f7da2 | 5320 | |
1da177e4 | 5321 | __atapi_pio_bytes(qc, bytes); |
4cc980b3 | 5322 | ata_altstatus(ap); /* flush */ |
1da177e4 LT |
5323 | |
5324 | return; | |
5325 | ||
5326 | err_out: | |
f15a1daf | 5327 | ata_dev_printk(dev, KERN_INFO, "ATAPI check failed\n"); |
11a56d24 | 5328 | qc->err_mask |= AC_ERR_HSM; |
14be71f4 | 5329 | ap->hsm_task_state = HSM_ST_ERR; |
1da177e4 LT |
5330 | } |
5331 | ||
5332 | /** | |
c234fb00 AL |
5333 | * ata_hsm_ok_in_wq - Check if the qc can be handled in the workqueue. |
5334 | * @ap: the target ata_port | |
5335 | * @qc: qc on going | |
1da177e4 | 5336 | * |
c234fb00 AL |
5337 | * RETURNS: |
5338 | * 1 if ok in workqueue, 0 otherwise. | |
1da177e4 | 5339 | */ |
c234fb00 AL |
5340 | |
5341 | static inline int ata_hsm_ok_in_wq(struct ata_port *ap, struct ata_queued_cmd *qc) | |
1da177e4 | 5342 | { |
c234fb00 AL |
5343 | if (qc->tf.flags & ATA_TFLAG_POLLING) |
5344 | return 1; | |
1da177e4 | 5345 | |
c234fb00 AL |
5346 | if (ap->hsm_task_state == HSM_ST_FIRST) { |
5347 | if (qc->tf.protocol == ATA_PROT_PIO && | |
5348 | (qc->tf.flags & ATA_TFLAG_WRITE)) | |
5349 | return 1; | |
1da177e4 | 5350 | |
c234fb00 AL |
5351 | if (is_atapi_taskfile(&qc->tf) && |
5352 | !(qc->dev->flags & ATA_DFLAG_CDB_INTR)) | |
5353 | return 1; | |
fe79e683 AL |
5354 | } |
5355 | ||
c234fb00 AL |
5356 | return 0; |
5357 | } | |
1da177e4 | 5358 | |
c17ea20d TH |
5359 | /** |
5360 | * ata_hsm_qc_complete - finish a qc running on standard HSM | |
5361 | * @qc: Command to complete | |
5362 | * @in_wq: 1 if called from workqueue, 0 otherwise | |
5363 | * | |
5364 | * Finish @qc which is running on standard HSM. | |
5365 | * | |
5366 | * LOCKING: | |
cca3974e | 5367 | * If @in_wq is zero, spin_lock_irqsave(host lock). |
c17ea20d TH |
5368 | * Otherwise, none on entry and grabs host lock. |
5369 | */ | |
5370 | static void ata_hsm_qc_complete(struct ata_queued_cmd *qc, int in_wq) | |
5371 | { | |
5372 | struct ata_port *ap = qc->ap; | |
5373 | unsigned long flags; | |
5374 | ||
5375 | if (ap->ops->error_handler) { | |
5376 | if (in_wq) { | |
ba6a1308 | 5377 | spin_lock_irqsave(ap->lock, flags); |
c17ea20d | 5378 | |
cca3974e JG |
5379 | /* EH might have kicked in while host lock is |
5380 | * released. | |
c17ea20d TH |
5381 | */ |
5382 | qc = ata_qc_from_tag(ap, qc->tag); | |
5383 | if (qc) { | |
5384 | if (likely(!(qc->err_mask & AC_ERR_HSM))) { | |
83625006 | 5385 | ap->ops->irq_on(ap); |
c17ea20d TH |
5386 | ata_qc_complete(qc); |
5387 | } else | |
5388 | ata_port_freeze(ap); | |
5389 | } | |
5390 | ||
ba6a1308 | 5391 | spin_unlock_irqrestore(ap->lock, flags); |
c17ea20d TH |
5392 | } else { |
5393 | if (likely(!(qc->err_mask & AC_ERR_HSM))) | |
5394 | ata_qc_complete(qc); | |
5395 | else | |
5396 | ata_port_freeze(ap); | |
5397 | } | |
5398 | } else { | |
5399 | if (in_wq) { | |
ba6a1308 | 5400 | spin_lock_irqsave(ap->lock, flags); |
83625006 | 5401 | ap->ops->irq_on(ap); |
c17ea20d | 5402 | ata_qc_complete(qc); |
ba6a1308 | 5403 | spin_unlock_irqrestore(ap->lock, flags); |
c17ea20d TH |
5404 | } else |
5405 | ata_qc_complete(qc); | |
5406 | } | |
5407 | } | |
5408 | ||
bb5cb290 AL |
5409 | /** |
5410 | * ata_hsm_move - move the HSM to the next state. | |
5411 | * @ap: the target ata_port | |
5412 | * @qc: qc on going | |
5413 | * @status: current device status | |
5414 | * @in_wq: 1 if called from workqueue, 0 otherwise | |
5415 | * | |
5416 | * RETURNS: | |
5417 | * 1 when poll next status needed, 0 otherwise. | |
5418 | */ | |
9a1004d0 TH |
5419 | int ata_hsm_move(struct ata_port *ap, struct ata_queued_cmd *qc, |
5420 | u8 status, int in_wq) | |
e2cec771 | 5421 | { |
bb5cb290 AL |
5422 | unsigned long flags = 0; |
5423 | int poll_next; | |
5424 | ||
6912ccd5 AL |
5425 | WARN_ON((qc->flags & ATA_QCFLAG_ACTIVE) == 0); |
5426 | ||
bb5cb290 AL |
5427 | /* Make sure ata_qc_issue_prot() does not throw things |
5428 | * like DMA polling into the workqueue. Notice that | |
5429 | * in_wq is not equivalent to (qc->tf.flags & ATA_TFLAG_POLLING). | |
5430 | */ | |
c234fb00 | 5431 | WARN_ON(in_wq != ata_hsm_ok_in_wq(ap, qc)); |
bb5cb290 | 5432 | |
e2cec771 | 5433 | fsm_start: |
999bb6f4 | 5434 | DPRINTK("ata%u: protocol %d task_state %d (dev_stat 0x%X)\n", |
44877b4e | 5435 | ap->print_id, qc->tf.protocol, ap->hsm_task_state, status); |
999bb6f4 | 5436 | |
e2cec771 AL |
5437 | switch (ap->hsm_task_state) { |
5438 | case HSM_ST_FIRST: | |
bb5cb290 AL |
5439 | /* Send first data block or PACKET CDB */ |
5440 | ||
5441 | /* If polling, we will stay in the work queue after | |
5442 | * sending the data. Otherwise, interrupt handler | |
5443 | * takes over after sending the data. | |
5444 | */ | |
5445 | poll_next = (qc->tf.flags & ATA_TFLAG_POLLING); | |
5446 | ||
e2cec771 | 5447 | /* check device status */ |
3655d1d3 AL |
5448 | if (unlikely((status & ATA_DRQ) == 0)) { |
5449 | /* handle BSY=0, DRQ=0 as error */ | |
5450 | if (likely(status & (ATA_ERR | ATA_DF))) | |
5451 | /* device stops HSM for abort/error */ | |
5452 | qc->err_mask |= AC_ERR_DEV; | |
5453 | else | |
5454 | /* HSM violation. Let EH handle this */ | |
5455 | qc->err_mask |= AC_ERR_HSM; | |
5456 | ||
14be71f4 | 5457 | ap->hsm_task_state = HSM_ST_ERR; |
e2cec771 | 5458 | goto fsm_start; |
1da177e4 LT |
5459 | } |
5460 | ||
71601958 AL |
5461 | /* Device should not ask for data transfer (DRQ=1) |
5462 | * when it finds something wrong. | |
eee6c32f AL |
5463 | * We ignore DRQ here and stop the HSM by |
5464 | * changing hsm_task_state to HSM_ST_ERR and | |
5465 | * let the EH abort the command or reset the device. | |
71601958 AL |
5466 | */ |
5467 | if (unlikely(status & (ATA_ERR | ATA_DF))) { | |
44877b4e TH |
5468 | ata_port_printk(ap, KERN_WARNING, "DRQ=1 with device " |
5469 | "error, dev_stat 0x%X\n", status); | |
3655d1d3 | 5470 | qc->err_mask |= AC_ERR_HSM; |
eee6c32f AL |
5471 | ap->hsm_task_state = HSM_ST_ERR; |
5472 | goto fsm_start; | |
71601958 | 5473 | } |
1da177e4 | 5474 | |
bb5cb290 AL |
5475 | /* Send the CDB (atapi) or the first data block (ata pio out). |
5476 | * During the state transition, interrupt handler shouldn't | |
5477 | * be invoked before the data transfer is complete and | |
5478 | * hsm_task_state is changed. Hence, the following locking. | |
5479 | */ | |
5480 | if (in_wq) | |
ba6a1308 | 5481 | spin_lock_irqsave(ap->lock, flags); |
1da177e4 | 5482 | |
bb5cb290 AL |
5483 | if (qc->tf.protocol == ATA_PROT_PIO) { |
5484 | /* PIO data out protocol. | |
5485 | * send first data block. | |
5486 | */ | |
0565c26d | 5487 | |
bb5cb290 AL |
5488 | /* ata_pio_sectors() might change the state |
5489 | * to HSM_ST_LAST. so, the state is changed here | |
5490 | * before ata_pio_sectors(). | |
5491 | */ | |
5492 | ap->hsm_task_state = HSM_ST; | |
5493 | ata_pio_sectors(qc); | |
bb5cb290 AL |
5494 | } else |
5495 | /* send CDB */ | |
5496 | atapi_send_cdb(ap, qc); | |
5497 | ||
5498 | if (in_wq) | |
ba6a1308 | 5499 | spin_unlock_irqrestore(ap->lock, flags); |
bb5cb290 AL |
5500 | |
5501 | /* if polling, ata_pio_task() handles the rest. | |
5502 | * otherwise, interrupt handler takes over from here. | |
5503 | */ | |
e2cec771 | 5504 | break; |
1c848984 | 5505 | |
e2cec771 AL |
5506 | case HSM_ST: |
5507 | /* complete command or read/write the data register */ | |
5508 | if (qc->tf.protocol == ATA_PROT_ATAPI) { | |
5509 | /* ATAPI PIO protocol */ | |
5510 | if ((status & ATA_DRQ) == 0) { | |
3655d1d3 AL |
5511 | /* No more data to transfer or device error. |
5512 | * Device error will be tagged in HSM_ST_LAST. | |
5513 | */ | |
e2cec771 AL |
5514 | ap->hsm_task_state = HSM_ST_LAST; |
5515 | goto fsm_start; | |
5516 | } | |
1da177e4 | 5517 | |
71601958 AL |
5518 | /* Device should not ask for data transfer (DRQ=1) |
5519 | * when it finds something wrong. | |
eee6c32f AL |
5520 | * We ignore DRQ here and stop the HSM by |
5521 | * changing hsm_task_state to HSM_ST_ERR and | |
5522 | * let the EH abort the command or reset the device. | |
71601958 AL |
5523 | */ |
5524 | if (unlikely(status & (ATA_ERR | ATA_DF))) { | |
44877b4e TH |
5525 | ata_port_printk(ap, KERN_WARNING, "DRQ=1 with " |
5526 | "device error, dev_stat 0x%X\n", | |
5527 | status); | |
3655d1d3 | 5528 | qc->err_mask |= AC_ERR_HSM; |
eee6c32f AL |
5529 | ap->hsm_task_state = HSM_ST_ERR; |
5530 | goto fsm_start; | |
71601958 | 5531 | } |
1da177e4 | 5532 | |
e2cec771 | 5533 | atapi_pio_bytes(qc); |
7fb6ec28 | 5534 | |
e2cec771 AL |
5535 | if (unlikely(ap->hsm_task_state == HSM_ST_ERR)) |
5536 | /* bad ireason reported by device */ | |
5537 | goto fsm_start; | |
1da177e4 | 5538 | |
e2cec771 AL |
5539 | } else { |
5540 | /* ATA PIO protocol */ | |
5541 | if (unlikely((status & ATA_DRQ) == 0)) { | |
5542 | /* handle BSY=0, DRQ=0 as error */ | |
3655d1d3 AL |
5543 | if (likely(status & (ATA_ERR | ATA_DF))) |
5544 | /* device stops HSM for abort/error */ | |
5545 | qc->err_mask |= AC_ERR_DEV; | |
5546 | else | |
55a8e2c8 TH |
5547 | /* HSM violation. Let EH handle this. |
5548 | * Phantom devices also trigger this | |
5549 | * condition. Mark hint. | |
5550 | */ | |
5551 | qc->err_mask |= AC_ERR_HSM | | |
5552 | AC_ERR_NODEV_HINT; | |
3655d1d3 | 5553 | |
e2cec771 AL |
5554 | ap->hsm_task_state = HSM_ST_ERR; |
5555 | goto fsm_start; | |
5556 | } | |
1da177e4 | 5557 | |
eee6c32f AL |
5558 | /* For PIO reads, some devices may ask for |
5559 | * data transfer (DRQ=1) alone with ERR=1. | |
5560 | * We respect DRQ here and transfer one | |
5561 | * block of junk data before changing the | |
5562 | * hsm_task_state to HSM_ST_ERR. | |
5563 | * | |
5564 | * For PIO writes, ERR=1 DRQ=1 doesn't make | |
5565 | * sense since the data block has been | |
5566 | * transferred to the device. | |
71601958 AL |
5567 | */ |
5568 | if (unlikely(status & (ATA_ERR | ATA_DF))) { | |
71601958 AL |
5569 | /* data might be corrputed */ |
5570 | qc->err_mask |= AC_ERR_DEV; | |
eee6c32f AL |
5571 | |
5572 | if (!(qc->tf.flags & ATA_TFLAG_WRITE)) { | |
5573 | ata_pio_sectors(qc); | |
eee6c32f AL |
5574 | status = ata_wait_idle(ap); |
5575 | } | |
5576 | ||
3655d1d3 AL |
5577 | if (status & (ATA_BUSY | ATA_DRQ)) |
5578 | qc->err_mask |= AC_ERR_HSM; | |
5579 | ||
eee6c32f AL |
5580 | /* ata_pio_sectors() might change the |
5581 | * state to HSM_ST_LAST. so, the state | |
5582 | * is changed after ata_pio_sectors(). | |
5583 | */ | |
5584 | ap->hsm_task_state = HSM_ST_ERR; | |
5585 | goto fsm_start; | |
71601958 AL |
5586 | } |
5587 | ||
e2cec771 AL |
5588 | ata_pio_sectors(qc); |
5589 | ||
5590 | if (ap->hsm_task_state == HSM_ST_LAST && | |
5591 | (!(qc->tf.flags & ATA_TFLAG_WRITE))) { | |
5592 | /* all data read */ | |
52a32205 | 5593 | status = ata_wait_idle(ap); |
e2cec771 AL |
5594 | goto fsm_start; |
5595 | } | |
5596 | } | |
5597 | ||
bb5cb290 | 5598 | poll_next = 1; |
1da177e4 LT |
5599 | break; |
5600 | ||
14be71f4 | 5601 | case HSM_ST_LAST: |
6912ccd5 AL |
5602 | if (unlikely(!ata_ok(status))) { |
5603 | qc->err_mask |= __ac_err_mask(status); | |
e2cec771 AL |
5604 | ap->hsm_task_state = HSM_ST_ERR; |
5605 | goto fsm_start; | |
5606 | } | |
5607 | ||
5608 | /* no more data to transfer */ | |
4332a771 | 5609 | DPRINTK("ata%u: dev %u command complete, drv_stat 0x%x\n", |
44877b4e | 5610 | ap->print_id, qc->dev->devno, status); |
e2cec771 | 5611 | |
6912ccd5 AL |
5612 | WARN_ON(qc->err_mask); |
5613 | ||
e2cec771 | 5614 | ap->hsm_task_state = HSM_ST_IDLE; |
1da177e4 | 5615 | |
e2cec771 | 5616 | /* complete taskfile transaction */ |
c17ea20d | 5617 | ata_hsm_qc_complete(qc, in_wq); |
bb5cb290 AL |
5618 | |
5619 | poll_next = 0; | |
1da177e4 LT |
5620 | break; |
5621 | ||
14be71f4 | 5622 | case HSM_ST_ERR: |
e2cec771 AL |
5623 | /* make sure qc->err_mask is available to |
5624 | * know what's wrong and recover | |
5625 | */ | |
5626 | WARN_ON(qc->err_mask == 0); | |
5627 | ||
5628 | ap->hsm_task_state = HSM_ST_IDLE; | |
bb5cb290 | 5629 | |
999bb6f4 | 5630 | /* complete taskfile transaction */ |
c17ea20d | 5631 | ata_hsm_qc_complete(qc, in_wq); |
bb5cb290 AL |
5632 | |
5633 | poll_next = 0; | |
e2cec771 AL |
5634 | break; |
5635 | default: | |
bb5cb290 | 5636 | poll_next = 0; |
6912ccd5 | 5637 | BUG(); |
1da177e4 LT |
5638 | } |
5639 | ||
bb5cb290 | 5640 | return poll_next; |
1da177e4 LT |
5641 | } |
5642 | ||
65f27f38 | 5643 | static void ata_pio_task(struct work_struct *work) |
8061f5f0 | 5644 | { |
65f27f38 DH |
5645 | struct ata_port *ap = |
5646 | container_of(work, struct ata_port, port_task.work); | |
5647 | struct ata_queued_cmd *qc = ap->port_task_data; | |
8061f5f0 | 5648 | u8 status; |
a1af3734 | 5649 | int poll_next; |
8061f5f0 | 5650 | |
7fb6ec28 | 5651 | fsm_start: |
a1af3734 | 5652 | WARN_ON(ap->hsm_task_state == HSM_ST_IDLE); |
8061f5f0 | 5653 | |
a1af3734 AL |
5654 | /* |
5655 | * This is purely heuristic. This is a fast path. | |
5656 | * Sometimes when we enter, BSY will be cleared in | |
5657 | * a chk-status or two. If not, the drive is probably seeking | |
5658 | * or something. Snooze for a couple msecs, then | |
5659 | * chk-status again. If still busy, queue delayed work. | |
5660 | */ | |
5661 | status = ata_busy_wait(ap, ATA_BUSY, 5); | |
5662 | if (status & ATA_BUSY) { | |
5663 | msleep(2); | |
5664 | status = ata_busy_wait(ap, ATA_BUSY, 10); | |
5665 | if (status & ATA_BUSY) { | |
31ce6dae | 5666 | ata_port_queue_task(ap, ata_pio_task, qc, ATA_SHORT_PAUSE); |
a1af3734 AL |
5667 | return; |
5668 | } | |
8061f5f0 TH |
5669 | } |
5670 | ||
a1af3734 AL |
5671 | /* move the HSM */ |
5672 | poll_next = ata_hsm_move(ap, qc, status, 1); | |
8061f5f0 | 5673 | |
a1af3734 AL |
5674 | /* another command or interrupt handler |
5675 | * may be running at this point. | |
5676 | */ | |
5677 | if (poll_next) | |
7fb6ec28 | 5678 | goto fsm_start; |
8061f5f0 TH |
5679 | } |
5680 | ||
1da177e4 LT |
5681 | /** |
5682 | * ata_qc_new - Request an available ATA command, for queueing | |
5683 | * @ap: Port associated with device @dev | |
5684 | * @dev: Device from whom we request an available command structure | |
5685 | * | |
5686 | * LOCKING: | |
0cba632b | 5687 | * None. |
1da177e4 LT |
5688 | */ |
5689 | ||
5690 | static struct ata_queued_cmd *ata_qc_new(struct ata_port *ap) | |
5691 | { | |
5692 | struct ata_queued_cmd *qc = NULL; | |
5693 | unsigned int i; | |
5694 | ||
e3180499 | 5695 | /* no command while frozen */ |
b51e9e5d | 5696 | if (unlikely(ap->pflags & ATA_PFLAG_FROZEN)) |
e3180499 TH |
5697 | return NULL; |
5698 | ||
2ab7db1f TH |
5699 | /* the last tag is reserved for internal command. */ |
5700 | for (i = 0; i < ATA_MAX_QUEUE - 1; i++) | |
6cec4a39 | 5701 | if (!test_and_set_bit(i, &ap->qc_allocated)) { |
f69499f4 | 5702 | qc = __ata_qc_from_tag(ap, i); |
1da177e4 LT |
5703 | break; |
5704 | } | |
5705 | ||
5706 | if (qc) | |
5707 | qc->tag = i; | |
5708 | ||
5709 | return qc; | |
5710 | } | |
5711 | ||
5712 | /** | |
5713 | * ata_qc_new_init - Request an available ATA command, and initialize it | |
1da177e4 LT |
5714 | * @dev: Device from whom we request an available command structure |
5715 | * | |
5716 | * LOCKING: | |
0cba632b | 5717 | * None. |
1da177e4 LT |
5718 | */ |
5719 | ||
3373efd8 | 5720 | struct ata_queued_cmd *ata_qc_new_init(struct ata_device *dev) |
1da177e4 | 5721 | { |
9af5c9c9 | 5722 | struct ata_port *ap = dev->link->ap; |
1da177e4 LT |
5723 | struct ata_queued_cmd *qc; |
5724 | ||
5725 | qc = ata_qc_new(ap); | |
5726 | if (qc) { | |
1da177e4 LT |
5727 | qc->scsicmd = NULL; |
5728 | qc->ap = ap; | |
5729 | qc->dev = dev; | |
1da177e4 | 5730 | |
2c13b7ce | 5731 | ata_qc_reinit(qc); |
1da177e4 LT |
5732 | } |
5733 | ||
5734 | return qc; | |
5735 | } | |
5736 | ||
1da177e4 LT |
5737 | /** |
5738 | * ata_qc_free - free unused ata_queued_cmd | |
5739 | * @qc: Command to complete | |
5740 | * | |
5741 | * Designed to free unused ata_queued_cmd object | |
5742 | * in case something prevents using it. | |
5743 | * | |
5744 | * LOCKING: | |
cca3974e | 5745 | * spin_lock_irqsave(host lock) |
1da177e4 LT |
5746 | */ |
5747 | void ata_qc_free(struct ata_queued_cmd *qc) | |
5748 | { | |
4ba946e9 TH |
5749 | struct ata_port *ap = qc->ap; |
5750 | unsigned int tag; | |
5751 | ||
a4631474 | 5752 | WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */ |
1da177e4 | 5753 | |
4ba946e9 TH |
5754 | qc->flags = 0; |
5755 | tag = qc->tag; | |
5756 | if (likely(ata_tag_valid(tag))) { | |
4ba946e9 | 5757 | qc->tag = ATA_TAG_POISON; |
6cec4a39 | 5758 | clear_bit(tag, &ap->qc_allocated); |
4ba946e9 | 5759 | } |
1da177e4 LT |
5760 | } |
5761 | ||
76014427 | 5762 | void __ata_qc_complete(struct ata_queued_cmd *qc) |
1da177e4 | 5763 | { |
dedaf2b0 | 5764 | struct ata_port *ap = qc->ap; |
9af5c9c9 | 5765 | struct ata_link *link = qc->dev->link; |
dedaf2b0 | 5766 | |
a4631474 TH |
5767 | WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */ |
5768 | WARN_ON(!(qc->flags & ATA_QCFLAG_ACTIVE)); | |
1da177e4 LT |
5769 | |
5770 | if (likely(qc->flags & ATA_QCFLAG_DMAMAP)) | |
5771 | ata_sg_clean(qc); | |
5772 | ||
7401abf2 | 5773 | /* command should be marked inactive atomically with qc completion */ |
da917d69 | 5774 | if (qc->tf.protocol == ATA_PROT_NCQ) { |
9af5c9c9 | 5775 | link->sactive &= ~(1 << qc->tag); |
da917d69 TH |
5776 | if (!link->sactive) |
5777 | ap->nr_active_links--; | |
5778 | } else { | |
9af5c9c9 | 5779 | link->active_tag = ATA_TAG_POISON; |
da917d69 TH |
5780 | ap->nr_active_links--; |
5781 | } | |
5782 | ||
5783 | /* clear exclusive status */ | |
5784 | if (unlikely(qc->flags & ATA_QCFLAG_CLEAR_EXCL && | |
5785 | ap->excl_link == link)) | |
5786 | ap->excl_link = NULL; | |
7401abf2 | 5787 | |
3f3791d3 AL |
5788 | /* atapi: mark qc as inactive to prevent the interrupt handler |
5789 | * from completing the command twice later, before the error handler | |
5790 | * is called. (when rc != 0 and atapi request sense is needed) | |
5791 | */ | |
5792 | qc->flags &= ~ATA_QCFLAG_ACTIVE; | |
dedaf2b0 | 5793 | ap->qc_active &= ~(1 << qc->tag); |
3f3791d3 | 5794 | |
1da177e4 | 5795 | /* call completion callback */ |
77853bf2 | 5796 | qc->complete_fn(qc); |
1da177e4 LT |
5797 | } |
5798 | ||
39599a53 TH |
5799 | static void fill_result_tf(struct ata_queued_cmd *qc) |
5800 | { | |
5801 | struct ata_port *ap = qc->ap; | |
5802 | ||
39599a53 | 5803 | qc->result_tf.flags = qc->tf.flags; |
4742d54f | 5804 | ap->ops->tf_read(ap, &qc->result_tf); |
39599a53 TH |
5805 | } |
5806 | ||
f686bcb8 TH |
5807 | /** |
5808 | * ata_qc_complete - Complete an active ATA command | |
5809 | * @qc: Command to complete | |
5810 | * @err_mask: ATA Status register contents | |
5811 | * | |
5812 | * Indicate to the mid and upper layers that an ATA | |
5813 | * command has completed, with either an ok or not-ok status. | |
5814 | * | |
5815 | * LOCKING: | |
cca3974e | 5816 | * spin_lock_irqsave(host lock) |
f686bcb8 TH |
5817 | */ |
5818 | void ata_qc_complete(struct ata_queued_cmd *qc) | |
5819 | { | |
5820 | struct ata_port *ap = qc->ap; | |
5821 | ||
5822 | /* XXX: New EH and old EH use different mechanisms to | |
5823 | * synchronize EH with regular execution path. | |
5824 | * | |
5825 | * In new EH, a failed qc is marked with ATA_QCFLAG_FAILED. | |
5826 | * Normal execution path is responsible for not accessing a | |
5827 | * failed qc. libata core enforces the rule by returning NULL | |
5828 | * from ata_qc_from_tag() for failed qcs. | |
5829 | * | |
5830 | * Old EH depends on ata_qc_complete() nullifying completion | |
5831 | * requests if ATA_QCFLAG_EH_SCHEDULED is set. Old EH does | |
5832 | * not synchronize with interrupt handler. Only PIO task is | |
5833 | * taken care of. | |
5834 | */ | |
5835 | if (ap->ops->error_handler) { | |
4dbfa39b TH |
5836 | struct ata_device *dev = qc->dev; |
5837 | struct ata_eh_info *ehi = &dev->link->eh_info; | |
5838 | ||
b51e9e5d | 5839 | WARN_ON(ap->pflags & ATA_PFLAG_FROZEN); |
f686bcb8 TH |
5840 | |
5841 | if (unlikely(qc->err_mask)) | |
5842 | qc->flags |= ATA_QCFLAG_FAILED; | |
5843 | ||
5844 | if (unlikely(qc->flags & ATA_QCFLAG_FAILED)) { | |
5845 | if (!ata_tag_internal(qc->tag)) { | |
5846 | /* always fill result TF for failed qc */ | |
39599a53 | 5847 | fill_result_tf(qc); |
f686bcb8 TH |
5848 | ata_qc_schedule_eh(qc); |
5849 | return; | |
5850 | } | |
5851 | } | |
5852 | ||
5853 | /* read result TF if requested */ | |
5854 | if (qc->flags & ATA_QCFLAG_RESULT_TF) | |
39599a53 | 5855 | fill_result_tf(qc); |
f686bcb8 | 5856 | |
4dbfa39b TH |
5857 | /* Some commands need post-processing after successful |
5858 | * completion. | |
5859 | */ | |
5860 | switch (qc->tf.command) { | |
5861 | case ATA_CMD_SET_FEATURES: | |
5862 | if (qc->tf.feature != SETFEATURES_WC_ON && | |
5863 | qc->tf.feature != SETFEATURES_WC_OFF) | |
5864 | break; | |
5865 | /* fall through */ | |
5866 | case ATA_CMD_INIT_DEV_PARAMS: /* CHS translation changed */ | |
5867 | case ATA_CMD_SET_MULTI: /* multi_count changed */ | |
5868 | /* revalidate device */ | |
5869 | ehi->dev_action[dev->devno] |= ATA_EH_REVALIDATE; | |
5870 | ata_port_schedule_eh(ap); | |
5871 | break; | |
054a5fba TH |
5872 | |
5873 | case ATA_CMD_SLEEP: | |
5874 | dev->flags |= ATA_DFLAG_SLEEPING; | |
5875 | break; | |
4dbfa39b TH |
5876 | } |
5877 | ||
f686bcb8 TH |
5878 | __ata_qc_complete(qc); |
5879 | } else { | |
5880 | if (qc->flags & ATA_QCFLAG_EH_SCHEDULED) | |
5881 | return; | |
5882 | ||
5883 | /* read result TF if failed or requested */ | |
5884 | if (qc->err_mask || qc->flags & ATA_QCFLAG_RESULT_TF) | |
39599a53 | 5885 | fill_result_tf(qc); |
f686bcb8 TH |
5886 | |
5887 | __ata_qc_complete(qc); | |
5888 | } | |
5889 | } | |
5890 | ||
dedaf2b0 TH |
5891 | /** |
5892 | * ata_qc_complete_multiple - Complete multiple qcs successfully | |
5893 | * @ap: port in question | |
5894 | * @qc_active: new qc_active mask | |
5895 | * @finish_qc: LLDD callback invoked before completing a qc | |
5896 | * | |
5897 | * Complete in-flight commands. This functions is meant to be | |
5898 | * called from low-level driver's interrupt routine to complete | |
5899 | * requests normally. ap->qc_active and @qc_active is compared | |
5900 | * and commands are completed accordingly. | |
5901 | * | |
5902 | * LOCKING: | |
cca3974e | 5903 | * spin_lock_irqsave(host lock) |
dedaf2b0 TH |
5904 | * |
5905 | * RETURNS: | |
5906 | * Number of completed commands on success, -errno otherwise. | |
5907 | */ | |
5908 | int ata_qc_complete_multiple(struct ata_port *ap, u32 qc_active, | |
5909 | void (*finish_qc)(struct ata_queued_cmd *)) | |
5910 | { | |
5911 | int nr_done = 0; | |
5912 | u32 done_mask; | |
5913 | int i; | |
5914 | ||
5915 | done_mask = ap->qc_active ^ qc_active; | |
5916 | ||
5917 | if (unlikely(done_mask & qc_active)) { | |
5918 | ata_port_printk(ap, KERN_ERR, "illegal qc_active transition " | |
5919 | "(%08x->%08x)\n", ap->qc_active, qc_active); | |
5920 | return -EINVAL; | |
5921 | } | |
5922 | ||
5923 | for (i = 0; i < ATA_MAX_QUEUE; i++) { | |
5924 | struct ata_queued_cmd *qc; | |
5925 | ||
5926 | if (!(done_mask & (1 << i))) | |
5927 | continue; | |
5928 | ||
5929 | if ((qc = ata_qc_from_tag(ap, i))) { | |
5930 | if (finish_qc) | |
5931 | finish_qc(qc); | |
5932 | ata_qc_complete(qc); | |
5933 | nr_done++; | |
5934 | } | |
5935 | } | |
5936 | ||
5937 | return nr_done; | |
5938 | } | |
5939 | ||
1da177e4 LT |
5940 | static inline int ata_should_dma_map(struct ata_queued_cmd *qc) |
5941 | { | |
5942 | struct ata_port *ap = qc->ap; | |
5943 | ||
5944 | switch (qc->tf.protocol) { | |
3dc1d881 | 5945 | case ATA_PROT_NCQ: |
1da177e4 LT |
5946 | case ATA_PROT_DMA: |
5947 | case ATA_PROT_ATAPI_DMA: | |
5948 | return 1; | |
5949 | ||
5950 | case ATA_PROT_ATAPI: | |
5951 | case ATA_PROT_PIO: | |
1da177e4 LT |
5952 | if (ap->flags & ATA_FLAG_PIO_DMA) |
5953 | return 1; | |
5954 | ||
5955 | /* fall through */ | |
5956 | ||
5957 | default: | |
5958 | return 0; | |
5959 | } | |
5960 | ||
5961 | /* never reached */ | |
5962 | } | |
5963 | ||
5964 | /** | |
5965 | * ata_qc_issue - issue taskfile to device | |
5966 | * @qc: command to issue to device | |
5967 | * | |
5968 | * Prepare an ATA command to submission to device. | |
5969 | * This includes mapping the data into a DMA-able | |
5970 | * area, filling in the S/G table, and finally | |
5971 | * writing the taskfile to hardware, starting the command. | |
5972 | * | |
5973 | * LOCKING: | |
cca3974e | 5974 | * spin_lock_irqsave(host lock) |
1da177e4 | 5975 | */ |
8e0e694a | 5976 | void ata_qc_issue(struct ata_queued_cmd *qc) |
1da177e4 LT |
5977 | { |
5978 | struct ata_port *ap = qc->ap; | |
9af5c9c9 | 5979 | struct ata_link *link = qc->dev->link; |
1da177e4 | 5980 | |
dedaf2b0 TH |
5981 | /* Make sure only one non-NCQ command is outstanding. The |
5982 | * check is skipped for old EH because it reuses active qc to | |
5983 | * request ATAPI sense. | |
5984 | */ | |
9af5c9c9 | 5985 | WARN_ON(ap->ops->error_handler && ata_tag_valid(link->active_tag)); |
dedaf2b0 TH |
5986 | |
5987 | if (qc->tf.protocol == ATA_PROT_NCQ) { | |
9af5c9c9 | 5988 | WARN_ON(link->sactive & (1 << qc->tag)); |
da917d69 TH |
5989 | |
5990 | if (!link->sactive) | |
5991 | ap->nr_active_links++; | |
9af5c9c9 | 5992 | link->sactive |= 1 << qc->tag; |
dedaf2b0 | 5993 | } else { |
9af5c9c9 | 5994 | WARN_ON(link->sactive); |
da917d69 TH |
5995 | |
5996 | ap->nr_active_links++; | |
9af5c9c9 | 5997 | link->active_tag = qc->tag; |
dedaf2b0 TH |
5998 | } |
5999 | ||
e4a70e76 | 6000 | qc->flags |= ATA_QCFLAG_ACTIVE; |
dedaf2b0 | 6001 | ap->qc_active |= 1 << qc->tag; |
e4a70e76 | 6002 | |
1da177e4 LT |
6003 | if (ata_should_dma_map(qc)) { |
6004 | if (qc->flags & ATA_QCFLAG_SG) { | |
6005 | if (ata_sg_setup(qc)) | |
8e436af9 | 6006 | goto sg_err; |
1da177e4 LT |
6007 | } else if (qc->flags & ATA_QCFLAG_SINGLE) { |
6008 | if (ata_sg_setup_one(qc)) | |
8e436af9 | 6009 | goto sg_err; |
1da177e4 LT |
6010 | } |
6011 | } else { | |
6012 | qc->flags &= ~ATA_QCFLAG_DMAMAP; | |
6013 | } | |
6014 | ||
054a5fba TH |
6015 | /* if device is sleeping, schedule softreset and abort the link */ |
6016 | if (unlikely(qc->dev->flags & ATA_DFLAG_SLEEPING)) { | |
6017 | link->eh_info.action |= ATA_EH_SOFTRESET; | |
6018 | ata_ehi_push_desc(&link->eh_info, "waking up from sleep"); | |
6019 | ata_link_abort(link); | |
6020 | return; | |
6021 | } | |
6022 | ||
1da177e4 LT |
6023 | ap->ops->qc_prep(qc); |
6024 | ||
8e0e694a TH |
6025 | qc->err_mask |= ap->ops->qc_issue(qc); |
6026 | if (unlikely(qc->err_mask)) | |
6027 | goto err; | |
6028 | return; | |
1da177e4 | 6029 | |
8e436af9 TH |
6030 | sg_err: |
6031 | qc->flags &= ~ATA_QCFLAG_DMAMAP; | |
8e0e694a TH |
6032 | qc->err_mask |= AC_ERR_SYSTEM; |
6033 | err: | |
6034 | ata_qc_complete(qc); | |
1da177e4 LT |
6035 | } |
6036 | ||
6037 | /** | |
6038 | * ata_qc_issue_prot - issue taskfile to device in proto-dependent manner | |
6039 | * @qc: command to issue to device | |
6040 | * | |
6041 | * Using various libata functions and hooks, this function | |
6042 | * starts an ATA command. ATA commands are grouped into | |
6043 | * classes called "protocols", and issuing each type of protocol | |
6044 | * is slightly different. | |
6045 | * | |
0baab86b EF |
6046 | * May be used as the qc_issue() entry in ata_port_operations. |
6047 | * | |
1da177e4 | 6048 | * LOCKING: |
cca3974e | 6049 | * spin_lock_irqsave(host lock) |
1da177e4 LT |
6050 | * |
6051 | * RETURNS: | |
9a3d9eb0 | 6052 | * Zero on success, AC_ERR_* mask on failure |
1da177e4 LT |
6053 | */ |
6054 | ||
9a3d9eb0 | 6055 | unsigned int ata_qc_issue_prot(struct ata_queued_cmd *qc) |
1da177e4 LT |
6056 | { |
6057 | struct ata_port *ap = qc->ap; | |
6058 | ||
e50362ec AL |
6059 | /* Use polling pio if the LLD doesn't handle |
6060 | * interrupt driven pio and atapi CDB interrupt. | |
6061 | */ | |
6062 | if (ap->flags & ATA_FLAG_PIO_POLLING) { | |
6063 | switch (qc->tf.protocol) { | |
6064 | case ATA_PROT_PIO: | |
e3472cbe | 6065 | case ATA_PROT_NODATA: |
e50362ec AL |
6066 | case ATA_PROT_ATAPI: |
6067 | case ATA_PROT_ATAPI_NODATA: | |
6068 | qc->tf.flags |= ATA_TFLAG_POLLING; | |
6069 | break; | |
6070 | case ATA_PROT_ATAPI_DMA: | |
6071 | if (qc->dev->flags & ATA_DFLAG_CDB_INTR) | |
3a778275 | 6072 | /* see ata_dma_blacklisted() */ |
e50362ec AL |
6073 | BUG(); |
6074 | break; | |
6075 | default: | |
6076 | break; | |
6077 | } | |
6078 | } | |
6079 | ||
312f7da2 | 6080 | /* select the device */ |
1da177e4 LT |
6081 | ata_dev_select(ap, qc->dev->devno, 1, 0); |
6082 | ||
312f7da2 | 6083 | /* start the command */ |
1da177e4 LT |
6084 | switch (qc->tf.protocol) { |
6085 | case ATA_PROT_NODATA: | |
312f7da2 AL |
6086 | if (qc->tf.flags & ATA_TFLAG_POLLING) |
6087 | ata_qc_set_polling(qc); | |
6088 | ||
e5338254 | 6089 | ata_tf_to_host(ap, &qc->tf); |
312f7da2 AL |
6090 | ap->hsm_task_state = HSM_ST_LAST; |
6091 | ||
6092 | if (qc->tf.flags & ATA_TFLAG_POLLING) | |
31ce6dae | 6093 | ata_port_queue_task(ap, ata_pio_task, qc, 0); |
312f7da2 | 6094 | |
1da177e4 LT |
6095 | break; |
6096 | ||
6097 | case ATA_PROT_DMA: | |
587005de | 6098 | WARN_ON(qc->tf.flags & ATA_TFLAG_POLLING); |
312f7da2 | 6099 | |
1da177e4 LT |
6100 | ap->ops->tf_load(ap, &qc->tf); /* load tf registers */ |
6101 | ap->ops->bmdma_setup(qc); /* set up bmdma */ | |
6102 | ap->ops->bmdma_start(qc); /* initiate bmdma */ | |
312f7da2 | 6103 | ap->hsm_task_state = HSM_ST_LAST; |
1da177e4 LT |
6104 | break; |
6105 | ||
312f7da2 AL |
6106 | case ATA_PROT_PIO: |
6107 | if (qc->tf.flags & ATA_TFLAG_POLLING) | |
6108 | ata_qc_set_polling(qc); | |
1da177e4 | 6109 | |
e5338254 | 6110 | ata_tf_to_host(ap, &qc->tf); |
312f7da2 | 6111 | |
54f00389 AL |
6112 | if (qc->tf.flags & ATA_TFLAG_WRITE) { |
6113 | /* PIO data out protocol */ | |
6114 | ap->hsm_task_state = HSM_ST_FIRST; | |
31ce6dae | 6115 | ata_port_queue_task(ap, ata_pio_task, qc, 0); |
54f00389 AL |
6116 | |
6117 | /* always send first data block using | |
e27486db | 6118 | * the ata_pio_task() codepath. |
54f00389 | 6119 | */ |
312f7da2 | 6120 | } else { |
54f00389 AL |
6121 | /* PIO data in protocol */ |
6122 | ap->hsm_task_state = HSM_ST; | |
6123 | ||
6124 | if (qc->tf.flags & ATA_TFLAG_POLLING) | |
31ce6dae | 6125 | ata_port_queue_task(ap, ata_pio_task, qc, 0); |
54f00389 AL |
6126 | |
6127 | /* if polling, ata_pio_task() handles the rest. | |
6128 | * otherwise, interrupt handler takes over from here. | |
6129 | */ | |
312f7da2 AL |
6130 | } |
6131 | ||
1da177e4 LT |
6132 | break; |
6133 | ||
1da177e4 | 6134 | case ATA_PROT_ATAPI: |
1da177e4 | 6135 | case ATA_PROT_ATAPI_NODATA: |
312f7da2 AL |
6136 | if (qc->tf.flags & ATA_TFLAG_POLLING) |
6137 | ata_qc_set_polling(qc); | |
6138 | ||
e5338254 | 6139 | ata_tf_to_host(ap, &qc->tf); |
f6ef65e6 | 6140 | |
312f7da2 AL |
6141 | ap->hsm_task_state = HSM_ST_FIRST; |
6142 | ||
6143 | /* send cdb by polling if no cdb interrupt */ | |
6144 | if ((!(qc->dev->flags & ATA_DFLAG_CDB_INTR)) || | |
6145 | (qc->tf.flags & ATA_TFLAG_POLLING)) | |
31ce6dae | 6146 | ata_port_queue_task(ap, ata_pio_task, qc, 0); |
1da177e4 LT |
6147 | break; |
6148 | ||
6149 | case ATA_PROT_ATAPI_DMA: | |
587005de | 6150 | WARN_ON(qc->tf.flags & ATA_TFLAG_POLLING); |
312f7da2 | 6151 | |
1da177e4 LT |
6152 | ap->ops->tf_load(ap, &qc->tf); /* load tf registers */ |
6153 | ap->ops->bmdma_setup(qc); /* set up bmdma */ | |
312f7da2 AL |
6154 | ap->hsm_task_state = HSM_ST_FIRST; |
6155 | ||
6156 | /* send cdb by polling if no cdb interrupt */ | |
6157 | if (!(qc->dev->flags & ATA_DFLAG_CDB_INTR)) | |
31ce6dae | 6158 | ata_port_queue_task(ap, ata_pio_task, qc, 0); |
1da177e4 LT |
6159 | break; |
6160 | ||
6161 | default: | |
6162 | WARN_ON(1); | |
9a3d9eb0 | 6163 | return AC_ERR_SYSTEM; |
1da177e4 LT |
6164 | } |
6165 | ||
6166 | return 0; | |
6167 | } | |
6168 | ||
1da177e4 LT |
6169 | /** |
6170 | * ata_host_intr - Handle host interrupt for given (port, task) | |
6171 | * @ap: Port on which interrupt arrived (possibly...) | |
6172 | * @qc: Taskfile currently active in engine | |
6173 | * | |
6174 | * Handle host interrupt for given queued command. Currently, | |
6175 | * only DMA interrupts are handled. All other commands are | |
6176 | * handled via polling with interrupts disabled (nIEN bit). | |
6177 | * | |
6178 | * LOCKING: | |
cca3974e | 6179 | * spin_lock_irqsave(host lock) |
1da177e4 LT |
6180 | * |
6181 | * RETURNS: | |
6182 | * One if interrupt was handled, zero if not (shared irq). | |
6183 | */ | |
6184 | ||
2dcb407e JG |
6185 | inline unsigned int ata_host_intr(struct ata_port *ap, |
6186 | struct ata_queued_cmd *qc) | |
1da177e4 | 6187 | { |
9af5c9c9 | 6188 | struct ata_eh_info *ehi = &ap->link.eh_info; |
312f7da2 | 6189 | u8 status, host_stat = 0; |
1da177e4 | 6190 | |
312f7da2 | 6191 | VPRINTK("ata%u: protocol %d task_state %d\n", |
44877b4e | 6192 | ap->print_id, qc->tf.protocol, ap->hsm_task_state); |
1da177e4 | 6193 | |
312f7da2 AL |
6194 | /* Check whether we are expecting interrupt in this state */ |
6195 | switch (ap->hsm_task_state) { | |
6196 | case HSM_ST_FIRST: | |
6912ccd5 AL |
6197 | /* Some pre-ATAPI-4 devices assert INTRQ |
6198 | * at this state when ready to receive CDB. | |
6199 | */ | |
1da177e4 | 6200 | |
312f7da2 AL |
6201 | /* Check the ATA_DFLAG_CDB_INTR flag is enough here. |
6202 | * The flag was turned on only for atapi devices. | |
6203 | * No need to check is_atapi_taskfile(&qc->tf) again. | |
6204 | */ | |
6205 | if (!(qc->dev->flags & ATA_DFLAG_CDB_INTR)) | |
1da177e4 | 6206 | goto idle_irq; |
1da177e4 | 6207 | break; |
312f7da2 AL |
6208 | case HSM_ST_LAST: |
6209 | if (qc->tf.protocol == ATA_PROT_DMA || | |
6210 | qc->tf.protocol == ATA_PROT_ATAPI_DMA) { | |
6211 | /* check status of DMA engine */ | |
6212 | host_stat = ap->ops->bmdma_status(ap); | |
44877b4e TH |
6213 | VPRINTK("ata%u: host_stat 0x%X\n", |
6214 | ap->print_id, host_stat); | |
312f7da2 AL |
6215 | |
6216 | /* if it's not our irq... */ | |
6217 | if (!(host_stat & ATA_DMA_INTR)) | |
6218 | goto idle_irq; | |
6219 | ||
6220 | /* before we do anything else, clear DMA-Start bit */ | |
6221 | ap->ops->bmdma_stop(qc); | |
a4f16610 AL |
6222 | |
6223 | if (unlikely(host_stat & ATA_DMA_ERR)) { | |
6224 | /* error when transfering data to/from memory */ | |
6225 | qc->err_mask |= AC_ERR_HOST_BUS; | |
6226 | ap->hsm_task_state = HSM_ST_ERR; | |
6227 | } | |
312f7da2 AL |
6228 | } |
6229 | break; | |
6230 | case HSM_ST: | |
6231 | break; | |
1da177e4 LT |
6232 | default: |
6233 | goto idle_irq; | |
6234 | } | |
6235 | ||
312f7da2 AL |
6236 | /* check altstatus */ |
6237 | status = ata_altstatus(ap); | |
6238 | if (status & ATA_BUSY) | |
6239 | goto idle_irq; | |
1da177e4 | 6240 | |
312f7da2 AL |
6241 | /* check main status, clearing INTRQ */ |
6242 | status = ata_chk_status(ap); | |
6243 | if (unlikely(status & ATA_BUSY)) | |
6244 | goto idle_irq; | |
1da177e4 | 6245 | |
312f7da2 AL |
6246 | /* ack bmdma irq events */ |
6247 | ap->ops->irq_clear(ap); | |
1da177e4 | 6248 | |
bb5cb290 | 6249 | ata_hsm_move(ap, qc, status, 0); |
ea54763f TH |
6250 | |
6251 | if (unlikely(qc->err_mask) && (qc->tf.protocol == ATA_PROT_DMA || | |
6252 | qc->tf.protocol == ATA_PROT_ATAPI_DMA)) | |
6253 | ata_ehi_push_desc(ehi, "BMDMA stat 0x%x", host_stat); | |
6254 | ||
1da177e4 LT |
6255 | return 1; /* irq handled */ |
6256 | ||
6257 | idle_irq: | |
6258 | ap->stats.idle_irq++; | |
6259 | ||
6260 | #ifdef ATA_IRQ_TRAP | |
6261 | if ((ap->stats.idle_irq % 1000) == 0) { | |
6d32d30f JG |
6262 | ata_chk_status(ap); |
6263 | ap->ops->irq_clear(ap); | |
f15a1daf | 6264 | ata_port_printk(ap, KERN_WARNING, "irq trap\n"); |
23cfce89 | 6265 | return 1; |
1da177e4 LT |
6266 | } |
6267 | #endif | |
6268 | return 0; /* irq not handled */ | |
6269 | } | |
6270 | ||
6271 | /** | |
6272 | * ata_interrupt - Default ATA host interrupt handler | |
0cba632b | 6273 | * @irq: irq line (unused) |
cca3974e | 6274 | * @dev_instance: pointer to our ata_host information structure |
1da177e4 | 6275 | * |
0cba632b JG |
6276 | * Default interrupt handler for PCI IDE devices. Calls |
6277 | * ata_host_intr() for each port that is not disabled. | |
6278 | * | |
1da177e4 | 6279 | * LOCKING: |
cca3974e | 6280 | * Obtains host lock during operation. |
1da177e4 LT |
6281 | * |
6282 | * RETURNS: | |
0cba632b | 6283 | * IRQ_NONE or IRQ_HANDLED. |
1da177e4 LT |
6284 | */ |
6285 | ||
2dcb407e | 6286 | irqreturn_t ata_interrupt(int irq, void *dev_instance) |
1da177e4 | 6287 | { |
cca3974e | 6288 | struct ata_host *host = dev_instance; |
1da177e4 LT |
6289 | unsigned int i; |
6290 | unsigned int handled = 0; | |
6291 | unsigned long flags; | |
6292 | ||
6293 | /* TODO: make _irqsave conditional on x86 PCI IDE legacy mode */ | |
cca3974e | 6294 | spin_lock_irqsave(&host->lock, flags); |
1da177e4 | 6295 | |
cca3974e | 6296 | for (i = 0; i < host->n_ports; i++) { |
1da177e4 LT |
6297 | struct ata_port *ap; |
6298 | ||
cca3974e | 6299 | ap = host->ports[i]; |
c1389503 | 6300 | if (ap && |
029f5468 | 6301 | !(ap->flags & ATA_FLAG_DISABLED)) { |
1da177e4 LT |
6302 | struct ata_queued_cmd *qc; |
6303 | ||
9af5c9c9 | 6304 | qc = ata_qc_from_tag(ap, ap->link.active_tag); |
312f7da2 | 6305 | if (qc && (!(qc->tf.flags & ATA_TFLAG_POLLING)) && |
21b1ed74 | 6306 | (qc->flags & ATA_QCFLAG_ACTIVE)) |
1da177e4 LT |
6307 | handled |= ata_host_intr(ap, qc); |
6308 | } | |
6309 | } | |
6310 | ||
cca3974e | 6311 | spin_unlock_irqrestore(&host->lock, flags); |
1da177e4 LT |
6312 | |
6313 | return IRQ_RETVAL(handled); | |
6314 | } | |
6315 | ||
34bf2170 TH |
6316 | /** |
6317 | * sata_scr_valid - test whether SCRs are accessible | |
936fd732 | 6318 | * @link: ATA link to test SCR accessibility for |
34bf2170 | 6319 | * |
936fd732 | 6320 | * Test whether SCRs are accessible for @link. |
34bf2170 TH |
6321 | * |
6322 | * LOCKING: | |
6323 | * None. | |
6324 | * | |
6325 | * RETURNS: | |
6326 | * 1 if SCRs are accessible, 0 otherwise. | |
6327 | */ | |
936fd732 | 6328 | int sata_scr_valid(struct ata_link *link) |
34bf2170 | 6329 | { |
936fd732 TH |
6330 | struct ata_port *ap = link->ap; |
6331 | ||
a16abc0b | 6332 | return (ap->flags & ATA_FLAG_SATA) && ap->ops->scr_read; |
34bf2170 TH |
6333 | } |
6334 | ||
6335 | /** | |
6336 | * sata_scr_read - read SCR register of the specified port | |
936fd732 | 6337 | * @link: ATA link to read SCR for |
34bf2170 TH |
6338 | * @reg: SCR to read |
6339 | * @val: Place to store read value | |
6340 | * | |
936fd732 | 6341 | * Read SCR register @reg of @link into *@val. This function is |
633273a3 TH |
6342 | * guaranteed to succeed if @link is ap->link, the cable type of |
6343 | * the port is SATA and the port implements ->scr_read. | |
34bf2170 TH |
6344 | * |
6345 | * LOCKING: | |
633273a3 | 6346 | * None if @link is ap->link. Kernel thread context otherwise. |
34bf2170 TH |
6347 | * |
6348 | * RETURNS: | |
6349 | * 0 on success, negative errno on failure. | |
6350 | */ | |
936fd732 | 6351 | int sata_scr_read(struct ata_link *link, int reg, u32 *val) |
34bf2170 | 6352 | { |
633273a3 TH |
6353 | if (ata_is_host_link(link)) { |
6354 | struct ata_port *ap = link->ap; | |
936fd732 | 6355 | |
633273a3 TH |
6356 | if (sata_scr_valid(link)) |
6357 | return ap->ops->scr_read(ap, reg, val); | |
6358 | return -EOPNOTSUPP; | |
6359 | } | |
6360 | ||
6361 | return sata_pmp_scr_read(link, reg, val); | |
34bf2170 TH |
6362 | } |
6363 | ||
6364 | /** | |
6365 | * sata_scr_write - write SCR register of the specified port | |
936fd732 | 6366 | * @link: ATA link to write SCR for |
34bf2170 TH |
6367 | * @reg: SCR to write |
6368 | * @val: value to write | |
6369 | * | |
936fd732 | 6370 | * Write @val to SCR register @reg of @link. This function is |
633273a3 TH |
6371 | * guaranteed to succeed if @link is ap->link, the cable type of |
6372 | * the port is SATA and the port implements ->scr_read. | |
34bf2170 TH |
6373 | * |
6374 | * LOCKING: | |
633273a3 | 6375 | * None if @link is ap->link. Kernel thread context otherwise. |
34bf2170 TH |
6376 | * |
6377 | * RETURNS: | |
6378 | * 0 on success, negative errno on failure. | |
6379 | */ | |
936fd732 | 6380 | int sata_scr_write(struct ata_link *link, int reg, u32 val) |
34bf2170 | 6381 | { |
633273a3 TH |
6382 | if (ata_is_host_link(link)) { |
6383 | struct ata_port *ap = link->ap; | |
6384 | ||
6385 | if (sata_scr_valid(link)) | |
6386 | return ap->ops->scr_write(ap, reg, val); | |
6387 | return -EOPNOTSUPP; | |
6388 | } | |
936fd732 | 6389 | |
633273a3 | 6390 | return sata_pmp_scr_write(link, reg, val); |
34bf2170 TH |
6391 | } |
6392 | ||
6393 | /** | |
6394 | * sata_scr_write_flush - write SCR register of the specified port and flush | |
936fd732 | 6395 | * @link: ATA link to write SCR for |
34bf2170 TH |
6396 | * @reg: SCR to write |
6397 | * @val: value to write | |
6398 | * | |
6399 | * This function is identical to sata_scr_write() except that this | |
6400 | * function performs flush after writing to the register. | |
6401 | * | |
6402 | * LOCKING: | |
633273a3 | 6403 | * None if @link is ap->link. Kernel thread context otherwise. |
34bf2170 TH |
6404 | * |
6405 | * RETURNS: | |
6406 | * 0 on success, negative errno on failure. | |
6407 | */ | |
936fd732 | 6408 | int sata_scr_write_flush(struct ata_link *link, int reg, u32 val) |
34bf2170 | 6409 | { |
633273a3 TH |
6410 | if (ata_is_host_link(link)) { |
6411 | struct ata_port *ap = link->ap; | |
6412 | int rc; | |
da3dbb17 | 6413 | |
633273a3 TH |
6414 | if (sata_scr_valid(link)) { |
6415 | rc = ap->ops->scr_write(ap, reg, val); | |
6416 | if (rc == 0) | |
6417 | rc = ap->ops->scr_read(ap, reg, &val); | |
6418 | return rc; | |
6419 | } | |
6420 | return -EOPNOTSUPP; | |
34bf2170 | 6421 | } |
633273a3 TH |
6422 | |
6423 | return sata_pmp_scr_write(link, reg, val); | |
34bf2170 TH |
6424 | } |
6425 | ||
6426 | /** | |
936fd732 TH |
6427 | * ata_link_online - test whether the given link is online |
6428 | * @link: ATA link to test | |
34bf2170 | 6429 | * |
936fd732 TH |
6430 | * Test whether @link is online. Note that this function returns |
6431 | * 0 if online status of @link cannot be obtained, so | |
6432 | * ata_link_online(link) != !ata_link_offline(link). | |
34bf2170 TH |
6433 | * |
6434 | * LOCKING: | |
6435 | * None. | |
6436 | * | |
6437 | * RETURNS: | |
6438 | * 1 if the port online status is available and online. | |
6439 | */ | |
936fd732 | 6440 | int ata_link_online(struct ata_link *link) |
34bf2170 TH |
6441 | { |
6442 | u32 sstatus; | |
6443 | ||
936fd732 TH |
6444 | if (sata_scr_read(link, SCR_STATUS, &sstatus) == 0 && |
6445 | (sstatus & 0xf) == 0x3) | |
34bf2170 TH |
6446 | return 1; |
6447 | return 0; | |
6448 | } | |
6449 | ||
6450 | /** | |
936fd732 TH |
6451 | * ata_link_offline - test whether the given link is offline |
6452 | * @link: ATA link to test | |
34bf2170 | 6453 | * |
936fd732 TH |
6454 | * Test whether @link is offline. Note that this function |
6455 | * returns 0 if offline status of @link cannot be obtained, so | |
6456 | * ata_link_online(link) != !ata_link_offline(link). | |
34bf2170 TH |
6457 | * |
6458 | * LOCKING: | |
6459 | * None. | |
6460 | * | |
6461 | * RETURNS: | |
6462 | * 1 if the port offline status is available and offline. | |
6463 | */ | |
936fd732 | 6464 | int ata_link_offline(struct ata_link *link) |
34bf2170 TH |
6465 | { |
6466 | u32 sstatus; | |
6467 | ||
936fd732 TH |
6468 | if (sata_scr_read(link, SCR_STATUS, &sstatus) == 0 && |
6469 | (sstatus & 0xf) != 0x3) | |
34bf2170 TH |
6470 | return 1; |
6471 | return 0; | |
6472 | } | |
0baab86b | 6473 | |
77b08fb5 | 6474 | int ata_flush_cache(struct ata_device *dev) |
9b847548 | 6475 | { |
977e6b9f | 6476 | unsigned int err_mask; |
9b847548 JA |
6477 | u8 cmd; |
6478 | ||
6479 | if (!ata_try_flush_cache(dev)) | |
6480 | return 0; | |
6481 | ||
6fc49adb | 6482 | if (dev->flags & ATA_DFLAG_FLUSH_EXT) |
9b847548 JA |
6483 | cmd = ATA_CMD_FLUSH_EXT; |
6484 | else | |
6485 | cmd = ATA_CMD_FLUSH; | |
6486 | ||
4f34337b AC |
6487 | /* This is wrong. On a failed flush we get back the LBA of the lost |
6488 | sector and we should (assuming it wasn't aborted as unknown) issue | |
2dcb407e | 6489 | a further flush command to continue the writeback until it |
4f34337b | 6490 | does not error */ |
977e6b9f TH |
6491 | err_mask = ata_do_simple_cmd(dev, cmd); |
6492 | if (err_mask) { | |
6493 | ata_dev_printk(dev, KERN_ERR, "failed to flush cache\n"); | |
6494 | return -EIO; | |
6495 | } | |
6496 | ||
6497 | return 0; | |
9b847548 JA |
6498 | } |
6499 | ||
6ffa01d8 | 6500 | #ifdef CONFIG_PM |
cca3974e JG |
6501 | static int ata_host_request_pm(struct ata_host *host, pm_message_t mesg, |
6502 | unsigned int action, unsigned int ehi_flags, | |
6503 | int wait) | |
500530f6 TH |
6504 | { |
6505 | unsigned long flags; | |
6506 | int i, rc; | |
6507 | ||
cca3974e JG |
6508 | for (i = 0; i < host->n_ports; i++) { |
6509 | struct ata_port *ap = host->ports[i]; | |
e3667ebf | 6510 | struct ata_link *link; |
500530f6 TH |
6511 | |
6512 | /* Previous resume operation might still be in | |
6513 | * progress. Wait for PM_PENDING to clear. | |
6514 | */ | |
6515 | if (ap->pflags & ATA_PFLAG_PM_PENDING) { | |
6516 | ata_port_wait_eh(ap); | |
6517 | WARN_ON(ap->pflags & ATA_PFLAG_PM_PENDING); | |
6518 | } | |
6519 | ||
6520 | /* request PM ops to EH */ | |
6521 | spin_lock_irqsave(ap->lock, flags); | |
6522 | ||
6523 | ap->pm_mesg = mesg; | |
6524 | if (wait) { | |
6525 | rc = 0; | |
6526 | ap->pm_result = &rc; | |
6527 | } | |
6528 | ||
6529 | ap->pflags |= ATA_PFLAG_PM_PENDING; | |
e3667ebf TH |
6530 | __ata_port_for_each_link(link, ap) { |
6531 | link->eh_info.action |= action; | |
6532 | link->eh_info.flags |= ehi_flags; | |
6533 | } | |
500530f6 TH |
6534 | |
6535 | ata_port_schedule_eh(ap); | |
6536 | ||
6537 | spin_unlock_irqrestore(ap->lock, flags); | |
6538 | ||
6539 | /* wait and check result */ | |
6540 | if (wait) { | |
6541 | ata_port_wait_eh(ap); | |
6542 | WARN_ON(ap->pflags & ATA_PFLAG_PM_PENDING); | |
6543 | if (rc) | |
6544 | return rc; | |
6545 | } | |
6546 | } | |
6547 | ||
6548 | return 0; | |
6549 | } | |
6550 | ||
6551 | /** | |
cca3974e JG |
6552 | * ata_host_suspend - suspend host |
6553 | * @host: host to suspend | |
500530f6 TH |
6554 | * @mesg: PM message |
6555 | * | |
cca3974e | 6556 | * Suspend @host. Actual operation is performed by EH. This |
500530f6 TH |
6557 | * function requests EH to perform PM operations and waits for EH |
6558 | * to finish. | |
6559 | * | |
6560 | * LOCKING: | |
6561 | * Kernel thread context (may sleep). | |
6562 | * | |
6563 | * RETURNS: | |
6564 | * 0 on success, -errno on failure. | |
6565 | */ | |
cca3974e | 6566 | int ata_host_suspend(struct ata_host *host, pm_message_t mesg) |
500530f6 | 6567 | { |
9666f400 | 6568 | int rc; |
500530f6 | 6569 | |
ca77329f KCA |
6570 | /* |
6571 | * disable link pm on all ports before requesting | |
6572 | * any pm activity | |
6573 | */ | |
6574 | ata_lpm_enable(host); | |
6575 | ||
cca3974e | 6576 | rc = ata_host_request_pm(host, mesg, 0, ATA_EHI_QUIET, 1); |
9666f400 TH |
6577 | if (rc == 0) |
6578 | host->dev->power.power_state = mesg; | |
500530f6 TH |
6579 | return rc; |
6580 | } | |
6581 | ||
6582 | /** | |
cca3974e JG |
6583 | * ata_host_resume - resume host |
6584 | * @host: host to resume | |
500530f6 | 6585 | * |
cca3974e | 6586 | * Resume @host. Actual operation is performed by EH. This |
500530f6 TH |
6587 | * function requests EH to perform PM operations and returns. |
6588 | * Note that all resume operations are performed parallely. | |
6589 | * | |
6590 | * LOCKING: | |
6591 | * Kernel thread context (may sleep). | |
6592 | */ | |
cca3974e | 6593 | void ata_host_resume(struct ata_host *host) |
500530f6 | 6594 | { |
cca3974e JG |
6595 | ata_host_request_pm(host, PMSG_ON, ATA_EH_SOFTRESET, |
6596 | ATA_EHI_NO_AUTOPSY | ATA_EHI_QUIET, 0); | |
6597 | host->dev->power.power_state = PMSG_ON; | |
ca77329f KCA |
6598 | |
6599 | /* reenable link pm */ | |
6600 | ata_lpm_disable(host); | |
500530f6 | 6601 | } |
6ffa01d8 | 6602 | #endif |
500530f6 | 6603 | |
c893a3ae RD |
6604 | /** |
6605 | * ata_port_start - Set port up for dma. | |
6606 | * @ap: Port to initialize | |
6607 | * | |
6608 | * Called just after data structures for each port are | |
6609 | * initialized. Allocates space for PRD table. | |
6610 | * | |
6611 | * May be used as the port_start() entry in ata_port_operations. | |
6612 | * | |
6613 | * LOCKING: | |
6614 | * Inherited from caller. | |
6615 | */ | |
f0d36efd | 6616 | int ata_port_start(struct ata_port *ap) |
1da177e4 | 6617 | { |
2f1f610b | 6618 | struct device *dev = ap->dev; |
6037d6bb | 6619 | int rc; |
1da177e4 | 6620 | |
f0d36efd TH |
6621 | ap->prd = dmam_alloc_coherent(dev, ATA_PRD_TBL_SZ, &ap->prd_dma, |
6622 | GFP_KERNEL); | |
1da177e4 LT |
6623 | if (!ap->prd) |
6624 | return -ENOMEM; | |
6625 | ||
6037d6bb | 6626 | rc = ata_pad_alloc(ap, dev); |
f0d36efd | 6627 | if (rc) |
6037d6bb | 6628 | return rc; |
1da177e4 | 6629 | |
f0d36efd TH |
6630 | DPRINTK("prd alloc, virt %p, dma %llx\n", ap->prd, |
6631 | (unsigned long long)ap->prd_dma); | |
1da177e4 LT |
6632 | return 0; |
6633 | } | |
6634 | ||
3ef3b43d TH |
6635 | /** |
6636 | * ata_dev_init - Initialize an ata_device structure | |
6637 | * @dev: Device structure to initialize | |
6638 | * | |
6639 | * Initialize @dev in preparation for probing. | |
6640 | * | |
6641 | * LOCKING: | |
6642 | * Inherited from caller. | |
6643 | */ | |
6644 | void ata_dev_init(struct ata_device *dev) | |
6645 | { | |
9af5c9c9 TH |
6646 | struct ata_link *link = dev->link; |
6647 | struct ata_port *ap = link->ap; | |
72fa4b74 TH |
6648 | unsigned long flags; |
6649 | ||
5a04bf4b | 6650 | /* SATA spd limit is bound to the first device */ |
9af5c9c9 TH |
6651 | link->sata_spd_limit = link->hw_sata_spd_limit; |
6652 | link->sata_spd = 0; | |
5a04bf4b | 6653 | |
72fa4b74 TH |
6654 | /* High bits of dev->flags are used to record warm plug |
6655 | * requests which occur asynchronously. Synchronize using | |
cca3974e | 6656 | * host lock. |
72fa4b74 | 6657 | */ |
ba6a1308 | 6658 | spin_lock_irqsave(ap->lock, flags); |
72fa4b74 | 6659 | dev->flags &= ~ATA_DFLAG_INIT_MASK; |
3dcc323f | 6660 | dev->horkage = 0; |
ba6a1308 | 6661 | spin_unlock_irqrestore(ap->lock, flags); |
3ef3b43d | 6662 | |
72fa4b74 TH |
6663 | memset((void *)dev + ATA_DEVICE_CLEAR_OFFSET, 0, |
6664 | sizeof(*dev) - ATA_DEVICE_CLEAR_OFFSET); | |
3ef3b43d TH |
6665 | dev->pio_mask = UINT_MAX; |
6666 | dev->mwdma_mask = UINT_MAX; | |
6667 | dev->udma_mask = UINT_MAX; | |
6668 | } | |
6669 | ||
4fb37a25 TH |
6670 | /** |
6671 | * ata_link_init - Initialize an ata_link structure | |
6672 | * @ap: ATA port link is attached to | |
6673 | * @link: Link structure to initialize | |
8989805d | 6674 | * @pmp: Port multiplier port number |
4fb37a25 TH |
6675 | * |
6676 | * Initialize @link. | |
6677 | * | |
6678 | * LOCKING: | |
6679 | * Kernel thread context (may sleep) | |
6680 | */ | |
fb7fd614 | 6681 | void ata_link_init(struct ata_port *ap, struct ata_link *link, int pmp) |
4fb37a25 TH |
6682 | { |
6683 | int i; | |
6684 | ||
6685 | /* clear everything except for devices */ | |
6686 | memset(link, 0, offsetof(struct ata_link, device[0])); | |
6687 | ||
6688 | link->ap = ap; | |
8989805d | 6689 | link->pmp = pmp; |
4fb37a25 TH |
6690 | link->active_tag = ATA_TAG_POISON; |
6691 | link->hw_sata_spd_limit = UINT_MAX; | |
6692 | ||
6693 | /* can't use iterator, ap isn't initialized yet */ | |
6694 | for (i = 0; i < ATA_MAX_DEVICES; i++) { | |
6695 | struct ata_device *dev = &link->device[i]; | |
6696 | ||
6697 | dev->link = link; | |
6698 | dev->devno = dev - link->device; | |
6699 | ata_dev_init(dev); | |
6700 | } | |
6701 | } | |
6702 | ||
6703 | /** | |
6704 | * sata_link_init_spd - Initialize link->sata_spd_limit | |
6705 | * @link: Link to configure sata_spd_limit for | |
6706 | * | |
6707 | * Initialize @link->[hw_]sata_spd_limit to the currently | |
6708 | * configured value. | |
6709 | * | |
6710 | * LOCKING: | |
6711 | * Kernel thread context (may sleep). | |
6712 | * | |
6713 | * RETURNS: | |
6714 | * 0 on success, -errno on failure. | |
6715 | */ | |
fb7fd614 | 6716 | int sata_link_init_spd(struct ata_link *link) |
4fb37a25 TH |
6717 | { |
6718 | u32 scontrol, spd; | |
6719 | int rc; | |
6720 | ||
6721 | rc = sata_scr_read(link, SCR_CONTROL, &scontrol); | |
6722 | if (rc) | |
6723 | return rc; | |
6724 | ||
6725 | spd = (scontrol >> 4) & 0xf; | |
6726 | if (spd) | |
6727 | link->hw_sata_spd_limit &= (1 << spd) - 1; | |
6728 | ||
6729 | link->sata_spd_limit = link->hw_sata_spd_limit; | |
6730 | ||
6731 | return 0; | |
6732 | } | |
6733 | ||
1da177e4 | 6734 | /** |
f3187195 TH |
6735 | * ata_port_alloc - allocate and initialize basic ATA port resources |
6736 | * @host: ATA host this allocated port belongs to | |
1da177e4 | 6737 | * |
f3187195 TH |
6738 | * Allocate and initialize basic ATA port resources. |
6739 | * | |
6740 | * RETURNS: | |
6741 | * Allocate ATA port on success, NULL on failure. | |
0cba632b | 6742 | * |
1da177e4 | 6743 | * LOCKING: |
f3187195 | 6744 | * Inherited from calling layer (may sleep). |
1da177e4 | 6745 | */ |
f3187195 | 6746 | struct ata_port *ata_port_alloc(struct ata_host *host) |
1da177e4 | 6747 | { |
f3187195 | 6748 | struct ata_port *ap; |
1da177e4 | 6749 | |
f3187195 TH |
6750 | DPRINTK("ENTER\n"); |
6751 | ||
6752 | ap = kzalloc(sizeof(*ap), GFP_KERNEL); | |
6753 | if (!ap) | |
6754 | return NULL; | |
6755 | ||
f4d6d004 | 6756 | ap->pflags |= ATA_PFLAG_INITIALIZING; |
cca3974e | 6757 | ap->lock = &host->lock; |
198e0fed | 6758 | ap->flags = ATA_FLAG_DISABLED; |
f3187195 | 6759 | ap->print_id = -1; |
1da177e4 | 6760 | ap->ctl = ATA_DEVCTL_OBS; |
cca3974e | 6761 | ap->host = host; |
f3187195 | 6762 | ap->dev = host->dev; |
1da177e4 | 6763 | ap->last_ctl = 0xFF; |
bd5d825c BP |
6764 | |
6765 | #if defined(ATA_VERBOSE_DEBUG) | |
6766 | /* turn on all debugging levels */ | |
6767 | ap->msg_enable = 0x00FF; | |
6768 | #elif defined(ATA_DEBUG) | |
6769 | ap->msg_enable = ATA_MSG_DRV | ATA_MSG_INFO | ATA_MSG_CTL | ATA_MSG_WARN | ATA_MSG_ERR; | |
88574551 | 6770 | #else |
0dd4b21f | 6771 | ap->msg_enable = ATA_MSG_DRV | ATA_MSG_ERR | ATA_MSG_WARN; |
bd5d825c | 6772 | #endif |
1da177e4 | 6773 | |
65f27f38 DH |
6774 | INIT_DELAYED_WORK(&ap->port_task, NULL); |
6775 | INIT_DELAYED_WORK(&ap->hotplug_task, ata_scsi_hotplug); | |
6776 | INIT_WORK(&ap->scsi_rescan_task, ata_scsi_dev_rescan); | |
a72ec4ce | 6777 | INIT_LIST_HEAD(&ap->eh_done_q); |
c6cf9e99 | 6778 | init_waitqueue_head(&ap->eh_wait_q); |
5ddf24c5 TH |
6779 | init_timer_deferrable(&ap->fastdrain_timer); |
6780 | ap->fastdrain_timer.function = ata_eh_fastdrain_timerfn; | |
6781 | ap->fastdrain_timer.data = (unsigned long)ap; | |
1da177e4 | 6782 | |
838df628 | 6783 | ap->cbl = ATA_CBL_NONE; |
838df628 | 6784 | |
8989805d | 6785 | ata_link_init(ap, &ap->link, 0); |
1da177e4 LT |
6786 | |
6787 | #ifdef ATA_IRQ_TRAP | |
6788 | ap->stats.unhandled_irq = 1; | |
6789 | ap->stats.idle_irq = 1; | |
6790 | #endif | |
1da177e4 | 6791 | return ap; |
1da177e4 LT |
6792 | } |
6793 | ||
f0d36efd TH |
6794 | static void ata_host_release(struct device *gendev, void *res) |
6795 | { | |
6796 | struct ata_host *host = dev_get_drvdata(gendev); | |
6797 | int i; | |
6798 | ||
6799 | for (i = 0; i < host->n_ports; i++) { | |
6800 | struct ata_port *ap = host->ports[i]; | |
6801 | ||
ecef7253 TH |
6802 | if (!ap) |
6803 | continue; | |
6804 | ||
6805 | if ((host->flags & ATA_HOST_STARTED) && ap->ops->port_stop) | |
f0d36efd | 6806 | ap->ops->port_stop(ap); |
f0d36efd TH |
6807 | } |
6808 | ||
ecef7253 | 6809 | if ((host->flags & ATA_HOST_STARTED) && host->ops->host_stop) |
f0d36efd | 6810 | host->ops->host_stop(host); |
1aa56cca | 6811 | |
1aa506e4 TH |
6812 | for (i = 0; i < host->n_ports; i++) { |
6813 | struct ata_port *ap = host->ports[i]; | |
6814 | ||
4911487a TH |
6815 | if (!ap) |
6816 | continue; | |
6817 | ||
6818 | if (ap->scsi_host) | |
1aa506e4 TH |
6819 | scsi_host_put(ap->scsi_host); |
6820 | ||
633273a3 | 6821 | kfree(ap->pmp_link); |
4911487a | 6822 | kfree(ap); |
1aa506e4 TH |
6823 | host->ports[i] = NULL; |
6824 | } | |
6825 | ||
1aa56cca | 6826 | dev_set_drvdata(gendev, NULL); |
f0d36efd TH |
6827 | } |
6828 | ||
f3187195 TH |
6829 | /** |
6830 | * ata_host_alloc - allocate and init basic ATA host resources | |
6831 | * @dev: generic device this host is associated with | |
6832 | * @max_ports: maximum number of ATA ports associated with this host | |
6833 | * | |
6834 | * Allocate and initialize basic ATA host resources. LLD calls | |
6835 | * this function to allocate a host, initializes it fully and | |
6836 | * attaches it using ata_host_register(). | |
6837 | * | |
6838 | * @max_ports ports are allocated and host->n_ports is | |
6839 | * initialized to @max_ports. The caller is allowed to decrease | |
6840 | * host->n_ports before calling ata_host_register(). The unused | |
6841 | * ports will be automatically freed on registration. | |
6842 | * | |
6843 | * RETURNS: | |
6844 | * Allocate ATA host on success, NULL on failure. | |
6845 | * | |
6846 | * LOCKING: | |
6847 | * Inherited from calling layer (may sleep). | |
6848 | */ | |
6849 | struct ata_host *ata_host_alloc(struct device *dev, int max_ports) | |
6850 | { | |
6851 | struct ata_host *host; | |
6852 | size_t sz; | |
6853 | int i; | |
6854 | ||
6855 | DPRINTK("ENTER\n"); | |
6856 | ||
6857 | if (!devres_open_group(dev, NULL, GFP_KERNEL)) | |
6858 | return NULL; | |
6859 | ||
6860 | /* alloc a container for our list of ATA ports (buses) */ | |
6861 | sz = sizeof(struct ata_host) + (max_ports + 1) * sizeof(void *); | |
6862 | /* alloc a container for our list of ATA ports (buses) */ | |
6863 | host = devres_alloc(ata_host_release, sz, GFP_KERNEL); | |
6864 | if (!host) | |
6865 | goto err_out; | |
6866 | ||
6867 | devres_add(dev, host); | |
6868 | dev_set_drvdata(dev, host); | |
6869 | ||
6870 | spin_lock_init(&host->lock); | |
6871 | host->dev = dev; | |
6872 | host->n_ports = max_ports; | |
6873 | ||
6874 | /* allocate ports bound to this host */ | |
6875 | for (i = 0; i < max_ports; i++) { | |
6876 | struct ata_port *ap; | |
6877 | ||
6878 | ap = ata_port_alloc(host); | |
6879 | if (!ap) | |
6880 | goto err_out; | |
6881 | ||
6882 | ap->port_no = i; | |
6883 | host->ports[i] = ap; | |
6884 | } | |
6885 | ||
6886 | devres_remove_group(dev, NULL); | |
6887 | return host; | |
6888 | ||
6889 | err_out: | |
6890 | devres_release_group(dev, NULL); | |
6891 | return NULL; | |
6892 | } | |
6893 | ||
f5cda257 TH |
6894 | /** |
6895 | * ata_host_alloc_pinfo - alloc host and init with port_info array | |
6896 | * @dev: generic device this host is associated with | |
6897 | * @ppi: array of ATA port_info to initialize host with | |
6898 | * @n_ports: number of ATA ports attached to this host | |
6899 | * | |
6900 | * Allocate ATA host and initialize with info from @ppi. If NULL | |
6901 | * terminated, @ppi may contain fewer entries than @n_ports. The | |
6902 | * last entry will be used for the remaining ports. | |
6903 | * | |
6904 | * RETURNS: | |
6905 | * Allocate ATA host on success, NULL on failure. | |
6906 | * | |
6907 | * LOCKING: | |
6908 | * Inherited from calling layer (may sleep). | |
6909 | */ | |
6910 | struct ata_host *ata_host_alloc_pinfo(struct device *dev, | |
6911 | const struct ata_port_info * const * ppi, | |
6912 | int n_ports) | |
6913 | { | |
6914 | const struct ata_port_info *pi; | |
6915 | struct ata_host *host; | |
6916 | int i, j; | |
6917 | ||
6918 | host = ata_host_alloc(dev, n_ports); | |
6919 | if (!host) | |
6920 | return NULL; | |
6921 | ||
6922 | for (i = 0, j = 0, pi = NULL; i < host->n_ports; i++) { | |
6923 | struct ata_port *ap = host->ports[i]; | |
6924 | ||
6925 | if (ppi[j]) | |
6926 | pi = ppi[j++]; | |
6927 | ||
6928 | ap->pio_mask = pi->pio_mask; | |
6929 | ap->mwdma_mask = pi->mwdma_mask; | |
6930 | ap->udma_mask = pi->udma_mask; | |
6931 | ap->flags |= pi->flags; | |
0c88758b | 6932 | ap->link.flags |= pi->link_flags; |
f5cda257 TH |
6933 | ap->ops = pi->port_ops; |
6934 | ||
6935 | if (!host->ops && (pi->port_ops != &ata_dummy_port_ops)) | |
6936 | host->ops = pi->port_ops; | |
6937 | if (!host->private_data && pi->private_data) | |
6938 | host->private_data = pi->private_data; | |
6939 | } | |
6940 | ||
6941 | return host; | |
6942 | } | |
6943 | ||
ecef7253 TH |
6944 | /** |
6945 | * ata_host_start - start and freeze ports of an ATA host | |
6946 | * @host: ATA host to start ports for | |
6947 | * | |
6948 | * Start and then freeze ports of @host. Started status is | |
6949 | * recorded in host->flags, so this function can be called | |
6950 | * multiple times. Ports are guaranteed to get started only | |
f3187195 TH |
6951 | * once. If host->ops isn't initialized yet, its set to the |
6952 | * first non-dummy port ops. | |
ecef7253 TH |
6953 | * |
6954 | * LOCKING: | |
6955 | * Inherited from calling layer (may sleep). | |
6956 | * | |
6957 | * RETURNS: | |
6958 | * 0 if all ports are started successfully, -errno otherwise. | |
6959 | */ | |
6960 | int ata_host_start(struct ata_host *host) | |
6961 | { | |
6962 | int i, rc; | |
6963 | ||
6964 | if (host->flags & ATA_HOST_STARTED) | |
6965 | return 0; | |
6966 | ||
6967 | for (i = 0; i < host->n_ports; i++) { | |
6968 | struct ata_port *ap = host->ports[i]; | |
6969 | ||
f3187195 TH |
6970 | if (!host->ops && !ata_port_is_dummy(ap)) |
6971 | host->ops = ap->ops; | |
6972 | ||
ecef7253 TH |
6973 | if (ap->ops->port_start) { |
6974 | rc = ap->ops->port_start(ap); | |
6975 | if (rc) { | |
6976 | ata_port_printk(ap, KERN_ERR, "failed to " | |
6977 | "start port (errno=%d)\n", rc); | |
6978 | goto err_out; | |
6979 | } | |
6980 | } | |
6981 | ||
6982 | ata_eh_freeze_port(ap); | |
6983 | } | |
6984 | ||
6985 | host->flags |= ATA_HOST_STARTED; | |
6986 | return 0; | |
6987 | ||
6988 | err_out: | |
6989 | while (--i >= 0) { | |
6990 | struct ata_port *ap = host->ports[i]; | |
6991 | ||
6992 | if (ap->ops->port_stop) | |
6993 | ap->ops->port_stop(ap); | |
6994 | } | |
6995 | return rc; | |
6996 | } | |
6997 | ||
b03732f0 | 6998 | /** |
cca3974e JG |
6999 | * ata_sas_host_init - Initialize a host struct |
7000 | * @host: host to initialize | |
7001 | * @dev: device host is attached to | |
7002 | * @flags: host flags | |
7003 | * @ops: port_ops | |
b03732f0 BK |
7004 | * |
7005 | * LOCKING: | |
7006 | * PCI/etc. bus probe sem. | |
7007 | * | |
7008 | */ | |
f3187195 | 7009 | /* KILLME - the only user left is ipr */ |
cca3974e JG |
7010 | void ata_host_init(struct ata_host *host, struct device *dev, |
7011 | unsigned long flags, const struct ata_port_operations *ops) | |
b03732f0 | 7012 | { |
cca3974e JG |
7013 | spin_lock_init(&host->lock); |
7014 | host->dev = dev; | |
7015 | host->flags = flags; | |
7016 | host->ops = ops; | |
b03732f0 BK |
7017 | } |
7018 | ||
f3187195 TH |
7019 | /** |
7020 | * ata_host_register - register initialized ATA host | |
7021 | * @host: ATA host to register | |
7022 | * @sht: template for SCSI host | |
7023 | * | |
7024 | * Register initialized ATA host. @host is allocated using | |
7025 | * ata_host_alloc() and fully initialized by LLD. This function | |
7026 | * starts ports, registers @host with ATA and SCSI layers and | |
7027 | * probe registered devices. | |
7028 | * | |
7029 | * LOCKING: | |
7030 | * Inherited from calling layer (may sleep). | |
7031 | * | |
7032 | * RETURNS: | |
7033 | * 0 on success, -errno otherwise. | |
7034 | */ | |
7035 | int ata_host_register(struct ata_host *host, struct scsi_host_template *sht) | |
7036 | { | |
7037 | int i, rc; | |
7038 | ||
7039 | /* host must have been started */ | |
7040 | if (!(host->flags & ATA_HOST_STARTED)) { | |
7041 | dev_printk(KERN_ERR, host->dev, | |
7042 | "BUG: trying to register unstarted host\n"); | |
7043 | WARN_ON(1); | |
7044 | return -EINVAL; | |
7045 | } | |
7046 | ||
7047 | /* Blow away unused ports. This happens when LLD can't | |
7048 | * determine the exact number of ports to allocate at | |
7049 | * allocation time. | |
7050 | */ | |
7051 | for (i = host->n_ports; host->ports[i]; i++) | |
7052 | kfree(host->ports[i]); | |
7053 | ||
7054 | /* give ports names and add SCSI hosts */ | |
7055 | for (i = 0; i < host->n_ports; i++) | |
7056 | host->ports[i]->print_id = ata_print_id++; | |
7057 | ||
7058 | rc = ata_scsi_add_hosts(host, sht); | |
7059 | if (rc) | |
7060 | return rc; | |
7061 | ||
fafbae87 TH |
7062 | /* associate with ACPI nodes */ |
7063 | ata_acpi_associate(host); | |
7064 | ||
f3187195 TH |
7065 | /* set cable, sata_spd_limit and report */ |
7066 | for (i = 0; i < host->n_ports; i++) { | |
7067 | struct ata_port *ap = host->ports[i]; | |
f3187195 TH |
7068 | unsigned long xfer_mask; |
7069 | ||
7070 | /* set SATA cable type if still unset */ | |
7071 | if (ap->cbl == ATA_CBL_NONE && (ap->flags & ATA_FLAG_SATA)) | |
7072 | ap->cbl = ATA_CBL_SATA; | |
7073 | ||
7074 | /* init sata_spd_limit to the current value */ | |
4fb37a25 | 7075 | sata_link_init_spd(&ap->link); |
f3187195 | 7076 | |
cbcdd875 | 7077 | /* print per-port info to dmesg */ |
f3187195 TH |
7078 | xfer_mask = ata_pack_xfermask(ap->pio_mask, ap->mwdma_mask, |
7079 | ap->udma_mask); | |
7080 | ||
abf6e8ed | 7081 | if (!ata_port_is_dummy(ap)) { |
cbcdd875 TH |
7082 | ata_port_printk(ap, KERN_INFO, |
7083 | "%cATA max %s %s\n", | |
a16abc0b | 7084 | (ap->flags & ATA_FLAG_SATA) ? 'S' : 'P', |
f3187195 | 7085 | ata_mode_string(xfer_mask), |
cbcdd875 | 7086 | ap->link.eh_info.desc); |
abf6e8ed TH |
7087 | ata_ehi_clear_desc(&ap->link.eh_info); |
7088 | } else | |
f3187195 TH |
7089 | ata_port_printk(ap, KERN_INFO, "DUMMY\n"); |
7090 | } | |
7091 | ||
7092 | /* perform each probe synchronously */ | |
7093 | DPRINTK("probe begin\n"); | |
7094 | for (i = 0; i < host->n_ports; i++) { | |
7095 | struct ata_port *ap = host->ports[i]; | |
7096 | int rc; | |
7097 | ||
7098 | /* probe */ | |
7099 | if (ap->ops->error_handler) { | |
9af5c9c9 | 7100 | struct ata_eh_info *ehi = &ap->link.eh_info; |
f3187195 TH |
7101 | unsigned long flags; |
7102 | ||
7103 | ata_port_probe(ap); | |
7104 | ||
7105 | /* kick EH for boot probing */ | |
7106 | spin_lock_irqsave(ap->lock, flags); | |
7107 | ||
f58229f8 TH |
7108 | ehi->probe_mask = |
7109 | (1 << ata_link_max_devices(&ap->link)) - 1; | |
f3187195 TH |
7110 | ehi->action |= ATA_EH_SOFTRESET; |
7111 | ehi->flags |= ATA_EHI_NO_AUTOPSY | ATA_EHI_QUIET; | |
7112 | ||
f4d6d004 | 7113 | ap->pflags &= ~ATA_PFLAG_INITIALIZING; |
f3187195 TH |
7114 | ap->pflags |= ATA_PFLAG_LOADING; |
7115 | ata_port_schedule_eh(ap); | |
7116 | ||
7117 | spin_unlock_irqrestore(ap->lock, flags); | |
7118 | ||
7119 | /* wait for EH to finish */ | |
7120 | ata_port_wait_eh(ap); | |
7121 | } else { | |
7122 | DPRINTK("ata%u: bus probe begin\n", ap->print_id); | |
7123 | rc = ata_bus_probe(ap); | |
7124 | DPRINTK("ata%u: bus probe end\n", ap->print_id); | |
7125 | ||
7126 | if (rc) { | |
7127 | /* FIXME: do something useful here? | |
7128 | * Current libata behavior will | |
7129 | * tear down everything when | |
7130 | * the module is removed | |
7131 | * or the h/w is unplugged. | |
7132 | */ | |
7133 | } | |
7134 | } | |
7135 | } | |
7136 | ||
7137 | /* probes are done, now scan each port's disk(s) */ | |
7138 | DPRINTK("host probe begin\n"); | |
7139 | for (i = 0; i < host->n_ports; i++) { | |
7140 | struct ata_port *ap = host->ports[i]; | |
7141 | ||
1ae46317 | 7142 | ata_scsi_scan_host(ap, 1); |
ca77329f | 7143 | ata_lpm_schedule(ap, ap->pm_policy); |
f3187195 TH |
7144 | } |
7145 | ||
7146 | return 0; | |
7147 | } | |
7148 | ||
f5cda257 TH |
7149 | /** |
7150 | * ata_host_activate - start host, request IRQ and register it | |
7151 | * @host: target ATA host | |
7152 | * @irq: IRQ to request | |
7153 | * @irq_handler: irq_handler used when requesting IRQ | |
7154 | * @irq_flags: irq_flags used when requesting IRQ | |
7155 | * @sht: scsi_host_template to use when registering the host | |
7156 | * | |
7157 | * After allocating an ATA host and initializing it, most libata | |
7158 | * LLDs perform three steps to activate the host - start host, | |
7159 | * request IRQ and register it. This helper takes necessasry | |
7160 | * arguments and performs the three steps in one go. | |
7161 | * | |
7162 | * LOCKING: | |
7163 | * Inherited from calling layer (may sleep). | |
7164 | * | |
7165 | * RETURNS: | |
7166 | * 0 on success, -errno otherwise. | |
7167 | */ | |
7168 | int ata_host_activate(struct ata_host *host, int irq, | |
7169 | irq_handler_t irq_handler, unsigned long irq_flags, | |
7170 | struct scsi_host_template *sht) | |
7171 | { | |
cbcdd875 | 7172 | int i, rc; |
f5cda257 TH |
7173 | |
7174 | rc = ata_host_start(host); | |
7175 | if (rc) | |
7176 | return rc; | |
7177 | ||
7178 | rc = devm_request_irq(host->dev, irq, irq_handler, irq_flags, | |
7179 | dev_driver_string(host->dev), host); | |
7180 | if (rc) | |
7181 | return rc; | |
7182 | ||
cbcdd875 TH |
7183 | for (i = 0; i < host->n_ports; i++) |
7184 | ata_port_desc(host->ports[i], "irq %d", irq); | |
4031826b | 7185 | |
f5cda257 TH |
7186 | rc = ata_host_register(host, sht); |
7187 | /* if failed, just free the IRQ and leave ports alone */ | |
7188 | if (rc) | |
7189 | devm_free_irq(host->dev, irq, host); | |
7190 | ||
7191 | return rc; | |
7192 | } | |
7193 | ||
720ba126 TH |
7194 | /** |
7195 | * ata_port_detach - Detach ATA port in prepration of device removal | |
7196 | * @ap: ATA port to be detached | |
7197 | * | |
7198 | * Detach all ATA devices and the associated SCSI devices of @ap; | |
7199 | * then, remove the associated SCSI host. @ap is guaranteed to | |
7200 | * be quiescent on return from this function. | |
7201 | * | |
7202 | * LOCKING: | |
7203 | * Kernel thread context (may sleep). | |
7204 | */ | |
741b7763 | 7205 | static void ata_port_detach(struct ata_port *ap) |
720ba126 TH |
7206 | { |
7207 | unsigned long flags; | |
41bda9c9 | 7208 | struct ata_link *link; |
f58229f8 | 7209 | struct ata_device *dev; |
720ba126 TH |
7210 | |
7211 | if (!ap->ops->error_handler) | |
c3cf30a9 | 7212 | goto skip_eh; |
720ba126 TH |
7213 | |
7214 | /* tell EH we're leaving & flush EH */ | |
ba6a1308 | 7215 | spin_lock_irqsave(ap->lock, flags); |
b51e9e5d | 7216 | ap->pflags |= ATA_PFLAG_UNLOADING; |
ba6a1308 | 7217 | spin_unlock_irqrestore(ap->lock, flags); |
720ba126 TH |
7218 | |
7219 | ata_port_wait_eh(ap); | |
7220 | ||
7221 | /* EH is now guaranteed to see UNLOADING, so no new device | |
7222 | * will be attached. Disable all existing devices. | |
7223 | */ | |
ba6a1308 | 7224 | spin_lock_irqsave(ap->lock, flags); |
720ba126 | 7225 | |
41bda9c9 TH |
7226 | ata_port_for_each_link(link, ap) { |
7227 | ata_link_for_each_dev(dev, link) | |
7228 | ata_dev_disable(dev); | |
7229 | } | |
720ba126 | 7230 | |
ba6a1308 | 7231 | spin_unlock_irqrestore(ap->lock, flags); |
720ba126 TH |
7232 | |
7233 | /* Final freeze & EH. All in-flight commands are aborted. EH | |
7234 | * will be skipped and retrials will be terminated with bad | |
7235 | * target. | |
7236 | */ | |
ba6a1308 | 7237 | spin_lock_irqsave(ap->lock, flags); |
720ba126 | 7238 | ata_port_freeze(ap); /* won't be thawed */ |
ba6a1308 | 7239 | spin_unlock_irqrestore(ap->lock, flags); |
720ba126 TH |
7240 | |
7241 | ata_port_wait_eh(ap); | |
45a66c1c | 7242 | cancel_rearming_delayed_work(&ap->hotplug_task); |
720ba126 | 7243 | |
c3cf30a9 | 7244 | skip_eh: |
720ba126 | 7245 | /* remove the associated SCSI host */ |
cca3974e | 7246 | scsi_remove_host(ap->scsi_host); |
720ba126 TH |
7247 | } |
7248 | ||
0529c159 TH |
7249 | /** |
7250 | * ata_host_detach - Detach all ports of an ATA host | |
7251 | * @host: Host to detach | |
7252 | * | |
7253 | * Detach all ports of @host. | |
7254 | * | |
7255 | * LOCKING: | |
7256 | * Kernel thread context (may sleep). | |
7257 | */ | |
7258 | void ata_host_detach(struct ata_host *host) | |
7259 | { | |
7260 | int i; | |
7261 | ||
7262 | for (i = 0; i < host->n_ports; i++) | |
7263 | ata_port_detach(host->ports[i]); | |
7264 | } | |
7265 | ||
1da177e4 LT |
7266 | /** |
7267 | * ata_std_ports - initialize ioaddr with standard port offsets. | |
7268 | * @ioaddr: IO address structure to be initialized | |
0baab86b EF |
7269 | * |
7270 | * Utility function which initializes data_addr, error_addr, | |
7271 | * feature_addr, nsect_addr, lbal_addr, lbam_addr, lbah_addr, | |
7272 | * device_addr, status_addr, and command_addr to standard offsets | |
7273 | * relative to cmd_addr. | |
7274 | * | |
7275 | * Does not set ctl_addr, altstatus_addr, bmdma_addr, or scr_addr. | |
1da177e4 | 7276 | */ |
0baab86b | 7277 | |
1da177e4 LT |
7278 | void ata_std_ports(struct ata_ioports *ioaddr) |
7279 | { | |
7280 | ioaddr->data_addr = ioaddr->cmd_addr + ATA_REG_DATA; | |
7281 | ioaddr->error_addr = ioaddr->cmd_addr + ATA_REG_ERR; | |
7282 | ioaddr->feature_addr = ioaddr->cmd_addr + ATA_REG_FEATURE; | |
7283 | ioaddr->nsect_addr = ioaddr->cmd_addr + ATA_REG_NSECT; | |
7284 | ioaddr->lbal_addr = ioaddr->cmd_addr + ATA_REG_LBAL; | |
7285 | ioaddr->lbam_addr = ioaddr->cmd_addr + ATA_REG_LBAM; | |
7286 | ioaddr->lbah_addr = ioaddr->cmd_addr + ATA_REG_LBAH; | |
7287 | ioaddr->device_addr = ioaddr->cmd_addr + ATA_REG_DEVICE; | |
7288 | ioaddr->status_addr = ioaddr->cmd_addr + ATA_REG_STATUS; | |
7289 | ioaddr->command_addr = ioaddr->cmd_addr + ATA_REG_CMD; | |
7290 | } | |
7291 | ||
0baab86b | 7292 | |
374b1873 JG |
7293 | #ifdef CONFIG_PCI |
7294 | ||
1da177e4 LT |
7295 | /** |
7296 | * ata_pci_remove_one - PCI layer callback for device removal | |
7297 | * @pdev: PCI device that was removed | |
7298 | * | |
b878ca5d TH |
7299 | * PCI layer indicates to libata via this hook that hot-unplug or |
7300 | * module unload event has occurred. Detach all ports. Resource | |
7301 | * release is handled via devres. | |
1da177e4 LT |
7302 | * |
7303 | * LOCKING: | |
7304 | * Inherited from PCI layer (may sleep). | |
7305 | */ | |
f0d36efd | 7306 | void ata_pci_remove_one(struct pci_dev *pdev) |
1da177e4 | 7307 | { |
2855568b | 7308 | struct device *dev = &pdev->dev; |
cca3974e | 7309 | struct ata_host *host = dev_get_drvdata(dev); |
1da177e4 | 7310 | |
b878ca5d | 7311 | ata_host_detach(host); |
1da177e4 LT |
7312 | } |
7313 | ||
7314 | /* move to PCI subsystem */ | |
057ace5e | 7315 | int pci_test_config_bits(struct pci_dev *pdev, const struct pci_bits *bits) |
1da177e4 LT |
7316 | { |
7317 | unsigned long tmp = 0; | |
7318 | ||
7319 | switch (bits->width) { | |
7320 | case 1: { | |
7321 | u8 tmp8 = 0; | |
7322 | pci_read_config_byte(pdev, bits->reg, &tmp8); | |
7323 | tmp = tmp8; | |
7324 | break; | |
7325 | } | |
7326 | case 2: { | |
7327 | u16 tmp16 = 0; | |
7328 | pci_read_config_word(pdev, bits->reg, &tmp16); | |
7329 | tmp = tmp16; | |
7330 | break; | |
7331 | } | |
7332 | case 4: { | |
7333 | u32 tmp32 = 0; | |
7334 | pci_read_config_dword(pdev, bits->reg, &tmp32); | |
7335 | tmp = tmp32; | |
7336 | break; | |
7337 | } | |
7338 | ||
7339 | default: | |
7340 | return -EINVAL; | |
7341 | } | |
7342 | ||
7343 | tmp &= bits->mask; | |
7344 | ||
7345 | return (tmp == bits->val) ? 1 : 0; | |
7346 | } | |
9b847548 | 7347 | |
6ffa01d8 | 7348 | #ifdef CONFIG_PM |
3c5100c1 | 7349 | void ata_pci_device_do_suspend(struct pci_dev *pdev, pm_message_t mesg) |
9b847548 JA |
7350 | { |
7351 | pci_save_state(pdev); | |
4c90d971 | 7352 | pci_disable_device(pdev); |
500530f6 | 7353 | |
4c90d971 | 7354 | if (mesg.event == PM_EVENT_SUSPEND) |
500530f6 | 7355 | pci_set_power_state(pdev, PCI_D3hot); |
9b847548 JA |
7356 | } |
7357 | ||
553c4aa6 | 7358 | int ata_pci_device_do_resume(struct pci_dev *pdev) |
9b847548 | 7359 | { |
553c4aa6 TH |
7360 | int rc; |
7361 | ||
9b847548 JA |
7362 | pci_set_power_state(pdev, PCI_D0); |
7363 | pci_restore_state(pdev); | |
553c4aa6 | 7364 | |
b878ca5d | 7365 | rc = pcim_enable_device(pdev); |
553c4aa6 TH |
7366 | if (rc) { |
7367 | dev_printk(KERN_ERR, &pdev->dev, | |
7368 | "failed to enable device after resume (%d)\n", rc); | |
7369 | return rc; | |
7370 | } | |
7371 | ||
9b847548 | 7372 | pci_set_master(pdev); |
553c4aa6 | 7373 | return 0; |
500530f6 TH |
7374 | } |
7375 | ||
3c5100c1 | 7376 | int ata_pci_device_suspend(struct pci_dev *pdev, pm_message_t mesg) |
500530f6 | 7377 | { |
cca3974e | 7378 | struct ata_host *host = dev_get_drvdata(&pdev->dev); |
500530f6 TH |
7379 | int rc = 0; |
7380 | ||
cca3974e | 7381 | rc = ata_host_suspend(host, mesg); |
500530f6 TH |
7382 | if (rc) |
7383 | return rc; | |
7384 | ||
3c5100c1 | 7385 | ata_pci_device_do_suspend(pdev, mesg); |
500530f6 TH |
7386 | |
7387 | return 0; | |
7388 | } | |
7389 | ||
7390 | int ata_pci_device_resume(struct pci_dev *pdev) | |
7391 | { | |
cca3974e | 7392 | struct ata_host *host = dev_get_drvdata(&pdev->dev); |
553c4aa6 | 7393 | int rc; |
500530f6 | 7394 | |
553c4aa6 TH |
7395 | rc = ata_pci_device_do_resume(pdev); |
7396 | if (rc == 0) | |
7397 | ata_host_resume(host); | |
7398 | return rc; | |
9b847548 | 7399 | } |
6ffa01d8 TH |
7400 | #endif /* CONFIG_PM */ |
7401 | ||
1da177e4 LT |
7402 | #endif /* CONFIG_PCI */ |
7403 | ||
7404 | ||
1da177e4 LT |
7405 | static int __init ata_init(void) |
7406 | { | |
a8601e5f | 7407 | ata_probe_timeout *= HZ; |
1da177e4 LT |
7408 | ata_wq = create_workqueue("ata"); |
7409 | if (!ata_wq) | |
7410 | return -ENOMEM; | |
7411 | ||
453b07ac TH |
7412 | ata_aux_wq = create_singlethread_workqueue("ata_aux"); |
7413 | if (!ata_aux_wq) { | |
7414 | destroy_workqueue(ata_wq); | |
7415 | return -ENOMEM; | |
7416 | } | |
7417 | ||
1da177e4 LT |
7418 | printk(KERN_DEBUG "libata version " DRV_VERSION " loaded.\n"); |
7419 | return 0; | |
7420 | } | |
7421 | ||
7422 | static void __exit ata_exit(void) | |
7423 | { | |
7424 | destroy_workqueue(ata_wq); | |
453b07ac | 7425 | destroy_workqueue(ata_aux_wq); |
1da177e4 LT |
7426 | } |
7427 | ||
a4625085 | 7428 | subsys_initcall(ata_init); |
1da177e4 LT |
7429 | module_exit(ata_exit); |
7430 | ||
67846b30 | 7431 | static unsigned long ratelimit_time; |
34af946a | 7432 | static DEFINE_SPINLOCK(ata_ratelimit_lock); |
67846b30 JG |
7433 | |
7434 | int ata_ratelimit(void) | |
7435 | { | |
7436 | int rc; | |
7437 | unsigned long flags; | |
7438 | ||
7439 | spin_lock_irqsave(&ata_ratelimit_lock, flags); | |
7440 | ||
7441 | if (time_after(jiffies, ratelimit_time)) { | |
7442 | rc = 1; | |
7443 | ratelimit_time = jiffies + (HZ/5); | |
7444 | } else | |
7445 | rc = 0; | |
7446 | ||
7447 | spin_unlock_irqrestore(&ata_ratelimit_lock, flags); | |
7448 | ||
7449 | return rc; | |
7450 | } | |
7451 | ||
c22daff4 TH |
7452 | /** |
7453 | * ata_wait_register - wait until register value changes | |
7454 | * @reg: IO-mapped register | |
7455 | * @mask: Mask to apply to read register value | |
7456 | * @val: Wait condition | |
7457 | * @interval_msec: polling interval in milliseconds | |
7458 | * @timeout_msec: timeout in milliseconds | |
7459 | * | |
7460 | * Waiting for some bits of register to change is a common | |
7461 | * operation for ATA controllers. This function reads 32bit LE | |
7462 | * IO-mapped register @reg and tests for the following condition. | |
7463 | * | |
7464 | * (*@reg & mask) != val | |
7465 | * | |
7466 | * If the condition is met, it returns; otherwise, the process is | |
7467 | * repeated after @interval_msec until timeout. | |
7468 | * | |
7469 | * LOCKING: | |
7470 | * Kernel thread context (may sleep) | |
7471 | * | |
7472 | * RETURNS: | |
7473 | * The final register value. | |
7474 | */ | |
7475 | u32 ata_wait_register(void __iomem *reg, u32 mask, u32 val, | |
7476 | unsigned long interval_msec, | |
7477 | unsigned long timeout_msec) | |
7478 | { | |
7479 | unsigned long timeout; | |
7480 | u32 tmp; | |
7481 | ||
7482 | tmp = ioread32(reg); | |
7483 | ||
7484 | /* Calculate timeout _after_ the first read to make sure | |
7485 | * preceding writes reach the controller before starting to | |
7486 | * eat away the timeout. | |
7487 | */ | |
7488 | timeout = jiffies + (timeout_msec * HZ) / 1000; | |
7489 | ||
7490 | while ((tmp & mask) == val && time_before(jiffies, timeout)) { | |
7491 | msleep(interval_msec); | |
7492 | tmp = ioread32(reg); | |
7493 | } | |
7494 | ||
7495 | return tmp; | |
7496 | } | |
7497 | ||
dd5b06c4 TH |
7498 | /* |
7499 | * Dummy port_ops | |
7500 | */ | |
7501 | static void ata_dummy_noret(struct ata_port *ap) { } | |
7502 | static int ata_dummy_ret0(struct ata_port *ap) { return 0; } | |
7503 | static void ata_dummy_qc_noret(struct ata_queued_cmd *qc) { } | |
7504 | ||
7505 | static u8 ata_dummy_check_status(struct ata_port *ap) | |
7506 | { | |
7507 | return ATA_DRDY; | |
7508 | } | |
7509 | ||
7510 | static unsigned int ata_dummy_qc_issue(struct ata_queued_cmd *qc) | |
7511 | { | |
7512 | return AC_ERR_SYSTEM; | |
7513 | } | |
7514 | ||
7515 | const struct ata_port_operations ata_dummy_port_ops = { | |
dd5b06c4 TH |
7516 | .check_status = ata_dummy_check_status, |
7517 | .check_altstatus = ata_dummy_check_status, | |
7518 | .dev_select = ata_noop_dev_select, | |
7519 | .qc_prep = ata_noop_qc_prep, | |
7520 | .qc_issue = ata_dummy_qc_issue, | |
7521 | .freeze = ata_dummy_noret, | |
7522 | .thaw = ata_dummy_noret, | |
7523 | .error_handler = ata_dummy_noret, | |
7524 | .post_internal_cmd = ata_dummy_qc_noret, | |
7525 | .irq_clear = ata_dummy_noret, | |
7526 | .port_start = ata_dummy_ret0, | |
7527 | .port_stop = ata_dummy_noret, | |
7528 | }; | |
7529 | ||
21b0ad4f TH |
7530 | const struct ata_port_info ata_dummy_port_info = { |
7531 | .port_ops = &ata_dummy_port_ops, | |
7532 | }; | |
7533 | ||
1da177e4 LT |
7534 | /* |
7535 | * libata is essentially a library of internal helper functions for | |
7536 | * low-level ATA host controller drivers. As such, the API/ABI is | |
7537 | * likely to change as new drivers are added and updated. | |
7538 | * Do not depend on ABI/API stability. | |
7539 | */ | |
e9c83914 TH |
7540 | EXPORT_SYMBOL_GPL(sata_deb_timing_normal); |
7541 | EXPORT_SYMBOL_GPL(sata_deb_timing_hotplug); | |
7542 | EXPORT_SYMBOL_GPL(sata_deb_timing_long); | |
dd5b06c4 | 7543 | EXPORT_SYMBOL_GPL(ata_dummy_port_ops); |
21b0ad4f | 7544 | EXPORT_SYMBOL_GPL(ata_dummy_port_info); |
1da177e4 LT |
7545 | EXPORT_SYMBOL_GPL(ata_std_bios_param); |
7546 | EXPORT_SYMBOL_GPL(ata_std_ports); | |
cca3974e | 7547 | EXPORT_SYMBOL_GPL(ata_host_init); |
f3187195 | 7548 | EXPORT_SYMBOL_GPL(ata_host_alloc); |
f5cda257 | 7549 | EXPORT_SYMBOL_GPL(ata_host_alloc_pinfo); |
ecef7253 | 7550 | EXPORT_SYMBOL_GPL(ata_host_start); |
f3187195 | 7551 | EXPORT_SYMBOL_GPL(ata_host_register); |
f5cda257 | 7552 | EXPORT_SYMBOL_GPL(ata_host_activate); |
0529c159 | 7553 | EXPORT_SYMBOL_GPL(ata_host_detach); |
1da177e4 LT |
7554 | EXPORT_SYMBOL_GPL(ata_sg_init); |
7555 | EXPORT_SYMBOL_GPL(ata_sg_init_one); | |
9a1004d0 | 7556 | EXPORT_SYMBOL_GPL(ata_hsm_move); |
f686bcb8 | 7557 | EXPORT_SYMBOL_GPL(ata_qc_complete); |
dedaf2b0 | 7558 | EXPORT_SYMBOL_GPL(ata_qc_complete_multiple); |
1da177e4 | 7559 | EXPORT_SYMBOL_GPL(ata_qc_issue_prot); |
1da177e4 LT |
7560 | EXPORT_SYMBOL_GPL(ata_tf_load); |
7561 | EXPORT_SYMBOL_GPL(ata_tf_read); | |
7562 | EXPORT_SYMBOL_GPL(ata_noop_dev_select); | |
7563 | EXPORT_SYMBOL_GPL(ata_std_dev_select); | |
43727fbc | 7564 | EXPORT_SYMBOL_GPL(sata_print_link_status); |
1da177e4 LT |
7565 | EXPORT_SYMBOL_GPL(ata_tf_to_fis); |
7566 | EXPORT_SYMBOL_GPL(ata_tf_from_fis); | |
7567 | EXPORT_SYMBOL_GPL(ata_check_status); | |
7568 | EXPORT_SYMBOL_GPL(ata_altstatus); | |
1da177e4 LT |
7569 | EXPORT_SYMBOL_GPL(ata_exec_command); |
7570 | EXPORT_SYMBOL_GPL(ata_port_start); | |
d92e74d3 | 7571 | EXPORT_SYMBOL_GPL(ata_sff_port_start); |
1da177e4 | 7572 | EXPORT_SYMBOL_GPL(ata_interrupt); |
04351821 | 7573 | EXPORT_SYMBOL_GPL(ata_do_set_mode); |
0d5ff566 TH |
7574 | EXPORT_SYMBOL_GPL(ata_data_xfer); |
7575 | EXPORT_SYMBOL_GPL(ata_data_xfer_noirq); | |
31cc23b3 | 7576 | EXPORT_SYMBOL_GPL(ata_std_qc_defer); |
1da177e4 | 7577 | EXPORT_SYMBOL_GPL(ata_qc_prep); |
d26fc955 | 7578 | EXPORT_SYMBOL_GPL(ata_dumb_qc_prep); |
e46834cd | 7579 | EXPORT_SYMBOL_GPL(ata_noop_qc_prep); |
1da177e4 LT |
7580 | EXPORT_SYMBOL_GPL(ata_bmdma_setup); |
7581 | EXPORT_SYMBOL_GPL(ata_bmdma_start); | |
7582 | EXPORT_SYMBOL_GPL(ata_bmdma_irq_clear); | |
7583 | EXPORT_SYMBOL_GPL(ata_bmdma_status); | |
7584 | EXPORT_SYMBOL_GPL(ata_bmdma_stop); | |
6d97dbd7 TH |
7585 | EXPORT_SYMBOL_GPL(ata_bmdma_freeze); |
7586 | EXPORT_SYMBOL_GPL(ata_bmdma_thaw); | |
7587 | EXPORT_SYMBOL_GPL(ata_bmdma_drive_eh); | |
7588 | EXPORT_SYMBOL_GPL(ata_bmdma_error_handler); | |
7589 | EXPORT_SYMBOL_GPL(ata_bmdma_post_internal_cmd); | |
1da177e4 | 7590 | EXPORT_SYMBOL_GPL(ata_port_probe); |
10305f0f | 7591 | EXPORT_SYMBOL_GPL(ata_dev_disable); |
3c567b7d | 7592 | EXPORT_SYMBOL_GPL(sata_set_spd); |
936fd732 TH |
7593 | EXPORT_SYMBOL_GPL(sata_link_debounce); |
7594 | EXPORT_SYMBOL_GPL(sata_link_resume); | |
1da177e4 LT |
7595 | EXPORT_SYMBOL_GPL(sata_phy_reset); |
7596 | EXPORT_SYMBOL_GPL(__sata_phy_reset); | |
7597 | EXPORT_SYMBOL_GPL(ata_bus_reset); | |
f5914a46 | 7598 | EXPORT_SYMBOL_GPL(ata_std_prereset); |
c2bd5804 | 7599 | EXPORT_SYMBOL_GPL(ata_std_softreset); |
cc0680a5 | 7600 | EXPORT_SYMBOL_GPL(sata_link_hardreset); |
c2bd5804 TH |
7601 | EXPORT_SYMBOL_GPL(sata_std_hardreset); |
7602 | EXPORT_SYMBOL_GPL(ata_std_postreset); | |
2e9edbf8 JG |
7603 | EXPORT_SYMBOL_GPL(ata_dev_classify); |
7604 | EXPORT_SYMBOL_GPL(ata_dev_pair); | |
1da177e4 | 7605 | EXPORT_SYMBOL_GPL(ata_port_disable); |
67846b30 | 7606 | EXPORT_SYMBOL_GPL(ata_ratelimit); |
c22daff4 | 7607 | EXPORT_SYMBOL_GPL(ata_wait_register); |
6f8b9958 | 7608 | EXPORT_SYMBOL_GPL(ata_busy_sleep); |
88ff6eaf | 7609 | EXPORT_SYMBOL_GPL(ata_wait_after_reset); |
d4b2bab4 | 7610 | EXPORT_SYMBOL_GPL(ata_wait_ready); |
86e45b6b | 7611 | EXPORT_SYMBOL_GPL(ata_port_queue_task); |
1da177e4 LT |
7612 | EXPORT_SYMBOL_GPL(ata_scsi_ioctl); |
7613 | EXPORT_SYMBOL_GPL(ata_scsi_queuecmd); | |
1da177e4 | 7614 | EXPORT_SYMBOL_GPL(ata_scsi_slave_config); |
83c47bcb | 7615 | EXPORT_SYMBOL_GPL(ata_scsi_slave_destroy); |
a6e6ce8e | 7616 | EXPORT_SYMBOL_GPL(ata_scsi_change_queue_depth); |
1da177e4 | 7617 | EXPORT_SYMBOL_GPL(ata_host_intr); |
34bf2170 TH |
7618 | EXPORT_SYMBOL_GPL(sata_scr_valid); |
7619 | EXPORT_SYMBOL_GPL(sata_scr_read); | |
7620 | EXPORT_SYMBOL_GPL(sata_scr_write); | |
7621 | EXPORT_SYMBOL_GPL(sata_scr_write_flush); | |
936fd732 TH |
7622 | EXPORT_SYMBOL_GPL(ata_link_online); |
7623 | EXPORT_SYMBOL_GPL(ata_link_offline); | |
6ffa01d8 | 7624 | #ifdef CONFIG_PM |
cca3974e JG |
7625 | EXPORT_SYMBOL_GPL(ata_host_suspend); |
7626 | EXPORT_SYMBOL_GPL(ata_host_resume); | |
6ffa01d8 | 7627 | #endif /* CONFIG_PM */ |
6a62a04d TH |
7628 | EXPORT_SYMBOL_GPL(ata_id_string); |
7629 | EXPORT_SYMBOL_GPL(ata_id_c_string); | |
10305f0f | 7630 | EXPORT_SYMBOL_GPL(ata_id_to_dma_mode); |
1da177e4 LT |
7631 | EXPORT_SYMBOL_GPL(ata_scsi_simulate); |
7632 | ||
1bc4ccff | 7633 | EXPORT_SYMBOL_GPL(ata_pio_need_iordy); |
452503f9 AC |
7634 | EXPORT_SYMBOL_GPL(ata_timing_compute); |
7635 | EXPORT_SYMBOL_GPL(ata_timing_merge); | |
7636 | ||
1da177e4 LT |
7637 | #ifdef CONFIG_PCI |
7638 | EXPORT_SYMBOL_GPL(pci_test_config_bits); | |
d583bc18 | 7639 | EXPORT_SYMBOL_GPL(ata_pci_init_sff_host); |
1626aeb8 | 7640 | EXPORT_SYMBOL_GPL(ata_pci_init_bmdma); |
d583bc18 | 7641 | EXPORT_SYMBOL_GPL(ata_pci_prepare_sff_host); |
1da177e4 LT |
7642 | EXPORT_SYMBOL_GPL(ata_pci_init_one); |
7643 | EXPORT_SYMBOL_GPL(ata_pci_remove_one); | |
6ffa01d8 | 7644 | #ifdef CONFIG_PM |
500530f6 TH |
7645 | EXPORT_SYMBOL_GPL(ata_pci_device_do_suspend); |
7646 | EXPORT_SYMBOL_GPL(ata_pci_device_do_resume); | |
9b847548 JA |
7647 | EXPORT_SYMBOL_GPL(ata_pci_device_suspend); |
7648 | EXPORT_SYMBOL_GPL(ata_pci_device_resume); | |
6ffa01d8 | 7649 | #endif /* CONFIG_PM */ |
67951ade AC |
7650 | EXPORT_SYMBOL_GPL(ata_pci_default_filter); |
7651 | EXPORT_SYMBOL_GPL(ata_pci_clear_simplex); | |
1da177e4 | 7652 | #endif /* CONFIG_PCI */ |
9b847548 | 7653 | |
31f88384 | 7654 | EXPORT_SYMBOL_GPL(sata_pmp_qc_defer_cmd_switch); |
3af9a77a TH |
7655 | EXPORT_SYMBOL_GPL(sata_pmp_std_prereset); |
7656 | EXPORT_SYMBOL_GPL(sata_pmp_std_hardreset); | |
7657 | EXPORT_SYMBOL_GPL(sata_pmp_std_postreset); | |
7658 | EXPORT_SYMBOL_GPL(sata_pmp_do_eh); | |
7659 | ||
b64bbc39 TH |
7660 | EXPORT_SYMBOL_GPL(__ata_ehi_push_desc); |
7661 | EXPORT_SYMBOL_GPL(ata_ehi_push_desc); | |
7662 | EXPORT_SYMBOL_GPL(ata_ehi_clear_desc); | |
cbcdd875 TH |
7663 | EXPORT_SYMBOL_GPL(ata_port_desc); |
7664 | #ifdef CONFIG_PCI | |
7665 | EXPORT_SYMBOL_GPL(ata_port_pbar_desc); | |
7666 | #endif /* CONFIG_PCI */ | |
ece1d636 | 7667 | EXPORT_SYMBOL_GPL(ata_eng_timeout); |
7b70fc03 | 7668 | EXPORT_SYMBOL_GPL(ata_port_schedule_eh); |
dbd82616 | 7669 | EXPORT_SYMBOL_GPL(ata_link_abort); |
7b70fc03 | 7670 | EXPORT_SYMBOL_GPL(ata_port_abort); |
e3180499 | 7671 | EXPORT_SYMBOL_GPL(ata_port_freeze); |
7d77b247 | 7672 | EXPORT_SYMBOL_GPL(sata_async_notification); |
e3180499 TH |
7673 | EXPORT_SYMBOL_GPL(ata_eh_freeze_port); |
7674 | EXPORT_SYMBOL_GPL(ata_eh_thaw_port); | |
ece1d636 TH |
7675 | EXPORT_SYMBOL_GPL(ata_eh_qc_complete); |
7676 | EXPORT_SYMBOL_GPL(ata_eh_qc_retry); | |
022bdb07 | 7677 | EXPORT_SYMBOL_GPL(ata_do_eh); |
83625006 | 7678 | EXPORT_SYMBOL_GPL(ata_irq_on); |
a619f981 | 7679 | EXPORT_SYMBOL_GPL(ata_dev_try_classify); |
be0d18df AC |
7680 | |
7681 | EXPORT_SYMBOL_GPL(ata_cable_40wire); | |
7682 | EXPORT_SYMBOL_GPL(ata_cable_80wire); | |
7683 | EXPORT_SYMBOL_GPL(ata_cable_unknown); | |
7684 | EXPORT_SYMBOL_GPL(ata_cable_sata); |