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1da177e4 1/*
af36d7f0
JG
2 * libata-core.c - helper library for ATA
3 *
4 * Maintained by: Jeff Garzik <jgarzik@pobox.com>
5 * Please ALWAYS copy linux-ide@vger.kernel.org
6 * on emails.
7 *
8 * Copyright 2003-2004 Red Hat, Inc. All rights reserved.
9 * Copyright 2003-2004 Jeff Garzik
10 *
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2, or (at your option)
15 * any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; see the file COPYING. If not, write to
24 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
25 *
26 *
27 * libata documentation is available via 'make {ps|pdf}docs',
28 * as Documentation/DocBook/libata.*
29 *
30 * Hardware documentation available from http://www.t13.org/ and
31 * http://www.sata-io.org/
32 *
92c52c52
AC
33 * Standards documents from:
34 * http://www.t13.org (ATA standards, PCI DMA IDE spec)
35 * http://www.t10.org (SCSI MMC - for ATAPI MMC)
36 * http://www.sata-io.org (SATA)
37 * http://www.compactflash.org (CF)
38 * http://www.qic.org (QIC157 - Tape and DSC)
39 * http://www.ce-ata.org (CE-ATA: not supported)
40 *
1da177e4
LT
41 */
42
1da177e4
LT
43#include <linux/kernel.h>
44#include <linux/module.h>
45#include <linux/pci.h>
46#include <linux/init.h>
47#include <linux/list.h>
48#include <linux/mm.h>
1da177e4
LT
49#include <linux/spinlock.h>
50#include <linux/blkdev.h>
51#include <linux/delay.h>
52#include <linux/timer.h>
53#include <linux/interrupt.h>
54#include <linux/completion.h>
55#include <linux/suspend.h>
56#include <linux/workqueue.h>
378f058c 57#include <linux/scatterlist.h>
2dcb407e 58#include <linux/io.h>
79318057 59#include <linux/async.h>
e18086d6 60#include <linux/log2.h>
5a0e3ad6 61#include <linux/slab.h>
1da177e4 62#include <scsi/scsi.h>
193515d5 63#include <scsi/scsi_cmnd.h>
1da177e4
LT
64#include <scsi/scsi_host.h>
65#include <linux/libata.h>
1da177e4 66#include <asm/byteorder.h>
140b5e59 67#include <linux/cdrom.h>
9990b6f3 68#include <linux/ratelimit.h>
9ee4f393 69#include <linux/pm_runtime.h>
1da177e4
LT
70
71#include "libata.h"
d9027470 72#include "libata-transport.h"
fda0efc5 73
d7bb4cc7 74/* debounce timing parameters in msecs { interval, duration, timeout } */
e9c83914
TH
75const unsigned long sata_deb_timing_normal[] = { 5, 100, 2000 };
76const unsigned long sata_deb_timing_hotplug[] = { 25, 500, 2000 };
77const unsigned long sata_deb_timing_long[] = { 100, 2000, 5000 };
d7bb4cc7 78
029cfd6b 79const struct ata_port_operations ata_base_port_ops = {
0aa1113d 80 .prereset = ata_std_prereset,
203c75b8 81 .postreset = ata_std_postreset,
a1efdaba 82 .error_handler = ata_std_error_handler,
029cfd6b
TH
83};
84
85const struct ata_port_operations sata_port_ops = {
86 .inherits = &ata_base_port_ops,
87
88 .qc_defer = ata_std_qc_defer,
57c9efdf 89 .hardreset = sata_std_hardreset,
029cfd6b
TH
90};
91
3373efd8
TH
92static unsigned int ata_dev_init_params(struct ata_device *dev,
93 u16 heads, u16 sectors);
94static unsigned int ata_dev_set_xfermode(struct ata_device *dev);
95static void ata_dev_xfermask(struct ata_device *dev);
75683fe7 96static unsigned long ata_dev_blacklisted(const struct ata_device *dev);
1da177e4 97
a78f57af 98atomic_t ata_print_id = ATOMIC_INIT(0);
1da177e4 99
33267325
TH
100struct ata_force_param {
101 const char *name;
102 unsigned int cbl;
103 int spd_limit;
104 unsigned long xfer_mask;
105 unsigned int horkage_on;
106 unsigned int horkage_off;
05944bdf 107 unsigned int lflags;
33267325
TH
108};
109
110struct ata_force_ent {
111 int port;
112 int device;
113 struct ata_force_param param;
114};
115
116static struct ata_force_ent *ata_force_tbl;
117static int ata_force_tbl_size;
118
119static char ata_force_param_buf[PAGE_SIZE] __initdata;
7afb4222
TH
120/* param_buf is thrown away after initialization, disallow read */
121module_param_string(force, ata_force_param_buf, sizeof(ata_force_param_buf), 0);
33267325
TH
122MODULE_PARM_DESC(force, "Force ATA configurations including cable type, link speed and transfer mode (see Documentation/kernel-parameters.txt for details)");
123
2486fa56 124static int atapi_enabled = 1;
1623c81e 125module_param(atapi_enabled, int, 0444);
ad5d8eac 126MODULE_PARM_DESC(atapi_enabled, "Enable discovery of ATAPI devices (0=off, 1=on [default])");
1623c81e 127
c5c61bda 128static int atapi_dmadir = 0;
95de719a 129module_param(atapi_dmadir, int, 0444);
ad5d8eac 130MODULE_PARM_DESC(atapi_dmadir, "Enable ATAPI DMADIR bridge support (0=off [default], 1=on)");
95de719a 131
baf4fdfa
ML
132int atapi_passthru16 = 1;
133module_param(atapi_passthru16, int, 0444);
ad5d8eac 134MODULE_PARM_DESC(atapi_passthru16, "Enable ATA_16 passthru for ATAPI devices (0=off, 1=on [default])");
baf4fdfa 135
c3c013a2
JG
136int libata_fua = 0;
137module_param_named(fua, libata_fua, int, 0444);
ad5d8eac 138MODULE_PARM_DESC(fua, "FUA support (0=off [default], 1=on)");
c3c013a2 139
2dcb407e 140static int ata_ignore_hpa;
1e999736
AC
141module_param_named(ignore_hpa, ata_ignore_hpa, int, 0644);
142MODULE_PARM_DESC(ignore_hpa, "Ignore HPA limit (0=keep BIOS limits, 1=ignore limits, using full disk)");
143
b3a70601
AC
144static int libata_dma_mask = ATA_DMA_MASK_ATA|ATA_DMA_MASK_ATAPI|ATA_DMA_MASK_CFA;
145module_param_named(dma, libata_dma_mask, int, 0444);
146MODULE_PARM_DESC(dma, "DMA enable/disable (0x1==ATA, 0x2==ATAPI, 0x4==CF)");
147
87fbc5a0 148static int ata_probe_timeout;
a8601e5f
AM
149module_param(ata_probe_timeout, int, 0444);
150MODULE_PARM_DESC(ata_probe_timeout, "Set ATA probing timeout (seconds)");
151
6ebe9d86 152int libata_noacpi = 0;
d7d0dad6 153module_param_named(noacpi, libata_noacpi, int, 0444);
ad5d8eac 154MODULE_PARM_DESC(noacpi, "Disable the use of ACPI in probe/suspend/resume (0=off [default], 1=on)");
11ef697b 155
ae8d4ee7
AC
156int libata_allow_tpm = 0;
157module_param_named(allow_tpm, libata_allow_tpm, int, 0444);
ad5d8eac 158MODULE_PARM_DESC(allow_tpm, "Permit the use of TPM commands (0=off [default], 1=on)");
ae8d4ee7 159
e7ecd435
TH
160static int atapi_an;
161module_param(atapi_an, int, 0444);
162MODULE_PARM_DESC(atapi_an, "Enable ATAPI AN media presence notification (0=0ff [default], 1=on)");
163
1da177e4
LT
164MODULE_AUTHOR("Jeff Garzik");
165MODULE_DESCRIPTION("Library module for ATA devices");
166MODULE_LICENSE("GPL");
167MODULE_VERSION(DRV_VERSION);
168
0baab86b 169
9913ff8a
TH
170static bool ata_sstatus_online(u32 sstatus)
171{
172 return (sstatus & 0xf) == 0x3;
173}
174
1eca4365
TH
175/**
176 * ata_link_next - link iteration helper
177 * @link: the previous link, NULL to start
178 * @ap: ATA port containing links to iterate
179 * @mode: iteration mode, one of ATA_LITER_*
180 *
181 * LOCKING:
182 * Host lock or EH context.
aadffb68 183 *
1eca4365
TH
184 * RETURNS:
185 * Pointer to the next link.
aadffb68 186 */
1eca4365
TH
187struct ata_link *ata_link_next(struct ata_link *link, struct ata_port *ap,
188 enum ata_link_iter_mode mode)
aadffb68 189{
1eca4365
TH
190 BUG_ON(mode != ATA_LITER_EDGE &&
191 mode != ATA_LITER_PMP_FIRST && mode != ATA_LITER_HOST_FIRST);
192
aadffb68 193 /* NULL link indicates start of iteration */
1eca4365
TH
194 if (!link)
195 switch (mode) {
196 case ATA_LITER_EDGE:
197 case ATA_LITER_PMP_FIRST:
198 if (sata_pmp_attached(ap))
199 return ap->pmp_link;
200 /* fall through */
201 case ATA_LITER_HOST_FIRST:
202 return &ap->link;
203 }
aadffb68 204
1eca4365
TH
205 /* we just iterated over the host link, what's next? */
206 if (link == &ap->link)
207 switch (mode) {
208 case ATA_LITER_HOST_FIRST:
209 if (sata_pmp_attached(ap))
210 return ap->pmp_link;
211 /* fall through */
212 case ATA_LITER_PMP_FIRST:
213 if (unlikely(ap->slave_link))
b1c72916 214 return ap->slave_link;
1eca4365
TH
215 /* fall through */
216 case ATA_LITER_EDGE:
aadffb68 217 return NULL;
b1c72916 218 }
aadffb68 219
b1c72916
TH
220 /* slave_link excludes PMP */
221 if (unlikely(link == ap->slave_link))
222 return NULL;
223
1eca4365 224 /* we were over a PMP link */
aadffb68
TH
225 if (++link < ap->pmp_link + ap->nr_pmp_links)
226 return link;
1eca4365
TH
227
228 if (mode == ATA_LITER_PMP_FIRST)
229 return &ap->link;
230
aadffb68
TH
231 return NULL;
232}
233
1eca4365
TH
234/**
235 * ata_dev_next - device iteration helper
236 * @dev: the previous device, NULL to start
237 * @link: ATA link containing devices to iterate
238 * @mode: iteration mode, one of ATA_DITER_*
239 *
240 * LOCKING:
241 * Host lock or EH context.
242 *
243 * RETURNS:
244 * Pointer to the next device.
245 */
246struct ata_device *ata_dev_next(struct ata_device *dev, struct ata_link *link,
247 enum ata_dev_iter_mode mode)
248{
249 BUG_ON(mode != ATA_DITER_ENABLED && mode != ATA_DITER_ENABLED_REVERSE &&
250 mode != ATA_DITER_ALL && mode != ATA_DITER_ALL_REVERSE);
251
252 /* NULL dev indicates start of iteration */
253 if (!dev)
254 switch (mode) {
255 case ATA_DITER_ENABLED:
256 case ATA_DITER_ALL:
257 dev = link->device;
258 goto check;
259 case ATA_DITER_ENABLED_REVERSE:
260 case ATA_DITER_ALL_REVERSE:
261 dev = link->device + ata_link_max_devices(link) - 1;
262 goto check;
263 }
264
265 next:
266 /* move to the next one */
267 switch (mode) {
268 case ATA_DITER_ENABLED:
269 case ATA_DITER_ALL:
270 if (++dev < link->device + ata_link_max_devices(link))
271 goto check;
272 return NULL;
273 case ATA_DITER_ENABLED_REVERSE:
274 case ATA_DITER_ALL_REVERSE:
275 if (--dev >= link->device)
276 goto check;
277 return NULL;
278 }
279
280 check:
281 if ((mode == ATA_DITER_ENABLED || mode == ATA_DITER_ENABLED_REVERSE) &&
282 !ata_dev_enabled(dev))
283 goto next;
284 return dev;
285}
286
b1c72916
TH
287/**
288 * ata_dev_phys_link - find physical link for a device
289 * @dev: ATA device to look up physical link for
290 *
291 * Look up physical link which @dev is attached to. Note that
292 * this is different from @dev->link only when @dev is on slave
293 * link. For all other cases, it's the same as @dev->link.
294 *
295 * LOCKING:
296 * Don't care.
297 *
298 * RETURNS:
299 * Pointer to the found physical link.
300 */
301struct ata_link *ata_dev_phys_link(struct ata_device *dev)
302{
303 struct ata_port *ap = dev->link->ap;
304
305 if (!ap->slave_link)
306 return dev->link;
307 if (!dev->devno)
308 return &ap->link;
309 return ap->slave_link;
310}
311
33267325
TH
312/**
313 * ata_force_cbl - force cable type according to libata.force
4cdfa1b3 314 * @ap: ATA port of interest
33267325
TH
315 *
316 * Force cable type according to libata.force and whine about it.
317 * The last entry which has matching port number is used, so it
318 * can be specified as part of device force parameters. For
319 * example, both "a:40c,1.00:udma4" and "1.00:40c,udma4" have the
320 * same effect.
321 *
322 * LOCKING:
323 * EH context.
324 */
325void ata_force_cbl(struct ata_port *ap)
326{
327 int i;
328
329 for (i = ata_force_tbl_size - 1; i >= 0; i--) {
330 const struct ata_force_ent *fe = &ata_force_tbl[i];
331
332 if (fe->port != -1 && fe->port != ap->print_id)
333 continue;
334
335 if (fe->param.cbl == ATA_CBL_NONE)
336 continue;
337
338 ap->cbl = fe->param.cbl;
a9a79dfe 339 ata_port_notice(ap, "FORCE: cable set to %s\n", fe->param.name);
33267325
TH
340 return;
341 }
342}
343
344/**
05944bdf 345 * ata_force_link_limits - force link limits according to libata.force
33267325
TH
346 * @link: ATA link of interest
347 *
05944bdf
TH
348 * Force link flags and SATA spd limit according to libata.force
349 * and whine about it. When only the port part is specified
350 * (e.g. 1:), the limit applies to all links connected to both
351 * the host link and all fan-out ports connected via PMP. If the
352 * device part is specified as 0 (e.g. 1.00:), it specifies the
353 * first fan-out link not the host link. Device number 15 always
b1c72916
TH
354 * points to the host link whether PMP is attached or not. If the
355 * controller has slave link, device number 16 points to it.
33267325
TH
356 *
357 * LOCKING:
358 * EH context.
359 */
05944bdf 360static void ata_force_link_limits(struct ata_link *link)
33267325 361{
05944bdf 362 bool did_spd = false;
b1c72916
TH
363 int linkno = link->pmp;
364 int i;
33267325
TH
365
366 if (ata_is_host_link(link))
b1c72916 367 linkno += 15;
33267325
TH
368
369 for (i = ata_force_tbl_size - 1; i >= 0; i--) {
370 const struct ata_force_ent *fe = &ata_force_tbl[i];
371
372 if (fe->port != -1 && fe->port != link->ap->print_id)
373 continue;
374
375 if (fe->device != -1 && fe->device != linkno)
376 continue;
377
05944bdf
TH
378 /* only honor the first spd limit */
379 if (!did_spd && fe->param.spd_limit) {
380 link->hw_sata_spd_limit = (1 << fe->param.spd_limit) - 1;
a9a79dfe 381 ata_link_notice(link, "FORCE: PHY spd limit set to %s\n",
05944bdf
TH
382 fe->param.name);
383 did_spd = true;
384 }
33267325 385
05944bdf
TH
386 /* let lflags stack */
387 if (fe->param.lflags) {
388 link->flags |= fe->param.lflags;
a9a79dfe 389 ata_link_notice(link,
05944bdf
TH
390 "FORCE: link flag 0x%x forced -> 0x%x\n",
391 fe->param.lflags, link->flags);
392 }
33267325
TH
393 }
394}
395
396/**
397 * ata_force_xfermask - force xfermask according to libata.force
398 * @dev: ATA device of interest
399 *
400 * Force xfer_mask according to libata.force and whine about it.
401 * For consistency with link selection, device number 15 selects
402 * the first device connected to the host link.
403 *
404 * LOCKING:
405 * EH context.
406 */
407static void ata_force_xfermask(struct ata_device *dev)
408{
409 int devno = dev->link->pmp + dev->devno;
410 int alt_devno = devno;
411 int i;
412
b1c72916
TH
413 /* allow n.15/16 for devices attached to host port */
414 if (ata_is_host_link(dev->link))
415 alt_devno += 15;
33267325
TH
416
417 for (i = ata_force_tbl_size - 1; i >= 0; i--) {
418 const struct ata_force_ent *fe = &ata_force_tbl[i];
419 unsigned long pio_mask, mwdma_mask, udma_mask;
420
421 if (fe->port != -1 && fe->port != dev->link->ap->print_id)
422 continue;
423
424 if (fe->device != -1 && fe->device != devno &&
425 fe->device != alt_devno)
426 continue;
427
428 if (!fe->param.xfer_mask)
429 continue;
430
431 ata_unpack_xfermask(fe->param.xfer_mask,
432 &pio_mask, &mwdma_mask, &udma_mask);
433 if (udma_mask)
434 dev->udma_mask = udma_mask;
435 else if (mwdma_mask) {
436 dev->udma_mask = 0;
437 dev->mwdma_mask = mwdma_mask;
438 } else {
439 dev->udma_mask = 0;
440 dev->mwdma_mask = 0;
441 dev->pio_mask = pio_mask;
442 }
443
a9a79dfe
JP
444 ata_dev_notice(dev, "FORCE: xfer_mask set to %s\n",
445 fe->param.name);
33267325
TH
446 return;
447 }
448}
449
450/**
451 * ata_force_horkage - force horkage according to libata.force
452 * @dev: ATA device of interest
453 *
454 * Force horkage according to libata.force and whine about it.
455 * For consistency with link selection, device number 15 selects
456 * the first device connected to the host link.
457 *
458 * LOCKING:
459 * EH context.
460 */
461static void ata_force_horkage(struct ata_device *dev)
462{
463 int devno = dev->link->pmp + dev->devno;
464 int alt_devno = devno;
465 int i;
466
b1c72916
TH
467 /* allow n.15/16 for devices attached to host port */
468 if (ata_is_host_link(dev->link))
469 alt_devno += 15;
33267325
TH
470
471 for (i = 0; i < ata_force_tbl_size; i++) {
472 const struct ata_force_ent *fe = &ata_force_tbl[i];
473
474 if (fe->port != -1 && fe->port != dev->link->ap->print_id)
475 continue;
476
477 if (fe->device != -1 && fe->device != devno &&
478 fe->device != alt_devno)
479 continue;
480
481 if (!(~dev->horkage & fe->param.horkage_on) &&
482 !(dev->horkage & fe->param.horkage_off))
483 continue;
484
485 dev->horkage |= fe->param.horkage_on;
486 dev->horkage &= ~fe->param.horkage_off;
487
a9a79dfe
JP
488 ata_dev_notice(dev, "FORCE: horkage modified (%s)\n",
489 fe->param.name);
33267325
TH
490 }
491}
492
436d34b3
TH
493/**
494 * atapi_cmd_type - Determine ATAPI command type from SCSI opcode
495 * @opcode: SCSI opcode
496 *
497 * Determine ATAPI command type from @opcode.
498 *
499 * LOCKING:
500 * None.
501 *
502 * RETURNS:
503 * ATAPI_{READ|WRITE|READ_CD|PASS_THRU|MISC}
504 */
505int atapi_cmd_type(u8 opcode)
506{
507 switch (opcode) {
508 case GPCMD_READ_10:
509 case GPCMD_READ_12:
510 return ATAPI_READ;
511
512 case GPCMD_WRITE_10:
513 case GPCMD_WRITE_12:
514 case GPCMD_WRITE_AND_VERIFY_10:
515 return ATAPI_WRITE;
516
517 case GPCMD_READ_CD:
518 case GPCMD_READ_CD_MSF:
519 return ATAPI_READ_CD;
520
e52dcc48
TH
521 case ATA_16:
522 case ATA_12:
523 if (atapi_passthru16)
524 return ATAPI_PASS_THRU;
525 /* fall thru */
436d34b3
TH
526 default:
527 return ATAPI_MISC;
528 }
529}
530
1da177e4
LT
531/**
532 * ata_tf_to_fis - Convert ATA taskfile to SATA FIS structure
533 * @tf: Taskfile to convert
1da177e4 534 * @pmp: Port multiplier port
9977126c
TH
535 * @is_cmd: This FIS is for command
536 * @fis: Buffer into which data will output
1da177e4
LT
537 *
538 * Converts a standard ATA taskfile to a Serial ATA
539 * FIS structure (Register - Host to Device).
540 *
541 * LOCKING:
542 * Inherited from caller.
543 */
9977126c 544void ata_tf_to_fis(const struct ata_taskfile *tf, u8 pmp, int is_cmd, u8 *fis)
1da177e4 545{
9977126c
TH
546 fis[0] = 0x27; /* Register - Host to Device FIS */
547 fis[1] = pmp & 0xf; /* Port multiplier number*/
548 if (is_cmd)
549 fis[1] |= (1 << 7); /* bit 7 indicates Command FIS */
550
1da177e4
LT
551 fis[2] = tf->command;
552 fis[3] = tf->feature;
553
554 fis[4] = tf->lbal;
555 fis[5] = tf->lbam;
556 fis[6] = tf->lbah;
557 fis[7] = tf->device;
558
559 fis[8] = tf->hob_lbal;
560 fis[9] = tf->hob_lbam;
561 fis[10] = tf->hob_lbah;
562 fis[11] = tf->hob_feature;
563
564 fis[12] = tf->nsect;
565 fis[13] = tf->hob_nsect;
566 fis[14] = 0;
567 fis[15] = tf->ctl;
568
569 fis[16] = 0;
570 fis[17] = 0;
571 fis[18] = 0;
572 fis[19] = 0;
573}
574
575/**
576 * ata_tf_from_fis - Convert SATA FIS to ATA taskfile
577 * @fis: Buffer from which data will be input
578 * @tf: Taskfile to output
579 *
e12a1be6 580 * Converts a serial ATA FIS structure to a standard ATA taskfile.
1da177e4
LT
581 *
582 * LOCKING:
583 * Inherited from caller.
584 */
585
057ace5e 586void ata_tf_from_fis(const u8 *fis, struct ata_taskfile *tf)
1da177e4
LT
587{
588 tf->command = fis[2]; /* status */
589 tf->feature = fis[3]; /* error */
590
591 tf->lbal = fis[4];
592 tf->lbam = fis[5];
593 tf->lbah = fis[6];
594 tf->device = fis[7];
595
596 tf->hob_lbal = fis[8];
597 tf->hob_lbam = fis[9];
598 tf->hob_lbah = fis[10];
599
600 tf->nsect = fis[12];
601 tf->hob_nsect = fis[13];
602}
603
8cbd6df1
AL
604static const u8 ata_rw_cmds[] = {
605 /* pio multi */
606 ATA_CMD_READ_MULTI,
607 ATA_CMD_WRITE_MULTI,
608 ATA_CMD_READ_MULTI_EXT,
609 ATA_CMD_WRITE_MULTI_EXT,
9a3dccc4
TH
610 0,
611 0,
612 0,
613 ATA_CMD_WRITE_MULTI_FUA_EXT,
8cbd6df1
AL
614 /* pio */
615 ATA_CMD_PIO_READ,
616 ATA_CMD_PIO_WRITE,
617 ATA_CMD_PIO_READ_EXT,
618 ATA_CMD_PIO_WRITE_EXT,
9a3dccc4
TH
619 0,
620 0,
621 0,
622 0,
8cbd6df1
AL
623 /* dma */
624 ATA_CMD_READ,
625 ATA_CMD_WRITE,
626 ATA_CMD_READ_EXT,
9a3dccc4
TH
627 ATA_CMD_WRITE_EXT,
628 0,
629 0,
630 0,
631 ATA_CMD_WRITE_FUA_EXT
8cbd6df1 632};
1da177e4
LT
633
634/**
8cbd6df1 635 * ata_rwcmd_protocol - set taskfile r/w commands and protocol
bd056d7e
TH
636 * @tf: command to examine and configure
637 * @dev: device tf belongs to
1da177e4 638 *
2e9edbf8 639 * Examine the device configuration and tf->flags to calculate
8cbd6df1 640 * the proper read/write commands and protocol to use.
1da177e4
LT
641 *
642 * LOCKING:
643 * caller.
644 */
bd056d7e 645static int ata_rwcmd_protocol(struct ata_taskfile *tf, struct ata_device *dev)
1da177e4 646{
9a3dccc4 647 u8 cmd;
1da177e4 648
9a3dccc4 649 int index, fua, lba48, write;
2e9edbf8 650
9a3dccc4 651 fua = (tf->flags & ATA_TFLAG_FUA) ? 4 : 0;
8cbd6df1
AL
652 lba48 = (tf->flags & ATA_TFLAG_LBA48) ? 2 : 0;
653 write = (tf->flags & ATA_TFLAG_WRITE) ? 1 : 0;
1da177e4 654
8cbd6df1
AL
655 if (dev->flags & ATA_DFLAG_PIO) {
656 tf->protocol = ATA_PROT_PIO;
9a3dccc4 657 index = dev->multi_count ? 0 : 8;
9af5c9c9 658 } else if (lba48 && (dev->link->ap->flags & ATA_FLAG_PIO_LBA48)) {
8d238e01
AC
659 /* Unable to use DMA due to host limitation */
660 tf->protocol = ATA_PROT_PIO;
0565c26d 661 index = dev->multi_count ? 0 : 8;
8cbd6df1
AL
662 } else {
663 tf->protocol = ATA_PROT_DMA;
9a3dccc4 664 index = 16;
8cbd6df1 665 }
1da177e4 666
9a3dccc4
TH
667 cmd = ata_rw_cmds[index + fua + lba48 + write];
668 if (cmd) {
669 tf->command = cmd;
670 return 0;
671 }
672 return -1;
1da177e4
LT
673}
674
35b649fe
TH
675/**
676 * ata_tf_read_block - Read block address from ATA taskfile
677 * @tf: ATA taskfile of interest
678 * @dev: ATA device @tf belongs to
679 *
680 * LOCKING:
681 * None.
682 *
683 * Read block address from @tf. This function can handle all
684 * three address formats - LBA, LBA48 and CHS. tf->protocol and
685 * flags select the address format to use.
686 *
687 * RETURNS:
688 * Block address read from @tf.
689 */
690u64 ata_tf_read_block(struct ata_taskfile *tf, struct ata_device *dev)
691{
692 u64 block = 0;
693
694 if (tf->flags & ATA_TFLAG_LBA) {
695 if (tf->flags & ATA_TFLAG_LBA48) {
696 block |= (u64)tf->hob_lbah << 40;
697 block |= (u64)tf->hob_lbam << 32;
44901a96 698 block |= (u64)tf->hob_lbal << 24;
35b649fe
TH
699 } else
700 block |= (tf->device & 0xf) << 24;
701
702 block |= tf->lbah << 16;
703 block |= tf->lbam << 8;
704 block |= tf->lbal;
705 } else {
706 u32 cyl, head, sect;
707
708 cyl = tf->lbam | (tf->lbah << 8);
709 head = tf->device & 0xf;
710 sect = tf->lbal;
711
ac8672ea 712 if (!sect) {
a9a79dfe
JP
713 ata_dev_warn(dev,
714 "device reported invalid CHS sector 0\n");
ac8672ea
TH
715 sect = 1; /* oh well */
716 }
717
718 block = (cyl * dev->heads + head) * dev->sectors + sect - 1;
35b649fe
TH
719 }
720
721 return block;
722}
723
bd056d7e
TH
724/**
725 * ata_build_rw_tf - Build ATA taskfile for given read/write request
726 * @tf: Target ATA taskfile
727 * @dev: ATA device @tf belongs to
728 * @block: Block address
729 * @n_block: Number of blocks
730 * @tf_flags: RW/FUA etc...
731 * @tag: tag
732 *
733 * LOCKING:
734 * None.
735 *
736 * Build ATA taskfile @tf for read/write request described by
737 * @block, @n_block, @tf_flags and @tag on @dev.
738 *
739 * RETURNS:
740 *
741 * 0 on success, -ERANGE if the request is too large for @dev,
742 * -EINVAL if the request is invalid.
743 */
744int ata_build_rw_tf(struct ata_taskfile *tf, struct ata_device *dev,
745 u64 block, u32 n_block, unsigned int tf_flags,
746 unsigned int tag)
747{
748 tf->flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
749 tf->flags |= tf_flags;
750
6d1245bf 751 if (ata_ncq_enabled(dev) && likely(tag != ATA_TAG_INTERNAL)) {
bd056d7e
TH
752 /* yay, NCQ */
753 if (!lba_48_ok(block, n_block))
754 return -ERANGE;
755
756 tf->protocol = ATA_PROT_NCQ;
757 tf->flags |= ATA_TFLAG_LBA | ATA_TFLAG_LBA48;
758
759 if (tf->flags & ATA_TFLAG_WRITE)
760 tf->command = ATA_CMD_FPDMA_WRITE;
761 else
762 tf->command = ATA_CMD_FPDMA_READ;
763
764 tf->nsect = tag << 3;
765 tf->hob_feature = (n_block >> 8) & 0xff;
766 tf->feature = n_block & 0xff;
767
768 tf->hob_lbah = (block >> 40) & 0xff;
769 tf->hob_lbam = (block >> 32) & 0xff;
770 tf->hob_lbal = (block >> 24) & 0xff;
771 tf->lbah = (block >> 16) & 0xff;
772 tf->lbam = (block >> 8) & 0xff;
773 tf->lbal = block & 0xff;
774
775 tf->device = 1 << 6;
776 if (tf->flags & ATA_TFLAG_FUA)
777 tf->device |= 1 << 7;
778 } else if (dev->flags & ATA_DFLAG_LBA) {
779 tf->flags |= ATA_TFLAG_LBA;
780
781 if (lba_28_ok(block, n_block)) {
782 /* use LBA28 */
783 tf->device |= (block >> 24) & 0xf;
784 } else if (lba_48_ok(block, n_block)) {
785 if (!(dev->flags & ATA_DFLAG_LBA48))
786 return -ERANGE;
787
788 /* use LBA48 */
789 tf->flags |= ATA_TFLAG_LBA48;
790
791 tf->hob_nsect = (n_block >> 8) & 0xff;
792
793 tf->hob_lbah = (block >> 40) & 0xff;
794 tf->hob_lbam = (block >> 32) & 0xff;
795 tf->hob_lbal = (block >> 24) & 0xff;
796 } else
797 /* request too large even for LBA48 */
798 return -ERANGE;
799
800 if (unlikely(ata_rwcmd_protocol(tf, dev) < 0))
801 return -EINVAL;
802
803 tf->nsect = n_block & 0xff;
804
805 tf->lbah = (block >> 16) & 0xff;
806 tf->lbam = (block >> 8) & 0xff;
807 tf->lbal = block & 0xff;
808
809 tf->device |= ATA_LBA;
810 } else {
811 /* CHS */
812 u32 sect, head, cyl, track;
813
814 /* The request -may- be too large for CHS addressing. */
815 if (!lba_28_ok(block, n_block))
816 return -ERANGE;
817
818 if (unlikely(ata_rwcmd_protocol(tf, dev) < 0))
819 return -EINVAL;
820
821 /* Convert LBA to CHS */
822 track = (u32)block / dev->sectors;
823 cyl = track / dev->heads;
824 head = track % dev->heads;
825 sect = (u32)block % dev->sectors + 1;
826
827 DPRINTK("block %u track %u cyl %u head %u sect %u\n",
828 (u32)block, track, cyl, head, sect);
829
830 /* Check whether the converted CHS can fit.
831 Cylinder: 0-65535
832 Head: 0-15
833 Sector: 1-255*/
834 if ((cyl >> 16) || (head >> 4) || (sect >> 8) || (!sect))
835 return -ERANGE;
836
837 tf->nsect = n_block & 0xff; /* Sector count 0 means 256 sectors */
838 tf->lbal = sect;
839 tf->lbam = cyl;
840 tf->lbah = cyl >> 8;
841 tf->device |= head;
842 }
843
844 return 0;
845}
846
cb95d562
TH
847/**
848 * ata_pack_xfermask - Pack pio, mwdma and udma masks into xfer_mask
849 * @pio_mask: pio_mask
850 * @mwdma_mask: mwdma_mask
851 * @udma_mask: udma_mask
852 *
853 * Pack @pio_mask, @mwdma_mask and @udma_mask into a single
854 * unsigned int xfer_mask.
855 *
856 * LOCKING:
857 * None.
858 *
859 * RETURNS:
860 * Packed xfer_mask.
861 */
7dc951ae
TH
862unsigned long ata_pack_xfermask(unsigned long pio_mask,
863 unsigned long mwdma_mask,
864 unsigned long udma_mask)
cb95d562
TH
865{
866 return ((pio_mask << ATA_SHIFT_PIO) & ATA_MASK_PIO) |
867 ((mwdma_mask << ATA_SHIFT_MWDMA) & ATA_MASK_MWDMA) |
868 ((udma_mask << ATA_SHIFT_UDMA) & ATA_MASK_UDMA);
869}
870
c0489e4e
TH
871/**
872 * ata_unpack_xfermask - Unpack xfer_mask into pio, mwdma and udma masks
873 * @xfer_mask: xfer_mask to unpack
874 * @pio_mask: resulting pio_mask
875 * @mwdma_mask: resulting mwdma_mask
876 * @udma_mask: resulting udma_mask
877 *
878 * Unpack @xfer_mask into @pio_mask, @mwdma_mask and @udma_mask.
879 * Any NULL distination masks will be ignored.
880 */
7dc951ae
TH
881void ata_unpack_xfermask(unsigned long xfer_mask, unsigned long *pio_mask,
882 unsigned long *mwdma_mask, unsigned long *udma_mask)
c0489e4e
TH
883{
884 if (pio_mask)
885 *pio_mask = (xfer_mask & ATA_MASK_PIO) >> ATA_SHIFT_PIO;
886 if (mwdma_mask)
887 *mwdma_mask = (xfer_mask & ATA_MASK_MWDMA) >> ATA_SHIFT_MWDMA;
888 if (udma_mask)
889 *udma_mask = (xfer_mask & ATA_MASK_UDMA) >> ATA_SHIFT_UDMA;
890}
891
cb95d562 892static const struct ata_xfer_ent {
be9a50c8 893 int shift, bits;
cb95d562
TH
894 u8 base;
895} ata_xfer_tbl[] = {
70cd071e
TH
896 { ATA_SHIFT_PIO, ATA_NR_PIO_MODES, XFER_PIO_0 },
897 { ATA_SHIFT_MWDMA, ATA_NR_MWDMA_MODES, XFER_MW_DMA_0 },
898 { ATA_SHIFT_UDMA, ATA_NR_UDMA_MODES, XFER_UDMA_0 },
cb95d562
TH
899 { -1, },
900};
901
902/**
903 * ata_xfer_mask2mode - Find matching XFER_* for the given xfer_mask
904 * @xfer_mask: xfer_mask of interest
905 *
906 * Return matching XFER_* value for @xfer_mask. Only the highest
907 * bit of @xfer_mask is considered.
908 *
909 * LOCKING:
910 * None.
911 *
912 * RETURNS:
70cd071e 913 * Matching XFER_* value, 0xff if no match found.
cb95d562 914 */
7dc951ae 915u8 ata_xfer_mask2mode(unsigned long xfer_mask)
cb95d562
TH
916{
917 int highbit = fls(xfer_mask) - 1;
918 const struct ata_xfer_ent *ent;
919
920 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
921 if (highbit >= ent->shift && highbit < ent->shift + ent->bits)
922 return ent->base + highbit - ent->shift;
70cd071e 923 return 0xff;
cb95d562
TH
924}
925
926/**
927 * ata_xfer_mode2mask - Find matching xfer_mask for XFER_*
928 * @xfer_mode: XFER_* of interest
929 *
930 * Return matching xfer_mask for @xfer_mode.
931 *
932 * LOCKING:
933 * None.
934 *
935 * RETURNS:
936 * Matching xfer_mask, 0 if no match found.
937 */
7dc951ae 938unsigned long ata_xfer_mode2mask(u8 xfer_mode)
cb95d562
TH
939{
940 const struct ata_xfer_ent *ent;
941
942 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
943 if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits)
70cd071e
TH
944 return ((2 << (ent->shift + xfer_mode - ent->base)) - 1)
945 & ~((1 << ent->shift) - 1);
cb95d562
TH
946 return 0;
947}
948
949/**
950 * ata_xfer_mode2shift - Find matching xfer_shift for XFER_*
951 * @xfer_mode: XFER_* of interest
952 *
953 * Return matching xfer_shift for @xfer_mode.
954 *
955 * LOCKING:
956 * None.
957 *
958 * RETURNS:
959 * Matching xfer_shift, -1 if no match found.
960 */
7dc951ae 961int ata_xfer_mode2shift(unsigned long xfer_mode)
cb95d562
TH
962{
963 const struct ata_xfer_ent *ent;
964
965 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
966 if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits)
967 return ent->shift;
968 return -1;
969}
970
1da177e4 971/**
1da7b0d0
TH
972 * ata_mode_string - convert xfer_mask to string
973 * @xfer_mask: mask of bits supported; only highest bit counts.
1da177e4
LT
974 *
975 * Determine string which represents the highest speed
1da7b0d0 976 * (highest bit in @modemask).
1da177e4
LT
977 *
978 * LOCKING:
979 * None.
980 *
981 * RETURNS:
982 * Constant C string representing highest speed listed in
1da7b0d0 983 * @mode_mask, or the constant C string "<n/a>".
1da177e4 984 */
7dc951ae 985const char *ata_mode_string(unsigned long xfer_mask)
1da177e4 986{
75f554bc
TH
987 static const char * const xfer_mode_str[] = {
988 "PIO0",
989 "PIO1",
990 "PIO2",
991 "PIO3",
992 "PIO4",
b352e57d
AC
993 "PIO5",
994 "PIO6",
75f554bc
TH
995 "MWDMA0",
996 "MWDMA1",
997 "MWDMA2",
b352e57d
AC
998 "MWDMA3",
999 "MWDMA4",
75f554bc
TH
1000 "UDMA/16",
1001 "UDMA/25",
1002 "UDMA/33",
1003 "UDMA/44",
1004 "UDMA/66",
1005 "UDMA/100",
1006 "UDMA/133",
1007 "UDMA7",
1008 };
1da7b0d0 1009 int highbit;
1da177e4 1010
1da7b0d0
TH
1011 highbit = fls(xfer_mask) - 1;
1012 if (highbit >= 0 && highbit < ARRAY_SIZE(xfer_mode_str))
1013 return xfer_mode_str[highbit];
1da177e4 1014 return "<n/a>";
1da177e4
LT
1015}
1016
d9027470 1017const char *sata_spd_string(unsigned int spd)
4c360c81
TH
1018{
1019 static const char * const spd_str[] = {
1020 "1.5 Gbps",
1021 "3.0 Gbps",
8522ee25 1022 "6.0 Gbps",
4c360c81
TH
1023 };
1024
1025 if (spd == 0 || (spd - 1) >= ARRAY_SIZE(spd_str))
1026 return "<unknown>";
1027 return spd_str[spd - 1];
1028}
1029
1da177e4
LT
1030/**
1031 * ata_dev_classify - determine device type based on ATA-spec signature
1032 * @tf: ATA taskfile register set for device to be identified
1033 *
1034 * Determine from taskfile register contents whether a device is
1035 * ATA or ATAPI, as per "Signature and persistence" section
1036 * of ATA/PI spec (volume 1, sect 5.14).
1037 *
1038 * LOCKING:
1039 * None.
1040 *
1041 * RETURNS:
633273a3
TH
1042 * Device type, %ATA_DEV_ATA, %ATA_DEV_ATAPI, %ATA_DEV_PMP or
1043 * %ATA_DEV_UNKNOWN the event of failure.
1da177e4 1044 */
057ace5e 1045unsigned int ata_dev_classify(const struct ata_taskfile *tf)
1da177e4
LT
1046{
1047 /* Apple's open source Darwin code hints that some devices only
1048 * put a proper signature into the LBA mid/high registers,
1049 * So, we only check those. It's sufficient for uniqueness.
633273a3
TH
1050 *
1051 * ATA/ATAPI-7 (d1532v1r1: Feb. 19, 2003) specified separate
1052 * signatures for ATA and ATAPI devices attached on SerialATA,
1053 * 0x3c/0xc3 and 0x69/0x96 respectively. However, SerialATA
1054 * spec has never mentioned about using different signatures
1055 * for ATA/ATAPI devices. Then, Serial ATA II: Port
1056 * Multiplier specification began to use 0x69/0x96 to identify
1057 * port multpliers and 0x3c/0xc3 to identify SEMB device.
1058 * ATA/ATAPI-7 dropped descriptions about 0x3c/0xc3 and
1059 * 0x69/0x96 shortly and described them as reserved for
1060 * SerialATA.
1061 *
1062 * We follow the current spec and consider that 0x69/0x96
1063 * identifies a port multiplier and 0x3c/0xc3 a SEMB device.
79b42bab
TH
1064 * Unfortunately, WDC WD1600JS-62MHB5 (a hard drive) reports
1065 * SEMB signature. This is worked around in
1066 * ata_dev_read_id().
1da177e4 1067 */
633273a3 1068 if ((tf->lbam == 0) && (tf->lbah == 0)) {
1da177e4
LT
1069 DPRINTK("found ATA device by sig\n");
1070 return ATA_DEV_ATA;
1071 }
1072
633273a3 1073 if ((tf->lbam == 0x14) && (tf->lbah == 0xeb)) {
1da177e4
LT
1074 DPRINTK("found ATAPI device by sig\n");
1075 return ATA_DEV_ATAPI;
1076 }
1077
633273a3
TH
1078 if ((tf->lbam == 0x69) && (tf->lbah == 0x96)) {
1079 DPRINTK("found PMP device by sig\n");
1080 return ATA_DEV_PMP;
1081 }
1082
1083 if ((tf->lbam == 0x3c) && (tf->lbah == 0xc3)) {
79b42bab
TH
1084 DPRINTK("found SEMB device by sig (could be ATA device)\n");
1085 return ATA_DEV_SEMB;
633273a3
TH
1086 }
1087
1da177e4
LT
1088 DPRINTK("unknown device\n");
1089 return ATA_DEV_UNKNOWN;
1090}
1091
1da177e4 1092/**
6a62a04d 1093 * ata_id_string - Convert IDENTIFY DEVICE page into string
1da177e4
LT
1094 * @id: IDENTIFY DEVICE results we will examine
1095 * @s: string into which data is output
1096 * @ofs: offset into identify device page
1097 * @len: length of string to return. must be an even number.
1098 *
1099 * The strings in the IDENTIFY DEVICE page are broken up into
1100 * 16-bit chunks. Run through the string, and output each
1101 * 8-bit chunk linearly, regardless of platform.
1102 *
1103 * LOCKING:
1104 * caller.
1105 */
1106
6a62a04d
TH
1107void ata_id_string(const u16 *id, unsigned char *s,
1108 unsigned int ofs, unsigned int len)
1da177e4
LT
1109{
1110 unsigned int c;
1111
963e4975
AC
1112 BUG_ON(len & 1);
1113
1da177e4
LT
1114 while (len > 0) {
1115 c = id[ofs] >> 8;
1116 *s = c;
1117 s++;
1118
1119 c = id[ofs] & 0xff;
1120 *s = c;
1121 s++;
1122
1123 ofs++;
1124 len -= 2;
1125 }
1126}
1127
0e949ff3 1128/**
6a62a04d 1129 * ata_id_c_string - Convert IDENTIFY DEVICE page into C string
0e949ff3
TH
1130 * @id: IDENTIFY DEVICE results we will examine
1131 * @s: string into which data is output
1132 * @ofs: offset into identify device page
1133 * @len: length of string to return. must be an odd number.
1134 *
6a62a04d 1135 * This function is identical to ata_id_string except that it
0e949ff3
TH
1136 * trims trailing spaces and terminates the resulting string with
1137 * null. @len must be actual maximum length (even number) + 1.
1138 *
1139 * LOCKING:
1140 * caller.
1141 */
6a62a04d
TH
1142void ata_id_c_string(const u16 *id, unsigned char *s,
1143 unsigned int ofs, unsigned int len)
0e949ff3
TH
1144{
1145 unsigned char *p;
1146
6a62a04d 1147 ata_id_string(id, s, ofs, len - 1);
0e949ff3
TH
1148
1149 p = s + strnlen(s, len - 1);
1150 while (p > s && p[-1] == ' ')
1151 p--;
1152 *p = '\0';
1153}
0baab86b 1154
db6f8759
TH
1155static u64 ata_id_n_sectors(const u16 *id)
1156{
1157 if (ata_id_has_lba(id)) {
1158 if (ata_id_has_lba48(id))
968e594a 1159 return ata_id_u64(id, ATA_ID_LBA_CAPACITY_2);
db6f8759 1160 else
968e594a 1161 return ata_id_u32(id, ATA_ID_LBA_CAPACITY);
db6f8759
TH
1162 } else {
1163 if (ata_id_current_chs_valid(id))
968e594a
RH
1164 return id[ATA_ID_CUR_CYLS] * id[ATA_ID_CUR_HEADS] *
1165 id[ATA_ID_CUR_SECTORS];
db6f8759 1166 else
968e594a
RH
1167 return id[ATA_ID_CYLS] * id[ATA_ID_HEADS] *
1168 id[ATA_ID_SECTORS];
db6f8759
TH
1169 }
1170}
1171
a5987e0a 1172u64 ata_tf_to_lba48(const struct ata_taskfile *tf)
1e999736
AC
1173{
1174 u64 sectors = 0;
1175
1176 sectors |= ((u64)(tf->hob_lbah & 0xff)) << 40;
1177 sectors |= ((u64)(tf->hob_lbam & 0xff)) << 32;
ba14a9c2 1178 sectors |= ((u64)(tf->hob_lbal & 0xff)) << 24;
1e999736
AC
1179 sectors |= (tf->lbah & 0xff) << 16;
1180 sectors |= (tf->lbam & 0xff) << 8;
1181 sectors |= (tf->lbal & 0xff);
1182
a5987e0a 1183 return sectors;
1e999736
AC
1184}
1185
a5987e0a 1186u64 ata_tf_to_lba(const struct ata_taskfile *tf)
1e999736
AC
1187{
1188 u64 sectors = 0;
1189
1190 sectors |= (tf->device & 0x0f) << 24;
1191 sectors |= (tf->lbah & 0xff) << 16;
1192 sectors |= (tf->lbam & 0xff) << 8;
1193 sectors |= (tf->lbal & 0xff);
1194
a5987e0a 1195 return sectors;
1e999736
AC
1196}
1197
1198/**
c728a914
TH
1199 * ata_read_native_max_address - Read native max address
1200 * @dev: target device
1201 * @max_sectors: out parameter for the result native max address
1e999736 1202 *
c728a914
TH
1203 * Perform an LBA48 or LBA28 native size query upon the device in
1204 * question.
1e999736 1205 *
c728a914
TH
1206 * RETURNS:
1207 * 0 on success, -EACCES if command is aborted by the drive.
1208 * -EIO on other errors.
1e999736 1209 */
c728a914 1210static int ata_read_native_max_address(struct ata_device *dev, u64 *max_sectors)
1e999736 1211{
c728a914 1212 unsigned int err_mask;
1e999736 1213 struct ata_taskfile tf;
c728a914 1214 int lba48 = ata_id_has_lba48(dev->id);
1e999736
AC
1215
1216 ata_tf_init(dev, &tf);
1217
c728a914 1218 /* always clear all address registers */
1e999736 1219 tf.flags |= ATA_TFLAG_DEVICE | ATA_TFLAG_ISADDR;
1e999736 1220
c728a914
TH
1221 if (lba48) {
1222 tf.command = ATA_CMD_READ_NATIVE_MAX_EXT;
1223 tf.flags |= ATA_TFLAG_LBA48;
1224 } else
1225 tf.command = ATA_CMD_READ_NATIVE_MAX;
1e999736 1226
1e999736 1227 tf.protocol |= ATA_PROT_NODATA;
c728a914
TH
1228 tf.device |= ATA_LBA;
1229
2b789108 1230 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0, 0);
c728a914 1231 if (err_mask) {
a9a79dfe
JP
1232 ata_dev_warn(dev,
1233 "failed to read native max address (err_mask=0x%x)\n",
1234 err_mask);
c728a914
TH
1235 if (err_mask == AC_ERR_DEV && (tf.feature & ATA_ABORTED))
1236 return -EACCES;
1237 return -EIO;
1238 }
1e999736 1239
c728a914 1240 if (lba48)
a5987e0a 1241 *max_sectors = ata_tf_to_lba48(&tf) + 1;
c728a914 1242 else
a5987e0a 1243 *max_sectors = ata_tf_to_lba(&tf) + 1;
2dcb407e 1244 if (dev->horkage & ATA_HORKAGE_HPA_SIZE)
93328e11 1245 (*max_sectors)--;
c728a914 1246 return 0;
1e999736
AC
1247}
1248
1249/**
c728a914
TH
1250 * ata_set_max_sectors - Set max sectors
1251 * @dev: target device
6b38d1d1 1252 * @new_sectors: new max sectors value to set for the device
1e999736 1253 *
c728a914
TH
1254 * Set max sectors of @dev to @new_sectors.
1255 *
1256 * RETURNS:
1257 * 0 on success, -EACCES if command is aborted or denied (due to
1258 * previous non-volatile SET_MAX) by the drive. -EIO on other
1259 * errors.
1e999736 1260 */
05027adc 1261static int ata_set_max_sectors(struct ata_device *dev, u64 new_sectors)
1e999736 1262{
c728a914 1263 unsigned int err_mask;
1e999736 1264 struct ata_taskfile tf;
c728a914 1265 int lba48 = ata_id_has_lba48(dev->id);
1e999736
AC
1266
1267 new_sectors--;
1268
1269 ata_tf_init(dev, &tf);
1270
1e999736 1271 tf.flags |= ATA_TFLAG_DEVICE | ATA_TFLAG_ISADDR;
c728a914
TH
1272
1273 if (lba48) {
1274 tf.command = ATA_CMD_SET_MAX_EXT;
1275 tf.flags |= ATA_TFLAG_LBA48;
1276
1277 tf.hob_lbal = (new_sectors >> 24) & 0xff;
1278 tf.hob_lbam = (new_sectors >> 32) & 0xff;
1279 tf.hob_lbah = (new_sectors >> 40) & 0xff;
1e582ba4 1280 } else {
c728a914
TH
1281 tf.command = ATA_CMD_SET_MAX;
1282
1e582ba4
TH
1283 tf.device |= (new_sectors >> 24) & 0xf;
1284 }
1285
1e999736 1286 tf.protocol |= ATA_PROT_NODATA;
c728a914 1287 tf.device |= ATA_LBA;
1e999736
AC
1288
1289 tf.lbal = (new_sectors >> 0) & 0xff;
1290 tf.lbam = (new_sectors >> 8) & 0xff;
1291 tf.lbah = (new_sectors >> 16) & 0xff;
1e999736 1292
2b789108 1293 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0, 0);
c728a914 1294 if (err_mask) {
a9a79dfe
JP
1295 ata_dev_warn(dev,
1296 "failed to set max address (err_mask=0x%x)\n",
1297 err_mask);
c728a914
TH
1298 if (err_mask == AC_ERR_DEV &&
1299 (tf.feature & (ATA_ABORTED | ATA_IDNF)))
1300 return -EACCES;
1301 return -EIO;
1302 }
1303
c728a914 1304 return 0;
1e999736
AC
1305}
1306
1307/**
1308 * ata_hpa_resize - Resize a device with an HPA set
1309 * @dev: Device to resize
1310 *
1311 * Read the size of an LBA28 or LBA48 disk with HPA features and resize
1312 * it if required to the full size of the media. The caller must check
1313 * the drive has the HPA feature set enabled.
05027adc
TH
1314 *
1315 * RETURNS:
1316 * 0 on success, -errno on failure.
1e999736 1317 */
05027adc 1318static int ata_hpa_resize(struct ata_device *dev)
1e999736 1319{
05027adc
TH
1320 struct ata_eh_context *ehc = &dev->link->eh_context;
1321 int print_info = ehc->i.flags & ATA_EHI_PRINTINFO;
445d211b 1322 bool unlock_hpa = ata_ignore_hpa || dev->flags & ATA_DFLAG_UNLOCK_HPA;
05027adc
TH
1323 u64 sectors = ata_id_n_sectors(dev->id);
1324 u64 native_sectors;
c728a914 1325 int rc;
a617c09f 1326
05027adc
TH
1327 /* do we need to do it? */
1328 if (dev->class != ATA_DEV_ATA ||
1329 !ata_id_has_lba(dev->id) || !ata_id_hpa_enabled(dev->id) ||
1330 (dev->horkage & ATA_HORKAGE_BROKEN_HPA))
c728a914 1331 return 0;
1e999736 1332
05027adc
TH
1333 /* read native max address */
1334 rc = ata_read_native_max_address(dev, &native_sectors);
1335 if (rc) {
dda7aba1
TH
1336 /* If device aborted the command or HPA isn't going to
1337 * be unlocked, skip HPA resizing.
05027adc 1338 */
445d211b 1339 if (rc == -EACCES || !unlock_hpa) {
a9a79dfe
JP
1340 ata_dev_warn(dev,
1341 "HPA support seems broken, skipping HPA handling\n");
05027adc
TH
1342 dev->horkage |= ATA_HORKAGE_BROKEN_HPA;
1343
1344 /* we can continue if device aborted the command */
1345 if (rc == -EACCES)
1346 rc = 0;
1e999736 1347 }
37301a55 1348
05027adc
TH
1349 return rc;
1350 }
5920dadf 1351 dev->n_native_sectors = native_sectors;
05027adc
TH
1352
1353 /* nothing to do? */
445d211b 1354 if (native_sectors <= sectors || !unlock_hpa) {
05027adc
TH
1355 if (!print_info || native_sectors == sectors)
1356 return 0;
1357
1358 if (native_sectors > sectors)
a9a79dfe 1359 ata_dev_info(dev,
05027adc
TH
1360 "HPA detected: current %llu, native %llu\n",
1361 (unsigned long long)sectors,
1362 (unsigned long long)native_sectors);
1363 else if (native_sectors < sectors)
a9a79dfe
JP
1364 ata_dev_warn(dev,
1365 "native sectors (%llu) is smaller than sectors (%llu)\n",
05027adc
TH
1366 (unsigned long long)native_sectors,
1367 (unsigned long long)sectors);
1368 return 0;
1369 }
1370
1371 /* let's unlock HPA */
1372 rc = ata_set_max_sectors(dev, native_sectors);
1373 if (rc == -EACCES) {
1374 /* if device aborted the command, skip HPA resizing */
a9a79dfe
JP
1375 ata_dev_warn(dev,
1376 "device aborted resize (%llu -> %llu), skipping HPA handling\n",
1377 (unsigned long long)sectors,
1378 (unsigned long long)native_sectors);
05027adc
TH
1379 dev->horkage |= ATA_HORKAGE_BROKEN_HPA;
1380 return 0;
1381 } else if (rc)
1382 return rc;
1383
1384 /* re-read IDENTIFY data */
1385 rc = ata_dev_reread_id(dev, 0);
1386 if (rc) {
a9a79dfe
JP
1387 ata_dev_err(dev,
1388 "failed to re-read IDENTIFY data after HPA resizing\n");
05027adc
TH
1389 return rc;
1390 }
1391
1392 if (print_info) {
1393 u64 new_sectors = ata_id_n_sectors(dev->id);
a9a79dfe 1394 ata_dev_info(dev,
05027adc
TH
1395 "HPA unlocked: %llu -> %llu, native %llu\n",
1396 (unsigned long long)sectors,
1397 (unsigned long long)new_sectors,
1398 (unsigned long long)native_sectors);
1399 }
1400
1401 return 0;
1e999736
AC
1402}
1403
1da177e4
LT
1404/**
1405 * ata_dump_id - IDENTIFY DEVICE info debugging output
0bd3300a 1406 * @id: IDENTIFY DEVICE page to dump
1da177e4 1407 *
0bd3300a
TH
1408 * Dump selected 16-bit words from the given IDENTIFY DEVICE
1409 * page.
1da177e4
LT
1410 *
1411 * LOCKING:
1412 * caller.
1413 */
1414
0bd3300a 1415static inline void ata_dump_id(const u16 *id)
1da177e4
LT
1416{
1417 DPRINTK("49==0x%04x "
1418 "53==0x%04x "
1419 "63==0x%04x "
1420 "64==0x%04x "
1421 "75==0x%04x \n",
0bd3300a
TH
1422 id[49],
1423 id[53],
1424 id[63],
1425 id[64],
1426 id[75]);
1da177e4
LT
1427 DPRINTK("80==0x%04x "
1428 "81==0x%04x "
1429 "82==0x%04x "
1430 "83==0x%04x "
1431 "84==0x%04x \n",
0bd3300a
TH
1432 id[80],
1433 id[81],
1434 id[82],
1435 id[83],
1436 id[84]);
1da177e4
LT
1437 DPRINTK("88==0x%04x "
1438 "93==0x%04x\n",
0bd3300a
TH
1439 id[88],
1440 id[93]);
1da177e4
LT
1441}
1442
cb95d562
TH
1443/**
1444 * ata_id_xfermask - Compute xfermask from the given IDENTIFY data
1445 * @id: IDENTIFY data to compute xfer mask from
1446 *
1447 * Compute the xfermask for this device. This is not as trivial
1448 * as it seems if we must consider early devices correctly.
1449 *
1450 * FIXME: pre IDE drive timing (do we care ?).
1451 *
1452 * LOCKING:
1453 * None.
1454 *
1455 * RETURNS:
1456 * Computed xfermask
1457 */
7dc951ae 1458unsigned long ata_id_xfermask(const u16 *id)
cb95d562 1459{
7dc951ae 1460 unsigned long pio_mask, mwdma_mask, udma_mask;
cb95d562
TH
1461
1462 /* Usual case. Word 53 indicates word 64 is valid */
1463 if (id[ATA_ID_FIELD_VALID] & (1 << 1)) {
1464 pio_mask = id[ATA_ID_PIO_MODES] & 0x03;
1465 pio_mask <<= 3;
1466 pio_mask |= 0x7;
1467 } else {
1468 /* If word 64 isn't valid then Word 51 high byte holds
1469 * the PIO timing number for the maximum. Turn it into
1470 * a mask.
1471 */
7a0f1c8a 1472 u8 mode = (id[ATA_ID_OLD_PIO_MODES] >> 8) & 0xFF;
46767aeb 1473 if (mode < 5) /* Valid PIO range */
2dcb407e 1474 pio_mask = (2 << mode) - 1;
46767aeb
AC
1475 else
1476 pio_mask = 1;
cb95d562
TH
1477
1478 /* But wait.. there's more. Design your standards by
1479 * committee and you too can get a free iordy field to
1480 * process. However its the speeds not the modes that
1481 * are supported... Note drivers using the timing API
1482 * will get this right anyway
1483 */
1484 }
1485
1486 mwdma_mask = id[ATA_ID_MWDMA_MODES] & 0x07;
fb21f0d0 1487
b352e57d
AC
1488 if (ata_id_is_cfa(id)) {
1489 /*
1490 * Process compact flash extended modes
1491 */
62afe5d7
SS
1492 int pio = (id[ATA_ID_CFA_MODES] >> 0) & 0x7;
1493 int dma = (id[ATA_ID_CFA_MODES] >> 3) & 0x7;
b352e57d
AC
1494
1495 if (pio)
1496 pio_mask |= (1 << 5);
1497 if (pio > 1)
1498 pio_mask |= (1 << 6);
1499 if (dma)
1500 mwdma_mask |= (1 << 3);
1501 if (dma > 1)
1502 mwdma_mask |= (1 << 4);
1503 }
1504
fb21f0d0
TH
1505 udma_mask = 0;
1506 if (id[ATA_ID_FIELD_VALID] & (1 << 2))
1507 udma_mask = id[ATA_ID_UDMA_MODES] & 0xff;
cb95d562
TH
1508
1509 return ata_pack_xfermask(pio_mask, mwdma_mask, udma_mask);
1510}
1511
7102d230 1512static void ata_qc_complete_internal(struct ata_queued_cmd *qc)
a2a7a662 1513{
77853bf2 1514 struct completion *waiting = qc->private_data;
a2a7a662 1515
a2a7a662 1516 complete(waiting);
a2a7a662
TH
1517}
1518
1519/**
2432697b 1520 * ata_exec_internal_sg - execute libata internal command
a2a7a662
TH
1521 * @dev: Device to which the command is sent
1522 * @tf: Taskfile registers for the command and the result
d69cf37d 1523 * @cdb: CDB for packet command
a2a7a662 1524 * @dma_dir: Data tranfer direction of the command
5c1ad8b3 1525 * @sgl: sg list for the data buffer of the command
2432697b 1526 * @n_elem: Number of sg entries
2b789108 1527 * @timeout: Timeout in msecs (0 for default)
a2a7a662
TH
1528 *
1529 * Executes libata internal command with timeout. @tf contains
1530 * command on entry and result on return. Timeout and error
1531 * conditions are reported via return value. No recovery action
1532 * is taken after a command times out. It's caller's duty to
1533 * clean up after timeout.
1534 *
1535 * LOCKING:
1536 * None. Should be called with kernel context, might sleep.
551e8889
TH
1537 *
1538 * RETURNS:
1539 * Zero on success, AC_ERR_* mask on failure
a2a7a662 1540 */
2432697b
TH
1541unsigned ata_exec_internal_sg(struct ata_device *dev,
1542 struct ata_taskfile *tf, const u8 *cdb,
87260216 1543 int dma_dir, struct scatterlist *sgl,
2b789108 1544 unsigned int n_elem, unsigned long timeout)
a2a7a662 1545{
9af5c9c9
TH
1546 struct ata_link *link = dev->link;
1547 struct ata_port *ap = link->ap;
a2a7a662 1548 u8 command = tf->command;
87fbc5a0 1549 int auto_timeout = 0;
a2a7a662 1550 struct ata_queued_cmd *qc;
2ab7db1f 1551 unsigned int tag, preempted_tag;
dedaf2b0 1552 u32 preempted_sactive, preempted_qc_active;
da917d69 1553 int preempted_nr_active_links;
60be6b9a 1554 DECLARE_COMPLETION_ONSTACK(wait);
a2a7a662 1555 unsigned long flags;
77853bf2 1556 unsigned int err_mask;
d95a717f 1557 int rc;
a2a7a662 1558
ba6a1308 1559 spin_lock_irqsave(ap->lock, flags);
a2a7a662 1560
e3180499 1561 /* no internal command while frozen */
b51e9e5d 1562 if (ap->pflags & ATA_PFLAG_FROZEN) {
ba6a1308 1563 spin_unlock_irqrestore(ap->lock, flags);
e3180499
TH
1564 return AC_ERR_SYSTEM;
1565 }
1566
2ab7db1f 1567 /* initialize internal qc */
a2a7a662 1568
2ab7db1f
TH
1569 /* XXX: Tag 0 is used for drivers with legacy EH as some
1570 * drivers choke if any other tag is given. This breaks
1571 * ata_tag_internal() test for those drivers. Don't use new
1572 * EH stuff without converting to it.
1573 */
1574 if (ap->ops->error_handler)
1575 tag = ATA_TAG_INTERNAL;
1576 else
1577 tag = 0;
1578
8a8bc223
TH
1579 if (test_and_set_bit(tag, &ap->qc_allocated))
1580 BUG();
f69499f4 1581 qc = __ata_qc_from_tag(ap, tag);
2ab7db1f
TH
1582
1583 qc->tag = tag;
1584 qc->scsicmd = NULL;
1585 qc->ap = ap;
1586 qc->dev = dev;
1587 ata_qc_reinit(qc);
1588
9af5c9c9
TH
1589 preempted_tag = link->active_tag;
1590 preempted_sactive = link->sactive;
dedaf2b0 1591 preempted_qc_active = ap->qc_active;
da917d69 1592 preempted_nr_active_links = ap->nr_active_links;
9af5c9c9
TH
1593 link->active_tag = ATA_TAG_POISON;
1594 link->sactive = 0;
dedaf2b0 1595 ap->qc_active = 0;
da917d69 1596 ap->nr_active_links = 0;
2ab7db1f
TH
1597
1598 /* prepare & issue qc */
a2a7a662 1599 qc->tf = *tf;
d69cf37d
TH
1600 if (cdb)
1601 memcpy(qc->cdb, cdb, ATAPI_CDB_LEN);
e61e0672 1602 qc->flags |= ATA_QCFLAG_RESULT_TF;
a2a7a662
TH
1603 qc->dma_dir = dma_dir;
1604 if (dma_dir != DMA_NONE) {
2432697b 1605 unsigned int i, buflen = 0;
87260216 1606 struct scatterlist *sg;
2432697b 1607
87260216
JA
1608 for_each_sg(sgl, sg, n_elem, i)
1609 buflen += sg->length;
2432697b 1610
87260216 1611 ata_sg_init(qc, sgl, n_elem);
49c80429 1612 qc->nbytes = buflen;
a2a7a662
TH
1613 }
1614
77853bf2 1615 qc->private_data = &wait;
a2a7a662
TH
1616 qc->complete_fn = ata_qc_complete_internal;
1617
8e0e694a 1618 ata_qc_issue(qc);
a2a7a662 1619
ba6a1308 1620 spin_unlock_irqrestore(ap->lock, flags);
a2a7a662 1621
87fbc5a0
TH
1622 if (!timeout) {
1623 if (ata_probe_timeout)
1624 timeout = ata_probe_timeout * 1000;
1625 else {
1626 timeout = ata_internal_cmd_timeout(dev, command);
1627 auto_timeout = 1;
1628 }
1629 }
2b789108 1630
c0c362b6
TH
1631 if (ap->ops->error_handler)
1632 ata_eh_release(ap);
1633
2b789108 1634 rc = wait_for_completion_timeout(&wait, msecs_to_jiffies(timeout));
d95a717f 1635
c0c362b6
TH
1636 if (ap->ops->error_handler)
1637 ata_eh_acquire(ap);
1638
c429137a 1639 ata_sff_flush_pio_task(ap);
41ade50c 1640
d95a717f 1641 if (!rc) {
ba6a1308 1642 spin_lock_irqsave(ap->lock, flags);
a2a7a662
TH
1643
1644 /* We're racing with irq here. If we lose, the
1645 * following test prevents us from completing the qc
d95a717f
TH
1646 * twice. If we win, the port is frozen and will be
1647 * cleaned up by ->post_internal_cmd().
a2a7a662 1648 */
77853bf2 1649 if (qc->flags & ATA_QCFLAG_ACTIVE) {
d95a717f
TH
1650 qc->err_mask |= AC_ERR_TIMEOUT;
1651
1652 if (ap->ops->error_handler)
1653 ata_port_freeze(ap);
1654 else
1655 ata_qc_complete(qc);
f15a1daf 1656
0dd4b21f 1657 if (ata_msg_warn(ap))
a9a79dfe
JP
1658 ata_dev_warn(dev, "qc timeout (cmd 0x%x)\n",
1659 command);
a2a7a662
TH
1660 }
1661
ba6a1308 1662 spin_unlock_irqrestore(ap->lock, flags);
a2a7a662
TH
1663 }
1664
d95a717f
TH
1665 /* do post_internal_cmd */
1666 if (ap->ops->post_internal_cmd)
1667 ap->ops->post_internal_cmd(qc);
1668
a51d644a
TH
1669 /* perform minimal error analysis */
1670 if (qc->flags & ATA_QCFLAG_FAILED) {
1671 if (qc->result_tf.command & (ATA_ERR | ATA_DF))
1672 qc->err_mask |= AC_ERR_DEV;
1673
1674 if (!qc->err_mask)
1675 qc->err_mask |= AC_ERR_OTHER;
1676
1677 if (qc->err_mask & ~AC_ERR_OTHER)
1678 qc->err_mask &= ~AC_ERR_OTHER;
d95a717f
TH
1679 }
1680
15869303 1681 /* finish up */
ba6a1308 1682 spin_lock_irqsave(ap->lock, flags);
15869303 1683
e61e0672 1684 *tf = qc->result_tf;
77853bf2
TH
1685 err_mask = qc->err_mask;
1686
1687 ata_qc_free(qc);
9af5c9c9
TH
1688 link->active_tag = preempted_tag;
1689 link->sactive = preempted_sactive;
dedaf2b0 1690 ap->qc_active = preempted_qc_active;
da917d69 1691 ap->nr_active_links = preempted_nr_active_links;
77853bf2 1692
ba6a1308 1693 spin_unlock_irqrestore(ap->lock, flags);
15869303 1694
87fbc5a0
TH
1695 if ((err_mask & AC_ERR_TIMEOUT) && auto_timeout)
1696 ata_internal_cmd_timed_out(dev, command);
1697
77853bf2 1698 return err_mask;
a2a7a662
TH
1699}
1700
2432697b 1701/**
33480a0e 1702 * ata_exec_internal - execute libata internal command
2432697b
TH
1703 * @dev: Device to which the command is sent
1704 * @tf: Taskfile registers for the command and the result
1705 * @cdb: CDB for packet command
1706 * @dma_dir: Data tranfer direction of the command
1707 * @buf: Data buffer of the command
1708 * @buflen: Length of data buffer
2b789108 1709 * @timeout: Timeout in msecs (0 for default)
2432697b
TH
1710 *
1711 * Wrapper around ata_exec_internal_sg() which takes simple
1712 * buffer instead of sg list.
1713 *
1714 * LOCKING:
1715 * None. Should be called with kernel context, might sleep.
1716 *
1717 * RETURNS:
1718 * Zero on success, AC_ERR_* mask on failure
1719 */
1720unsigned ata_exec_internal(struct ata_device *dev,
1721 struct ata_taskfile *tf, const u8 *cdb,
2b789108
TH
1722 int dma_dir, void *buf, unsigned int buflen,
1723 unsigned long timeout)
2432697b 1724{
33480a0e
TH
1725 struct scatterlist *psg = NULL, sg;
1726 unsigned int n_elem = 0;
2432697b 1727
33480a0e
TH
1728 if (dma_dir != DMA_NONE) {
1729 WARN_ON(!buf);
1730 sg_init_one(&sg, buf, buflen);
1731 psg = &sg;
1732 n_elem++;
1733 }
2432697b 1734
2b789108
TH
1735 return ata_exec_internal_sg(dev, tf, cdb, dma_dir, psg, n_elem,
1736 timeout);
2432697b
TH
1737}
1738
977e6b9f
TH
1739/**
1740 * ata_do_simple_cmd - execute simple internal command
1741 * @dev: Device to which the command is sent
1742 * @cmd: Opcode to execute
1743 *
1744 * Execute a 'simple' command, that only consists of the opcode
1745 * 'cmd' itself, without filling any other registers
1746 *
1747 * LOCKING:
1748 * Kernel thread context (may sleep).
1749 *
1750 * RETURNS:
1751 * Zero on success, AC_ERR_* mask on failure
e58eb583 1752 */
77b08fb5 1753unsigned int ata_do_simple_cmd(struct ata_device *dev, u8 cmd)
e58eb583
TH
1754{
1755 struct ata_taskfile tf;
e58eb583
TH
1756
1757 ata_tf_init(dev, &tf);
1758
1759 tf.command = cmd;
1760 tf.flags |= ATA_TFLAG_DEVICE;
1761 tf.protocol = ATA_PROT_NODATA;
1762
2b789108 1763 return ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0, 0);
e58eb583
TH
1764}
1765
1bc4ccff
AC
1766/**
1767 * ata_pio_need_iordy - check if iordy needed
1768 * @adev: ATA device
1769 *
1770 * Check if the current speed of the device requires IORDY. Used
1771 * by various controllers for chip configuration.
1772 */
1bc4ccff
AC
1773unsigned int ata_pio_need_iordy(const struct ata_device *adev)
1774{
0d9e6659
TH
1775 /* Don't set IORDY if we're preparing for reset. IORDY may
1776 * lead to controller lock up on certain controllers if the
1777 * port is not occupied. See bko#11703 for details.
1778 */
1779 if (adev->link->ap->pflags & ATA_PFLAG_RESETTING)
1780 return 0;
1781 /* Controller doesn't support IORDY. Probably a pointless
1782 * check as the caller should know this.
1783 */
9af5c9c9 1784 if (adev->link->ap->flags & ATA_FLAG_NO_IORDY)
1bc4ccff 1785 return 0;
5c18c4d2
DD
1786 /* CF spec. r4.1 Table 22 says no iordy on PIO5 and PIO6. */
1787 if (ata_id_is_cfa(adev->id)
1788 && (adev->pio_mode == XFER_PIO_5 || adev->pio_mode == XFER_PIO_6))
1789 return 0;
432729f0
AC
1790 /* PIO3 and higher it is mandatory */
1791 if (adev->pio_mode > XFER_PIO_2)
1792 return 1;
1793 /* We turn it on when possible */
1794 if (ata_id_has_iordy(adev->id))
1bc4ccff 1795 return 1;
432729f0
AC
1796 return 0;
1797}
2e9edbf8 1798
432729f0
AC
1799/**
1800 * ata_pio_mask_no_iordy - Return the non IORDY mask
1801 * @adev: ATA device
1802 *
1803 * Compute the highest mode possible if we are not using iordy. Return
1804 * -1 if no iordy mode is available.
1805 */
432729f0
AC
1806static u32 ata_pio_mask_no_iordy(const struct ata_device *adev)
1807{
1bc4ccff 1808 /* If we have no drive specific rule, then PIO 2 is non IORDY */
1bc4ccff 1809 if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE */
432729f0 1810 u16 pio = adev->id[ATA_ID_EIDE_PIO];
1bc4ccff
AC
1811 /* Is the speed faster than the drive allows non IORDY ? */
1812 if (pio) {
1813 /* This is cycle times not frequency - watch the logic! */
1814 if (pio > 240) /* PIO2 is 240nS per cycle */
432729f0
AC
1815 return 3 << ATA_SHIFT_PIO;
1816 return 7 << ATA_SHIFT_PIO;
1bc4ccff
AC
1817 }
1818 }
432729f0 1819 return 3 << ATA_SHIFT_PIO;
1bc4ccff
AC
1820}
1821
963e4975
AC
1822/**
1823 * ata_do_dev_read_id - default ID read method
1824 * @dev: device
1825 * @tf: proposed taskfile
1826 * @id: data buffer
1827 *
1828 * Issue the identify taskfile and hand back the buffer containing
1829 * identify data. For some RAID controllers and for pre ATA devices
1830 * this function is wrapped or replaced by the driver
1831 */
1832unsigned int ata_do_dev_read_id(struct ata_device *dev,
1833 struct ata_taskfile *tf, u16 *id)
1834{
1835 return ata_exec_internal(dev, tf, NULL, DMA_FROM_DEVICE,
1836 id, sizeof(id[0]) * ATA_ID_WORDS, 0);
1837}
1838
1da177e4 1839/**
49016aca 1840 * ata_dev_read_id - Read ID data from the specified device
49016aca
TH
1841 * @dev: target device
1842 * @p_class: pointer to class of the target device (may be changed)
bff04647 1843 * @flags: ATA_READID_* flags
fe635c7e 1844 * @id: buffer to read IDENTIFY data into
1da177e4 1845 *
49016aca
TH
1846 * Read ID data from the specified device. ATA_CMD_ID_ATA is
1847 * performed on ATA devices and ATA_CMD_ID_ATAPI on ATAPI
aec5c3c1
TH
1848 * devices. This function also issues ATA_CMD_INIT_DEV_PARAMS
1849 * for pre-ATA4 drives.
1da177e4 1850 *
50a99018 1851 * FIXME: ATA_CMD_ID_ATA is optional for early drives and right
2dcb407e 1852 * now we abort if we hit that case.
50a99018 1853 *
1da177e4 1854 * LOCKING:
49016aca
TH
1855 * Kernel thread context (may sleep)
1856 *
1857 * RETURNS:
1858 * 0 on success, -errno otherwise.
1da177e4 1859 */
a9beec95 1860int ata_dev_read_id(struct ata_device *dev, unsigned int *p_class,
bff04647 1861 unsigned int flags, u16 *id)
1da177e4 1862{
9af5c9c9 1863 struct ata_port *ap = dev->link->ap;
49016aca 1864 unsigned int class = *p_class;
a0123703 1865 struct ata_taskfile tf;
49016aca
TH
1866 unsigned int err_mask = 0;
1867 const char *reason;
79b42bab 1868 bool is_semb = class == ATA_DEV_SEMB;
54936f8b 1869 int may_fallback = 1, tried_spinup = 0;
49016aca 1870 int rc;
1da177e4 1871
0dd4b21f 1872 if (ata_msg_ctl(ap))
a9a79dfe 1873 ata_dev_dbg(dev, "%s: ENTER\n", __func__);
1da177e4 1874
963e4975 1875retry:
3373efd8 1876 ata_tf_init(dev, &tf);
a0123703 1877
49016aca 1878 switch (class) {
79b42bab
TH
1879 case ATA_DEV_SEMB:
1880 class = ATA_DEV_ATA; /* some hard drives report SEMB sig */
49016aca 1881 case ATA_DEV_ATA:
a0123703 1882 tf.command = ATA_CMD_ID_ATA;
49016aca
TH
1883 break;
1884 case ATA_DEV_ATAPI:
a0123703 1885 tf.command = ATA_CMD_ID_ATAPI;
49016aca
TH
1886 break;
1887 default:
1888 rc = -ENODEV;
1889 reason = "unsupported class";
1890 goto err_out;
1da177e4
LT
1891 }
1892
a0123703 1893 tf.protocol = ATA_PROT_PIO;
81afe893
TH
1894
1895 /* Some devices choke if TF registers contain garbage. Make
1896 * sure those are properly initialized.
1897 */
1898 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
1899
1900 /* Device presence detection is unreliable on some
1901 * controllers. Always poll IDENTIFY if available.
1902 */
1903 tf.flags |= ATA_TFLAG_POLLING;
1da177e4 1904
963e4975
AC
1905 if (ap->ops->read_id)
1906 err_mask = ap->ops->read_id(dev, &tf, id);
1907 else
1908 err_mask = ata_do_dev_read_id(dev, &tf, id);
1909
a0123703 1910 if (err_mask) {
800b3996 1911 if (err_mask & AC_ERR_NODEV_HINT) {
a9a79dfe 1912 ata_dev_dbg(dev, "NODEV after polling detection\n");
55a8e2c8
TH
1913 return -ENOENT;
1914 }
1915
79b42bab 1916 if (is_semb) {
a9a79dfe
JP
1917 ata_dev_info(dev,
1918 "IDENTIFY failed on device w/ SEMB sig, disabled\n");
79b42bab
TH
1919 /* SEMB is not supported yet */
1920 *p_class = ATA_DEV_SEMB_UNSUP;
1921 return 0;
1922 }
1923
1ffc151f
TH
1924 if ((err_mask == AC_ERR_DEV) && (tf.feature & ATA_ABORTED)) {
1925 /* Device or controller might have reported
1926 * the wrong device class. Give a shot at the
1927 * other IDENTIFY if the current one is
1928 * aborted by the device.
1929 */
1930 if (may_fallback) {
1931 may_fallback = 0;
1932
1933 if (class == ATA_DEV_ATA)
1934 class = ATA_DEV_ATAPI;
1935 else
1936 class = ATA_DEV_ATA;
1937 goto retry;
1938 }
1939
1940 /* Control reaches here iff the device aborted
1941 * both flavors of IDENTIFYs which happens
1942 * sometimes with phantom devices.
1943 */
a9a79dfe
JP
1944 ata_dev_dbg(dev,
1945 "both IDENTIFYs aborted, assuming NODEV\n");
1ffc151f 1946 return -ENOENT;
54936f8b
TH
1947 }
1948
49016aca
TH
1949 rc = -EIO;
1950 reason = "I/O error";
1da177e4
LT
1951 goto err_out;
1952 }
1953
43c9c591 1954 if (dev->horkage & ATA_HORKAGE_DUMP_ID) {
a9a79dfe
JP
1955 ata_dev_dbg(dev, "dumping IDENTIFY data, "
1956 "class=%d may_fallback=%d tried_spinup=%d\n",
1957 class, may_fallback, tried_spinup);
43c9c591
TH
1958 print_hex_dump(KERN_DEBUG, "", DUMP_PREFIX_OFFSET,
1959 16, 2, id, ATA_ID_WORDS * sizeof(*id), true);
1960 }
1961
54936f8b
TH
1962 /* Falling back doesn't make sense if ID data was read
1963 * successfully at least once.
1964 */
1965 may_fallback = 0;
1966
49016aca 1967 swap_buf_le16(id, ATA_ID_WORDS);
1da177e4 1968
49016aca 1969 /* sanity check */
a4f5749b 1970 rc = -EINVAL;
6070068b 1971 reason = "device reports invalid type";
a4f5749b
TH
1972
1973 if (class == ATA_DEV_ATA) {
1974 if (!ata_id_is_ata(id) && !ata_id_is_cfa(id))
1975 goto err_out;
db63a4c8
AW
1976 if (ap->host->flags & ATA_HOST_IGNORE_ATA &&
1977 ata_id_is_ata(id)) {
1978 ata_dev_dbg(dev,
1979 "host indicates ignore ATA devices, ignored\n");
1980 return -ENOENT;
1981 }
a4f5749b
TH
1982 } else {
1983 if (ata_id_is_ata(id))
1984 goto err_out;
49016aca
TH
1985 }
1986
169439c2
ML
1987 if (!tried_spinup && (id[2] == 0x37c8 || id[2] == 0x738c)) {
1988 tried_spinup = 1;
1989 /*
1990 * Drive powered-up in standby mode, and requires a specific
1991 * SET_FEATURES spin-up subcommand before it will accept
1992 * anything other than the original IDENTIFY command.
1993 */
218f3d30 1994 err_mask = ata_dev_set_feature(dev, SETFEATURES_SPINUP, 0);
fb0582f9 1995 if (err_mask && id[2] != 0x738c) {
169439c2
ML
1996 rc = -EIO;
1997 reason = "SPINUP failed";
1998 goto err_out;
1999 }
2000 /*
2001 * If the drive initially returned incomplete IDENTIFY info,
2002 * we now must reissue the IDENTIFY command.
2003 */
2004 if (id[2] == 0x37c8)
2005 goto retry;
2006 }
2007
bff04647 2008 if ((flags & ATA_READID_POSTRESET) && class == ATA_DEV_ATA) {
49016aca
TH
2009 /*
2010 * The exact sequence expected by certain pre-ATA4 drives is:
2011 * SRST RESET
50a99018
AC
2012 * IDENTIFY (optional in early ATA)
2013 * INITIALIZE DEVICE PARAMETERS (later IDE and ATA)
49016aca
TH
2014 * anything else..
2015 * Some drives were very specific about that exact sequence.
50a99018
AC
2016 *
2017 * Note that ATA4 says lba is mandatory so the second check
c9404c9c 2018 * should never trigger.
49016aca
TH
2019 */
2020 if (ata_id_major_version(id) < 4 || !ata_id_has_lba(id)) {
3373efd8 2021 err_mask = ata_dev_init_params(dev, id[3], id[6]);
49016aca
TH
2022 if (err_mask) {
2023 rc = -EIO;
2024 reason = "INIT_DEV_PARAMS failed";
2025 goto err_out;
2026 }
2027
2028 /* current CHS translation info (id[53-58]) might be
2029 * changed. reread the identify device info.
2030 */
bff04647 2031 flags &= ~ATA_READID_POSTRESET;
49016aca
TH
2032 goto retry;
2033 }
2034 }
2035
2036 *p_class = class;
fe635c7e 2037
49016aca
TH
2038 return 0;
2039
2040 err_out:
88574551 2041 if (ata_msg_warn(ap))
a9a79dfe
JP
2042 ata_dev_warn(dev, "failed to IDENTIFY (%s, err_mask=0x%x)\n",
2043 reason, err_mask);
49016aca
TH
2044 return rc;
2045}
2046
9062712f
TH
2047static int ata_do_link_spd_horkage(struct ata_device *dev)
2048{
2049 struct ata_link *plink = ata_dev_phys_link(dev);
2050 u32 target, target_limit;
2051
2052 if (!sata_scr_valid(plink))
2053 return 0;
2054
2055 if (dev->horkage & ATA_HORKAGE_1_5_GBPS)
2056 target = 1;
2057 else
2058 return 0;
2059
2060 target_limit = (1 << target) - 1;
2061
2062 /* if already on stricter limit, no need to push further */
2063 if (plink->sata_spd_limit <= target_limit)
2064 return 0;
2065
2066 plink->sata_spd_limit = target_limit;
2067
2068 /* Request another EH round by returning -EAGAIN if link is
2069 * going faster than the target speed. Forward progress is
2070 * guaranteed by setting sata_spd_limit to target_limit above.
2071 */
2072 if (plink->sata_spd > target) {
a9a79dfe
JP
2073 ata_dev_info(dev, "applying link speed limit horkage to %s\n",
2074 sata_spd_string(target));
9062712f
TH
2075 return -EAGAIN;
2076 }
2077 return 0;
2078}
2079
3373efd8 2080static inline u8 ata_dev_knobble(struct ata_device *dev)
4b2f3ede 2081{
9af5c9c9 2082 struct ata_port *ap = dev->link->ap;
9ce8e307
JA
2083
2084 if (ata_dev_blacklisted(dev) & ATA_HORKAGE_BRIDGE_OK)
2085 return 0;
2086
9af5c9c9 2087 return ((ap->cbl == ATA_CBL_SATA) && (!ata_id_is_sata(dev->id)));
4b2f3ede
TH
2088}
2089
388539f3 2090static int ata_dev_config_ncq(struct ata_device *dev,
a6e6ce8e
TH
2091 char *desc, size_t desc_sz)
2092{
9af5c9c9 2093 struct ata_port *ap = dev->link->ap;
a6e6ce8e 2094 int hdepth = 0, ddepth = ata_id_queue_depth(dev->id);
388539f3
SL
2095 unsigned int err_mask;
2096 char *aa_desc = "";
a6e6ce8e
TH
2097
2098 if (!ata_id_has_ncq(dev->id)) {
2099 desc[0] = '\0';
388539f3 2100 return 0;
a6e6ce8e 2101 }
75683fe7 2102 if (dev->horkage & ATA_HORKAGE_NONCQ) {
6919a0a6 2103 snprintf(desc, desc_sz, "NCQ (not used)");
388539f3 2104 return 0;
6919a0a6 2105 }
a6e6ce8e 2106 if (ap->flags & ATA_FLAG_NCQ) {
cca3974e 2107 hdepth = min(ap->scsi_host->can_queue, ATA_MAX_QUEUE - 1);
a6e6ce8e
TH
2108 dev->flags |= ATA_DFLAG_NCQ;
2109 }
2110
388539f3
SL
2111 if (!(dev->horkage & ATA_HORKAGE_BROKEN_FPDMA_AA) &&
2112 (ap->flags & ATA_FLAG_FPDMA_AA) &&
2113 ata_id_has_fpdma_aa(dev->id)) {
2114 err_mask = ata_dev_set_feature(dev, SETFEATURES_SATA_ENABLE,
2115 SATA_FPDMA_AA);
2116 if (err_mask) {
a9a79dfe
JP
2117 ata_dev_err(dev,
2118 "failed to enable AA (error_mask=0x%x)\n",
2119 err_mask);
388539f3
SL
2120 if (err_mask != AC_ERR_DEV) {
2121 dev->horkage |= ATA_HORKAGE_BROKEN_FPDMA_AA;
2122 return -EIO;
2123 }
2124 } else
2125 aa_desc = ", AA";
2126 }
2127
a6e6ce8e 2128 if (hdepth >= ddepth)
388539f3 2129 snprintf(desc, desc_sz, "NCQ (depth %d)%s", ddepth, aa_desc);
a6e6ce8e 2130 else
388539f3
SL
2131 snprintf(desc, desc_sz, "NCQ (depth %d/%d)%s", hdepth,
2132 ddepth, aa_desc);
2133 return 0;
a6e6ce8e
TH
2134}
2135
49016aca 2136/**
ffeae418 2137 * ata_dev_configure - Configure the specified ATA/ATAPI device
ffeae418
TH
2138 * @dev: Target device to configure
2139 *
2140 * Configure @dev according to @dev->id. Generic and low-level
2141 * driver specific fixups are also applied.
49016aca
TH
2142 *
2143 * LOCKING:
ffeae418
TH
2144 * Kernel thread context (may sleep)
2145 *
2146 * RETURNS:
2147 * 0 on success, -errno otherwise
49016aca 2148 */
efdaedc4 2149int ata_dev_configure(struct ata_device *dev)
49016aca 2150{
9af5c9c9
TH
2151 struct ata_port *ap = dev->link->ap;
2152 struct ata_eh_context *ehc = &dev->link->eh_context;
6746544c 2153 int print_info = ehc->i.flags & ATA_EHI_PRINTINFO;
1148c3a7 2154 const u16 *id = dev->id;
7dc951ae 2155 unsigned long xfer_mask;
b352e57d 2156 char revbuf[7]; /* XYZ-99\0 */
3f64f565
EM
2157 char fwrevbuf[ATA_ID_FW_REV_LEN+1];
2158 char modelbuf[ATA_ID_PROD_LEN+1];
e6d902a3 2159 int rc;
49016aca 2160
0dd4b21f 2161 if (!ata_dev_enabled(dev) && ata_msg_info(ap)) {
a9a79dfe 2162 ata_dev_info(dev, "%s: ENTER/EXIT -- nodev\n", __func__);
ffeae418 2163 return 0;
49016aca
TH
2164 }
2165
0dd4b21f 2166 if (ata_msg_probe(ap))
a9a79dfe 2167 ata_dev_dbg(dev, "%s: ENTER\n", __func__);
1da177e4 2168
75683fe7
TH
2169 /* set horkage */
2170 dev->horkage |= ata_dev_blacklisted(dev);
33267325 2171 ata_force_horkage(dev);
75683fe7 2172
50af2fa1 2173 if (dev->horkage & ATA_HORKAGE_DISABLE) {
a9a79dfe 2174 ata_dev_info(dev, "unsupported device, disabling\n");
50af2fa1
TH
2175 ata_dev_disable(dev);
2176 return 0;
2177 }
2178
2486fa56
TH
2179 if ((!atapi_enabled || (ap->flags & ATA_FLAG_NO_ATAPI)) &&
2180 dev->class == ATA_DEV_ATAPI) {
a9a79dfe
JP
2181 ata_dev_warn(dev, "WARNING: ATAPI is %s, device ignored\n",
2182 atapi_enabled ? "not supported with this driver"
2183 : "disabled");
2486fa56
TH
2184 ata_dev_disable(dev);
2185 return 0;
2186 }
2187
9062712f
TH
2188 rc = ata_do_link_spd_horkage(dev);
2189 if (rc)
2190 return rc;
2191
6746544c
TH
2192 /* let ACPI work its magic */
2193 rc = ata_acpi_on_devcfg(dev);
2194 if (rc)
2195 return rc;
08573a86 2196
05027adc
TH
2197 /* massage HPA, do it early as it might change IDENTIFY data */
2198 rc = ata_hpa_resize(dev);
2199 if (rc)
2200 return rc;
2201
c39f5ebe 2202 /* print device capabilities */
0dd4b21f 2203 if (ata_msg_probe(ap))
a9a79dfe
JP
2204 ata_dev_dbg(dev,
2205 "%s: cfg 49:%04x 82:%04x 83:%04x 84:%04x "
2206 "85:%04x 86:%04x 87:%04x 88:%04x\n",
2207 __func__,
2208 id[49], id[82], id[83], id[84],
2209 id[85], id[86], id[87], id[88]);
c39f5ebe 2210
208a9933 2211 /* initialize to-be-configured parameters */
ea1dd4e1 2212 dev->flags &= ~ATA_DFLAG_CFG_MASK;
208a9933
TH
2213 dev->max_sectors = 0;
2214 dev->cdb_len = 0;
2215 dev->n_sectors = 0;
2216 dev->cylinders = 0;
2217 dev->heads = 0;
2218 dev->sectors = 0;
e18086d6 2219 dev->multi_count = 0;
208a9933 2220
1da177e4
LT
2221 /*
2222 * common ATA, ATAPI feature tests
2223 */
2224
ff8854b2 2225 /* find max transfer mode; for printk only */
1148c3a7 2226 xfer_mask = ata_id_xfermask(id);
1da177e4 2227
0dd4b21f
BP
2228 if (ata_msg_probe(ap))
2229 ata_dump_id(id);
1da177e4 2230
ef143d57
AL
2231 /* SCSI only uses 4-char revisions, dump full 8 chars from ATA */
2232 ata_id_c_string(dev->id, fwrevbuf, ATA_ID_FW_REV,
2233 sizeof(fwrevbuf));
2234
2235 ata_id_c_string(dev->id, modelbuf, ATA_ID_PROD,
2236 sizeof(modelbuf));
2237
1da177e4
LT
2238 /* ATA-specific feature tests */
2239 if (dev->class == ATA_DEV_ATA) {
b352e57d 2240 if (ata_id_is_cfa(id)) {
62afe5d7
SS
2241 /* CPRM may make this media unusable */
2242 if (id[ATA_ID_CFA_KEY_MGMT] & 1)
a9a79dfe
JP
2243 ata_dev_warn(dev,
2244 "supports DRM functions and may not be fully accessible\n");
b352e57d 2245 snprintf(revbuf, 7, "CFA");
ae8d4ee7 2246 } else {
2dcb407e 2247 snprintf(revbuf, 7, "ATA-%d", ata_id_major_version(id));
ae8d4ee7
AC
2248 /* Warn the user if the device has TPM extensions */
2249 if (ata_id_has_tpm(id))
a9a79dfe
JP
2250 ata_dev_warn(dev,
2251 "supports DRM functions and may not be fully accessible\n");
ae8d4ee7 2252 }
b352e57d 2253
1148c3a7 2254 dev->n_sectors = ata_id_n_sectors(id);
2940740b 2255
e18086d6
ML
2256 /* get current R/W Multiple count setting */
2257 if ((dev->id[47] >> 8) == 0x80 && (dev->id[59] & 0x100)) {
2258 unsigned int max = dev->id[47] & 0xff;
2259 unsigned int cnt = dev->id[59] & 0xff;
2260 /* only recognize/allow powers of two here */
2261 if (is_power_of_2(max) && is_power_of_2(cnt))
2262 if (cnt <= max)
2263 dev->multi_count = cnt;
2264 }
3f64f565 2265
1148c3a7 2266 if (ata_id_has_lba(id)) {
4c2d721a 2267 const char *lba_desc;
388539f3 2268 char ncq_desc[24];
8bf62ece 2269
4c2d721a
TH
2270 lba_desc = "LBA";
2271 dev->flags |= ATA_DFLAG_LBA;
1148c3a7 2272 if (ata_id_has_lba48(id)) {
8bf62ece 2273 dev->flags |= ATA_DFLAG_LBA48;
4c2d721a 2274 lba_desc = "LBA48";
6fc49adb
TH
2275
2276 if (dev->n_sectors >= (1UL << 28) &&
2277 ata_id_has_flush_ext(id))
2278 dev->flags |= ATA_DFLAG_FLUSH_EXT;
4c2d721a 2279 }
8bf62ece 2280
a6e6ce8e 2281 /* config NCQ */
388539f3
SL
2282 rc = ata_dev_config_ncq(dev, ncq_desc, sizeof(ncq_desc));
2283 if (rc)
2284 return rc;
a6e6ce8e 2285
8bf62ece 2286 /* print device info to dmesg */
3f64f565 2287 if (ata_msg_drv(ap) && print_info) {
a9a79dfe
JP
2288 ata_dev_info(dev, "%s: %s, %s, max %s\n",
2289 revbuf, modelbuf, fwrevbuf,
2290 ata_mode_string(xfer_mask));
2291 ata_dev_info(dev,
2292 "%llu sectors, multi %u: %s %s\n",
f15a1daf 2293 (unsigned long long)dev->n_sectors,
3f64f565
EM
2294 dev->multi_count, lba_desc, ncq_desc);
2295 }
ffeae418 2296 } else {
8bf62ece
AL
2297 /* CHS */
2298
2299 /* Default translation */
1148c3a7
TH
2300 dev->cylinders = id[1];
2301 dev->heads = id[3];
2302 dev->sectors = id[6];
8bf62ece 2303
1148c3a7 2304 if (ata_id_current_chs_valid(id)) {
8bf62ece 2305 /* Current CHS translation is valid. */
1148c3a7
TH
2306 dev->cylinders = id[54];
2307 dev->heads = id[55];
2308 dev->sectors = id[56];
8bf62ece
AL
2309 }
2310
2311 /* print device info to dmesg */
3f64f565 2312 if (ata_msg_drv(ap) && print_info) {
a9a79dfe
JP
2313 ata_dev_info(dev, "%s: %s, %s, max %s\n",
2314 revbuf, modelbuf, fwrevbuf,
2315 ata_mode_string(xfer_mask));
2316 ata_dev_info(dev,
2317 "%llu sectors, multi %u, CHS %u/%u/%u\n",
2318 (unsigned long long)dev->n_sectors,
2319 dev->multi_count, dev->cylinders,
2320 dev->heads, dev->sectors);
3f64f565 2321 }
07f6f7d0
AL
2322 }
2323
6e7846e9 2324 dev->cdb_len = 16;
1da177e4
LT
2325 }
2326
2327 /* ATAPI-specific feature tests */
2c13b7ce 2328 else if (dev->class == ATA_DEV_ATAPI) {
854c73a2
TH
2329 const char *cdb_intr_string = "";
2330 const char *atapi_an_string = "";
91163006 2331 const char *dma_dir_string = "";
7d77b247 2332 u32 sntf;
08a556db 2333
1148c3a7 2334 rc = atapi_cdb_len(id);
1da177e4 2335 if ((rc < 12) || (rc > ATAPI_CDB_LEN)) {
0dd4b21f 2336 if (ata_msg_warn(ap))
a9a79dfe 2337 ata_dev_warn(dev, "unsupported CDB len\n");
ffeae418 2338 rc = -EINVAL;
1da177e4
LT
2339 goto err_out_nosup;
2340 }
6e7846e9 2341 dev->cdb_len = (unsigned int) rc;
1da177e4 2342
7d77b247
TH
2343 /* Enable ATAPI AN if both the host and device have
2344 * the support. If PMP is attached, SNTF is required
2345 * to enable ATAPI AN to discern between PHY status
2346 * changed notifications and ATAPI ANs.
9f45cbd3 2347 */
e7ecd435
TH
2348 if (atapi_an &&
2349 (ap->flags & ATA_FLAG_AN) && ata_id_has_atapi_AN(id) &&
071f44b1 2350 (!sata_pmp_attached(ap) ||
7d77b247 2351 sata_scr_read(&ap->link, SCR_NOTIFICATION, &sntf) == 0)) {
854c73a2
TH
2352 unsigned int err_mask;
2353
9f45cbd3 2354 /* issue SET feature command to turn this on */
218f3d30
JG
2355 err_mask = ata_dev_set_feature(dev,
2356 SETFEATURES_SATA_ENABLE, SATA_AN);
854c73a2 2357 if (err_mask)
a9a79dfe
JP
2358 ata_dev_err(dev,
2359 "failed to enable ATAPI AN (err_mask=0x%x)\n",
2360 err_mask);
854c73a2 2361 else {
9f45cbd3 2362 dev->flags |= ATA_DFLAG_AN;
854c73a2
TH
2363 atapi_an_string = ", ATAPI AN";
2364 }
9f45cbd3
KCA
2365 }
2366
08a556db 2367 if (ata_id_cdb_intr(dev->id)) {
312f7da2 2368 dev->flags |= ATA_DFLAG_CDB_INTR;
08a556db
AL
2369 cdb_intr_string = ", CDB intr";
2370 }
312f7da2 2371
91163006
TH
2372 if (atapi_dmadir || atapi_id_dmadir(dev->id)) {
2373 dev->flags |= ATA_DFLAG_DMADIR;
2374 dma_dir_string = ", DMADIR";
2375 }
2376
b1354cbb
LM
2377 if (ata_id_has_da(dev->id))
2378 dev->flags |= ATA_DFLAG_DA;
2379
1da177e4 2380 /* print device info to dmesg */
5afc8142 2381 if (ata_msg_drv(ap) && print_info)
a9a79dfe
JP
2382 ata_dev_info(dev,
2383 "ATAPI: %s, %s, max %s%s%s%s\n",
2384 modelbuf, fwrevbuf,
2385 ata_mode_string(xfer_mask),
2386 cdb_intr_string, atapi_an_string,
2387 dma_dir_string);
1da177e4
LT
2388 }
2389
914ed354
TH
2390 /* determine max_sectors */
2391 dev->max_sectors = ATA_MAX_SECTORS;
2392 if (dev->flags & ATA_DFLAG_LBA48)
2393 dev->max_sectors = ATA_MAX_SECTORS_LBA48;
2394
c5038fc0
AC
2395 /* Limit PATA drive on SATA cable bridge transfers to udma5,
2396 200 sectors */
3373efd8 2397 if (ata_dev_knobble(dev)) {
5afc8142 2398 if (ata_msg_drv(ap) && print_info)
a9a79dfe 2399 ata_dev_info(dev, "applying bridge limits\n");
5a529139 2400 dev->udma_mask &= ATA_UDMA5;
4b2f3ede
TH
2401 dev->max_sectors = ATA_MAX_SECTORS;
2402 }
2403
f8d8e579 2404 if ((dev->class == ATA_DEV_ATAPI) &&
f442cd86 2405 (atapi_command_packet_set(id) == TYPE_TAPE)) {
f8d8e579 2406 dev->max_sectors = ATA_MAX_SECTORS_TAPE;
f442cd86
AL
2407 dev->horkage |= ATA_HORKAGE_STUCK_ERR;
2408 }
f8d8e579 2409
75683fe7 2410 if (dev->horkage & ATA_HORKAGE_MAX_SEC_128)
03ec52de
TH
2411 dev->max_sectors = min_t(unsigned int, ATA_MAX_SECTORS_128,
2412 dev->max_sectors);
18d6e9d5 2413
4b2f3ede 2414 if (ap->ops->dev_config)
cd0d3bbc 2415 ap->ops->dev_config(dev);
4b2f3ede 2416
c5038fc0
AC
2417 if (dev->horkage & ATA_HORKAGE_DIAGNOSTIC) {
2418 /* Let the user know. We don't want to disallow opens for
2419 rescue purposes, or in case the vendor is just a blithering
2420 idiot. Do this after the dev_config call as some controllers
2421 with buggy firmware may want to avoid reporting false device
2422 bugs */
2423
2424 if (print_info) {
a9a79dfe 2425 ata_dev_warn(dev,
c5038fc0 2426"Drive reports diagnostics failure. This may indicate a drive\n");
a9a79dfe 2427 ata_dev_warn(dev,
c5038fc0
AC
2428"fault or invalid emulation. Contact drive vendor for information.\n");
2429 }
2430 }
2431
ac70a964 2432 if ((dev->horkage & ATA_HORKAGE_FIRMWARE_WARN) && print_info) {
a9a79dfe
JP
2433 ata_dev_warn(dev, "WARNING: device requires firmware update to be fully functional\n");
2434 ata_dev_warn(dev, " contact the vendor or visit http://ata.wiki.kernel.org\n");
ac70a964
TH
2435 }
2436
ffeae418 2437 return 0;
1da177e4
LT
2438
2439err_out_nosup:
0dd4b21f 2440 if (ata_msg_probe(ap))
a9a79dfe 2441 ata_dev_dbg(dev, "%s: EXIT, err\n", __func__);
ffeae418 2442 return rc;
1da177e4
LT
2443}
2444
be0d18df 2445/**
2e41e8e6 2446 * ata_cable_40wire - return 40 wire cable type
be0d18df
AC
2447 * @ap: port
2448 *
2e41e8e6 2449 * Helper method for drivers which want to hardwire 40 wire cable
be0d18df
AC
2450 * detection.
2451 */
2452
2453int ata_cable_40wire(struct ata_port *ap)
2454{
2455 return ATA_CBL_PATA40;
2456}
2457
2458/**
2e41e8e6 2459 * ata_cable_80wire - return 80 wire cable type
be0d18df
AC
2460 * @ap: port
2461 *
2e41e8e6 2462 * Helper method for drivers which want to hardwire 80 wire cable
be0d18df
AC
2463 * detection.
2464 */
2465
2466int ata_cable_80wire(struct ata_port *ap)
2467{
2468 return ATA_CBL_PATA80;
2469}
2470
2471/**
2472 * ata_cable_unknown - return unknown PATA cable.
2473 * @ap: port
2474 *
2475 * Helper method for drivers which have no PATA cable detection.
2476 */
2477
2478int ata_cable_unknown(struct ata_port *ap)
2479{
2480 return ATA_CBL_PATA_UNK;
2481}
2482
c88f90c3
TH
2483/**
2484 * ata_cable_ignore - return ignored PATA cable.
2485 * @ap: port
2486 *
2487 * Helper method for drivers which don't use cable type to limit
2488 * transfer mode.
2489 */
2490int ata_cable_ignore(struct ata_port *ap)
2491{
2492 return ATA_CBL_PATA_IGN;
2493}
2494
be0d18df
AC
2495/**
2496 * ata_cable_sata - return SATA cable type
2497 * @ap: port
2498 *
2499 * Helper method for drivers which have SATA cables
2500 */
2501
2502int ata_cable_sata(struct ata_port *ap)
2503{
2504 return ATA_CBL_SATA;
2505}
2506
1da177e4
LT
2507/**
2508 * ata_bus_probe - Reset and probe ATA bus
2509 * @ap: Bus to probe
2510 *
0cba632b
JG
2511 * Master ATA bus probing function. Initiates a hardware-dependent
2512 * bus reset, then attempts to identify any devices found on
2513 * the bus.
2514 *
1da177e4 2515 * LOCKING:
0cba632b 2516 * PCI/etc. bus probe sem.
1da177e4
LT
2517 *
2518 * RETURNS:
96072e69 2519 * Zero on success, negative errno otherwise.
1da177e4
LT
2520 */
2521
80289167 2522int ata_bus_probe(struct ata_port *ap)
1da177e4 2523{
28ca5c57 2524 unsigned int classes[ATA_MAX_DEVICES];
14d2bac1 2525 int tries[ATA_MAX_DEVICES];
f58229f8 2526 int rc;
e82cbdb9 2527 struct ata_device *dev;
1da177e4 2528
1eca4365 2529 ata_for_each_dev(dev, &ap->link, ALL)
f58229f8 2530 tries[dev->devno] = ATA_PROBE_MAX_TRIES;
14d2bac1
TH
2531
2532 retry:
1eca4365 2533 ata_for_each_dev(dev, &ap->link, ALL) {
cdeab114
TH
2534 /* If we issue an SRST then an ATA drive (not ATAPI)
2535 * may change configuration and be in PIO0 timing. If
2536 * we do a hard reset (or are coming from power on)
2537 * this is true for ATA or ATAPI. Until we've set a
2538 * suitable controller mode we should not touch the
2539 * bus as we may be talking too fast.
2540 */
2541 dev->pio_mode = XFER_PIO_0;
2542
2543 /* If the controller has a pio mode setup function
2544 * then use it to set the chipset to rights. Don't
2545 * touch the DMA setup as that will be dealt with when
2546 * configuring devices.
2547 */
2548 if (ap->ops->set_piomode)
2549 ap->ops->set_piomode(ap, dev);
2550 }
2551
2044470c 2552 /* reset and determine device classes */
52783c5d 2553 ap->ops->phy_reset(ap);
2061a47a 2554
1eca4365 2555 ata_for_each_dev(dev, &ap->link, ALL) {
3e4ec344 2556 if (dev->class != ATA_DEV_UNKNOWN)
52783c5d
TH
2557 classes[dev->devno] = dev->class;
2558 else
2559 classes[dev->devno] = ATA_DEV_NONE;
2044470c 2560
52783c5d 2561 dev->class = ATA_DEV_UNKNOWN;
28ca5c57 2562 }
1da177e4 2563
f31f0cc2
JG
2564 /* read IDENTIFY page and configure devices. We have to do the identify
2565 specific sequence bass-ackwards so that PDIAG- is released by
2566 the slave device */
2567
1eca4365 2568 ata_for_each_dev(dev, &ap->link, ALL_REVERSE) {
f58229f8
TH
2569 if (tries[dev->devno])
2570 dev->class = classes[dev->devno];
ffeae418 2571
14d2bac1 2572 if (!ata_dev_enabled(dev))
ffeae418 2573 continue;
ffeae418 2574
bff04647
TH
2575 rc = ata_dev_read_id(dev, &dev->class, ATA_READID_POSTRESET,
2576 dev->id);
14d2bac1
TH
2577 if (rc)
2578 goto fail;
f31f0cc2
JG
2579 }
2580
be0d18df
AC
2581 /* Now ask for the cable type as PDIAG- should have been released */
2582 if (ap->ops->cable_detect)
2583 ap->cbl = ap->ops->cable_detect(ap);
2584
1eca4365
TH
2585 /* We may have SATA bridge glue hiding here irrespective of
2586 * the reported cable types and sensed types. When SATA
2587 * drives indicate we have a bridge, we don't know which end
2588 * of the link the bridge is which is a problem.
2589 */
2590 ata_for_each_dev(dev, &ap->link, ENABLED)
614fe29b
AC
2591 if (ata_id_is_sata(dev->id))
2592 ap->cbl = ATA_CBL_SATA;
614fe29b 2593
f31f0cc2
JG
2594 /* After the identify sequence we can now set up the devices. We do
2595 this in the normal order so that the user doesn't get confused */
2596
1eca4365 2597 ata_for_each_dev(dev, &ap->link, ENABLED) {
9af5c9c9 2598 ap->link.eh_context.i.flags |= ATA_EHI_PRINTINFO;
efdaedc4 2599 rc = ata_dev_configure(dev);
9af5c9c9 2600 ap->link.eh_context.i.flags &= ~ATA_EHI_PRINTINFO;
14d2bac1
TH
2601 if (rc)
2602 goto fail;
1da177e4
LT
2603 }
2604
e82cbdb9 2605 /* configure transfer mode */
0260731f 2606 rc = ata_set_mode(&ap->link, &dev);
4ae72a1e 2607 if (rc)
51713d35 2608 goto fail;
1da177e4 2609
1eca4365
TH
2610 ata_for_each_dev(dev, &ap->link, ENABLED)
2611 return 0;
1da177e4 2612
96072e69 2613 return -ENODEV;
14d2bac1
TH
2614
2615 fail:
4ae72a1e
TH
2616 tries[dev->devno]--;
2617
14d2bac1
TH
2618 switch (rc) {
2619 case -EINVAL:
4ae72a1e 2620 /* eeek, something went very wrong, give up */
14d2bac1
TH
2621 tries[dev->devno] = 0;
2622 break;
4ae72a1e
TH
2623
2624 case -ENODEV:
2625 /* give it just one more chance */
2626 tries[dev->devno] = min(tries[dev->devno], 1);
14d2bac1 2627 case -EIO:
4ae72a1e
TH
2628 if (tries[dev->devno] == 1) {
2629 /* This is the last chance, better to slow
2630 * down than lose it.
2631 */
a07d499b 2632 sata_down_spd_limit(&ap->link, 0);
4ae72a1e
TH
2633 ata_down_xfermask_limit(dev, ATA_DNXFER_PIO);
2634 }
14d2bac1
TH
2635 }
2636
4ae72a1e 2637 if (!tries[dev->devno])
3373efd8 2638 ata_dev_disable(dev);
ec573755 2639
14d2bac1 2640 goto retry;
1da177e4
LT
2641}
2642
3be680b7
TH
2643/**
2644 * sata_print_link_status - Print SATA link status
936fd732 2645 * @link: SATA link to printk link status about
3be680b7
TH
2646 *
2647 * This function prints link speed and status of a SATA link.
2648 *
2649 * LOCKING:
2650 * None.
2651 */
6bdb4fc9 2652static void sata_print_link_status(struct ata_link *link)
3be680b7 2653{
6d5f9732 2654 u32 sstatus, scontrol, tmp;
3be680b7 2655
936fd732 2656 if (sata_scr_read(link, SCR_STATUS, &sstatus))
3be680b7 2657 return;
936fd732 2658 sata_scr_read(link, SCR_CONTROL, &scontrol);
3be680b7 2659
b1c72916 2660 if (ata_phys_link_online(link)) {
3be680b7 2661 tmp = (sstatus >> 4) & 0xf;
a9a79dfe
JP
2662 ata_link_info(link, "SATA link up %s (SStatus %X SControl %X)\n",
2663 sata_spd_string(tmp), sstatus, scontrol);
3be680b7 2664 } else {
a9a79dfe
JP
2665 ata_link_info(link, "SATA link down (SStatus %X SControl %X)\n",
2666 sstatus, scontrol);
3be680b7
TH
2667 }
2668}
2669
ebdfca6e
AC
2670/**
2671 * ata_dev_pair - return other device on cable
ebdfca6e
AC
2672 * @adev: device
2673 *
2674 * Obtain the other device on the same cable, or if none is
2675 * present NULL is returned
2676 */
2e9edbf8 2677
3373efd8 2678struct ata_device *ata_dev_pair(struct ata_device *adev)
ebdfca6e 2679{
9af5c9c9
TH
2680 struct ata_link *link = adev->link;
2681 struct ata_device *pair = &link->device[1 - adev->devno];
e1211e3f 2682 if (!ata_dev_enabled(pair))
ebdfca6e
AC
2683 return NULL;
2684 return pair;
2685}
2686
1c3fae4d 2687/**
3c567b7d 2688 * sata_down_spd_limit - adjust SATA spd limit downward
936fd732 2689 * @link: Link to adjust SATA spd limit for
a07d499b 2690 * @spd_limit: Additional limit
1c3fae4d 2691 *
936fd732 2692 * Adjust SATA spd limit of @link downward. Note that this
1c3fae4d 2693 * function only adjusts the limit. The change must be applied
3c567b7d 2694 * using sata_set_spd().
1c3fae4d 2695 *
a07d499b
TH
2696 * If @spd_limit is non-zero, the speed is limited to equal to or
2697 * lower than @spd_limit if such speed is supported. If
2698 * @spd_limit is slower than any supported speed, only the lowest
2699 * supported speed is allowed.
2700 *
1c3fae4d
TH
2701 * LOCKING:
2702 * Inherited from caller.
2703 *
2704 * RETURNS:
2705 * 0 on success, negative errno on failure
2706 */
a07d499b 2707int sata_down_spd_limit(struct ata_link *link, u32 spd_limit)
1c3fae4d 2708{
81952c54 2709 u32 sstatus, spd, mask;
a07d499b 2710 int rc, bit;
1c3fae4d 2711
936fd732 2712 if (!sata_scr_valid(link))
008a7896
TH
2713 return -EOPNOTSUPP;
2714
2715 /* If SCR can be read, use it to determine the current SPD.
936fd732 2716 * If not, use cached value in link->sata_spd.
008a7896 2717 */
936fd732 2718 rc = sata_scr_read(link, SCR_STATUS, &sstatus);
9913ff8a 2719 if (rc == 0 && ata_sstatus_online(sstatus))
008a7896
TH
2720 spd = (sstatus >> 4) & 0xf;
2721 else
936fd732 2722 spd = link->sata_spd;
1c3fae4d 2723
936fd732 2724 mask = link->sata_spd_limit;
1c3fae4d
TH
2725 if (mask <= 1)
2726 return -EINVAL;
008a7896
TH
2727
2728 /* unconditionally mask off the highest bit */
a07d499b
TH
2729 bit = fls(mask) - 1;
2730 mask &= ~(1 << bit);
1c3fae4d 2731
008a7896
TH
2732 /* Mask off all speeds higher than or equal to the current
2733 * one. Force 1.5Gbps if current SPD is not available.
2734 */
2735 if (spd > 1)
2736 mask &= (1 << (spd - 1)) - 1;
2737 else
2738 mask &= 1;
2739
2740 /* were we already at the bottom? */
1c3fae4d
TH
2741 if (!mask)
2742 return -EINVAL;
2743
a07d499b
TH
2744 if (spd_limit) {
2745 if (mask & ((1 << spd_limit) - 1))
2746 mask &= (1 << spd_limit) - 1;
2747 else {
2748 bit = ffs(mask) - 1;
2749 mask = 1 << bit;
2750 }
2751 }
2752
936fd732 2753 link->sata_spd_limit = mask;
1c3fae4d 2754
a9a79dfe
JP
2755 ata_link_warn(link, "limiting SATA link speed to %s\n",
2756 sata_spd_string(fls(mask)));
1c3fae4d
TH
2757
2758 return 0;
2759}
2760
936fd732 2761static int __sata_set_spd_needed(struct ata_link *link, u32 *scontrol)
1c3fae4d 2762{
5270222f
TH
2763 struct ata_link *host_link = &link->ap->link;
2764 u32 limit, target, spd;
1c3fae4d 2765
5270222f
TH
2766 limit = link->sata_spd_limit;
2767
2768 /* Don't configure downstream link faster than upstream link.
2769 * It doesn't speed up anything and some PMPs choke on such
2770 * configuration.
2771 */
2772 if (!ata_is_host_link(link) && host_link->sata_spd)
2773 limit &= (1 << host_link->sata_spd) - 1;
2774
2775 if (limit == UINT_MAX)
2776 target = 0;
1c3fae4d 2777 else
5270222f 2778 target = fls(limit);
1c3fae4d
TH
2779
2780 spd = (*scontrol >> 4) & 0xf;
5270222f 2781 *scontrol = (*scontrol & ~0xf0) | ((target & 0xf) << 4);
1c3fae4d 2782
5270222f 2783 return spd != target;
1c3fae4d
TH
2784}
2785
2786/**
3c567b7d 2787 * sata_set_spd_needed - is SATA spd configuration needed
936fd732 2788 * @link: Link in question
1c3fae4d
TH
2789 *
2790 * Test whether the spd limit in SControl matches
936fd732 2791 * @link->sata_spd_limit. This function is used to determine
1c3fae4d
TH
2792 * whether hardreset is necessary to apply SATA spd
2793 * configuration.
2794 *
2795 * LOCKING:
2796 * Inherited from caller.
2797 *
2798 * RETURNS:
2799 * 1 if SATA spd configuration is needed, 0 otherwise.
2800 */
1dc55e87 2801static int sata_set_spd_needed(struct ata_link *link)
1c3fae4d
TH
2802{
2803 u32 scontrol;
2804
936fd732 2805 if (sata_scr_read(link, SCR_CONTROL, &scontrol))
db64bcf3 2806 return 1;
1c3fae4d 2807
936fd732 2808 return __sata_set_spd_needed(link, &scontrol);
1c3fae4d
TH
2809}
2810
2811/**
3c567b7d 2812 * sata_set_spd - set SATA spd according to spd limit
936fd732 2813 * @link: Link to set SATA spd for
1c3fae4d 2814 *
936fd732 2815 * Set SATA spd of @link according to sata_spd_limit.
1c3fae4d
TH
2816 *
2817 * LOCKING:
2818 * Inherited from caller.
2819 *
2820 * RETURNS:
2821 * 0 if spd doesn't need to be changed, 1 if spd has been
81952c54 2822 * changed. Negative errno if SCR registers are inaccessible.
1c3fae4d 2823 */
936fd732 2824int sata_set_spd(struct ata_link *link)
1c3fae4d
TH
2825{
2826 u32 scontrol;
81952c54 2827 int rc;
1c3fae4d 2828
936fd732 2829 if ((rc = sata_scr_read(link, SCR_CONTROL, &scontrol)))
81952c54 2830 return rc;
1c3fae4d 2831
936fd732 2832 if (!__sata_set_spd_needed(link, &scontrol))
1c3fae4d
TH
2833 return 0;
2834
936fd732 2835 if ((rc = sata_scr_write(link, SCR_CONTROL, scontrol)))
81952c54
TH
2836 return rc;
2837
1c3fae4d
TH
2838 return 1;
2839}
2840
452503f9
AC
2841/*
2842 * This mode timing computation functionality is ported over from
2843 * drivers/ide/ide-timing.h and was originally written by Vojtech Pavlik
2844 */
2845/*
b352e57d 2846 * PIO 0-4, MWDMA 0-2 and UDMA 0-6 timings (in nanoseconds).
452503f9 2847 * These were taken from ATA/ATAPI-6 standard, rev 0a, except
b352e57d
AC
2848 * for UDMA6, which is currently supported only by Maxtor drives.
2849 *
2850 * For PIO 5/6 MWDMA 3/4 see the CFA specification 3.0.
452503f9
AC
2851 */
2852
2853static const struct ata_timing ata_timing[] = {
3ada9c12
DD
2854/* { XFER_PIO_SLOW, 120, 290, 240, 960, 290, 240, 0, 960, 0 }, */
2855 { XFER_PIO_0, 70, 290, 240, 600, 165, 150, 0, 600, 0 },
2856 { XFER_PIO_1, 50, 290, 93, 383, 125, 100, 0, 383, 0 },
2857 { XFER_PIO_2, 30, 290, 40, 330, 100, 90, 0, 240, 0 },
2858 { XFER_PIO_3, 30, 80, 70, 180, 80, 70, 0, 180, 0 },
2859 { XFER_PIO_4, 25, 70, 25, 120, 70, 25, 0, 120, 0 },
2860 { XFER_PIO_5, 15, 65, 25, 100, 65, 25, 0, 100, 0 },
2861 { XFER_PIO_6, 10, 55, 20, 80, 55, 20, 0, 80, 0 },
2862
2863 { XFER_SW_DMA_0, 120, 0, 0, 0, 480, 480, 50, 960, 0 },
2864 { XFER_SW_DMA_1, 90, 0, 0, 0, 240, 240, 30, 480, 0 },
2865 { XFER_SW_DMA_2, 60, 0, 0, 0, 120, 120, 20, 240, 0 },
2866
2867 { XFER_MW_DMA_0, 60, 0, 0, 0, 215, 215, 20, 480, 0 },
2868 { XFER_MW_DMA_1, 45, 0, 0, 0, 80, 50, 5, 150, 0 },
2869 { XFER_MW_DMA_2, 25, 0, 0, 0, 70, 25, 5, 120, 0 },
2870 { XFER_MW_DMA_3, 25, 0, 0, 0, 65, 25, 5, 100, 0 },
2871 { XFER_MW_DMA_4, 25, 0, 0, 0, 55, 20, 5, 80, 0 },
2872
2873/* { XFER_UDMA_SLOW, 0, 0, 0, 0, 0, 0, 0, 0, 150 }, */
2874 { XFER_UDMA_0, 0, 0, 0, 0, 0, 0, 0, 0, 120 },
2875 { XFER_UDMA_1, 0, 0, 0, 0, 0, 0, 0, 0, 80 },
2876 { XFER_UDMA_2, 0, 0, 0, 0, 0, 0, 0, 0, 60 },
2877 { XFER_UDMA_3, 0, 0, 0, 0, 0, 0, 0, 0, 45 },
2878 { XFER_UDMA_4, 0, 0, 0, 0, 0, 0, 0, 0, 30 },
2879 { XFER_UDMA_5, 0, 0, 0, 0, 0, 0, 0, 0, 20 },
2880 { XFER_UDMA_6, 0, 0, 0, 0, 0, 0, 0, 0, 15 },
452503f9
AC
2881
2882 { 0xFF }
2883};
2884
2dcb407e
JG
2885#define ENOUGH(v, unit) (((v)-1)/(unit)+1)
2886#define EZ(v, unit) ((v)?ENOUGH(v, unit):0)
452503f9
AC
2887
2888static void ata_timing_quantize(const struct ata_timing *t, struct ata_timing *q, int T, int UT)
2889{
3ada9c12
DD
2890 q->setup = EZ(t->setup * 1000, T);
2891 q->act8b = EZ(t->act8b * 1000, T);
2892 q->rec8b = EZ(t->rec8b * 1000, T);
2893 q->cyc8b = EZ(t->cyc8b * 1000, T);
2894 q->active = EZ(t->active * 1000, T);
2895 q->recover = EZ(t->recover * 1000, T);
2896 q->dmack_hold = EZ(t->dmack_hold * 1000, T);
2897 q->cycle = EZ(t->cycle * 1000, T);
2898 q->udma = EZ(t->udma * 1000, UT);
452503f9
AC
2899}
2900
2901void ata_timing_merge(const struct ata_timing *a, const struct ata_timing *b,
2902 struct ata_timing *m, unsigned int what)
2903{
2904 if (what & ATA_TIMING_SETUP ) m->setup = max(a->setup, b->setup);
2905 if (what & ATA_TIMING_ACT8B ) m->act8b = max(a->act8b, b->act8b);
2906 if (what & ATA_TIMING_REC8B ) m->rec8b = max(a->rec8b, b->rec8b);
2907 if (what & ATA_TIMING_CYC8B ) m->cyc8b = max(a->cyc8b, b->cyc8b);
2908 if (what & ATA_TIMING_ACTIVE ) m->active = max(a->active, b->active);
2909 if (what & ATA_TIMING_RECOVER) m->recover = max(a->recover, b->recover);
3ada9c12 2910 if (what & ATA_TIMING_DMACK_HOLD) m->dmack_hold = max(a->dmack_hold, b->dmack_hold);
452503f9
AC
2911 if (what & ATA_TIMING_CYCLE ) m->cycle = max(a->cycle, b->cycle);
2912 if (what & ATA_TIMING_UDMA ) m->udma = max(a->udma, b->udma);
2913}
2914
6357357c 2915const struct ata_timing *ata_timing_find_mode(u8 xfer_mode)
452503f9 2916{
70cd071e
TH
2917 const struct ata_timing *t = ata_timing;
2918
2919 while (xfer_mode > t->mode)
2920 t++;
452503f9 2921
70cd071e
TH
2922 if (xfer_mode == t->mode)
2923 return t;
2924 return NULL;
452503f9
AC
2925}
2926
2927int ata_timing_compute(struct ata_device *adev, unsigned short speed,
2928 struct ata_timing *t, int T, int UT)
2929{
9e8808a9 2930 const u16 *id = adev->id;
452503f9
AC
2931 const struct ata_timing *s;
2932 struct ata_timing p;
2933
2934 /*
2e9edbf8 2935 * Find the mode.
75b1f2f8 2936 */
452503f9
AC
2937
2938 if (!(s = ata_timing_find_mode(speed)))
2939 return -EINVAL;
2940
75b1f2f8
AL
2941 memcpy(t, s, sizeof(*s));
2942
452503f9
AC
2943 /*
2944 * If the drive is an EIDE drive, it can tell us it needs extended
2945 * PIO/MW_DMA cycle timing.
2946 */
2947
9e8808a9 2948 if (id[ATA_ID_FIELD_VALID] & 2) { /* EIDE drive */
452503f9 2949 memset(&p, 0, sizeof(p));
9e8808a9 2950
bff00256 2951 if (speed >= XFER_PIO_0 && speed < XFER_SW_DMA_0) {
9e8808a9
BZ
2952 if (speed <= XFER_PIO_2)
2953 p.cycle = p.cyc8b = id[ATA_ID_EIDE_PIO];
2954 else if ((speed <= XFER_PIO_4) ||
2955 (speed == XFER_PIO_5 && !ata_id_is_cfa(id)))
2956 p.cycle = p.cyc8b = id[ATA_ID_EIDE_PIO_IORDY];
2957 } else if (speed >= XFER_MW_DMA_0 && speed <= XFER_MW_DMA_2)
2958 p.cycle = id[ATA_ID_EIDE_DMA_MIN];
2959
452503f9
AC
2960 ata_timing_merge(&p, t, t, ATA_TIMING_CYCLE | ATA_TIMING_CYC8B);
2961 }
2962
2963 /*
2964 * Convert the timing to bus clock counts.
2965 */
2966
75b1f2f8 2967 ata_timing_quantize(t, t, T, UT);
452503f9
AC
2968
2969 /*
c893a3ae
RD
2970 * Even in DMA/UDMA modes we still use PIO access for IDENTIFY,
2971 * S.M.A.R.T * and some other commands. We have to ensure that the
2972 * DMA cycle timing is slower/equal than the fastest PIO timing.
452503f9
AC
2973 */
2974
fd3367af 2975 if (speed > XFER_PIO_6) {
452503f9
AC
2976 ata_timing_compute(adev, adev->pio_mode, &p, T, UT);
2977 ata_timing_merge(&p, t, t, ATA_TIMING_ALL);
2978 }
2979
2980 /*
c893a3ae 2981 * Lengthen active & recovery time so that cycle time is correct.
452503f9
AC
2982 */
2983
2984 if (t->act8b + t->rec8b < t->cyc8b) {
2985 t->act8b += (t->cyc8b - (t->act8b + t->rec8b)) / 2;
2986 t->rec8b = t->cyc8b - t->act8b;
2987 }
2988
2989 if (t->active + t->recover < t->cycle) {
2990 t->active += (t->cycle - (t->active + t->recover)) / 2;
2991 t->recover = t->cycle - t->active;
2992 }
a617c09f 2993
4f701d1e
AC
2994 /* In a few cases quantisation may produce enough errors to
2995 leave t->cycle too low for the sum of active and recovery
2996 if so we must correct this */
2997 if (t->active + t->recover > t->cycle)
2998 t->cycle = t->active + t->recover;
452503f9
AC
2999
3000 return 0;
3001}
3002
a0f79b92
TH
3003/**
3004 * ata_timing_cycle2mode - find xfer mode for the specified cycle duration
3005 * @xfer_shift: ATA_SHIFT_* value for transfer type to examine.
3006 * @cycle: cycle duration in ns
3007 *
3008 * Return matching xfer mode for @cycle. The returned mode is of
3009 * the transfer type specified by @xfer_shift. If @cycle is too
3010 * slow for @xfer_shift, 0xff is returned. If @cycle is faster
3011 * than the fastest known mode, the fasted mode is returned.
3012 *
3013 * LOCKING:
3014 * None.
3015 *
3016 * RETURNS:
3017 * Matching xfer_mode, 0xff if no match found.
3018 */
3019u8 ata_timing_cycle2mode(unsigned int xfer_shift, int cycle)
3020{
3021 u8 base_mode = 0xff, last_mode = 0xff;
3022 const struct ata_xfer_ent *ent;
3023 const struct ata_timing *t;
3024
3025 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
3026 if (ent->shift == xfer_shift)
3027 base_mode = ent->base;
3028
3029 for (t = ata_timing_find_mode(base_mode);
3030 t && ata_xfer_mode2shift(t->mode) == xfer_shift; t++) {
3031 unsigned short this_cycle;
3032
3033 switch (xfer_shift) {
3034 case ATA_SHIFT_PIO:
3035 case ATA_SHIFT_MWDMA:
3036 this_cycle = t->cycle;
3037 break;
3038 case ATA_SHIFT_UDMA:
3039 this_cycle = t->udma;
3040 break;
3041 default:
3042 return 0xff;
3043 }
3044
3045 if (cycle > this_cycle)
3046 break;
3047
3048 last_mode = t->mode;
3049 }
3050
3051 return last_mode;
3052}
3053
cf176e1a
TH
3054/**
3055 * ata_down_xfermask_limit - adjust dev xfer masks downward
cf176e1a 3056 * @dev: Device to adjust xfer masks
458337db 3057 * @sel: ATA_DNXFER_* selector
cf176e1a
TH
3058 *
3059 * Adjust xfer masks of @dev downward. Note that this function
3060 * does not apply the change. Invoking ata_set_mode() afterwards
3061 * will apply the limit.
3062 *
3063 * LOCKING:
3064 * Inherited from caller.
3065 *
3066 * RETURNS:
3067 * 0 on success, negative errno on failure
3068 */
458337db 3069int ata_down_xfermask_limit(struct ata_device *dev, unsigned int sel)
cf176e1a 3070{
458337db 3071 char buf[32];
7dc951ae
TH
3072 unsigned long orig_mask, xfer_mask;
3073 unsigned long pio_mask, mwdma_mask, udma_mask;
458337db 3074 int quiet, highbit;
cf176e1a 3075
458337db
TH
3076 quiet = !!(sel & ATA_DNXFER_QUIET);
3077 sel &= ~ATA_DNXFER_QUIET;
cf176e1a 3078
458337db
TH
3079 xfer_mask = orig_mask = ata_pack_xfermask(dev->pio_mask,
3080 dev->mwdma_mask,
3081 dev->udma_mask);
3082 ata_unpack_xfermask(xfer_mask, &pio_mask, &mwdma_mask, &udma_mask);
cf176e1a 3083
458337db
TH
3084 switch (sel) {
3085 case ATA_DNXFER_PIO:
3086 highbit = fls(pio_mask) - 1;
3087 pio_mask &= ~(1 << highbit);
3088 break;
3089
3090 case ATA_DNXFER_DMA:
3091 if (udma_mask) {
3092 highbit = fls(udma_mask) - 1;
3093 udma_mask &= ~(1 << highbit);
3094 if (!udma_mask)
3095 return -ENOENT;
3096 } else if (mwdma_mask) {
3097 highbit = fls(mwdma_mask) - 1;
3098 mwdma_mask &= ~(1 << highbit);
3099 if (!mwdma_mask)
3100 return -ENOENT;
3101 }
3102 break;
3103
3104 case ATA_DNXFER_40C:
3105 udma_mask &= ATA_UDMA_MASK_40C;
3106 break;
3107
3108 case ATA_DNXFER_FORCE_PIO0:
3109 pio_mask &= 1;
3110 case ATA_DNXFER_FORCE_PIO:
3111 mwdma_mask = 0;
3112 udma_mask = 0;
3113 break;
3114
458337db
TH
3115 default:
3116 BUG();
3117 }
3118
3119 xfer_mask &= ata_pack_xfermask(pio_mask, mwdma_mask, udma_mask);
3120
3121 if (!(xfer_mask & ATA_MASK_PIO) || xfer_mask == orig_mask)
3122 return -ENOENT;
3123
3124 if (!quiet) {
3125 if (xfer_mask & (ATA_MASK_MWDMA | ATA_MASK_UDMA))
3126 snprintf(buf, sizeof(buf), "%s:%s",
3127 ata_mode_string(xfer_mask),
3128 ata_mode_string(xfer_mask & ATA_MASK_PIO));
3129 else
3130 snprintf(buf, sizeof(buf), "%s",
3131 ata_mode_string(xfer_mask));
3132
a9a79dfe 3133 ata_dev_warn(dev, "limiting speed to %s\n", buf);
458337db 3134 }
cf176e1a
TH
3135
3136 ata_unpack_xfermask(xfer_mask, &dev->pio_mask, &dev->mwdma_mask,
3137 &dev->udma_mask);
3138
cf176e1a 3139 return 0;
cf176e1a
TH
3140}
3141
3373efd8 3142static int ata_dev_set_mode(struct ata_device *dev)
1da177e4 3143{
d0cb43b3 3144 struct ata_port *ap = dev->link->ap;
9af5c9c9 3145 struct ata_eh_context *ehc = &dev->link->eh_context;
d0cb43b3 3146 const bool nosetxfer = dev->horkage & ATA_HORKAGE_NOSETXFER;
4055dee7
TH
3147 const char *dev_err_whine = "";
3148 int ign_dev_err = 0;
d0cb43b3 3149 unsigned int err_mask = 0;
83206a29 3150 int rc;
1da177e4 3151
e8384607 3152 dev->flags &= ~ATA_DFLAG_PIO;
1da177e4
LT
3153 if (dev->xfer_shift == ATA_SHIFT_PIO)
3154 dev->flags |= ATA_DFLAG_PIO;
3155
d0cb43b3
TH
3156 if (nosetxfer && ap->flags & ATA_FLAG_SATA && ata_id_is_sata(dev->id))
3157 dev_err_whine = " (SET_XFERMODE skipped)";
3158 else {
3159 if (nosetxfer)
a9a79dfe
JP
3160 ata_dev_warn(dev,
3161 "NOSETXFER but PATA detected - can't "
3162 "skip SETXFER, might malfunction\n");
d0cb43b3
TH
3163 err_mask = ata_dev_set_xfermode(dev);
3164 }
2dcb407e 3165
4055dee7
TH
3166 if (err_mask & ~AC_ERR_DEV)
3167 goto fail;
3168
3169 /* revalidate */
3170 ehc->i.flags |= ATA_EHI_POST_SETMODE;
3171 rc = ata_dev_revalidate(dev, ATA_DEV_UNKNOWN, 0);
3172 ehc->i.flags &= ~ATA_EHI_POST_SETMODE;
3173 if (rc)
3174 return rc;
3175
b93fda12
AC
3176 if (dev->xfer_shift == ATA_SHIFT_PIO) {
3177 /* Old CFA may refuse this command, which is just fine */
3178 if (ata_id_is_cfa(dev->id))
3179 ign_dev_err = 1;
3180 /* Catch several broken garbage emulations plus some pre
3181 ATA devices */
3182 if (ata_id_major_version(dev->id) == 0 &&
3183 dev->pio_mode <= XFER_PIO_2)
3184 ign_dev_err = 1;
3185 /* Some very old devices and some bad newer ones fail
3186 any kind of SET_XFERMODE request but support PIO0-2
3187 timings and no IORDY */
3188 if (!ata_id_has_iordy(dev->id) && dev->pio_mode <= XFER_PIO_2)
3189 ign_dev_err = 1;
3190 }
3acaf94b
AC
3191 /* Early MWDMA devices do DMA but don't allow DMA mode setting.
3192 Don't fail an MWDMA0 set IFF the device indicates it is in MWDMA0 */
c5038fc0 3193 if (dev->xfer_shift == ATA_SHIFT_MWDMA &&
3acaf94b
AC
3194 dev->dma_mode == XFER_MW_DMA_0 &&
3195 (dev->id[63] >> 8) & 1)
4055dee7 3196 ign_dev_err = 1;
3acaf94b 3197
4055dee7
TH
3198 /* if the device is actually configured correctly, ignore dev err */
3199 if (dev->xfer_mode == ata_xfer_mask2mode(ata_id_xfermask(dev->id)))
3200 ign_dev_err = 1;
1da177e4 3201
4055dee7
TH
3202 if (err_mask & AC_ERR_DEV) {
3203 if (!ign_dev_err)
3204 goto fail;
3205 else
3206 dev_err_whine = " (device error ignored)";
3207 }
48a8a14f 3208
23e71c3d
TH
3209 DPRINTK("xfer_shift=%u, xfer_mode=0x%x\n",
3210 dev->xfer_shift, (int)dev->xfer_mode);
1da177e4 3211
a9a79dfe
JP
3212 ata_dev_info(dev, "configured for %s%s\n",
3213 ata_mode_string(ata_xfer_mode2mask(dev->xfer_mode)),
3214 dev_err_whine);
4055dee7 3215
83206a29 3216 return 0;
4055dee7
TH
3217
3218 fail:
a9a79dfe 3219 ata_dev_err(dev, "failed to set xfermode (err_mask=0x%x)\n", err_mask);
4055dee7 3220 return -EIO;
1da177e4
LT
3221}
3222
1da177e4 3223/**
04351821 3224 * ata_do_set_mode - Program timings and issue SET FEATURES - XFER
0260731f 3225 * @link: link on which timings will be programmed
1967b7ff 3226 * @r_failed_dev: out parameter for failed device
1da177e4 3227 *
04351821
AC
3228 * Standard implementation of the function used to tune and set
3229 * ATA device disk transfer mode (PIO3, UDMA6, etc.). If
3230 * ata_dev_set_mode() fails, pointer to the failing device is
e82cbdb9 3231 * returned in @r_failed_dev.
780a87f7 3232 *
1da177e4 3233 * LOCKING:
0cba632b 3234 * PCI/etc. bus probe sem.
e82cbdb9
TH
3235 *
3236 * RETURNS:
3237 * 0 on success, negative errno otherwise
1da177e4 3238 */
04351821 3239
0260731f 3240int ata_do_set_mode(struct ata_link *link, struct ata_device **r_failed_dev)
1da177e4 3241{
0260731f 3242 struct ata_port *ap = link->ap;
e8e0619f 3243 struct ata_device *dev;
f58229f8 3244 int rc = 0, used_dma = 0, found = 0;
3adcebb2 3245
a6d5a51c 3246 /* step 1: calculate xfer_mask */
1eca4365 3247 ata_for_each_dev(dev, link, ENABLED) {
7dc951ae 3248 unsigned long pio_mask, dma_mask;
b3a70601 3249 unsigned int mode_mask;
a6d5a51c 3250
b3a70601
AC
3251 mode_mask = ATA_DMA_MASK_ATA;
3252 if (dev->class == ATA_DEV_ATAPI)
3253 mode_mask = ATA_DMA_MASK_ATAPI;
3254 else if (ata_id_is_cfa(dev->id))
3255 mode_mask = ATA_DMA_MASK_CFA;
3256
3373efd8 3257 ata_dev_xfermask(dev);
33267325 3258 ata_force_xfermask(dev);
1da177e4 3259
acf356b1 3260 pio_mask = ata_pack_xfermask(dev->pio_mask, 0, 0);
b3a70601
AC
3261
3262 if (libata_dma_mask & mode_mask)
80a9c430
SS
3263 dma_mask = ata_pack_xfermask(0, dev->mwdma_mask,
3264 dev->udma_mask);
b3a70601
AC
3265 else
3266 dma_mask = 0;
3267
acf356b1
TH
3268 dev->pio_mode = ata_xfer_mask2mode(pio_mask);
3269 dev->dma_mode = ata_xfer_mask2mode(dma_mask);
5444a6f4 3270
4f65977d 3271 found = 1;
b15b3eba 3272 if (ata_dma_enabled(dev))
5444a6f4 3273 used_dma = 1;
a6d5a51c 3274 }
4f65977d 3275 if (!found)
e82cbdb9 3276 goto out;
a6d5a51c
TH
3277
3278 /* step 2: always set host PIO timings */
1eca4365 3279 ata_for_each_dev(dev, link, ENABLED) {
70cd071e 3280 if (dev->pio_mode == 0xff) {
a9a79dfe 3281 ata_dev_warn(dev, "no PIO support\n");
e8e0619f 3282 rc = -EINVAL;
e82cbdb9 3283 goto out;
e8e0619f
TH
3284 }
3285
3286 dev->xfer_mode = dev->pio_mode;
3287 dev->xfer_shift = ATA_SHIFT_PIO;
3288 if (ap->ops->set_piomode)
3289 ap->ops->set_piomode(ap, dev);
3290 }
1da177e4 3291
a6d5a51c 3292 /* step 3: set host DMA timings */
1eca4365
TH
3293 ata_for_each_dev(dev, link, ENABLED) {
3294 if (!ata_dma_enabled(dev))
e8e0619f
TH
3295 continue;
3296
3297 dev->xfer_mode = dev->dma_mode;
3298 dev->xfer_shift = ata_xfer_mode2shift(dev->dma_mode);
3299 if (ap->ops->set_dmamode)
3300 ap->ops->set_dmamode(ap, dev);
3301 }
1da177e4
LT
3302
3303 /* step 4: update devices' xfer mode */
1eca4365 3304 ata_for_each_dev(dev, link, ENABLED) {
3373efd8 3305 rc = ata_dev_set_mode(dev);
5bbc53f4 3306 if (rc)
e82cbdb9 3307 goto out;
83206a29 3308 }
1da177e4 3309
e8e0619f
TH
3310 /* Record simplex status. If we selected DMA then the other
3311 * host channels are not permitted to do so.
5444a6f4 3312 */
cca3974e 3313 if (used_dma && (ap->host->flags & ATA_HOST_SIMPLEX))
032af1ce 3314 ap->host->simplex_claimed = ap;
5444a6f4 3315
e82cbdb9
TH
3316 out:
3317 if (rc)
3318 *r_failed_dev = dev;
3319 return rc;
1da177e4
LT
3320}
3321
aa2731ad
TH
3322/**
3323 * ata_wait_ready - wait for link to become ready
3324 * @link: link to be waited on
3325 * @deadline: deadline jiffies for the operation
3326 * @check_ready: callback to check link readiness
3327 *
3328 * Wait for @link to become ready. @check_ready should return
3329 * positive number if @link is ready, 0 if it isn't, -ENODEV if
3330 * link doesn't seem to be occupied, other errno for other error
3331 * conditions.
3332 *
3333 * Transient -ENODEV conditions are allowed for
3334 * ATA_TMOUT_FF_WAIT.
3335 *
3336 * LOCKING:
3337 * EH context.
3338 *
3339 * RETURNS:
3340 * 0 if @linke is ready before @deadline; otherwise, -errno.
3341 */
3342int ata_wait_ready(struct ata_link *link, unsigned long deadline,
3343 int (*check_ready)(struct ata_link *link))
3344{
3345 unsigned long start = jiffies;
b48d58f5 3346 unsigned long nodev_deadline;
aa2731ad
TH
3347 int warned = 0;
3348
b48d58f5
TH
3349 /* choose which 0xff timeout to use, read comment in libata.h */
3350 if (link->ap->host->flags & ATA_HOST_PARALLEL_SCAN)
3351 nodev_deadline = ata_deadline(start, ATA_TMOUT_FF_WAIT_LONG);
3352 else
3353 nodev_deadline = ata_deadline(start, ATA_TMOUT_FF_WAIT);
3354
b1c72916
TH
3355 /* Slave readiness can't be tested separately from master. On
3356 * M/S emulation configuration, this function should be called
3357 * only on the master and it will handle both master and slave.
3358 */
3359 WARN_ON(link == link->ap->slave_link);
3360
aa2731ad
TH
3361 if (time_after(nodev_deadline, deadline))
3362 nodev_deadline = deadline;
3363
3364 while (1) {
3365 unsigned long now = jiffies;
3366 int ready, tmp;
3367
3368 ready = tmp = check_ready(link);
3369 if (ready > 0)
3370 return 0;
3371
b48d58f5
TH
3372 /*
3373 * -ENODEV could be transient. Ignore -ENODEV if link
aa2731ad 3374 * is online. Also, some SATA devices take a long
b48d58f5
TH
3375 * time to clear 0xff after reset. Wait for
3376 * ATA_TMOUT_FF_WAIT[_LONG] on -ENODEV if link isn't
3377 * offline.
aa2731ad
TH
3378 *
3379 * Note that some PATA controllers (pata_ali) explode
3380 * if status register is read more than once when
3381 * there's no device attached.
3382 */
3383 if (ready == -ENODEV) {
3384 if (ata_link_online(link))
3385 ready = 0;
3386 else if ((link->ap->flags & ATA_FLAG_SATA) &&
3387 !ata_link_offline(link) &&
3388 time_before(now, nodev_deadline))
3389 ready = 0;
3390 }
3391
3392 if (ready)
3393 return ready;
3394 if (time_after(now, deadline))
3395 return -EBUSY;
3396
3397 if (!warned && time_after(now, start + 5 * HZ) &&
3398 (deadline - now > 3 * HZ)) {
a9a79dfe 3399 ata_link_warn(link,
aa2731ad
TH
3400 "link is slow to respond, please be patient "
3401 "(ready=%d)\n", tmp);
3402 warned = 1;
3403 }
3404
97750ceb 3405 ata_msleep(link->ap, 50);
aa2731ad
TH
3406 }
3407}
3408
3409/**
3410 * ata_wait_after_reset - wait for link to become ready after reset
3411 * @link: link to be waited on
3412 * @deadline: deadline jiffies for the operation
3413 * @check_ready: callback to check link readiness
3414 *
3415 * Wait for @link to become ready after reset.
3416 *
3417 * LOCKING:
3418 * EH context.
3419 *
3420 * RETURNS:
3421 * 0 if @linke is ready before @deadline; otherwise, -errno.
3422 */
2b4221bb 3423int ata_wait_after_reset(struct ata_link *link, unsigned long deadline,
aa2731ad
TH
3424 int (*check_ready)(struct ata_link *link))
3425{
97750ceb 3426 ata_msleep(link->ap, ATA_WAIT_AFTER_RESET);
aa2731ad
TH
3427
3428 return ata_wait_ready(link, deadline, check_ready);
3429}
3430
d7bb4cc7 3431/**
936fd732
TH
3432 * sata_link_debounce - debounce SATA phy status
3433 * @link: ATA link to debounce SATA phy status for
d7bb4cc7 3434 * @params: timing parameters { interval, duratinon, timeout } in msec
d4b2bab4 3435 * @deadline: deadline jiffies for the operation
d7bb4cc7 3436 *
1152b261 3437 * Make sure SStatus of @link reaches stable state, determined by
d7bb4cc7
TH
3438 * holding the same value where DET is not 1 for @duration polled
3439 * every @interval, before @timeout. Timeout constraints the
d4b2bab4
TH
3440 * beginning of the stable state. Because DET gets stuck at 1 on
3441 * some controllers after hot unplugging, this functions waits
d7bb4cc7
TH
3442 * until timeout then returns 0 if DET is stable at 1.
3443 *
d4b2bab4
TH
3444 * @timeout is further limited by @deadline. The sooner of the
3445 * two is used.
3446 *
d7bb4cc7
TH
3447 * LOCKING:
3448 * Kernel thread context (may sleep)
3449 *
3450 * RETURNS:
3451 * 0 on success, -errno on failure.
3452 */
936fd732
TH
3453int sata_link_debounce(struct ata_link *link, const unsigned long *params,
3454 unsigned long deadline)
7a7921e8 3455{
341c2c95
TH
3456 unsigned long interval = params[0];
3457 unsigned long duration = params[1];
d4b2bab4 3458 unsigned long last_jiffies, t;
d7bb4cc7
TH
3459 u32 last, cur;
3460 int rc;
3461
341c2c95 3462 t = ata_deadline(jiffies, params[2]);
d4b2bab4
TH
3463 if (time_before(t, deadline))
3464 deadline = t;
3465
936fd732 3466 if ((rc = sata_scr_read(link, SCR_STATUS, &cur)))
d7bb4cc7
TH
3467 return rc;
3468 cur &= 0xf;
3469
3470 last = cur;
3471 last_jiffies = jiffies;
3472
3473 while (1) {
97750ceb 3474 ata_msleep(link->ap, interval);
936fd732 3475 if ((rc = sata_scr_read(link, SCR_STATUS, &cur)))
d7bb4cc7
TH
3476 return rc;
3477 cur &= 0xf;
3478
3479 /* DET stable? */
3480 if (cur == last) {
d4b2bab4 3481 if (cur == 1 && time_before(jiffies, deadline))
d7bb4cc7 3482 continue;
341c2c95
TH
3483 if (time_after(jiffies,
3484 ata_deadline(last_jiffies, duration)))
d7bb4cc7
TH
3485 return 0;
3486 continue;
3487 }
3488
3489 /* unstable, start over */
3490 last = cur;
3491 last_jiffies = jiffies;
3492
f1545154
TH
3493 /* Check deadline. If debouncing failed, return
3494 * -EPIPE to tell upper layer to lower link speed.
3495 */
d4b2bab4 3496 if (time_after(jiffies, deadline))
f1545154 3497 return -EPIPE;
d7bb4cc7
TH
3498 }
3499}
3500
3501/**
936fd732
TH
3502 * sata_link_resume - resume SATA link
3503 * @link: ATA link to resume SATA
d7bb4cc7 3504 * @params: timing parameters { interval, duratinon, timeout } in msec
d4b2bab4 3505 * @deadline: deadline jiffies for the operation
d7bb4cc7 3506 *
936fd732 3507 * Resume SATA phy @link and debounce it.
d7bb4cc7
TH
3508 *
3509 * LOCKING:
3510 * Kernel thread context (may sleep)
3511 *
3512 * RETURNS:
3513 * 0 on success, -errno on failure.
3514 */
936fd732
TH
3515int sata_link_resume(struct ata_link *link, const unsigned long *params,
3516 unsigned long deadline)
d7bb4cc7 3517{
5040ab67 3518 int tries = ATA_LINK_RESUME_TRIES;
ac371987 3519 u32 scontrol, serror;
81952c54
TH
3520 int rc;
3521
936fd732 3522 if ((rc = sata_scr_read(link, SCR_CONTROL, &scontrol)))
81952c54 3523 return rc;
7a7921e8 3524
5040ab67
TH
3525 /*
3526 * Writes to SControl sometimes get ignored under certain
3527 * controllers (ata_piix SIDPR). Make sure DET actually is
3528 * cleared.
3529 */
3530 do {
3531 scontrol = (scontrol & 0x0f0) | 0x300;
3532 if ((rc = sata_scr_write(link, SCR_CONTROL, scontrol)))
3533 return rc;
3534 /*
3535 * Some PHYs react badly if SStatus is pounded
3536 * immediately after resuming. Delay 200ms before
3537 * debouncing.
3538 */
97750ceb 3539 ata_msleep(link->ap, 200);
81952c54 3540
5040ab67
TH
3541 /* is SControl restored correctly? */
3542 if ((rc = sata_scr_read(link, SCR_CONTROL, &scontrol)))
3543 return rc;
3544 } while ((scontrol & 0xf0f) != 0x300 && --tries);
7a7921e8 3545
5040ab67 3546 if ((scontrol & 0xf0f) != 0x300) {
38941c95 3547 ata_link_warn(link, "failed to resume link (SControl %X)\n",
a9a79dfe 3548 scontrol);
5040ab67
TH
3549 return 0;
3550 }
3551
3552 if (tries < ATA_LINK_RESUME_TRIES)
a9a79dfe
JP
3553 ata_link_warn(link, "link resume succeeded after %d retries\n",
3554 ATA_LINK_RESUME_TRIES - tries);
7a7921e8 3555
ac371987
TH
3556 if ((rc = sata_link_debounce(link, params, deadline)))
3557 return rc;
3558
f046519f 3559 /* clear SError, some PHYs require this even for SRST to work */
ac371987
TH
3560 if (!(rc = sata_scr_read(link, SCR_ERROR, &serror)))
3561 rc = sata_scr_write(link, SCR_ERROR, serror);
ac371987 3562
f046519f 3563 return rc != -EINVAL ? rc : 0;
7a7921e8
TH
3564}
3565
1152b261
TH
3566/**
3567 * sata_link_scr_lpm - manipulate SControl IPM and SPM fields
3568 * @link: ATA link to manipulate SControl for
3569 * @policy: LPM policy to configure
3570 * @spm_wakeup: initiate LPM transition to active state
3571 *
3572 * Manipulate the IPM field of the SControl register of @link
3573 * according to @policy. If @policy is ATA_LPM_MAX_POWER and
3574 * @spm_wakeup is %true, the SPM field is manipulated to wake up
3575 * the link. This function also clears PHYRDY_CHG before
3576 * returning.
3577 *
3578 * LOCKING:
3579 * EH context.
3580 *
3581 * RETURNS:
3582 * 0 on succes, -errno otherwise.
3583 */
3584int sata_link_scr_lpm(struct ata_link *link, enum ata_lpm_policy policy,
3585 bool spm_wakeup)
3586{
3587 struct ata_eh_context *ehc = &link->eh_context;
3588 bool woken_up = false;
3589 u32 scontrol;
3590 int rc;
3591
3592 rc = sata_scr_read(link, SCR_CONTROL, &scontrol);
3593 if (rc)
3594 return rc;
3595
3596 switch (policy) {
3597 case ATA_LPM_MAX_POWER:
3598 /* disable all LPM transitions */
3599 scontrol |= (0x3 << 8);
3600 /* initiate transition to active state */
3601 if (spm_wakeup) {
3602 scontrol |= (0x4 << 12);
3603 woken_up = true;
3604 }
3605 break;
3606 case ATA_LPM_MED_POWER:
3607 /* allow LPM to PARTIAL */
3608 scontrol &= ~(0x1 << 8);
3609 scontrol |= (0x2 << 8);
3610 break;
3611 case ATA_LPM_MIN_POWER:
8a745f1f
KCA
3612 if (ata_link_nr_enabled(link) > 0)
3613 /* no restrictions on LPM transitions */
3614 scontrol &= ~(0x3 << 8);
3615 else {
3616 /* empty port, power off */
3617 scontrol &= ~0xf;
3618 scontrol |= (0x1 << 2);
3619 }
1152b261
TH
3620 break;
3621 default:
3622 WARN_ON(1);
3623 }
3624
3625 rc = sata_scr_write(link, SCR_CONTROL, scontrol);
3626 if (rc)
3627 return rc;
3628
3629 /* give the link time to transit out of LPM state */
3630 if (woken_up)
3631 msleep(10);
3632
3633 /* clear PHYRDY_CHG from SError */
3634 ehc->i.serror &= ~SERR_PHYRDY_CHG;
3635 return sata_scr_write(link, SCR_ERROR, SERR_PHYRDY_CHG);
3636}
3637
f5914a46 3638/**
0aa1113d 3639 * ata_std_prereset - prepare for reset
cc0680a5 3640 * @link: ATA link to be reset
d4b2bab4 3641 * @deadline: deadline jiffies for the operation
f5914a46 3642 *
cc0680a5 3643 * @link is about to be reset. Initialize it. Failure from
b8cffc6a
TH
3644 * prereset makes libata abort whole reset sequence and give up
3645 * that port, so prereset should be best-effort. It does its
3646 * best to prepare for reset sequence but if things go wrong, it
3647 * should just whine, not fail.
f5914a46
TH
3648 *
3649 * LOCKING:
3650 * Kernel thread context (may sleep)
3651 *
3652 * RETURNS:
3653 * 0 on success, -errno otherwise.
3654 */
0aa1113d 3655int ata_std_prereset(struct ata_link *link, unsigned long deadline)
f5914a46 3656{
cc0680a5 3657 struct ata_port *ap = link->ap;
936fd732 3658 struct ata_eh_context *ehc = &link->eh_context;
e9c83914 3659 const unsigned long *timing = sata_ehc_deb_timing(ehc);
f5914a46
TH
3660 int rc;
3661
f5914a46
TH
3662 /* if we're about to do hardreset, nothing more to do */
3663 if (ehc->i.action & ATA_EH_HARDRESET)
3664 return 0;
3665
936fd732 3666 /* if SATA, resume link */
a16abc0b 3667 if (ap->flags & ATA_FLAG_SATA) {
936fd732 3668 rc = sata_link_resume(link, timing, deadline);
b8cffc6a
TH
3669 /* whine about phy resume failure but proceed */
3670 if (rc && rc != -EOPNOTSUPP)
a9a79dfe
JP
3671 ata_link_warn(link,
3672 "failed to resume link for reset (errno=%d)\n",
3673 rc);
f5914a46
TH
3674 }
3675
45db2f6c 3676 /* no point in trying softreset on offline link */
b1c72916 3677 if (ata_phys_link_offline(link))
45db2f6c
TH
3678 ehc->i.action &= ~ATA_EH_SOFTRESET;
3679
f5914a46
TH
3680 return 0;
3681}
3682
c2bd5804 3683/**
624d5c51
TH
3684 * sata_link_hardreset - reset link via SATA phy reset
3685 * @link: link to reset
3686 * @timing: timing parameters { interval, duratinon, timeout } in msec
d4b2bab4 3687 * @deadline: deadline jiffies for the operation
9dadd45b
TH
3688 * @online: optional out parameter indicating link onlineness
3689 * @check_ready: optional callback to check link readiness
c2bd5804 3690 *
624d5c51 3691 * SATA phy-reset @link using DET bits of SControl register.
9dadd45b
TH
3692 * After hardreset, link readiness is waited upon using
3693 * ata_wait_ready() if @check_ready is specified. LLDs are
3694 * allowed to not specify @check_ready and wait itself after this
3695 * function returns. Device classification is LLD's
3696 * responsibility.
3697 *
3698 * *@online is set to one iff reset succeeded and @link is online
3699 * after reset.
c2bd5804
TH
3700 *
3701 * LOCKING:
3702 * Kernel thread context (may sleep)
3703 *
3704 * RETURNS:
3705 * 0 on success, -errno otherwise.
3706 */
624d5c51 3707int sata_link_hardreset(struct ata_link *link, const unsigned long *timing,
9dadd45b
TH
3708 unsigned long deadline,
3709 bool *online, int (*check_ready)(struct ata_link *))
c2bd5804 3710{
624d5c51 3711 u32 scontrol;
81952c54 3712 int rc;
852ee16a 3713
c2bd5804
TH
3714 DPRINTK("ENTER\n");
3715
9dadd45b
TH
3716 if (online)
3717 *online = false;
3718
936fd732 3719 if (sata_set_spd_needed(link)) {
1c3fae4d
TH
3720 /* SATA spec says nothing about how to reconfigure
3721 * spd. To be on the safe side, turn off phy during
3722 * reconfiguration. This works for at least ICH7 AHCI
3723 * and Sil3124.
3724 */
936fd732 3725 if ((rc = sata_scr_read(link, SCR_CONTROL, &scontrol)))
b6103f6d 3726 goto out;
81952c54 3727
a34b6fc0 3728 scontrol = (scontrol & 0x0f0) | 0x304;
81952c54 3729
936fd732 3730 if ((rc = sata_scr_write(link, SCR_CONTROL, scontrol)))
b6103f6d 3731 goto out;
1c3fae4d 3732
936fd732 3733 sata_set_spd(link);
1c3fae4d
TH
3734 }
3735
3736 /* issue phy wake/reset */
936fd732 3737 if ((rc = sata_scr_read(link, SCR_CONTROL, &scontrol)))
b6103f6d 3738 goto out;
81952c54 3739
852ee16a 3740 scontrol = (scontrol & 0x0f0) | 0x301;
81952c54 3741
936fd732 3742 if ((rc = sata_scr_write_flush(link, SCR_CONTROL, scontrol)))
b6103f6d 3743 goto out;
c2bd5804 3744
1c3fae4d 3745 /* Couldn't find anything in SATA I/II specs, but AHCI-1.1
c2bd5804
TH
3746 * 10.4.2 says at least 1 ms.
3747 */
97750ceb 3748 ata_msleep(link->ap, 1);
c2bd5804 3749
936fd732
TH
3750 /* bring link back */
3751 rc = sata_link_resume(link, timing, deadline);
9dadd45b
TH
3752 if (rc)
3753 goto out;
3754 /* if link is offline nothing more to do */
b1c72916 3755 if (ata_phys_link_offline(link))
9dadd45b
TH
3756 goto out;
3757
3758 /* Link is online. From this point, -ENODEV too is an error. */
3759 if (online)
3760 *online = true;
3761
071f44b1 3762 if (sata_pmp_supported(link->ap) && ata_is_host_link(link)) {
9dadd45b
TH
3763 /* If PMP is supported, we have to do follow-up SRST.
3764 * Some PMPs don't send D2H Reg FIS after hardreset if
3765 * the first port is empty. Wait only for
3766 * ATA_TMOUT_PMP_SRST_WAIT.
3767 */
3768 if (check_ready) {
3769 unsigned long pmp_deadline;
3770
341c2c95
TH
3771 pmp_deadline = ata_deadline(jiffies,
3772 ATA_TMOUT_PMP_SRST_WAIT);
9dadd45b
TH
3773 if (time_after(pmp_deadline, deadline))
3774 pmp_deadline = deadline;
3775 ata_wait_ready(link, pmp_deadline, check_ready);
3776 }
3777 rc = -EAGAIN;
3778 goto out;
3779 }
3780
3781 rc = 0;
3782 if (check_ready)
3783 rc = ata_wait_ready(link, deadline, check_ready);
b6103f6d 3784 out:
0cbf0711
TH
3785 if (rc && rc != -EAGAIN) {
3786 /* online is set iff link is online && reset succeeded */
3787 if (online)
3788 *online = false;
a9a79dfe 3789 ata_link_err(link, "COMRESET failed (errno=%d)\n", rc);
0cbf0711 3790 }
b6103f6d
TH
3791 DPRINTK("EXIT, rc=%d\n", rc);
3792 return rc;
3793}
3794
57c9efdf
TH
3795/**
3796 * sata_std_hardreset - COMRESET w/o waiting or classification
3797 * @link: link to reset
3798 * @class: resulting class of attached device
3799 * @deadline: deadline jiffies for the operation
3800 *
3801 * Standard SATA COMRESET w/o waiting or classification.
3802 *
3803 * LOCKING:
3804 * Kernel thread context (may sleep)
3805 *
3806 * RETURNS:
3807 * 0 if link offline, -EAGAIN if link online, -errno on errors.
3808 */
3809int sata_std_hardreset(struct ata_link *link, unsigned int *class,
3810 unsigned long deadline)
3811{
3812 const unsigned long *timing = sata_ehc_deb_timing(&link->eh_context);
3813 bool online;
3814 int rc;
3815
3816 /* do hardreset */
3817 rc = sata_link_hardreset(link, timing, deadline, &online, NULL);
57c9efdf
TH
3818 return online ? -EAGAIN : rc;
3819}
3820
c2bd5804 3821/**
203c75b8 3822 * ata_std_postreset - standard postreset callback
cc0680a5 3823 * @link: the target ata_link
c2bd5804
TH
3824 * @classes: classes of attached devices
3825 *
3826 * This function is invoked after a successful reset. Note that
3827 * the device might have been reset more than once using
3828 * different reset methods before postreset is invoked.
c2bd5804 3829 *
c2bd5804
TH
3830 * LOCKING:
3831 * Kernel thread context (may sleep)
3832 */
203c75b8 3833void ata_std_postreset(struct ata_link *link, unsigned int *classes)
c2bd5804 3834{
f046519f
TH
3835 u32 serror;
3836
c2bd5804
TH
3837 DPRINTK("ENTER\n");
3838
f046519f
TH
3839 /* reset complete, clear SError */
3840 if (!sata_scr_read(link, SCR_ERROR, &serror))
3841 sata_scr_write(link, SCR_ERROR, serror);
3842
c2bd5804 3843 /* print link status */
936fd732 3844 sata_print_link_status(link);
c2bd5804 3845
c2bd5804
TH
3846 DPRINTK("EXIT\n");
3847}
3848
623a3128
TH
3849/**
3850 * ata_dev_same_device - Determine whether new ID matches configured device
623a3128
TH
3851 * @dev: device to compare against
3852 * @new_class: class of the new device
3853 * @new_id: IDENTIFY page of the new device
3854 *
3855 * Compare @new_class and @new_id against @dev and determine
3856 * whether @dev is the device indicated by @new_class and
3857 * @new_id.
3858 *
3859 * LOCKING:
3860 * None.
3861 *
3862 * RETURNS:
3863 * 1 if @dev matches @new_class and @new_id, 0 otherwise.
3864 */
3373efd8
TH
3865static int ata_dev_same_device(struct ata_device *dev, unsigned int new_class,
3866 const u16 *new_id)
623a3128
TH
3867{
3868 const u16 *old_id = dev->id;
a0cf733b
TH
3869 unsigned char model[2][ATA_ID_PROD_LEN + 1];
3870 unsigned char serial[2][ATA_ID_SERNO_LEN + 1];
623a3128
TH
3871
3872 if (dev->class != new_class) {
a9a79dfe
JP
3873 ata_dev_info(dev, "class mismatch %d != %d\n",
3874 dev->class, new_class);
623a3128
TH
3875 return 0;
3876 }
3877
a0cf733b
TH
3878 ata_id_c_string(old_id, model[0], ATA_ID_PROD, sizeof(model[0]));
3879 ata_id_c_string(new_id, model[1], ATA_ID_PROD, sizeof(model[1]));
3880 ata_id_c_string(old_id, serial[0], ATA_ID_SERNO, sizeof(serial[0]));
3881 ata_id_c_string(new_id, serial[1], ATA_ID_SERNO, sizeof(serial[1]));
623a3128
TH
3882
3883 if (strcmp(model[0], model[1])) {
a9a79dfe
JP
3884 ata_dev_info(dev, "model number mismatch '%s' != '%s'\n",
3885 model[0], model[1]);
623a3128
TH
3886 return 0;
3887 }
3888
3889 if (strcmp(serial[0], serial[1])) {
a9a79dfe
JP
3890 ata_dev_info(dev, "serial number mismatch '%s' != '%s'\n",
3891 serial[0], serial[1]);
623a3128
TH
3892 return 0;
3893 }
3894
623a3128
TH
3895 return 1;
3896}
3897
3898/**
fe30911b 3899 * ata_dev_reread_id - Re-read IDENTIFY data
3fae450c 3900 * @dev: target ATA device
bff04647 3901 * @readid_flags: read ID flags
623a3128
TH
3902 *
3903 * Re-read IDENTIFY page and make sure @dev is still attached to
3904 * the port.
3905 *
3906 * LOCKING:
3907 * Kernel thread context (may sleep)
3908 *
3909 * RETURNS:
3910 * 0 on success, negative errno otherwise
3911 */
fe30911b 3912int ata_dev_reread_id(struct ata_device *dev, unsigned int readid_flags)
623a3128 3913{
5eb45c02 3914 unsigned int class = dev->class;
9af5c9c9 3915 u16 *id = (void *)dev->link->ap->sector_buf;
623a3128
TH
3916 int rc;
3917
fe635c7e 3918 /* read ID data */
bff04647 3919 rc = ata_dev_read_id(dev, &class, readid_flags, id);
623a3128 3920 if (rc)
fe30911b 3921 return rc;
623a3128
TH
3922
3923 /* is the device still there? */
fe30911b
TH
3924 if (!ata_dev_same_device(dev, class, id))
3925 return -ENODEV;
623a3128 3926
fe635c7e 3927 memcpy(dev->id, id, sizeof(id[0]) * ATA_ID_WORDS);
fe30911b
TH
3928 return 0;
3929}
3930
3931/**
3932 * ata_dev_revalidate - Revalidate ATA device
3933 * @dev: device to revalidate
422c9daa 3934 * @new_class: new class code
fe30911b
TH
3935 * @readid_flags: read ID flags
3936 *
3937 * Re-read IDENTIFY page, make sure @dev is still attached to the
3938 * port and reconfigure it according to the new IDENTIFY page.
3939 *
3940 * LOCKING:
3941 * Kernel thread context (may sleep)
3942 *
3943 * RETURNS:
3944 * 0 on success, negative errno otherwise
3945 */
422c9daa
TH
3946int ata_dev_revalidate(struct ata_device *dev, unsigned int new_class,
3947 unsigned int readid_flags)
fe30911b 3948{
6ddcd3b0 3949 u64 n_sectors = dev->n_sectors;
5920dadf 3950 u64 n_native_sectors = dev->n_native_sectors;
fe30911b
TH
3951 int rc;
3952
3953 if (!ata_dev_enabled(dev))
3954 return -ENODEV;
3955
422c9daa
TH
3956 /* fail early if !ATA && !ATAPI to avoid issuing [P]IDENTIFY to PMP */
3957 if (ata_class_enabled(new_class) &&
f0d0613d
BP
3958 new_class != ATA_DEV_ATA &&
3959 new_class != ATA_DEV_ATAPI &&
3960 new_class != ATA_DEV_SEMB) {
a9a79dfe
JP
3961 ata_dev_info(dev, "class mismatch %u != %u\n",
3962 dev->class, new_class);
422c9daa
TH
3963 rc = -ENODEV;
3964 goto fail;
3965 }
3966
fe30911b
TH
3967 /* re-read ID */
3968 rc = ata_dev_reread_id(dev, readid_flags);
3969 if (rc)
3970 goto fail;
623a3128
TH
3971
3972 /* configure device according to the new ID */
efdaedc4 3973 rc = ata_dev_configure(dev);
6ddcd3b0
TH
3974 if (rc)
3975 goto fail;
3976
3977 /* verify n_sectors hasn't changed */
445d211b
TH
3978 if (dev->class != ATA_DEV_ATA || !n_sectors ||
3979 dev->n_sectors == n_sectors)
3980 return 0;
3981
3982 /* n_sectors has changed */
a9a79dfe
JP
3983 ata_dev_warn(dev, "n_sectors mismatch %llu != %llu\n",
3984 (unsigned long long)n_sectors,
3985 (unsigned long long)dev->n_sectors);
445d211b
TH
3986
3987 /*
3988 * Something could have caused HPA to be unlocked
3989 * involuntarily. If n_native_sectors hasn't changed and the
3990 * new size matches it, keep the device.
3991 */
3992 if (dev->n_native_sectors == n_native_sectors &&
3993 dev->n_sectors > n_sectors && dev->n_sectors == n_native_sectors) {
a9a79dfe
JP
3994 ata_dev_warn(dev,
3995 "new n_sectors matches native, probably "
3996 "late HPA unlock, n_sectors updated\n");
68939ce5 3997 /* use the larger n_sectors */
445d211b 3998 return 0;
6ddcd3b0
TH
3999 }
4000
445d211b
TH
4001 /*
4002 * Some BIOSes boot w/o HPA but resume w/ HPA locked. Try
4003 * unlocking HPA in those cases.
4004 *
4005 * https://bugzilla.kernel.org/show_bug.cgi?id=15396
4006 */
4007 if (dev->n_native_sectors == n_native_sectors &&
4008 dev->n_sectors < n_sectors && n_sectors == n_native_sectors &&
4009 !(dev->horkage & ATA_HORKAGE_BROKEN_HPA)) {
a9a79dfe
JP
4010 ata_dev_warn(dev,
4011 "old n_sectors matches native, probably "
4012 "late HPA lock, will try to unlock HPA\n");
445d211b
TH
4013 /* try unlocking HPA */
4014 dev->flags |= ATA_DFLAG_UNLOCK_HPA;
4015 rc = -EIO;
4016 } else
4017 rc = -ENODEV;
623a3128 4018
445d211b
TH
4019 /* restore original n_[native_]sectors and fail */
4020 dev->n_native_sectors = n_native_sectors;
4021 dev->n_sectors = n_sectors;
623a3128 4022 fail:
a9a79dfe 4023 ata_dev_err(dev, "revalidation failed (errno=%d)\n", rc);
623a3128
TH
4024 return rc;
4025}
4026
6919a0a6
AC
4027struct ata_blacklist_entry {
4028 const char *model_num;
4029 const char *model_rev;
4030 unsigned long horkage;
4031};
4032
4033static const struct ata_blacklist_entry ata_device_blacklist [] = {
4034 /* Devices with DMA related problems under Linux */
4035 { "WDC AC11000H", NULL, ATA_HORKAGE_NODMA },
4036 { "WDC AC22100H", NULL, ATA_HORKAGE_NODMA },
4037 { "WDC AC32500H", NULL, ATA_HORKAGE_NODMA },
4038 { "WDC AC33100H", NULL, ATA_HORKAGE_NODMA },
4039 { "WDC AC31600H", NULL, ATA_HORKAGE_NODMA },
4040 { "WDC AC32100H", "24.09P07", ATA_HORKAGE_NODMA },
4041 { "WDC AC23200L", "21.10N21", ATA_HORKAGE_NODMA },
4042 { "Compaq CRD-8241B", NULL, ATA_HORKAGE_NODMA },
4043 { "CRD-8400B", NULL, ATA_HORKAGE_NODMA },
7da4c935 4044 { "CRD-848[02]B", NULL, ATA_HORKAGE_NODMA },
6919a0a6
AC
4045 { "CRD-84", NULL, ATA_HORKAGE_NODMA },
4046 { "SanDisk SDP3B", NULL, ATA_HORKAGE_NODMA },
4047 { "SanDisk SDP3B-64", NULL, ATA_HORKAGE_NODMA },
4048 { "SANYO CD-ROM CRD", NULL, ATA_HORKAGE_NODMA },
4049 { "HITACHI CDR-8", NULL, ATA_HORKAGE_NODMA },
7da4c935 4050 { "HITACHI CDR-8[34]35",NULL, ATA_HORKAGE_NODMA },
6919a0a6
AC
4051 { "Toshiba CD-ROM XM-6202B", NULL, ATA_HORKAGE_NODMA },
4052 { "TOSHIBA CD-ROM XM-1702BC", NULL, ATA_HORKAGE_NODMA },
4053 { "CD-532E-A", NULL, ATA_HORKAGE_NODMA },
4054 { "E-IDE CD-ROM CR-840",NULL, ATA_HORKAGE_NODMA },
4055 { "CD-ROM Drive/F5A", NULL, ATA_HORKAGE_NODMA },
4056 { "WPI CDD-820", NULL, ATA_HORKAGE_NODMA },
4057 { "SAMSUNG CD-ROM SC-148C", NULL, ATA_HORKAGE_NODMA },
4058 { "SAMSUNG CD-ROM SC", NULL, ATA_HORKAGE_NODMA },
6919a0a6
AC
4059 { "ATAPI CD-ROM DRIVE 40X MAXIMUM",NULL,ATA_HORKAGE_NODMA },
4060 { "_NEC DV5800A", NULL, ATA_HORKAGE_NODMA },
2dcb407e 4061 { "SAMSUNG CD-ROM SN-124", "N001", ATA_HORKAGE_NODMA },
39f19886 4062 { "Seagate STT20000A", NULL, ATA_HORKAGE_NODMA },
d70e551c 4063 { "2GB ATA Flash Disk", "ADMA428M", ATA_HORKAGE_NODMA },
3af9a77a 4064 /* Odd clown on sil3726/4726 PMPs */
50af2fa1 4065 { "Config Disk", NULL, ATA_HORKAGE_DISABLE },
6919a0a6 4066
18d6e9d5 4067 /* Weird ATAPI devices */
40a1d531 4068 { "TORiSAN DVD-ROM DRD-N216", NULL, ATA_HORKAGE_MAX_SEC_128 },
6a87e42e 4069 { "QUANTUM DAT DAT72-000", NULL, ATA_HORKAGE_ATAPI_MOD16_DMA },
18d6e9d5 4070
6919a0a6
AC
4071 /* Devices we expect to fail diagnostics */
4072
4073 /* Devices where NCQ should be avoided */
4074 /* NCQ is slow */
2dcb407e 4075 { "WDC WD740ADFD-00", NULL, ATA_HORKAGE_NONCQ },
459ad688 4076 { "WDC WD740ADFD-00NLR1", NULL, ATA_HORKAGE_NONCQ, },
09125ea6
TH
4077 /* http://thread.gmane.org/gmane.linux.ide/14907 */
4078 { "FUJITSU MHT2060BH", NULL, ATA_HORKAGE_NONCQ },
7acfaf30 4079 /* NCQ is broken */
539cc7c7 4080 { "Maxtor *", "BANC*", ATA_HORKAGE_NONCQ },
0e3dbc01 4081 { "Maxtor 7V300F0", "VA111630", ATA_HORKAGE_NONCQ },
da6f0ec2 4082 { "ST380817AS", "3.42", ATA_HORKAGE_NONCQ },
e41bd3e8 4083 { "ST3160023AS", "3.42", ATA_HORKAGE_NONCQ },
5ccfca97 4084 { "OCZ CORE_SSD", "02.10104", ATA_HORKAGE_NONCQ },
539cc7c7 4085
ac70a964 4086 /* Seagate NCQ + FLUSH CACHE firmware bug */
4d1f9082 4087 { "ST31500341AS", "SD1[5-9]", ATA_HORKAGE_NONCQ |
ac70a964 4088 ATA_HORKAGE_FIRMWARE_WARN },
d10d491f 4089
4d1f9082 4090 { "ST31000333AS", "SD1[5-9]", ATA_HORKAGE_NONCQ |
d10d491f
TH
4091 ATA_HORKAGE_FIRMWARE_WARN },
4092
4d1f9082 4093 { "ST3640[36]23AS", "SD1[5-9]", ATA_HORKAGE_NONCQ |
d10d491f
TH
4094 ATA_HORKAGE_FIRMWARE_WARN },
4095
4d1f9082 4096 { "ST3320[68]13AS", "SD1[5-9]", ATA_HORKAGE_NONCQ |
ac70a964
TH
4097 ATA_HORKAGE_FIRMWARE_WARN },
4098
36e337d0
RH
4099 /* Blacklist entries taken from Silicon Image 3124/3132
4100 Windows driver .inf file - also several Linux problem reports */
4101 { "HTS541060G9SA00", "MB3OC60D", ATA_HORKAGE_NONCQ, },
4102 { "HTS541080G9SA00", "MB4OC60D", ATA_HORKAGE_NONCQ, },
4103 { "HTS541010G9SA00", "MBZOC60D", ATA_HORKAGE_NONCQ, },
6919a0a6 4104
68b0ddb2
TH
4105 /* https://bugzilla.kernel.org/show_bug.cgi?id=15573 */
4106 { "C300-CTFDDAC128MAG", "0001", ATA_HORKAGE_NONCQ, },
4107
16c55b03
TH
4108 /* devices which puke on READ_NATIVE_MAX */
4109 { "HDS724040KLSA80", "KFAOA20N", ATA_HORKAGE_BROKEN_HPA, },
4110 { "WDC WD3200JD-00KLB0", "WD-WCAMR1130137", ATA_HORKAGE_BROKEN_HPA },
4111 { "WDC WD2500JD-00HBB0", "WD-WMAL71490727", ATA_HORKAGE_BROKEN_HPA },
4112 { "MAXTOR 6L080L4", "A93.0500", ATA_HORKAGE_BROKEN_HPA },
6919a0a6 4113
7831387b
TH
4114 /* this one allows HPA unlocking but fails IOs on the area */
4115 { "OCZ-VERTEX", "1.30", ATA_HORKAGE_BROKEN_HPA },
4116
93328e11
AC
4117 /* Devices which report 1 sector over size HPA */
4118 { "ST340823A", NULL, ATA_HORKAGE_HPA_SIZE, },
4119 { "ST320413A", NULL, ATA_HORKAGE_HPA_SIZE, },
b152fcd3 4120 { "ST310211A", NULL, ATA_HORKAGE_HPA_SIZE, },
93328e11 4121
6bbfd53d
AC
4122 /* Devices which get the IVB wrong */
4123 { "QUANTUM FIREBALLlct10 05", "A03.0900", ATA_HORKAGE_IVB, },
a79067e5 4124 /* Maybe we should just blacklist TSSTcorp... */
7da4c935 4125 { "TSSTcorp CDDVDW SH-S202[HJN]", "SB0[01]", ATA_HORKAGE_IVB, },
6bbfd53d 4126
9ce8e307
JA
4127 /* Devices that do not need bridging limits applied */
4128 { "MTRON MSP-SATA*", NULL, ATA_HORKAGE_BRIDGE_OK, },
4129
9062712f
TH
4130 /* Devices which aren't very happy with higher link speeds */
4131 { "WD My Book", NULL, ATA_HORKAGE_1_5_GBPS, },
4132
d0cb43b3
TH
4133 /*
4134 * Devices which choke on SETXFER. Applies only if both the
4135 * device and controller are SATA.
4136 */
cd691876 4137 { "PIONEER DVD-RW DVRTD08", NULL, ATA_HORKAGE_NOSETXFER },
3a25179e
VL
4138 { "PIONEER DVD-RW DVRTD08A", NULL, ATA_HORKAGE_NOSETXFER },
4139 { "PIONEER DVD-RW DVR-215", NULL, ATA_HORKAGE_NOSETXFER },
cd691876
TH
4140 { "PIONEER DVD-RW DVR-212D", NULL, ATA_HORKAGE_NOSETXFER },
4141 { "PIONEER DVD-RW DVR-216D", NULL, ATA_HORKAGE_NOSETXFER },
d0cb43b3 4142
6919a0a6
AC
4143 /* End Marker */
4144 { }
1da177e4 4145};
2e9edbf8 4146
bce036ce
ML
4147/**
4148 * glob_match - match a text string against a glob-style pattern
4149 * @text: the string to be examined
4150 * @pattern: the glob-style pattern to be matched against
4151 *
4152 * Either/both of text and pattern can be empty strings.
4153 *
4154 * Match text against a glob-style pattern, with wildcards and simple sets:
4155 *
4156 * ? matches any single character.
4157 * * matches any run of characters.
4158 * [xyz] matches a single character from the set: x, y, or z.
2f9e4d16
ML
4159 * [a-d] matches a single character from the range: a, b, c, or d.
4160 * [a-d0-9] matches a single character from either range.
bce036ce 4161 *
2f9e4d16
ML
4162 * The special characters ?, [, -, or *, can be matched using a set, eg. [*]
4163 * Behaviour with malformed patterns is undefined, though generally reasonable.
bce036ce 4164 *
3d2be54b 4165 * Sample patterns: "SD1?", "SD1[0-5]", "*R0", "SD*1?[012]*xx"
bce036ce
ML
4166 *
4167 * This function uses one level of recursion per '*' in pattern.
4168 * Since it calls _nothing_ else, and has _no_ explicit local variables,
4169 * this will not cause stack problems for any reasonable use here.
4170 *
4171 * RETURNS:
4172 * 0 on match, 1 otherwise.
4173 */
4174static int glob_match (const char *text, const char *pattern)
539cc7c7 4175{
bce036ce
ML
4176 do {
4177 /* Match single character or a '?' wildcard */
4178 if (*text == *pattern || *pattern == '?') {
4179 if (!*pattern++)
4180 return 0; /* End of both strings: match */
4181 } else {
4182 /* Match single char against a '[' bracketed ']' pattern set */
4183 if (!*text || *pattern != '[')
4184 break; /* Not a pattern set */
2f9e4d16
ML
4185 while (*++pattern && *pattern != ']' && *text != *pattern) {
4186 if (*pattern == '-' && *(pattern - 1) != '[')
4187 if (*text > *(pattern - 1) && *text < *(pattern + 1)) {
4188 ++pattern;
4189 break;
4190 }
4191 }
bce036ce
ML
4192 if (!*pattern || *pattern == ']')
4193 return 1; /* No match */
4194 while (*pattern && *pattern++ != ']');
4195 }
4196 } while (*++text && *pattern);
4197
4198 /* Match any run of chars against a '*' wildcard */
4199 if (*pattern == '*') {
4200 if (!*++pattern)
4201 return 0; /* Match: avoid recursion at end of pattern */
4202 /* Loop to handle additional pattern chars after the wildcard */
4203 while (*text) {
4204 if (glob_match(text, pattern) == 0)
4205 return 0; /* Remainder matched */
4206 ++text; /* Absorb (match) this char and try again */
317b50b8
AP
4207 }
4208 }
bce036ce
ML
4209 if (!*text && !*pattern)
4210 return 0; /* End of both strings: match */
4211 return 1; /* No match */
539cc7c7 4212}
4fca377f 4213
75683fe7 4214static unsigned long ata_dev_blacklisted(const struct ata_device *dev)
1da177e4 4215{
8bfa79fc
TH
4216 unsigned char model_num[ATA_ID_PROD_LEN + 1];
4217 unsigned char model_rev[ATA_ID_FW_REV_LEN + 1];
6919a0a6 4218 const struct ata_blacklist_entry *ad = ata_device_blacklist;
3a778275 4219
8bfa79fc
TH
4220 ata_id_c_string(dev->id, model_num, ATA_ID_PROD, sizeof(model_num));
4221 ata_id_c_string(dev->id, model_rev, ATA_ID_FW_REV, sizeof(model_rev));
1da177e4 4222
6919a0a6 4223 while (ad->model_num) {
bce036ce 4224 if (!glob_match(model_num, ad->model_num)) {
6919a0a6
AC
4225 if (ad->model_rev == NULL)
4226 return ad->horkage;
bce036ce 4227 if (!glob_match(model_rev, ad->model_rev))
6919a0a6 4228 return ad->horkage;
f4b15fef 4229 }
6919a0a6 4230 ad++;
f4b15fef 4231 }
1da177e4
LT
4232 return 0;
4233}
4234
6919a0a6
AC
4235static int ata_dma_blacklisted(const struct ata_device *dev)
4236{
4237 /* We don't support polling DMA.
4238 * DMA blacklist those ATAPI devices with CDB-intr (and use PIO)
4239 * if the LLDD handles only interrupts in the HSM_ST_LAST state.
4240 */
9af5c9c9 4241 if ((dev->link->ap->flags & ATA_FLAG_PIO_POLLING) &&
6919a0a6
AC
4242 (dev->flags & ATA_DFLAG_CDB_INTR))
4243 return 1;
75683fe7 4244 return (dev->horkage & ATA_HORKAGE_NODMA) ? 1 : 0;
6919a0a6
AC
4245}
4246
6bbfd53d
AC
4247/**
4248 * ata_is_40wire - check drive side detection
4249 * @dev: device
4250 *
4251 * Perform drive side detection decoding, allowing for device vendors
4252 * who can't follow the documentation.
4253 */
4254
4255static int ata_is_40wire(struct ata_device *dev)
4256{
4257 if (dev->horkage & ATA_HORKAGE_IVB)
4258 return ata_drive_40wire_relaxed(dev->id);
4259 return ata_drive_40wire(dev->id);
4260}
4261
15a5551c
AC
4262/**
4263 * cable_is_40wire - 40/80/SATA decider
4264 * @ap: port to consider
4265 *
4266 * This function encapsulates the policy for speed management
4267 * in one place. At the moment we don't cache the result but
4268 * there is a good case for setting ap->cbl to the result when
4269 * we are called with unknown cables (and figuring out if it
4270 * impacts hotplug at all).
4271 *
4272 * Return 1 if the cable appears to be 40 wire.
4273 */
4274
4275static int cable_is_40wire(struct ata_port *ap)
4276{
4277 struct ata_link *link;
4278 struct ata_device *dev;
4279
4a9c7b33 4280 /* If the controller thinks we are 40 wire, we are. */
15a5551c
AC
4281 if (ap->cbl == ATA_CBL_PATA40)
4282 return 1;
4a9c7b33
TH
4283
4284 /* If the controller thinks we are 80 wire, we are. */
15a5551c
AC
4285 if (ap->cbl == ATA_CBL_PATA80 || ap->cbl == ATA_CBL_SATA)
4286 return 0;
4a9c7b33
TH
4287
4288 /* If the system is known to be 40 wire short cable (eg
4289 * laptop), then we allow 80 wire modes even if the drive
4290 * isn't sure.
4291 */
f792068e
AC
4292 if (ap->cbl == ATA_CBL_PATA40_SHORT)
4293 return 0;
4a9c7b33
TH
4294
4295 /* If the controller doesn't know, we scan.
4296 *
4297 * Note: We look for all 40 wire detects at this point. Any
4298 * 80 wire detect is taken to be 80 wire cable because
4299 * - in many setups only the one drive (slave if present) will
4300 * give a valid detect
4301 * - if you have a non detect capable drive you don't want it
4302 * to colour the choice
4303 */
1eca4365
TH
4304 ata_for_each_link(link, ap, EDGE) {
4305 ata_for_each_dev(dev, link, ENABLED) {
4306 if (!ata_is_40wire(dev))
15a5551c
AC
4307 return 0;
4308 }
4309 }
4310 return 1;
4311}
4312
a6d5a51c
TH
4313/**
4314 * ata_dev_xfermask - Compute supported xfermask of the given device
a6d5a51c
TH
4315 * @dev: Device to compute xfermask for
4316 *
acf356b1
TH
4317 * Compute supported xfermask of @dev and store it in
4318 * dev->*_mask. This function is responsible for applying all
4319 * known limits including host controller limits, device
4320 * blacklist, etc...
a6d5a51c
TH
4321 *
4322 * LOCKING:
4323 * None.
a6d5a51c 4324 */
3373efd8 4325static void ata_dev_xfermask(struct ata_device *dev)
1da177e4 4326{
9af5c9c9
TH
4327 struct ata_link *link = dev->link;
4328 struct ata_port *ap = link->ap;
cca3974e 4329 struct ata_host *host = ap->host;
a6d5a51c 4330 unsigned long xfer_mask;
1da177e4 4331
37deecb5 4332 /* controller modes available */
565083e1
TH
4333 xfer_mask = ata_pack_xfermask(ap->pio_mask,
4334 ap->mwdma_mask, ap->udma_mask);
4335
8343f889 4336 /* drive modes available */
37deecb5
TH
4337 xfer_mask &= ata_pack_xfermask(dev->pio_mask,
4338 dev->mwdma_mask, dev->udma_mask);
4339 xfer_mask &= ata_id_xfermask(dev->id);
565083e1 4340
b352e57d
AC
4341 /*
4342 * CFA Advanced TrueIDE timings are not allowed on a shared
4343 * cable
4344 */
4345 if (ata_dev_pair(dev)) {
4346 /* No PIO5 or PIO6 */
4347 xfer_mask &= ~(0x03 << (ATA_SHIFT_PIO + 5));
4348 /* No MWDMA3 or MWDMA 4 */
4349 xfer_mask &= ~(0x03 << (ATA_SHIFT_MWDMA + 3));
4350 }
4351
37deecb5
TH
4352 if (ata_dma_blacklisted(dev)) {
4353 xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA);
a9a79dfe
JP
4354 ata_dev_warn(dev,
4355 "device is on DMA blacklist, disabling DMA\n");
37deecb5 4356 }
a6d5a51c 4357
14d66ab7 4358 if ((host->flags & ATA_HOST_SIMPLEX) &&
2dcb407e 4359 host->simplex_claimed && host->simplex_claimed != ap) {
37deecb5 4360 xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA);
a9a79dfe
JP
4361 ata_dev_warn(dev,
4362 "simplex DMA is claimed by other device, disabling DMA\n");
5444a6f4 4363 }
565083e1 4364
e424675f
JG
4365 if (ap->flags & ATA_FLAG_NO_IORDY)
4366 xfer_mask &= ata_pio_mask_no_iordy(dev);
4367
5444a6f4 4368 if (ap->ops->mode_filter)
a76b62ca 4369 xfer_mask = ap->ops->mode_filter(dev, xfer_mask);
5444a6f4 4370
8343f889
RH
4371 /* Apply cable rule here. Don't apply it early because when
4372 * we handle hot plug the cable type can itself change.
4373 * Check this last so that we know if the transfer rate was
4374 * solely limited by the cable.
4375 * Unknown or 80 wire cables reported host side are checked
4376 * drive side as well. Cases where we know a 40wire cable
4377 * is used safely for 80 are not checked here.
4378 */
4379 if (xfer_mask & (0xF8 << ATA_SHIFT_UDMA))
4380 /* UDMA/44 or higher would be available */
15a5551c 4381 if (cable_is_40wire(ap)) {
a9a79dfe
JP
4382 ata_dev_warn(dev,
4383 "limited to UDMA/33 due to 40-wire cable\n");
8343f889
RH
4384 xfer_mask &= ~(0xF8 << ATA_SHIFT_UDMA);
4385 }
4386
565083e1
TH
4387 ata_unpack_xfermask(xfer_mask, &dev->pio_mask,
4388 &dev->mwdma_mask, &dev->udma_mask);
1da177e4
LT
4389}
4390
1da177e4
LT
4391/**
4392 * ata_dev_set_xfermode - Issue SET FEATURES - XFER MODE command
1da177e4
LT
4393 * @dev: Device to which command will be sent
4394 *
780a87f7
JG
4395 * Issue SET FEATURES - XFER MODE command to device @dev
4396 * on port @ap.
4397 *
1da177e4 4398 * LOCKING:
0cba632b 4399 * PCI/etc. bus probe sem.
83206a29
TH
4400 *
4401 * RETURNS:
4402 * 0 on success, AC_ERR_* mask otherwise.
1da177e4
LT
4403 */
4404
3373efd8 4405static unsigned int ata_dev_set_xfermode(struct ata_device *dev)
1da177e4 4406{
a0123703 4407 struct ata_taskfile tf;
83206a29 4408 unsigned int err_mask;
1da177e4
LT
4409
4410 /* set up set-features taskfile */
4411 DPRINTK("set features - xfer mode\n");
4412
464cf177
TH
4413 /* Some controllers and ATAPI devices show flaky interrupt
4414 * behavior after setting xfer mode. Use polling instead.
4415 */
3373efd8 4416 ata_tf_init(dev, &tf);
a0123703
TH
4417 tf.command = ATA_CMD_SET_FEATURES;
4418 tf.feature = SETFEATURES_XFER;
464cf177 4419 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE | ATA_TFLAG_POLLING;
a0123703 4420 tf.protocol = ATA_PROT_NODATA;
b9f8ab2d 4421 /* If we are using IORDY we must send the mode setting command */
11b7becc
JG
4422 if (ata_pio_need_iordy(dev))
4423 tf.nsect = dev->xfer_mode;
b9f8ab2d
AC
4424 /* If the device has IORDY and the controller does not - turn it off */
4425 else if (ata_id_has_iordy(dev->id))
11b7becc 4426 tf.nsect = 0x01;
b9f8ab2d
AC
4427 else /* In the ancient relic department - skip all of this */
4428 return 0;
1da177e4 4429
2b789108 4430 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0, 0);
9f45cbd3
KCA
4431
4432 DPRINTK("EXIT, err_mask=%x\n", err_mask);
4433 return err_mask;
4434}
1152b261 4435
9f45cbd3 4436/**
218f3d30 4437 * ata_dev_set_feature - Issue SET FEATURES - SATA FEATURES
9f45cbd3
KCA
4438 * @dev: Device to which command will be sent
4439 * @enable: Whether to enable or disable the feature
218f3d30 4440 * @feature: The sector count represents the feature to set
9f45cbd3
KCA
4441 *
4442 * Issue SET FEATURES - SATA FEATURES command to device @dev
218f3d30 4443 * on port @ap with sector count
9f45cbd3
KCA
4444 *
4445 * LOCKING:
4446 * PCI/etc. bus probe sem.
4447 *
4448 * RETURNS:
4449 * 0 on success, AC_ERR_* mask otherwise.
4450 */
1152b261 4451unsigned int ata_dev_set_feature(struct ata_device *dev, u8 enable, u8 feature)
9f45cbd3
KCA
4452{
4453 struct ata_taskfile tf;
4454 unsigned int err_mask;
4455
4456 /* set up set-features taskfile */
4457 DPRINTK("set features - SATA features\n");
4458
4459 ata_tf_init(dev, &tf);
4460 tf.command = ATA_CMD_SET_FEATURES;
4461 tf.feature = enable;
4462 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
4463 tf.protocol = ATA_PROT_NODATA;
218f3d30 4464 tf.nsect = feature;
9f45cbd3 4465
2b789108 4466 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0, 0);
1da177e4 4467
83206a29
TH
4468 DPRINTK("EXIT, err_mask=%x\n", err_mask);
4469 return err_mask;
1da177e4
LT
4470}
4471
8bf62ece
AL
4472/**
4473 * ata_dev_init_params - Issue INIT DEV PARAMS command
8bf62ece 4474 * @dev: Device to which command will be sent
e2a7f77a
RD
4475 * @heads: Number of heads (taskfile parameter)
4476 * @sectors: Number of sectors (taskfile parameter)
8bf62ece
AL
4477 *
4478 * LOCKING:
6aff8f1f
TH
4479 * Kernel thread context (may sleep)
4480 *
4481 * RETURNS:
4482 * 0 on success, AC_ERR_* mask otherwise.
8bf62ece 4483 */
3373efd8
TH
4484static unsigned int ata_dev_init_params(struct ata_device *dev,
4485 u16 heads, u16 sectors)
8bf62ece 4486{
a0123703 4487 struct ata_taskfile tf;
6aff8f1f 4488 unsigned int err_mask;
8bf62ece
AL
4489
4490 /* Number of sectors per track 1-255. Number of heads 1-16 */
4491 if (sectors < 1 || sectors > 255 || heads < 1 || heads > 16)
00b6f5e9 4492 return AC_ERR_INVALID;
8bf62ece
AL
4493
4494 /* set up init dev params taskfile */
4495 DPRINTK("init dev params \n");
4496
3373efd8 4497 ata_tf_init(dev, &tf);
a0123703
TH
4498 tf.command = ATA_CMD_INIT_DEV_PARAMS;
4499 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
4500 tf.protocol = ATA_PROT_NODATA;
4501 tf.nsect = sectors;
4502 tf.device |= (heads - 1) & 0x0f; /* max head = num. of heads - 1 */
8bf62ece 4503
2b789108 4504 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0, 0);
18b2466c
AC
4505 /* A clean abort indicates an original or just out of spec drive
4506 and we should continue as we issue the setup based on the
4507 drive reported working geometry */
4508 if (err_mask == AC_ERR_DEV && (tf.feature & ATA_ABORTED))
4509 err_mask = 0;
8bf62ece 4510
6aff8f1f
TH
4511 DPRINTK("EXIT, err_mask=%x\n", err_mask);
4512 return err_mask;
8bf62ece
AL
4513}
4514
1da177e4 4515/**
0cba632b
JG
4516 * ata_sg_clean - Unmap DMA memory associated with command
4517 * @qc: Command containing DMA memory to be released
4518 *
4519 * Unmap all mapped DMA memory associated with this command.
1da177e4
LT
4520 *
4521 * LOCKING:
cca3974e 4522 * spin_lock_irqsave(host lock)
1da177e4 4523 */
70e6ad0c 4524void ata_sg_clean(struct ata_queued_cmd *qc)
1da177e4
LT
4525{
4526 struct ata_port *ap = qc->ap;
ff2aeb1e 4527 struct scatterlist *sg = qc->sg;
1da177e4
LT
4528 int dir = qc->dma_dir;
4529
efcb3cf7 4530 WARN_ON_ONCE(sg == NULL);
1da177e4 4531
dde20207 4532 VPRINTK("unmapping %u sg elements\n", qc->n_elem);
1da177e4 4533
dde20207 4534 if (qc->n_elem)
5825627c 4535 dma_unmap_sg(ap->dev, sg, qc->orig_n_elem, dir);
1da177e4
LT
4536
4537 qc->flags &= ~ATA_QCFLAG_DMAMAP;
ff2aeb1e 4538 qc->sg = NULL;
1da177e4
LT
4539}
4540
1da177e4 4541/**
5895ef9a 4542 * atapi_check_dma - Check whether ATAPI DMA can be supported
1da177e4
LT
4543 * @qc: Metadata associated with taskfile to check
4544 *
780a87f7
JG
4545 * Allow low-level driver to filter ATA PACKET commands, returning
4546 * a status indicating whether or not it is OK to use DMA for the
4547 * supplied PACKET command.
4548 *
1da177e4 4549 * LOCKING:
624d5c51
TH
4550 * spin_lock_irqsave(host lock)
4551 *
4552 * RETURNS: 0 when ATAPI DMA can be used
4553 * nonzero otherwise
4554 */
5895ef9a 4555int atapi_check_dma(struct ata_queued_cmd *qc)
624d5c51
TH
4556{
4557 struct ata_port *ap = qc->ap;
71601958 4558
624d5c51
TH
4559 /* Don't allow DMA if it isn't multiple of 16 bytes. Quite a
4560 * few ATAPI devices choke on such DMA requests.
4561 */
6a87e42e
TH
4562 if (!(qc->dev->horkage & ATA_HORKAGE_ATAPI_MOD16_DMA) &&
4563 unlikely(qc->nbytes & 15))
624d5c51 4564 return 1;
e2cec771 4565
624d5c51
TH
4566 if (ap->ops->check_atapi_dma)
4567 return ap->ops->check_atapi_dma(qc);
e2cec771 4568
624d5c51
TH
4569 return 0;
4570}
1da177e4 4571
624d5c51
TH
4572/**
4573 * ata_std_qc_defer - Check whether a qc needs to be deferred
4574 * @qc: ATA command in question
4575 *
4576 * Non-NCQ commands cannot run with any other command, NCQ or
4577 * not. As upper layer only knows the queue depth, we are
4578 * responsible for maintaining exclusion. This function checks
4579 * whether a new command @qc can be issued.
4580 *
4581 * LOCKING:
4582 * spin_lock_irqsave(host lock)
4583 *
4584 * RETURNS:
4585 * ATA_DEFER_* if deferring is needed, 0 otherwise.
4586 */
4587int ata_std_qc_defer(struct ata_queued_cmd *qc)
4588{
4589 struct ata_link *link = qc->dev->link;
e2cec771 4590
624d5c51
TH
4591 if (qc->tf.protocol == ATA_PROT_NCQ) {
4592 if (!ata_tag_valid(link->active_tag))
4593 return 0;
4594 } else {
4595 if (!ata_tag_valid(link->active_tag) && !link->sactive)
4596 return 0;
4597 }
e2cec771 4598
624d5c51
TH
4599 return ATA_DEFER_LINK;
4600}
6912ccd5 4601
624d5c51 4602void ata_noop_qc_prep(struct ata_queued_cmd *qc) { }
1da177e4 4603
624d5c51
TH
4604/**
4605 * ata_sg_init - Associate command with scatter-gather table.
4606 * @qc: Command to be associated
4607 * @sg: Scatter-gather table.
4608 * @n_elem: Number of elements in s/g table.
4609 *
4610 * Initialize the data-related elements of queued_cmd @qc
4611 * to point to a scatter-gather table @sg, containing @n_elem
4612 * elements.
4613 *
4614 * LOCKING:
4615 * spin_lock_irqsave(host lock)
4616 */
4617void ata_sg_init(struct ata_queued_cmd *qc, struct scatterlist *sg,
4618 unsigned int n_elem)
4619{
4620 qc->sg = sg;
4621 qc->n_elem = n_elem;
4622 qc->cursg = qc->sg;
4623}
bb5cb290 4624
624d5c51
TH
4625/**
4626 * ata_sg_setup - DMA-map the scatter-gather table associated with a command.
4627 * @qc: Command with scatter-gather table to be mapped.
4628 *
4629 * DMA-map the scatter-gather table associated with queued_cmd @qc.
4630 *
4631 * LOCKING:
4632 * spin_lock_irqsave(host lock)
4633 *
4634 * RETURNS:
4635 * Zero on success, negative on error.
4636 *
4637 */
4638static int ata_sg_setup(struct ata_queued_cmd *qc)
4639{
4640 struct ata_port *ap = qc->ap;
4641 unsigned int n_elem;
1da177e4 4642
624d5c51 4643 VPRINTK("ENTER, ata%u\n", ap->print_id);
e2cec771 4644
624d5c51
TH
4645 n_elem = dma_map_sg(ap->dev, qc->sg, qc->n_elem, qc->dma_dir);
4646 if (n_elem < 1)
4647 return -1;
bb5cb290 4648
624d5c51 4649 DPRINTK("%d sg elements mapped\n", n_elem);
5825627c 4650 qc->orig_n_elem = qc->n_elem;
624d5c51
TH
4651 qc->n_elem = n_elem;
4652 qc->flags |= ATA_QCFLAG_DMAMAP;
1da177e4 4653
624d5c51 4654 return 0;
1da177e4
LT
4655}
4656
624d5c51
TH
4657/**
4658 * swap_buf_le16 - swap halves of 16-bit words in place
4659 * @buf: Buffer to swap
4660 * @buf_words: Number of 16-bit words in buffer.
4661 *
4662 * Swap halves of 16-bit words if needed to convert from
4663 * little-endian byte order to native cpu byte order, or
4664 * vice-versa.
4665 *
4666 * LOCKING:
4667 * Inherited from caller.
4668 */
4669void swap_buf_le16(u16 *buf, unsigned int buf_words)
8061f5f0 4670{
624d5c51
TH
4671#ifdef __BIG_ENDIAN
4672 unsigned int i;
8061f5f0 4673
624d5c51
TH
4674 for (i = 0; i < buf_words; i++)
4675 buf[i] = le16_to_cpu(buf[i]);
4676#endif /* __BIG_ENDIAN */
8061f5f0
TH
4677}
4678
8a8bc223
TH
4679/**
4680 * ata_qc_new - Request an available ATA command, for queueing
5eb66fe0 4681 * @ap: target port
8a8bc223
TH
4682 *
4683 * LOCKING:
4684 * None.
4685 */
4686
4687static struct ata_queued_cmd *ata_qc_new(struct ata_port *ap)
4688{
4689 struct ata_queued_cmd *qc = NULL;
4690 unsigned int i;
4691
4692 /* no command while frozen */
4693 if (unlikely(ap->pflags & ATA_PFLAG_FROZEN))
4694 return NULL;
4695
4696 /* the last tag is reserved for internal command. */
4697 for (i = 0; i < ATA_MAX_QUEUE - 1; i++)
4698 if (!test_and_set_bit(i, &ap->qc_allocated)) {
4699 qc = __ata_qc_from_tag(ap, i);
4700 break;
4701 }
4702
4703 if (qc)
4704 qc->tag = i;
4705
4706 return qc;
4707}
4708
1da177e4
LT
4709/**
4710 * ata_qc_new_init - Request an available ATA command, and initialize it
1da177e4
LT
4711 * @dev: Device from whom we request an available command structure
4712 *
4713 * LOCKING:
0cba632b 4714 * None.
1da177e4
LT
4715 */
4716
8a8bc223 4717struct ata_queued_cmd *ata_qc_new_init(struct ata_device *dev)
1da177e4 4718{
9af5c9c9 4719 struct ata_port *ap = dev->link->ap;
1da177e4
LT
4720 struct ata_queued_cmd *qc;
4721
8a8bc223 4722 qc = ata_qc_new(ap);
1da177e4 4723 if (qc) {
1da177e4
LT
4724 qc->scsicmd = NULL;
4725 qc->ap = ap;
4726 qc->dev = dev;
1da177e4 4727
2c13b7ce 4728 ata_qc_reinit(qc);
1da177e4
LT
4729 }
4730
4731 return qc;
4732}
4733
8a8bc223
TH
4734/**
4735 * ata_qc_free - free unused ata_queued_cmd
4736 * @qc: Command to complete
4737 *
4738 * Designed to free unused ata_queued_cmd object
4739 * in case something prevents using it.
4740 *
4741 * LOCKING:
4742 * spin_lock_irqsave(host lock)
4743 */
4744void ata_qc_free(struct ata_queued_cmd *qc)
4745{
a1104016 4746 struct ata_port *ap;
8a8bc223
TH
4747 unsigned int tag;
4748
efcb3cf7 4749 WARN_ON_ONCE(qc == NULL); /* ata_qc_from_tag _might_ return NULL */
a1104016 4750 ap = qc->ap;
8a8bc223
TH
4751
4752 qc->flags = 0;
4753 tag = qc->tag;
4754 if (likely(ata_tag_valid(tag))) {
4755 qc->tag = ATA_TAG_POISON;
4756 clear_bit(tag, &ap->qc_allocated);
4757 }
4758}
4759
76014427 4760void __ata_qc_complete(struct ata_queued_cmd *qc)
1da177e4 4761{
a1104016
JL
4762 struct ata_port *ap;
4763 struct ata_link *link;
dedaf2b0 4764
efcb3cf7
TH
4765 WARN_ON_ONCE(qc == NULL); /* ata_qc_from_tag _might_ return NULL */
4766 WARN_ON_ONCE(!(qc->flags & ATA_QCFLAG_ACTIVE));
a1104016
JL
4767 ap = qc->ap;
4768 link = qc->dev->link;
1da177e4
LT
4769
4770 if (likely(qc->flags & ATA_QCFLAG_DMAMAP))
4771 ata_sg_clean(qc);
4772
7401abf2 4773 /* command should be marked inactive atomically with qc completion */
da917d69 4774 if (qc->tf.protocol == ATA_PROT_NCQ) {
9af5c9c9 4775 link->sactive &= ~(1 << qc->tag);
da917d69
TH
4776 if (!link->sactive)
4777 ap->nr_active_links--;
4778 } else {
9af5c9c9 4779 link->active_tag = ATA_TAG_POISON;
da917d69
TH
4780 ap->nr_active_links--;
4781 }
4782
4783 /* clear exclusive status */
4784 if (unlikely(qc->flags & ATA_QCFLAG_CLEAR_EXCL &&
4785 ap->excl_link == link))
4786 ap->excl_link = NULL;
7401abf2 4787
3f3791d3
AL
4788 /* atapi: mark qc as inactive to prevent the interrupt handler
4789 * from completing the command twice later, before the error handler
4790 * is called. (when rc != 0 and atapi request sense is needed)
4791 */
4792 qc->flags &= ~ATA_QCFLAG_ACTIVE;
dedaf2b0 4793 ap->qc_active &= ~(1 << qc->tag);
3f3791d3 4794
1da177e4 4795 /* call completion callback */
77853bf2 4796 qc->complete_fn(qc);
1da177e4
LT
4797}
4798
39599a53
TH
4799static void fill_result_tf(struct ata_queued_cmd *qc)
4800{
4801 struct ata_port *ap = qc->ap;
4802
39599a53 4803 qc->result_tf.flags = qc->tf.flags;
22183bf5 4804 ap->ops->qc_fill_rtf(qc);
39599a53
TH
4805}
4806
00115e0f
TH
4807static void ata_verify_xfer(struct ata_queued_cmd *qc)
4808{
4809 struct ata_device *dev = qc->dev;
4810
00115e0f
TH
4811 if (ata_is_nodata(qc->tf.protocol))
4812 return;
4813
4814 if ((dev->mwdma_mask || dev->udma_mask) && ata_is_pio(qc->tf.protocol))
4815 return;
4816
4817 dev->flags &= ~ATA_DFLAG_DUBIOUS_XFER;
4818}
4819
f686bcb8
TH
4820/**
4821 * ata_qc_complete - Complete an active ATA command
4822 * @qc: Command to complete
f686bcb8 4823 *
1aadf5c3
TH
4824 * Indicate to the mid and upper layers that an ATA command has
4825 * completed, with either an ok or not-ok status.
4826 *
4827 * Refrain from calling this function multiple times when
4828 * successfully completing multiple NCQ commands.
4829 * ata_qc_complete_multiple() should be used instead, which will
4830 * properly update IRQ expect state.
f686bcb8
TH
4831 *
4832 * LOCKING:
cca3974e 4833 * spin_lock_irqsave(host lock)
f686bcb8
TH
4834 */
4835void ata_qc_complete(struct ata_queued_cmd *qc)
4836{
4837 struct ata_port *ap = qc->ap;
4838
4839 /* XXX: New EH and old EH use different mechanisms to
4840 * synchronize EH with regular execution path.
4841 *
4842 * In new EH, a failed qc is marked with ATA_QCFLAG_FAILED.
4843 * Normal execution path is responsible for not accessing a
4844 * failed qc. libata core enforces the rule by returning NULL
4845 * from ata_qc_from_tag() for failed qcs.
4846 *
4847 * Old EH depends on ata_qc_complete() nullifying completion
4848 * requests if ATA_QCFLAG_EH_SCHEDULED is set. Old EH does
4849 * not synchronize with interrupt handler. Only PIO task is
4850 * taken care of.
4851 */
4852 if (ap->ops->error_handler) {
4dbfa39b
TH
4853 struct ata_device *dev = qc->dev;
4854 struct ata_eh_info *ehi = &dev->link->eh_info;
4855
f686bcb8
TH
4856 if (unlikely(qc->err_mask))
4857 qc->flags |= ATA_QCFLAG_FAILED;
4858
f08dc1ac
TH
4859 /*
4860 * Finish internal commands without any further processing
4861 * and always with the result TF filled.
4862 */
4863 if (unlikely(ata_tag_internal(qc->tag))) {
f4b31db9 4864 fill_result_tf(qc);
f08dc1ac
TH
4865 __ata_qc_complete(qc);
4866 return;
4867 }
f4b31db9 4868
f08dc1ac
TH
4869 /*
4870 * Non-internal qc has failed. Fill the result TF and
4871 * summon EH.
4872 */
4873 if (unlikely(qc->flags & ATA_QCFLAG_FAILED)) {
4874 fill_result_tf(qc);
4875 ata_qc_schedule_eh(qc);
f4b31db9 4876 return;
f686bcb8
TH
4877 }
4878
4dc738ed
TH
4879 WARN_ON_ONCE(ap->pflags & ATA_PFLAG_FROZEN);
4880
f686bcb8
TH
4881 /* read result TF if requested */
4882 if (qc->flags & ATA_QCFLAG_RESULT_TF)
39599a53 4883 fill_result_tf(qc);
f686bcb8 4884
4dbfa39b
TH
4885 /* Some commands need post-processing after successful
4886 * completion.
4887 */
4888 switch (qc->tf.command) {
4889 case ATA_CMD_SET_FEATURES:
4890 if (qc->tf.feature != SETFEATURES_WC_ON &&
4891 qc->tf.feature != SETFEATURES_WC_OFF)
4892 break;
4893 /* fall through */
4894 case ATA_CMD_INIT_DEV_PARAMS: /* CHS translation changed */
4895 case ATA_CMD_SET_MULTI: /* multi_count changed */
4896 /* revalidate device */
4897 ehi->dev_action[dev->devno] |= ATA_EH_REVALIDATE;
4898 ata_port_schedule_eh(ap);
4899 break;
054a5fba
TH
4900
4901 case ATA_CMD_SLEEP:
4902 dev->flags |= ATA_DFLAG_SLEEPING;
4903 break;
4dbfa39b
TH
4904 }
4905
00115e0f
TH
4906 if (unlikely(dev->flags & ATA_DFLAG_DUBIOUS_XFER))
4907 ata_verify_xfer(qc);
4908
f686bcb8
TH
4909 __ata_qc_complete(qc);
4910 } else {
4911 if (qc->flags & ATA_QCFLAG_EH_SCHEDULED)
4912 return;
4913
4914 /* read result TF if failed or requested */
4915 if (qc->err_mask || qc->flags & ATA_QCFLAG_RESULT_TF)
39599a53 4916 fill_result_tf(qc);
f686bcb8
TH
4917
4918 __ata_qc_complete(qc);
4919 }
4920}
4921
dedaf2b0
TH
4922/**
4923 * ata_qc_complete_multiple - Complete multiple qcs successfully
4924 * @ap: port in question
4925 * @qc_active: new qc_active mask
dedaf2b0
TH
4926 *
4927 * Complete in-flight commands. This functions is meant to be
4928 * called from low-level driver's interrupt routine to complete
4929 * requests normally. ap->qc_active and @qc_active is compared
4930 * and commands are completed accordingly.
4931 *
1aadf5c3
TH
4932 * Always use this function when completing multiple NCQ commands
4933 * from IRQ handlers instead of calling ata_qc_complete()
4934 * multiple times to keep IRQ expect status properly in sync.
4935 *
dedaf2b0 4936 * LOCKING:
cca3974e 4937 * spin_lock_irqsave(host lock)
dedaf2b0
TH
4938 *
4939 * RETURNS:
4940 * Number of completed commands on success, -errno otherwise.
4941 */
79f97dad 4942int ata_qc_complete_multiple(struct ata_port *ap, u32 qc_active)
dedaf2b0
TH
4943{
4944 int nr_done = 0;
4945 u32 done_mask;
dedaf2b0
TH
4946
4947 done_mask = ap->qc_active ^ qc_active;
4948
4949 if (unlikely(done_mask & qc_active)) {
a9a79dfe
JP
4950 ata_port_err(ap, "illegal qc_active transition (%08x->%08x)\n",
4951 ap->qc_active, qc_active);
dedaf2b0
TH
4952 return -EINVAL;
4953 }
4954
43768180 4955 while (done_mask) {
dedaf2b0 4956 struct ata_queued_cmd *qc;
43768180 4957 unsigned int tag = __ffs(done_mask);
dedaf2b0 4958
43768180
JA
4959 qc = ata_qc_from_tag(ap, tag);
4960 if (qc) {
dedaf2b0
TH
4961 ata_qc_complete(qc);
4962 nr_done++;
4963 }
43768180 4964 done_mask &= ~(1 << tag);
dedaf2b0
TH
4965 }
4966
4967 return nr_done;
4968}
4969
1da177e4
LT
4970/**
4971 * ata_qc_issue - issue taskfile to device
4972 * @qc: command to issue to device
4973 *
4974 * Prepare an ATA command to submission to device.
4975 * This includes mapping the data into a DMA-able
4976 * area, filling in the S/G table, and finally
4977 * writing the taskfile to hardware, starting the command.
4978 *
4979 * LOCKING:
cca3974e 4980 * spin_lock_irqsave(host lock)
1da177e4 4981 */
8e0e694a 4982void ata_qc_issue(struct ata_queued_cmd *qc)
1da177e4
LT
4983{
4984 struct ata_port *ap = qc->ap;
9af5c9c9 4985 struct ata_link *link = qc->dev->link;
405e66b3 4986 u8 prot = qc->tf.protocol;
1da177e4 4987
dedaf2b0
TH
4988 /* Make sure only one non-NCQ command is outstanding. The
4989 * check is skipped for old EH because it reuses active qc to
4990 * request ATAPI sense.
4991 */
efcb3cf7 4992 WARN_ON_ONCE(ap->ops->error_handler && ata_tag_valid(link->active_tag));
dedaf2b0 4993
1973a023 4994 if (ata_is_ncq(prot)) {
efcb3cf7 4995 WARN_ON_ONCE(link->sactive & (1 << qc->tag));
da917d69
TH
4996
4997 if (!link->sactive)
4998 ap->nr_active_links++;
9af5c9c9 4999 link->sactive |= 1 << qc->tag;
dedaf2b0 5000 } else {
efcb3cf7 5001 WARN_ON_ONCE(link->sactive);
da917d69
TH
5002
5003 ap->nr_active_links++;
9af5c9c9 5004 link->active_tag = qc->tag;
dedaf2b0
TH
5005 }
5006
e4a70e76 5007 qc->flags |= ATA_QCFLAG_ACTIVE;
dedaf2b0 5008 ap->qc_active |= 1 << qc->tag;
e4a70e76 5009
60f5d6ef
TH
5010 /*
5011 * We guarantee to LLDs that they will have at least one
f92a2636
TH
5012 * non-zero sg if the command is a data command.
5013 */
60f5d6ef
TH
5014 if (WARN_ON_ONCE(ata_is_data(prot) &&
5015 (!qc->sg || !qc->n_elem || !qc->nbytes)))
5016 goto sys_err;
f92a2636 5017
405e66b3 5018 if (ata_is_dma(prot) || (ata_is_pio(prot) &&
f92a2636 5019 (ap->flags & ATA_FLAG_PIO_DMA)))
001102d7 5020 if (ata_sg_setup(qc))
60f5d6ef 5021 goto sys_err;
1da177e4 5022
cf480626 5023 /* if device is sleeping, schedule reset and abort the link */
054a5fba 5024 if (unlikely(qc->dev->flags & ATA_DFLAG_SLEEPING)) {
cf480626 5025 link->eh_info.action |= ATA_EH_RESET;
054a5fba
TH
5026 ata_ehi_push_desc(&link->eh_info, "waking up from sleep");
5027 ata_link_abort(link);
5028 return;
5029 }
5030
1da177e4
LT
5031 ap->ops->qc_prep(qc);
5032
8e0e694a
TH
5033 qc->err_mask |= ap->ops->qc_issue(qc);
5034 if (unlikely(qc->err_mask))
5035 goto err;
5036 return;
1da177e4 5037
60f5d6ef 5038sys_err:
8e0e694a
TH
5039 qc->err_mask |= AC_ERR_SYSTEM;
5040err:
5041 ata_qc_complete(qc);
1da177e4
LT
5042}
5043
34bf2170
TH
5044/**
5045 * sata_scr_valid - test whether SCRs are accessible
936fd732 5046 * @link: ATA link to test SCR accessibility for
34bf2170 5047 *
936fd732 5048 * Test whether SCRs are accessible for @link.
34bf2170
TH
5049 *
5050 * LOCKING:
5051 * None.
5052 *
5053 * RETURNS:
5054 * 1 if SCRs are accessible, 0 otherwise.
5055 */
936fd732 5056int sata_scr_valid(struct ata_link *link)
34bf2170 5057{
936fd732
TH
5058 struct ata_port *ap = link->ap;
5059
a16abc0b 5060 return (ap->flags & ATA_FLAG_SATA) && ap->ops->scr_read;
34bf2170
TH
5061}
5062
5063/**
5064 * sata_scr_read - read SCR register of the specified port
936fd732 5065 * @link: ATA link to read SCR for
34bf2170
TH
5066 * @reg: SCR to read
5067 * @val: Place to store read value
5068 *
936fd732 5069 * Read SCR register @reg of @link into *@val. This function is
633273a3
TH
5070 * guaranteed to succeed if @link is ap->link, the cable type of
5071 * the port is SATA and the port implements ->scr_read.
34bf2170
TH
5072 *
5073 * LOCKING:
633273a3 5074 * None if @link is ap->link. Kernel thread context otherwise.
34bf2170
TH
5075 *
5076 * RETURNS:
5077 * 0 on success, negative errno on failure.
5078 */
936fd732 5079int sata_scr_read(struct ata_link *link, int reg, u32 *val)
34bf2170 5080{
633273a3 5081 if (ata_is_host_link(link)) {
633273a3 5082 if (sata_scr_valid(link))
82ef04fb 5083 return link->ap->ops->scr_read(link, reg, val);
633273a3
TH
5084 return -EOPNOTSUPP;
5085 }
5086
5087 return sata_pmp_scr_read(link, reg, val);
34bf2170
TH
5088}
5089
5090/**
5091 * sata_scr_write - write SCR register of the specified port
936fd732 5092 * @link: ATA link to write SCR for
34bf2170
TH
5093 * @reg: SCR to write
5094 * @val: value to write
5095 *
936fd732 5096 * Write @val to SCR register @reg of @link. This function is
633273a3
TH
5097 * guaranteed to succeed if @link is ap->link, the cable type of
5098 * the port is SATA and the port implements ->scr_read.
34bf2170
TH
5099 *
5100 * LOCKING:
633273a3 5101 * None if @link is ap->link. Kernel thread context otherwise.
34bf2170
TH
5102 *
5103 * RETURNS:
5104 * 0 on success, negative errno on failure.
5105 */
936fd732 5106int sata_scr_write(struct ata_link *link, int reg, u32 val)
34bf2170 5107{
633273a3 5108 if (ata_is_host_link(link)) {
633273a3 5109 if (sata_scr_valid(link))
82ef04fb 5110 return link->ap->ops->scr_write(link, reg, val);
633273a3
TH
5111 return -EOPNOTSUPP;
5112 }
936fd732 5113
633273a3 5114 return sata_pmp_scr_write(link, reg, val);
34bf2170
TH
5115}
5116
5117/**
5118 * sata_scr_write_flush - write SCR register of the specified port and flush
936fd732 5119 * @link: ATA link to write SCR for
34bf2170
TH
5120 * @reg: SCR to write
5121 * @val: value to write
5122 *
5123 * This function is identical to sata_scr_write() except that this
5124 * function performs flush after writing to the register.
5125 *
5126 * LOCKING:
633273a3 5127 * None if @link is ap->link. Kernel thread context otherwise.
34bf2170
TH
5128 *
5129 * RETURNS:
5130 * 0 on success, negative errno on failure.
5131 */
936fd732 5132int sata_scr_write_flush(struct ata_link *link, int reg, u32 val)
34bf2170 5133{
633273a3 5134 if (ata_is_host_link(link)) {
633273a3 5135 int rc;
da3dbb17 5136
633273a3 5137 if (sata_scr_valid(link)) {
82ef04fb 5138 rc = link->ap->ops->scr_write(link, reg, val);
633273a3 5139 if (rc == 0)
82ef04fb 5140 rc = link->ap->ops->scr_read(link, reg, &val);
633273a3
TH
5141 return rc;
5142 }
5143 return -EOPNOTSUPP;
34bf2170 5144 }
633273a3
TH
5145
5146 return sata_pmp_scr_write(link, reg, val);
34bf2170
TH
5147}
5148
5149/**
b1c72916 5150 * ata_phys_link_online - test whether the given link is online
936fd732 5151 * @link: ATA link to test
34bf2170 5152 *
936fd732
TH
5153 * Test whether @link is online. Note that this function returns
5154 * 0 if online status of @link cannot be obtained, so
5155 * ata_link_online(link) != !ata_link_offline(link).
34bf2170
TH
5156 *
5157 * LOCKING:
5158 * None.
5159 *
5160 * RETURNS:
b5b3fa38 5161 * True if the port online status is available and online.
34bf2170 5162 */
b1c72916 5163bool ata_phys_link_online(struct ata_link *link)
34bf2170
TH
5164{
5165 u32 sstatus;
5166
936fd732 5167 if (sata_scr_read(link, SCR_STATUS, &sstatus) == 0 &&
9913ff8a 5168 ata_sstatus_online(sstatus))
b5b3fa38
TH
5169 return true;
5170 return false;
34bf2170
TH
5171}
5172
5173/**
b1c72916 5174 * ata_phys_link_offline - test whether the given link is offline
936fd732 5175 * @link: ATA link to test
34bf2170 5176 *
936fd732
TH
5177 * Test whether @link is offline. Note that this function
5178 * returns 0 if offline status of @link cannot be obtained, so
5179 * ata_link_online(link) != !ata_link_offline(link).
34bf2170
TH
5180 *
5181 * LOCKING:
5182 * None.
5183 *
5184 * RETURNS:
b5b3fa38 5185 * True if the port offline status is available and offline.
34bf2170 5186 */
b1c72916 5187bool ata_phys_link_offline(struct ata_link *link)
34bf2170
TH
5188{
5189 u32 sstatus;
5190
936fd732 5191 if (sata_scr_read(link, SCR_STATUS, &sstatus) == 0 &&
9913ff8a 5192 !ata_sstatus_online(sstatus))
b5b3fa38
TH
5193 return true;
5194 return false;
34bf2170 5195}
0baab86b 5196
b1c72916
TH
5197/**
5198 * ata_link_online - test whether the given link is online
5199 * @link: ATA link to test
5200 *
5201 * Test whether @link is online. This is identical to
5202 * ata_phys_link_online() when there's no slave link. When
5203 * there's a slave link, this function should only be called on
5204 * the master link and will return true if any of M/S links is
5205 * online.
5206 *
5207 * LOCKING:
5208 * None.
5209 *
5210 * RETURNS:
5211 * True if the port online status is available and online.
5212 */
5213bool ata_link_online(struct ata_link *link)
5214{
5215 struct ata_link *slave = link->ap->slave_link;
5216
5217 WARN_ON(link == slave); /* shouldn't be called on slave link */
5218
5219 return ata_phys_link_online(link) ||
5220 (slave && ata_phys_link_online(slave));
5221}
5222
5223/**
5224 * ata_link_offline - test whether the given link is offline
5225 * @link: ATA link to test
5226 *
5227 * Test whether @link is offline. This is identical to
5228 * ata_phys_link_offline() when there's no slave link. When
5229 * there's a slave link, this function should only be called on
5230 * the master link and will return true if both M/S links are
5231 * offline.
5232 *
5233 * LOCKING:
5234 * None.
5235 *
5236 * RETURNS:
5237 * True if the port offline status is available and offline.
5238 */
5239bool ata_link_offline(struct ata_link *link)
5240{
5241 struct ata_link *slave = link->ap->slave_link;
5242
5243 WARN_ON(link == slave); /* shouldn't be called on slave link */
5244
5245 return ata_phys_link_offline(link) &&
5246 (!slave || ata_phys_link_offline(slave));
5247}
5248
6ffa01d8 5249#ifdef CONFIG_PM
5ef41082 5250static int ata_port_request_pm(struct ata_port *ap, pm_message_t mesg,
cca3974e
JG
5251 unsigned int action, unsigned int ehi_flags,
5252 int wait)
500530f6 5253{
5ef41082 5254 struct ata_link *link;
500530f6 5255 unsigned long flags;
5ef41082 5256 int rc;
500530f6 5257
5ef41082
LM
5258 /* Previous resume operation might still be in
5259 * progress. Wait for PM_PENDING to clear.
5260 */
5261 if (ap->pflags & ATA_PFLAG_PM_PENDING) {
5262 ata_port_wait_eh(ap);
5263 WARN_ON(ap->pflags & ATA_PFLAG_PM_PENDING);
5264 }
500530f6 5265
5ef41082
LM
5266 /* request PM ops to EH */
5267 spin_lock_irqsave(ap->lock, flags);
500530f6 5268
5ef41082
LM
5269 ap->pm_mesg = mesg;
5270 if (wait) {
5271 rc = 0;
5272 ap->pm_result = &rc;
5273 }
500530f6 5274
5ef41082
LM
5275 ap->pflags |= ATA_PFLAG_PM_PENDING;
5276 ata_for_each_link(link, ap, HOST_FIRST) {
5277 link->eh_info.action |= action;
5278 link->eh_info.flags |= ehi_flags;
5279 }
500530f6 5280
5ef41082 5281 ata_port_schedule_eh(ap);
500530f6 5282
5ef41082 5283 spin_unlock_irqrestore(ap->lock, flags);
500530f6 5284
5ef41082
LM
5285 /* wait and check result */
5286 if (wait) {
5287 ata_port_wait_eh(ap);
5288 WARN_ON(ap->pflags & ATA_PFLAG_PM_PENDING);
500530f6
TH
5289 }
5290
5ef41082 5291 return rc;
500530f6
TH
5292}
5293
33574d68 5294static int ata_port_suspend_common(struct device *dev, pm_message_t mesg)
5ef41082
LM
5295{
5296 struct ata_port *ap = to_ata_port(dev);
33574d68 5297 unsigned int ehi_flags = ATA_EHI_QUIET;
5ef41082
LM
5298 int rc;
5299
33574d68
LM
5300 /*
5301 * On some hardware, device fails to respond after spun down
5302 * for suspend. As the device won't be used before being
5303 * resumed, we don't need to touch the device. Ask EH to skip
5304 * the usual stuff and proceed directly to suspend.
5305 *
5306 * http://thread.gmane.org/gmane.linux.ide/46764
5307 */
5308 if (mesg.event == PM_EVENT_SUSPEND)
5309 ehi_flags |= ATA_EHI_NO_AUTOPSY | ATA_EHI_NO_RECOVERY;
5310
5311 rc = ata_port_request_pm(ap, mesg, 0, ehi_flags, 1);
5ef41082
LM
5312 return rc;
5313}
5314
5315static int ata_port_suspend(struct device *dev)
5316{
5317 if (pm_runtime_suspended(dev))
5318 return 0;
5319
33574d68
LM
5320 return ata_port_suspend_common(dev, PMSG_SUSPEND);
5321}
5322
5323static int ata_port_do_freeze(struct device *dev)
5324{
5325 if (pm_runtime_suspended(dev))
5326 pm_runtime_resume(dev);
5327
5328 return ata_port_suspend_common(dev, PMSG_FREEZE);
5329}
5330
5331static int ata_port_poweroff(struct device *dev)
5332{
5333 if (pm_runtime_suspended(dev))
5334 return 0;
5335
5336 return ata_port_suspend_common(dev, PMSG_HIBERNATE);
5ef41082
LM
5337}
5338
e90b1e5a 5339static int ata_port_resume_common(struct device *dev)
5ef41082
LM
5340{
5341 struct ata_port *ap = to_ata_port(dev);
5342 int rc;
5343
5344 rc = ata_port_request_pm(ap, PMSG_ON, ATA_EH_RESET,
5345 ATA_EHI_NO_AUTOPSY | ATA_EHI_QUIET, 1);
5346 return rc;
5347}
5348
e90b1e5a
LM
5349static int ata_port_resume(struct device *dev)
5350{
5351 int rc;
5352
5353 rc = ata_port_resume_common(dev);
5354 if (!rc) {
5355 pm_runtime_disable(dev);
5356 pm_runtime_set_active(dev);
5357 pm_runtime_enable(dev);
5358 }
5359
5360 return rc;
5361}
5362
9ee4f393
LM
5363static int ata_port_runtime_idle(struct device *dev)
5364{
5365 return pm_runtime_suspend(dev);
5366}
5367
5ef41082
LM
5368static const struct dev_pm_ops ata_port_pm_ops = {
5369 .suspend = ata_port_suspend,
5370 .resume = ata_port_resume,
33574d68
LM
5371 .freeze = ata_port_do_freeze,
5372 .thaw = ata_port_resume,
5373 .poweroff = ata_port_poweroff,
5374 .restore = ata_port_resume,
9ee4f393 5375
33574d68 5376 .runtime_suspend = ata_port_suspend,
e90b1e5a 5377 .runtime_resume = ata_port_resume_common,
9ee4f393 5378 .runtime_idle = ata_port_runtime_idle,
5ef41082
LM
5379};
5380
500530f6 5381/**
cca3974e
JG
5382 * ata_host_suspend - suspend host
5383 * @host: host to suspend
500530f6
TH
5384 * @mesg: PM message
5385 *
5ef41082 5386 * Suspend @host. Actual operation is performed by port suspend.
500530f6 5387 */
cca3974e 5388int ata_host_suspend(struct ata_host *host, pm_message_t mesg)
500530f6 5389{
5ef41082
LM
5390 host->dev->power.power_state = mesg;
5391 return 0;
500530f6
TH
5392}
5393
5394/**
cca3974e
JG
5395 * ata_host_resume - resume host
5396 * @host: host to resume
500530f6 5397 *
5ef41082 5398 * Resume @host. Actual operation is performed by port resume.
500530f6 5399 */
cca3974e 5400void ata_host_resume(struct ata_host *host)
500530f6 5401{
72ad6ec4 5402 host->dev->power.power_state = PMSG_ON;
500530f6 5403}
6ffa01d8 5404#endif
500530f6 5405
5ef41082
LM
5406struct device_type ata_port_type = {
5407 .name = "ata_port",
5408#ifdef CONFIG_PM
5409 .pm = &ata_port_pm_ops,
5410#endif
5411};
5412
3ef3b43d
TH
5413/**
5414 * ata_dev_init - Initialize an ata_device structure
5415 * @dev: Device structure to initialize
5416 *
5417 * Initialize @dev in preparation for probing.
5418 *
5419 * LOCKING:
5420 * Inherited from caller.
5421 */
5422void ata_dev_init(struct ata_device *dev)
5423{
b1c72916 5424 struct ata_link *link = ata_dev_phys_link(dev);
9af5c9c9 5425 struct ata_port *ap = link->ap;
72fa4b74
TH
5426 unsigned long flags;
5427
b1c72916 5428 /* SATA spd limit is bound to the attached device, reset together */
9af5c9c9
TH
5429 link->sata_spd_limit = link->hw_sata_spd_limit;
5430 link->sata_spd = 0;
5a04bf4b 5431
72fa4b74
TH
5432 /* High bits of dev->flags are used to record warm plug
5433 * requests which occur asynchronously. Synchronize using
cca3974e 5434 * host lock.
72fa4b74 5435 */
ba6a1308 5436 spin_lock_irqsave(ap->lock, flags);
72fa4b74 5437 dev->flags &= ~ATA_DFLAG_INIT_MASK;
3dcc323f 5438 dev->horkage = 0;
ba6a1308 5439 spin_unlock_irqrestore(ap->lock, flags);
3ef3b43d 5440
99cf610a
TH
5441 memset((void *)dev + ATA_DEVICE_CLEAR_BEGIN, 0,
5442 ATA_DEVICE_CLEAR_END - ATA_DEVICE_CLEAR_BEGIN);
3ef3b43d
TH
5443 dev->pio_mask = UINT_MAX;
5444 dev->mwdma_mask = UINT_MAX;
5445 dev->udma_mask = UINT_MAX;
5446}
5447
4fb37a25
TH
5448/**
5449 * ata_link_init - Initialize an ata_link structure
5450 * @ap: ATA port link is attached to
5451 * @link: Link structure to initialize
8989805d 5452 * @pmp: Port multiplier port number
4fb37a25
TH
5453 *
5454 * Initialize @link.
5455 *
5456 * LOCKING:
5457 * Kernel thread context (may sleep)
5458 */
fb7fd614 5459void ata_link_init(struct ata_port *ap, struct ata_link *link, int pmp)
4fb37a25
TH
5460{
5461 int i;
5462
5463 /* clear everything except for devices */
d9027470
GG
5464 memset((void *)link + ATA_LINK_CLEAR_BEGIN, 0,
5465 ATA_LINK_CLEAR_END - ATA_LINK_CLEAR_BEGIN);
4fb37a25
TH
5466
5467 link->ap = ap;
8989805d 5468 link->pmp = pmp;
4fb37a25
TH
5469 link->active_tag = ATA_TAG_POISON;
5470 link->hw_sata_spd_limit = UINT_MAX;
5471
5472 /* can't use iterator, ap isn't initialized yet */
5473 for (i = 0; i < ATA_MAX_DEVICES; i++) {
5474 struct ata_device *dev = &link->device[i];
5475
5476 dev->link = link;
5477 dev->devno = dev - link->device;
110f66d2
TH
5478#ifdef CONFIG_ATA_ACPI
5479 dev->gtf_filter = ata_acpi_gtf_filter;
5480#endif
4fb37a25
TH
5481 ata_dev_init(dev);
5482 }
5483}
5484
5485/**
5486 * sata_link_init_spd - Initialize link->sata_spd_limit
5487 * @link: Link to configure sata_spd_limit for
5488 *
5489 * Initialize @link->[hw_]sata_spd_limit to the currently
5490 * configured value.
5491 *
5492 * LOCKING:
5493 * Kernel thread context (may sleep).
5494 *
5495 * RETURNS:
5496 * 0 on success, -errno on failure.
5497 */
fb7fd614 5498int sata_link_init_spd(struct ata_link *link)
4fb37a25 5499{
33267325 5500 u8 spd;
4fb37a25
TH
5501 int rc;
5502
d127ea7b 5503 rc = sata_scr_read(link, SCR_CONTROL, &link->saved_scontrol);
4fb37a25
TH
5504 if (rc)
5505 return rc;
5506
d127ea7b 5507 spd = (link->saved_scontrol >> 4) & 0xf;
4fb37a25
TH
5508 if (spd)
5509 link->hw_sata_spd_limit &= (1 << spd) - 1;
5510
05944bdf 5511 ata_force_link_limits(link);
33267325 5512
4fb37a25
TH
5513 link->sata_spd_limit = link->hw_sata_spd_limit;
5514
5515 return 0;
5516}
5517
1da177e4 5518/**
f3187195
TH
5519 * ata_port_alloc - allocate and initialize basic ATA port resources
5520 * @host: ATA host this allocated port belongs to
1da177e4 5521 *
f3187195
TH
5522 * Allocate and initialize basic ATA port resources.
5523 *
5524 * RETURNS:
5525 * Allocate ATA port on success, NULL on failure.
0cba632b 5526 *
1da177e4 5527 * LOCKING:
f3187195 5528 * Inherited from calling layer (may sleep).
1da177e4 5529 */
f3187195 5530struct ata_port *ata_port_alloc(struct ata_host *host)
1da177e4 5531{
f3187195 5532 struct ata_port *ap;
1da177e4 5533
f3187195
TH
5534 DPRINTK("ENTER\n");
5535
5536 ap = kzalloc(sizeof(*ap), GFP_KERNEL);
5537 if (!ap)
5538 return NULL;
4fca377f 5539
7b3a24c5 5540 ap->pflags |= ATA_PFLAG_INITIALIZING | ATA_PFLAG_FROZEN;
cca3974e 5541 ap->lock = &host->lock;
f3187195 5542 ap->print_id = -1;
cca3974e 5543 ap->host = host;
f3187195 5544 ap->dev = host->dev;
bd5d825c
BP
5545
5546#if defined(ATA_VERBOSE_DEBUG)
5547 /* turn on all debugging levels */
5548 ap->msg_enable = 0x00FF;
5549#elif defined(ATA_DEBUG)
5550 ap->msg_enable = ATA_MSG_DRV | ATA_MSG_INFO | ATA_MSG_CTL | ATA_MSG_WARN | ATA_MSG_ERR;
88574551 5551#else
0dd4b21f 5552 ap->msg_enable = ATA_MSG_DRV | ATA_MSG_ERR | ATA_MSG_WARN;
bd5d825c 5553#endif
1da177e4 5554
ad72cf98 5555 mutex_init(&ap->scsi_scan_mutex);
65f27f38
DH
5556 INIT_DELAYED_WORK(&ap->hotplug_task, ata_scsi_hotplug);
5557 INIT_WORK(&ap->scsi_rescan_task, ata_scsi_dev_rescan);
a72ec4ce 5558 INIT_LIST_HEAD(&ap->eh_done_q);
c6cf9e99 5559 init_waitqueue_head(&ap->eh_wait_q);
45fabbb7 5560 init_completion(&ap->park_req_pending);
5ddf24c5
TH
5561 init_timer_deferrable(&ap->fastdrain_timer);
5562 ap->fastdrain_timer.function = ata_eh_fastdrain_timerfn;
5563 ap->fastdrain_timer.data = (unsigned long)ap;
1da177e4 5564
838df628 5565 ap->cbl = ATA_CBL_NONE;
838df628 5566
8989805d 5567 ata_link_init(ap, &ap->link, 0);
1da177e4
LT
5568
5569#ifdef ATA_IRQ_TRAP
5570 ap->stats.unhandled_irq = 1;
5571 ap->stats.idle_irq = 1;
5572#endif
270390e1
TH
5573 ata_sff_port_init(ap);
5574
1da177e4 5575 return ap;
1da177e4
LT
5576}
5577
f0d36efd
TH
5578static void ata_host_release(struct device *gendev, void *res)
5579{
5580 struct ata_host *host = dev_get_drvdata(gendev);
5581 int i;
5582
1aa506e4
TH
5583 for (i = 0; i < host->n_ports; i++) {
5584 struct ata_port *ap = host->ports[i];
5585
4911487a
TH
5586 if (!ap)
5587 continue;
5588
5589 if (ap->scsi_host)
1aa506e4
TH
5590 scsi_host_put(ap->scsi_host);
5591
633273a3 5592 kfree(ap->pmp_link);
b1c72916 5593 kfree(ap->slave_link);
4911487a 5594 kfree(ap);
1aa506e4
TH
5595 host->ports[i] = NULL;
5596 }
5597
1aa56cca 5598 dev_set_drvdata(gendev, NULL);
f0d36efd
TH
5599}
5600
f3187195
TH
5601/**
5602 * ata_host_alloc - allocate and init basic ATA host resources
5603 * @dev: generic device this host is associated with
5604 * @max_ports: maximum number of ATA ports associated with this host
5605 *
5606 * Allocate and initialize basic ATA host resources. LLD calls
5607 * this function to allocate a host, initializes it fully and
5608 * attaches it using ata_host_register().
5609 *
5610 * @max_ports ports are allocated and host->n_ports is
5611 * initialized to @max_ports. The caller is allowed to decrease
5612 * host->n_ports before calling ata_host_register(). The unused
5613 * ports will be automatically freed on registration.
5614 *
5615 * RETURNS:
5616 * Allocate ATA host on success, NULL on failure.
5617 *
5618 * LOCKING:
5619 * Inherited from calling layer (may sleep).
5620 */
5621struct ata_host *ata_host_alloc(struct device *dev, int max_ports)
5622{
5623 struct ata_host *host;
5624 size_t sz;
5625 int i;
5626
5627 DPRINTK("ENTER\n");
5628
5629 if (!devres_open_group(dev, NULL, GFP_KERNEL))
5630 return NULL;
5631
5632 /* alloc a container for our list of ATA ports (buses) */
5633 sz = sizeof(struct ata_host) + (max_ports + 1) * sizeof(void *);
5634 /* alloc a container for our list of ATA ports (buses) */
5635 host = devres_alloc(ata_host_release, sz, GFP_KERNEL);
5636 if (!host)
5637 goto err_out;
5638
5639 devres_add(dev, host);
5640 dev_set_drvdata(dev, host);
5641
5642 spin_lock_init(&host->lock);
c0c362b6 5643 mutex_init(&host->eh_mutex);
f3187195
TH
5644 host->dev = dev;
5645 host->n_ports = max_ports;
5646
5647 /* allocate ports bound to this host */
5648 for (i = 0; i < max_ports; i++) {
5649 struct ata_port *ap;
5650
5651 ap = ata_port_alloc(host);
5652 if (!ap)
5653 goto err_out;
5654
5655 ap->port_no = i;
5656 host->ports[i] = ap;
5657 }
5658
5659 devres_remove_group(dev, NULL);
5660 return host;
5661
5662 err_out:
5663 devres_release_group(dev, NULL);
5664 return NULL;
5665}
5666
f5cda257
TH
5667/**
5668 * ata_host_alloc_pinfo - alloc host and init with port_info array
5669 * @dev: generic device this host is associated with
5670 * @ppi: array of ATA port_info to initialize host with
5671 * @n_ports: number of ATA ports attached to this host
5672 *
5673 * Allocate ATA host and initialize with info from @ppi. If NULL
5674 * terminated, @ppi may contain fewer entries than @n_ports. The
5675 * last entry will be used for the remaining ports.
5676 *
5677 * RETURNS:
5678 * Allocate ATA host on success, NULL on failure.
5679 *
5680 * LOCKING:
5681 * Inherited from calling layer (may sleep).
5682 */
5683struct ata_host *ata_host_alloc_pinfo(struct device *dev,
5684 const struct ata_port_info * const * ppi,
5685 int n_ports)
5686{
5687 const struct ata_port_info *pi;
5688 struct ata_host *host;
5689 int i, j;
5690
5691 host = ata_host_alloc(dev, n_ports);
5692 if (!host)
5693 return NULL;
5694
5695 for (i = 0, j = 0, pi = NULL; i < host->n_ports; i++) {
5696 struct ata_port *ap = host->ports[i];
5697
5698 if (ppi[j])
5699 pi = ppi[j++];
5700
5701 ap->pio_mask = pi->pio_mask;
5702 ap->mwdma_mask = pi->mwdma_mask;
5703 ap->udma_mask = pi->udma_mask;
5704 ap->flags |= pi->flags;
0c88758b 5705 ap->link.flags |= pi->link_flags;
f5cda257
TH
5706 ap->ops = pi->port_ops;
5707
5708 if (!host->ops && (pi->port_ops != &ata_dummy_port_ops))
5709 host->ops = pi->port_ops;
f5cda257
TH
5710 }
5711
5712 return host;
5713}
5714
b1c72916
TH
5715/**
5716 * ata_slave_link_init - initialize slave link
5717 * @ap: port to initialize slave link for
5718 *
5719 * Create and initialize slave link for @ap. This enables slave
5720 * link handling on the port.
5721 *
5722 * In libata, a port contains links and a link contains devices.
5723 * There is single host link but if a PMP is attached to it,
5724 * there can be multiple fan-out links. On SATA, there's usually
5725 * a single device connected to a link but PATA and SATA
5726 * controllers emulating TF based interface can have two - master
5727 * and slave.
5728 *
5729 * However, there are a few controllers which don't fit into this
5730 * abstraction too well - SATA controllers which emulate TF
5731 * interface with both master and slave devices but also have
5732 * separate SCR register sets for each device. These controllers
5733 * need separate links for physical link handling
5734 * (e.g. onlineness, link speed) but should be treated like a
5735 * traditional M/S controller for everything else (e.g. command
5736 * issue, softreset).
5737 *
5738 * slave_link is libata's way of handling this class of
5739 * controllers without impacting core layer too much. For
5740 * anything other than physical link handling, the default host
5741 * link is used for both master and slave. For physical link
5742 * handling, separate @ap->slave_link is used. All dirty details
5743 * are implemented inside libata core layer. From LLD's POV, the
5744 * only difference is that prereset, hardreset and postreset are
5745 * called once more for the slave link, so the reset sequence
5746 * looks like the following.
5747 *
5748 * prereset(M) -> prereset(S) -> hardreset(M) -> hardreset(S) ->
5749 * softreset(M) -> postreset(M) -> postreset(S)
5750 *
5751 * Note that softreset is called only for the master. Softreset
5752 * resets both M/S by definition, so SRST on master should handle
5753 * both (the standard method will work just fine).
5754 *
5755 * LOCKING:
5756 * Should be called before host is registered.
5757 *
5758 * RETURNS:
5759 * 0 on success, -errno on failure.
5760 */
5761int ata_slave_link_init(struct ata_port *ap)
5762{
5763 struct ata_link *link;
5764
5765 WARN_ON(ap->slave_link);
5766 WARN_ON(ap->flags & ATA_FLAG_PMP);
5767
5768 link = kzalloc(sizeof(*link), GFP_KERNEL);
5769 if (!link)
5770 return -ENOMEM;
5771
5772 ata_link_init(ap, link, 1);
5773 ap->slave_link = link;
5774 return 0;
5775}
5776
32ebbc0c
TH
5777static void ata_host_stop(struct device *gendev, void *res)
5778{
5779 struct ata_host *host = dev_get_drvdata(gendev);
5780 int i;
5781
5782 WARN_ON(!(host->flags & ATA_HOST_STARTED));
5783
5784 for (i = 0; i < host->n_ports; i++) {
5785 struct ata_port *ap = host->ports[i];
5786
5787 if (ap->ops->port_stop)
5788 ap->ops->port_stop(ap);
5789 }
5790
5791 if (host->ops->host_stop)
5792 host->ops->host_stop(host);
5793}
5794
029cfd6b
TH
5795/**
5796 * ata_finalize_port_ops - finalize ata_port_operations
5797 * @ops: ata_port_operations to finalize
5798 *
5799 * An ata_port_operations can inherit from another ops and that
5800 * ops can again inherit from another. This can go on as many
5801 * times as necessary as long as there is no loop in the
5802 * inheritance chain.
5803 *
5804 * Ops tables are finalized when the host is started. NULL or
5805 * unspecified entries are inherited from the closet ancestor
5806 * which has the method and the entry is populated with it.
5807 * After finalization, the ops table directly points to all the
5808 * methods and ->inherits is no longer necessary and cleared.
5809 *
5810 * Using ATA_OP_NULL, inheriting ops can force a method to NULL.
5811 *
5812 * LOCKING:
5813 * None.
5814 */
5815static void ata_finalize_port_ops(struct ata_port_operations *ops)
5816{
2da67659 5817 static DEFINE_SPINLOCK(lock);
029cfd6b
TH
5818 const struct ata_port_operations *cur;
5819 void **begin = (void **)ops;
5820 void **end = (void **)&ops->inherits;
5821 void **pp;
5822
5823 if (!ops || !ops->inherits)
5824 return;
5825
5826 spin_lock(&lock);
5827
5828 for (cur = ops->inherits; cur; cur = cur->inherits) {
5829 void **inherit = (void **)cur;
5830
5831 for (pp = begin; pp < end; pp++, inherit++)
5832 if (!*pp)
5833 *pp = *inherit;
5834 }
5835
5836 for (pp = begin; pp < end; pp++)
5837 if (IS_ERR(*pp))
5838 *pp = NULL;
5839
5840 ops->inherits = NULL;
5841
5842 spin_unlock(&lock);
5843}
5844
ecef7253
TH
5845/**
5846 * ata_host_start - start and freeze ports of an ATA host
5847 * @host: ATA host to start ports for
5848 *
5849 * Start and then freeze ports of @host. Started status is
5850 * recorded in host->flags, so this function can be called
5851 * multiple times. Ports are guaranteed to get started only
f3187195
TH
5852 * once. If host->ops isn't initialized yet, its set to the
5853 * first non-dummy port ops.
ecef7253
TH
5854 *
5855 * LOCKING:
5856 * Inherited from calling layer (may sleep).
5857 *
5858 * RETURNS:
5859 * 0 if all ports are started successfully, -errno otherwise.
5860 */
5861int ata_host_start(struct ata_host *host)
5862{
32ebbc0c
TH
5863 int have_stop = 0;
5864 void *start_dr = NULL;
ecef7253
TH
5865 int i, rc;
5866
5867 if (host->flags & ATA_HOST_STARTED)
5868 return 0;
5869
029cfd6b
TH
5870 ata_finalize_port_ops(host->ops);
5871
ecef7253
TH
5872 for (i = 0; i < host->n_ports; i++) {
5873 struct ata_port *ap = host->ports[i];
5874
029cfd6b
TH
5875 ata_finalize_port_ops(ap->ops);
5876
f3187195
TH
5877 if (!host->ops && !ata_port_is_dummy(ap))
5878 host->ops = ap->ops;
5879
32ebbc0c
TH
5880 if (ap->ops->port_stop)
5881 have_stop = 1;
5882 }
5883
5884 if (host->ops->host_stop)
5885 have_stop = 1;
5886
5887 if (have_stop) {
5888 start_dr = devres_alloc(ata_host_stop, 0, GFP_KERNEL);
5889 if (!start_dr)
5890 return -ENOMEM;
5891 }
5892
5893 for (i = 0; i < host->n_ports; i++) {
5894 struct ata_port *ap = host->ports[i];
5895
ecef7253
TH
5896 if (ap->ops->port_start) {
5897 rc = ap->ops->port_start(ap);
5898 if (rc) {
0f9fe9b7 5899 if (rc != -ENODEV)
a44fec1f
JP
5900 dev_err(host->dev,
5901 "failed to start port %d (errno=%d)\n",
5902 i, rc);
ecef7253
TH
5903 goto err_out;
5904 }
5905 }
ecef7253
TH
5906 ata_eh_freeze_port(ap);
5907 }
5908
32ebbc0c
TH
5909 if (start_dr)
5910 devres_add(host->dev, start_dr);
ecef7253
TH
5911 host->flags |= ATA_HOST_STARTED;
5912 return 0;
5913
5914 err_out:
5915 while (--i >= 0) {
5916 struct ata_port *ap = host->ports[i];
5917
5918 if (ap->ops->port_stop)
5919 ap->ops->port_stop(ap);
5920 }
32ebbc0c 5921 devres_free(start_dr);
ecef7253
TH
5922 return rc;
5923}
5924
b03732f0 5925/**
cca3974e
JG
5926 * ata_sas_host_init - Initialize a host struct
5927 * @host: host to initialize
5928 * @dev: device host is attached to
5929 * @flags: host flags
5930 * @ops: port_ops
b03732f0
BK
5931 *
5932 * LOCKING:
5933 * PCI/etc. bus probe sem.
5934 *
5935 */
f3187195 5936/* KILLME - the only user left is ipr */
cca3974e 5937void ata_host_init(struct ata_host *host, struct device *dev,
029cfd6b 5938 unsigned long flags, struct ata_port_operations *ops)
b03732f0 5939{
cca3974e 5940 spin_lock_init(&host->lock);
c0c362b6 5941 mutex_init(&host->eh_mutex);
cca3974e
JG
5942 host->dev = dev;
5943 host->flags = flags;
5944 host->ops = ops;
b03732f0
BK
5945}
5946
9508a66f 5947void __ata_port_probe(struct ata_port *ap)
79318057 5948{
9508a66f
DW
5949 struct ata_eh_info *ehi = &ap->link.eh_info;
5950 unsigned long flags;
886ad09f 5951
9508a66f
DW
5952 /* kick EH for boot probing */
5953 spin_lock_irqsave(ap->lock, flags);
79318057 5954
9508a66f
DW
5955 ehi->probe_mask |= ATA_ALL_DEVICES;
5956 ehi->action |= ATA_EH_RESET;
5957 ehi->flags |= ATA_EHI_NO_AUTOPSY | ATA_EHI_QUIET;
79318057 5958
9508a66f
DW
5959 ap->pflags &= ~ATA_PFLAG_INITIALIZING;
5960 ap->pflags |= ATA_PFLAG_LOADING;
5961 ata_port_schedule_eh(ap);
79318057 5962
9508a66f
DW
5963 spin_unlock_irqrestore(ap->lock, flags);
5964}
79318057 5965
9508a66f
DW
5966int ata_port_probe(struct ata_port *ap)
5967{
5968 int rc = 0;
79318057 5969
9508a66f
DW
5970 if (ap->ops->error_handler) {
5971 __ata_port_probe(ap);
79318057
AV
5972 ata_port_wait_eh(ap);
5973 } else {
5974 DPRINTK("ata%u: bus probe begin\n", ap->print_id);
5975 rc = ata_bus_probe(ap);
5976 DPRINTK("ata%u: bus probe end\n", ap->print_id);
79318057 5977 }
238c9cf9
JB
5978 return rc;
5979}
5980
5981
5982static void async_port_probe(void *data, async_cookie_t cookie)
5983{
5984 struct ata_port *ap = data;
4fca377f 5985
238c9cf9
JB
5986 /*
5987 * If we're not allowed to scan this host in parallel,
5988 * we need to wait until all previous scans have completed
5989 * before going further.
5990 * Jeff Garzik says this is only within a controller, so we
5991 * don't need to wait for port 0, only for later ports.
5992 */
5993 if (!(ap->host->flags & ATA_HOST_PARALLEL_SCAN) && ap->port_no != 0)
5994 async_synchronize_cookie(cookie);
5995
5996 (void)ata_port_probe(ap);
f29d3b23
AV
5997
5998 /* in order to keep device order, we need to synchronize at this point */
5999 async_synchronize_cookie(cookie);
6000
6001 ata_scsi_scan_host(ap, 1);
79318057 6002}
238c9cf9 6003
f3187195
TH
6004/**
6005 * ata_host_register - register initialized ATA host
6006 * @host: ATA host to register
6007 * @sht: template for SCSI host
6008 *
6009 * Register initialized ATA host. @host is allocated using
6010 * ata_host_alloc() and fully initialized by LLD. This function
6011 * starts ports, registers @host with ATA and SCSI layers and
6012 * probe registered devices.
6013 *
6014 * LOCKING:
6015 * Inherited from calling layer (may sleep).
6016 *
6017 * RETURNS:
6018 * 0 on success, -errno otherwise.
6019 */
6020int ata_host_register(struct ata_host *host, struct scsi_host_template *sht)
6021{
6022 int i, rc;
6023
6024 /* host must have been started */
6025 if (!(host->flags & ATA_HOST_STARTED)) {
a44fec1f 6026 dev_err(host->dev, "BUG: trying to register unstarted host\n");
f3187195
TH
6027 WARN_ON(1);
6028 return -EINVAL;
6029 }
6030
6031 /* Blow away unused ports. This happens when LLD can't
6032 * determine the exact number of ports to allocate at
6033 * allocation time.
6034 */
6035 for (i = host->n_ports; host->ports[i]; i++)
6036 kfree(host->ports[i]);
6037
6038 /* give ports names and add SCSI hosts */
6039 for (i = 0; i < host->n_ports; i++)
85d6725b 6040 host->ports[i]->print_id = atomic_inc_return(&ata_print_id);
f3187195 6041
4fca377f 6042
d9027470
GG
6043 /* Create associated sysfs transport objects */
6044 for (i = 0; i < host->n_ports; i++) {
6045 rc = ata_tport_add(host->dev,host->ports[i]);
6046 if (rc) {
6047 goto err_tadd;
6048 }
6049 }
6050
f3187195
TH
6051 rc = ata_scsi_add_hosts(host, sht);
6052 if (rc)
d9027470 6053 goto err_tadd;
f3187195
TH
6054
6055 /* set cable, sata_spd_limit and report */
6056 for (i = 0; i < host->n_ports; i++) {
6057 struct ata_port *ap = host->ports[i];
f3187195
TH
6058 unsigned long xfer_mask;
6059
6060 /* set SATA cable type if still unset */
6061 if (ap->cbl == ATA_CBL_NONE && (ap->flags & ATA_FLAG_SATA))
6062 ap->cbl = ATA_CBL_SATA;
6063
6064 /* init sata_spd_limit to the current value */
4fb37a25 6065 sata_link_init_spd(&ap->link);
b1c72916
TH
6066 if (ap->slave_link)
6067 sata_link_init_spd(ap->slave_link);
f3187195 6068
cbcdd875 6069 /* print per-port info to dmesg */
f3187195
TH
6070 xfer_mask = ata_pack_xfermask(ap->pio_mask, ap->mwdma_mask,
6071 ap->udma_mask);
6072
abf6e8ed 6073 if (!ata_port_is_dummy(ap)) {
a9a79dfe
JP
6074 ata_port_info(ap, "%cATA max %s %s\n",
6075 (ap->flags & ATA_FLAG_SATA) ? 'S' : 'P',
6076 ata_mode_string(xfer_mask),
6077 ap->link.eh_info.desc);
abf6e8ed
TH
6078 ata_ehi_clear_desc(&ap->link.eh_info);
6079 } else
a9a79dfe 6080 ata_port_info(ap, "DUMMY\n");
f3187195
TH
6081 }
6082
f6005354 6083 /* perform each probe asynchronously */
f3187195
TH
6084 for (i = 0; i < host->n_ports; i++) {
6085 struct ata_port *ap = host->ports[i];
79318057 6086 async_schedule(async_port_probe, ap);
f3187195 6087 }
f3187195
TH
6088
6089 return 0;
d9027470
GG
6090
6091 err_tadd:
6092 while (--i >= 0) {
6093 ata_tport_delete(host->ports[i]);
6094 }
6095 return rc;
6096
f3187195
TH
6097}
6098
f5cda257
TH
6099/**
6100 * ata_host_activate - start host, request IRQ and register it
6101 * @host: target ATA host
6102 * @irq: IRQ to request
6103 * @irq_handler: irq_handler used when requesting IRQ
6104 * @irq_flags: irq_flags used when requesting IRQ
6105 * @sht: scsi_host_template to use when registering the host
6106 *
6107 * After allocating an ATA host and initializing it, most libata
6108 * LLDs perform three steps to activate the host - start host,
6109 * request IRQ and register it. This helper takes necessasry
6110 * arguments and performs the three steps in one go.
6111 *
3d46b2e2
PM
6112 * An invalid IRQ skips the IRQ registration and expects the host to
6113 * have set polling mode on the port. In this case, @irq_handler
6114 * should be NULL.
6115 *
f5cda257
TH
6116 * LOCKING:
6117 * Inherited from calling layer (may sleep).
6118 *
6119 * RETURNS:
6120 * 0 on success, -errno otherwise.
6121 */
6122int ata_host_activate(struct ata_host *host, int irq,
6123 irq_handler_t irq_handler, unsigned long irq_flags,
6124 struct scsi_host_template *sht)
6125{
cbcdd875 6126 int i, rc;
f5cda257
TH
6127
6128 rc = ata_host_start(host);
6129 if (rc)
6130 return rc;
6131
3d46b2e2
PM
6132 /* Special case for polling mode */
6133 if (!irq) {
6134 WARN_ON(irq_handler);
6135 return ata_host_register(host, sht);
6136 }
6137
f5cda257
TH
6138 rc = devm_request_irq(host->dev, irq, irq_handler, irq_flags,
6139 dev_driver_string(host->dev), host);
6140 if (rc)
6141 return rc;
6142
cbcdd875
TH
6143 for (i = 0; i < host->n_ports; i++)
6144 ata_port_desc(host->ports[i], "irq %d", irq);
4031826b 6145
f5cda257
TH
6146 rc = ata_host_register(host, sht);
6147 /* if failed, just free the IRQ and leave ports alone */
6148 if (rc)
6149 devm_free_irq(host->dev, irq, host);
6150
6151 return rc;
6152}
6153
720ba126
TH
6154/**
6155 * ata_port_detach - Detach ATA port in prepration of device removal
6156 * @ap: ATA port to be detached
6157 *
6158 * Detach all ATA devices and the associated SCSI devices of @ap;
6159 * then, remove the associated SCSI host. @ap is guaranteed to
6160 * be quiescent on return from this function.
6161 *
6162 * LOCKING:
6163 * Kernel thread context (may sleep).
6164 */
741b7763 6165static void ata_port_detach(struct ata_port *ap)
720ba126
TH
6166{
6167 unsigned long flags;
720ba126
TH
6168
6169 if (!ap->ops->error_handler)
c3cf30a9 6170 goto skip_eh;
720ba126
TH
6171
6172 /* tell EH we're leaving & flush EH */
ba6a1308 6173 spin_lock_irqsave(ap->lock, flags);
b51e9e5d 6174 ap->pflags |= ATA_PFLAG_UNLOADING;
ece180d1 6175 ata_port_schedule_eh(ap);
ba6a1308 6176 spin_unlock_irqrestore(ap->lock, flags);
720ba126 6177
ece180d1 6178 /* wait till EH commits suicide */
720ba126
TH
6179 ata_port_wait_eh(ap);
6180
ece180d1
TH
6181 /* it better be dead now */
6182 WARN_ON(!(ap->pflags & ATA_PFLAG_UNLOADED));
720ba126 6183
afe2c511 6184 cancel_delayed_work_sync(&ap->hotplug_task);
720ba126 6185
c3cf30a9 6186 skip_eh:
d9027470
GG
6187 if (ap->pmp_link) {
6188 int i;
6189 for (i = 0; i < SATA_PMP_MAX_PORTS; i++)
6190 ata_tlink_delete(&ap->pmp_link[i]);
6191 }
6192 ata_tport_delete(ap);
6193
720ba126 6194 /* remove the associated SCSI host */
cca3974e 6195 scsi_remove_host(ap->scsi_host);
720ba126
TH
6196}
6197
0529c159
TH
6198/**
6199 * ata_host_detach - Detach all ports of an ATA host
6200 * @host: Host to detach
6201 *
6202 * Detach all ports of @host.
6203 *
6204 * LOCKING:
6205 * Kernel thread context (may sleep).
6206 */
6207void ata_host_detach(struct ata_host *host)
6208{
6209 int i;
6210
6211 for (i = 0; i < host->n_ports; i++)
6212 ata_port_detach(host->ports[i]);
562f0c2d
TH
6213
6214 /* the host is dead now, dissociate ACPI */
6215 ata_acpi_dissociate(host);
0529c159
TH
6216}
6217
374b1873
JG
6218#ifdef CONFIG_PCI
6219
1da177e4
LT
6220/**
6221 * ata_pci_remove_one - PCI layer callback for device removal
6222 * @pdev: PCI device that was removed
6223 *
b878ca5d
TH
6224 * PCI layer indicates to libata via this hook that hot-unplug or
6225 * module unload event has occurred. Detach all ports. Resource
6226 * release is handled via devres.
1da177e4
LT
6227 *
6228 * LOCKING:
6229 * Inherited from PCI layer (may sleep).
6230 */
f0d36efd 6231void ata_pci_remove_one(struct pci_dev *pdev)
1da177e4 6232{
2855568b 6233 struct device *dev = &pdev->dev;
cca3974e 6234 struct ata_host *host = dev_get_drvdata(dev);
1da177e4 6235
b878ca5d 6236 ata_host_detach(host);
1da177e4
LT
6237}
6238
6239/* move to PCI subsystem */
057ace5e 6240int pci_test_config_bits(struct pci_dev *pdev, const struct pci_bits *bits)
1da177e4
LT
6241{
6242 unsigned long tmp = 0;
6243
6244 switch (bits->width) {
6245 case 1: {
6246 u8 tmp8 = 0;
6247 pci_read_config_byte(pdev, bits->reg, &tmp8);
6248 tmp = tmp8;
6249 break;
6250 }
6251 case 2: {
6252 u16 tmp16 = 0;
6253 pci_read_config_word(pdev, bits->reg, &tmp16);
6254 tmp = tmp16;
6255 break;
6256 }
6257 case 4: {
6258 u32 tmp32 = 0;
6259 pci_read_config_dword(pdev, bits->reg, &tmp32);
6260 tmp = tmp32;
6261 break;
6262 }
6263
6264 default:
6265 return -EINVAL;
6266 }
6267
6268 tmp &= bits->mask;
6269
6270 return (tmp == bits->val) ? 1 : 0;
6271}
9b847548 6272
6ffa01d8 6273#ifdef CONFIG_PM
3c5100c1 6274void ata_pci_device_do_suspend(struct pci_dev *pdev, pm_message_t mesg)
9b847548
JA
6275{
6276 pci_save_state(pdev);
4c90d971 6277 pci_disable_device(pdev);
500530f6 6278
3a2d5b70 6279 if (mesg.event & PM_EVENT_SLEEP)
500530f6 6280 pci_set_power_state(pdev, PCI_D3hot);
9b847548
JA
6281}
6282
553c4aa6 6283int ata_pci_device_do_resume(struct pci_dev *pdev)
9b847548 6284{
553c4aa6
TH
6285 int rc;
6286
9b847548
JA
6287 pci_set_power_state(pdev, PCI_D0);
6288 pci_restore_state(pdev);
553c4aa6 6289
b878ca5d 6290 rc = pcim_enable_device(pdev);
553c4aa6 6291 if (rc) {
a44fec1f
JP
6292 dev_err(&pdev->dev,
6293 "failed to enable device after resume (%d)\n", rc);
553c4aa6
TH
6294 return rc;
6295 }
6296
9b847548 6297 pci_set_master(pdev);
553c4aa6 6298 return 0;
500530f6
TH
6299}
6300
3c5100c1 6301int ata_pci_device_suspend(struct pci_dev *pdev, pm_message_t mesg)
500530f6 6302{
cca3974e 6303 struct ata_host *host = dev_get_drvdata(&pdev->dev);
500530f6
TH
6304 int rc = 0;
6305
cca3974e 6306 rc = ata_host_suspend(host, mesg);
500530f6
TH
6307 if (rc)
6308 return rc;
6309
3c5100c1 6310 ata_pci_device_do_suspend(pdev, mesg);
500530f6
TH
6311
6312 return 0;
6313}
6314
6315int ata_pci_device_resume(struct pci_dev *pdev)
6316{
cca3974e 6317 struct ata_host *host = dev_get_drvdata(&pdev->dev);
553c4aa6 6318 int rc;
500530f6 6319
553c4aa6
TH
6320 rc = ata_pci_device_do_resume(pdev);
6321 if (rc == 0)
6322 ata_host_resume(host);
6323 return rc;
9b847548 6324}
6ffa01d8
TH
6325#endif /* CONFIG_PM */
6326
1da177e4
LT
6327#endif /* CONFIG_PCI */
6328
33267325
TH
6329static int __init ata_parse_force_one(char **cur,
6330 struct ata_force_ent *force_ent,
6331 const char **reason)
6332{
6333 /* FIXME: Currently, there's no way to tag init const data and
6334 * using __initdata causes build failure on some versions of
6335 * gcc. Once __initdataconst is implemented, add const to the
6336 * following structure.
6337 */
6338 static struct ata_force_param force_tbl[] __initdata = {
6339 { "40c", .cbl = ATA_CBL_PATA40 },
6340 { "80c", .cbl = ATA_CBL_PATA80 },
6341 { "short40c", .cbl = ATA_CBL_PATA40_SHORT },
6342 { "unk", .cbl = ATA_CBL_PATA_UNK },
6343 { "ign", .cbl = ATA_CBL_PATA_IGN },
6344 { "sata", .cbl = ATA_CBL_SATA },
6345 { "1.5Gbps", .spd_limit = 1 },
6346 { "3.0Gbps", .spd_limit = 2 },
6347 { "noncq", .horkage_on = ATA_HORKAGE_NONCQ },
6348 { "ncq", .horkage_off = ATA_HORKAGE_NONCQ },
43c9c591 6349 { "dump_id", .horkage_on = ATA_HORKAGE_DUMP_ID },
33267325
TH
6350 { "pio0", .xfer_mask = 1 << (ATA_SHIFT_PIO + 0) },
6351 { "pio1", .xfer_mask = 1 << (ATA_SHIFT_PIO + 1) },
6352 { "pio2", .xfer_mask = 1 << (ATA_SHIFT_PIO + 2) },
6353 { "pio3", .xfer_mask = 1 << (ATA_SHIFT_PIO + 3) },
6354 { "pio4", .xfer_mask = 1 << (ATA_SHIFT_PIO + 4) },
6355 { "pio5", .xfer_mask = 1 << (ATA_SHIFT_PIO + 5) },
6356 { "pio6", .xfer_mask = 1 << (ATA_SHIFT_PIO + 6) },
6357 { "mwdma0", .xfer_mask = 1 << (ATA_SHIFT_MWDMA + 0) },
6358 { "mwdma1", .xfer_mask = 1 << (ATA_SHIFT_MWDMA + 1) },
6359 { "mwdma2", .xfer_mask = 1 << (ATA_SHIFT_MWDMA + 2) },
6360 { "mwdma3", .xfer_mask = 1 << (ATA_SHIFT_MWDMA + 3) },
6361 { "mwdma4", .xfer_mask = 1 << (ATA_SHIFT_MWDMA + 4) },
6362 { "udma0", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 0) },
6363 { "udma16", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 0) },
6364 { "udma/16", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 0) },
6365 { "udma1", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 1) },
6366 { "udma25", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 1) },
6367 { "udma/25", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 1) },
6368 { "udma2", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 2) },
6369 { "udma33", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 2) },
6370 { "udma/33", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 2) },
6371 { "udma3", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 3) },
6372 { "udma44", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 3) },
6373 { "udma/44", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 3) },
6374 { "udma4", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 4) },
6375 { "udma66", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 4) },
6376 { "udma/66", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 4) },
6377 { "udma5", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 5) },
6378 { "udma100", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 5) },
6379 { "udma/100", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 5) },
6380 { "udma6", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 6) },
6381 { "udma133", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 6) },
6382 { "udma/133", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 6) },
6383 { "udma7", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 7) },
05944bdf
TH
6384 { "nohrst", .lflags = ATA_LFLAG_NO_HRST },
6385 { "nosrst", .lflags = ATA_LFLAG_NO_SRST },
6386 { "norst", .lflags = ATA_LFLAG_NO_HRST | ATA_LFLAG_NO_SRST },
33267325
TH
6387 };
6388 char *start = *cur, *p = *cur;
6389 char *id, *val, *endp;
6390 const struct ata_force_param *match_fp = NULL;
6391 int nr_matches = 0, i;
6392
6393 /* find where this param ends and update *cur */
6394 while (*p != '\0' && *p != ',')
6395 p++;
6396
6397 if (*p == '\0')
6398 *cur = p;
6399 else
6400 *cur = p + 1;
6401
6402 *p = '\0';
6403
6404 /* parse */
6405 p = strchr(start, ':');
6406 if (!p) {
6407 val = strstrip(start);
6408 goto parse_val;
6409 }
6410 *p = '\0';
6411
6412 id = strstrip(start);
6413 val = strstrip(p + 1);
6414
6415 /* parse id */
6416 p = strchr(id, '.');
6417 if (p) {
6418 *p++ = '\0';
6419 force_ent->device = simple_strtoul(p, &endp, 10);
6420 if (p == endp || *endp != '\0') {
6421 *reason = "invalid device";
6422 return -EINVAL;
6423 }
6424 }
6425
6426 force_ent->port = simple_strtoul(id, &endp, 10);
6427 if (p == endp || *endp != '\0') {
6428 *reason = "invalid port/link";
6429 return -EINVAL;
6430 }
6431
6432 parse_val:
6433 /* parse val, allow shortcuts so that both 1.5 and 1.5Gbps work */
6434 for (i = 0; i < ARRAY_SIZE(force_tbl); i++) {
6435 const struct ata_force_param *fp = &force_tbl[i];
6436
6437 if (strncasecmp(val, fp->name, strlen(val)))
6438 continue;
6439
6440 nr_matches++;
6441 match_fp = fp;
6442
6443 if (strcasecmp(val, fp->name) == 0) {
6444 nr_matches = 1;
6445 break;
6446 }
6447 }
6448
6449 if (!nr_matches) {
6450 *reason = "unknown value";
6451 return -EINVAL;
6452 }
6453 if (nr_matches > 1) {
6454 *reason = "ambigious value";
6455 return -EINVAL;
6456 }
6457
6458 force_ent->param = *match_fp;
6459
6460 return 0;
6461}
6462
6463static void __init ata_parse_force_param(void)
6464{
6465 int idx = 0, size = 1;
6466 int last_port = -1, last_device = -1;
6467 char *p, *cur, *next;
6468
6469 /* calculate maximum number of params and allocate force_tbl */
6470 for (p = ata_force_param_buf; *p; p++)
6471 if (*p == ',')
6472 size++;
6473
6474 ata_force_tbl = kzalloc(sizeof(ata_force_tbl[0]) * size, GFP_KERNEL);
6475 if (!ata_force_tbl) {
6476 printk(KERN_WARNING "ata: failed to extend force table, "
6477 "libata.force ignored\n");
6478 return;
6479 }
6480
6481 /* parse and populate the table */
6482 for (cur = ata_force_param_buf; *cur != '\0'; cur = next) {
6483 const char *reason = "";
6484 struct ata_force_ent te = { .port = -1, .device = -1 };
6485
6486 next = cur;
6487 if (ata_parse_force_one(&next, &te, &reason)) {
6488 printk(KERN_WARNING "ata: failed to parse force "
6489 "parameter \"%s\" (%s)\n",
6490 cur, reason);
6491 continue;
6492 }
6493
6494 if (te.port == -1) {
6495 te.port = last_port;
6496 te.device = last_device;
6497 }
6498
6499 ata_force_tbl[idx++] = te;
6500
6501 last_port = te.port;
6502 last_device = te.device;
6503 }
6504
6505 ata_force_tbl_size = idx;
6506}
1da177e4 6507
1da177e4
LT
6508static int __init ata_init(void)
6509{
d9027470 6510 int rc;
270390e1 6511
33267325
TH
6512 ata_parse_force_param();
6513
6b66d958
MG
6514 ata_acpi_register();
6515
270390e1 6516 rc = ata_sff_init();
ad72cf98
TH
6517 if (rc) {
6518 kfree(ata_force_tbl);
6519 return rc;
6520 }
453b07ac 6521
d9027470
GG
6522 libata_transport_init();
6523 ata_scsi_transport_template = ata_attach_transport();
6524 if (!ata_scsi_transport_template) {
6525 ata_sff_exit();
6526 rc = -ENOMEM;
6527 goto err_out;
4fca377f 6528 }
d9027470 6529
1da177e4
LT
6530 printk(KERN_DEBUG "libata version " DRV_VERSION " loaded.\n");
6531 return 0;
d9027470
GG
6532
6533err_out:
6534 return rc;
1da177e4
LT
6535}
6536
6537static void __exit ata_exit(void)
6538{
d9027470
GG
6539 ata_release_transport(ata_scsi_transport_template);
6540 libata_transport_exit();
270390e1 6541 ata_sff_exit();
6b66d958 6542 ata_acpi_unregister();
33267325 6543 kfree(ata_force_tbl);
1da177e4
LT
6544}
6545
a4625085 6546subsys_initcall(ata_init);
1da177e4
LT
6547module_exit(ata_exit);
6548
9990b6f3 6549static DEFINE_RATELIMIT_STATE(ratelimit, HZ / 5, 1);
67846b30
JG
6550
6551int ata_ratelimit(void)
6552{
9990b6f3 6553 return __ratelimit(&ratelimit);
67846b30
JG
6554}
6555
c0c362b6
TH
6556/**
6557 * ata_msleep - ATA EH owner aware msleep
6558 * @ap: ATA port to attribute the sleep to
6559 * @msecs: duration to sleep in milliseconds
6560 *
6561 * Sleeps @msecs. If the current task is owner of @ap's EH, the
6562 * ownership is released before going to sleep and reacquired
6563 * after the sleep is complete. IOW, other ports sharing the
6564 * @ap->host will be allowed to own the EH while this task is
6565 * sleeping.
6566 *
6567 * LOCKING:
6568 * Might sleep.
6569 */
97750ceb
TH
6570void ata_msleep(struct ata_port *ap, unsigned int msecs)
6571{
c0c362b6
TH
6572 bool owns_eh = ap && ap->host->eh_owner == current;
6573
6574 if (owns_eh)
6575 ata_eh_release(ap);
6576
97750ceb 6577 msleep(msecs);
c0c362b6
TH
6578
6579 if (owns_eh)
6580 ata_eh_acquire(ap);
97750ceb
TH
6581}
6582
c22daff4
TH
6583/**
6584 * ata_wait_register - wait until register value changes
97750ceb 6585 * @ap: ATA port to wait register for, can be NULL
c22daff4
TH
6586 * @reg: IO-mapped register
6587 * @mask: Mask to apply to read register value
6588 * @val: Wait condition
341c2c95
TH
6589 * @interval: polling interval in milliseconds
6590 * @timeout: timeout in milliseconds
c22daff4
TH
6591 *
6592 * Waiting for some bits of register to change is a common
6593 * operation for ATA controllers. This function reads 32bit LE
6594 * IO-mapped register @reg and tests for the following condition.
6595 *
6596 * (*@reg & mask) != val
6597 *
6598 * If the condition is met, it returns; otherwise, the process is
6599 * repeated after @interval_msec until timeout.
6600 *
6601 * LOCKING:
6602 * Kernel thread context (may sleep)
6603 *
6604 * RETURNS:
6605 * The final register value.
6606 */
97750ceb 6607u32 ata_wait_register(struct ata_port *ap, void __iomem *reg, u32 mask, u32 val,
341c2c95 6608 unsigned long interval, unsigned long timeout)
c22daff4 6609{
341c2c95 6610 unsigned long deadline;
c22daff4
TH
6611 u32 tmp;
6612
6613 tmp = ioread32(reg);
6614
6615 /* Calculate timeout _after_ the first read to make sure
6616 * preceding writes reach the controller before starting to
6617 * eat away the timeout.
6618 */
341c2c95 6619 deadline = ata_deadline(jiffies, timeout);
c22daff4 6620
341c2c95 6621 while ((tmp & mask) == val && time_before(jiffies, deadline)) {
97750ceb 6622 ata_msleep(ap, interval);
c22daff4
TH
6623 tmp = ioread32(reg);
6624 }
6625
6626 return tmp;
6627}
6628
dd5b06c4
TH
6629/*
6630 * Dummy port_ops
6631 */
182d7bba 6632static unsigned int ata_dummy_qc_issue(struct ata_queued_cmd *qc)
dd5b06c4 6633{
182d7bba 6634 return AC_ERR_SYSTEM;
dd5b06c4
TH
6635}
6636
182d7bba 6637static void ata_dummy_error_handler(struct ata_port *ap)
dd5b06c4 6638{
182d7bba 6639 /* truly dummy */
dd5b06c4
TH
6640}
6641
029cfd6b 6642struct ata_port_operations ata_dummy_port_ops = {
dd5b06c4
TH
6643 .qc_prep = ata_noop_qc_prep,
6644 .qc_issue = ata_dummy_qc_issue,
182d7bba 6645 .error_handler = ata_dummy_error_handler,
dd5b06c4
TH
6646};
6647
21b0ad4f
TH
6648const struct ata_port_info ata_dummy_port_info = {
6649 .port_ops = &ata_dummy_port_ops,
6650};
6651
a9a79dfe
JP
6652/*
6653 * Utility print functions
6654 */
6655int ata_port_printk(const struct ata_port *ap, const char *level,
6656 const char *fmt, ...)
6657{
6658 struct va_format vaf;
6659 va_list args;
6660 int r;
6661
6662 va_start(args, fmt);
6663
6664 vaf.fmt = fmt;
6665 vaf.va = &args;
6666
6667 r = printk("%sata%u: %pV", level, ap->print_id, &vaf);
6668
6669 va_end(args);
6670
6671 return r;
6672}
6673EXPORT_SYMBOL(ata_port_printk);
6674
6675int ata_link_printk(const struct ata_link *link, const char *level,
6676 const char *fmt, ...)
6677{
6678 struct va_format vaf;
6679 va_list args;
6680 int r;
6681
6682 va_start(args, fmt);
6683
6684 vaf.fmt = fmt;
6685 vaf.va = &args;
6686
6687 if (sata_pmp_attached(link->ap) || link->ap->slave_link)
6688 r = printk("%sata%u.%02u: %pV",
6689 level, link->ap->print_id, link->pmp, &vaf);
6690 else
6691 r = printk("%sata%u: %pV",
6692 level, link->ap->print_id, &vaf);
6693
6694 va_end(args);
6695
6696 return r;
6697}
6698EXPORT_SYMBOL(ata_link_printk);
6699
6700int ata_dev_printk(const struct ata_device *dev, const char *level,
6701 const char *fmt, ...)
6702{
6703 struct va_format vaf;
6704 va_list args;
6705 int r;
6706
6707 va_start(args, fmt);
6708
6709 vaf.fmt = fmt;
6710 vaf.va = &args;
6711
6712 r = printk("%sata%u.%02u: %pV",
6713 level, dev->link->ap->print_id, dev->link->pmp + dev->devno,
6714 &vaf);
6715
6716 va_end(args);
6717
6718 return r;
6719}
6720EXPORT_SYMBOL(ata_dev_printk);
6721
06296a1e
JP
6722void ata_print_version(const struct device *dev, const char *version)
6723{
6724 dev_printk(KERN_DEBUG, dev, "version %s\n", version);
6725}
6726EXPORT_SYMBOL(ata_print_version);
6727
1da177e4
LT
6728/*
6729 * libata is essentially a library of internal helper functions for
6730 * low-level ATA host controller drivers. As such, the API/ABI is
6731 * likely to change as new drivers are added and updated.
6732 * Do not depend on ABI/API stability.
6733 */
e9c83914
TH
6734EXPORT_SYMBOL_GPL(sata_deb_timing_normal);
6735EXPORT_SYMBOL_GPL(sata_deb_timing_hotplug);
6736EXPORT_SYMBOL_GPL(sata_deb_timing_long);
029cfd6b
TH
6737EXPORT_SYMBOL_GPL(ata_base_port_ops);
6738EXPORT_SYMBOL_GPL(sata_port_ops);
dd5b06c4 6739EXPORT_SYMBOL_GPL(ata_dummy_port_ops);
21b0ad4f 6740EXPORT_SYMBOL_GPL(ata_dummy_port_info);
1eca4365
TH
6741EXPORT_SYMBOL_GPL(ata_link_next);
6742EXPORT_SYMBOL_GPL(ata_dev_next);
1da177e4 6743EXPORT_SYMBOL_GPL(ata_std_bios_param);
d8d9129e 6744EXPORT_SYMBOL_GPL(ata_scsi_unlock_native_capacity);
cca3974e 6745EXPORT_SYMBOL_GPL(ata_host_init);
f3187195 6746EXPORT_SYMBOL_GPL(ata_host_alloc);
f5cda257 6747EXPORT_SYMBOL_GPL(ata_host_alloc_pinfo);
b1c72916 6748EXPORT_SYMBOL_GPL(ata_slave_link_init);
ecef7253 6749EXPORT_SYMBOL_GPL(ata_host_start);
f3187195 6750EXPORT_SYMBOL_GPL(ata_host_register);
f5cda257 6751EXPORT_SYMBOL_GPL(ata_host_activate);
0529c159 6752EXPORT_SYMBOL_GPL(ata_host_detach);
1da177e4 6753EXPORT_SYMBOL_GPL(ata_sg_init);
f686bcb8 6754EXPORT_SYMBOL_GPL(ata_qc_complete);
dedaf2b0 6755EXPORT_SYMBOL_GPL(ata_qc_complete_multiple);
436d34b3 6756EXPORT_SYMBOL_GPL(atapi_cmd_type);
1da177e4
LT
6757EXPORT_SYMBOL_GPL(ata_tf_to_fis);
6758EXPORT_SYMBOL_GPL(ata_tf_from_fis);
6357357c
TH
6759EXPORT_SYMBOL_GPL(ata_pack_xfermask);
6760EXPORT_SYMBOL_GPL(ata_unpack_xfermask);
6761EXPORT_SYMBOL_GPL(ata_xfer_mask2mode);
6762EXPORT_SYMBOL_GPL(ata_xfer_mode2mask);
6763EXPORT_SYMBOL_GPL(ata_xfer_mode2shift);
6764EXPORT_SYMBOL_GPL(ata_mode_string);
6765EXPORT_SYMBOL_GPL(ata_id_xfermask);
04351821 6766EXPORT_SYMBOL_GPL(ata_do_set_mode);
31cc23b3 6767EXPORT_SYMBOL_GPL(ata_std_qc_defer);
e46834cd 6768EXPORT_SYMBOL_GPL(ata_noop_qc_prep);
10305f0f 6769EXPORT_SYMBOL_GPL(ata_dev_disable);
3c567b7d 6770EXPORT_SYMBOL_GPL(sata_set_spd);
aa2731ad 6771EXPORT_SYMBOL_GPL(ata_wait_after_reset);
936fd732
TH
6772EXPORT_SYMBOL_GPL(sata_link_debounce);
6773EXPORT_SYMBOL_GPL(sata_link_resume);
1152b261 6774EXPORT_SYMBOL_GPL(sata_link_scr_lpm);
0aa1113d 6775EXPORT_SYMBOL_GPL(ata_std_prereset);
cc0680a5 6776EXPORT_SYMBOL_GPL(sata_link_hardreset);
57c9efdf 6777EXPORT_SYMBOL_GPL(sata_std_hardreset);
203c75b8 6778EXPORT_SYMBOL_GPL(ata_std_postreset);
2e9edbf8
JG
6779EXPORT_SYMBOL_GPL(ata_dev_classify);
6780EXPORT_SYMBOL_GPL(ata_dev_pair);
67846b30 6781EXPORT_SYMBOL_GPL(ata_ratelimit);
97750ceb 6782EXPORT_SYMBOL_GPL(ata_msleep);
c22daff4 6783EXPORT_SYMBOL_GPL(ata_wait_register);
1da177e4 6784EXPORT_SYMBOL_GPL(ata_scsi_queuecmd);
1da177e4 6785EXPORT_SYMBOL_GPL(ata_scsi_slave_config);
83c47bcb 6786EXPORT_SYMBOL_GPL(ata_scsi_slave_destroy);
a6e6ce8e 6787EXPORT_SYMBOL_GPL(ata_scsi_change_queue_depth);
f6e67035 6788EXPORT_SYMBOL_GPL(__ata_change_queue_depth);
34bf2170
TH
6789EXPORT_SYMBOL_GPL(sata_scr_valid);
6790EXPORT_SYMBOL_GPL(sata_scr_read);
6791EXPORT_SYMBOL_GPL(sata_scr_write);
6792EXPORT_SYMBOL_GPL(sata_scr_write_flush);
936fd732
TH
6793EXPORT_SYMBOL_GPL(ata_link_online);
6794EXPORT_SYMBOL_GPL(ata_link_offline);
6ffa01d8 6795#ifdef CONFIG_PM
cca3974e
JG
6796EXPORT_SYMBOL_GPL(ata_host_suspend);
6797EXPORT_SYMBOL_GPL(ata_host_resume);
6ffa01d8 6798#endif /* CONFIG_PM */
6a62a04d
TH
6799EXPORT_SYMBOL_GPL(ata_id_string);
6800EXPORT_SYMBOL_GPL(ata_id_c_string);
963e4975 6801EXPORT_SYMBOL_GPL(ata_do_dev_read_id);
1da177e4
LT
6802EXPORT_SYMBOL_GPL(ata_scsi_simulate);
6803
1bc4ccff 6804EXPORT_SYMBOL_GPL(ata_pio_need_iordy);
6357357c 6805EXPORT_SYMBOL_GPL(ata_timing_find_mode);
452503f9
AC
6806EXPORT_SYMBOL_GPL(ata_timing_compute);
6807EXPORT_SYMBOL_GPL(ata_timing_merge);
a0f79b92 6808EXPORT_SYMBOL_GPL(ata_timing_cycle2mode);
452503f9 6809
1da177e4
LT
6810#ifdef CONFIG_PCI
6811EXPORT_SYMBOL_GPL(pci_test_config_bits);
1da177e4 6812EXPORT_SYMBOL_GPL(ata_pci_remove_one);
6ffa01d8 6813#ifdef CONFIG_PM
500530f6
TH
6814EXPORT_SYMBOL_GPL(ata_pci_device_do_suspend);
6815EXPORT_SYMBOL_GPL(ata_pci_device_do_resume);
9b847548
JA
6816EXPORT_SYMBOL_GPL(ata_pci_device_suspend);
6817EXPORT_SYMBOL_GPL(ata_pci_device_resume);
6ffa01d8 6818#endif /* CONFIG_PM */
1da177e4 6819#endif /* CONFIG_PCI */
9b847548 6820
b64bbc39
TH
6821EXPORT_SYMBOL_GPL(__ata_ehi_push_desc);
6822EXPORT_SYMBOL_GPL(ata_ehi_push_desc);
6823EXPORT_SYMBOL_GPL(ata_ehi_clear_desc);
cbcdd875
TH
6824EXPORT_SYMBOL_GPL(ata_port_desc);
6825#ifdef CONFIG_PCI
6826EXPORT_SYMBOL_GPL(ata_port_pbar_desc);
6827#endif /* CONFIG_PCI */
7b70fc03 6828EXPORT_SYMBOL_GPL(ata_port_schedule_eh);
dbd82616 6829EXPORT_SYMBOL_GPL(ata_link_abort);
7b70fc03 6830EXPORT_SYMBOL_GPL(ata_port_abort);
e3180499 6831EXPORT_SYMBOL_GPL(ata_port_freeze);
7d77b247 6832EXPORT_SYMBOL_GPL(sata_async_notification);
e3180499
TH
6833EXPORT_SYMBOL_GPL(ata_eh_freeze_port);
6834EXPORT_SYMBOL_GPL(ata_eh_thaw_port);
ece1d636
TH
6835EXPORT_SYMBOL_GPL(ata_eh_qc_complete);
6836EXPORT_SYMBOL_GPL(ata_eh_qc_retry);
10acf3b0 6837EXPORT_SYMBOL_GPL(ata_eh_analyze_ncq_error);
022bdb07 6838EXPORT_SYMBOL_GPL(ata_do_eh);
a1efdaba 6839EXPORT_SYMBOL_GPL(ata_std_error_handler);
be0d18df
AC
6840
6841EXPORT_SYMBOL_GPL(ata_cable_40wire);
6842EXPORT_SYMBOL_GPL(ata_cable_80wire);
6843EXPORT_SYMBOL_GPL(ata_cable_unknown);
c88f90c3 6844EXPORT_SYMBOL_GPL(ata_cable_ignore);
be0d18df 6845EXPORT_SYMBOL_GPL(ata_cable_sata);