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1da177e4 1/*
af36d7f0
JG
2 * libata-core.c - helper library for ATA
3 *
4 * Maintained by: Jeff Garzik <jgarzik@pobox.com>
5 * Please ALWAYS copy linux-ide@vger.kernel.org
6 * on emails.
7 *
8 * Copyright 2003-2004 Red Hat, Inc. All rights reserved.
9 * Copyright 2003-2004 Jeff Garzik
10 *
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2, or (at your option)
15 * any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; see the file COPYING. If not, write to
24 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
25 *
26 *
27 * libata documentation is available via 'make {ps|pdf}docs',
28 * as Documentation/DocBook/libata.*
29 *
30 * Hardware documentation available from http://www.t13.org/ and
31 * http://www.sata-io.org/
32 *
92c52c52
AC
33 * Standards documents from:
34 * http://www.t13.org (ATA standards, PCI DMA IDE spec)
35 * http://www.t10.org (SCSI MMC - for ATAPI MMC)
36 * http://www.sata-io.org (SATA)
37 * http://www.compactflash.org (CF)
38 * http://www.qic.org (QIC157 - Tape and DSC)
39 * http://www.ce-ata.org (CE-ATA: not supported)
40 *
1da177e4
LT
41 */
42
1da177e4
LT
43#include <linux/kernel.h>
44#include <linux/module.h>
45#include <linux/pci.h>
46#include <linux/init.h>
47#include <linux/list.h>
48#include <linux/mm.h>
1da177e4
LT
49#include <linux/spinlock.h>
50#include <linux/blkdev.h>
51#include <linux/delay.h>
52#include <linux/timer.h>
53#include <linux/interrupt.h>
54#include <linux/completion.h>
55#include <linux/suspend.h>
56#include <linux/workqueue.h>
378f058c 57#include <linux/scatterlist.h>
2dcb407e 58#include <linux/io.h>
79318057 59#include <linux/async.h>
e18086d6 60#include <linux/log2.h>
5a0e3ad6 61#include <linux/slab.h>
1da177e4 62#include <scsi/scsi.h>
193515d5 63#include <scsi/scsi_cmnd.h>
1da177e4
LT
64#include <scsi/scsi_host.h>
65#include <linux/libata.h>
1da177e4 66#include <asm/byteorder.h>
140b5e59 67#include <linux/cdrom.h>
9990b6f3 68#include <linux/ratelimit.h>
9ee4f393 69#include <linux/pm_runtime.h>
1da177e4
LT
70
71#include "libata.h"
d9027470 72#include "libata-transport.h"
fda0efc5 73
d7bb4cc7 74/* debounce timing parameters in msecs { interval, duration, timeout } */
e9c83914
TH
75const unsigned long sata_deb_timing_normal[] = { 5, 100, 2000 };
76const unsigned long sata_deb_timing_hotplug[] = { 25, 500, 2000 };
77const unsigned long sata_deb_timing_long[] = { 100, 2000, 5000 };
d7bb4cc7 78
029cfd6b 79const struct ata_port_operations ata_base_port_ops = {
0aa1113d 80 .prereset = ata_std_prereset,
203c75b8 81 .postreset = ata_std_postreset,
a1efdaba 82 .error_handler = ata_std_error_handler,
e4a9c373
DW
83 .sched_eh = ata_std_sched_eh,
84 .end_eh = ata_std_end_eh,
029cfd6b
TH
85};
86
87const struct ata_port_operations sata_port_ops = {
88 .inherits = &ata_base_port_ops,
89
90 .qc_defer = ata_std_qc_defer,
57c9efdf 91 .hardreset = sata_std_hardreset,
029cfd6b
TH
92};
93
3373efd8
TH
94static unsigned int ata_dev_init_params(struct ata_device *dev,
95 u16 heads, u16 sectors);
96static unsigned int ata_dev_set_xfermode(struct ata_device *dev);
97static void ata_dev_xfermask(struct ata_device *dev);
75683fe7 98static unsigned long ata_dev_blacklisted(const struct ata_device *dev);
1da177e4 99
a78f57af 100atomic_t ata_print_id = ATOMIC_INIT(0);
1da177e4 101
33267325
TH
102struct ata_force_param {
103 const char *name;
104 unsigned int cbl;
105 int spd_limit;
106 unsigned long xfer_mask;
107 unsigned int horkage_on;
108 unsigned int horkage_off;
05944bdf 109 unsigned int lflags;
33267325
TH
110};
111
112struct ata_force_ent {
113 int port;
114 int device;
115 struct ata_force_param param;
116};
117
118static struct ata_force_ent *ata_force_tbl;
119static int ata_force_tbl_size;
120
121static char ata_force_param_buf[PAGE_SIZE] __initdata;
7afb4222
TH
122/* param_buf is thrown away after initialization, disallow read */
123module_param_string(force, ata_force_param_buf, sizeof(ata_force_param_buf), 0);
33267325
TH
124MODULE_PARM_DESC(force, "Force ATA configurations including cable type, link speed and transfer mode (see Documentation/kernel-parameters.txt for details)");
125
2486fa56 126static int atapi_enabled = 1;
1623c81e 127module_param(atapi_enabled, int, 0444);
ad5d8eac 128MODULE_PARM_DESC(atapi_enabled, "Enable discovery of ATAPI devices (0=off, 1=on [default])");
1623c81e 129
c5c61bda 130static int atapi_dmadir = 0;
95de719a 131module_param(atapi_dmadir, int, 0444);
ad5d8eac 132MODULE_PARM_DESC(atapi_dmadir, "Enable ATAPI DMADIR bridge support (0=off [default], 1=on)");
95de719a 133
baf4fdfa
ML
134int atapi_passthru16 = 1;
135module_param(atapi_passthru16, int, 0444);
ad5d8eac 136MODULE_PARM_DESC(atapi_passthru16, "Enable ATA_16 passthru for ATAPI devices (0=off, 1=on [default])");
baf4fdfa 137
9973a1c3 138int libata_fua = 0;
c3c013a2 139module_param_named(fua, libata_fua, int, 0444);
9973a1c3 140MODULE_PARM_DESC(fua, "FUA support (0=off [default], 1=on)");
c3c013a2 141
2dcb407e 142static int ata_ignore_hpa;
1e999736
AC
143module_param_named(ignore_hpa, ata_ignore_hpa, int, 0644);
144MODULE_PARM_DESC(ignore_hpa, "Ignore HPA limit (0=keep BIOS limits, 1=ignore limits, using full disk)");
145
b3a70601
AC
146static int libata_dma_mask = ATA_DMA_MASK_ATA|ATA_DMA_MASK_ATAPI|ATA_DMA_MASK_CFA;
147module_param_named(dma, libata_dma_mask, int, 0444);
148MODULE_PARM_DESC(dma, "DMA enable/disable (0x1==ATA, 0x2==ATAPI, 0x4==CF)");
149
87fbc5a0 150static int ata_probe_timeout;
a8601e5f
AM
151module_param(ata_probe_timeout, int, 0444);
152MODULE_PARM_DESC(ata_probe_timeout, "Set ATA probing timeout (seconds)");
153
6ebe9d86 154int libata_noacpi = 0;
d7d0dad6 155module_param_named(noacpi, libata_noacpi, int, 0444);
ad5d8eac 156MODULE_PARM_DESC(noacpi, "Disable the use of ACPI in probe/suspend/resume (0=off [default], 1=on)");
11ef697b 157
ae8d4ee7
AC
158int libata_allow_tpm = 0;
159module_param_named(allow_tpm, libata_allow_tpm, int, 0444);
ad5d8eac 160MODULE_PARM_DESC(allow_tpm, "Permit the use of TPM commands (0=off [default], 1=on)");
ae8d4ee7 161
e7ecd435
TH
162static int atapi_an;
163module_param(atapi_an, int, 0444);
164MODULE_PARM_DESC(atapi_an, "Enable ATAPI AN media presence notification (0=0ff [default], 1=on)");
165
1da177e4
LT
166MODULE_AUTHOR("Jeff Garzik");
167MODULE_DESCRIPTION("Library module for ATA devices");
168MODULE_LICENSE("GPL");
169MODULE_VERSION(DRV_VERSION);
170
0baab86b 171
9913ff8a
TH
172static bool ata_sstatus_online(u32 sstatus)
173{
174 return (sstatus & 0xf) == 0x3;
175}
176
1eca4365
TH
177/**
178 * ata_link_next - link iteration helper
179 * @link: the previous link, NULL to start
180 * @ap: ATA port containing links to iterate
181 * @mode: iteration mode, one of ATA_LITER_*
182 *
183 * LOCKING:
184 * Host lock or EH context.
aadffb68 185 *
1eca4365
TH
186 * RETURNS:
187 * Pointer to the next link.
aadffb68 188 */
1eca4365
TH
189struct ata_link *ata_link_next(struct ata_link *link, struct ata_port *ap,
190 enum ata_link_iter_mode mode)
aadffb68 191{
1eca4365
TH
192 BUG_ON(mode != ATA_LITER_EDGE &&
193 mode != ATA_LITER_PMP_FIRST && mode != ATA_LITER_HOST_FIRST);
194
aadffb68 195 /* NULL link indicates start of iteration */
1eca4365
TH
196 if (!link)
197 switch (mode) {
198 case ATA_LITER_EDGE:
199 case ATA_LITER_PMP_FIRST:
200 if (sata_pmp_attached(ap))
201 return ap->pmp_link;
202 /* fall through */
203 case ATA_LITER_HOST_FIRST:
204 return &ap->link;
205 }
aadffb68 206
1eca4365
TH
207 /* we just iterated over the host link, what's next? */
208 if (link == &ap->link)
209 switch (mode) {
210 case ATA_LITER_HOST_FIRST:
211 if (sata_pmp_attached(ap))
212 return ap->pmp_link;
213 /* fall through */
214 case ATA_LITER_PMP_FIRST:
215 if (unlikely(ap->slave_link))
b1c72916 216 return ap->slave_link;
1eca4365
TH
217 /* fall through */
218 case ATA_LITER_EDGE:
aadffb68 219 return NULL;
b1c72916 220 }
aadffb68 221
b1c72916
TH
222 /* slave_link excludes PMP */
223 if (unlikely(link == ap->slave_link))
224 return NULL;
225
1eca4365 226 /* we were over a PMP link */
aadffb68
TH
227 if (++link < ap->pmp_link + ap->nr_pmp_links)
228 return link;
1eca4365
TH
229
230 if (mode == ATA_LITER_PMP_FIRST)
231 return &ap->link;
232
aadffb68
TH
233 return NULL;
234}
235
1eca4365
TH
236/**
237 * ata_dev_next - device iteration helper
238 * @dev: the previous device, NULL to start
239 * @link: ATA link containing devices to iterate
240 * @mode: iteration mode, one of ATA_DITER_*
241 *
242 * LOCKING:
243 * Host lock or EH context.
244 *
245 * RETURNS:
246 * Pointer to the next device.
247 */
248struct ata_device *ata_dev_next(struct ata_device *dev, struct ata_link *link,
249 enum ata_dev_iter_mode mode)
250{
251 BUG_ON(mode != ATA_DITER_ENABLED && mode != ATA_DITER_ENABLED_REVERSE &&
252 mode != ATA_DITER_ALL && mode != ATA_DITER_ALL_REVERSE);
253
254 /* NULL dev indicates start of iteration */
255 if (!dev)
256 switch (mode) {
257 case ATA_DITER_ENABLED:
258 case ATA_DITER_ALL:
259 dev = link->device;
260 goto check;
261 case ATA_DITER_ENABLED_REVERSE:
262 case ATA_DITER_ALL_REVERSE:
263 dev = link->device + ata_link_max_devices(link) - 1;
264 goto check;
265 }
266
267 next:
268 /* move to the next one */
269 switch (mode) {
270 case ATA_DITER_ENABLED:
271 case ATA_DITER_ALL:
272 if (++dev < link->device + ata_link_max_devices(link))
273 goto check;
274 return NULL;
275 case ATA_DITER_ENABLED_REVERSE:
276 case ATA_DITER_ALL_REVERSE:
277 if (--dev >= link->device)
278 goto check;
279 return NULL;
280 }
281
282 check:
283 if ((mode == ATA_DITER_ENABLED || mode == ATA_DITER_ENABLED_REVERSE) &&
284 !ata_dev_enabled(dev))
285 goto next;
286 return dev;
287}
288
b1c72916
TH
289/**
290 * ata_dev_phys_link - find physical link for a device
291 * @dev: ATA device to look up physical link for
292 *
293 * Look up physical link which @dev is attached to. Note that
294 * this is different from @dev->link only when @dev is on slave
295 * link. For all other cases, it's the same as @dev->link.
296 *
297 * LOCKING:
298 * Don't care.
299 *
300 * RETURNS:
301 * Pointer to the found physical link.
302 */
303struct ata_link *ata_dev_phys_link(struct ata_device *dev)
304{
305 struct ata_port *ap = dev->link->ap;
306
307 if (!ap->slave_link)
308 return dev->link;
309 if (!dev->devno)
310 return &ap->link;
311 return ap->slave_link;
312}
313
33267325
TH
314/**
315 * ata_force_cbl - force cable type according to libata.force
4cdfa1b3 316 * @ap: ATA port of interest
33267325
TH
317 *
318 * Force cable type according to libata.force and whine about it.
319 * The last entry which has matching port number is used, so it
320 * can be specified as part of device force parameters. For
321 * example, both "a:40c,1.00:udma4" and "1.00:40c,udma4" have the
322 * same effect.
323 *
324 * LOCKING:
325 * EH context.
326 */
327void ata_force_cbl(struct ata_port *ap)
328{
329 int i;
330
331 for (i = ata_force_tbl_size - 1; i >= 0; i--) {
332 const struct ata_force_ent *fe = &ata_force_tbl[i];
333
334 if (fe->port != -1 && fe->port != ap->print_id)
335 continue;
336
337 if (fe->param.cbl == ATA_CBL_NONE)
338 continue;
339
340 ap->cbl = fe->param.cbl;
a9a79dfe 341 ata_port_notice(ap, "FORCE: cable set to %s\n", fe->param.name);
33267325
TH
342 return;
343 }
344}
345
346/**
05944bdf 347 * ata_force_link_limits - force link limits according to libata.force
33267325
TH
348 * @link: ATA link of interest
349 *
05944bdf
TH
350 * Force link flags and SATA spd limit according to libata.force
351 * and whine about it. When only the port part is specified
352 * (e.g. 1:), the limit applies to all links connected to both
353 * the host link and all fan-out ports connected via PMP. If the
354 * device part is specified as 0 (e.g. 1.00:), it specifies the
355 * first fan-out link not the host link. Device number 15 always
b1c72916
TH
356 * points to the host link whether PMP is attached or not. If the
357 * controller has slave link, device number 16 points to it.
33267325
TH
358 *
359 * LOCKING:
360 * EH context.
361 */
05944bdf 362static void ata_force_link_limits(struct ata_link *link)
33267325 363{
05944bdf 364 bool did_spd = false;
b1c72916
TH
365 int linkno = link->pmp;
366 int i;
33267325
TH
367
368 if (ata_is_host_link(link))
b1c72916 369 linkno += 15;
33267325
TH
370
371 for (i = ata_force_tbl_size - 1; i >= 0; i--) {
372 const struct ata_force_ent *fe = &ata_force_tbl[i];
373
374 if (fe->port != -1 && fe->port != link->ap->print_id)
375 continue;
376
377 if (fe->device != -1 && fe->device != linkno)
378 continue;
379
05944bdf
TH
380 /* only honor the first spd limit */
381 if (!did_spd && fe->param.spd_limit) {
382 link->hw_sata_spd_limit = (1 << fe->param.spd_limit) - 1;
a9a79dfe 383 ata_link_notice(link, "FORCE: PHY spd limit set to %s\n",
05944bdf
TH
384 fe->param.name);
385 did_spd = true;
386 }
33267325 387
05944bdf
TH
388 /* let lflags stack */
389 if (fe->param.lflags) {
390 link->flags |= fe->param.lflags;
a9a79dfe 391 ata_link_notice(link,
05944bdf
TH
392 "FORCE: link flag 0x%x forced -> 0x%x\n",
393 fe->param.lflags, link->flags);
394 }
33267325
TH
395 }
396}
397
398/**
399 * ata_force_xfermask - force xfermask according to libata.force
400 * @dev: ATA device of interest
401 *
402 * Force xfer_mask according to libata.force and whine about it.
403 * For consistency with link selection, device number 15 selects
404 * the first device connected to the host link.
405 *
406 * LOCKING:
407 * EH context.
408 */
409static void ata_force_xfermask(struct ata_device *dev)
410{
411 int devno = dev->link->pmp + dev->devno;
412 int alt_devno = devno;
413 int i;
414
b1c72916
TH
415 /* allow n.15/16 for devices attached to host port */
416 if (ata_is_host_link(dev->link))
417 alt_devno += 15;
33267325
TH
418
419 for (i = ata_force_tbl_size - 1; i >= 0; i--) {
420 const struct ata_force_ent *fe = &ata_force_tbl[i];
421 unsigned long pio_mask, mwdma_mask, udma_mask;
422
423 if (fe->port != -1 && fe->port != dev->link->ap->print_id)
424 continue;
425
426 if (fe->device != -1 && fe->device != devno &&
427 fe->device != alt_devno)
428 continue;
429
430 if (!fe->param.xfer_mask)
431 continue;
432
433 ata_unpack_xfermask(fe->param.xfer_mask,
434 &pio_mask, &mwdma_mask, &udma_mask);
435 if (udma_mask)
436 dev->udma_mask = udma_mask;
437 else if (mwdma_mask) {
438 dev->udma_mask = 0;
439 dev->mwdma_mask = mwdma_mask;
440 } else {
441 dev->udma_mask = 0;
442 dev->mwdma_mask = 0;
443 dev->pio_mask = pio_mask;
444 }
445
a9a79dfe
JP
446 ata_dev_notice(dev, "FORCE: xfer_mask set to %s\n",
447 fe->param.name);
33267325
TH
448 return;
449 }
450}
451
452/**
453 * ata_force_horkage - force horkage according to libata.force
454 * @dev: ATA device of interest
455 *
456 * Force horkage according to libata.force and whine about it.
457 * For consistency with link selection, device number 15 selects
458 * the first device connected to the host link.
459 *
460 * LOCKING:
461 * EH context.
462 */
463static void ata_force_horkage(struct ata_device *dev)
464{
465 int devno = dev->link->pmp + dev->devno;
466 int alt_devno = devno;
467 int i;
468
b1c72916
TH
469 /* allow n.15/16 for devices attached to host port */
470 if (ata_is_host_link(dev->link))
471 alt_devno += 15;
33267325
TH
472
473 for (i = 0; i < ata_force_tbl_size; i++) {
474 const struct ata_force_ent *fe = &ata_force_tbl[i];
475
476 if (fe->port != -1 && fe->port != dev->link->ap->print_id)
477 continue;
478
479 if (fe->device != -1 && fe->device != devno &&
480 fe->device != alt_devno)
481 continue;
482
483 if (!(~dev->horkage & fe->param.horkage_on) &&
484 !(dev->horkage & fe->param.horkage_off))
485 continue;
486
487 dev->horkage |= fe->param.horkage_on;
488 dev->horkage &= ~fe->param.horkage_off;
489
a9a79dfe
JP
490 ata_dev_notice(dev, "FORCE: horkage modified (%s)\n",
491 fe->param.name);
33267325
TH
492 }
493}
494
436d34b3
TH
495/**
496 * atapi_cmd_type - Determine ATAPI command type from SCSI opcode
497 * @opcode: SCSI opcode
498 *
499 * Determine ATAPI command type from @opcode.
500 *
501 * LOCKING:
502 * None.
503 *
504 * RETURNS:
505 * ATAPI_{READ|WRITE|READ_CD|PASS_THRU|MISC}
506 */
507int atapi_cmd_type(u8 opcode)
508{
509 switch (opcode) {
510 case GPCMD_READ_10:
511 case GPCMD_READ_12:
512 return ATAPI_READ;
513
514 case GPCMD_WRITE_10:
515 case GPCMD_WRITE_12:
516 case GPCMD_WRITE_AND_VERIFY_10:
517 return ATAPI_WRITE;
518
519 case GPCMD_READ_CD:
520 case GPCMD_READ_CD_MSF:
521 return ATAPI_READ_CD;
522
e52dcc48
TH
523 case ATA_16:
524 case ATA_12:
525 if (atapi_passthru16)
526 return ATAPI_PASS_THRU;
527 /* fall thru */
436d34b3
TH
528 default:
529 return ATAPI_MISC;
530 }
531}
532
1da177e4
LT
533/**
534 * ata_tf_to_fis - Convert ATA taskfile to SATA FIS structure
535 * @tf: Taskfile to convert
1da177e4 536 * @pmp: Port multiplier port
9977126c
TH
537 * @is_cmd: This FIS is for command
538 * @fis: Buffer into which data will output
1da177e4
LT
539 *
540 * Converts a standard ATA taskfile to a Serial ATA
541 * FIS structure (Register - Host to Device).
542 *
543 * LOCKING:
544 * Inherited from caller.
545 */
9977126c 546void ata_tf_to_fis(const struct ata_taskfile *tf, u8 pmp, int is_cmd, u8 *fis)
1da177e4 547{
9977126c
TH
548 fis[0] = 0x27; /* Register - Host to Device FIS */
549 fis[1] = pmp & 0xf; /* Port multiplier number*/
550 if (is_cmd)
551 fis[1] |= (1 << 7); /* bit 7 indicates Command FIS */
552
1da177e4
LT
553 fis[2] = tf->command;
554 fis[3] = tf->feature;
555
556 fis[4] = tf->lbal;
557 fis[5] = tf->lbam;
558 fis[6] = tf->lbah;
559 fis[7] = tf->device;
560
561 fis[8] = tf->hob_lbal;
562 fis[9] = tf->hob_lbam;
563 fis[10] = tf->hob_lbah;
564 fis[11] = tf->hob_feature;
565
566 fis[12] = tf->nsect;
567 fis[13] = tf->hob_nsect;
568 fis[14] = 0;
569 fis[15] = tf->ctl;
570
571 fis[16] = 0;
572 fis[17] = 0;
573 fis[18] = 0;
574 fis[19] = 0;
575}
576
577/**
578 * ata_tf_from_fis - Convert SATA FIS to ATA taskfile
579 * @fis: Buffer from which data will be input
580 * @tf: Taskfile to output
581 *
e12a1be6 582 * Converts a serial ATA FIS structure to a standard ATA taskfile.
1da177e4
LT
583 *
584 * LOCKING:
585 * Inherited from caller.
586 */
587
057ace5e 588void ata_tf_from_fis(const u8 *fis, struct ata_taskfile *tf)
1da177e4
LT
589{
590 tf->command = fis[2]; /* status */
591 tf->feature = fis[3]; /* error */
592
593 tf->lbal = fis[4];
594 tf->lbam = fis[5];
595 tf->lbah = fis[6];
596 tf->device = fis[7];
597
598 tf->hob_lbal = fis[8];
599 tf->hob_lbam = fis[9];
600 tf->hob_lbah = fis[10];
601
602 tf->nsect = fis[12];
603 tf->hob_nsect = fis[13];
604}
605
8cbd6df1
AL
606static const u8 ata_rw_cmds[] = {
607 /* pio multi */
608 ATA_CMD_READ_MULTI,
609 ATA_CMD_WRITE_MULTI,
610 ATA_CMD_READ_MULTI_EXT,
611 ATA_CMD_WRITE_MULTI_EXT,
9a3dccc4
TH
612 0,
613 0,
614 0,
615 ATA_CMD_WRITE_MULTI_FUA_EXT,
8cbd6df1
AL
616 /* pio */
617 ATA_CMD_PIO_READ,
618 ATA_CMD_PIO_WRITE,
619 ATA_CMD_PIO_READ_EXT,
620 ATA_CMD_PIO_WRITE_EXT,
9a3dccc4
TH
621 0,
622 0,
623 0,
624 0,
8cbd6df1
AL
625 /* dma */
626 ATA_CMD_READ,
627 ATA_CMD_WRITE,
628 ATA_CMD_READ_EXT,
9a3dccc4
TH
629 ATA_CMD_WRITE_EXT,
630 0,
631 0,
632 0,
633 ATA_CMD_WRITE_FUA_EXT
8cbd6df1 634};
1da177e4
LT
635
636/**
8cbd6df1 637 * ata_rwcmd_protocol - set taskfile r/w commands and protocol
bd056d7e
TH
638 * @tf: command to examine and configure
639 * @dev: device tf belongs to
1da177e4 640 *
2e9edbf8 641 * Examine the device configuration and tf->flags to calculate
8cbd6df1 642 * the proper read/write commands and protocol to use.
1da177e4
LT
643 *
644 * LOCKING:
645 * caller.
646 */
bd056d7e 647static int ata_rwcmd_protocol(struct ata_taskfile *tf, struct ata_device *dev)
1da177e4 648{
9a3dccc4 649 u8 cmd;
1da177e4 650
9a3dccc4 651 int index, fua, lba48, write;
2e9edbf8 652
9a3dccc4 653 fua = (tf->flags & ATA_TFLAG_FUA) ? 4 : 0;
8cbd6df1
AL
654 lba48 = (tf->flags & ATA_TFLAG_LBA48) ? 2 : 0;
655 write = (tf->flags & ATA_TFLAG_WRITE) ? 1 : 0;
1da177e4 656
8cbd6df1
AL
657 if (dev->flags & ATA_DFLAG_PIO) {
658 tf->protocol = ATA_PROT_PIO;
9a3dccc4 659 index = dev->multi_count ? 0 : 8;
9af5c9c9 660 } else if (lba48 && (dev->link->ap->flags & ATA_FLAG_PIO_LBA48)) {
8d238e01
AC
661 /* Unable to use DMA due to host limitation */
662 tf->protocol = ATA_PROT_PIO;
0565c26d 663 index = dev->multi_count ? 0 : 8;
8cbd6df1
AL
664 } else {
665 tf->protocol = ATA_PROT_DMA;
9a3dccc4 666 index = 16;
8cbd6df1 667 }
1da177e4 668
9a3dccc4
TH
669 cmd = ata_rw_cmds[index + fua + lba48 + write];
670 if (cmd) {
671 tf->command = cmd;
672 return 0;
673 }
674 return -1;
1da177e4
LT
675}
676
35b649fe
TH
677/**
678 * ata_tf_read_block - Read block address from ATA taskfile
679 * @tf: ATA taskfile of interest
680 * @dev: ATA device @tf belongs to
681 *
682 * LOCKING:
683 * None.
684 *
685 * Read block address from @tf. This function can handle all
686 * three address formats - LBA, LBA48 and CHS. tf->protocol and
687 * flags select the address format to use.
688 *
689 * RETURNS:
690 * Block address read from @tf.
691 */
692u64 ata_tf_read_block(struct ata_taskfile *tf, struct ata_device *dev)
693{
694 u64 block = 0;
695
696 if (tf->flags & ATA_TFLAG_LBA) {
697 if (tf->flags & ATA_TFLAG_LBA48) {
698 block |= (u64)tf->hob_lbah << 40;
699 block |= (u64)tf->hob_lbam << 32;
44901a96 700 block |= (u64)tf->hob_lbal << 24;
35b649fe
TH
701 } else
702 block |= (tf->device & 0xf) << 24;
703
704 block |= tf->lbah << 16;
705 block |= tf->lbam << 8;
706 block |= tf->lbal;
707 } else {
708 u32 cyl, head, sect;
709
710 cyl = tf->lbam | (tf->lbah << 8);
711 head = tf->device & 0xf;
712 sect = tf->lbal;
713
ac8672ea 714 if (!sect) {
a9a79dfe
JP
715 ata_dev_warn(dev,
716 "device reported invalid CHS sector 0\n");
ac8672ea
TH
717 sect = 1; /* oh well */
718 }
719
720 block = (cyl * dev->heads + head) * dev->sectors + sect - 1;
35b649fe
TH
721 }
722
723 return block;
724}
725
bd056d7e
TH
726/**
727 * ata_build_rw_tf - Build ATA taskfile for given read/write request
728 * @tf: Target ATA taskfile
729 * @dev: ATA device @tf belongs to
730 * @block: Block address
731 * @n_block: Number of blocks
732 * @tf_flags: RW/FUA etc...
733 * @tag: tag
734 *
735 * LOCKING:
736 * None.
737 *
738 * Build ATA taskfile @tf for read/write request described by
739 * @block, @n_block, @tf_flags and @tag on @dev.
740 *
741 * RETURNS:
742 *
743 * 0 on success, -ERANGE if the request is too large for @dev,
744 * -EINVAL if the request is invalid.
745 */
746int ata_build_rw_tf(struct ata_taskfile *tf, struct ata_device *dev,
747 u64 block, u32 n_block, unsigned int tf_flags,
748 unsigned int tag)
749{
750 tf->flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
751 tf->flags |= tf_flags;
752
6d1245bf 753 if (ata_ncq_enabled(dev) && likely(tag != ATA_TAG_INTERNAL)) {
bd056d7e
TH
754 /* yay, NCQ */
755 if (!lba_48_ok(block, n_block))
756 return -ERANGE;
757
758 tf->protocol = ATA_PROT_NCQ;
759 tf->flags |= ATA_TFLAG_LBA | ATA_TFLAG_LBA48;
760
761 if (tf->flags & ATA_TFLAG_WRITE)
762 tf->command = ATA_CMD_FPDMA_WRITE;
763 else
764 tf->command = ATA_CMD_FPDMA_READ;
765
766 tf->nsect = tag << 3;
767 tf->hob_feature = (n_block >> 8) & 0xff;
768 tf->feature = n_block & 0xff;
769
770 tf->hob_lbah = (block >> 40) & 0xff;
771 tf->hob_lbam = (block >> 32) & 0xff;
772 tf->hob_lbal = (block >> 24) & 0xff;
773 tf->lbah = (block >> 16) & 0xff;
774 tf->lbam = (block >> 8) & 0xff;
775 tf->lbal = block & 0xff;
776
777 tf->device = 1 << 6;
778 if (tf->flags & ATA_TFLAG_FUA)
779 tf->device |= 1 << 7;
780 } else if (dev->flags & ATA_DFLAG_LBA) {
781 tf->flags |= ATA_TFLAG_LBA;
782
783 if (lba_28_ok(block, n_block)) {
784 /* use LBA28 */
785 tf->device |= (block >> 24) & 0xf;
786 } else if (lba_48_ok(block, n_block)) {
787 if (!(dev->flags & ATA_DFLAG_LBA48))
788 return -ERANGE;
789
790 /* use LBA48 */
791 tf->flags |= ATA_TFLAG_LBA48;
792
793 tf->hob_nsect = (n_block >> 8) & 0xff;
794
795 tf->hob_lbah = (block >> 40) & 0xff;
796 tf->hob_lbam = (block >> 32) & 0xff;
797 tf->hob_lbal = (block >> 24) & 0xff;
798 } else
799 /* request too large even for LBA48 */
800 return -ERANGE;
801
802 if (unlikely(ata_rwcmd_protocol(tf, dev) < 0))
803 return -EINVAL;
804
805 tf->nsect = n_block & 0xff;
806
807 tf->lbah = (block >> 16) & 0xff;
808 tf->lbam = (block >> 8) & 0xff;
809 tf->lbal = block & 0xff;
810
811 tf->device |= ATA_LBA;
812 } else {
813 /* CHS */
814 u32 sect, head, cyl, track;
815
816 /* The request -may- be too large for CHS addressing. */
817 if (!lba_28_ok(block, n_block))
818 return -ERANGE;
819
820 if (unlikely(ata_rwcmd_protocol(tf, dev) < 0))
821 return -EINVAL;
822
823 /* Convert LBA to CHS */
824 track = (u32)block / dev->sectors;
825 cyl = track / dev->heads;
826 head = track % dev->heads;
827 sect = (u32)block % dev->sectors + 1;
828
829 DPRINTK("block %u track %u cyl %u head %u sect %u\n",
830 (u32)block, track, cyl, head, sect);
831
832 /* Check whether the converted CHS can fit.
833 Cylinder: 0-65535
834 Head: 0-15
835 Sector: 1-255*/
836 if ((cyl >> 16) || (head >> 4) || (sect >> 8) || (!sect))
837 return -ERANGE;
838
839 tf->nsect = n_block & 0xff; /* Sector count 0 means 256 sectors */
840 tf->lbal = sect;
841 tf->lbam = cyl;
842 tf->lbah = cyl >> 8;
843 tf->device |= head;
844 }
845
846 return 0;
847}
848
cb95d562
TH
849/**
850 * ata_pack_xfermask - Pack pio, mwdma and udma masks into xfer_mask
851 * @pio_mask: pio_mask
852 * @mwdma_mask: mwdma_mask
853 * @udma_mask: udma_mask
854 *
855 * Pack @pio_mask, @mwdma_mask and @udma_mask into a single
856 * unsigned int xfer_mask.
857 *
858 * LOCKING:
859 * None.
860 *
861 * RETURNS:
862 * Packed xfer_mask.
863 */
7dc951ae
TH
864unsigned long ata_pack_xfermask(unsigned long pio_mask,
865 unsigned long mwdma_mask,
866 unsigned long udma_mask)
cb95d562
TH
867{
868 return ((pio_mask << ATA_SHIFT_PIO) & ATA_MASK_PIO) |
869 ((mwdma_mask << ATA_SHIFT_MWDMA) & ATA_MASK_MWDMA) |
870 ((udma_mask << ATA_SHIFT_UDMA) & ATA_MASK_UDMA);
871}
872
c0489e4e
TH
873/**
874 * ata_unpack_xfermask - Unpack xfer_mask into pio, mwdma and udma masks
875 * @xfer_mask: xfer_mask to unpack
876 * @pio_mask: resulting pio_mask
877 * @mwdma_mask: resulting mwdma_mask
878 * @udma_mask: resulting udma_mask
879 *
880 * Unpack @xfer_mask into @pio_mask, @mwdma_mask and @udma_mask.
881 * Any NULL distination masks will be ignored.
882 */
7dc951ae
TH
883void ata_unpack_xfermask(unsigned long xfer_mask, unsigned long *pio_mask,
884 unsigned long *mwdma_mask, unsigned long *udma_mask)
c0489e4e
TH
885{
886 if (pio_mask)
887 *pio_mask = (xfer_mask & ATA_MASK_PIO) >> ATA_SHIFT_PIO;
888 if (mwdma_mask)
889 *mwdma_mask = (xfer_mask & ATA_MASK_MWDMA) >> ATA_SHIFT_MWDMA;
890 if (udma_mask)
891 *udma_mask = (xfer_mask & ATA_MASK_UDMA) >> ATA_SHIFT_UDMA;
892}
893
cb95d562 894static const struct ata_xfer_ent {
be9a50c8 895 int shift, bits;
cb95d562
TH
896 u8 base;
897} ata_xfer_tbl[] = {
70cd071e
TH
898 { ATA_SHIFT_PIO, ATA_NR_PIO_MODES, XFER_PIO_0 },
899 { ATA_SHIFT_MWDMA, ATA_NR_MWDMA_MODES, XFER_MW_DMA_0 },
900 { ATA_SHIFT_UDMA, ATA_NR_UDMA_MODES, XFER_UDMA_0 },
cb95d562
TH
901 { -1, },
902};
903
904/**
905 * ata_xfer_mask2mode - Find matching XFER_* for the given xfer_mask
906 * @xfer_mask: xfer_mask of interest
907 *
908 * Return matching XFER_* value for @xfer_mask. Only the highest
909 * bit of @xfer_mask is considered.
910 *
911 * LOCKING:
912 * None.
913 *
914 * RETURNS:
70cd071e 915 * Matching XFER_* value, 0xff if no match found.
cb95d562 916 */
7dc951ae 917u8 ata_xfer_mask2mode(unsigned long xfer_mask)
cb95d562
TH
918{
919 int highbit = fls(xfer_mask) - 1;
920 const struct ata_xfer_ent *ent;
921
922 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
923 if (highbit >= ent->shift && highbit < ent->shift + ent->bits)
924 return ent->base + highbit - ent->shift;
70cd071e 925 return 0xff;
cb95d562
TH
926}
927
928/**
929 * ata_xfer_mode2mask - Find matching xfer_mask for XFER_*
930 * @xfer_mode: XFER_* of interest
931 *
932 * Return matching xfer_mask for @xfer_mode.
933 *
934 * LOCKING:
935 * None.
936 *
937 * RETURNS:
938 * Matching xfer_mask, 0 if no match found.
939 */
7dc951ae 940unsigned long ata_xfer_mode2mask(u8 xfer_mode)
cb95d562
TH
941{
942 const struct ata_xfer_ent *ent;
943
944 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
945 if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits)
70cd071e
TH
946 return ((2 << (ent->shift + xfer_mode - ent->base)) - 1)
947 & ~((1 << ent->shift) - 1);
cb95d562
TH
948 return 0;
949}
950
951/**
952 * ata_xfer_mode2shift - Find matching xfer_shift for XFER_*
953 * @xfer_mode: XFER_* of interest
954 *
955 * Return matching xfer_shift for @xfer_mode.
956 *
957 * LOCKING:
958 * None.
959 *
960 * RETURNS:
961 * Matching xfer_shift, -1 if no match found.
962 */
7dc951ae 963int ata_xfer_mode2shift(unsigned long xfer_mode)
cb95d562
TH
964{
965 const struct ata_xfer_ent *ent;
966
967 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
968 if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits)
969 return ent->shift;
970 return -1;
971}
972
1da177e4 973/**
1da7b0d0
TH
974 * ata_mode_string - convert xfer_mask to string
975 * @xfer_mask: mask of bits supported; only highest bit counts.
1da177e4
LT
976 *
977 * Determine string which represents the highest speed
1da7b0d0 978 * (highest bit in @modemask).
1da177e4
LT
979 *
980 * LOCKING:
981 * None.
982 *
983 * RETURNS:
984 * Constant C string representing highest speed listed in
1da7b0d0 985 * @mode_mask, or the constant C string "<n/a>".
1da177e4 986 */
7dc951ae 987const char *ata_mode_string(unsigned long xfer_mask)
1da177e4 988{
75f554bc
TH
989 static const char * const xfer_mode_str[] = {
990 "PIO0",
991 "PIO1",
992 "PIO2",
993 "PIO3",
994 "PIO4",
b352e57d
AC
995 "PIO5",
996 "PIO6",
75f554bc
TH
997 "MWDMA0",
998 "MWDMA1",
999 "MWDMA2",
b352e57d
AC
1000 "MWDMA3",
1001 "MWDMA4",
75f554bc
TH
1002 "UDMA/16",
1003 "UDMA/25",
1004 "UDMA/33",
1005 "UDMA/44",
1006 "UDMA/66",
1007 "UDMA/100",
1008 "UDMA/133",
1009 "UDMA7",
1010 };
1da7b0d0 1011 int highbit;
1da177e4 1012
1da7b0d0
TH
1013 highbit = fls(xfer_mask) - 1;
1014 if (highbit >= 0 && highbit < ARRAY_SIZE(xfer_mode_str))
1015 return xfer_mode_str[highbit];
1da177e4 1016 return "<n/a>";
1da177e4
LT
1017}
1018
d9027470 1019const char *sata_spd_string(unsigned int spd)
4c360c81
TH
1020{
1021 static const char * const spd_str[] = {
1022 "1.5 Gbps",
1023 "3.0 Gbps",
8522ee25 1024 "6.0 Gbps",
4c360c81
TH
1025 };
1026
1027 if (spd == 0 || (spd - 1) >= ARRAY_SIZE(spd_str))
1028 return "<unknown>";
1029 return spd_str[spd - 1];
1030}
1031
1da177e4
LT
1032/**
1033 * ata_dev_classify - determine device type based on ATA-spec signature
1034 * @tf: ATA taskfile register set for device to be identified
1035 *
1036 * Determine from taskfile register contents whether a device is
1037 * ATA or ATAPI, as per "Signature and persistence" section
1038 * of ATA/PI spec (volume 1, sect 5.14).
1039 *
1040 * LOCKING:
1041 * None.
1042 *
1043 * RETURNS:
633273a3
TH
1044 * Device type, %ATA_DEV_ATA, %ATA_DEV_ATAPI, %ATA_DEV_PMP or
1045 * %ATA_DEV_UNKNOWN the event of failure.
1da177e4 1046 */
057ace5e 1047unsigned int ata_dev_classify(const struct ata_taskfile *tf)
1da177e4
LT
1048{
1049 /* Apple's open source Darwin code hints that some devices only
1050 * put a proper signature into the LBA mid/high registers,
1051 * So, we only check those. It's sufficient for uniqueness.
633273a3
TH
1052 *
1053 * ATA/ATAPI-7 (d1532v1r1: Feb. 19, 2003) specified separate
1054 * signatures for ATA and ATAPI devices attached on SerialATA,
1055 * 0x3c/0xc3 and 0x69/0x96 respectively. However, SerialATA
1056 * spec has never mentioned about using different signatures
1057 * for ATA/ATAPI devices. Then, Serial ATA II: Port
1058 * Multiplier specification began to use 0x69/0x96 to identify
1059 * port multpliers and 0x3c/0xc3 to identify SEMB device.
1060 * ATA/ATAPI-7 dropped descriptions about 0x3c/0xc3 and
1061 * 0x69/0x96 shortly and described them as reserved for
1062 * SerialATA.
1063 *
1064 * We follow the current spec and consider that 0x69/0x96
1065 * identifies a port multiplier and 0x3c/0xc3 a SEMB device.
79b42bab
TH
1066 * Unfortunately, WDC WD1600JS-62MHB5 (a hard drive) reports
1067 * SEMB signature. This is worked around in
1068 * ata_dev_read_id().
1da177e4 1069 */
633273a3 1070 if ((tf->lbam == 0) && (tf->lbah == 0)) {
1da177e4
LT
1071 DPRINTK("found ATA device by sig\n");
1072 return ATA_DEV_ATA;
1073 }
1074
633273a3 1075 if ((tf->lbam == 0x14) && (tf->lbah == 0xeb)) {
1da177e4
LT
1076 DPRINTK("found ATAPI device by sig\n");
1077 return ATA_DEV_ATAPI;
1078 }
1079
633273a3
TH
1080 if ((tf->lbam == 0x69) && (tf->lbah == 0x96)) {
1081 DPRINTK("found PMP device by sig\n");
1082 return ATA_DEV_PMP;
1083 }
1084
1085 if ((tf->lbam == 0x3c) && (tf->lbah == 0xc3)) {
79b42bab
TH
1086 DPRINTK("found SEMB device by sig (could be ATA device)\n");
1087 return ATA_DEV_SEMB;
633273a3
TH
1088 }
1089
1da177e4
LT
1090 DPRINTK("unknown device\n");
1091 return ATA_DEV_UNKNOWN;
1092}
1093
1da177e4 1094/**
6a62a04d 1095 * ata_id_string - Convert IDENTIFY DEVICE page into string
1da177e4
LT
1096 * @id: IDENTIFY DEVICE results we will examine
1097 * @s: string into which data is output
1098 * @ofs: offset into identify device page
1099 * @len: length of string to return. must be an even number.
1100 *
1101 * The strings in the IDENTIFY DEVICE page are broken up into
1102 * 16-bit chunks. Run through the string, and output each
1103 * 8-bit chunk linearly, regardless of platform.
1104 *
1105 * LOCKING:
1106 * caller.
1107 */
1108
6a62a04d
TH
1109void ata_id_string(const u16 *id, unsigned char *s,
1110 unsigned int ofs, unsigned int len)
1da177e4
LT
1111{
1112 unsigned int c;
1113
963e4975
AC
1114 BUG_ON(len & 1);
1115
1da177e4
LT
1116 while (len > 0) {
1117 c = id[ofs] >> 8;
1118 *s = c;
1119 s++;
1120
1121 c = id[ofs] & 0xff;
1122 *s = c;
1123 s++;
1124
1125 ofs++;
1126 len -= 2;
1127 }
1128}
1129
0e949ff3 1130/**
6a62a04d 1131 * ata_id_c_string - Convert IDENTIFY DEVICE page into C string
0e949ff3
TH
1132 * @id: IDENTIFY DEVICE results we will examine
1133 * @s: string into which data is output
1134 * @ofs: offset into identify device page
1135 * @len: length of string to return. must be an odd number.
1136 *
6a62a04d 1137 * This function is identical to ata_id_string except that it
0e949ff3
TH
1138 * trims trailing spaces and terminates the resulting string with
1139 * null. @len must be actual maximum length (even number) + 1.
1140 *
1141 * LOCKING:
1142 * caller.
1143 */
6a62a04d
TH
1144void ata_id_c_string(const u16 *id, unsigned char *s,
1145 unsigned int ofs, unsigned int len)
0e949ff3
TH
1146{
1147 unsigned char *p;
1148
6a62a04d 1149 ata_id_string(id, s, ofs, len - 1);
0e949ff3
TH
1150
1151 p = s + strnlen(s, len - 1);
1152 while (p > s && p[-1] == ' ')
1153 p--;
1154 *p = '\0';
1155}
0baab86b 1156
db6f8759
TH
1157static u64 ata_id_n_sectors(const u16 *id)
1158{
1159 if (ata_id_has_lba(id)) {
1160 if (ata_id_has_lba48(id))
968e594a 1161 return ata_id_u64(id, ATA_ID_LBA_CAPACITY_2);
db6f8759 1162 else
968e594a 1163 return ata_id_u32(id, ATA_ID_LBA_CAPACITY);
db6f8759
TH
1164 } else {
1165 if (ata_id_current_chs_valid(id))
968e594a
RH
1166 return id[ATA_ID_CUR_CYLS] * id[ATA_ID_CUR_HEADS] *
1167 id[ATA_ID_CUR_SECTORS];
db6f8759 1168 else
968e594a
RH
1169 return id[ATA_ID_CYLS] * id[ATA_ID_HEADS] *
1170 id[ATA_ID_SECTORS];
db6f8759
TH
1171 }
1172}
1173
a5987e0a 1174u64 ata_tf_to_lba48(const struct ata_taskfile *tf)
1e999736
AC
1175{
1176 u64 sectors = 0;
1177
1178 sectors |= ((u64)(tf->hob_lbah & 0xff)) << 40;
1179 sectors |= ((u64)(tf->hob_lbam & 0xff)) << 32;
ba14a9c2 1180 sectors |= ((u64)(tf->hob_lbal & 0xff)) << 24;
1e999736
AC
1181 sectors |= (tf->lbah & 0xff) << 16;
1182 sectors |= (tf->lbam & 0xff) << 8;
1183 sectors |= (tf->lbal & 0xff);
1184
a5987e0a 1185 return sectors;
1e999736
AC
1186}
1187
a5987e0a 1188u64 ata_tf_to_lba(const struct ata_taskfile *tf)
1e999736
AC
1189{
1190 u64 sectors = 0;
1191
1192 sectors |= (tf->device & 0x0f) << 24;
1193 sectors |= (tf->lbah & 0xff) << 16;
1194 sectors |= (tf->lbam & 0xff) << 8;
1195 sectors |= (tf->lbal & 0xff);
1196
a5987e0a 1197 return sectors;
1e999736
AC
1198}
1199
1200/**
c728a914
TH
1201 * ata_read_native_max_address - Read native max address
1202 * @dev: target device
1203 * @max_sectors: out parameter for the result native max address
1e999736 1204 *
c728a914
TH
1205 * Perform an LBA48 or LBA28 native size query upon the device in
1206 * question.
1e999736 1207 *
c728a914
TH
1208 * RETURNS:
1209 * 0 on success, -EACCES if command is aborted by the drive.
1210 * -EIO on other errors.
1e999736 1211 */
c728a914 1212static int ata_read_native_max_address(struct ata_device *dev, u64 *max_sectors)
1e999736 1213{
c728a914 1214 unsigned int err_mask;
1e999736 1215 struct ata_taskfile tf;
c728a914 1216 int lba48 = ata_id_has_lba48(dev->id);
1e999736
AC
1217
1218 ata_tf_init(dev, &tf);
1219
c728a914 1220 /* always clear all address registers */
1e999736 1221 tf.flags |= ATA_TFLAG_DEVICE | ATA_TFLAG_ISADDR;
1e999736 1222
c728a914
TH
1223 if (lba48) {
1224 tf.command = ATA_CMD_READ_NATIVE_MAX_EXT;
1225 tf.flags |= ATA_TFLAG_LBA48;
1226 } else
1227 tf.command = ATA_CMD_READ_NATIVE_MAX;
1e999736 1228
1e999736 1229 tf.protocol |= ATA_PROT_NODATA;
c728a914
TH
1230 tf.device |= ATA_LBA;
1231
2b789108 1232 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0, 0);
c728a914 1233 if (err_mask) {
a9a79dfe
JP
1234 ata_dev_warn(dev,
1235 "failed to read native max address (err_mask=0x%x)\n",
1236 err_mask);
c728a914
TH
1237 if (err_mask == AC_ERR_DEV && (tf.feature & ATA_ABORTED))
1238 return -EACCES;
1239 return -EIO;
1240 }
1e999736 1241
c728a914 1242 if (lba48)
a5987e0a 1243 *max_sectors = ata_tf_to_lba48(&tf) + 1;
c728a914 1244 else
a5987e0a 1245 *max_sectors = ata_tf_to_lba(&tf) + 1;
2dcb407e 1246 if (dev->horkage & ATA_HORKAGE_HPA_SIZE)
93328e11 1247 (*max_sectors)--;
c728a914 1248 return 0;
1e999736
AC
1249}
1250
1251/**
c728a914
TH
1252 * ata_set_max_sectors - Set max sectors
1253 * @dev: target device
6b38d1d1 1254 * @new_sectors: new max sectors value to set for the device
1e999736 1255 *
c728a914
TH
1256 * Set max sectors of @dev to @new_sectors.
1257 *
1258 * RETURNS:
1259 * 0 on success, -EACCES if command is aborted or denied (due to
1260 * previous non-volatile SET_MAX) by the drive. -EIO on other
1261 * errors.
1e999736 1262 */
05027adc 1263static int ata_set_max_sectors(struct ata_device *dev, u64 new_sectors)
1e999736 1264{
c728a914 1265 unsigned int err_mask;
1e999736 1266 struct ata_taskfile tf;
c728a914 1267 int lba48 = ata_id_has_lba48(dev->id);
1e999736
AC
1268
1269 new_sectors--;
1270
1271 ata_tf_init(dev, &tf);
1272
1e999736 1273 tf.flags |= ATA_TFLAG_DEVICE | ATA_TFLAG_ISADDR;
c728a914
TH
1274
1275 if (lba48) {
1276 tf.command = ATA_CMD_SET_MAX_EXT;
1277 tf.flags |= ATA_TFLAG_LBA48;
1278
1279 tf.hob_lbal = (new_sectors >> 24) & 0xff;
1280 tf.hob_lbam = (new_sectors >> 32) & 0xff;
1281 tf.hob_lbah = (new_sectors >> 40) & 0xff;
1e582ba4 1282 } else {
c728a914
TH
1283 tf.command = ATA_CMD_SET_MAX;
1284
1e582ba4
TH
1285 tf.device |= (new_sectors >> 24) & 0xf;
1286 }
1287
1e999736 1288 tf.protocol |= ATA_PROT_NODATA;
c728a914 1289 tf.device |= ATA_LBA;
1e999736
AC
1290
1291 tf.lbal = (new_sectors >> 0) & 0xff;
1292 tf.lbam = (new_sectors >> 8) & 0xff;
1293 tf.lbah = (new_sectors >> 16) & 0xff;
1e999736 1294
2b789108 1295 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0, 0);
c728a914 1296 if (err_mask) {
a9a79dfe
JP
1297 ata_dev_warn(dev,
1298 "failed to set max address (err_mask=0x%x)\n",
1299 err_mask);
c728a914
TH
1300 if (err_mask == AC_ERR_DEV &&
1301 (tf.feature & (ATA_ABORTED | ATA_IDNF)))
1302 return -EACCES;
1303 return -EIO;
1304 }
1305
c728a914 1306 return 0;
1e999736
AC
1307}
1308
1309/**
1310 * ata_hpa_resize - Resize a device with an HPA set
1311 * @dev: Device to resize
1312 *
1313 * Read the size of an LBA28 or LBA48 disk with HPA features and resize
1314 * it if required to the full size of the media. The caller must check
1315 * the drive has the HPA feature set enabled.
05027adc
TH
1316 *
1317 * RETURNS:
1318 * 0 on success, -errno on failure.
1e999736 1319 */
05027adc 1320static int ata_hpa_resize(struct ata_device *dev)
1e999736 1321{
05027adc
TH
1322 struct ata_eh_context *ehc = &dev->link->eh_context;
1323 int print_info = ehc->i.flags & ATA_EHI_PRINTINFO;
445d211b 1324 bool unlock_hpa = ata_ignore_hpa || dev->flags & ATA_DFLAG_UNLOCK_HPA;
05027adc
TH
1325 u64 sectors = ata_id_n_sectors(dev->id);
1326 u64 native_sectors;
c728a914 1327 int rc;
a617c09f 1328
05027adc
TH
1329 /* do we need to do it? */
1330 if (dev->class != ATA_DEV_ATA ||
1331 !ata_id_has_lba(dev->id) || !ata_id_hpa_enabled(dev->id) ||
1332 (dev->horkage & ATA_HORKAGE_BROKEN_HPA))
c728a914 1333 return 0;
1e999736 1334
05027adc
TH
1335 /* read native max address */
1336 rc = ata_read_native_max_address(dev, &native_sectors);
1337 if (rc) {
dda7aba1
TH
1338 /* If device aborted the command or HPA isn't going to
1339 * be unlocked, skip HPA resizing.
05027adc 1340 */
445d211b 1341 if (rc == -EACCES || !unlock_hpa) {
a9a79dfe
JP
1342 ata_dev_warn(dev,
1343 "HPA support seems broken, skipping HPA handling\n");
05027adc
TH
1344 dev->horkage |= ATA_HORKAGE_BROKEN_HPA;
1345
1346 /* we can continue if device aborted the command */
1347 if (rc == -EACCES)
1348 rc = 0;
1e999736 1349 }
37301a55 1350
05027adc
TH
1351 return rc;
1352 }
5920dadf 1353 dev->n_native_sectors = native_sectors;
05027adc
TH
1354
1355 /* nothing to do? */
445d211b 1356 if (native_sectors <= sectors || !unlock_hpa) {
05027adc
TH
1357 if (!print_info || native_sectors == sectors)
1358 return 0;
1359
1360 if (native_sectors > sectors)
a9a79dfe 1361 ata_dev_info(dev,
05027adc
TH
1362 "HPA detected: current %llu, native %llu\n",
1363 (unsigned long long)sectors,
1364 (unsigned long long)native_sectors);
1365 else if (native_sectors < sectors)
a9a79dfe
JP
1366 ata_dev_warn(dev,
1367 "native sectors (%llu) is smaller than sectors (%llu)\n",
05027adc
TH
1368 (unsigned long long)native_sectors,
1369 (unsigned long long)sectors);
1370 return 0;
1371 }
1372
1373 /* let's unlock HPA */
1374 rc = ata_set_max_sectors(dev, native_sectors);
1375 if (rc == -EACCES) {
1376 /* if device aborted the command, skip HPA resizing */
a9a79dfe
JP
1377 ata_dev_warn(dev,
1378 "device aborted resize (%llu -> %llu), skipping HPA handling\n",
1379 (unsigned long long)sectors,
1380 (unsigned long long)native_sectors);
05027adc
TH
1381 dev->horkage |= ATA_HORKAGE_BROKEN_HPA;
1382 return 0;
1383 } else if (rc)
1384 return rc;
1385
1386 /* re-read IDENTIFY data */
1387 rc = ata_dev_reread_id(dev, 0);
1388 if (rc) {
a9a79dfe
JP
1389 ata_dev_err(dev,
1390 "failed to re-read IDENTIFY data after HPA resizing\n");
05027adc
TH
1391 return rc;
1392 }
1393
1394 if (print_info) {
1395 u64 new_sectors = ata_id_n_sectors(dev->id);
a9a79dfe 1396 ata_dev_info(dev,
05027adc
TH
1397 "HPA unlocked: %llu -> %llu, native %llu\n",
1398 (unsigned long long)sectors,
1399 (unsigned long long)new_sectors,
1400 (unsigned long long)native_sectors);
1401 }
1402
1403 return 0;
1e999736
AC
1404}
1405
1da177e4
LT
1406/**
1407 * ata_dump_id - IDENTIFY DEVICE info debugging output
0bd3300a 1408 * @id: IDENTIFY DEVICE page to dump
1da177e4 1409 *
0bd3300a
TH
1410 * Dump selected 16-bit words from the given IDENTIFY DEVICE
1411 * page.
1da177e4
LT
1412 *
1413 * LOCKING:
1414 * caller.
1415 */
1416
0bd3300a 1417static inline void ata_dump_id(const u16 *id)
1da177e4
LT
1418{
1419 DPRINTK("49==0x%04x "
1420 "53==0x%04x "
1421 "63==0x%04x "
1422 "64==0x%04x "
1423 "75==0x%04x \n",
0bd3300a
TH
1424 id[49],
1425 id[53],
1426 id[63],
1427 id[64],
1428 id[75]);
1da177e4
LT
1429 DPRINTK("80==0x%04x "
1430 "81==0x%04x "
1431 "82==0x%04x "
1432 "83==0x%04x "
1433 "84==0x%04x \n",
0bd3300a
TH
1434 id[80],
1435 id[81],
1436 id[82],
1437 id[83],
1438 id[84]);
1da177e4
LT
1439 DPRINTK("88==0x%04x "
1440 "93==0x%04x\n",
0bd3300a
TH
1441 id[88],
1442 id[93]);
1da177e4
LT
1443}
1444
cb95d562
TH
1445/**
1446 * ata_id_xfermask - Compute xfermask from the given IDENTIFY data
1447 * @id: IDENTIFY data to compute xfer mask from
1448 *
1449 * Compute the xfermask for this device. This is not as trivial
1450 * as it seems if we must consider early devices correctly.
1451 *
1452 * FIXME: pre IDE drive timing (do we care ?).
1453 *
1454 * LOCKING:
1455 * None.
1456 *
1457 * RETURNS:
1458 * Computed xfermask
1459 */
7dc951ae 1460unsigned long ata_id_xfermask(const u16 *id)
cb95d562 1461{
7dc951ae 1462 unsigned long pio_mask, mwdma_mask, udma_mask;
cb95d562
TH
1463
1464 /* Usual case. Word 53 indicates word 64 is valid */
1465 if (id[ATA_ID_FIELD_VALID] & (1 << 1)) {
1466 pio_mask = id[ATA_ID_PIO_MODES] & 0x03;
1467 pio_mask <<= 3;
1468 pio_mask |= 0x7;
1469 } else {
1470 /* If word 64 isn't valid then Word 51 high byte holds
1471 * the PIO timing number for the maximum. Turn it into
1472 * a mask.
1473 */
7a0f1c8a 1474 u8 mode = (id[ATA_ID_OLD_PIO_MODES] >> 8) & 0xFF;
46767aeb 1475 if (mode < 5) /* Valid PIO range */
2dcb407e 1476 pio_mask = (2 << mode) - 1;
46767aeb
AC
1477 else
1478 pio_mask = 1;
cb95d562
TH
1479
1480 /* But wait.. there's more. Design your standards by
1481 * committee and you too can get a free iordy field to
1482 * process. However its the speeds not the modes that
1483 * are supported... Note drivers using the timing API
1484 * will get this right anyway
1485 */
1486 }
1487
1488 mwdma_mask = id[ATA_ID_MWDMA_MODES] & 0x07;
fb21f0d0 1489
b352e57d
AC
1490 if (ata_id_is_cfa(id)) {
1491 /*
1492 * Process compact flash extended modes
1493 */
62afe5d7
SS
1494 int pio = (id[ATA_ID_CFA_MODES] >> 0) & 0x7;
1495 int dma = (id[ATA_ID_CFA_MODES] >> 3) & 0x7;
b352e57d
AC
1496
1497 if (pio)
1498 pio_mask |= (1 << 5);
1499 if (pio > 1)
1500 pio_mask |= (1 << 6);
1501 if (dma)
1502 mwdma_mask |= (1 << 3);
1503 if (dma > 1)
1504 mwdma_mask |= (1 << 4);
1505 }
1506
fb21f0d0
TH
1507 udma_mask = 0;
1508 if (id[ATA_ID_FIELD_VALID] & (1 << 2))
1509 udma_mask = id[ATA_ID_UDMA_MODES] & 0xff;
cb95d562
TH
1510
1511 return ata_pack_xfermask(pio_mask, mwdma_mask, udma_mask);
1512}
1513
7102d230 1514static void ata_qc_complete_internal(struct ata_queued_cmd *qc)
a2a7a662 1515{
77853bf2 1516 struct completion *waiting = qc->private_data;
a2a7a662 1517
a2a7a662 1518 complete(waiting);
a2a7a662
TH
1519}
1520
1521/**
2432697b 1522 * ata_exec_internal_sg - execute libata internal command
a2a7a662
TH
1523 * @dev: Device to which the command is sent
1524 * @tf: Taskfile registers for the command and the result
d69cf37d 1525 * @cdb: CDB for packet command
a2a7a662 1526 * @dma_dir: Data tranfer direction of the command
5c1ad8b3 1527 * @sgl: sg list for the data buffer of the command
2432697b 1528 * @n_elem: Number of sg entries
2b789108 1529 * @timeout: Timeout in msecs (0 for default)
a2a7a662
TH
1530 *
1531 * Executes libata internal command with timeout. @tf contains
1532 * command on entry and result on return. Timeout and error
1533 * conditions are reported via return value. No recovery action
1534 * is taken after a command times out. It's caller's duty to
1535 * clean up after timeout.
1536 *
1537 * LOCKING:
1538 * None. Should be called with kernel context, might sleep.
551e8889
TH
1539 *
1540 * RETURNS:
1541 * Zero on success, AC_ERR_* mask on failure
a2a7a662 1542 */
2432697b
TH
1543unsigned ata_exec_internal_sg(struct ata_device *dev,
1544 struct ata_taskfile *tf, const u8 *cdb,
87260216 1545 int dma_dir, struct scatterlist *sgl,
2b789108 1546 unsigned int n_elem, unsigned long timeout)
a2a7a662 1547{
9af5c9c9
TH
1548 struct ata_link *link = dev->link;
1549 struct ata_port *ap = link->ap;
a2a7a662 1550 u8 command = tf->command;
87fbc5a0 1551 int auto_timeout = 0;
a2a7a662 1552 struct ata_queued_cmd *qc;
2ab7db1f 1553 unsigned int tag, preempted_tag;
dedaf2b0 1554 u32 preempted_sactive, preempted_qc_active;
da917d69 1555 int preempted_nr_active_links;
60be6b9a 1556 DECLARE_COMPLETION_ONSTACK(wait);
a2a7a662 1557 unsigned long flags;
77853bf2 1558 unsigned int err_mask;
d95a717f 1559 int rc;
a2a7a662 1560
ba6a1308 1561 spin_lock_irqsave(ap->lock, flags);
a2a7a662 1562
e3180499 1563 /* no internal command while frozen */
b51e9e5d 1564 if (ap->pflags & ATA_PFLAG_FROZEN) {
ba6a1308 1565 spin_unlock_irqrestore(ap->lock, flags);
e3180499
TH
1566 return AC_ERR_SYSTEM;
1567 }
1568
2ab7db1f 1569 /* initialize internal qc */
a2a7a662 1570
2ab7db1f
TH
1571 /* XXX: Tag 0 is used for drivers with legacy EH as some
1572 * drivers choke if any other tag is given. This breaks
1573 * ata_tag_internal() test for those drivers. Don't use new
1574 * EH stuff without converting to it.
1575 */
1576 if (ap->ops->error_handler)
1577 tag = ATA_TAG_INTERNAL;
1578 else
1579 tag = 0;
1580
8a8bc223
TH
1581 if (test_and_set_bit(tag, &ap->qc_allocated))
1582 BUG();
f69499f4 1583 qc = __ata_qc_from_tag(ap, tag);
2ab7db1f
TH
1584
1585 qc->tag = tag;
1586 qc->scsicmd = NULL;
1587 qc->ap = ap;
1588 qc->dev = dev;
1589 ata_qc_reinit(qc);
1590
9af5c9c9
TH
1591 preempted_tag = link->active_tag;
1592 preempted_sactive = link->sactive;
dedaf2b0 1593 preempted_qc_active = ap->qc_active;
da917d69 1594 preempted_nr_active_links = ap->nr_active_links;
9af5c9c9
TH
1595 link->active_tag = ATA_TAG_POISON;
1596 link->sactive = 0;
dedaf2b0 1597 ap->qc_active = 0;
da917d69 1598 ap->nr_active_links = 0;
2ab7db1f
TH
1599
1600 /* prepare & issue qc */
a2a7a662 1601 qc->tf = *tf;
d69cf37d
TH
1602 if (cdb)
1603 memcpy(qc->cdb, cdb, ATAPI_CDB_LEN);
e61e0672 1604 qc->flags |= ATA_QCFLAG_RESULT_TF;
a2a7a662
TH
1605 qc->dma_dir = dma_dir;
1606 if (dma_dir != DMA_NONE) {
2432697b 1607 unsigned int i, buflen = 0;
87260216 1608 struct scatterlist *sg;
2432697b 1609
87260216
JA
1610 for_each_sg(sgl, sg, n_elem, i)
1611 buflen += sg->length;
2432697b 1612
87260216 1613 ata_sg_init(qc, sgl, n_elem);
49c80429 1614 qc->nbytes = buflen;
a2a7a662
TH
1615 }
1616
77853bf2 1617 qc->private_data = &wait;
a2a7a662
TH
1618 qc->complete_fn = ata_qc_complete_internal;
1619
8e0e694a 1620 ata_qc_issue(qc);
a2a7a662 1621
ba6a1308 1622 spin_unlock_irqrestore(ap->lock, flags);
a2a7a662 1623
87fbc5a0
TH
1624 if (!timeout) {
1625 if (ata_probe_timeout)
1626 timeout = ata_probe_timeout * 1000;
1627 else {
1628 timeout = ata_internal_cmd_timeout(dev, command);
1629 auto_timeout = 1;
1630 }
1631 }
2b789108 1632
c0c362b6
TH
1633 if (ap->ops->error_handler)
1634 ata_eh_release(ap);
1635
2b789108 1636 rc = wait_for_completion_timeout(&wait, msecs_to_jiffies(timeout));
d95a717f 1637
c0c362b6
TH
1638 if (ap->ops->error_handler)
1639 ata_eh_acquire(ap);
1640
c429137a 1641 ata_sff_flush_pio_task(ap);
41ade50c 1642
d95a717f 1643 if (!rc) {
ba6a1308 1644 spin_lock_irqsave(ap->lock, flags);
a2a7a662
TH
1645
1646 /* We're racing with irq here. If we lose, the
1647 * following test prevents us from completing the qc
d95a717f
TH
1648 * twice. If we win, the port is frozen and will be
1649 * cleaned up by ->post_internal_cmd().
a2a7a662 1650 */
77853bf2 1651 if (qc->flags & ATA_QCFLAG_ACTIVE) {
d95a717f
TH
1652 qc->err_mask |= AC_ERR_TIMEOUT;
1653
1654 if (ap->ops->error_handler)
1655 ata_port_freeze(ap);
1656 else
1657 ata_qc_complete(qc);
f15a1daf 1658
0dd4b21f 1659 if (ata_msg_warn(ap))
a9a79dfe
JP
1660 ata_dev_warn(dev, "qc timeout (cmd 0x%x)\n",
1661 command);
a2a7a662
TH
1662 }
1663
ba6a1308 1664 spin_unlock_irqrestore(ap->lock, flags);
a2a7a662
TH
1665 }
1666
d95a717f
TH
1667 /* do post_internal_cmd */
1668 if (ap->ops->post_internal_cmd)
1669 ap->ops->post_internal_cmd(qc);
1670
a51d644a
TH
1671 /* perform minimal error analysis */
1672 if (qc->flags & ATA_QCFLAG_FAILED) {
1673 if (qc->result_tf.command & (ATA_ERR | ATA_DF))
1674 qc->err_mask |= AC_ERR_DEV;
1675
1676 if (!qc->err_mask)
1677 qc->err_mask |= AC_ERR_OTHER;
1678
1679 if (qc->err_mask & ~AC_ERR_OTHER)
1680 qc->err_mask &= ~AC_ERR_OTHER;
d95a717f
TH
1681 }
1682
15869303 1683 /* finish up */
ba6a1308 1684 spin_lock_irqsave(ap->lock, flags);
15869303 1685
e61e0672 1686 *tf = qc->result_tf;
77853bf2
TH
1687 err_mask = qc->err_mask;
1688
1689 ata_qc_free(qc);
9af5c9c9
TH
1690 link->active_tag = preempted_tag;
1691 link->sactive = preempted_sactive;
dedaf2b0 1692 ap->qc_active = preempted_qc_active;
da917d69 1693 ap->nr_active_links = preempted_nr_active_links;
77853bf2 1694
ba6a1308 1695 spin_unlock_irqrestore(ap->lock, flags);
15869303 1696
87fbc5a0
TH
1697 if ((err_mask & AC_ERR_TIMEOUT) && auto_timeout)
1698 ata_internal_cmd_timed_out(dev, command);
1699
77853bf2 1700 return err_mask;
a2a7a662
TH
1701}
1702
2432697b 1703/**
33480a0e 1704 * ata_exec_internal - execute libata internal command
2432697b
TH
1705 * @dev: Device to which the command is sent
1706 * @tf: Taskfile registers for the command and the result
1707 * @cdb: CDB for packet command
1708 * @dma_dir: Data tranfer direction of the command
1709 * @buf: Data buffer of the command
1710 * @buflen: Length of data buffer
2b789108 1711 * @timeout: Timeout in msecs (0 for default)
2432697b
TH
1712 *
1713 * Wrapper around ata_exec_internal_sg() which takes simple
1714 * buffer instead of sg list.
1715 *
1716 * LOCKING:
1717 * None. Should be called with kernel context, might sleep.
1718 *
1719 * RETURNS:
1720 * Zero on success, AC_ERR_* mask on failure
1721 */
1722unsigned ata_exec_internal(struct ata_device *dev,
1723 struct ata_taskfile *tf, const u8 *cdb,
2b789108
TH
1724 int dma_dir, void *buf, unsigned int buflen,
1725 unsigned long timeout)
2432697b 1726{
33480a0e
TH
1727 struct scatterlist *psg = NULL, sg;
1728 unsigned int n_elem = 0;
2432697b 1729
33480a0e
TH
1730 if (dma_dir != DMA_NONE) {
1731 WARN_ON(!buf);
1732 sg_init_one(&sg, buf, buflen);
1733 psg = &sg;
1734 n_elem++;
1735 }
2432697b 1736
2b789108
TH
1737 return ata_exec_internal_sg(dev, tf, cdb, dma_dir, psg, n_elem,
1738 timeout);
2432697b
TH
1739}
1740
977e6b9f
TH
1741/**
1742 * ata_do_simple_cmd - execute simple internal command
1743 * @dev: Device to which the command is sent
1744 * @cmd: Opcode to execute
1745 *
1746 * Execute a 'simple' command, that only consists of the opcode
1747 * 'cmd' itself, without filling any other registers
1748 *
1749 * LOCKING:
1750 * Kernel thread context (may sleep).
1751 *
1752 * RETURNS:
1753 * Zero on success, AC_ERR_* mask on failure
e58eb583 1754 */
77b08fb5 1755unsigned int ata_do_simple_cmd(struct ata_device *dev, u8 cmd)
e58eb583
TH
1756{
1757 struct ata_taskfile tf;
e58eb583
TH
1758
1759 ata_tf_init(dev, &tf);
1760
1761 tf.command = cmd;
1762 tf.flags |= ATA_TFLAG_DEVICE;
1763 tf.protocol = ATA_PROT_NODATA;
1764
2b789108 1765 return ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0, 0);
e58eb583
TH
1766}
1767
1bc4ccff
AC
1768/**
1769 * ata_pio_need_iordy - check if iordy needed
1770 * @adev: ATA device
1771 *
1772 * Check if the current speed of the device requires IORDY. Used
1773 * by various controllers for chip configuration.
1774 */
1bc4ccff
AC
1775unsigned int ata_pio_need_iordy(const struct ata_device *adev)
1776{
0d9e6659
TH
1777 /* Don't set IORDY if we're preparing for reset. IORDY may
1778 * lead to controller lock up on certain controllers if the
1779 * port is not occupied. See bko#11703 for details.
1780 */
1781 if (adev->link->ap->pflags & ATA_PFLAG_RESETTING)
1782 return 0;
1783 /* Controller doesn't support IORDY. Probably a pointless
1784 * check as the caller should know this.
1785 */
9af5c9c9 1786 if (adev->link->ap->flags & ATA_FLAG_NO_IORDY)
1bc4ccff 1787 return 0;
5c18c4d2
DD
1788 /* CF spec. r4.1 Table 22 says no iordy on PIO5 and PIO6. */
1789 if (ata_id_is_cfa(adev->id)
1790 && (adev->pio_mode == XFER_PIO_5 || adev->pio_mode == XFER_PIO_6))
1791 return 0;
432729f0
AC
1792 /* PIO3 and higher it is mandatory */
1793 if (adev->pio_mode > XFER_PIO_2)
1794 return 1;
1795 /* We turn it on when possible */
1796 if (ata_id_has_iordy(adev->id))
1bc4ccff 1797 return 1;
432729f0
AC
1798 return 0;
1799}
2e9edbf8 1800
432729f0
AC
1801/**
1802 * ata_pio_mask_no_iordy - Return the non IORDY mask
1803 * @adev: ATA device
1804 *
1805 * Compute the highest mode possible if we are not using iordy. Return
1806 * -1 if no iordy mode is available.
1807 */
432729f0
AC
1808static u32 ata_pio_mask_no_iordy(const struct ata_device *adev)
1809{
1bc4ccff 1810 /* If we have no drive specific rule, then PIO 2 is non IORDY */
1bc4ccff 1811 if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE */
432729f0 1812 u16 pio = adev->id[ATA_ID_EIDE_PIO];
1bc4ccff
AC
1813 /* Is the speed faster than the drive allows non IORDY ? */
1814 if (pio) {
1815 /* This is cycle times not frequency - watch the logic! */
1816 if (pio > 240) /* PIO2 is 240nS per cycle */
432729f0
AC
1817 return 3 << ATA_SHIFT_PIO;
1818 return 7 << ATA_SHIFT_PIO;
1bc4ccff
AC
1819 }
1820 }
432729f0 1821 return 3 << ATA_SHIFT_PIO;
1bc4ccff
AC
1822}
1823
963e4975
AC
1824/**
1825 * ata_do_dev_read_id - default ID read method
1826 * @dev: device
1827 * @tf: proposed taskfile
1828 * @id: data buffer
1829 *
1830 * Issue the identify taskfile and hand back the buffer containing
1831 * identify data. For some RAID controllers and for pre ATA devices
1832 * this function is wrapped or replaced by the driver
1833 */
1834unsigned int ata_do_dev_read_id(struct ata_device *dev,
1835 struct ata_taskfile *tf, u16 *id)
1836{
1837 return ata_exec_internal(dev, tf, NULL, DMA_FROM_DEVICE,
1838 id, sizeof(id[0]) * ATA_ID_WORDS, 0);
1839}
1840
1da177e4 1841/**
49016aca 1842 * ata_dev_read_id - Read ID data from the specified device
49016aca
TH
1843 * @dev: target device
1844 * @p_class: pointer to class of the target device (may be changed)
bff04647 1845 * @flags: ATA_READID_* flags
fe635c7e 1846 * @id: buffer to read IDENTIFY data into
1da177e4 1847 *
49016aca
TH
1848 * Read ID data from the specified device. ATA_CMD_ID_ATA is
1849 * performed on ATA devices and ATA_CMD_ID_ATAPI on ATAPI
aec5c3c1
TH
1850 * devices. This function also issues ATA_CMD_INIT_DEV_PARAMS
1851 * for pre-ATA4 drives.
1da177e4 1852 *
50a99018 1853 * FIXME: ATA_CMD_ID_ATA is optional for early drives and right
2dcb407e 1854 * now we abort if we hit that case.
50a99018 1855 *
1da177e4 1856 * LOCKING:
49016aca
TH
1857 * Kernel thread context (may sleep)
1858 *
1859 * RETURNS:
1860 * 0 on success, -errno otherwise.
1da177e4 1861 */
a9beec95 1862int ata_dev_read_id(struct ata_device *dev, unsigned int *p_class,
bff04647 1863 unsigned int flags, u16 *id)
1da177e4 1864{
9af5c9c9 1865 struct ata_port *ap = dev->link->ap;
49016aca 1866 unsigned int class = *p_class;
a0123703 1867 struct ata_taskfile tf;
49016aca
TH
1868 unsigned int err_mask = 0;
1869 const char *reason;
79b42bab 1870 bool is_semb = class == ATA_DEV_SEMB;
54936f8b 1871 int may_fallback = 1, tried_spinup = 0;
49016aca 1872 int rc;
1da177e4 1873
0dd4b21f 1874 if (ata_msg_ctl(ap))
a9a79dfe 1875 ata_dev_dbg(dev, "%s: ENTER\n", __func__);
1da177e4 1876
963e4975 1877retry:
3373efd8 1878 ata_tf_init(dev, &tf);
a0123703 1879
49016aca 1880 switch (class) {
79b42bab
TH
1881 case ATA_DEV_SEMB:
1882 class = ATA_DEV_ATA; /* some hard drives report SEMB sig */
49016aca 1883 case ATA_DEV_ATA:
a0123703 1884 tf.command = ATA_CMD_ID_ATA;
49016aca
TH
1885 break;
1886 case ATA_DEV_ATAPI:
a0123703 1887 tf.command = ATA_CMD_ID_ATAPI;
49016aca
TH
1888 break;
1889 default:
1890 rc = -ENODEV;
1891 reason = "unsupported class";
1892 goto err_out;
1da177e4
LT
1893 }
1894
a0123703 1895 tf.protocol = ATA_PROT_PIO;
81afe893
TH
1896
1897 /* Some devices choke if TF registers contain garbage. Make
1898 * sure those are properly initialized.
1899 */
1900 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
1901
1902 /* Device presence detection is unreliable on some
1903 * controllers. Always poll IDENTIFY if available.
1904 */
1905 tf.flags |= ATA_TFLAG_POLLING;
1da177e4 1906
963e4975
AC
1907 if (ap->ops->read_id)
1908 err_mask = ap->ops->read_id(dev, &tf, id);
1909 else
1910 err_mask = ata_do_dev_read_id(dev, &tf, id);
1911
a0123703 1912 if (err_mask) {
800b3996 1913 if (err_mask & AC_ERR_NODEV_HINT) {
a9a79dfe 1914 ata_dev_dbg(dev, "NODEV after polling detection\n");
55a8e2c8
TH
1915 return -ENOENT;
1916 }
1917
79b42bab 1918 if (is_semb) {
a9a79dfe
JP
1919 ata_dev_info(dev,
1920 "IDENTIFY failed on device w/ SEMB sig, disabled\n");
79b42bab
TH
1921 /* SEMB is not supported yet */
1922 *p_class = ATA_DEV_SEMB_UNSUP;
1923 return 0;
1924 }
1925
1ffc151f
TH
1926 if ((err_mask == AC_ERR_DEV) && (tf.feature & ATA_ABORTED)) {
1927 /* Device or controller might have reported
1928 * the wrong device class. Give a shot at the
1929 * other IDENTIFY if the current one is
1930 * aborted by the device.
1931 */
1932 if (may_fallback) {
1933 may_fallback = 0;
1934
1935 if (class == ATA_DEV_ATA)
1936 class = ATA_DEV_ATAPI;
1937 else
1938 class = ATA_DEV_ATA;
1939 goto retry;
1940 }
1941
1942 /* Control reaches here iff the device aborted
1943 * both flavors of IDENTIFYs which happens
1944 * sometimes with phantom devices.
1945 */
a9a79dfe
JP
1946 ata_dev_dbg(dev,
1947 "both IDENTIFYs aborted, assuming NODEV\n");
1ffc151f 1948 return -ENOENT;
54936f8b
TH
1949 }
1950
49016aca
TH
1951 rc = -EIO;
1952 reason = "I/O error";
1da177e4
LT
1953 goto err_out;
1954 }
1955
43c9c591 1956 if (dev->horkage & ATA_HORKAGE_DUMP_ID) {
a9a79dfe
JP
1957 ata_dev_dbg(dev, "dumping IDENTIFY data, "
1958 "class=%d may_fallback=%d tried_spinup=%d\n",
1959 class, may_fallback, tried_spinup);
43c9c591
TH
1960 print_hex_dump(KERN_DEBUG, "", DUMP_PREFIX_OFFSET,
1961 16, 2, id, ATA_ID_WORDS * sizeof(*id), true);
1962 }
1963
54936f8b
TH
1964 /* Falling back doesn't make sense if ID data was read
1965 * successfully at least once.
1966 */
1967 may_fallback = 0;
1968
49016aca 1969 swap_buf_le16(id, ATA_ID_WORDS);
1da177e4 1970
49016aca 1971 /* sanity check */
a4f5749b 1972 rc = -EINVAL;
6070068b 1973 reason = "device reports invalid type";
a4f5749b
TH
1974
1975 if (class == ATA_DEV_ATA) {
1976 if (!ata_id_is_ata(id) && !ata_id_is_cfa(id))
1977 goto err_out;
db63a4c8
AW
1978 if (ap->host->flags & ATA_HOST_IGNORE_ATA &&
1979 ata_id_is_ata(id)) {
1980 ata_dev_dbg(dev,
1981 "host indicates ignore ATA devices, ignored\n");
1982 return -ENOENT;
1983 }
a4f5749b
TH
1984 } else {
1985 if (ata_id_is_ata(id))
1986 goto err_out;
49016aca
TH
1987 }
1988
169439c2
ML
1989 if (!tried_spinup && (id[2] == 0x37c8 || id[2] == 0x738c)) {
1990 tried_spinup = 1;
1991 /*
1992 * Drive powered-up in standby mode, and requires a specific
1993 * SET_FEATURES spin-up subcommand before it will accept
1994 * anything other than the original IDENTIFY command.
1995 */
218f3d30 1996 err_mask = ata_dev_set_feature(dev, SETFEATURES_SPINUP, 0);
fb0582f9 1997 if (err_mask && id[2] != 0x738c) {
169439c2
ML
1998 rc = -EIO;
1999 reason = "SPINUP failed";
2000 goto err_out;
2001 }
2002 /*
2003 * If the drive initially returned incomplete IDENTIFY info,
2004 * we now must reissue the IDENTIFY command.
2005 */
2006 if (id[2] == 0x37c8)
2007 goto retry;
2008 }
2009
bff04647 2010 if ((flags & ATA_READID_POSTRESET) && class == ATA_DEV_ATA) {
49016aca
TH
2011 /*
2012 * The exact sequence expected by certain pre-ATA4 drives is:
2013 * SRST RESET
50a99018
AC
2014 * IDENTIFY (optional in early ATA)
2015 * INITIALIZE DEVICE PARAMETERS (later IDE and ATA)
49016aca
TH
2016 * anything else..
2017 * Some drives were very specific about that exact sequence.
50a99018
AC
2018 *
2019 * Note that ATA4 says lba is mandatory so the second check
c9404c9c 2020 * should never trigger.
49016aca
TH
2021 */
2022 if (ata_id_major_version(id) < 4 || !ata_id_has_lba(id)) {
3373efd8 2023 err_mask = ata_dev_init_params(dev, id[3], id[6]);
49016aca
TH
2024 if (err_mask) {
2025 rc = -EIO;
2026 reason = "INIT_DEV_PARAMS failed";
2027 goto err_out;
2028 }
2029
2030 /* current CHS translation info (id[53-58]) might be
2031 * changed. reread the identify device info.
2032 */
bff04647 2033 flags &= ~ATA_READID_POSTRESET;
49016aca
TH
2034 goto retry;
2035 }
2036 }
2037
2038 *p_class = class;
fe635c7e 2039
49016aca
TH
2040 return 0;
2041
2042 err_out:
88574551 2043 if (ata_msg_warn(ap))
a9a79dfe
JP
2044 ata_dev_warn(dev, "failed to IDENTIFY (%s, err_mask=0x%x)\n",
2045 reason, err_mask);
49016aca
TH
2046 return rc;
2047}
2048
9062712f
TH
2049static int ata_do_link_spd_horkage(struct ata_device *dev)
2050{
2051 struct ata_link *plink = ata_dev_phys_link(dev);
2052 u32 target, target_limit;
2053
2054 if (!sata_scr_valid(plink))
2055 return 0;
2056
2057 if (dev->horkage & ATA_HORKAGE_1_5_GBPS)
2058 target = 1;
2059 else
2060 return 0;
2061
2062 target_limit = (1 << target) - 1;
2063
2064 /* if already on stricter limit, no need to push further */
2065 if (plink->sata_spd_limit <= target_limit)
2066 return 0;
2067
2068 plink->sata_spd_limit = target_limit;
2069
2070 /* Request another EH round by returning -EAGAIN if link is
2071 * going faster than the target speed. Forward progress is
2072 * guaranteed by setting sata_spd_limit to target_limit above.
2073 */
2074 if (plink->sata_spd > target) {
a9a79dfe
JP
2075 ata_dev_info(dev, "applying link speed limit horkage to %s\n",
2076 sata_spd_string(target));
9062712f
TH
2077 return -EAGAIN;
2078 }
2079 return 0;
2080}
2081
3373efd8 2082static inline u8 ata_dev_knobble(struct ata_device *dev)
4b2f3ede 2083{
9af5c9c9 2084 struct ata_port *ap = dev->link->ap;
9ce8e307
JA
2085
2086 if (ata_dev_blacklisted(dev) & ATA_HORKAGE_BRIDGE_OK)
2087 return 0;
2088
9af5c9c9 2089 return ((ap->cbl == ATA_CBL_SATA) && (!ata_id_is_sata(dev->id)));
4b2f3ede
TH
2090}
2091
388539f3 2092static int ata_dev_config_ncq(struct ata_device *dev,
a6e6ce8e
TH
2093 char *desc, size_t desc_sz)
2094{
9af5c9c9 2095 struct ata_port *ap = dev->link->ap;
a6e6ce8e 2096 int hdepth = 0, ddepth = ata_id_queue_depth(dev->id);
388539f3
SL
2097 unsigned int err_mask;
2098 char *aa_desc = "";
a6e6ce8e
TH
2099
2100 if (!ata_id_has_ncq(dev->id)) {
2101 desc[0] = '\0';
388539f3 2102 return 0;
a6e6ce8e 2103 }
75683fe7 2104 if (dev->horkage & ATA_HORKAGE_NONCQ) {
6919a0a6 2105 snprintf(desc, desc_sz, "NCQ (not used)");
388539f3 2106 return 0;
6919a0a6 2107 }
a6e6ce8e 2108 if (ap->flags & ATA_FLAG_NCQ) {
cca3974e 2109 hdepth = min(ap->scsi_host->can_queue, ATA_MAX_QUEUE - 1);
a6e6ce8e
TH
2110 dev->flags |= ATA_DFLAG_NCQ;
2111 }
2112
388539f3
SL
2113 if (!(dev->horkage & ATA_HORKAGE_BROKEN_FPDMA_AA) &&
2114 (ap->flags & ATA_FLAG_FPDMA_AA) &&
2115 ata_id_has_fpdma_aa(dev->id)) {
2116 err_mask = ata_dev_set_feature(dev, SETFEATURES_SATA_ENABLE,
2117 SATA_FPDMA_AA);
2118 if (err_mask) {
a9a79dfe
JP
2119 ata_dev_err(dev,
2120 "failed to enable AA (error_mask=0x%x)\n",
2121 err_mask);
388539f3
SL
2122 if (err_mask != AC_ERR_DEV) {
2123 dev->horkage |= ATA_HORKAGE_BROKEN_FPDMA_AA;
2124 return -EIO;
2125 }
2126 } else
2127 aa_desc = ", AA";
2128 }
2129
a6e6ce8e 2130 if (hdepth >= ddepth)
388539f3 2131 snprintf(desc, desc_sz, "NCQ (depth %d)%s", ddepth, aa_desc);
a6e6ce8e 2132 else
388539f3
SL
2133 snprintf(desc, desc_sz, "NCQ (depth %d/%d)%s", hdepth,
2134 ddepth, aa_desc);
2135 return 0;
a6e6ce8e
TH
2136}
2137
49016aca 2138/**
ffeae418 2139 * ata_dev_configure - Configure the specified ATA/ATAPI device
ffeae418
TH
2140 * @dev: Target device to configure
2141 *
2142 * Configure @dev according to @dev->id. Generic and low-level
2143 * driver specific fixups are also applied.
49016aca
TH
2144 *
2145 * LOCKING:
ffeae418
TH
2146 * Kernel thread context (may sleep)
2147 *
2148 * RETURNS:
2149 * 0 on success, -errno otherwise
49016aca 2150 */
efdaedc4 2151int ata_dev_configure(struct ata_device *dev)
49016aca 2152{
9af5c9c9
TH
2153 struct ata_port *ap = dev->link->ap;
2154 struct ata_eh_context *ehc = &dev->link->eh_context;
6746544c 2155 int print_info = ehc->i.flags & ATA_EHI_PRINTINFO;
1148c3a7 2156 const u16 *id = dev->id;
7dc951ae 2157 unsigned long xfer_mask;
65fe1f0f 2158 unsigned int err_mask;
b352e57d 2159 char revbuf[7]; /* XYZ-99\0 */
3f64f565
EM
2160 char fwrevbuf[ATA_ID_FW_REV_LEN+1];
2161 char modelbuf[ATA_ID_PROD_LEN+1];
e6d902a3 2162 int rc;
49016aca 2163
0dd4b21f 2164 if (!ata_dev_enabled(dev) && ata_msg_info(ap)) {
a9a79dfe 2165 ata_dev_info(dev, "%s: ENTER/EXIT -- nodev\n", __func__);
ffeae418 2166 return 0;
49016aca
TH
2167 }
2168
0dd4b21f 2169 if (ata_msg_probe(ap))
a9a79dfe 2170 ata_dev_dbg(dev, "%s: ENTER\n", __func__);
1da177e4 2171
75683fe7
TH
2172 /* set horkage */
2173 dev->horkage |= ata_dev_blacklisted(dev);
33267325 2174 ata_force_horkage(dev);
75683fe7 2175
50af2fa1 2176 if (dev->horkage & ATA_HORKAGE_DISABLE) {
a9a79dfe 2177 ata_dev_info(dev, "unsupported device, disabling\n");
50af2fa1
TH
2178 ata_dev_disable(dev);
2179 return 0;
2180 }
2181
2486fa56
TH
2182 if ((!atapi_enabled || (ap->flags & ATA_FLAG_NO_ATAPI)) &&
2183 dev->class == ATA_DEV_ATAPI) {
a9a79dfe
JP
2184 ata_dev_warn(dev, "WARNING: ATAPI is %s, device ignored\n",
2185 atapi_enabled ? "not supported with this driver"
2186 : "disabled");
2486fa56
TH
2187 ata_dev_disable(dev);
2188 return 0;
2189 }
2190
9062712f
TH
2191 rc = ata_do_link_spd_horkage(dev);
2192 if (rc)
2193 return rc;
2194
6746544c
TH
2195 /* let ACPI work its magic */
2196 rc = ata_acpi_on_devcfg(dev);
2197 if (rc)
2198 return rc;
08573a86 2199
05027adc
TH
2200 /* massage HPA, do it early as it might change IDENTIFY data */
2201 rc = ata_hpa_resize(dev);
2202 if (rc)
2203 return rc;
2204
c39f5ebe 2205 /* print device capabilities */
0dd4b21f 2206 if (ata_msg_probe(ap))
a9a79dfe
JP
2207 ata_dev_dbg(dev,
2208 "%s: cfg 49:%04x 82:%04x 83:%04x 84:%04x "
2209 "85:%04x 86:%04x 87:%04x 88:%04x\n",
2210 __func__,
2211 id[49], id[82], id[83], id[84],
2212 id[85], id[86], id[87], id[88]);
c39f5ebe 2213
208a9933 2214 /* initialize to-be-configured parameters */
ea1dd4e1 2215 dev->flags &= ~ATA_DFLAG_CFG_MASK;
208a9933
TH
2216 dev->max_sectors = 0;
2217 dev->cdb_len = 0;
2218 dev->n_sectors = 0;
2219 dev->cylinders = 0;
2220 dev->heads = 0;
2221 dev->sectors = 0;
e18086d6 2222 dev->multi_count = 0;
208a9933 2223
1da177e4
LT
2224 /*
2225 * common ATA, ATAPI feature tests
2226 */
2227
ff8854b2 2228 /* find max transfer mode; for printk only */
1148c3a7 2229 xfer_mask = ata_id_xfermask(id);
1da177e4 2230
0dd4b21f
BP
2231 if (ata_msg_probe(ap))
2232 ata_dump_id(id);
1da177e4 2233
ef143d57
AL
2234 /* SCSI only uses 4-char revisions, dump full 8 chars from ATA */
2235 ata_id_c_string(dev->id, fwrevbuf, ATA_ID_FW_REV,
2236 sizeof(fwrevbuf));
2237
2238 ata_id_c_string(dev->id, modelbuf, ATA_ID_PROD,
2239 sizeof(modelbuf));
2240
1da177e4
LT
2241 /* ATA-specific feature tests */
2242 if (dev->class == ATA_DEV_ATA) {
b352e57d 2243 if (ata_id_is_cfa(id)) {
62afe5d7
SS
2244 /* CPRM may make this media unusable */
2245 if (id[ATA_ID_CFA_KEY_MGMT] & 1)
a9a79dfe
JP
2246 ata_dev_warn(dev,
2247 "supports DRM functions and may not be fully accessible\n");
b352e57d 2248 snprintf(revbuf, 7, "CFA");
ae8d4ee7 2249 } else {
2dcb407e 2250 snprintf(revbuf, 7, "ATA-%d", ata_id_major_version(id));
ae8d4ee7
AC
2251 /* Warn the user if the device has TPM extensions */
2252 if (ata_id_has_tpm(id))
a9a79dfe
JP
2253 ata_dev_warn(dev,
2254 "supports DRM functions and may not be fully accessible\n");
ae8d4ee7 2255 }
b352e57d 2256
1148c3a7 2257 dev->n_sectors = ata_id_n_sectors(id);
2940740b 2258
e18086d6
ML
2259 /* get current R/W Multiple count setting */
2260 if ((dev->id[47] >> 8) == 0x80 && (dev->id[59] & 0x100)) {
2261 unsigned int max = dev->id[47] & 0xff;
2262 unsigned int cnt = dev->id[59] & 0xff;
2263 /* only recognize/allow powers of two here */
2264 if (is_power_of_2(max) && is_power_of_2(cnt))
2265 if (cnt <= max)
2266 dev->multi_count = cnt;
2267 }
3f64f565 2268
1148c3a7 2269 if (ata_id_has_lba(id)) {
4c2d721a 2270 const char *lba_desc;
388539f3 2271 char ncq_desc[24];
8bf62ece 2272
4c2d721a
TH
2273 lba_desc = "LBA";
2274 dev->flags |= ATA_DFLAG_LBA;
1148c3a7 2275 if (ata_id_has_lba48(id)) {
8bf62ece 2276 dev->flags |= ATA_DFLAG_LBA48;
4c2d721a 2277 lba_desc = "LBA48";
6fc49adb
TH
2278
2279 if (dev->n_sectors >= (1UL << 28) &&
2280 ata_id_has_flush_ext(id))
2281 dev->flags |= ATA_DFLAG_FLUSH_EXT;
4c2d721a 2282 }
8bf62ece 2283
a6e6ce8e 2284 /* config NCQ */
388539f3
SL
2285 rc = ata_dev_config_ncq(dev, ncq_desc, sizeof(ncq_desc));
2286 if (rc)
2287 return rc;
a6e6ce8e 2288
8bf62ece 2289 /* print device info to dmesg */
3f64f565 2290 if (ata_msg_drv(ap) && print_info) {
a9a79dfe
JP
2291 ata_dev_info(dev, "%s: %s, %s, max %s\n",
2292 revbuf, modelbuf, fwrevbuf,
2293 ata_mode_string(xfer_mask));
2294 ata_dev_info(dev,
2295 "%llu sectors, multi %u: %s %s\n",
f15a1daf 2296 (unsigned long long)dev->n_sectors,
3f64f565
EM
2297 dev->multi_count, lba_desc, ncq_desc);
2298 }
ffeae418 2299 } else {
8bf62ece
AL
2300 /* CHS */
2301
2302 /* Default translation */
1148c3a7
TH
2303 dev->cylinders = id[1];
2304 dev->heads = id[3];
2305 dev->sectors = id[6];
8bf62ece 2306
1148c3a7 2307 if (ata_id_current_chs_valid(id)) {
8bf62ece 2308 /* Current CHS translation is valid. */
1148c3a7
TH
2309 dev->cylinders = id[54];
2310 dev->heads = id[55];
2311 dev->sectors = id[56];
8bf62ece
AL
2312 }
2313
2314 /* print device info to dmesg */
3f64f565 2315 if (ata_msg_drv(ap) && print_info) {
a9a79dfe
JP
2316 ata_dev_info(dev, "%s: %s, %s, max %s\n",
2317 revbuf, modelbuf, fwrevbuf,
2318 ata_mode_string(xfer_mask));
2319 ata_dev_info(dev,
2320 "%llu sectors, multi %u, CHS %u/%u/%u\n",
2321 (unsigned long long)dev->n_sectors,
2322 dev->multi_count, dev->cylinders,
2323 dev->heads, dev->sectors);
3f64f565 2324 }
07f6f7d0
AL
2325 }
2326
65fe1f0f
SH
2327 /* check and mark DevSlp capability */
2328 if (ata_id_has_devslp(dev->id))
2329 dev->flags |= ATA_DFLAG_DEVSLP;
2330
2331 /* Obtain SATA Settings page from Identify Device Data Log,
2332 * which contains DevSlp timing variables etc.
2333 * Exclude old devices with ata_id_has_ncq()
2334 */
2335 if (ata_id_has_ncq(dev->id)) {
2336 err_mask = ata_read_log_page(dev,
2337 ATA_LOG_SATA_ID_DEV_DATA,
2338 ATA_LOG_SATA_SETTINGS,
2339 dev->sata_settings,
2340 1);
2341 if (err_mask)
2342 ata_dev_dbg(dev,
2343 "failed to get Identify Device Data, Emask 0x%x\n",
2344 err_mask);
2345 }
2346
6e7846e9 2347 dev->cdb_len = 16;
1da177e4
LT
2348 }
2349
2350 /* ATAPI-specific feature tests */
2c13b7ce 2351 else if (dev->class == ATA_DEV_ATAPI) {
854c73a2
TH
2352 const char *cdb_intr_string = "";
2353 const char *atapi_an_string = "";
91163006 2354 const char *dma_dir_string = "";
7d77b247 2355 u32 sntf;
08a556db 2356
1148c3a7 2357 rc = atapi_cdb_len(id);
1da177e4 2358 if ((rc < 12) || (rc > ATAPI_CDB_LEN)) {
0dd4b21f 2359 if (ata_msg_warn(ap))
a9a79dfe 2360 ata_dev_warn(dev, "unsupported CDB len\n");
ffeae418 2361 rc = -EINVAL;
1da177e4
LT
2362 goto err_out_nosup;
2363 }
6e7846e9 2364 dev->cdb_len = (unsigned int) rc;
1da177e4 2365
7d77b247
TH
2366 /* Enable ATAPI AN if both the host and device have
2367 * the support. If PMP is attached, SNTF is required
2368 * to enable ATAPI AN to discern between PHY status
2369 * changed notifications and ATAPI ANs.
9f45cbd3 2370 */
e7ecd435
TH
2371 if (atapi_an &&
2372 (ap->flags & ATA_FLAG_AN) && ata_id_has_atapi_AN(id) &&
071f44b1 2373 (!sata_pmp_attached(ap) ||
7d77b247 2374 sata_scr_read(&ap->link, SCR_NOTIFICATION, &sntf) == 0)) {
9f45cbd3 2375 /* issue SET feature command to turn this on */
218f3d30
JG
2376 err_mask = ata_dev_set_feature(dev,
2377 SETFEATURES_SATA_ENABLE, SATA_AN);
854c73a2 2378 if (err_mask)
a9a79dfe
JP
2379 ata_dev_err(dev,
2380 "failed to enable ATAPI AN (err_mask=0x%x)\n",
2381 err_mask);
854c73a2 2382 else {
9f45cbd3 2383 dev->flags |= ATA_DFLAG_AN;
854c73a2
TH
2384 atapi_an_string = ", ATAPI AN";
2385 }
9f45cbd3
KCA
2386 }
2387
08a556db 2388 if (ata_id_cdb_intr(dev->id)) {
312f7da2 2389 dev->flags |= ATA_DFLAG_CDB_INTR;
08a556db
AL
2390 cdb_intr_string = ", CDB intr";
2391 }
312f7da2 2392
91163006
TH
2393 if (atapi_dmadir || atapi_id_dmadir(dev->id)) {
2394 dev->flags |= ATA_DFLAG_DMADIR;
2395 dma_dir_string = ", DMADIR";
2396 }
2397
b1354cbb
LM
2398 if (ata_id_has_da(dev->id))
2399 dev->flags |= ATA_DFLAG_DA;
2400
1da177e4 2401 /* print device info to dmesg */
5afc8142 2402 if (ata_msg_drv(ap) && print_info)
a9a79dfe
JP
2403 ata_dev_info(dev,
2404 "ATAPI: %s, %s, max %s%s%s%s\n",
2405 modelbuf, fwrevbuf,
2406 ata_mode_string(xfer_mask),
2407 cdb_intr_string, atapi_an_string,
2408 dma_dir_string);
1da177e4
LT
2409 }
2410
914ed354
TH
2411 /* determine max_sectors */
2412 dev->max_sectors = ATA_MAX_SECTORS;
2413 if (dev->flags & ATA_DFLAG_LBA48)
2414 dev->max_sectors = ATA_MAX_SECTORS_LBA48;
2415
c5038fc0
AC
2416 /* Limit PATA drive on SATA cable bridge transfers to udma5,
2417 200 sectors */
3373efd8 2418 if (ata_dev_knobble(dev)) {
5afc8142 2419 if (ata_msg_drv(ap) && print_info)
a9a79dfe 2420 ata_dev_info(dev, "applying bridge limits\n");
5a529139 2421 dev->udma_mask &= ATA_UDMA5;
4b2f3ede
TH
2422 dev->max_sectors = ATA_MAX_SECTORS;
2423 }
2424
f8d8e579 2425 if ((dev->class == ATA_DEV_ATAPI) &&
f442cd86 2426 (atapi_command_packet_set(id) == TYPE_TAPE)) {
f8d8e579 2427 dev->max_sectors = ATA_MAX_SECTORS_TAPE;
f442cd86
AL
2428 dev->horkage |= ATA_HORKAGE_STUCK_ERR;
2429 }
f8d8e579 2430
75683fe7 2431 if (dev->horkage & ATA_HORKAGE_MAX_SEC_128)
03ec52de
TH
2432 dev->max_sectors = min_t(unsigned int, ATA_MAX_SECTORS_128,
2433 dev->max_sectors);
18d6e9d5 2434
4b2f3ede 2435 if (ap->ops->dev_config)
cd0d3bbc 2436 ap->ops->dev_config(dev);
4b2f3ede 2437
c5038fc0
AC
2438 if (dev->horkage & ATA_HORKAGE_DIAGNOSTIC) {
2439 /* Let the user know. We don't want to disallow opens for
2440 rescue purposes, or in case the vendor is just a blithering
2441 idiot. Do this after the dev_config call as some controllers
2442 with buggy firmware may want to avoid reporting false device
2443 bugs */
2444
2445 if (print_info) {
a9a79dfe 2446 ata_dev_warn(dev,
c5038fc0 2447"Drive reports diagnostics failure. This may indicate a drive\n");
a9a79dfe 2448 ata_dev_warn(dev,
c5038fc0
AC
2449"fault or invalid emulation. Contact drive vendor for information.\n");
2450 }
2451 }
2452
ac70a964 2453 if ((dev->horkage & ATA_HORKAGE_FIRMWARE_WARN) && print_info) {
a9a79dfe
JP
2454 ata_dev_warn(dev, "WARNING: device requires firmware update to be fully functional\n");
2455 ata_dev_warn(dev, " contact the vendor or visit http://ata.wiki.kernel.org\n");
ac70a964
TH
2456 }
2457
ffeae418 2458 return 0;
1da177e4
LT
2459
2460err_out_nosup:
0dd4b21f 2461 if (ata_msg_probe(ap))
a9a79dfe 2462 ata_dev_dbg(dev, "%s: EXIT, err\n", __func__);
ffeae418 2463 return rc;
1da177e4
LT
2464}
2465
be0d18df 2466/**
2e41e8e6 2467 * ata_cable_40wire - return 40 wire cable type
be0d18df
AC
2468 * @ap: port
2469 *
2e41e8e6 2470 * Helper method for drivers which want to hardwire 40 wire cable
be0d18df
AC
2471 * detection.
2472 */
2473
2474int ata_cable_40wire(struct ata_port *ap)
2475{
2476 return ATA_CBL_PATA40;
2477}
2478
2479/**
2e41e8e6 2480 * ata_cable_80wire - return 80 wire cable type
be0d18df
AC
2481 * @ap: port
2482 *
2e41e8e6 2483 * Helper method for drivers which want to hardwire 80 wire cable
be0d18df
AC
2484 * detection.
2485 */
2486
2487int ata_cable_80wire(struct ata_port *ap)
2488{
2489 return ATA_CBL_PATA80;
2490}
2491
2492/**
2493 * ata_cable_unknown - return unknown PATA cable.
2494 * @ap: port
2495 *
2496 * Helper method for drivers which have no PATA cable detection.
2497 */
2498
2499int ata_cable_unknown(struct ata_port *ap)
2500{
2501 return ATA_CBL_PATA_UNK;
2502}
2503
c88f90c3
TH
2504/**
2505 * ata_cable_ignore - return ignored PATA cable.
2506 * @ap: port
2507 *
2508 * Helper method for drivers which don't use cable type to limit
2509 * transfer mode.
2510 */
2511int ata_cable_ignore(struct ata_port *ap)
2512{
2513 return ATA_CBL_PATA_IGN;
2514}
2515
be0d18df
AC
2516/**
2517 * ata_cable_sata - return SATA cable type
2518 * @ap: port
2519 *
2520 * Helper method for drivers which have SATA cables
2521 */
2522
2523int ata_cable_sata(struct ata_port *ap)
2524{
2525 return ATA_CBL_SATA;
2526}
2527
1da177e4
LT
2528/**
2529 * ata_bus_probe - Reset and probe ATA bus
2530 * @ap: Bus to probe
2531 *
0cba632b
JG
2532 * Master ATA bus probing function. Initiates a hardware-dependent
2533 * bus reset, then attempts to identify any devices found on
2534 * the bus.
2535 *
1da177e4 2536 * LOCKING:
0cba632b 2537 * PCI/etc. bus probe sem.
1da177e4
LT
2538 *
2539 * RETURNS:
96072e69 2540 * Zero on success, negative errno otherwise.
1da177e4
LT
2541 */
2542
80289167 2543int ata_bus_probe(struct ata_port *ap)
1da177e4 2544{
28ca5c57 2545 unsigned int classes[ATA_MAX_DEVICES];
14d2bac1 2546 int tries[ATA_MAX_DEVICES];
f58229f8 2547 int rc;
e82cbdb9 2548 struct ata_device *dev;
1da177e4 2549
1eca4365 2550 ata_for_each_dev(dev, &ap->link, ALL)
f58229f8 2551 tries[dev->devno] = ATA_PROBE_MAX_TRIES;
14d2bac1
TH
2552
2553 retry:
1eca4365 2554 ata_for_each_dev(dev, &ap->link, ALL) {
cdeab114
TH
2555 /* If we issue an SRST then an ATA drive (not ATAPI)
2556 * may change configuration and be in PIO0 timing. If
2557 * we do a hard reset (or are coming from power on)
2558 * this is true for ATA or ATAPI. Until we've set a
2559 * suitable controller mode we should not touch the
2560 * bus as we may be talking too fast.
2561 */
2562 dev->pio_mode = XFER_PIO_0;
2563
2564 /* If the controller has a pio mode setup function
2565 * then use it to set the chipset to rights. Don't
2566 * touch the DMA setup as that will be dealt with when
2567 * configuring devices.
2568 */
2569 if (ap->ops->set_piomode)
2570 ap->ops->set_piomode(ap, dev);
2571 }
2572
2044470c 2573 /* reset and determine device classes */
52783c5d 2574 ap->ops->phy_reset(ap);
2061a47a 2575
1eca4365 2576 ata_for_each_dev(dev, &ap->link, ALL) {
3e4ec344 2577 if (dev->class != ATA_DEV_UNKNOWN)
52783c5d
TH
2578 classes[dev->devno] = dev->class;
2579 else
2580 classes[dev->devno] = ATA_DEV_NONE;
2044470c 2581
52783c5d 2582 dev->class = ATA_DEV_UNKNOWN;
28ca5c57 2583 }
1da177e4 2584
f31f0cc2
JG
2585 /* read IDENTIFY page and configure devices. We have to do the identify
2586 specific sequence bass-ackwards so that PDIAG- is released by
2587 the slave device */
2588
1eca4365 2589 ata_for_each_dev(dev, &ap->link, ALL_REVERSE) {
f58229f8
TH
2590 if (tries[dev->devno])
2591 dev->class = classes[dev->devno];
ffeae418 2592
14d2bac1 2593 if (!ata_dev_enabled(dev))
ffeae418 2594 continue;
ffeae418 2595
bff04647
TH
2596 rc = ata_dev_read_id(dev, &dev->class, ATA_READID_POSTRESET,
2597 dev->id);
14d2bac1
TH
2598 if (rc)
2599 goto fail;
f31f0cc2
JG
2600 }
2601
be0d18df
AC
2602 /* Now ask for the cable type as PDIAG- should have been released */
2603 if (ap->ops->cable_detect)
2604 ap->cbl = ap->ops->cable_detect(ap);
2605
1eca4365
TH
2606 /* We may have SATA bridge glue hiding here irrespective of
2607 * the reported cable types and sensed types. When SATA
2608 * drives indicate we have a bridge, we don't know which end
2609 * of the link the bridge is which is a problem.
2610 */
2611 ata_for_each_dev(dev, &ap->link, ENABLED)
614fe29b
AC
2612 if (ata_id_is_sata(dev->id))
2613 ap->cbl = ATA_CBL_SATA;
614fe29b 2614
f31f0cc2
JG
2615 /* After the identify sequence we can now set up the devices. We do
2616 this in the normal order so that the user doesn't get confused */
2617
1eca4365 2618 ata_for_each_dev(dev, &ap->link, ENABLED) {
9af5c9c9 2619 ap->link.eh_context.i.flags |= ATA_EHI_PRINTINFO;
efdaedc4 2620 rc = ata_dev_configure(dev);
9af5c9c9 2621 ap->link.eh_context.i.flags &= ~ATA_EHI_PRINTINFO;
14d2bac1
TH
2622 if (rc)
2623 goto fail;
1da177e4
LT
2624 }
2625
e82cbdb9 2626 /* configure transfer mode */
0260731f 2627 rc = ata_set_mode(&ap->link, &dev);
4ae72a1e 2628 if (rc)
51713d35 2629 goto fail;
1da177e4 2630
1eca4365
TH
2631 ata_for_each_dev(dev, &ap->link, ENABLED)
2632 return 0;
1da177e4 2633
96072e69 2634 return -ENODEV;
14d2bac1
TH
2635
2636 fail:
4ae72a1e
TH
2637 tries[dev->devno]--;
2638
14d2bac1
TH
2639 switch (rc) {
2640 case -EINVAL:
4ae72a1e 2641 /* eeek, something went very wrong, give up */
14d2bac1
TH
2642 tries[dev->devno] = 0;
2643 break;
4ae72a1e
TH
2644
2645 case -ENODEV:
2646 /* give it just one more chance */
2647 tries[dev->devno] = min(tries[dev->devno], 1);
14d2bac1 2648 case -EIO:
4ae72a1e
TH
2649 if (tries[dev->devno] == 1) {
2650 /* This is the last chance, better to slow
2651 * down than lose it.
2652 */
a07d499b 2653 sata_down_spd_limit(&ap->link, 0);
4ae72a1e
TH
2654 ata_down_xfermask_limit(dev, ATA_DNXFER_PIO);
2655 }
14d2bac1
TH
2656 }
2657
4ae72a1e 2658 if (!tries[dev->devno])
3373efd8 2659 ata_dev_disable(dev);
ec573755 2660
14d2bac1 2661 goto retry;
1da177e4
LT
2662}
2663
3be680b7
TH
2664/**
2665 * sata_print_link_status - Print SATA link status
936fd732 2666 * @link: SATA link to printk link status about
3be680b7
TH
2667 *
2668 * This function prints link speed and status of a SATA link.
2669 *
2670 * LOCKING:
2671 * None.
2672 */
6bdb4fc9 2673static void sata_print_link_status(struct ata_link *link)
3be680b7 2674{
6d5f9732 2675 u32 sstatus, scontrol, tmp;
3be680b7 2676
936fd732 2677 if (sata_scr_read(link, SCR_STATUS, &sstatus))
3be680b7 2678 return;
936fd732 2679 sata_scr_read(link, SCR_CONTROL, &scontrol);
3be680b7 2680
b1c72916 2681 if (ata_phys_link_online(link)) {
3be680b7 2682 tmp = (sstatus >> 4) & 0xf;
a9a79dfe
JP
2683 ata_link_info(link, "SATA link up %s (SStatus %X SControl %X)\n",
2684 sata_spd_string(tmp), sstatus, scontrol);
3be680b7 2685 } else {
a9a79dfe
JP
2686 ata_link_info(link, "SATA link down (SStatus %X SControl %X)\n",
2687 sstatus, scontrol);
3be680b7
TH
2688 }
2689}
2690
ebdfca6e
AC
2691/**
2692 * ata_dev_pair - return other device on cable
ebdfca6e
AC
2693 * @adev: device
2694 *
2695 * Obtain the other device on the same cable, or if none is
2696 * present NULL is returned
2697 */
2e9edbf8 2698
3373efd8 2699struct ata_device *ata_dev_pair(struct ata_device *adev)
ebdfca6e 2700{
9af5c9c9
TH
2701 struct ata_link *link = adev->link;
2702 struct ata_device *pair = &link->device[1 - adev->devno];
e1211e3f 2703 if (!ata_dev_enabled(pair))
ebdfca6e
AC
2704 return NULL;
2705 return pair;
2706}
2707
1c3fae4d 2708/**
3c567b7d 2709 * sata_down_spd_limit - adjust SATA spd limit downward
936fd732 2710 * @link: Link to adjust SATA spd limit for
a07d499b 2711 * @spd_limit: Additional limit
1c3fae4d 2712 *
936fd732 2713 * Adjust SATA spd limit of @link downward. Note that this
1c3fae4d 2714 * function only adjusts the limit. The change must be applied
3c567b7d 2715 * using sata_set_spd().
1c3fae4d 2716 *
a07d499b
TH
2717 * If @spd_limit is non-zero, the speed is limited to equal to or
2718 * lower than @spd_limit if such speed is supported. If
2719 * @spd_limit is slower than any supported speed, only the lowest
2720 * supported speed is allowed.
2721 *
1c3fae4d
TH
2722 * LOCKING:
2723 * Inherited from caller.
2724 *
2725 * RETURNS:
2726 * 0 on success, negative errno on failure
2727 */
a07d499b 2728int sata_down_spd_limit(struct ata_link *link, u32 spd_limit)
1c3fae4d 2729{
81952c54 2730 u32 sstatus, spd, mask;
a07d499b 2731 int rc, bit;
1c3fae4d 2732
936fd732 2733 if (!sata_scr_valid(link))
008a7896
TH
2734 return -EOPNOTSUPP;
2735
2736 /* If SCR can be read, use it to determine the current SPD.
936fd732 2737 * If not, use cached value in link->sata_spd.
008a7896 2738 */
936fd732 2739 rc = sata_scr_read(link, SCR_STATUS, &sstatus);
9913ff8a 2740 if (rc == 0 && ata_sstatus_online(sstatus))
008a7896
TH
2741 spd = (sstatus >> 4) & 0xf;
2742 else
936fd732 2743 spd = link->sata_spd;
1c3fae4d 2744
936fd732 2745 mask = link->sata_spd_limit;
1c3fae4d
TH
2746 if (mask <= 1)
2747 return -EINVAL;
008a7896
TH
2748
2749 /* unconditionally mask off the highest bit */
a07d499b
TH
2750 bit = fls(mask) - 1;
2751 mask &= ~(1 << bit);
1c3fae4d 2752
008a7896
TH
2753 /* Mask off all speeds higher than or equal to the current
2754 * one. Force 1.5Gbps if current SPD is not available.
2755 */
2756 if (spd > 1)
2757 mask &= (1 << (spd - 1)) - 1;
2758 else
2759 mask &= 1;
2760
2761 /* were we already at the bottom? */
1c3fae4d
TH
2762 if (!mask)
2763 return -EINVAL;
2764
a07d499b
TH
2765 if (spd_limit) {
2766 if (mask & ((1 << spd_limit) - 1))
2767 mask &= (1 << spd_limit) - 1;
2768 else {
2769 bit = ffs(mask) - 1;
2770 mask = 1 << bit;
2771 }
2772 }
2773
936fd732 2774 link->sata_spd_limit = mask;
1c3fae4d 2775
a9a79dfe
JP
2776 ata_link_warn(link, "limiting SATA link speed to %s\n",
2777 sata_spd_string(fls(mask)));
1c3fae4d
TH
2778
2779 return 0;
2780}
2781
936fd732 2782static int __sata_set_spd_needed(struct ata_link *link, u32 *scontrol)
1c3fae4d 2783{
5270222f
TH
2784 struct ata_link *host_link = &link->ap->link;
2785 u32 limit, target, spd;
1c3fae4d 2786
5270222f
TH
2787 limit = link->sata_spd_limit;
2788
2789 /* Don't configure downstream link faster than upstream link.
2790 * It doesn't speed up anything and some PMPs choke on such
2791 * configuration.
2792 */
2793 if (!ata_is_host_link(link) && host_link->sata_spd)
2794 limit &= (1 << host_link->sata_spd) - 1;
2795
2796 if (limit == UINT_MAX)
2797 target = 0;
1c3fae4d 2798 else
5270222f 2799 target = fls(limit);
1c3fae4d
TH
2800
2801 spd = (*scontrol >> 4) & 0xf;
5270222f 2802 *scontrol = (*scontrol & ~0xf0) | ((target & 0xf) << 4);
1c3fae4d 2803
5270222f 2804 return spd != target;
1c3fae4d
TH
2805}
2806
2807/**
3c567b7d 2808 * sata_set_spd_needed - is SATA spd configuration needed
936fd732 2809 * @link: Link in question
1c3fae4d
TH
2810 *
2811 * Test whether the spd limit in SControl matches
936fd732 2812 * @link->sata_spd_limit. This function is used to determine
1c3fae4d
TH
2813 * whether hardreset is necessary to apply SATA spd
2814 * configuration.
2815 *
2816 * LOCKING:
2817 * Inherited from caller.
2818 *
2819 * RETURNS:
2820 * 1 if SATA spd configuration is needed, 0 otherwise.
2821 */
1dc55e87 2822static int sata_set_spd_needed(struct ata_link *link)
1c3fae4d
TH
2823{
2824 u32 scontrol;
2825
936fd732 2826 if (sata_scr_read(link, SCR_CONTROL, &scontrol))
db64bcf3 2827 return 1;
1c3fae4d 2828
936fd732 2829 return __sata_set_spd_needed(link, &scontrol);
1c3fae4d
TH
2830}
2831
2832/**
3c567b7d 2833 * sata_set_spd - set SATA spd according to spd limit
936fd732 2834 * @link: Link to set SATA spd for
1c3fae4d 2835 *
936fd732 2836 * Set SATA spd of @link according to sata_spd_limit.
1c3fae4d
TH
2837 *
2838 * LOCKING:
2839 * Inherited from caller.
2840 *
2841 * RETURNS:
2842 * 0 if spd doesn't need to be changed, 1 if spd has been
81952c54 2843 * changed. Negative errno if SCR registers are inaccessible.
1c3fae4d 2844 */
936fd732 2845int sata_set_spd(struct ata_link *link)
1c3fae4d
TH
2846{
2847 u32 scontrol;
81952c54 2848 int rc;
1c3fae4d 2849
936fd732 2850 if ((rc = sata_scr_read(link, SCR_CONTROL, &scontrol)))
81952c54 2851 return rc;
1c3fae4d 2852
936fd732 2853 if (!__sata_set_spd_needed(link, &scontrol))
1c3fae4d
TH
2854 return 0;
2855
936fd732 2856 if ((rc = sata_scr_write(link, SCR_CONTROL, scontrol)))
81952c54
TH
2857 return rc;
2858
1c3fae4d
TH
2859 return 1;
2860}
2861
452503f9
AC
2862/*
2863 * This mode timing computation functionality is ported over from
2864 * drivers/ide/ide-timing.h and was originally written by Vojtech Pavlik
2865 */
2866/*
b352e57d 2867 * PIO 0-4, MWDMA 0-2 and UDMA 0-6 timings (in nanoseconds).
452503f9 2868 * These were taken from ATA/ATAPI-6 standard, rev 0a, except
b352e57d
AC
2869 * for UDMA6, which is currently supported only by Maxtor drives.
2870 *
2871 * For PIO 5/6 MWDMA 3/4 see the CFA specification 3.0.
452503f9
AC
2872 */
2873
2874static const struct ata_timing ata_timing[] = {
3ada9c12
DD
2875/* { XFER_PIO_SLOW, 120, 290, 240, 960, 290, 240, 0, 960, 0 }, */
2876 { XFER_PIO_0, 70, 290, 240, 600, 165, 150, 0, 600, 0 },
2877 { XFER_PIO_1, 50, 290, 93, 383, 125, 100, 0, 383, 0 },
2878 { XFER_PIO_2, 30, 290, 40, 330, 100, 90, 0, 240, 0 },
2879 { XFER_PIO_3, 30, 80, 70, 180, 80, 70, 0, 180, 0 },
2880 { XFER_PIO_4, 25, 70, 25, 120, 70, 25, 0, 120, 0 },
2881 { XFER_PIO_5, 15, 65, 25, 100, 65, 25, 0, 100, 0 },
2882 { XFER_PIO_6, 10, 55, 20, 80, 55, 20, 0, 80, 0 },
2883
2884 { XFER_SW_DMA_0, 120, 0, 0, 0, 480, 480, 50, 960, 0 },
2885 { XFER_SW_DMA_1, 90, 0, 0, 0, 240, 240, 30, 480, 0 },
2886 { XFER_SW_DMA_2, 60, 0, 0, 0, 120, 120, 20, 240, 0 },
2887
2888 { XFER_MW_DMA_0, 60, 0, 0, 0, 215, 215, 20, 480, 0 },
2889 { XFER_MW_DMA_1, 45, 0, 0, 0, 80, 50, 5, 150, 0 },
2890 { XFER_MW_DMA_2, 25, 0, 0, 0, 70, 25, 5, 120, 0 },
2891 { XFER_MW_DMA_3, 25, 0, 0, 0, 65, 25, 5, 100, 0 },
2892 { XFER_MW_DMA_4, 25, 0, 0, 0, 55, 20, 5, 80, 0 },
2893
2894/* { XFER_UDMA_SLOW, 0, 0, 0, 0, 0, 0, 0, 0, 150 }, */
2895 { XFER_UDMA_0, 0, 0, 0, 0, 0, 0, 0, 0, 120 },
2896 { XFER_UDMA_1, 0, 0, 0, 0, 0, 0, 0, 0, 80 },
2897 { XFER_UDMA_2, 0, 0, 0, 0, 0, 0, 0, 0, 60 },
2898 { XFER_UDMA_3, 0, 0, 0, 0, 0, 0, 0, 0, 45 },
2899 { XFER_UDMA_4, 0, 0, 0, 0, 0, 0, 0, 0, 30 },
2900 { XFER_UDMA_5, 0, 0, 0, 0, 0, 0, 0, 0, 20 },
2901 { XFER_UDMA_6, 0, 0, 0, 0, 0, 0, 0, 0, 15 },
452503f9
AC
2902
2903 { 0xFF }
2904};
2905
2dcb407e
JG
2906#define ENOUGH(v, unit) (((v)-1)/(unit)+1)
2907#define EZ(v, unit) ((v)?ENOUGH(v, unit):0)
452503f9
AC
2908
2909static void ata_timing_quantize(const struct ata_timing *t, struct ata_timing *q, int T, int UT)
2910{
3ada9c12
DD
2911 q->setup = EZ(t->setup * 1000, T);
2912 q->act8b = EZ(t->act8b * 1000, T);
2913 q->rec8b = EZ(t->rec8b * 1000, T);
2914 q->cyc8b = EZ(t->cyc8b * 1000, T);
2915 q->active = EZ(t->active * 1000, T);
2916 q->recover = EZ(t->recover * 1000, T);
2917 q->dmack_hold = EZ(t->dmack_hold * 1000, T);
2918 q->cycle = EZ(t->cycle * 1000, T);
2919 q->udma = EZ(t->udma * 1000, UT);
452503f9
AC
2920}
2921
2922void ata_timing_merge(const struct ata_timing *a, const struct ata_timing *b,
2923 struct ata_timing *m, unsigned int what)
2924{
2925 if (what & ATA_TIMING_SETUP ) m->setup = max(a->setup, b->setup);
2926 if (what & ATA_TIMING_ACT8B ) m->act8b = max(a->act8b, b->act8b);
2927 if (what & ATA_TIMING_REC8B ) m->rec8b = max(a->rec8b, b->rec8b);
2928 if (what & ATA_TIMING_CYC8B ) m->cyc8b = max(a->cyc8b, b->cyc8b);
2929 if (what & ATA_TIMING_ACTIVE ) m->active = max(a->active, b->active);
2930 if (what & ATA_TIMING_RECOVER) m->recover = max(a->recover, b->recover);
3ada9c12 2931 if (what & ATA_TIMING_DMACK_HOLD) m->dmack_hold = max(a->dmack_hold, b->dmack_hold);
452503f9
AC
2932 if (what & ATA_TIMING_CYCLE ) m->cycle = max(a->cycle, b->cycle);
2933 if (what & ATA_TIMING_UDMA ) m->udma = max(a->udma, b->udma);
2934}
2935
6357357c 2936const struct ata_timing *ata_timing_find_mode(u8 xfer_mode)
452503f9 2937{
70cd071e
TH
2938 const struct ata_timing *t = ata_timing;
2939
2940 while (xfer_mode > t->mode)
2941 t++;
452503f9 2942
70cd071e
TH
2943 if (xfer_mode == t->mode)
2944 return t;
2945 return NULL;
452503f9
AC
2946}
2947
2948int ata_timing_compute(struct ata_device *adev, unsigned short speed,
2949 struct ata_timing *t, int T, int UT)
2950{
9e8808a9 2951 const u16 *id = adev->id;
452503f9
AC
2952 const struct ata_timing *s;
2953 struct ata_timing p;
2954
2955 /*
2e9edbf8 2956 * Find the mode.
75b1f2f8 2957 */
452503f9
AC
2958
2959 if (!(s = ata_timing_find_mode(speed)))
2960 return -EINVAL;
2961
75b1f2f8
AL
2962 memcpy(t, s, sizeof(*s));
2963
452503f9
AC
2964 /*
2965 * If the drive is an EIDE drive, it can tell us it needs extended
2966 * PIO/MW_DMA cycle timing.
2967 */
2968
9e8808a9 2969 if (id[ATA_ID_FIELD_VALID] & 2) { /* EIDE drive */
452503f9 2970 memset(&p, 0, sizeof(p));
9e8808a9 2971
bff00256 2972 if (speed >= XFER_PIO_0 && speed < XFER_SW_DMA_0) {
9e8808a9
BZ
2973 if (speed <= XFER_PIO_2)
2974 p.cycle = p.cyc8b = id[ATA_ID_EIDE_PIO];
2975 else if ((speed <= XFER_PIO_4) ||
2976 (speed == XFER_PIO_5 && !ata_id_is_cfa(id)))
2977 p.cycle = p.cyc8b = id[ATA_ID_EIDE_PIO_IORDY];
2978 } else if (speed >= XFER_MW_DMA_0 && speed <= XFER_MW_DMA_2)
2979 p.cycle = id[ATA_ID_EIDE_DMA_MIN];
2980
452503f9
AC
2981 ata_timing_merge(&p, t, t, ATA_TIMING_CYCLE | ATA_TIMING_CYC8B);
2982 }
2983
2984 /*
2985 * Convert the timing to bus clock counts.
2986 */
2987
75b1f2f8 2988 ata_timing_quantize(t, t, T, UT);
452503f9
AC
2989
2990 /*
c893a3ae
RD
2991 * Even in DMA/UDMA modes we still use PIO access for IDENTIFY,
2992 * S.M.A.R.T * and some other commands. We have to ensure that the
2993 * DMA cycle timing is slower/equal than the fastest PIO timing.
452503f9
AC
2994 */
2995
fd3367af 2996 if (speed > XFER_PIO_6) {
452503f9
AC
2997 ata_timing_compute(adev, adev->pio_mode, &p, T, UT);
2998 ata_timing_merge(&p, t, t, ATA_TIMING_ALL);
2999 }
3000
3001 /*
c893a3ae 3002 * Lengthen active & recovery time so that cycle time is correct.
452503f9
AC
3003 */
3004
3005 if (t->act8b + t->rec8b < t->cyc8b) {
3006 t->act8b += (t->cyc8b - (t->act8b + t->rec8b)) / 2;
3007 t->rec8b = t->cyc8b - t->act8b;
3008 }
3009
3010 if (t->active + t->recover < t->cycle) {
3011 t->active += (t->cycle - (t->active + t->recover)) / 2;
3012 t->recover = t->cycle - t->active;
3013 }
a617c09f 3014
4f701d1e
AC
3015 /* In a few cases quantisation may produce enough errors to
3016 leave t->cycle too low for the sum of active and recovery
3017 if so we must correct this */
3018 if (t->active + t->recover > t->cycle)
3019 t->cycle = t->active + t->recover;
452503f9
AC
3020
3021 return 0;
3022}
3023
a0f79b92
TH
3024/**
3025 * ata_timing_cycle2mode - find xfer mode for the specified cycle duration
3026 * @xfer_shift: ATA_SHIFT_* value for transfer type to examine.
3027 * @cycle: cycle duration in ns
3028 *
3029 * Return matching xfer mode for @cycle. The returned mode is of
3030 * the transfer type specified by @xfer_shift. If @cycle is too
3031 * slow for @xfer_shift, 0xff is returned. If @cycle is faster
3032 * than the fastest known mode, the fasted mode is returned.
3033 *
3034 * LOCKING:
3035 * None.
3036 *
3037 * RETURNS:
3038 * Matching xfer_mode, 0xff if no match found.
3039 */
3040u8 ata_timing_cycle2mode(unsigned int xfer_shift, int cycle)
3041{
3042 u8 base_mode = 0xff, last_mode = 0xff;
3043 const struct ata_xfer_ent *ent;
3044 const struct ata_timing *t;
3045
3046 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
3047 if (ent->shift == xfer_shift)
3048 base_mode = ent->base;
3049
3050 for (t = ata_timing_find_mode(base_mode);
3051 t && ata_xfer_mode2shift(t->mode) == xfer_shift; t++) {
3052 unsigned short this_cycle;
3053
3054 switch (xfer_shift) {
3055 case ATA_SHIFT_PIO:
3056 case ATA_SHIFT_MWDMA:
3057 this_cycle = t->cycle;
3058 break;
3059 case ATA_SHIFT_UDMA:
3060 this_cycle = t->udma;
3061 break;
3062 default:
3063 return 0xff;
3064 }
3065
3066 if (cycle > this_cycle)
3067 break;
3068
3069 last_mode = t->mode;
3070 }
3071
3072 return last_mode;
3073}
3074
cf176e1a
TH
3075/**
3076 * ata_down_xfermask_limit - adjust dev xfer masks downward
cf176e1a 3077 * @dev: Device to adjust xfer masks
458337db 3078 * @sel: ATA_DNXFER_* selector
cf176e1a
TH
3079 *
3080 * Adjust xfer masks of @dev downward. Note that this function
3081 * does not apply the change. Invoking ata_set_mode() afterwards
3082 * will apply the limit.
3083 *
3084 * LOCKING:
3085 * Inherited from caller.
3086 *
3087 * RETURNS:
3088 * 0 on success, negative errno on failure
3089 */
458337db 3090int ata_down_xfermask_limit(struct ata_device *dev, unsigned int sel)
cf176e1a 3091{
458337db 3092 char buf[32];
7dc951ae
TH
3093 unsigned long orig_mask, xfer_mask;
3094 unsigned long pio_mask, mwdma_mask, udma_mask;
458337db 3095 int quiet, highbit;
cf176e1a 3096
458337db
TH
3097 quiet = !!(sel & ATA_DNXFER_QUIET);
3098 sel &= ~ATA_DNXFER_QUIET;
cf176e1a 3099
458337db
TH
3100 xfer_mask = orig_mask = ata_pack_xfermask(dev->pio_mask,
3101 dev->mwdma_mask,
3102 dev->udma_mask);
3103 ata_unpack_xfermask(xfer_mask, &pio_mask, &mwdma_mask, &udma_mask);
cf176e1a 3104
458337db
TH
3105 switch (sel) {
3106 case ATA_DNXFER_PIO:
3107 highbit = fls(pio_mask) - 1;
3108 pio_mask &= ~(1 << highbit);
3109 break;
3110
3111 case ATA_DNXFER_DMA:
3112 if (udma_mask) {
3113 highbit = fls(udma_mask) - 1;
3114 udma_mask &= ~(1 << highbit);
3115 if (!udma_mask)
3116 return -ENOENT;
3117 } else if (mwdma_mask) {
3118 highbit = fls(mwdma_mask) - 1;
3119 mwdma_mask &= ~(1 << highbit);
3120 if (!mwdma_mask)
3121 return -ENOENT;
3122 }
3123 break;
3124
3125 case ATA_DNXFER_40C:
3126 udma_mask &= ATA_UDMA_MASK_40C;
3127 break;
3128
3129 case ATA_DNXFER_FORCE_PIO0:
3130 pio_mask &= 1;
3131 case ATA_DNXFER_FORCE_PIO:
3132 mwdma_mask = 0;
3133 udma_mask = 0;
3134 break;
3135
458337db
TH
3136 default:
3137 BUG();
3138 }
3139
3140 xfer_mask &= ata_pack_xfermask(pio_mask, mwdma_mask, udma_mask);
3141
3142 if (!(xfer_mask & ATA_MASK_PIO) || xfer_mask == orig_mask)
3143 return -ENOENT;
3144
3145 if (!quiet) {
3146 if (xfer_mask & (ATA_MASK_MWDMA | ATA_MASK_UDMA))
3147 snprintf(buf, sizeof(buf), "%s:%s",
3148 ata_mode_string(xfer_mask),
3149 ata_mode_string(xfer_mask & ATA_MASK_PIO));
3150 else
3151 snprintf(buf, sizeof(buf), "%s",
3152 ata_mode_string(xfer_mask));
3153
a9a79dfe 3154 ata_dev_warn(dev, "limiting speed to %s\n", buf);
458337db 3155 }
cf176e1a
TH
3156
3157 ata_unpack_xfermask(xfer_mask, &dev->pio_mask, &dev->mwdma_mask,
3158 &dev->udma_mask);
3159
cf176e1a 3160 return 0;
cf176e1a
TH
3161}
3162
3373efd8 3163static int ata_dev_set_mode(struct ata_device *dev)
1da177e4 3164{
d0cb43b3 3165 struct ata_port *ap = dev->link->ap;
9af5c9c9 3166 struct ata_eh_context *ehc = &dev->link->eh_context;
d0cb43b3 3167 const bool nosetxfer = dev->horkage & ATA_HORKAGE_NOSETXFER;
4055dee7
TH
3168 const char *dev_err_whine = "";
3169 int ign_dev_err = 0;
d0cb43b3 3170 unsigned int err_mask = 0;
83206a29 3171 int rc;
1da177e4 3172
e8384607 3173 dev->flags &= ~ATA_DFLAG_PIO;
1da177e4
LT
3174 if (dev->xfer_shift == ATA_SHIFT_PIO)
3175 dev->flags |= ATA_DFLAG_PIO;
3176
d0cb43b3
TH
3177 if (nosetxfer && ap->flags & ATA_FLAG_SATA && ata_id_is_sata(dev->id))
3178 dev_err_whine = " (SET_XFERMODE skipped)";
3179 else {
3180 if (nosetxfer)
a9a79dfe
JP
3181 ata_dev_warn(dev,
3182 "NOSETXFER but PATA detected - can't "
3183 "skip SETXFER, might malfunction\n");
d0cb43b3
TH
3184 err_mask = ata_dev_set_xfermode(dev);
3185 }
2dcb407e 3186
4055dee7
TH
3187 if (err_mask & ~AC_ERR_DEV)
3188 goto fail;
3189
3190 /* revalidate */
3191 ehc->i.flags |= ATA_EHI_POST_SETMODE;
3192 rc = ata_dev_revalidate(dev, ATA_DEV_UNKNOWN, 0);
3193 ehc->i.flags &= ~ATA_EHI_POST_SETMODE;
3194 if (rc)
3195 return rc;
3196
b93fda12
AC
3197 if (dev->xfer_shift == ATA_SHIFT_PIO) {
3198 /* Old CFA may refuse this command, which is just fine */
3199 if (ata_id_is_cfa(dev->id))
3200 ign_dev_err = 1;
3201 /* Catch several broken garbage emulations plus some pre
3202 ATA devices */
3203 if (ata_id_major_version(dev->id) == 0 &&
3204 dev->pio_mode <= XFER_PIO_2)
3205 ign_dev_err = 1;
3206 /* Some very old devices and some bad newer ones fail
3207 any kind of SET_XFERMODE request but support PIO0-2
3208 timings and no IORDY */
3209 if (!ata_id_has_iordy(dev->id) && dev->pio_mode <= XFER_PIO_2)
3210 ign_dev_err = 1;
3211 }
3acaf94b
AC
3212 /* Early MWDMA devices do DMA but don't allow DMA mode setting.
3213 Don't fail an MWDMA0 set IFF the device indicates it is in MWDMA0 */
c5038fc0 3214 if (dev->xfer_shift == ATA_SHIFT_MWDMA &&
3acaf94b
AC
3215 dev->dma_mode == XFER_MW_DMA_0 &&
3216 (dev->id[63] >> 8) & 1)
4055dee7 3217 ign_dev_err = 1;
3acaf94b 3218
4055dee7
TH
3219 /* if the device is actually configured correctly, ignore dev err */
3220 if (dev->xfer_mode == ata_xfer_mask2mode(ata_id_xfermask(dev->id)))
3221 ign_dev_err = 1;
1da177e4 3222
4055dee7
TH
3223 if (err_mask & AC_ERR_DEV) {
3224 if (!ign_dev_err)
3225 goto fail;
3226 else
3227 dev_err_whine = " (device error ignored)";
3228 }
48a8a14f 3229
23e71c3d
TH
3230 DPRINTK("xfer_shift=%u, xfer_mode=0x%x\n",
3231 dev->xfer_shift, (int)dev->xfer_mode);
1da177e4 3232
a9a79dfe
JP
3233 ata_dev_info(dev, "configured for %s%s\n",
3234 ata_mode_string(ata_xfer_mode2mask(dev->xfer_mode)),
3235 dev_err_whine);
4055dee7 3236
83206a29 3237 return 0;
4055dee7
TH
3238
3239 fail:
a9a79dfe 3240 ata_dev_err(dev, "failed to set xfermode (err_mask=0x%x)\n", err_mask);
4055dee7 3241 return -EIO;
1da177e4
LT
3242}
3243
1da177e4 3244/**
04351821 3245 * ata_do_set_mode - Program timings and issue SET FEATURES - XFER
0260731f 3246 * @link: link on which timings will be programmed
1967b7ff 3247 * @r_failed_dev: out parameter for failed device
1da177e4 3248 *
04351821
AC
3249 * Standard implementation of the function used to tune and set
3250 * ATA device disk transfer mode (PIO3, UDMA6, etc.). If
3251 * ata_dev_set_mode() fails, pointer to the failing device is
e82cbdb9 3252 * returned in @r_failed_dev.
780a87f7 3253 *
1da177e4 3254 * LOCKING:
0cba632b 3255 * PCI/etc. bus probe sem.
e82cbdb9
TH
3256 *
3257 * RETURNS:
3258 * 0 on success, negative errno otherwise
1da177e4 3259 */
04351821 3260
0260731f 3261int ata_do_set_mode(struct ata_link *link, struct ata_device **r_failed_dev)
1da177e4 3262{
0260731f 3263 struct ata_port *ap = link->ap;
e8e0619f 3264 struct ata_device *dev;
f58229f8 3265 int rc = 0, used_dma = 0, found = 0;
3adcebb2 3266
a6d5a51c 3267 /* step 1: calculate xfer_mask */
1eca4365 3268 ata_for_each_dev(dev, link, ENABLED) {
7dc951ae 3269 unsigned long pio_mask, dma_mask;
b3a70601 3270 unsigned int mode_mask;
a6d5a51c 3271
b3a70601
AC
3272 mode_mask = ATA_DMA_MASK_ATA;
3273 if (dev->class == ATA_DEV_ATAPI)
3274 mode_mask = ATA_DMA_MASK_ATAPI;
3275 else if (ata_id_is_cfa(dev->id))
3276 mode_mask = ATA_DMA_MASK_CFA;
3277
3373efd8 3278 ata_dev_xfermask(dev);
33267325 3279 ata_force_xfermask(dev);
1da177e4 3280
acf356b1 3281 pio_mask = ata_pack_xfermask(dev->pio_mask, 0, 0);
b3a70601
AC
3282
3283 if (libata_dma_mask & mode_mask)
80a9c430
SS
3284 dma_mask = ata_pack_xfermask(0, dev->mwdma_mask,
3285 dev->udma_mask);
b3a70601
AC
3286 else
3287 dma_mask = 0;
3288
acf356b1
TH
3289 dev->pio_mode = ata_xfer_mask2mode(pio_mask);
3290 dev->dma_mode = ata_xfer_mask2mode(dma_mask);
5444a6f4 3291
4f65977d 3292 found = 1;
b15b3eba 3293 if (ata_dma_enabled(dev))
5444a6f4 3294 used_dma = 1;
a6d5a51c 3295 }
4f65977d 3296 if (!found)
e82cbdb9 3297 goto out;
a6d5a51c
TH
3298
3299 /* step 2: always set host PIO timings */
1eca4365 3300 ata_for_each_dev(dev, link, ENABLED) {
70cd071e 3301 if (dev->pio_mode == 0xff) {
a9a79dfe 3302 ata_dev_warn(dev, "no PIO support\n");
e8e0619f 3303 rc = -EINVAL;
e82cbdb9 3304 goto out;
e8e0619f
TH
3305 }
3306
3307 dev->xfer_mode = dev->pio_mode;
3308 dev->xfer_shift = ATA_SHIFT_PIO;
3309 if (ap->ops->set_piomode)
3310 ap->ops->set_piomode(ap, dev);
3311 }
1da177e4 3312
a6d5a51c 3313 /* step 3: set host DMA timings */
1eca4365
TH
3314 ata_for_each_dev(dev, link, ENABLED) {
3315 if (!ata_dma_enabled(dev))
e8e0619f
TH
3316 continue;
3317
3318 dev->xfer_mode = dev->dma_mode;
3319 dev->xfer_shift = ata_xfer_mode2shift(dev->dma_mode);
3320 if (ap->ops->set_dmamode)
3321 ap->ops->set_dmamode(ap, dev);
3322 }
1da177e4
LT
3323
3324 /* step 4: update devices' xfer mode */
1eca4365 3325 ata_for_each_dev(dev, link, ENABLED) {
3373efd8 3326 rc = ata_dev_set_mode(dev);
5bbc53f4 3327 if (rc)
e82cbdb9 3328 goto out;
83206a29 3329 }
1da177e4 3330
e8e0619f
TH
3331 /* Record simplex status. If we selected DMA then the other
3332 * host channels are not permitted to do so.
5444a6f4 3333 */
cca3974e 3334 if (used_dma && (ap->host->flags & ATA_HOST_SIMPLEX))
032af1ce 3335 ap->host->simplex_claimed = ap;
5444a6f4 3336
e82cbdb9
TH
3337 out:
3338 if (rc)
3339 *r_failed_dev = dev;
3340 return rc;
1da177e4
LT
3341}
3342
aa2731ad
TH
3343/**
3344 * ata_wait_ready - wait for link to become ready
3345 * @link: link to be waited on
3346 * @deadline: deadline jiffies for the operation
3347 * @check_ready: callback to check link readiness
3348 *
3349 * Wait for @link to become ready. @check_ready should return
3350 * positive number if @link is ready, 0 if it isn't, -ENODEV if
3351 * link doesn't seem to be occupied, other errno for other error
3352 * conditions.
3353 *
3354 * Transient -ENODEV conditions are allowed for
3355 * ATA_TMOUT_FF_WAIT.
3356 *
3357 * LOCKING:
3358 * EH context.
3359 *
3360 * RETURNS:
3361 * 0 if @linke is ready before @deadline; otherwise, -errno.
3362 */
3363int ata_wait_ready(struct ata_link *link, unsigned long deadline,
3364 int (*check_ready)(struct ata_link *link))
3365{
3366 unsigned long start = jiffies;
b48d58f5 3367 unsigned long nodev_deadline;
aa2731ad
TH
3368 int warned = 0;
3369
b48d58f5
TH
3370 /* choose which 0xff timeout to use, read comment in libata.h */
3371 if (link->ap->host->flags & ATA_HOST_PARALLEL_SCAN)
3372 nodev_deadline = ata_deadline(start, ATA_TMOUT_FF_WAIT_LONG);
3373 else
3374 nodev_deadline = ata_deadline(start, ATA_TMOUT_FF_WAIT);
3375
b1c72916
TH
3376 /* Slave readiness can't be tested separately from master. On
3377 * M/S emulation configuration, this function should be called
3378 * only on the master and it will handle both master and slave.
3379 */
3380 WARN_ON(link == link->ap->slave_link);
3381
aa2731ad
TH
3382 if (time_after(nodev_deadline, deadline))
3383 nodev_deadline = deadline;
3384
3385 while (1) {
3386 unsigned long now = jiffies;
3387 int ready, tmp;
3388
3389 ready = tmp = check_ready(link);
3390 if (ready > 0)
3391 return 0;
3392
b48d58f5
TH
3393 /*
3394 * -ENODEV could be transient. Ignore -ENODEV if link
aa2731ad 3395 * is online. Also, some SATA devices take a long
b48d58f5
TH
3396 * time to clear 0xff after reset. Wait for
3397 * ATA_TMOUT_FF_WAIT[_LONG] on -ENODEV if link isn't
3398 * offline.
aa2731ad
TH
3399 *
3400 * Note that some PATA controllers (pata_ali) explode
3401 * if status register is read more than once when
3402 * there's no device attached.
3403 */
3404 if (ready == -ENODEV) {
3405 if (ata_link_online(link))
3406 ready = 0;
3407 else if ((link->ap->flags & ATA_FLAG_SATA) &&
3408 !ata_link_offline(link) &&
3409 time_before(now, nodev_deadline))
3410 ready = 0;
3411 }
3412
3413 if (ready)
3414 return ready;
3415 if (time_after(now, deadline))
3416 return -EBUSY;
3417
3418 if (!warned && time_after(now, start + 5 * HZ) &&
3419 (deadline - now > 3 * HZ)) {
a9a79dfe 3420 ata_link_warn(link,
aa2731ad
TH
3421 "link is slow to respond, please be patient "
3422 "(ready=%d)\n", tmp);
3423 warned = 1;
3424 }
3425
97750ceb 3426 ata_msleep(link->ap, 50);
aa2731ad
TH
3427 }
3428}
3429
3430/**
3431 * ata_wait_after_reset - wait for link to become ready after reset
3432 * @link: link to be waited on
3433 * @deadline: deadline jiffies for the operation
3434 * @check_ready: callback to check link readiness
3435 *
3436 * Wait for @link to become ready after reset.
3437 *
3438 * LOCKING:
3439 * EH context.
3440 *
3441 * RETURNS:
3442 * 0 if @linke is ready before @deadline; otherwise, -errno.
3443 */
2b4221bb 3444int ata_wait_after_reset(struct ata_link *link, unsigned long deadline,
aa2731ad
TH
3445 int (*check_ready)(struct ata_link *link))
3446{
97750ceb 3447 ata_msleep(link->ap, ATA_WAIT_AFTER_RESET);
aa2731ad
TH
3448
3449 return ata_wait_ready(link, deadline, check_ready);
3450}
3451
d7bb4cc7 3452/**
936fd732
TH
3453 * sata_link_debounce - debounce SATA phy status
3454 * @link: ATA link to debounce SATA phy status for
d7bb4cc7 3455 * @params: timing parameters { interval, duratinon, timeout } in msec
d4b2bab4 3456 * @deadline: deadline jiffies for the operation
d7bb4cc7 3457 *
1152b261 3458 * Make sure SStatus of @link reaches stable state, determined by
d7bb4cc7
TH
3459 * holding the same value where DET is not 1 for @duration polled
3460 * every @interval, before @timeout. Timeout constraints the
d4b2bab4
TH
3461 * beginning of the stable state. Because DET gets stuck at 1 on
3462 * some controllers after hot unplugging, this functions waits
d7bb4cc7
TH
3463 * until timeout then returns 0 if DET is stable at 1.
3464 *
d4b2bab4
TH
3465 * @timeout is further limited by @deadline. The sooner of the
3466 * two is used.
3467 *
d7bb4cc7
TH
3468 * LOCKING:
3469 * Kernel thread context (may sleep)
3470 *
3471 * RETURNS:
3472 * 0 on success, -errno on failure.
3473 */
936fd732
TH
3474int sata_link_debounce(struct ata_link *link, const unsigned long *params,
3475 unsigned long deadline)
7a7921e8 3476{
341c2c95
TH
3477 unsigned long interval = params[0];
3478 unsigned long duration = params[1];
d4b2bab4 3479 unsigned long last_jiffies, t;
d7bb4cc7
TH
3480 u32 last, cur;
3481 int rc;
3482
341c2c95 3483 t = ata_deadline(jiffies, params[2]);
d4b2bab4
TH
3484 if (time_before(t, deadline))
3485 deadline = t;
3486
936fd732 3487 if ((rc = sata_scr_read(link, SCR_STATUS, &cur)))
d7bb4cc7
TH
3488 return rc;
3489 cur &= 0xf;
3490
3491 last = cur;
3492 last_jiffies = jiffies;
3493
3494 while (1) {
97750ceb 3495 ata_msleep(link->ap, interval);
936fd732 3496 if ((rc = sata_scr_read(link, SCR_STATUS, &cur)))
d7bb4cc7
TH
3497 return rc;
3498 cur &= 0xf;
3499
3500 /* DET stable? */
3501 if (cur == last) {
d4b2bab4 3502 if (cur == 1 && time_before(jiffies, deadline))
d7bb4cc7 3503 continue;
341c2c95
TH
3504 if (time_after(jiffies,
3505 ata_deadline(last_jiffies, duration)))
d7bb4cc7
TH
3506 return 0;
3507 continue;
3508 }
3509
3510 /* unstable, start over */
3511 last = cur;
3512 last_jiffies = jiffies;
3513
f1545154
TH
3514 /* Check deadline. If debouncing failed, return
3515 * -EPIPE to tell upper layer to lower link speed.
3516 */
d4b2bab4 3517 if (time_after(jiffies, deadline))
f1545154 3518 return -EPIPE;
d7bb4cc7
TH
3519 }
3520}
3521
3522/**
936fd732
TH
3523 * sata_link_resume - resume SATA link
3524 * @link: ATA link to resume SATA
d7bb4cc7 3525 * @params: timing parameters { interval, duratinon, timeout } in msec
d4b2bab4 3526 * @deadline: deadline jiffies for the operation
d7bb4cc7 3527 *
936fd732 3528 * Resume SATA phy @link and debounce it.
d7bb4cc7
TH
3529 *
3530 * LOCKING:
3531 * Kernel thread context (may sleep)
3532 *
3533 * RETURNS:
3534 * 0 on success, -errno on failure.
3535 */
936fd732
TH
3536int sata_link_resume(struct ata_link *link, const unsigned long *params,
3537 unsigned long deadline)
d7bb4cc7 3538{
5040ab67 3539 int tries = ATA_LINK_RESUME_TRIES;
ac371987 3540 u32 scontrol, serror;
81952c54
TH
3541 int rc;
3542
936fd732 3543 if ((rc = sata_scr_read(link, SCR_CONTROL, &scontrol)))
81952c54 3544 return rc;
7a7921e8 3545
5040ab67
TH
3546 /*
3547 * Writes to SControl sometimes get ignored under certain
3548 * controllers (ata_piix SIDPR). Make sure DET actually is
3549 * cleared.
3550 */
3551 do {
3552 scontrol = (scontrol & 0x0f0) | 0x300;
3553 if ((rc = sata_scr_write(link, SCR_CONTROL, scontrol)))
3554 return rc;
3555 /*
3556 * Some PHYs react badly if SStatus is pounded
3557 * immediately after resuming. Delay 200ms before
3558 * debouncing.
3559 */
97750ceb 3560 ata_msleep(link->ap, 200);
81952c54 3561
5040ab67
TH
3562 /* is SControl restored correctly? */
3563 if ((rc = sata_scr_read(link, SCR_CONTROL, &scontrol)))
3564 return rc;
3565 } while ((scontrol & 0xf0f) != 0x300 && --tries);
7a7921e8 3566
5040ab67 3567 if ((scontrol & 0xf0f) != 0x300) {
38941c95 3568 ata_link_warn(link, "failed to resume link (SControl %X)\n",
a9a79dfe 3569 scontrol);
5040ab67
TH
3570 return 0;
3571 }
3572
3573 if (tries < ATA_LINK_RESUME_TRIES)
a9a79dfe
JP
3574 ata_link_warn(link, "link resume succeeded after %d retries\n",
3575 ATA_LINK_RESUME_TRIES - tries);
7a7921e8 3576
ac371987
TH
3577 if ((rc = sata_link_debounce(link, params, deadline)))
3578 return rc;
3579
f046519f 3580 /* clear SError, some PHYs require this even for SRST to work */
ac371987
TH
3581 if (!(rc = sata_scr_read(link, SCR_ERROR, &serror)))
3582 rc = sata_scr_write(link, SCR_ERROR, serror);
ac371987 3583
f046519f 3584 return rc != -EINVAL ? rc : 0;
7a7921e8
TH
3585}
3586
1152b261
TH
3587/**
3588 * sata_link_scr_lpm - manipulate SControl IPM and SPM fields
3589 * @link: ATA link to manipulate SControl for
3590 * @policy: LPM policy to configure
3591 * @spm_wakeup: initiate LPM transition to active state
3592 *
3593 * Manipulate the IPM field of the SControl register of @link
3594 * according to @policy. If @policy is ATA_LPM_MAX_POWER and
3595 * @spm_wakeup is %true, the SPM field is manipulated to wake up
3596 * the link. This function also clears PHYRDY_CHG before
3597 * returning.
3598 *
3599 * LOCKING:
3600 * EH context.
3601 *
3602 * RETURNS:
3603 * 0 on succes, -errno otherwise.
3604 */
3605int sata_link_scr_lpm(struct ata_link *link, enum ata_lpm_policy policy,
3606 bool spm_wakeup)
3607{
3608 struct ata_eh_context *ehc = &link->eh_context;
3609 bool woken_up = false;
3610 u32 scontrol;
3611 int rc;
3612
3613 rc = sata_scr_read(link, SCR_CONTROL, &scontrol);
3614 if (rc)
3615 return rc;
3616
3617 switch (policy) {
3618 case ATA_LPM_MAX_POWER:
3619 /* disable all LPM transitions */
65fe1f0f 3620 scontrol |= (0x7 << 8);
1152b261
TH
3621 /* initiate transition to active state */
3622 if (spm_wakeup) {
3623 scontrol |= (0x4 << 12);
3624 woken_up = true;
3625 }
3626 break;
3627 case ATA_LPM_MED_POWER:
3628 /* allow LPM to PARTIAL */
3629 scontrol &= ~(0x1 << 8);
65fe1f0f 3630 scontrol |= (0x6 << 8);
1152b261
TH
3631 break;
3632 case ATA_LPM_MIN_POWER:
8a745f1f
KCA
3633 if (ata_link_nr_enabled(link) > 0)
3634 /* no restrictions on LPM transitions */
65fe1f0f 3635 scontrol &= ~(0x7 << 8);
8a745f1f
KCA
3636 else {
3637 /* empty port, power off */
3638 scontrol &= ~0xf;
3639 scontrol |= (0x1 << 2);
3640 }
1152b261
TH
3641 break;
3642 default:
3643 WARN_ON(1);
3644 }
3645
3646 rc = sata_scr_write(link, SCR_CONTROL, scontrol);
3647 if (rc)
3648 return rc;
3649
3650 /* give the link time to transit out of LPM state */
3651 if (woken_up)
3652 msleep(10);
3653
3654 /* clear PHYRDY_CHG from SError */
3655 ehc->i.serror &= ~SERR_PHYRDY_CHG;
3656 return sata_scr_write(link, SCR_ERROR, SERR_PHYRDY_CHG);
3657}
3658
f5914a46 3659/**
0aa1113d 3660 * ata_std_prereset - prepare for reset
cc0680a5 3661 * @link: ATA link to be reset
d4b2bab4 3662 * @deadline: deadline jiffies for the operation
f5914a46 3663 *
cc0680a5 3664 * @link is about to be reset. Initialize it. Failure from
b8cffc6a
TH
3665 * prereset makes libata abort whole reset sequence and give up
3666 * that port, so prereset should be best-effort. It does its
3667 * best to prepare for reset sequence but if things go wrong, it
3668 * should just whine, not fail.
f5914a46
TH
3669 *
3670 * LOCKING:
3671 * Kernel thread context (may sleep)
3672 *
3673 * RETURNS:
3674 * 0 on success, -errno otherwise.
3675 */
0aa1113d 3676int ata_std_prereset(struct ata_link *link, unsigned long deadline)
f5914a46 3677{
cc0680a5 3678 struct ata_port *ap = link->ap;
936fd732 3679 struct ata_eh_context *ehc = &link->eh_context;
e9c83914 3680 const unsigned long *timing = sata_ehc_deb_timing(ehc);
f5914a46
TH
3681 int rc;
3682
f5914a46
TH
3683 /* if we're about to do hardreset, nothing more to do */
3684 if (ehc->i.action & ATA_EH_HARDRESET)
3685 return 0;
3686
936fd732 3687 /* if SATA, resume link */
a16abc0b 3688 if (ap->flags & ATA_FLAG_SATA) {
936fd732 3689 rc = sata_link_resume(link, timing, deadline);
b8cffc6a
TH
3690 /* whine about phy resume failure but proceed */
3691 if (rc && rc != -EOPNOTSUPP)
a9a79dfe
JP
3692 ata_link_warn(link,
3693 "failed to resume link for reset (errno=%d)\n",
3694 rc);
f5914a46
TH
3695 }
3696
45db2f6c 3697 /* no point in trying softreset on offline link */
b1c72916 3698 if (ata_phys_link_offline(link))
45db2f6c
TH
3699 ehc->i.action &= ~ATA_EH_SOFTRESET;
3700
f5914a46
TH
3701 return 0;
3702}
3703
c2bd5804 3704/**
624d5c51
TH
3705 * sata_link_hardreset - reset link via SATA phy reset
3706 * @link: link to reset
3707 * @timing: timing parameters { interval, duratinon, timeout } in msec
d4b2bab4 3708 * @deadline: deadline jiffies for the operation
9dadd45b
TH
3709 * @online: optional out parameter indicating link onlineness
3710 * @check_ready: optional callback to check link readiness
c2bd5804 3711 *
624d5c51 3712 * SATA phy-reset @link using DET bits of SControl register.
9dadd45b
TH
3713 * After hardreset, link readiness is waited upon using
3714 * ata_wait_ready() if @check_ready is specified. LLDs are
3715 * allowed to not specify @check_ready and wait itself after this
3716 * function returns. Device classification is LLD's
3717 * responsibility.
3718 *
3719 * *@online is set to one iff reset succeeded and @link is online
3720 * after reset.
c2bd5804
TH
3721 *
3722 * LOCKING:
3723 * Kernel thread context (may sleep)
3724 *
3725 * RETURNS:
3726 * 0 on success, -errno otherwise.
3727 */
624d5c51 3728int sata_link_hardreset(struct ata_link *link, const unsigned long *timing,
9dadd45b
TH
3729 unsigned long deadline,
3730 bool *online, int (*check_ready)(struct ata_link *))
c2bd5804 3731{
624d5c51 3732 u32 scontrol;
81952c54 3733 int rc;
852ee16a 3734
c2bd5804
TH
3735 DPRINTK("ENTER\n");
3736
9dadd45b
TH
3737 if (online)
3738 *online = false;
3739
936fd732 3740 if (sata_set_spd_needed(link)) {
1c3fae4d
TH
3741 /* SATA spec says nothing about how to reconfigure
3742 * spd. To be on the safe side, turn off phy during
3743 * reconfiguration. This works for at least ICH7 AHCI
3744 * and Sil3124.
3745 */
936fd732 3746 if ((rc = sata_scr_read(link, SCR_CONTROL, &scontrol)))
b6103f6d 3747 goto out;
81952c54 3748
a34b6fc0 3749 scontrol = (scontrol & 0x0f0) | 0x304;
81952c54 3750
936fd732 3751 if ((rc = sata_scr_write(link, SCR_CONTROL, scontrol)))
b6103f6d 3752 goto out;
1c3fae4d 3753
936fd732 3754 sata_set_spd(link);
1c3fae4d
TH
3755 }
3756
3757 /* issue phy wake/reset */
936fd732 3758 if ((rc = sata_scr_read(link, SCR_CONTROL, &scontrol)))
b6103f6d 3759 goto out;
81952c54 3760
852ee16a 3761 scontrol = (scontrol & 0x0f0) | 0x301;
81952c54 3762
936fd732 3763 if ((rc = sata_scr_write_flush(link, SCR_CONTROL, scontrol)))
b6103f6d 3764 goto out;
c2bd5804 3765
1c3fae4d 3766 /* Couldn't find anything in SATA I/II specs, but AHCI-1.1
c2bd5804
TH
3767 * 10.4.2 says at least 1 ms.
3768 */
97750ceb 3769 ata_msleep(link->ap, 1);
c2bd5804 3770
936fd732
TH
3771 /* bring link back */
3772 rc = sata_link_resume(link, timing, deadline);
9dadd45b
TH
3773 if (rc)
3774 goto out;
3775 /* if link is offline nothing more to do */
b1c72916 3776 if (ata_phys_link_offline(link))
9dadd45b
TH
3777 goto out;
3778
3779 /* Link is online. From this point, -ENODEV too is an error. */
3780 if (online)
3781 *online = true;
3782
071f44b1 3783 if (sata_pmp_supported(link->ap) && ata_is_host_link(link)) {
9dadd45b
TH
3784 /* If PMP is supported, we have to do follow-up SRST.
3785 * Some PMPs don't send D2H Reg FIS after hardreset if
3786 * the first port is empty. Wait only for
3787 * ATA_TMOUT_PMP_SRST_WAIT.
3788 */
3789 if (check_ready) {
3790 unsigned long pmp_deadline;
3791
341c2c95
TH
3792 pmp_deadline = ata_deadline(jiffies,
3793 ATA_TMOUT_PMP_SRST_WAIT);
9dadd45b
TH
3794 if (time_after(pmp_deadline, deadline))
3795 pmp_deadline = deadline;
3796 ata_wait_ready(link, pmp_deadline, check_ready);
3797 }
3798 rc = -EAGAIN;
3799 goto out;
3800 }
3801
3802 rc = 0;
3803 if (check_ready)
3804 rc = ata_wait_ready(link, deadline, check_ready);
b6103f6d 3805 out:
0cbf0711
TH
3806 if (rc && rc != -EAGAIN) {
3807 /* online is set iff link is online && reset succeeded */
3808 if (online)
3809 *online = false;
a9a79dfe 3810 ata_link_err(link, "COMRESET failed (errno=%d)\n", rc);
0cbf0711 3811 }
b6103f6d
TH
3812 DPRINTK("EXIT, rc=%d\n", rc);
3813 return rc;
3814}
3815
57c9efdf
TH
3816/**
3817 * sata_std_hardreset - COMRESET w/o waiting or classification
3818 * @link: link to reset
3819 * @class: resulting class of attached device
3820 * @deadline: deadline jiffies for the operation
3821 *
3822 * Standard SATA COMRESET w/o waiting or classification.
3823 *
3824 * LOCKING:
3825 * Kernel thread context (may sleep)
3826 *
3827 * RETURNS:
3828 * 0 if link offline, -EAGAIN if link online, -errno on errors.
3829 */
3830int sata_std_hardreset(struct ata_link *link, unsigned int *class,
3831 unsigned long deadline)
3832{
3833 const unsigned long *timing = sata_ehc_deb_timing(&link->eh_context);
3834 bool online;
3835 int rc;
3836
3837 /* do hardreset */
3838 rc = sata_link_hardreset(link, timing, deadline, &online, NULL);
57c9efdf
TH
3839 return online ? -EAGAIN : rc;
3840}
3841
c2bd5804 3842/**
203c75b8 3843 * ata_std_postreset - standard postreset callback
cc0680a5 3844 * @link: the target ata_link
c2bd5804
TH
3845 * @classes: classes of attached devices
3846 *
3847 * This function is invoked after a successful reset. Note that
3848 * the device might have been reset more than once using
3849 * different reset methods before postreset is invoked.
c2bd5804 3850 *
c2bd5804
TH
3851 * LOCKING:
3852 * Kernel thread context (may sleep)
3853 */
203c75b8 3854void ata_std_postreset(struct ata_link *link, unsigned int *classes)
c2bd5804 3855{
f046519f
TH
3856 u32 serror;
3857
c2bd5804
TH
3858 DPRINTK("ENTER\n");
3859
f046519f
TH
3860 /* reset complete, clear SError */
3861 if (!sata_scr_read(link, SCR_ERROR, &serror))
3862 sata_scr_write(link, SCR_ERROR, serror);
3863
c2bd5804 3864 /* print link status */
936fd732 3865 sata_print_link_status(link);
c2bd5804 3866
c2bd5804
TH
3867 DPRINTK("EXIT\n");
3868}
3869
623a3128
TH
3870/**
3871 * ata_dev_same_device - Determine whether new ID matches configured device
623a3128
TH
3872 * @dev: device to compare against
3873 * @new_class: class of the new device
3874 * @new_id: IDENTIFY page of the new device
3875 *
3876 * Compare @new_class and @new_id against @dev and determine
3877 * whether @dev is the device indicated by @new_class and
3878 * @new_id.
3879 *
3880 * LOCKING:
3881 * None.
3882 *
3883 * RETURNS:
3884 * 1 if @dev matches @new_class and @new_id, 0 otherwise.
3885 */
3373efd8
TH
3886static int ata_dev_same_device(struct ata_device *dev, unsigned int new_class,
3887 const u16 *new_id)
623a3128
TH
3888{
3889 const u16 *old_id = dev->id;
a0cf733b
TH
3890 unsigned char model[2][ATA_ID_PROD_LEN + 1];
3891 unsigned char serial[2][ATA_ID_SERNO_LEN + 1];
623a3128
TH
3892
3893 if (dev->class != new_class) {
a9a79dfe
JP
3894 ata_dev_info(dev, "class mismatch %d != %d\n",
3895 dev->class, new_class);
623a3128
TH
3896 return 0;
3897 }
3898
a0cf733b
TH
3899 ata_id_c_string(old_id, model[0], ATA_ID_PROD, sizeof(model[0]));
3900 ata_id_c_string(new_id, model[1], ATA_ID_PROD, sizeof(model[1]));
3901 ata_id_c_string(old_id, serial[0], ATA_ID_SERNO, sizeof(serial[0]));
3902 ata_id_c_string(new_id, serial[1], ATA_ID_SERNO, sizeof(serial[1]));
623a3128
TH
3903
3904 if (strcmp(model[0], model[1])) {
a9a79dfe
JP
3905 ata_dev_info(dev, "model number mismatch '%s' != '%s'\n",
3906 model[0], model[1]);
623a3128
TH
3907 return 0;
3908 }
3909
3910 if (strcmp(serial[0], serial[1])) {
a9a79dfe
JP
3911 ata_dev_info(dev, "serial number mismatch '%s' != '%s'\n",
3912 serial[0], serial[1]);
623a3128
TH
3913 return 0;
3914 }
3915
623a3128
TH
3916 return 1;
3917}
3918
3919/**
fe30911b 3920 * ata_dev_reread_id - Re-read IDENTIFY data
3fae450c 3921 * @dev: target ATA device
bff04647 3922 * @readid_flags: read ID flags
623a3128
TH
3923 *
3924 * Re-read IDENTIFY page and make sure @dev is still attached to
3925 * the port.
3926 *
3927 * LOCKING:
3928 * Kernel thread context (may sleep)
3929 *
3930 * RETURNS:
3931 * 0 on success, negative errno otherwise
3932 */
fe30911b 3933int ata_dev_reread_id(struct ata_device *dev, unsigned int readid_flags)
623a3128 3934{
5eb45c02 3935 unsigned int class = dev->class;
9af5c9c9 3936 u16 *id = (void *)dev->link->ap->sector_buf;
623a3128
TH
3937 int rc;
3938
fe635c7e 3939 /* read ID data */
bff04647 3940 rc = ata_dev_read_id(dev, &class, readid_flags, id);
623a3128 3941 if (rc)
fe30911b 3942 return rc;
623a3128
TH
3943
3944 /* is the device still there? */
fe30911b
TH
3945 if (!ata_dev_same_device(dev, class, id))
3946 return -ENODEV;
623a3128 3947
fe635c7e 3948 memcpy(dev->id, id, sizeof(id[0]) * ATA_ID_WORDS);
fe30911b
TH
3949 return 0;
3950}
3951
3952/**
3953 * ata_dev_revalidate - Revalidate ATA device
3954 * @dev: device to revalidate
422c9daa 3955 * @new_class: new class code
fe30911b
TH
3956 * @readid_flags: read ID flags
3957 *
3958 * Re-read IDENTIFY page, make sure @dev is still attached to the
3959 * port and reconfigure it according to the new IDENTIFY page.
3960 *
3961 * LOCKING:
3962 * Kernel thread context (may sleep)
3963 *
3964 * RETURNS:
3965 * 0 on success, negative errno otherwise
3966 */
422c9daa
TH
3967int ata_dev_revalidate(struct ata_device *dev, unsigned int new_class,
3968 unsigned int readid_flags)
fe30911b 3969{
6ddcd3b0 3970 u64 n_sectors = dev->n_sectors;
5920dadf 3971 u64 n_native_sectors = dev->n_native_sectors;
fe30911b
TH
3972 int rc;
3973
3974 if (!ata_dev_enabled(dev))
3975 return -ENODEV;
3976
422c9daa
TH
3977 /* fail early if !ATA && !ATAPI to avoid issuing [P]IDENTIFY to PMP */
3978 if (ata_class_enabled(new_class) &&
f0d0613d
BP
3979 new_class != ATA_DEV_ATA &&
3980 new_class != ATA_DEV_ATAPI &&
3981 new_class != ATA_DEV_SEMB) {
a9a79dfe
JP
3982 ata_dev_info(dev, "class mismatch %u != %u\n",
3983 dev->class, new_class);
422c9daa
TH
3984 rc = -ENODEV;
3985 goto fail;
3986 }
3987
fe30911b
TH
3988 /* re-read ID */
3989 rc = ata_dev_reread_id(dev, readid_flags);
3990 if (rc)
3991 goto fail;
623a3128
TH
3992
3993 /* configure device according to the new ID */
efdaedc4 3994 rc = ata_dev_configure(dev);
6ddcd3b0
TH
3995 if (rc)
3996 goto fail;
3997
3998 /* verify n_sectors hasn't changed */
445d211b
TH
3999 if (dev->class != ATA_DEV_ATA || !n_sectors ||
4000 dev->n_sectors == n_sectors)
4001 return 0;
4002
4003 /* n_sectors has changed */
a9a79dfe
JP
4004 ata_dev_warn(dev, "n_sectors mismatch %llu != %llu\n",
4005 (unsigned long long)n_sectors,
4006 (unsigned long long)dev->n_sectors);
445d211b
TH
4007
4008 /*
4009 * Something could have caused HPA to be unlocked
4010 * involuntarily. If n_native_sectors hasn't changed and the
4011 * new size matches it, keep the device.
4012 */
4013 if (dev->n_native_sectors == n_native_sectors &&
4014 dev->n_sectors > n_sectors && dev->n_sectors == n_native_sectors) {
a9a79dfe
JP
4015 ata_dev_warn(dev,
4016 "new n_sectors matches native, probably "
4017 "late HPA unlock, n_sectors updated\n");
68939ce5 4018 /* use the larger n_sectors */
445d211b 4019 return 0;
6ddcd3b0
TH
4020 }
4021
445d211b
TH
4022 /*
4023 * Some BIOSes boot w/o HPA but resume w/ HPA locked. Try
4024 * unlocking HPA in those cases.
4025 *
4026 * https://bugzilla.kernel.org/show_bug.cgi?id=15396
4027 */
4028 if (dev->n_native_sectors == n_native_sectors &&
4029 dev->n_sectors < n_sectors && n_sectors == n_native_sectors &&
4030 !(dev->horkage & ATA_HORKAGE_BROKEN_HPA)) {
a9a79dfe
JP
4031 ata_dev_warn(dev,
4032 "old n_sectors matches native, probably "
4033 "late HPA lock, will try to unlock HPA\n");
445d211b
TH
4034 /* try unlocking HPA */
4035 dev->flags |= ATA_DFLAG_UNLOCK_HPA;
4036 rc = -EIO;
4037 } else
4038 rc = -ENODEV;
623a3128 4039
445d211b
TH
4040 /* restore original n_[native_]sectors and fail */
4041 dev->n_native_sectors = n_native_sectors;
4042 dev->n_sectors = n_sectors;
623a3128 4043 fail:
a9a79dfe 4044 ata_dev_err(dev, "revalidation failed (errno=%d)\n", rc);
623a3128
TH
4045 return rc;
4046}
4047
6919a0a6
AC
4048struct ata_blacklist_entry {
4049 const char *model_num;
4050 const char *model_rev;
4051 unsigned long horkage;
4052};
4053
4054static const struct ata_blacklist_entry ata_device_blacklist [] = {
4055 /* Devices with DMA related problems under Linux */
4056 { "WDC AC11000H", NULL, ATA_HORKAGE_NODMA },
4057 { "WDC AC22100H", NULL, ATA_HORKAGE_NODMA },
4058 { "WDC AC32500H", NULL, ATA_HORKAGE_NODMA },
4059 { "WDC AC33100H", NULL, ATA_HORKAGE_NODMA },
4060 { "WDC AC31600H", NULL, ATA_HORKAGE_NODMA },
4061 { "WDC AC32100H", "24.09P07", ATA_HORKAGE_NODMA },
4062 { "WDC AC23200L", "21.10N21", ATA_HORKAGE_NODMA },
4063 { "Compaq CRD-8241B", NULL, ATA_HORKAGE_NODMA },
4064 { "CRD-8400B", NULL, ATA_HORKAGE_NODMA },
7da4c935 4065 { "CRD-848[02]B", NULL, ATA_HORKAGE_NODMA },
6919a0a6
AC
4066 { "CRD-84", NULL, ATA_HORKAGE_NODMA },
4067 { "SanDisk SDP3B", NULL, ATA_HORKAGE_NODMA },
4068 { "SanDisk SDP3B-64", NULL, ATA_HORKAGE_NODMA },
4069 { "SANYO CD-ROM CRD", NULL, ATA_HORKAGE_NODMA },
4070 { "HITACHI CDR-8", NULL, ATA_HORKAGE_NODMA },
7da4c935 4071 { "HITACHI CDR-8[34]35",NULL, ATA_HORKAGE_NODMA },
6919a0a6
AC
4072 { "Toshiba CD-ROM XM-6202B", NULL, ATA_HORKAGE_NODMA },
4073 { "TOSHIBA CD-ROM XM-1702BC", NULL, ATA_HORKAGE_NODMA },
4074 { "CD-532E-A", NULL, ATA_HORKAGE_NODMA },
4075 { "E-IDE CD-ROM CR-840",NULL, ATA_HORKAGE_NODMA },
4076 { "CD-ROM Drive/F5A", NULL, ATA_HORKAGE_NODMA },
4077 { "WPI CDD-820", NULL, ATA_HORKAGE_NODMA },
4078 { "SAMSUNG CD-ROM SC-148C", NULL, ATA_HORKAGE_NODMA },
4079 { "SAMSUNG CD-ROM SC", NULL, ATA_HORKAGE_NODMA },
6919a0a6
AC
4080 { "ATAPI CD-ROM DRIVE 40X MAXIMUM",NULL,ATA_HORKAGE_NODMA },
4081 { "_NEC DV5800A", NULL, ATA_HORKAGE_NODMA },
2dcb407e 4082 { "SAMSUNG CD-ROM SN-124", "N001", ATA_HORKAGE_NODMA },
39f19886 4083 { "Seagate STT20000A", NULL, ATA_HORKAGE_NODMA },
d70e551c 4084 { "2GB ATA Flash Disk", "ADMA428M", ATA_HORKAGE_NODMA },
3af9a77a 4085 /* Odd clown on sil3726/4726 PMPs */
50af2fa1 4086 { "Config Disk", NULL, ATA_HORKAGE_DISABLE },
6919a0a6 4087
18d6e9d5 4088 /* Weird ATAPI devices */
40a1d531 4089 { "TORiSAN DVD-ROM DRD-N216", NULL, ATA_HORKAGE_MAX_SEC_128 },
6a87e42e 4090 { "QUANTUM DAT DAT72-000", NULL, ATA_HORKAGE_ATAPI_MOD16_DMA },
18d6e9d5 4091
6919a0a6
AC
4092 /* Devices we expect to fail diagnostics */
4093
4094 /* Devices where NCQ should be avoided */
4095 /* NCQ is slow */
2dcb407e 4096 { "WDC WD740ADFD-00", NULL, ATA_HORKAGE_NONCQ },
459ad688 4097 { "WDC WD740ADFD-00NLR1", NULL, ATA_HORKAGE_NONCQ, },
09125ea6
TH
4098 /* http://thread.gmane.org/gmane.linux.ide/14907 */
4099 { "FUJITSU MHT2060BH", NULL, ATA_HORKAGE_NONCQ },
7acfaf30 4100 /* NCQ is broken */
539cc7c7 4101 { "Maxtor *", "BANC*", ATA_HORKAGE_NONCQ },
0e3dbc01 4102 { "Maxtor 7V300F0", "VA111630", ATA_HORKAGE_NONCQ },
da6f0ec2 4103 { "ST380817AS", "3.42", ATA_HORKAGE_NONCQ },
e41bd3e8 4104 { "ST3160023AS", "3.42", ATA_HORKAGE_NONCQ },
5ccfca97 4105 { "OCZ CORE_SSD", "02.10104", ATA_HORKAGE_NONCQ },
539cc7c7 4106
ac70a964 4107 /* Seagate NCQ + FLUSH CACHE firmware bug */
4d1f9082 4108 { "ST31500341AS", "SD1[5-9]", ATA_HORKAGE_NONCQ |
ac70a964 4109 ATA_HORKAGE_FIRMWARE_WARN },
d10d491f 4110
4d1f9082 4111 { "ST31000333AS", "SD1[5-9]", ATA_HORKAGE_NONCQ |
d10d491f
TH
4112 ATA_HORKAGE_FIRMWARE_WARN },
4113
4d1f9082 4114 { "ST3640[36]23AS", "SD1[5-9]", ATA_HORKAGE_NONCQ |
d10d491f
TH
4115 ATA_HORKAGE_FIRMWARE_WARN },
4116
4d1f9082 4117 { "ST3320[68]13AS", "SD1[5-9]", ATA_HORKAGE_NONCQ |
ac70a964
TH
4118 ATA_HORKAGE_FIRMWARE_WARN },
4119
36e337d0
RH
4120 /* Blacklist entries taken from Silicon Image 3124/3132
4121 Windows driver .inf file - also several Linux problem reports */
4122 { "HTS541060G9SA00", "MB3OC60D", ATA_HORKAGE_NONCQ, },
4123 { "HTS541080G9SA00", "MB4OC60D", ATA_HORKAGE_NONCQ, },
4124 { "HTS541010G9SA00", "MBZOC60D", ATA_HORKAGE_NONCQ, },
6919a0a6 4125
68b0ddb2
TH
4126 /* https://bugzilla.kernel.org/show_bug.cgi?id=15573 */
4127 { "C300-CTFDDAC128MAG", "0001", ATA_HORKAGE_NONCQ, },
4128
16c55b03
TH
4129 /* devices which puke on READ_NATIVE_MAX */
4130 { "HDS724040KLSA80", "KFAOA20N", ATA_HORKAGE_BROKEN_HPA, },
4131 { "WDC WD3200JD-00KLB0", "WD-WCAMR1130137", ATA_HORKAGE_BROKEN_HPA },
4132 { "WDC WD2500JD-00HBB0", "WD-WMAL71490727", ATA_HORKAGE_BROKEN_HPA },
4133 { "MAXTOR 6L080L4", "A93.0500", ATA_HORKAGE_BROKEN_HPA },
6919a0a6 4134
7831387b
TH
4135 /* this one allows HPA unlocking but fails IOs on the area */
4136 { "OCZ-VERTEX", "1.30", ATA_HORKAGE_BROKEN_HPA },
4137
93328e11
AC
4138 /* Devices which report 1 sector over size HPA */
4139 { "ST340823A", NULL, ATA_HORKAGE_HPA_SIZE, },
4140 { "ST320413A", NULL, ATA_HORKAGE_HPA_SIZE, },
b152fcd3 4141 { "ST310211A", NULL, ATA_HORKAGE_HPA_SIZE, },
93328e11 4142
6bbfd53d
AC
4143 /* Devices which get the IVB wrong */
4144 { "QUANTUM FIREBALLlct10 05", "A03.0900", ATA_HORKAGE_IVB, },
a79067e5 4145 /* Maybe we should just blacklist TSSTcorp... */
7da4c935 4146 { "TSSTcorp CDDVDW SH-S202[HJN]", "SB0[01]", ATA_HORKAGE_IVB, },
6bbfd53d 4147
9ce8e307
JA
4148 /* Devices that do not need bridging limits applied */
4149 { "MTRON MSP-SATA*", NULL, ATA_HORKAGE_BRIDGE_OK, },
04d0f1b8 4150 { "BUFFALO HD-QSU2/R5", NULL, ATA_HORKAGE_BRIDGE_OK, },
9ce8e307 4151
9062712f
TH
4152 /* Devices which aren't very happy with higher link speeds */
4153 { "WD My Book", NULL, ATA_HORKAGE_1_5_GBPS, },
c531077f 4154 { "Seagate FreeAgent GoFlex", NULL, ATA_HORKAGE_1_5_GBPS, },
9062712f 4155
d0cb43b3
TH
4156 /*
4157 * Devices which choke on SETXFER. Applies only if both the
4158 * device and controller are SATA.
4159 */
cd691876 4160 { "PIONEER DVD-RW DVRTD08", NULL, ATA_HORKAGE_NOSETXFER },
3a25179e
VL
4161 { "PIONEER DVD-RW DVRTD08A", NULL, ATA_HORKAGE_NOSETXFER },
4162 { "PIONEER DVD-RW DVR-215", NULL, ATA_HORKAGE_NOSETXFER },
cd691876
TH
4163 { "PIONEER DVD-RW DVR-212D", NULL, ATA_HORKAGE_NOSETXFER },
4164 { "PIONEER DVD-RW DVR-216D", NULL, ATA_HORKAGE_NOSETXFER },
d0cb43b3 4165
6919a0a6
AC
4166 /* End Marker */
4167 { }
1da177e4 4168};
2e9edbf8 4169
bce036ce
ML
4170/**
4171 * glob_match - match a text string against a glob-style pattern
4172 * @text: the string to be examined
4173 * @pattern: the glob-style pattern to be matched against
4174 *
4175 * Either/both of text and pattern can be empty strings.
4176 *
4177 * Match text against a glob-style pattern, with wildcards and simple sets:
4178 *
4179 * ? matches any single character.
4180 * * matches any run of characters.
4181 * [xyz] matches a single character from the set: x, y, or z.
2f9e4d16
ML
4182 * [a-d] matches a single character from the range: a, b, c, or d.
4183 * [a-d0-9] matches a single character from either range.
bce036ce 4184 *
2f9e4d16
ML
4185 * The special characters ?, [, -, or *, can be matched using a set, eg. [*]
4186 * Behaviour with malformed patterns is undefined, though generally reasonable.
bce036ce 4187 *
3d2be54b 4188 * Sample patterns: "SD1?", "SD1[0-5]", "*R0", "SD*1?[012]*xx"
bce036ce
ML
4189 *
4190 * This function uses one level of recursion per '*' in pattern.
4191 * Since it calls _nothing_ else, and has _no_ explicit local variables,
4192 * this will not cause stack problems for any reasonable use here.
4193 *
4194 * RETURNS:
4195 * 0 on match, 1 otherwise.
4196 */
4197static int glob_match (const char *text, const char *pattern)
539cc7c7 4198{
bce036ce
ML
4199 do {
4200 /* Match single character or a '?' wildcard */
4201 if (*text == *pattern || *pattern == '?') {
4202 if (!*pattern++)
4203 return 0; /* End of both strings: match */
4204 } else {
4205 /* Match single char against a '[' bracketed ']' pattern set */
4206 if (!*text || *pattern != '[')
4207 break; /* Not a pattern set */
2f9e4d16
ML
4208 while (*++pattern && *pattern != ']' && *text != *pattern) {
4209 if (*pattern == '-' && *(pattern - 1) != '[')
4210 if (*text > *(pattern - 1) && *text < *(pattern + 1)) {
4211 ++pattern;
4212 break;
4213 }
4214 }
bce036ce
ML
4215 if (!*pattern || *pattern == ']')
4216 return 1; /* No match */
4217 while (*pattern && *pattern++ != ']');
4218 }
4219 } while (*++text && *pattern);
4220
4221 /* Match any run of chars against a '*' wildcard */
4222 if (*pattern == '*') {
4223 if (!*++pattern)
4224 return 0; /* Match: avoid recursion at end of pattern */
4225 /* Loop to handle additional pattern chars after the wildcard */
4226 while (*text) {
4227 if (glob_match(text, pattern) == 0)
4228 return 0; /* Remainder matched */
4229 ++text; /* Absorb (match) this char and try again */
317b50b8
AP
4230 }
4231 }
bce036ce
ML
4232 if (!*text && !*pattern)
4233 return 0; /* End of both strings: match */
4234 return 1; /* No match */
539cc7c7 4235}
4fca377f 4236
75683fe7 4237static unsigned long ata_dev_blacklisted(const struct ata_device *dev)
1da177e4 4238{
8bfa79fc
TH
4239 unsigned char model_num[ATA_ID_PROD_LEN + 1];
4240 unsigned char model_rev[ATA_ID_FW_REV_LEN + 1];
6919a0a6 4241 const struct ata_blacklist_entry *ad = ata_device_blacklist;
3a778275 4242
8bfa79fc
TH
4243 ata_id_c_string(dev->id, model_num, ATA_ID_PROD, sizeof(model_num));
4244 ata_id_c_string(dev->id, model_rev, ATA_ID_FW_REV, sizeof(model_rev));
1da177e4 4245
6919a0a6 4246 while (ad->model_num) {
bce036ce 4247 if (!glob_match(model_num, ad->model_num)) {
6919a0a6
AC
4248 if (ad->model_rev == NULL)
4249 return ad->horkage;
bce036ce 4250 if (!glob_match(model_rev, ad->model_rev))
6919a0a6 4251 return ad->horkage;
f4b15fef 4252 }
6919a0a6 4253 ad++;
f4b15fef 4254 }
1da177e4
LT
4255 return 0;
4256}
4257
6919a0a6
AC
4258static int ata_dma_blacklisted(const struct ata_device *dev)
4259{
4260 /* We don't support polling DMA.
4261 * DMA blacklist those ATAPI devices with CDB-intr (and use PIO)
4262 * if the LLDD handles only interrupts in the HSM_ST_LAST state.
4263 */
9af5c9c9 4264 if ((dev->link->ap->flags & ATA_FLAG_PIO_POLLING) &&
6919a0a6
AC
4265 (dev->flags & ATA_DFLAG_CDB_INTR))
4266 return 1;
75683fe7 4267 return (dev->horkage & ATA_HORKAGE_NODMA) ? 1 : 0;
6919a0a6
AC
4268}
4269
6bbfd53d
AC
4270/**
4271 * ata_is_40wire - check drive side detection
4272 * @dev: device
4273 *
4274 * Perform drive side detection decoding, allowing for device vendors
4275 * who can't follow the documentation.
4276 */
4277
4278static int ata_is_40wire(struct ata_device *dev)
4279{
4280 if (dev->horkage & ATA_HORKAGE_IVB)
4281 return ata_drive_40wire_relaxed(dev->id);
4282 return ata_drive_40wire(dev->id);
4283}
4284
15a5551c
AC
4285/**
4286 * cable_is_40wire - 40/80/SATA decider
4287 * @ap: port to consider
4288 *
4289 * This function encapsulates the policy for speed management
4290 * in one place. At the moment we don't cache the result but
4291 * there is a good case for setting ap->cbl to the result when
4292 * we are called with unknown cables (and figuring out if it
4293 * impacts hotplug at all).
4294 *
4295 * Return 1 if the cable appears to be 40 wire.
4296 */
4297
4298static int cable_is_40wire(struct ata_port *ap)
4299{
4300 struct ata_link *link;
4301 struct ata_device *dev;
4302
4a9c7b33 4303 /* If the controller thinks we are 40 wire, we are. */
15a5551c
AC
4304 if (ap->cbl == ATA_CBL_PATA40)
4305 return 1;
4a9c7b33
TH
4306
4307 /* If the controller thinks we are 80 wire, we are. */
15a5551c
AC
4308 if (ap->cbl == ATA_CBL_PATA80 || ap->cbl == ATA_CBL_SATA)
4309 return 0;
4a9c7b33
TH
4310
4311 /* If the system is known to be 40 wire short cable (eg
4312 * laptop), then we allow 80 wire modes even if the drive
4313 * isn't sure.
4314 */
f792068e
AC
4315 if (ap->cbl == ATA_CBL_PATA40_SHORT)
4316 return 0;
4a9c7b33
TH
4317
4318 /* If the controller doesn't know, we scan.
4319 *
4320 * Note: We look for all 40 wire detects at this point. Any
4321 * 80 wire detect is taken to be 80 wire cable because
4322 * - in many setups only the one drive (slave if present) will
4323 * give a valid detect
4324 * - if you have a non detect capable drive you don't want it
4325 * to colour the choice
4326 */
1eca4365
TH
4327 ata_for_each_link(link, ap, EDGE) {
4328 ata_for_each_dev(dev, link, ENABLED) {
4329 if (!ata_is_40wire(dev))
15a5551c
AC
4330 return 0;
4331 }
4332 }
4333 return 1;
4334}
4335
a6d5a51c
TH
4336/**
4337 * ata_dev_xfermask - Compute supported xfermask of the given device
a6d5a51c
TH
4338 * @dev: Device to compute xfermask for
4339 *
acf356b1
TH
4340 * Compute supported xfermask of @dev and store it in
4341 * dev->*_mask. This function is responsible for applying all
4342 * known limits including host controller limits, device
4343 * blacklist, etc...
a6d5a51c
TH
4344 *
4345 * LOCKING:
4346 * None.
a6d5a51c 4347 */
3373efd8 4348static void ata_dev_xfermask(struct ata_device *dev)
1da177e4 4349{
9af5c9c9
TH
4350 struct ata_link *link = dev->link;
4351 struct ata_port *ap = link->ap;
cca3974e 4352 struct ata_host *host = ap->host;
a6d5a51c 4353 unsigned long xfer_mask;
1da177e4 4354
37deecb5 4355 /* controller modes available */
565083e1
TH
4356 xfer_mask = ata_pack_xfermask(ap->pio_mask,
4357 ap->mwdma_mask, ap->udma_mask);
4358
8343f889 4359 /* drive modes available */
37deecb5
TH
4360 xfer_mask &= ata_pack_xfermask(dev->pio_mask,
4361 dev->mwdma_mask, dev->udma_mask);
4362 xfer_mask &= ata_id_xfermask(dev->id);
565083e1 4363
b352e57d
AC
4364 /*
4365 * CFA Advanced TrueIDE timings are not allowed on a shared
4366 * cable
4367 */
4368 if (ata_dev_pair(dev)) {
4369 /* No PIO5 or PIO6 */
4370 xfer_mask &= ~(0x03 << (ATA_SHIFT_PIO + 5));
4371 /* No MWDMA3 or MWDMA 4 */
4372 xfer_mask &= ~(0x03 << (ATA_SHIFT_MWDMA + 3));
4373 }
4374
37deecb5
TH
4375 if (ata_dma_blacklisted(dev)) {
4376 xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA);
a9a79dfe
JP
4377 ata_dev_warn(dev,
4378 "device is on DMA blacklist, disabling DMA\n");
37deecb5 4379 }
a6d5a51c 4380
14d66ab7 4381 if ((host->flags & ATA_HOST_SIMPLEX) &&
2dcb407e 4382 host->simplex_claimed && host->simplex_claimed != ap) {
37deecb5 4383 xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA);
a9a79dfe
JP
4384 ata_dev_warn(dev,
4385 "simplex DMA is claimed by other device, disabling DMA\n");
5444a6f4 4386 }
565083e1 4387
e424675f
JG
4388 if (ap->flags & ATA_FLAG_NO_IORDY)
4389 xfer_mask &= ata_pio_mask_no_iordy(dev);
4390
5444a6f4 4391 if (ap->ops->mode_filter)
a76b62ca 4392 xfer_mask = ap->ops->mode_filter(dev, xfer_mask);
5444a6f4 4393
8343f889
RH
4394 /* Apply cable rule here. Don't apply it early because when
4395 * we handle hot plug the cable type can itself change.
4396 * Check this last so that we know if the transfer rate was
4397 * solely limited by the cable.
4398 * Unknown or 80 wire cables reported host side are checked
4399 * drive side as well. Cases where we know a 40wire cable
4400 * is used safely for 80 are not checked here.
4401 */
4402 if (xfer_mask & (0xF8 << ATA_SHIFT_UDMA))
4403 /* UDMA/44 or higher would be available */
15a5551c 4404 if (cable_is_40wire(ap)) {
a9a79dfe
JP
4405 ata_dev_warn(dev,
4406 "limited to UDMA/33 due to 40-wire cable\n");
8343f889
RH
4407 xfer_mask &= ~(0xF8 << ATA_SHIFT_UDMA);
4408 }
4409
565083e1
TH
4410 ata_unpack_xfermask(xfer_mask, &dev->pio_mask,
4411 &dev->mwdma_mask, &dev->udma_mask);
1da177e4
LT
4412}
4413
1da177e4
LT
4414/**
4415 * ata_dev_set_xfermode - Issue SET FEATURES - XFER MODE command
1da177e4
LT
4416 * @dev: Device to which command will be sent
4417 *
780a87f7
JG
4418 * Issue SET FEATURES - XFER MODE command to device @dev
4419 * on port @ap.
4420 *
1da177e4 4421 * LOCKING:
0cba632b 4422 * PCI/etc. bus probe sem.
83206a29
TH
4423 *
4424 * RETURNS:
4425 * 0 on success, AC_ERR_* mask otherwise.
1da177e4
LT
4426 */
4427
3373efd8 4428static unsigned int ata_dev_set_xfermode(struct ata_device *dev)
1da177e4 4429{
a0123703 4430 struct ata_taskfile tf;
83206a29 4431 unsigned int err_mask;
1da177e4
LT
4432
4433 /* set up set-features taskfile */
4434 DPRINTK("set features - xfer mode\n");
4435
464cf177
TH
4436 /* Some controllers and ATAPI devices show flaky interrupt
4437 * behavior after setting xfer mode. Use polling instead.
4438 */
3373efd8 4439 ata_tf_init(dev, &tf);
a0123703
TH
4440 tf.command = ATA_CMD_SET_FEATURES;
4441 tf.feature = SETFEATURES_XFER;
464cf177 4442 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE | ATA_TFLAG_POLLING;
a0123703 4443 tf.protocol = ATA_PROT_NODATA;
b9f8ab2d 4444 /* If we are using IORDY we must send the mode setting command */
11b7becc
JG
4445 if (ata_pio_need_iordy(dev))
4446 tf.nsect = dev->xfer_mode;
b9f8ab2d
AC
4447 /* If the device has IORDY and the controller does not - turn it off */
4448 else if (ata_id_has_iordy(dev->id))
11b7becc 4449 tf.nsect = 0x01;
b9f8ab2d
AC
4450 else /* In the ancient relic department - skip all of this */
4451 return 0;
1da177e4 4452
2b789108 4453 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0, 0);
9f45cbd3
KCA
4454
4455 DPRINTK("EXIT, err_mask=%x\n", err_mask);
4456 return err_mask;
4457}
1152b261 4458
9f45cbd3 4459/**
218f3d30 4460 * ata_dev_set_feature - Issue SET FEATURES - SATA FEATURES
9f45cbd3
KCA
4461 * @dev: Device to which command will be sent
4462 * @enable: Whether to enable or disable the feature
218f3d30 4463 * @feature: The sector count represents the feature to set
9f45cbd3
KCA
4464 *
4465 * Issue SET FEATURES - SATA FEATURES command to device @dev
218f3d30 4466 * on port @ap with sector count
9f45cbd3
KCA
4467 *
4468 * LOCKING:
4469 * PCI/etc. bus probe sem.
4470 *
4471 * RETURNS:
4472 * 0 on success, AC_ERR_* mask otherwise.
4473 */
1152b261 4474unsigned int ata_dev_set_feature(struct ata_device *dev, u8 enable, u8 feature)
9f45cbd3
KCA
4475{
4476 struct ata_taskfile tf;
4477 unsigned int err_mask;
4478
4479 /* set up set-features taskfile */
4480 DPRINTK("set features - SATA features\n");
4481
4482 ata_tf_init(dev, &tf);
4483 tf.command = ATA_CMD_SET_FEATURES;
4484 tf.feature = enable;
4485 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
4486 tf.protocol = ATA_PROT_NODATA;
218f3d30 4487 tf.nsect = feature;
9f45cbd3 4488
2b789108 4489 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0, 0);
1da177e4 4490
83206a29
TH
4491 DPRINTK("EXIT, err_mask=%x\n", err_mask);
4492 return err_mask;
1da177e4
LT
4493}
4494
8bf62ece
AL
4495/**
4496 * ata_dev_init_params - Issue INIT DEV PARAMS command
8bf62ece 4497 * @dev: Device to which command will be sent
e2a7f77a
RD
4498 * @heads: Number of heads (taskfile parameter)
4499 * @sectors: Number of sectors (taskfile parameter)
8bf62ece
AL
4500 *
4501 * LOCKING:
6aff8f1f
TH
4502 * Kernel thread context (may sleep)
4503 *
4504 * RETURNS:
4505 * 0 on success, AC_ERR_* mask otherwise.
8bf62ece 4506 */
3373efd8
TH
4507static unsigned int ata_dev_init_params(struct ata_device *dev,
4508 u16 heads, u16 sectors)
8bf62ece 4509{
a0123703 4510 struct ata_taskfile tf;
6aff8f1f 4511 unsigned int err_mask;
8bf62ece
AL
4512
4513 /* Number of sectors per track 1-255. Number of heads 1-16 */
4514 if (sectors < 1 || sectors > 255 || heads < 1 || heads > 16)
00b6f5e9 4515 return AC_ERR_INVALID;
8bf62ece
AL
4516
4517 /* set up init dev params taskfile */
4518 DPRINTK("init dev params \n");
4519
3373efd8 4520 ata_tf_init(dev, &tf);
a0123703
TH
4521 tf.command = ATA_CMD_INIT_DEV_PARAMS;
4522 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
4523 tf.protocol = ATA_PROT_NODATA;
4524 tf.nsect = sectors;
4525 tf.device |= (heads - 1) & 0x0f; /* max head = num. of heads - 1 */
8bf62ece 4526
2b789108 4527 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0, 0);
18b2466c
AC
4528 /* A clean abort indicates an original or just out of spec drive
4529 and we should continue as we issue the setup based on the
4530 drive reported working geometry */
4531 if (err_mask == AC_ERR_DEV && (tf.feature & ATA_ABORTED))
4532 err_mask = 0;
8bf62ece 4533
6aff8f1f
TH
4534 DPRINTK("EXIT, err_mask=%x\n", err_mask);
4535 return err_mask;
8bf62ece
AL
4536}
4537
1da177e4 4538/**
0cba632b
JG
4539 * ata_sg_clean - Unmap DMA memory associated with command
4540 * @qc: Command containing DMA memory to be released
4541 *
4542 * Unmap all mapped DMA memory associated with this command.
1da177e4
LT
4543 *
4544 * LOCKING:
cca3974e 4545 * spin_lock_irqsave(host lock)
1da177e4 4546 */
70e6ad0c 4547void ata_sg_clean(struct ata_queued_cmd *qc)
1da177e4
LT
4548{
4549 struct ata_port *ap = qc->ap;
ff2aeb1e 4550 struct scatterlist *sg = qc->sg;
1da177e4
LT
4551 int dir = qc->dma_dir;
4552
efcb3cf7 4553 WARN_ON_ONCE(sg == NULL);
1da177e4 4554
dde20207 4555 VPRINTK("unmapping %u sg elements\n", qc->n_elem);
1da177e4 4556
dde20207 4557 if (qc->n_elem)
5825627c 4558 dma_unmap_sg(ap->dev, sg, qc->orig_n_elem, dir);
1da177e4
LT
4559
4560 qc->flags &= ~ATA_QCFLAG_DMAMAP;
ff2aeb1e 4561 qc->sg = NULL;
1da177e4
LT
4562}
4563
1da177e4 4564/**
5895ef9a 4565 * atapi_check_dma - Check whether ATAPI DMA can be supported
1da177e4
LT
4566 * @qc: Metadata associated with taskfile to check
4567 *
780a87f7
JG
4568 * Allow low-level driver to filter ATA PACKET commands, returning
4569 * a status indicating whether or not it is OK to use DMA for the
4570 * supplied PACKET command.
4571 *
1da177e4 4572 * LOCKING:
624d5c51
TH
4573 * spin_lock_irqsave(host lock)
4574 *
4575 * RETURNS: 0 when ATAPI DMA can be used
4576 * nonzero otherwise
4577 */
5895ef9a 4578int atapi_check_dma(struct ata_queued_cmd *qc)
624d5c51
TH
4579{
4580 struct ata_port *ap = qc->ap;
71601958 4581
624d5c51
TH
4582 /* Don't allow DMA if it isn't multiple of 16 bytes. Quite a
4583 * few ATAPI devices choke on such DMA requests.
4584 */
6a87e42e
TH
4585 if (!(qc->dev->horkage & ATA_HORKAGE_ATAPI_MOD16_DMA) &&
4586 unlikely(qc->nbytes & 15))
624d5c51 4587 return 1;
e2cec771 4588
624d5c51
TH
4589 if (ap->ops->check_atapi_dma)
4590 return ap->ops->check_atapi_dma(qc);
e2cec771 4591
624d5c51
TH
4592 return 0;
4593}
1da177e4 4594
624d5c51
TH
4595/**
4596 * ata_std_qc_defer - Check whether a qc needs to be deferred
4597 * @qc: ATA command in question
4598 *
4599 * Non-NCQ commands cannot run with any other command, NCQ or
4600 * not. As upper layer only knows the queue depth, we are
4601 * responsible for maintaining exclusion. This function checks
4602 * whether a new command @qc can be issued.
4603 *
4604 * LOCKING:
4605 * spin_lock_irqsave(host lock)
4606 *
4607 * RETURNS:
4608 * ATA_DEFER_* if deferring is needed, 0 otherwise.
4609 */
4610int ata_std_qc_defer(struct ata_queued_cmd *qc)
4611{
4612 struct ata_link *link = qc->dev->link;
e2cec771 4613
624d5c51
TH
4614 if (qc->tf.protocol == ATA_PROT_NCQ) {
4615 if (!ata_tag_valid(link->active_tag))
4616 return 0;
4617 } else {
4618 if (!ata_tag_valid(link->active_tag) && !link->sactive)
4619 return 0;
4620 }
e2cec771 4621
624d5c51
TH
4622 return ATA_DEFER_LINK;
4623}
6912ccd5 4624
624d5c51 4625void ata_noop_qc_prep(struct ata_queued_cmd *qc) { }
1da177e4 4626
624d5c51
TH
4627/**
4628 * ata_sg_init - Associate command with scatter-gather table.
4629 * @qc: Command to be associated
4630 * @sg: Scatter-gather table.
4631 * @n_elem: Number of elements in s/g table.
4632 *
4633 * Initialize the data-related elements of queued_cmd @qc
4634 * to point to a scatter-gather table @sg, containing @n_elem
4635 * elements.
4636 *
4637 * LOCKING:
4638 * spin_lock_irqsave(host lock)
4639 */
4640void ata_sg_init(struct ata_queued_cmd *qc, struct scatterlist *sg,
4641 unsigned int n_elem)
4642{
4643 qc->sg = sg;
4644 qc->n_elem = n_elem;
4645 qc->cursg = qc->sg;
4646}
bb5cb290 4647
624d5c51
TH
4648/**
4649 * ata_sg_setup - DMA-map the scatter-gather table associated with a command.
4650 * @qc: Command with scatter-gather table to be mapped.
4651 *
4652 * DMA-map the scatter-gather table associated with queued_cmd @qc.
4653 *
4654 * LOCKING:
4655 * spin_lock_irqsave(host lock)
4656 *
4657 * RETURNS:
4658 * Zero on success, negative on error.
4659 *
4660 */
4661static int ata_sg_setup(struct ata_queued_cmd *qc)
4662{
4663 struct ata_port *ap = qc->ap;
4664 unsigned int n_elem;
1da177e4 4665
624d5c51 4666 VPRINTK("ENTER, ata%u\n", ap->print_id);
e2cec771 4667
624d5c51
TH
4668 n_elem = dma_map_sg(ap->dev, qc->sg, qc->n_elem, qc->dma_dir);
4669 if (n_elem < 1)
4670 return -1;
bb5cb290 4671
624d5c51 4672 DPRINTK("%d sg elements mapped\n", n_elem);
5825627c 4673 qc->orig_n_elem = qc->n_elem;
624d5c51
TH
4674 qc->n_elem = n_elem;
4675 qc->flags |= ATA_QCFLAG_DMAMAP;
1da177e4 4676
624d5c51 4677 return 0;
1da177e4
LT
4678}
4679
624d5c51
TH
4680/**
4681 * swap_buf_le16 - swap halves of 16-bit words in place
4682 * @buf: Buffer to swap
4683 * @buf_words: Number of 16-bit words in buffer.
4684 *
4685 * Swap halves of 16-bit words if needed to convert from
4686 * little-endian byte order to native cpu byte order, or
4687 * vice-versa.
4688 *
4689 * LOCKING:
4690 * Inherited from caller.
4691 */
4692void swap_buf_le16(u16 *buf, unsigned int buf_words)
8061f5f0 4693{
624d5c51
TH
4694#ifdef __BIG_ENDIAN
4695 unsigned int i;
8061f5f0 4696
624d5c51
TH
4697 for (i = 0; i < buf_words; i++)
4698 buf[i] = le16_to_cpu(buf[i]);
4699#endif /* __BIG_ENDIAN */
8061f5f0
TH
4700}
4701
8a8bc223
TH
4702/**
4703 * ata_qc_new - Request an available ATA command, for queueing
5eb66fe0 4704 * @ap: target port
8a8bc223
TH
4705 *
4706 * LOCKING:
4707 * None.
4708 */
4709
4710static struct ata_queued_cmd *ata_qc_new(struct ata_port *ap)
4711{
4712 struct ata_queued_cmd *qc = NULL;
4713 unsigned int i;
4714
4715 /* no command while frozen */
4716 if (unlikely(ap->pflags & ATA_PFLAG_FROZEN))
4717 return NULL;
4718
4719 /* the last tag is reserved for internal command. */
4720 for (i = 0; i < ATA_MAX_QUEUE - 1; i++)
4721 if (!test_and_set_bit(i, &ap->qc_allocated)) {
4722 qc = __ata_qc_from_tag(ap, i);
4723 break;
4724 }
4725
4726 if (qc)
4727 qc->tag = i;
4728
4729 return qc;
4730}
4731
1da177e4
LT
4732/**
4733 * ata_qc_new_init - Request an available ATA command, and initialize it
1da177e4
LT
4734 * @dev: Device from whom we request an available command structure
4735 *
4736 * LOCKING:
0cba632b 4737 * None.
1da177e4
LT
4738 */
4739
8a8bc223 4740struct ata_queued_cmd *ata_qc_new_init(struct ata_device *dev)
1da177e4 4741{
9af5c9c9 4742 struct ata_port *ap = dev->link->ap;
1da177e4
LT
4743 struct ata_queued_cmd *qc;
4744
8a8bc223 4745 qc = ata_qc_new(ap);
1da177e4 4746 if (qc) {
1da177e4
LT
4747 qc->scsicmd = NULL;
4748 qc->ap = ap;
4749 qc->dev = dev;
1da177e4 4750
2c13b7ce 4751 ata_qc_reinit(qc);
1da177e4
LT
4752 }
4753
4754 return qc;
4755}
4756
8a8bc223
TH
4757/**
4758 * ata_qc_free - free unused ata_queued_cmd
4759 * @qc: Command to complete
4760 *
4761 * Designed to free unused ata_queued_cmd object
4762 * in case something prevents using it.
4763 *
4764 * LOCKING:
4765 * spin_lock_irqsave(host lock)
4766 */
4767void ata_qc_free(struct ata_queued_cmd *qc)
4768{
a1104016 4769 struct ata_port *ap;
8a8bc223
TH
4770 unsigned int tag;
4771
efcb3cf7 4772 WARN_ON_ONCE(qc == NULL); /* ata_qc_from_tag _might_ return NULL */
a1104016 4773 ap = qc->ap;
8a8bc223
TH
4774
4775 qc->flags = 0;
4776 tag = qc->tag;
4777 if (likely(ata_tag_valid(tag))) {
4778 qc->tag = ATA_TAG_POISON;
4779 clear_bit(tag, &ap->qc_allocated);
4780 }
4781}
4782
76014427 4783void __ata_qc_complete(struct ata_queued_cmd *qc)
1da177e4 4784{
a1104016
JL
4785 struct ata_port *ap;
4786 struct ata_link *link;
dedaf2b0 4787
efcb3cf7
TH
4788 WARN_ON_ONCE(qc == NULL); /* ata_qc_from_tag _might_ return NULL */
4789 WARN_ON_ONCE(!(qc->flags & ATA_QCFLAG_ACTIVE));
a1104016
JL
4790 ap = qc->ap;
4791 link = qc->dev->link;
1da177e4
LT
4792
4793 if (likely(qc->flags & ATA_QCFLAG_DMAMAP))
4794 ata_sg_clean(qc);
4795
7401abf2 4796 /* command should be marked inactive atomically with qc completion */
da917d69 4797 if (qc->tf.protocol == ATA_PROT_NCQ) {
9af5c9c9 4798 link->sactive &= ~(1 << qc->tag);
da917d69
TH
4799 if (!link->sactive)
4800 ap->nr_active_links--;
4801 } else {
9af5c9c9 4802 link->active_tag = ATA_TAG_POISON;
da917d69
TH
4803 ap->nr_active_links--;
4804 }
4805
4806 /* clear exclusive status */
4807 if (unlikely(qc->flags & ATA_QCFLAG_CLEAR_EXCL &&
4808 ap->excl_link == link))
4809 ap->excl_link = NULL;
7401abf2 4810
3f3791d3
AL
4811 /* atapi: mark qc as inactive to prevent the interrupt handler
4812 * from completing the command twice later, before the error handler
4813 * is called. (when rc != 0 and atapi request sense is needed)
4814 */
4815 qc->flags &= ~ATA_QCFLAG_ACTIVE;
dedaf2b0 4816 ap->qc_active &= ~(1 << qc->tag);
3f3791d3 4817
1da177e4 4818 /* call completion callback */
77853bf2 4819 qc->complete_fn(qc);
1da177e4
LT
4820}
4821
39599a53
TH
4822static void fill_result_tf(struct ata_queued_cmd *qc)
4823{
4824 struct ata_port *ap = qc->ap;
4825
39599a53 4826 qc->result_tf.flags = qc->tf.flags;
22183bf5 4827 ap->ops->qc_fill_rtf(qc);
39599a53
TH
4828}
4829
00115e0f
TH
4830static void ata_verify_xfer(struct ata_queued_cmd *qc)
4831{
4832 struct ata_device *dev = qc->dev;
4833
00115e0f
TH
4834 if (ata_is_nodata(qc->tf.protocol))
4835 return;
4836
4837 if ((dev->mwdma_mask || dev->udma_mask) && ata_is_pio(qc->tf.protocol))
4838 return;
4839
4840 dev->flags &= ~ATA_DFLAG_DUBIOUS_XFER;
4841}
4842
f686bcb8
TH
4843/**
4844 * ata_qc_complete - Complete an active ATA command
4845 * @qc: Command to complete
f686bcb8 4846 *
1aadf5c3
TH
4847 * Indicate to the mid and upper layers that an ATA command has
4848 * completed, with either an ok or not-ok status.
4849 *
4850 * Refrain from calling this function multiple times when
4851 * successfully completing multiple NCQ commands.
4852 * ata_qc_complete_multiple() should be used instead, which will
4853 * properly update IRQ expect state.
f686bcb8
TH
4854 *
4855 * LOCKING:
cca3974e 4856 * spin_lock_irqsave(host lock)
f686bcb8
TH
4857 */
4858void ata_qc_complete(struct ata_queued_cmd *qc)
4859{
4860 struct ata_port *ap = qc->ap;
4861
4862 /* XXX: New EH and old EH use different mechanisms to
4863 * synchronize EH with regular execution path.
4864 *
4865 * In new EH, a failed qc is marked with ATA_QCFLAG_FAILED.
4866 * Normal execution path is responsible for not accessing a
4867 * failed qc. libata core enforces the rule by returning NULL
4868 * from ata_qc_from_tag() for failed qcs.
4869 *
4870 * Old EH depends on ata_qc_complete() nullifying completion
4871 * requests if ATA_QCFLAG_EH_SCHEDULED is set. Old EH does
4872 * not synchronize with interrupt handler. Only PIO task is
4873 * taken care of.
4874 */
4875 if (ap->ops->error_handler) {
4dbfa39b
TH
4876 struct ata_device *dev = qc->dev;
4877 struct ata_eh_info *ehi = &dev->link->eh_info;
4878
f686bcb8
TH
4879 if (unlikely(qc->err_mask))
4880 qc->flags |= ATA_QCFLAG_FAILED;
4881
f08dc1ac
TH
4882 /*
4883 * Finish internal commands without any further processing
4884 * and always with the result TF filled.
4885 */
4886 if (unlikely(ata_tag_internal(qc->tag))) {
f4b31db9 4887 fill_result_tf(qc);
f08dc1ac
TH
4888 __ata_qc_complete(qc);
4889 return;
4890 }
f4b31db9 4891
f08dc1ac
TH
4892 /*
4893 * Non-internal qc has failed. Fill the result TF and
4894 * summon EH.
4895 */
4896 if (unlikely(qc->flags & ATA_QCFLAG_FAILED)) {
4897 fill_result_tf(qc);
4898 ata_qc_schedule_eh(qc);
f4b31db9 4899 return;
f686bcb8
TH
4900 }
4901
4dc738ed
TH
4902 WARN_ON_ONCE(ap->pflags & ATA_PFLAG_FROZEN);
4903
f686bcb8
TH
4904 /* read result TF if requested */
4905 if (qc->flags & ATA_QCFLAG_RESULT_TF)
39599a53 4906 fill_result_tf(qc);
f686bcb8 4907
4dbfa39b
TH
4908 /* Some commands need post-processing after successful
4909 * completion.
4910 */
4911 switch (qc->tf.command) {
4912 case ATA_CMD_SET_FEATURES:
4913 if (qc->tf.feature != SETFEATURES_WC_ON &&
4914 qc->tf.feature != SETFEATURES_WC_OFF)
4915 break;
4916 /* fall through */
4917 case ATA_CMD_INIT_DEV_PARAMS: /* CHS translation changed */
4918 case ATA_CMD_SET_MULTI: /* multi_count changed */
4919 /* revalidate device */
4920 ehi->dev_action[dev->devno] |= ATA_EH_REVALIDATE;
4921 ata_port_schedule_eh(ap);
4922 break;
054a5fba
TH
4923
4924 case ATA_CMD_SLEEP:
4925 dev->flags |= ATA_DFLAG_SLEEPING;
4926 break;
4dbfa39b
TH
4927 }
4928
00115e0f
TH
4929 if (unlikely(dev->flags & ATA_DFLAG_DUBIOUS_XFER))
4930 ata_verify_xfer(qc);
4931
f686bcb8
TH
4932 __ata_qc_complete(qc);
4933 } else {
4934 if (qc->flags & ATA_QCFLAG_EH_SCHEDULED)
4935 return;
4936
4937 /* read result TF if failed or requested */
4938 if (qc->err_mask || qc->flags & ATA_QCFLAG_RESULT_TF)
39599a53 4939 fill_result_tf(qc);
f686bcb8
TH
4940
4941 __ata_qc_complete(qc);
4942 }
4943}
4944
dedaf2b0
TH
4945/**
4946 * ata_qc_complete_multiple - Complete multiple qcs successfully
4947 * @ap: port in question
4948 * @qc_active: new qc_active mask
dedaf2b0
TH
4949 *
4950 * Complete in-flight commands. This functions is meant to be
4951 * called from low-level driver's interrupt routine to complete
4952 * requests normally. ap->qc_active and @qc_active is compared
4953 * and commands are completed accordingly.
4954 *
1aadf5c3
TH
4955 * Always use this function when completing multiple NCQ commands
4956 * from IRQ handlers instead of calling ata_qc_complete()
4957 * multiple times to keep IRQ expect status properly in sync.
4958 *
dedaf2b0 4959 * LOCKING:
cca3974e 4960 * spin_lock_irqsave(host lock)
dedaf2b0
TH
4961 *
4962 * RETURNS:
4963 * Number of completed commands on success, -errno otherwise.
4964 */
79f97dad 4965int ata_qc_complete_multiple(struct ata_port *ap, u32 qc_active)
dedaf2b0
TH
4966{
4967 int nr_done = 0;
4968 u32 done_mask;
dedaf2b0
TH
4969
4970 done_mask = ap->qc_active ^ qc_active;
4971
4972 if (unlikely(done_mask & qc_active)) {
a9a79dfe
JP
4973 ata_port_err(ap, "illegal qc_active transition (%08x->%08x)\n",
4974 ap->qc_active, qc_active);
dedaf2b0
TH
4975 return -EINVAL;
4976 }
4977
43768180 4978 while (done_mask) {
dedaf2b0 4979 struct ata_queued_cmd *qc;
43768180 4980 unsigned int tag = __ffs(done_mask);
dedaf2b0 4981
43768180
JA
4982 qc = ata_qc_from_tag(ap, tag);
4983 if (qc) {
dedaf2b0
TH
4984 ata_qc_complete(qc);
4985 nr_done++;
4986 }
43768180 4987 done_mask &= ~(1 << tag);
dedaf2b0
TH
4988 }
4989
4990 return nr_done;
4991}
4992
1da177e4
LT
4993/**
4994 * ata_qc_issue - issue taskfile to device
4995 * @qc: command to issue to device
4996 *
4997 * Prepare an ATA command to submission to device.
4998 * This includes mapping the data into a DMA-able
4999 * area, filling in the S/G table, and finally
5000 * writing the taskfile to hardware, starting the command.
5001 *
5002 * LOCKING:
cca3974e 5003 * spin_lock_irqsave(host lock)
1da177e4 5004 */
8e0e694a 5005void ata_qc_issue(struct ata_queued_cmd *qc)
1da177e4
LT
5006{
5007 struct ata_port *ap = qc->ap;
9af5c9c9 5008 struct ata_link *link = qc->dev->link;
405e66b3 5009 u8 prot = qc->tf.protocol;
1da177e4 5010
dedaf2b0
TH
5011 /* Make sure only one non-NCQ command is outstanding. The
5012 * check is skipped for old EH because it reuses active qc to
5013 * request ATAPI sense.
5014 */
efcb3cf7 5015 WARN_ON_ONCE(ap->ops->error_handler && ata_tag_valid(link->active_tag));
dedaf2b0 5016
1973a023 5017 if (ata_is_ncq(prot)) {
efcb3cf7 5018 WARN_ON_ONCE(link->sactive & (1 << qc->tag));
da917d69
TH
5019
5020 if (!link->sactive)
5021 ap->nr_active_links++;
9af5c9c9 5022 link->sactive |= 1 << qc->tag;
dedaf2b0 5023 } else {
efcb3cf7 5024 WARN_ON_ONCE(link->sactive);
da917d69
TH
5025
5026 ap->nr_active_links++;
9af5c9c9 5027 link->active_tag = qc->tag;
dedaf2b0
TH
5028 }
5029
e4a70e76 5030 qc->flags |= ATA_QCFLAG_ACTIVE;
dedaf2b0 5031 ap->qc_active |= 1 << qc->tag;
e4a70e76 5032
60f5d6ef
TH
5033 /*
5034 * We guarantee to LLDs that they will have at least one
f92a2636
TH
5035 * non-zero sg if the command is a data command.
5036 */
60f5d6ef
TH
5037 if (WARN_ON_ONCE(ata_is_data(prot) &&
5038 (!qc->sg || !qc->n_elem || !qc->nbytes)))
5039 goto sys_err;
f92a2636 5040
405e66b3 5041 if (ata_is_dma(prot) || (ata_is_pio(prot) &&
f92a2636 5042 (ap->flags & ATA_FLAG_PIO_DMA)))
001102d7 5043 if (ata_sg_setup(qc))
60f5d6ef 5044 goto sys_err;
1da177e4 5045
cf480626 5046 /* if device is sleeping, schedule reset and abort the link */
054a5fba 5047 if (unlikely(qc->dev->flags & ATA_DFLAG_SLEEPING)) {
cf480626 5048 link->eh_info.action |= ATA_EH_RESET;
054a5fba
TH
5049 ata_ehi_push_desc(&link->eh_info, "waking up from sleep");
5050 ata_link_abort(link);
5051 return;
5052 }
5053
1da177e4
LT
5054 ap->ops->qc_prep(qc);
5055
8e0e694a
TH
5056 qc->err_mask |= ap->ops->qc_issue(qc);
5057 if (unlikely(qc->err_mask))
5058 goto err;
5059 return;
1da177e4 5060
60f5d6ef 5061sys_err:
8e0e694a
TH
5062 qc->err_mask |= AC_ERR_SYSTEM;
5063err:
5064 ata_qc_complete(qc);
1da177e4
LT
5065}
5066
34bf2170
TH
5067/**
5068 * sata_scr_valid - test whether SCRs are accessible
936fd732 5069 * @link: ATA link to test SCR accessibility for
34bf2170 5070 *
936fd732 5071 * Test whether SCRs are accessible for @link.
34bf2170
TH
5072 *
5073 * LOCKING:
5074 * None.
5075 *
5076 * RETURNS:
5077 * 1 if SCRs are accessible, 0 otherwise.
5078 */
936fd732 5079int sata_scr_valid(struct ata_link *link)
34bf2170 5080{
936fd732
TH
5081 struct ata_port *ap = link->ap;
5082
a16abc0b 5083 return (ap->flags & ATA_FLAG_SATA) && ap->ops->scr_read;
34bf2170
TH
5084}
5085
5086/**
5087 * sata_scr_read - read SCR register of the specified port
936fd732 5088 * @link: ATA link to read SCR for
34bf2170
TH
5089 * @reg: SCR to read
5090 * @val: Place to store read value
5091 *
936fd732 5092 * Read SCR register @reg of @link into *@val. This function is
633273a3
TH
5093 * guaranteed to succeed if @link is ap->link, the cable type of
5094 * the port is SATA and the port implements ->scr_read.
34bf2170
TH
5095 *
5096 * LOCKING:
633273a3 5097 * None if @link is ap->link. Kernel thread context otherwise.
34bf2170
TH
5098 *
5099 * RETURNS:
5100 * 0 on success, negative errno on failure.
5101 */
936fd732 5102int sata_scr_read(struct ata_link *link, int reg, u32 *val)
34bf2170 5103{
633273a3 5104 if (ata_is_host_link(link)) {
633273a3 5105 if (sata_scr_valid(link))
82ef04fb 5106 return link->ap->ops->scr_read(link, reg, val);
633273a3
TH
5107 return -EOPNOTSUPP;
5108 }
5109
5110 return sata_pmp_scr_read(link, reg, val);
34bf2170
TH
5111}
5112
5113/**
5114 * sata_scr_write - write SCR register of the specified port
936fd732 5115 * @link: ATA link to write SCR for
34bf2170
TH
5116 * @reg: SCR to write
5117 * @val: value to write
5118 *
936fd732 5119 * Write @val to SCR register @reg of @link. This function is
633273a3
TH
5120 * guaranteed to succeed if @link is ap->link, the cable type of
5121 * the port is SATA and the port implements ->scr_read.
34bf2170
TH
5122 *
5123 * LOCKING:
633273a3 5124 * None if @link is ap->link. Kernel thread context otherwise.
34bf2170
TH
5125 *
5126 * RETURNS:
5127 * 0 on success, negative errno on failure.
5128 */
936fd732 5129int sata_scr_write(struct ata_link *link, int reg, u32 val)
34bf2170 5130{
633273a3 5131 if (ata_is_host_link(link)) {
633273a3 5132 if (sata_scr_valid(link))
82ef04fb 5133 return link->ap->ops->scr_write(link, reg, val);
633273a3
TH
5134 return -EOPNOTSUPP;
5135 }
936fd732 5136
633273a3 5137 return sata_pmp_scr_write(link, reg, val);
34bf2170
TH
5138}
5139
5140/**
5141 * sata_scr_write_flush - write SCR register of the specified port and flush
936fd732 5142 * @link: ATA link to write SCR for
34bf2170
TH
5143 * @reg: SCR to write
5144 * @val: value to write
5145 *
5146 * This function is identical to sata_scr_write() except that this
5147 * function performs flush after writing to the register.
5148 *
5149 * LOCKING:
633273a3 5150 * None if @link is ap->link. Kernel thread context otherwise.
34bf2170
TH
5151 *
5152 * RETURNS:
5153 * 0 on success, negative errno on failure.
5154 */
936fd732 5155int sata_scr_write_flush(struct ata_link *link, int reg, u32 val)
34bf2170 5156{
633273a3 5157 if (ata_is_host_link(link)) {
633273a3 5158 int rc;
da3dbb17 5159
633273a3 5160 if (sata_scr_valid(link)) {
82ef04fb 5161 rc = link->ap->ops->scr_write(link, reg, val);
633273a3 5162 if (rc == 0)
82ef04fb 5163 rc = link->ap->ops->scr_read(link, reg, &val);
633273a3
TH
5164 return rc;
5165 }
5166 return -EOPNOTSUPP;
34bf2170 5167 }
633273a3
TH
5168
5169 return sata_pmp_scr_write(link, reg, val);
34bf2170
TH
5170}
5171
5172/**
b1c72916 5173 * ata_phys_link_online - test whether the given link is online
936fd732 5174 * @link: ATA link to test
34bf2170 5175 *
936fd732
TH
5176 * Test whether @link is online. Note that this function returns
5177 * 0 if online status of @link cannot be obtained, so
5178 * ata_link_online(link) != !ata_link_offline(link).
34bf2170
TH
5179 *
5180 * LOCKING:
5181 * None.
5182 *
5183 * RETURNS:
b5b3fa38 5184 * True if the port online status is available and online.
34bf2170 5185 */
b1c72916 5186bool ata_phys_link_online(struct ata_link *link)
34bf2170
TH
5187{
5188 u32 sstatus;
5189
936fd732 5190 if (sata_scr_read(link, SCR_STATUS, &sstatus) == 0 &&
9913ff8a 5191 ata_sstatus_online(sstatus))
b5b3fa38
TH
5192 return true;
5193 return false;
34bf2170
TH
5194}
5195
5196/**
b1c72916 5197 * ata_phys_link_offline - test whether the given link is offline
936fd732 5198 * @link: ATA link to test
34bf2170 5199 *
936fd732
TH
5200 * Test whether @link is offline. Note that this function
5201 * returns 0 if offline status of @link cannot be obtained, so
5202 * ata_link_online(link) != !ata_link_offline(link).
34bf2170
TH
5203 *
5204 * LOCKING:
5205 * None.
5206 *
5207 * RETURNS:
b5b3fa38 5208 * True if the port offline status is available and offline.
34bf2170 5209 */
b1c72916 5210bool ata_phys_link_offline(struct ata_link *link)
34bf2170
TH
5211{
5212 u32 sstatus;
5213
936fd732 5214 if (sata_scr_read(link, SCR_STATUS, &sstatus) == 0 &&
9913ff8a 5215 !ata_sstatus_online(sstatus))
b5b3fa38
TH
5216 return true;
5217 return false;
34bf2170 5218}
0baab86b 5219
b1c72916
TH
5220/**
5221 * ata_link_online - test whether the given link is online
5222 * @link: ATA link to test
5223 *
5224 * Test whether @link is online. This is identical to
5225 * ata_phys_link_online() when there's no slave link. When
5226 * there's a slave link, this function should only be called on
5227 * the master link and will return true if any of M/S links is
5228 * online.
5229 *
5230 * LOCKING:
5231 * None.
5232 *
5233 * RETURNS:
5234 * True if the port online status is available and online.
5235 */
5236bool ata_link_online(struct ata_link *link)
5237{
5238 struct ata_link *slave = link->ap->slave_link;
5239
5240 WARN_ON(link == slave); /* shouldn't be called on slave link */
5241
5242 return ata_phys_link_online(link) ||
5243 (slave && ata_phys_link_online(slave));
5244}
5245
5246/**
5247 * ata_link_offline - test whether the given link is offline
5248 * @link: ATA link to test
5249 *
5250 * Test whether @link is offline. This is identical to
5251 * ata_phys_link_offline() when there's no slave link. When
5252 * there's a slave link, this function should only be called on
5253 * the master link and will return true if both M/S links are
5254 * offline.
5255 *
5256 * LOCKING:
5257 * None.
5258 *
5259 * RETURNS:
5260 * True if the port offline status is available and offline.
5261 */
5262bool ata_link_offline(struct ata_link *link)
5263{
5264 struct ata_link *slave = link->ap->slave_link;
5265
5266 WARN_ON(link == slave); /* shouldn't be called on slave link */
5267
5268 return ata_phys_link_offline(link) &&
5269 (!slave || ata_phys_link_offline(slave));
5270}
5271
6ffa01d8 5272#ifdef CONFIG_PM
5ef41082 5273static int ata_port_request_pm(struct ata_port *ap, pm_message_t mesg,
cca3974e
JG
5274 unsigned int action, unsigned int ehi_flags,
5275 int wait)
500530f6 5276{
5ef41082 5277 struct ata_link *link;
500530f6 5278 unsigned long flags;
5ef41082 5279 int rc;
500530f6 5280
5ef41082
LM
5281 /* Previous resume operation might still be in
5282 * progress. Wait for PM_PENDING to clear.
5283 */
5284 if (ap->pflags & ATA_PFLAG_PM_PENDING) {
5285 ata_port_wait_eh(ap);
5286 WARN_ON(ap->pflags & ATA_PFLAG_PM_PENDING);
5287 }
500530f6 5288
5ef41082
LM
5289 /* request PM ops to EH */
5290 spin_lock_irqsave(ap->lock, flags);
500530f6 5291
5ef41082
LM
5292 ap->pm_mesg = mesg;
5293 if (wait) {
5294 rc = 0;
5295 ap->pm_result = &rc;
5296 }
500530f6 5297
5ef41082
LM
5298 ap->pflags |= ATA_PFLAG_PM_PENDING;
5299 ata_for_each_link(link, ap, HOST_FIRST) {
5300 link->eh_info.action |= action;
5301 link->eh_info.flags |= ehi_flags;
5302 }
500530f6 5303
5ef41082 5304 ata_port_schedule_eh(ap);
500530f6 5305
5ef41082 5306 spin_unlock_irqrestore(ap->lock, flags);
500530f6 5307
5ef41082
LM
5308 /* wait and check result */
5309 if (wait) {
5310 ata_port_wait_eh(ap);
5311 WARN_ON(ap->pflags & ATA_PFLAG_PM_PENDING);
500530f6
TH
5312 }
5313
5ef41082 5314 return rc;
500530f6
TH
5315}
5316
33574d68 5317static int ata_port_suspend_common(struct device *dev, pm_message_t mesg)
5ef41082
LM
5318{
5319 struct ata_port *ap = to_ata_port(dev);
33574d68 5320 unsigned int ehi_flags = ATA_EHI_QUIET;
5ef41082
LM
5321 int rc;
5322
33574d68
LM
5323 /*
5324 * On some hardware, device fails to respond after spun down
5325 * for suspend. As the device won't be used before being
5326 * resumed, we don't need to touch the device. Ask EH to skip
5327 * the usual stuff and proceed directly to suspend.
5328 *
5329 * http://thread.gmane.org/gmane.linux.ide/46764
5330 */
5331 if (mesg.event == PM_EVENT_SUSPEND)
5332 ehi_flags |= ATA_EHI_NO_AUTOPSY | ATA_EHI_NO_RECOVERY;
5333
5334 rc = ata_port_request_pm(ap, mesg, 0, ehi_flags, 1);
5ef41082
LM
5335 return rc;
5336}
5337
5338static int ata_port_suspend(struct device *dev)
5339{
5340 if (pm_runtime_suspended(dev))
5341 return 0;
5342
33574d68
LM
5343 return ata_port_suspend_common(dev, PMSG_SUSPEND);
5344}
5345
5346static int ata_port_do_freeze(struct device *dev)
5347{
5348 if (pm_runtime_suspended(dev))
5349 pm_runtime_resume(dev);
5350
5351 return ata_port_suspend_common(dev, PMSG_FREEZE);
5352}
5353
5354static int ata_port_poweroff(struct device *dev)
5355{
5356 if (pm_runtime_suspended(dev))
5357 return 0;
5358
5359 return ata_port_suspend_common(dev, PMSG_HIBERNATE);
5ef41082
LM
5360}
5361
e90b1e5a 5362static int ata_port_resume_common(struct device *dev)
5ef41082
LM
5363{
5364 struct ata_port *ap = to_ata_port(dev);
5365 int rc;
5366
5367 rc = ata_port_request_pm(ap, PMSG_ON, ATA_EH_RESET,
5368 ATA_EHI_NO_AUTOPSY | ATA_EHI_QUIET, 1);
5369 return rc;
5370}
5371
e90b1e5a
LM
5372static int ata_port_resume(struct device *dev)
5373{
5374 int rc;
5375
5376 rc = ata_port_resume_common(dev);
5377 if (!rc) {
5378 pm_runtime_disable(dev);
5379 pm_runtime_set_active(dev);
5380 pm_runtime_enable(dev);
5381 }
5382
5383 return rc;
5384}
5385
9ee4f393
LM
5386static int ata_port_runtime_idle(struct device *dev)
5387{
5388 return pm_runtime_suspend(dev);
5389}
5390
5ef41082
LM
5391static const struct dev_pm_ops ata_port_pm_ops = {
5392 .suspend = ata_port_suspend,
5393 .resume = ata_port_resume,
33574d68
LM
5394 .freeze = ata_port_do_freeze,
5395 .thaw = ata_port_resume,
5396 .poweroff = ata_port_poweroff,
5397 .restore = ata_port_resume,
9ee4f393 5398
33574d68 5399 .runtime_suspend = ata_port_suspend,
e90b1e5a 5400 .runtime_resume = ata_port_resume_common,
9ee4f393 5401 .runtime_idle = ata_port_runtime_idle,
5ef41082
LM
5402};
5403
500530f6 5404/**
cca3974e
JG
5405 * ata_host_suspend - suspend host
5406 * @host: host to suspend
500530f6
TH
5407 * @mesg: PM message
5408 *
5ef41082 5409 * Suspend @host. Actual operation is performed by port suspend.
500530f6 5410 */
cca3974e 5411int ata_host_suspend(struct ata_host *host, pm_message_t mesg)
500530f6 5412{
5ef41082
LM
5413 host->dev->power.power_state = mesg;
5414 return 0;
500530f6
TH
5415}
5416
5417/**
cca3974e
JG
5418 * ata_host_resume - resume host
5419 * @host: host to resume
500530f6 5420 *
5ef41082 5421 * Resume @host. Actual operation is performed by port resume.
500530f6 5422 */
cca3974e 5423void ata_host_resume(struct ata_host *host)
500530f6 5424{
72ad6ec4 5425 host->dev->power.power_state = PMSG_ON;
500530f6 5426}
6ffa01d8 5427#endif
500530f6 5428
5ef41082
LM
5429struct device_type ata_port_type = {
5430 .name = "ata_port",
5431#ifdef CONFIG_PM
5432 .pm = &ata_port_pm_ops,
5433#endif
5434};
5435
3ef3b43d
TH
5436/**
5437 * ata_dev_init - Initialize an ata_device structure
5438 * @dev: Device structure to initialize
5439 *
5440 * Initialize @dev in preparation for probing.
5441 *
5442 * LOCKING:
5443 * Inherited from caller.
5444 */
5445void ata_dev_init(struct ata_device *dev)
5446{
b1c72916 5447 struct ata_link *link = ata_dev_phys_link(dev);
9af5c9c9 5448 struct ata_port *ap = link->ap;
72fa4b74
TH
5449 unsigned long flags;
5450
b1c72916 5451 /* SATA spd limit is bound to the attached device, reset together */
9af5c9c9
TH
5452 link->sata_spd_limit = link->hw_sata_spd_limit;
5453 link->sata_spd = 0;
5a04bf4b 5454
72fa4b74
TH
5455 /* High bits of dev->flags are used to record warm plug
5456 * requests which occur asynchronously. Synchronize using
cca3974e 5457 * host lock.
72fa4b74 5458 */
ba6a1308 5459 spin_lock_irqsave(ap->lock, flags);
72fa4b74 5460 dev->flags &= ~ATA_DFLAG_INIT_MASK;
3dcc323f 5461 dev->horkage = 0;
ba6a1308 5462 spin_unlock_irqrestore(ap->lock, flags);
3ef3b43d 5463
99cf610a
TH
5464 memset((void *)dev + ATA_DEVICE_CLEAR_BEGIN, 0,
5465 ATA_DEVICE_CLEAR_END - ATA_DEVICE_CLEAR_BEGIN);
3ef3b43d
TH
5466 dev->pio_mask = UINT_MAX;
5467 dev->mwdma_mask = UINT_MAX;
5468 dev->udma_mask = UINT_MAX;
5469}
5470
4fb37a25
TH
5471/**
5472 * ata_link_init - Initialize an ata_link structure
5473 * @ap: ATA port link is attached to
5474 * @link: Link structure to initialize
8989805d 5475 * @pmp: Port multiplier port number
4fb37a25
TH
5476 *
5477 * Initialize @link.
5478 *
5479 * LOCKING:
5480 * Kernel thread context (may sleep)
5481 */
fb7fd614 5482void ata_link_init(struct ata_port *ap, struct ata_link *link, int pmp)
4fb37a25
TH
5483{
5484 int i;
5485
5486 /* clear everything except for devices */
d9027470
GG
5487 memset((void *)link + ATA_LINK_CLEAR_BEGIN, 0,
5488 ATA_LINK_CLEAR_END - ATA_LINK_CLEAR_BEGIN);
4fb37a25
TH
5489
5490 link->ap = ap;
8989805d 5491 link->pmp = pmp;
4fb37a25
TH
5492 link->active_tag = ATA_TAG_POISON;
5493 link->hw_sata_spd_limit = UINT_MAX;
5494
5495 /* can't use iterator, ap isn't initialized yet */
5496 for (i = 0; i < ATA_MAX_DEVICES; i++) {
5497 struct ata_device *dev = &link->device[i];
5498
5499 dev->link = link;
5500 dev->devno = dev - link->device;
110f66d2
TH
5501#ifdef CONFIG_ATA_ACPI
5502 dev->gtf_filter = ata_acpi_gtf_filter;
5503#endif
4fb37a25
TH
5504 ata_dev_init(dev);
5505 }
5506}
5507
5508/**
5509 * sata_link_init_spd - Initialize link->sata_spd_limit
5510 * @link: Link to configure sata_spd_limit for
5511 *
5512 * Initialize @link->[hw_]sata_spd_limit to the currently
5513 * configured value.
5514 *
5515 * LOCKING:
5516 * Kernel thread context (may sleep).
5517 *
5518 * RETURNS:
5519 * 0 on success, -errno on failure.
5520 */
fb7fd614 5521int sata_link_init_spd(struct ata_link *link)
4fb37a25 5522{
33267325 5523 u8 spd;
4fb37a25
TH
5524 int rc;
5525
d127ea7b 5526 rc = sata_scr_read(link, SCR_CONTROL, &link->saved_scontrol);
4fb37a25
TH
5527 if (rc)
5528 return rc;
5529
d127ea7b 5530 spd = (link->saved_scontrol >> 4) & 0xf;
4fb37a25
TH
5531 if (spd)
5532 link->hw_sata_spd_limit &= (1 << spd) - 1;
5533
05944bdf 5534 ata_force_link_limits(link);
33267325 5535
4fb37a25
TH
5536 link->sata_spd_limit = link->hw_sata_spd_limit;
5537
5538 return 0;
5539}
5540
1da177e4 5541/**
f3187195
TH
5542 * ata_port_alloc - allocate and initialize basic ATA port resources
5543 * @host: ATA host this allocated port belongs to
1da177e4 5544 *
f3187195
TH
5545 * Allocate and initialize basic ATA port resources.
5546 *
5547 * RETURNS:
5548 * Allocate ATA port on success, NULL on failure.
0cba632b 5549 *
1da177e4 5550 * LOCKING:
f3187195 5551 * Inherited from calling layer (may sleep).
1da177e4 5552 */
f3187195 5553struct ata_port *ata_port_alloc(struct ata_host *host)
1da177e4 5554{
f3187195 5555 struct ata_port *ap;
1da177e4 5556
f3187195
TH
5557 DPRINTK("ENTER\n");
5558
5559 ap = kzalloc(sizeof(*ap), GFP_KERNEL);
5560 if (!ap)
5561 return NULL;
4fca377f 5562
7b3a24c5 5563 ap->pflags |= ATA_PFLAG_INITIALIZING | ATA_PFLAG_FROZEN;
cca3974e 5564 ap->lock = &host->lock;
f3187195 5565 ap->print_id = -1;
cca3974e 5566 ap->host = host;
f3187195 5567 ap->dev = host->dev;
bd5d825c
BP
5568
5569#if defined(ATA_VERBOSE_DEBUG)
5570 /* turn on all debugging levels */
5571 ap->msg_enable = 0x00FF;
5572#elif defined(ATA_DEBUG)
5573 ap->msg_enable = ATA_MSG_DRV | ATA_MSG_INFO | ATA_MSG_CTL | ATA_MSG_WARN | ATA_MSG_ERR;
88574551 5574#else
0dd4b21f 5575 ap->msg_enable = ATA_MSG_DRV | ATA_MSG_ERR | ATA_MSG_WARN;
bd5d825c 5576#endif
1da177e4 5577
ad72cf98 5578 mutex_init(&ap->scsi_scan_mutex);
65f27f38
DH
5579 INIT_DELAYED_WORK(&ap->hotplug_task, ata_scsi_hotplug);
5580 INIT_WORK(&ap->scsi_rescan_task, ata_scsi_dev_rescan);
a72ec4ce 5581 INIT_LIST_HEAD(&ap->eh_done_q);
c6cf9e99 5582 init_waitqueue_head(&ap->eh_wait_q);
45fabbb7 5583 init_completion(&ap->park_req_pending);
5ddf24c5
TH
5584 init_timer_deferrable(&ap->fastdrain_timer);
5585 ap->fastdrain_timer.function = ata_eh_fastdrain_timerfn;
5586 ap->fastdrain_timer.data = (unsigned long)ap;
1da177e4 5587
838df628 5588 ap->cbl = ATA_CBL_NONE;
838df628 5589
8989805d 5590 ata_link_init(ap, &ap->link, 0);
1da177e4
LT
5591
5592#ifdef ATA_IRQ_TRAP
5593 ap->stats.unhandled_irq = 1;
5594 ap->stats.idle_irq = 1;
5595#endif
270390e1
TH
5596 ata_sff_port_init(ap);
5597
1da177e4 5598 return ap;
1da177e4
LT
5599}
5600
f0d36efd
TH
5601static void ata_host_release(struct device *gendev, void *res)
5602{
5603 struct ata_host *host = dev_get_drvdata(gendev);
5604 int i;
5605
1aa506e4
TH
5606 for (i = 0; i < host->n_ports; i++) {
5607 struct ata_port *ap = host->ports[i];
5608
4911487a
TH
5609 if (!ap)
5610 continue;
5611
5612 if (ap->scsi_host)
1aa506e4
TH
5613 scsi_host_put(ap->scsi_host);
5614
633273a3 5615 kfree(ap->pmp_link);
b1c72916 5616 kfree(ap->slave_link);
4911487a 5617 kfree(ap);
1aa506e4
TH
5618 host->ports[i] = NULL;
5619 }
5620
1aa56cca 5621 dev_set_drvdata(gendev, NULL);
f0d36efd
TH
5622}
5623
f3187195
TH
5624/**
5625 * ata_host_alloc - allocate and init basic ATA host resources
5626 * @dev: generic device this host is associated with
5627 * @max_ports: maximum number of ATA ports associated with this host
5628 *
5629 * Allocate and initialize basic ATA host resources. LLD calls
5630 * this function to allocate a host, initializes it fully and
5631 * attaches it using ata_host_register().
5632 *
5633 * @max_ports ports are allocated and host->n_ports is
5634 * initialized to @max_ports. The caller is allowed to decrease
5635 * host->n_ports before calling ata_host_register(). The unused
5636 * ports will be automatically freed on registration.
5637 *
5638 * RETURNS:
5639 * Allocate ATA host on success, NULL on failure.
5640 *
5641 * LOCKING:
5642 * Inherited from calling layer (may sleep).
5643 */
5644struct ata_host *ata_host_alloc(struct device *dev, int max_ports)
5645{
5646 struct ata_host *host;
5647 size_t sz;
5648 int i;
5649
5650 DPRINTK("ENTER\n");
5651
5652 if (!devres_open_group(dev, NULL, GFP_KERNEL))
5653 return NULL;
5654
5655 /* alloc a container for our list of ATA ports (buses) */
5656 sz = sizeof(struct ata_host) + (max_ports + 1) * sizeof(void *);
5657 /* alloc a container for our list of ATA ports (buses) */
5658 host = devres_alloc(ata_host_release, sz, GFP_KERNEL);
5659 if (!host)
5660 goto err_out;
5661
5662 devres_add(dev, host);
5663 dev_set_drvdata(dev, host);
5664
5665 spin_lock_init(&host->lock);
c0c362b6 5666 mutex_init(&host->eh_mutex);
f3187195
TH
5667 host->dev = dev;
5668 host->n_ports = max_ports;
5669
5670 /* allocate ports bound to this host */
5671 for (i = 0; i < max_ports; i++) {
5672 struct ata_port *ap;
5673
5674 ap = ata_port_alloc(host);
5675 if (!ap)
5676 goto err_out;
5677
5678 ap->port_no = i;
5679 host->ports[i] = ap;
5680 }
5681
5682 devres_remove_group(dev, NULL);
5683 return host;
5684
5685 err_out:
5686 devres_release_group(dev, NULL);
5687 return NULL;
5688}
5689
f5cda257
TH
5690/**
5691 * ata_host_alloc_pinfo - alloc host and init with port_info array
5692 * @dev: generic device this host is associated with
5693 * @ppi: array of ATA port_info to initialize host with
5694 * @n_ports: number of ATA ports attached to this host
5695 *
5696 * Allocate ATA host and initialize with info from @ppi. If NULL
5697 * terminated, @ppi may contain fewer entries than @n_ports. The
5698 * last entry will be used for the remaining ports.
5699 *
5700 * RETURNS:
5701 * Allocate ATA host on success, NULL on failure.
5702 *
5703 * LOCKING:
5704 * Inherited from calling layer (may sleep).
5705 */
5706struct ata_host *ata_host_alloc_pinfo(struct device *dev,
5707 const struct ata_port_info * const * ppi,
5708 int n_ports)
5709{
5710 const struct ata_port_info *pi;
5711 struct ata_host *host;
5712 int i, j;
5713
5714 host = ata_host_alloc(dev, n_ports);
5715 if (!host)
5716 return NULL;
5717
5718 for (i = 0, j = 0, pi = NULL; i < host->n_ports; i++) {
5719 struct ata_port *ap = host->ports[i];
5720
5721 if (ppi[j])
5722 pi = ppi[j++];
5723
5724 ap->pio_mask = pi->pio_mask;
5725 ap->mwdma_mask = pi->mwdma_mask;
5726 ap->udma_mask = pi->udma_mask;
5727 ap->flags |= pi->flags;
0c88758b 5728 ap->link.flags |= pi->link_flags;
f5cda257
TH
5729 ap->ops = pi->port_ops;
5730
5731 if (!host->ops && (pi->port_ops != &ata_dummy_port_ops))
5732 host->ops = pi->port_ops;
f5cda257
TH
5733 }
5734
5735 return host;
5736}
5737
b1c72916
TH
5738/**
5739 * ata_slave_link_init - initialize slave link
5740 * @ap: port to initialize slave link for
5741 *
5742 * Create and initialize slave link for @ap. This enables slave
5743 * link handling on the port.
5744 *
5745 * In libata, a port contains links and a link contains devices.
5746 * There is single host link but if a PMP is attached to it,
5747 * there can be multiple fan-out links. On SATA, there's usually
5748 * a single device connected to a link but PATA and SATA
5749 * controllers emulating TF based interface can have two - master
5750 * and slave.
5751 *
5752 * However, there are a few controllers which don't fit into this
5753 * abstraction too well - SATA controllers which emulate TF
5754 * interface with both master and slave devices but also have
5755 * separate SCR register sets for each device. These controllers
5756 * need separate links for physical link handling
5757 * (e.g. onlineness, link speed) but should be treated like a
5758 * traditional M/S controller for everything else (e.g. command
5759 * issue, softreset).
5760 *
5761 * slave_link is libata's way of handling this class of
5762 * controllers without impacting core layer too much. For
5763 * anything other than physical link handling, the default host
5764 * link is used for both master and slave. For physical link
5765 * handling, separate @ap->slave_link is used. All dirty details
5766 * are implemented inside libata core layer. From LLD's POV, the
5767 * only difference is that prereset, hardreset and postreset are
5768 * called once more for the slave link, so the reset sequence
5769 * looks like the following.
5770 *
5771 * prereset(M) -> prereset(S) -> hardreset(M) -> hardreset(S) ->
5772 * softreset(M) -> postreset(M) -> postreset(S)
5773 *
5774 * Note that softreset is called only for the master. Softreset
5775 * resets both M/S by definition, so SRST on master should handle
5776 * both (the standard method will work just fine).
5777 *
5778 * LOCKING:
5779 * Should be called before host is registered.
5780 *
5781 * RETURNS:
5782 * 0 on success, -errno on failure.
5783 */
5784int ata_slave_link_init(struct ata_port *ap)
5785{
5786 struct ata_link *link;
5787
5788 WARN_ON(ap->slave_link);
5789 WARN_ON(ap->flags & ATA_FLAG_PMP);
5790
5791 link = kzalloc(sizeof(*link), GFP_KERNEL);
5792 if (!link)
5793 return -ENOMEM;
5794
5795 ata_link_init(ap, link, 1);
5796 ap->slave_link = link;
5797 return 0;
5798}
5799
32ebbc0c
TH
5800static void ata_host_stop(struct device *gendev, void *res)
5801{
5802 struct ata_host *host = dev_get_drvdata(gendev);
5803 int i;
5804
5805 WARN_ON(!(host->flags & ATA_HOST_STARTED));
5806
5807 for (i = 0; i < host->n_ports; i++) {
5808 struct ata_port *ap = host->ports[i];
5809
5810 if (ap->ops->port_stop)
5811 ap->ops->port_stop(ap);
5812 }
5813
5814 if (host->ops->host_stop)
5815 host->ops->host_stop(host);
5816}
5817
029cfd6b
TH
5818/**
5819 * ata_finalize_port_ops - finalize ata_port_operations
5820 * @ops: ata_port_operations to finalize
5821 *
5822 * An ata_port_operations can inherit from another ops and that
5823 * ops can again inherit from another. This can go on as many
5824 * times as necessary as long as there is no loop in the
5825 * inheritance chain.
5826 *
5827 * Ops tables are finalized when the host is started. NULL or
5828 * unspecified entries are inherited from the closet ancestor
5829 * which has the method and the entry is populated with it.
5830 * After finalization, the ops table directly points to all the
5831 * methods and ->inherits is no longer necessary and cleared.
5832 *
5833 * Using ATA_OP_NULL, inheriting ops can force a method to NULL.
5834 *
5835 * LOCKING:
5836 * None.
5837 */
5838static void ata_finalize_port_ops(struct ata_port_operations *ops)
5839{
2da67659 5840 static DEFINE_SPINLOCK(lock);
029cfd6b
TH
5841 const struct ata_port_operations *cur;
5842 void **begin = (void **)ops;
5843 void **end = (void **)&ops->inherits;
5844 void **pp;
5845
5846 if (!ops || !ops->inherits)
5847 return;
5848
5849 spin_lock(&lock);
5850
5851 for (cur = ops->inherits; cur; cur = cur->inherits) {
5852 void **inherit = (void **)cur;
5853
5854 for (pp = begin; pp < end; pp++, inherit++)
5855 if (!*pp)
5856 *pp = *inherit;
5857 }
5858
5859 for (pp = begin; pp < end; pp++)
5860 if (IS_ERR(*pp))
5861 *pp = NULL;
5862
5863 ops->inherits = NULL;
5864
5865 spin_unlock(&lock);
5866}
5867
ecef7253
TH
5868/**
5869 * ata_host_start - start and freeze ports of an ATA host
5870 * @host: ATA host to start ports for
5871 *
5872 * Start and then freeze ports of @host. Started status is
5873 * recorded in host->flags, so this function can be called
5874 * multiple times. Ports are guaranteed to get started only
f3187195
TH
5875 * once. If host->ops isn't initialized yet, its set to the
5876 * first non-dummy port ops.
ecef7253
TH
5877 *
5878 * LOCKING:
5879 * Inherited from calling layer (may sleep).
5880 *
5881 * RETURNS:
5882 * 0 if all ports are started successfully, -errno otherwise.
5883 */
5884int ata_host_start(struct ata_host *host)
5885{
32ebbc0c
TH
5886 int have_stop = 0;
5887 void *start_dr = NULL;
ecef7253
TH
5888 int i, rc;
5889
5890 if (host->flags & ATA_HOST_STARTED)
5891 return 0;
5892
029cfd6b
TH
5893 ata_finalize_port_ops(host->ops);
5894
ecef7253
TH
5895 for (i = 0; i < host->n_ports; i++) {
5896 struct ata_port *ap = host->ports[i];
5897
029cfd6b
TH
5898 ata_finalize_port_ops(ap->ops);
5899
f3187195
TH
5900 if (!host->ops && !ata_port_is_dummy(ap))
5901 host->ops = ap->ops;
5902
32ebbc0c
TH
5903 if (ap->ops->port_stop)
5904 have_stop = 1;
5905 }
5906
5907 if (host->ops->host_stop)
5908 have_stop = 1;
5909
5910 if (have_stop) {
5911 start_dr = devres_alloc(ata_host_stop, 0, GFP_KERNEL);
5912 if (!start_dr)
5913 return -ENOMEM;
5914 }
5915
5916 for (i = 0; i < host->n_ports; i++) {
5917 struct ata_port *ap = host->ports[i];
5918
ecef7253
TH
5919 if (ap->ops->port_start) {
5920 rc = ap->ops->port_start(ap);
5921 if (rc) {
0f9fe9b7 5922 if (rc != -ENODEV)
a44fec1f
JP
5923 dev_err(host->dev,
5924 "failed to start port %d (errno=%d)\n",
5925 i, rc);
ecef7253
TH
5926 goto err_out;
5927 }
5928 }
ecef7253
TH
5929 ata_eh_freeze_port(ap);
5930 }
5931
32ebbc0c
TH
5932 if (start_dr)
5933 devres_add(host->dev, start_dr);
ecef7253
TH
5934 host->flags |= ATA_HOST_STARTED;
5935 return 0;
5936
5937 err_out:
5938 while (--i >= 0) {
5939 struct ata_port *ap = host->ports[i];
5940
5941 if (ap->ops->port_stop)
5942 ap->ops->port_stop(ap);
5943 }
32ebbc0c 5944 devres_free(start_dr);
ecef7253
TH
5945 return rc;
5946}
5947
b03732f0 5948/**
cca3974e
JG
5949 * ata_sas_host_init - Initialize a host struct
5950 * @host: host to initialize
5951 * @dev: device host is attached to
5952 * @flags: host flags
5953 * @ops: port_ops
b03732f0
BK
5954 *
5955 * LOCKING:
5956 * PCI/etc. bus probe sem.
5957 *
5958 */
f3187195 5959/* KILLME - the only user left is ipr */
cca3974e 5960void ata_host_init(struct ata_host *host, struct device *dev,
029cfd6b 5961 unsigned long flags, struct ata_port_operations *ops)
b03732f0 5962{
cca3974e 5963 spin_lock_init(&host->lock);
c0c362b6 5964 mutex_init(&host->eh_mutex);
cca3974e
JG
5965 host->dev = dev;
5966 host->flags = flags;
5967 host->ops = ops;
b03732f0
BK
5968}
5969
9508a66f 5970void __ata_port_probe(struct ata_port *ap)
79318057 5971{
9508a66f
DW
5972 struct ata_eh_info *ehi = &ap->link.eh_info;
5973 unsigned long flags;
886ad09f 5974
9508a66f
DW
5975 /* kick EH for boot probing */
5976 spin_lock_irqsave(ap->lock, flags);
79318057 5977
9508a66f
DW
5978 ehi->probe_mask |= ATA_ALL_DEVICES;
5979 ehi->action |= ATA_EH_RESET;
5980 ehi->flags |= ATA_EHI_NO_AUTOPSY | ATA_EHI_QUIET;
79318057 5981
9508a66f
DW
5982 ap->pflags &= ~ATA_PFLAG_INITIALIZING;
5983 ap->pflags |= ATA_PFLAG_LOADING;
5984 ata_port_schedule_eh(ap);
79318057 5985
9508a66f
DW
5986 spin_unlock_irqrestore(ap->lock, flags);
5987}
79318057 5988
9508a66f
DW
5989int ata_port_probe(struct ata_port *ap)
5990{
5991 int rc = 0;
79318057 5992
9508a66f
DW
5993 if (ap->ops->error_handler) {
5994 __ata_port_probe(ap);
79318057
AV
5995 ata_port_wait_eh(ap);
5996 } else {
5997 DPRINTK("ata%u: bus probe begin\n", ap->print_id);
5998 rc = ata_bus_probe(ap);
5999 DPRINTK("ata%u: bus probe end\n", ap->print_id);
79318057 6000 }
238c9cf9
JB
6001 return rc;
6002}
6003
6004
6005static void async_port_probe(void *data, async_cookie_t cookie)
6006{
6007 struct ata_port *ap = data;
4fca377f 6008
238c9cf9
JB
6009 /*
6010 * If we're not allowed to scan this host in parallel,
6011 * we need to wait until all previous scans have completed
6012 * before going further.
6013 * Jeff Garzik says this is only within a controller, so we
6014 * don't need to wait for port 0, only for later ports.
6015 */
6016 if (!(ap->host->flags & ATA_HOST_PARALLEL_SCAN) && ap->port_no != 0)
6017 async_synchronize_cookie(cookie);
6018
6019 (void)ata_port_probe(ap);
f29d3b23
AV
6020
6021 /* in order to keep device order, we need to synchronize at this point */
6022 async_synchronize_cookie(cookie);
6023
6024 ata_scsi_scan_host(ap, 1);
79318057 6025}
238c9cf9 6026
f3187195
TH
6027/**
6028 * ata_host_register - register initialized ATA host
6029 * @host: ATA host to register
6030 * @sht: template for SCSI host
6031 *
6032 * Register initialized ATA host. @host is allocated using
6033 * ata_host_alloc() and fully initialized by LLD. This function
6034 * starts ports, registers @host with ATA and SCSI layers and
6035 * probe registered devices.
6036 *
6037 * LOCKING:
6038 * Inherited from calling layer (may sleep).
6039 *
6040 * RETURNS:
6041 * 0 on success, -errno otherwise.
6042 */
6043int ata_host_register(struct ata_host *host, struct scsi_host_template *sht)
6044{
6045 int i, rc;
6046
6047 /* host must have been started */
6048 if (!(host->flags & ATA_HOST_STARTED)) {
a44fec1f 6049 dev_err(host->dev, "BUG: trying to register unstarted host\n");
f3187195
TH
6050 WARN_ON(1);
6051 return -EINVAL;
6052 }
6053
6054 /* Blow away unused ports. This happens when LLD can't
6055 * determine the exact number of ports to allocate at
6056 * allocation time.
6057 */
6058 for (i = host->n_ports; host->ports[i]; i++)
6059 kfree(host->ports[i]);
6060
6061 /* give ports names and add SCSI hosts */
6062 for (i = 0; i < host->n_ports; i++)
85d6725b 6063 host->ports[i]->print_id = atomic_inc_return(&ata_print_id);
f3187195 6064
4fca377f 6065
d9027470
GG
6066 /* Create associated sysfs transport objects */
6067 for (i = 0; i < host->n_ports; i++) {
6068 rc = ata_tport_add(host->dev,host->ports[i]);
6069 if (rc) {
6070 goto err_tadd;
6071 }
6072 }
6073
f3187195
TH
6074 rc = ata_scsi_add_hosts(host, sht);
6075 if (rc)
d9027470 6076 goto err_tadd;
f3187195
TH
6077
6078 /* set cable, sata_spd_limit and report */
6079 for (i = 0; i < host->n_ports; i++) {
6080 struct ata_port *ap = host->ports[i];
f3187195
TH
6081 unsigned long xfer_mask;
6082
6083 /* set SATA cable type if still unset */
6084 if (ap->cbl == ATA_CBL_NONE && (ap->flags & ATA_FLAG_SATA))
6085 ap->cbl = ATA_CBL_SATA;
6086
6087 /* init sata_spd_limit to the current value */
4fb37a25 6088 sata_link_init_spd(&ap->link);
b1c72916
TH
6089 if (ap->slave_link)
6090 sata_link_init_spd(ap->slave_link);
f3187195 6091
cbcdd875 6092 /* print per-port info to dmesg */
f3187195
TH
6093 xfer_mask = ata_pack_xfermask(ap->pio_mask, ap->mwdma_mask,
6094 ap->udma_mask);
6095
abf6e8ed 6096 if (!ata_port_is_dummy(ap)) {
a9a79dfe
JP
6097 ata_port_info(ap, "%cATA max %s %s\n",
6098 (ap->flags & ATA_FLAG_SATA) ? 'S' : 'P',
6099 ata_mode_string(xfer_mask),
6100 ap->link.eh_info.desc);
abf6e8ed
TH
6101 ata_ehi_clear_desc(&ap->link.eh_info);
6102 } else
a9a79dfe 6103 ata_port_info(ap, "DUMMY\n");
f3187195
TH
6104 }
6105
f6005354 6106 /* perform each probe asynchronously */
f3187195
TH
6107 for (i = 0; i < host->n_ports; i++) {
6108 struct ata_port *ap = host->ports[i];
79318057 6109 async_schedule(async_port_probe, ap);
f3187195 6110 }
f3187195
TH
6111
6112 return 0;
d9027470
GG
6113
6114 err_tadd:
6115 while (--i >= 0) {
6116 ata_tport_delete(host->ports[i]);
6117 }
6118 return rc;
6119
f3187195
TH
6120}
6121
f5cda257
TH
6122/**
6123 * ata_host_activate - start host, request IRQ and register it
6124 * @host: target ATA host
6125 * @irq: IRQ to request
6126 * @irq_handler: irq_handler used when requesting IRQ
6127 * @irq_flags: irq_flags used when requesting IRQ
6128 * @sht: scsi_host_template to use when registering the host
6129 *
6130 * After allocating an ATA host and initializing it, most libata
6131 * LLDs perform three steps to activate the host - start host,
6132 * request IRQ and register it. This helper takes necessasry
6133 * arguments and performs the three steps in one go.
6134 *
3d46b2e2
PM
6135 * An invalid IRQ skips the IRQ registration and expects the host to
6136 * have set polling mode on the port. In this case, @irq_handler
6137 * should be NULL.
6138 *
f5cda257
TH
6139 * LOCKING:
6140 * Inherited from calling layer (may sleep).
6141 *
6142 * RETURNS:
6143 * 0 on success, -errno otherwise.
6144 */
6145int ata_host_activate(struct ata_host *host, int irq,
6146 irq_handler_t irq_handler, unsigned long irq_flags,
6147 struct scsi_host_template *sht)
6148{
cbcdd875 6149 int i, rc;
f5cda257
TH
6150
6151 rc = ata_host_start(host);
6152 if (rc)
6153 return rc;
6154
3d46b2e2
PM
6155 /* Special case for polling mode */
6156 if (!irq) {
6157 WARN_ON(irq_handler);
6158 return ata_host_register(host, sht);
6159 }
6160
f5cda257
TH
6161 rc = devm_request_irq(host->dev, irq, irq_handler, irq_flags,
6162 dev_driver_string(host->dev), host);
6163 if (rc)
6164 return rc;
6165
cbcdd875
TH
6166 for (i = 0; i < host->n_ports; i++)
6167 ata_port_desc(host->ports[i], "irq %d", irq);
4031826b 6168
f5cda257
TH
6169 rc = ata_host_register(host, sht);
6170 /* if failed, just free the IRQ and leave ports alone */
6171 if (rc)
6172 devm_free_irq(host->dev, irq, host);
6173
6174 return rc;
6175}
6176
720ba126
TH
6177/**
6178 * ata_port_detach - Detach ATA port in prepration of device removal
6179 * @ap: ATA port to be detached
6180 *
6181 * Detach all ATA devices and the associated SCSI devices of @ap;
6182 * then, remove the associated SCSI host. @ap is guaranteed to
6183 * be quiescent on return from this function.
6184 *
6185 * LOCKING:
6186 * Kernel thread context (may sleep).
6187 */
741b7763 6188static void ata_port_detach(struct ata_port *ap)
720ba126
TH
6189{
6190 unsigned long flags;
720ba126
TH
6191
6192 if (!ap->ops->error_handler)
c3cf30a9 6193 goto skip_eh;
720ba126
TH
6194
6195 /* tell EH we're leaving & flush EH */
ba6a1308 6196 spin_lock_irqsave(ap->lock, flags);
b51e9e5d 6197 ap->pflags |= ATA_PFLAG_UNLOADING;
ece180d1 6198 ata_port_schedule_eh(ap);
ba6a1308 6199 spin_unlock_irqrestore(ap->lock, flags);
720ba126 6200
ece180d1 6201 /* wait till EH commits suicide */
720ba126
TH
6202 ata_port_wait_eh(ap);
6203
ece180d1
TH
6204 /* it better be dead now */
6205 WARN_ON(!(ap->pflags & ATA_PFLAG_UNLOADED));
720ba126 6206
afe2c511 6207 cancel_delayed_work_sync(&ap->hotplug_task);
720ba126 6208
c3cf30a9 6209 skip_eh:
d9027470
GG
6210 if (ap->pmp_link) {
6211 int i;
6212 for (i = 0; i < SATA_PMP_MAX_PORTS; i++)
6213 ata_tlink_delete(&ap->pmp_link[i]);
6214 }
6215 ata_tport_delete(ap);
6216
720ba126 6217 /* remove the associated SCSI host */
cca3974e 6218 scsi_remove_host(ap->scsi_host);
720ba126
TH
6219}
6220
0529c159
TH
6221/**
6222 * ata_host_detach - Detach all ports of an ATA host
6223 * @host: Host to detach
6224 *
6225 * Detach all ports of @host.
6226 *
6227 * LOCKING:
6228 * Kernel thread context (may sleep).
6229 */
6230void ata_host_detach(struct ata_host *host)
6231{
6232 int i;
6233
6234 for (i = 0; i < host->n_ports; i++)
6235 ata_port_detach(host->ports[i]);
562f0c2d
TH
6236
6237 /* the host is dead now, dissociate ACPI */
6238 ata_acpi_dissociate(host);
0529c159
TH
6239}
6240
374b1873
JG
6241#ifdef CONFIG_PCI
6242
1da177e4
LT
6243/**
6244 * ata_pci_remove_one - PCI layer callback for device removal
6245 * @pdev: PCI device that was removed
6246 *
b878ca5d
TH
6247 * PCI layer indicates to libata via this hook that hot-unplug or
6248 * module unload event has occurred. Detach all ports. Resource
6249 * release is handled via devres.
1da177e4
LT
6250 *
6251 * LOCKING:
6252 * Inherited from PCI layer (may sleep).
6253 */
f0d36efd 6254void ata_pci_remove_one(struct pci_dev *pdev)
1da177e4 6255{
2855568b 6256 struct device *dev = &pdev->dev;
cca3974e 6257 struct ata_host *host = dev_get_drvdata(dev);
1da177e4 6258
b878ca5d 6259 ata_host_detach(host);
1da177e4
LT
6260}
6261
6262/* move to PCI subsystem */
057ace5e 6263int pci_test_config_bits(struct pci_dev *pdev, const struct pci_bits *bits)
1da177e4
LT
6264{
6265 unsigned long tmp = 0;
6266
6267 switch (bits->width) {
6268 case 1: {
6269 u8 tmp8 = 0;
6270 pci_read_config_byte(pdev, bits->reg, &tmp8);
6271 tmp = tmp8;
6272 break;
6273 }
6274 case 2: {
6275 u16 tmp16 = 0;
6276 pci_read_config_word(pdev, bits->reg, &tmp16);
6277 tmp = tmp16;
6278 break;
6279 }
6280 case 4: {
6281 u32 tmp32 = 0;
6282 pci_read_config_dword(pdev, bits->reg, &tmp32);
6283 tmp = tmp32;
6284 break;
6285 }
6286
6287 default:
6288 return -EINVAL;
6289 }
6290
6291 tmp &= bits->mask;
6292
6293 return (tmp == bits->val) ? 1 : 0;
6294}
9b847548 6295
6ffa01d8 6296#ifdef CONFIG_PM
3c5100c1 6297void ata_pci_device_do_suspend(struct pci_dev *pdev, pm_message_t mesg)
9b847548
JA
6298{
6299 pci_save_state(pdev);
4c90d971 6300 pci_disable_device(pdev);
500530f6 6301
3a2d5b70 6302 if (mesg.event & PM_EVENT_SLEEP)
500530f6 6303 pci_set_power_state(pdev, PCI_D3hot);
9b847548
JA
6304}
6305
553c4aa6 6306int ata_pci_device_do_resume(struct pci_dev *pdev)
9b847548 6307{
553c4aa6
TH
6308 int rc;
6309
9b847548
JA
6310 pci_set_power_state(pdev, PCI_D0);
6311 pci_restore_state(pdev);
553c4aa6 6312
b878ca5d 6313 rc = pcim_enable_device(pdev);
553c4aa6 6314 if (rc) {
a44fec1f
JP
6315 dev_err(&pdev->dev,
6316 "failed to enable device after resume (%d)\n", rc);
553c4aa6
TH
6317 return rc;
6318 }
6319
9b847548 6320 pci_set_master(pdev);
553c4aa6 6321 return 0;
500530f6
TH
6322}
6323
3c5100c1 6324int ata_pci_device_suspend(struct pci_dev *pdev, pm_message_t mesg)
500530f6 6325{
cca3974e 6326 struct ata_host *host = dev_get_drvdata(&pdev->dev);
500530f6
TH
6327 int rc = 0;
6328
cca3974e 6329 rc = ata_host_suspend(host, mesg);
500530f6
TH
6330 if (rc)
6331 return rc;
6332
3c5100c1 6333 ata_pci_device_do_suspend(pdev, mesg);
500530f6
TH
6334
6335 return 0;
6336}
6337
6338int ata_pci_device_resume(struct pci_dev *pdev)
6339{
cca3974e 6340 struct ata_host *host = dev_get_drvdata(&pdev->dev);
553c4aa6 6341 int rc;
500530f6 6342
553c4aa6
TH
6343 rc = ata_pci_device_do_resume(pdev);
6344 if (rc == 0)
6345 ata_host_resume(host);
6346 return rc;
9b847548 6347}
6ffa01d8
TH
6348#endif /* CONFIG_PM */
6349
1da177e4
LT
6350#endif /* CONFIG_PCI */
6351
33267325
TH
6352static int __init ata_parse_force_one(char **cur,
6353 struct ata_force_ent *force_ent,
6354 const char **reason)
6355{
6356 /* FIXME: Currently, there's no way to tag init const data and
6357 * using __initdata causes build failure on some versions of
6358 * gcc. Once __initdataconst is implemented, add const to the
6359 * following structure.
6360 */
6361 static struct ata_force_param force_tbl[] __initdata = {
6362 { "40c", .cbl = ATA_CBL_PATA40 },
6363 { "80c", .cbl = ATA_CBL_PATA80 },
6364 { "short40c", .cbl = ATA_CBL_PATA40_SHORT },
6365 { "unk", .cbl = ATA_CBL_PATA_UNK },
6366 { "ign", .cbl = ATA_CBL_PATA_IGN },
6367 { "sata", .cbl = ATA_CBL_SATA },
6368 { "1.5Gbps", .spd_limit = 1 },
6369 { "3.0Gbps", .spd_limit = 2 },
6370 { "noncq", .horkage_on = ATA_HORKAGE_NONCQ },
6371 { "ncq", .horkage_off = ATA_HORKAGE_NONCQ },
43c9c591 6372 { "dump_id", .horkage_on = ATA_HORKAGE_DUMP_ID },
33267325
TH
6373 { "pio0", .xfer_mask = 1 << (ATA_SHIFT_PIO + 0) },
6374 { "pio1", .xfer_mask = 1 << (ATA_SHIFT_PIO + 1) },
6375 { "pio2", .xfer_mask = 1 << (ATA_SHIFT_PIO + 2) },
6376 { "pio3", .xfer_mask = 1 << (ATA_SHIFT_PIO + 3) },
6377 { "pio4", .xfer_mask = 1 << (ATA_SHIFT_PIO + 4) },
6378 { "pio5", .xfer_mask = 1 << (ATA_SHIFT_PIO + 5) },
6379 { "pio6", .xfer_mask = 1 << (ATA_SHIFT_PIO + 6) },
6380 { "mwdma0", .xfer_mask = 1 << (ATA_SHIFT_MWDMA + 0) },
6381 { "mwdma1", .xfer_mask = 1 << (ATA_SHIFT_MWDMA + 1) },
6382 { "mwdma2", .xfer_mask = 1 << (ATA_SHIFT_MWDMA + 2) },
6383 { "mwdma3", .xfer_mask = 1 << (ATA_SHIFT_MWDMA + 3) },
6384 { "mwdma4", .xfer_mask = 1 << (ATA_SHIFT_MWDMA + 4) },
6385 { "udma0", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 0) },
6386 { "udma16", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 0) },
6387 { "udma/16", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 0) },
6388 { "udma1", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 1) },
6389 { "udma25", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 1) },
6390 { "udma/25", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 1) },
6391 { "udma2", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 2) },
6392 { "udma33", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 2) },
6393 { "udma/33", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 2) },
6394 { "udma3", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 3) },
6395 { "udma44", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 3) },
6396 { "udma/44", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 3) },
6397 { "udma4", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 4) },
6398 { "udma66", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 4) },
6399 { "udma/66", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 4) },
6400 { "udma5", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 5) },
6401 { "udma100", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 5) },
6402 { "udma/100", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 5) },
6403 { "udma6", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 6) },
6404 { "udma133", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 6) },
6405 { "udma/133", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 6) },
6406 { "udma7", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 7) },
05944bdf
TH
6407 { "nohrst", .lflags = ATA_LFLAG_NO_HRST },
6408 { "nosrst", .lflags = ATA_LFLAG_NO_SRST },
6409 { "norst", .lflags = ATA_LFLAG_NO_HRST | ATA_LFLAG_NO_SRST },
33267325
TH
6410 };
6411 char *start = *cur, *p = *cur;
6412 char *id, *val, *endp;
6413 const struct ata_force_param *match_fp = NULL;
6414 int nr_matches = 0, i;
6415
6416 /* find where this param ends and update *cur */
6417 while (*p != '\0' && *p != ',')
6418 p++;
6419
6420 if (*p == '\0')
6421 *cur = p;
6422 else
6423 *cur = p + 1;
6424
6425 *p = '\0';
6426
6427 /* parse */
6428 p = strchr(start, ':');
6429 if (!p) {
6430 val = strstrip(start);
6431 goto parse_val;
6432 }
6433 *p = '\0';
6434
6435 id = strstrip(start);
6436 val = strstrip(p + 1);
6437
6438 /* parse id */
6439 p = strchr(id, '.');
6440 if (p) {
6441 *p++ = '\0';
6442 force_ent->device = simple_strtoul(p, &endp, 10);
6443 if (p == endp || *endp != '\0') {
6444 *reason = "invalid device";
6445 return -EINVAL;
6446 }
6447 }
6448
6449 force_ent->port = simple_strtoul(id, &endp, 10);
6450 if (p == endp || *endp != '\0') {
6451 *reason = "invalid port/link";
6452 return -EINVAL;
6453 }
6454
6455 parse_val:
6456 /* parse val, allow shortcuts so that both 1.5 and 1.5Gbps work */
6457 for (i = 0; i < ARRAY_SIZE(force_tbl); i++) {
6458 const struct ata_force_param *fp = &force_tbl[i];
6459
6460 if (strncasecmp(val, fp->name, strlen(val)))
6461 continue;
6462
6463 nr_matches++;
6464 match_fp = fp;
6465
6466 if (strcasecmp(val, fp->name) == 0) {
6467 nr_matches = 1;
6468 break;
6469 }
6470 }
6471
6472 if (!nr_matches) {
6473 *reason = "unknown value";
6474 return -EINVAL;
6475 }
6476 if (nr_matches > 1) {
6477 *reason = "ambigious value";
6478 return -EINVAL;
6479 }
6480
6481 force_ent->param = *match_fp;
6482
6483 return 0;
6484}
6485
6486static void __init ata_parse_force_param(void)
6487{
6488 int idx = 0, size = 1;
6489 int last_port = -1, last_device = -1;
6490 char *p, *cur, *next;
6491
6492 /* calculate maximum number of params and allocate force_tbl */
6493 for (p = ata_force_param_buf; *p; p++)
6494 if (*p == ',')
6495 size++;
6496
6497 ata_force_tbl = kzalloc(sizeof(ata_force_tbl[0]) * size, GFP_KERNEL);
6498 if (!ata_force_tbl) {
6499 printk(KERN_WARNING "ata: failed to extend force table, "
6500 "libata.force ignored\n");
6501 return;
6502 }
6503
6504 /* parse and populate the table */
6505 for (cur = ata_force_param_buf; *cur != '\0'; cur = next) {
6506 const char *reason = "";
6507 struct ata_force_ent te = { .port = -1, .device = -1 };
6508
6509 next = cur;
6510 if (ata_parse_force_one(&next, &te, &reason)) {
6511 printk(KERN_WARNING "ata: failed to parse force "
6512 "parameter \"%s\" (%s)\n",
6513 cur, reason);
6514 continue;
6515 }
6516
6517 if (te.port == -1) {
6518 te.port = last_port;
6519 te.device = last_device;
6520 }
6521
6522 ata_force_tbl[idx++] = te;
6523
6524 last_port = te.port;
6525 last_device = te.device;
6526 }
6527
6528 ata_force_tbl_size = idx;
6529}
1da177e4 6530
1da177e4
LT
6531static int __init ata_init(void)
6532{
d9027470 6533 int rc;
270390e1 6534
33267325
TH
6535 ata_parse_force_param();
6536
6b66d958
MG
6537 ata_acpi_register();
6538
270390e1 6539 rc = ata_sff_init();
ad72cf98
TH
6540 if (rc) {
6541 kfree(ata_force_tbl);
6542 return rc;
6543 }
453b07ac 6544
d9027470
GG
6545 libata_transport_init();
6546 ata_scsi_transport_template = ata_attach_transport();
6547 if (!ata_scsi_transport_template) {
6548 ata_sff_exit();
6549 rc = -ENOMEM;
6550 goto err_out;
4fca377f 6551 }
d9027470 6552
1da177e4
LT
6553 printk(KERN_DEBUG "libata version " DRV_VERSION " loaded.\n");
6554 return 0;
d9027470
GG
6555
6556err_out:
6557 return rc;
1da177e4
LT
6558}
6559
6560static void __exit ata_exit(void)
6561{
d9027470
GG
6562 ata_release_transport(ata_scsi_transport_template);
6563 libata_transport_exit();
270390e1 6564 ata_sff_exit();
6b66d958 6565 ata_acpi_unregister();
33267325 6566 kfree(ata_force_tbl);
1da177e4
LT
6567}
6568
a4625085 6569subsys_initcall(ata_init);
1da177e4
LT
6570module_exit(ata_exit);
6571
9990b6f3 6572static DEFINE_RATELIMIT_STATE(ratelimit, HZ / 5, 1);
67846b30
JG
6573
6574int ata_ratelimit(void)
6575{
9990b6f3 6576 return __ratelimit(&ratelimit);
67846b30
JG
6577}
6578
c0c362b6
TH
6579/**
6580 * ata_msleep - ATA EH owner aware msleep
6581 * @ap: ATA port to attribute the sleep to
6582 * @msecs: duration to sleep in milliseconds
6583 *
6584 * Sleeps @msecs. If the current task is owner of @ap's EH, the
6585 * ownership is released before going to sleep and reacquired
6586 * after the sleep is complete. IOW, other ports sharing the
6587 * @ap->host will be allowed to own the EH while this task is
6588 * sleeping.
6589 *
6590 * LOCKING:
6591 * Might sleep.
6592 */
97750ceb
TH
6593void ata_msleep(struct ata_port *ap, unsigned int msecs)
6594{
c0c362b6
TH
6595 bool owns_eh = ap && ap->host->eh_owner == current;
6596
6597 if (owns_eh)
6598 ata_eh_release(ap);
6599
97750ceb 6600 msleep(msecs);
c0c362b6
TH
6601
6602 if (owns_eh)
6603 ata_eh_acquire(ap);
97750ceb
TH
6604}
6605
c22daff4
TH
6606/**
6607 * ata_wait_register - wait until register value changes
97750ceb 6608 * @ap: ATA port to wait register for, can be NULL
c22daff4
TH
6609 * @reg: IO-mapped register
6610 * @mask: Mask to apply to read register value
6611 * @val: Wait condition
341c2c95
TH
6612 * @interval: polling interval in milliseconds
6613 * @timeout: timeout in milliseconds
c22daff4
TH
6614 *
6615 * Waiting for some bits of register to change is a common
6616 * operation for ATA controllers. This function reads 32bit LE
6617 * IO-mapped register @reg and tests for the following condition.
6618 *
6619 * (*@reg & mask) != val
6620 *
6621 * If the condition is met, it returns; otherwise, the process is
6622 * repeated after @interval_msec until timeout.
6623 *
6624 * LOCKING:
6625 * Kernel thread context (may sleep)
6626 *
6627 * RETURNS:
6628 * The final register value.
6629 */
97750ceb 6630u32 ata_wait_register(struct ata_port *ap, void __iomem *reg, u32 mask, u32 val,
341c2c95 6631 unsigned long interval, unsigned long timeout)
c22daff4 6632{
341c2c95 6633 unsigned long deadline;
c22daff4
TH
6634 u32 tmp;
6635
6636 tmp = ioread32(reg);
6637
6638 /* Calculate timeout _after_ the first read to make sure
6639 * preceding writes reach the controller before starting to
6640 * eat away the timeout.
6641 */
341c2c95 6642 deadline = ata_deadline(jiffies, timeout);
c22daff4 6643
341c2c95 6644 while ((tmp & mask) == val && time_before(jiffies, deadline)) {
97750ceb 6645 ata_msleep(ap, interval);
c22daff4
TH
6646 tmp = ioread32(reg);
6647 }
6648
6649 return tmp;
6650}
6651
dd5b06c4
TH
6652/*
6653 * Dummy port_ops
6654 */
182d7bba 6655static unsigned int ata_dummy_qc_issue(struct ata_queued_cmd *qc)
dd5b06c4 6656{
182d7bba 6657 return AC_ERR_SYSTEM;
dd5b06c4
TH
6658}
6659
182d7bba 6660static void ata_dummy_error_handler(struct ata_port *ap)
dd5b06c4 6661{
182d7bba 6662 /* truly dummy */
dd5b06c4
TH
6663}
6664
029cfd6b 6665struct ata_port_operations ata_dummy_port_ops = {
dd5b06c4
TH
6666 .qc_prep = ata_noop_qc_prep,
6667 .qc_issue = ata_dummy_qc_issue,
182d7bba 6668 .error_handler = ata_dummy_error_handler,
e4a9c373
DW
6669 .sched_eh = ata_std_sched_eh,
6670 .end_eh = ata_std_end_eh,
dd5b06c4
TH
6671};
6672
21b0ad4f
TH
6673const struct ata_port_info ata_dummy_port_info = {
6674 .port_ops = &ata_dummy_port_ops,
6675};
6676
a9a79dfe
JP
6677/*
6678 * Utility print functions
6679 */
6680int ata_port_printk(const struct ata_port *ap, const char *level,
6681 const char *fmt, ...)
6682{
6683 struct va_format vaf;
6684 va_list args;
6685 int r;
6686
6687 va_start(args, fmt);
6688
6689 vaf.fmt = fmt;
6690 vaf.va = &args;
6691
6692 r = printk("%sata%u: %pV", level, ap->print_id, &vaf);
6693
6694 va_end(args);
6695
6696 return r;
6697}
6698EXPORT_SYMBOL(ata_port_printk);
6699
6700int ata_link_printk(const struct ata_link *link, const char *level,
6701 const char *fmt, ...)
6702{
6703 struct va_format vaf;
6704 va_list args;
6705 int r;
6706
6707 va_start(args, fmt);
6708
6709 vaf.fmt = fmt;
6710 vaf.va = &args;
6711
6712 if (sata_pmp_attached(link->ap) || link->ap->slave_link)
6713 r = printk("%sata%u.%02u: %pV",
6714 level, link->ap->print_id, link->pmp, &vaf);
6715 else
6716 r = printk("%sata%u: %pV",
6717 level, link->ap->print_id, &vaf);
6718
6719 va_end(args);
6720
6721 return r;
6722}
6723EXPORT_SYMBOL(ata_link_printk);
6724
6725int ata_dev_printk(const struct ata_device *dev, const char *level,
6726 const char *fmt, ...)
6727{
6728 struct va_format vaf;
6729 va_list args;
6730 int r;
6731
6732 va_start(args, fmt);
6733
6734 vaf.fmt = fmt;
6735 vaf.va = &args;
6736
6737 r = printk("%sata%u.%02u: %pV",
6738 level, dev->link->ap->print_id, dev->link->pmp + dev->devno,
6739 &vaf);
6740
6741 va_end(args);
6742
6743 return r;
6744}
6745EXPORT_SYMBOL(ata_dev_printk);
6746
06296a1e
JP
6747void ata_print_version(const struct device *dev, const char *version)
6748{
6749 dev_printk(KERN_DEBUG, dev, "version %s\n", version);
6750}
6751EXPORT_SYMBOL(ata_print_version);
6752
1da177e4
LT
6753/*
6754 * libata is essentially a library of internal helper functions for
6755 * low-level ATA host controller drivers. As such, the API/ABI is
6756 * likely to change as new drivers are added and updated.
6757 * Do not depend on ABI/API stability.
6758 */
e9c83914
TH
6759EXPORT_SYMBOL_GPL(sata_deb_timing_normal);
6760EXPORT_SYMBOL_GPL(sata_deb_timing_hotplug);
6761EXPORT_SYMBOL_GPL(sata_deb_timing_long);
029cfd6b
TH
6762EXPORT_SYMBOL_GPL(ata_base_port_ops);
6763EXPORT_SYMBOL_GPL(sata_port_ops);
dd5b06c4 6764EXPORT_SYMBOL_GPL(ata_dummy_port_ops);
21b0ad4f 6765EXPORT_SYMBOL_GPL(ata_dummy_port_info);
1eca4365
TH
6766EXPORT_SYMBOL_GPL(ata_link_next);
6767EXPORT_SYMBOL_GPL(ata_dev_next);
1da177e4 6768EXPORT_SYMBOL_GPL(ata_std_bios_param);
d8d9129e 6769EXPORT_SYMBOL_GPL(ata_scsi_unlock_native_capacity);
cca3974e 6770EXPORT_SYMBOL_GPL(ata_host_init);
f3187195 6771EXPORT_SYMBOL_GPL(ata_host_alloc);
f5cda257 6772EXPORT_SYMBOL_GPL(ata_host_alloc_pinfo);
b1c72916 6773EXPORT_SYMBOL_GPL(ata_slave_link_init);
ecef7253 6774EXPORT_SYMBOL_GPL(ata_host_start);
f3187195 6775EXPORT_SYMBOL_GPL(ata_host_register);
f5cda257 6776EXPORT_SYMBOL_GPL(ata_host_activate);
0529c159 6777EXPORT_SYMBOL_GPL(ata_host_detach);
1da177e4 6778EXPORT_SYMBOL_GPL(ata_sg_init);
f686bcb8 6779EXPORT_SYMBOL_GPL(ata_qc_complete);
dedaf2b0 6780EXPORT_SYMBOL_GPL(ata_qc_complete_multiple);
436d34b3 6781EXPORT_SYMBOL_GPL(atapi_cmd_type);
1da177e4
LT
6782EXPORT_SYMBOL_GPL(ata_tf_to_fis);
6783EXPORT_SYMBOL_GPL(ata_tf_from_fis);
6357357c
TH
6784EXPORT_SYMBOL_GPL(ata_pack_xfermask);
6785EXPORT_SYMBOL_GPL(ata_unpack_xfermask);
6786EXPORT_SYMBOL_GPL(ata_xfer_mask2mode);
6787EXPORT_SYMBOL_GPL(ata_xfer_mode2mask);
6788EXPORT_SYMBOL_GPL(ata_xfer_mode2shift);
6789EXPORT_SYMBOL_GPL(ata_mode_string);
6790EXPORT_SYMBOL_GPL(ata_id_xfermask);
04351821 6791EXPORT_SYMBOL_GPL(ata_do_set_mode);
31cc23b3 6792EXPORT_SYMBOL_GPL(ata_std_qc_defer);
e46834cd 6793EXPORT_SYMBOL_GPL(ata_noop_qc_prep);
10305f0f 6794EXPORT_SYMBOL_GPL(ata_dev_disable);
3c567b7d 6795EXPORT_SYMBOL_GPL(sata_set_spd);
aa2731ad 6796EXPORT_SYMBOL_GPL(ata_wait_after_reset);
936fd732
TH
6797EXPORT_SYMBOL_GPL(sata_link_debounce);
6798EXPORT_SYMBOL_GPL(sata_link_resume);
1152b261 6799EXPORT_SYMBOL_GPL(sata_link_scr_lpm);
0aa1113d 6800EXPORT_SYMBOL_GPL(ata_std_prereset);
cc0680a5 6801EXPORT_SYMBOL_GPL(sata_link_hardreset);
57c9efdf 6802EXPORT_SYMBOL_GPL(sata_std_hardreset);
203c75b8 6803EXPORT_SYMBOL_GPL(ata_std_postreset);
2e9edbf8
JG
6804EXPORT_SYMBOL_GPL(ata_dev_classify);
6805EXPORT_SYMBOL_GPL(ata_dev_pair);
67846b30 6806EXPORT_SYMBOL_GPL(ata_ratelimit);
97750ceb 6807EXPORT_SYMBOL_GPL(ata_msleep);
c22daff4 6808EXPORT_SYMBOL_GPL(ata_wait_register);
1da177e4 6809EXPORT_SYMBOL_GPL(ata_scsi_queuecmd);
1da177e4 6810EXPORT_SYMBOL_GPL(ata_scsi_slave_config);
83c47bcb 6811EXPORT_SYMBOL_GPL(ata_scsi_slave_destroy);
a6e6ce8e 6812EXPORT_SYMBOL_GPL(ata_scsi_change_queue_depth);
f6e67035 6813EXPORT_SYMBOL_GPL(__ata_change_queue_depth);
34bf2170
TH
6814EXPORT_SYMBOL_GPL(sata_scr_valid);
6815EXPORT_SYMBOL_GPL(sata_scr_read);
6816EXPORT_SYMBOL_GPL(sata_scr_write);
6817EXPORT_SYMBOL_GPL(sata_scr_write_flush);
936fd732
TH
6818EXPORT_SYMBOL_GPL(ata_link_online);
6819EXPORT_SYMBOL_GPL(ata_link_offline);
6ffa01d8 6820#ifdef CONFIG_PM
cca3974e
JG
6821EXPORT_SYMBOL_GPL(ata_host_suspend);
6822EXPORT_SYMBOL_GPL(ata_host_resume);
6ffa01d8 6823#endif /* CONFIG_PM */
6a62a04d
TH
6824EXPORT_SYMBOL_GPL(ata_id_string);
6825EXPORT_SYMBOL_GPL(ata_id_c_string);
963e4975 6826EXPORT_SYMBOL_GPL(ata_do_dev_read_id);
1da177e4
LT
6827EXPORT_SYMBOL_GPL(ata_scsi_simulate);
6828
1bc4ccff 6829EXPORT_SYMBOL_GPL(ata_pio_need_iordy);
6357357c 6830EXPORT_SYMBOL_GPL(ata_timing_find_mode);
452503f9
AC
6831EXPORT_SYMBOL_GPL(ata_timing_compute);
6832EXPORT_SYMBOL_GPL(ata_timing_merge);
a0f79b92 6833EXPORT_SYMBOL_GPL(ata_timing_cycle2mode);
452503f9 6834
1da177e4
LT
6835#ifdef CONFIG_PCI
6836EXPORT_SYMBOL_GPL(pci_test_config_bits);
1da177e4 6837EXPORT_SYMBOL_GPL(ata_pci_remove_one);
6ffa01d8 6838#ifdef CONFIG_PM
500530f6
TH
6839EXPORT_SYMBOL_GPL(ata_pci_device_do_suspend);
6840EXPORT_SYMBOL_GPL(ata_pci_device_do_resume);
9b847548
JA
6841EXPORT_SYMBOL_GPL(ata_pci_device_suspend);
6842EXPORT_SYMBOL_GPL(ata_pci_device_resume);
6ffa01d8 6843#endif /* CONFIG_PM */
1da177e4 6844#endif /* CONFIG_PCI */
9b847548 6845
b64bbc39
TH
6846EXPORT_SYMBOL_GPL(__ata_ehi_push_desc);
6847EXPORT_SYMBOL_GPL(ata_ehi_push_desc);
6848EXPORT_SYMBOL_GPL(ata_ehi_clear_desc);
cbcdd875
TH
6849EXPORT_SYMBOL_GPL(ata_port_desc);
6850#ifdef CONFIG_PCI
6851EXPORT_SYMBOL_GPL(ata_port_pbar_desc);
6852#endif /* CONFIG_PCI */
7b70fc03 6853EXPORT_SYMBOL_GPL(ata_port_schedule_eh);
dbd82616 6854EXPORT_SYMBOL_GPL(ata_link_abort);
7b70fc03 6855EXPORT_SYMBOL_GPL(ata_port_abort);
e3180499 6856EXPORT_SYMBOL_GPL(ata_port_freeze);
7d77b247 6857EXPORT_SYMBOL_GPL(sata_async_notification);
e3180499
TH
6858EXPORT_SYMBOL_GPL(ata_eh_freeze_port);
6859EXPORT_SYMBOL_GPL(ata_eh_thaw_port);
ece1d636
TH
6860EXPORT_SYMBOL_GPL(ata_eh_qc_complete);
6861EXPORT_SYMBOL_GPL(ata_eh_qc_retry);
10acf3b0 6862EXPORT_SYMBOL_GPL(ata_eh_analyze_ncq_error);
022bdb07 6863EXPORT_SYMBOL_GPL(ata_do_eh);
a1efdaba 6864EXPORT_SYMBOL_GPL(ata_std_error_handler);
be0d18df
AC
6865
6866EXPORT_SYMBOL_GPL(ata_cable_40wire);
6867EXPORT_SYMBOL_GPL(ata_cable_80wire);
6868EXPORT_SYMBOL_GPL(ata_cable_unknown);
c88f90c3 6869EXPORT_SYMBOL_GPL(ata_cable_ignore);
be0d18df 6870EXPORT_SYMBOL_GPL(ata_cable_sata);