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1da177e4 1/*
af36d7f0
JG
2 * libata-core.c - helper library for ATA
3 *
4 * Maintained by: Jeff Garzik <jgarzik@pobox.com>
5 * Please ALWAYS copy linux-ide@vger.kernel.org
6 * on emails.
7 *
8 * Copyright 2003-2004 Red Hat, Inc. All rights reserved.
9 * Copyright 2003-2004 Jeff Garzik
10 *
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2, or (at your option)
15 * any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; see the file COPYING. If not, write to
24 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
25 *
26 *
27 * libata documentation is available via 'make {ps|pdf}docs',
28 * as Documentation/DocBook/libata.*
29 *
30 * Hardware documentation available from http://www.t13.org/ and
31 * http://www.sata-io.org/
32 *
92c52c52
AC
33 * Standards documents from:
34 * http://www.t13.org (ATA standards, PCI DMA IDE spec)
35 * http://www.t10.org (SCSI MMC - for ATAPI MMC)
36 * http://www.sata-io.org (SATA)
37 * http://www.compactflash.org (CF)
38 * http://www.qic.org (QIC157 - Tape and DSC)
39 * http://www.ce-ata.org (CE-ATA: not supported)
40 *
1da177e4
LT
41 */
42
1da177e4
LT
43#include <linux/kernel.h>
44#include <linux/module.h>
45#include <linux/pci.h>
46#include <linux/init.h>
47#include <linux/list.h>
48#include <linux/mm.h>
1da177e4
LT
49#include <linux/spinlock.h>
50#include <linux/blkdev.h>
51#include <linux/delay.h>
52#include <linux/timer.h>
53#include <linux/interrupt.h>
54#include <linux/completion.h>
55#include <linux/suspend.h>
56#include <linux/workqueue.h>
378f058c 57#include <linux/scatterlist.h>
2dcb407e 58#include <linux/io.h>
79318057 59#include <linux/async.h>
e18086d6 60#include <linux/log2.h>
5a0e3ad6 61#include <linux/slab.h>
1da177e4 62#include <scsi/scsi.h>
193515d5 63#include <scsi/scsi_cmnd.h>
1da177e4
LT
64#include <scsi/scsi_host.h>
65#include <linux/libata.h>
1da177e4 66#include <asm/byteorder.h>
140b5e59 67#include <linux/cdrom.h>
9990b6f3 68#include <linux/ratelimit.h>
9ee4f393 69#include <linux/pm_runtime.h>
1da177e4
LT
70
71#include "libata.h"
d9027470 72#include "libata-transport.h"
fda0efc5 73
d7bb4cc7 74/* debounce timing parameters in msecs { interval, duration, timeout } */
e9c83914
TH
75const unsigned long sata_deb_timing_normal[] = { 5, 100, 2000 };
76const unsigned long sata_deb_timing_hotplug[] = { 25, 500, 2000 };
77const unsigned long sata_deb_timing_long[] = { 100, 2000, 5000 };
d7bb4cc7 78
029cfd6b 79const struct ata_port_operations ata_base_port_ops = {
0aa1113d 80 .prereset = ata_std_prereset,
203c75b8 81 .postreset = ata_std_postreset,
a1efdaba 82 .error_handler = ata_std_error_handler,
e4a9c373
DW
83 .sched_eh = ata_std_sched_eh,
84 .end_eh = ata_std_end_eh,
029cfd6b
TH
85};
86
87const struct ata_port_operations sata_port_ops = {
88 .inherits = &ata_base_port_ops,
89
90 .qc_defer = ata_std_qc_defer,
57c9efdf 91 .hardreset = sata_std_hardreset,
029cfd6b
TH
92};
93
3373efd8
TH
94static unsigned int ata_dev_init_params(struct ata_device *dev,
95 u16 heads, u16 sectors);
96static unsigned int ata_dev_set_xfermode(struct ata_device *dev);
97static void ata_dev_xfermask(struct ata_device *dev);
75683fe7 98static unsigned long ata_dev_blacklisted(const struct ata_device *dev);
1da177e4 99
a78f57af 100atomic_t ata_print_id = ATOMIC_INIT(0);
1da177e4 101
33267325
TH
102struct ata_force_param {
103 const char *name;
104 unsigned int cbl;
105 int spd_limit;
106 unsigned long xfer_mask;
107 unsigned int horkage_on;
108 unsigned int horkage_off;
05944bdf 109 unsigned int lflags;
33267325
TH
110};
111
112struct ata_force_ent {
113 int port;
114 int device;
115 struct ata_force_param param;
116};
117
118static struct ata_force_ent *ata_force_tbl;
119static int ata_force_tbl_size;
120
121static char ata_force_param_buf[PAGE_SIZE] __initdata;
7afb4222
TH
122/* param_buf is thrown away after initialization, disallow read */
123module_param_string(force, ata_force_param_buf, sizeof(ata_force_param_buf), 0);
33267325
TH
124MODULE_PARM_DESC(force, "Force ATA configurations including cable type, link speed and transfer mode (see Documentation/kernel-parameters.txt for details)");
125
2486fa56 126static int atapi_enabled = 1;
1623c81e 127module_param(atapi_enabled, int, 0444);
ad5d8eac 128MODULE_PARM_DESC(atapi_enabled, "Enable discovery of ATAPI devices (0=off, 1=on [default])");
1623c81e 129
c5c61bda 130static int atapi_dmadir = 0;
95de719a 131module_param(atapi_dmadir, int, 0444);
ad5d8eac 132MODULE_PARM_DESC(atapi_dmadir, "Enable ATAPI DMADIR bridge support (0=off [default], 1=on)");
95de719a 133
baf4fdfa
ML
134int atapi_passthru16 = 1;
135module_param(atapi_passthru16, int, 0444);
ad5d8eac 136MODULE_PARM_DESC(atapi_passthru16, "Enable ATA_16 passthru for ATAPI devices (0=off, 1=on [default])");
baf4fdfa 137
c3c013a2
JG
138int libata_fua = 0;
139module_param_named(fua, libata_fua, int, 0444);
ad5d8eac 140MODULE_PARM_DESC(fua, "FUA support (0=off [default], 1=on)");
c3c013a2 141
2dcb407e 142static int ata_ignore_hpa;
1e999736
AC
143module_param_named(ignore_hpa, ata_ignore_hpa, int, 0644);
144MODULE_PARM_DESC(ignore_hpa, "Ignore HPA limit (0=keep BIOS limits, 1=ignore limits, using full disk)");
145
b3a70601
AC
146static int libata_dma_mask = ATA_DMA_MASK_ATA|ATA_DMA_MASK_ATAPI|ATA_DMA_MASK_CFA;
147module_param_named(dma, libata_dma_mask, int, 0444);
148MODULE_PARM_DESC(dma, "DMA enable/disable (0x1==ATA, 0x2==ATAPI, 0x4==CF)");
149
87fbc5a0 150static int ata_probe_timeout;
a8601e5f
AM
151module_param(ata_probe_timeout, int, 0444);
152MODULE_PARM_DESC(ata_probe_timeout, "Set ATA probing timeout (seconds)");
153
6ebe9d86 154int libata_noacpi = 0;
d7d0dad6 155module_param_named(noacpi, libata_noacpi, int, 0444);
ad5d8eac 156MODULE_PARM_DESC(noacpi, "Disable the use of ACPI in probe/suspend/resume (0=off [default], 1=on)");
11ef697b 157
ae8d4ee7
AC
158int libata_allow_tpm = 0;
159module_param_named(allow_tpm, libata_allow_tpm, int, 0444);
ad5d8eac 160MODULE_PARM_DESC(allow_tpm, "Permit the use of TPM commands (0=off [default], 1=on)");
ae8d4ee7 161
e7ecd435
TH
162static int atapi_an;
163module_param(atapi_an, int, 0444);
164MODULE_PARM_DESC(atapi_an, "Enable ATAPI AN media presence notification (0=0ff [default], 1=on)");
165
1da177e4
LT
166MODULE_AUTHOR("Jeff Garzik");
167MODULE_DESCRIPTION("Library module for ATA devices");
168MODULE_LICENSE("GPL");
169MODULE_VERSION(DRV_VERSION);
170
0baab86b 171
9913ff8a
TH
172static bool ata_sstatus_online(u32 sstatus)
173{
174 return (sstatus & 0xf) == 0x3;
175}
176
1eca4365
TH
177/**
178 * ata_link_next - link iteration helper
179 * @link: the previous link, NULL to start
180 * @ap: ATA port containing links to iterate
181 * @mode: iteration mode, one of ATA_LITER_*
182 *
183 * LOCKING:
184 * Host lock or EH context.
aadffb68 185 *
1eca4365
TH
186 * RETURNS:
187 * Pointer to the next link.
aadffb68 188 */
1eca4365
TH
189struct ata_link *ata_link_next(struct ata_link *link, struct ata_port *ap,
190 enum ata_link_iter_mode mode)
aadffb68 191{
1eca4365
TH
192 BUG_ON(mode != ATA_LITER_EDGE &&
193 mode != ATA_LITER_PMP_FIRST && mode != ATA_LITER_HOST_FIRST);
194
aadffb68 195 /* NULL link indicates start of iteration */
1eca4365
TH
196 if (!link)
197 switch (mode) {
198 case ATA_LITER_EDGE:
199 case ATA_LITER_PMP_FIRST:
200 if (sata_pmp_attached(ap))
201 return ap->pmp_link;
202 /* fall through */
203 case ATA_LITER_HOST_FIRST:
204 return &ap->link;
205 }
aadffb68 206
1eca4365
TH
207 /* we just iterated over the host link, what's next? */
208 if (link == &ap->link)
209 switch (mode) {
210 case ATA_LITER_HOST_FIRST:
211 if (sata_pmp_attached(ap))
212 return ap->pmp_link;
213 /* fall through */
214 case ATA_LITER_PMP_FIRST:
215 if (unlikely(ap->slave_link))
b1c72916 216 return ap->slave_link;
1eca4365
TH
217 /* fall through */
218 case ATA_LITER_EDGE:
aadffb68 219 return NULL;
b1c72916 220 }
aadffb68 221
b1c72916
TH
222 /* slave_link excludes PMP */
223 if (unlikely(link == ap->slave_link))
224 return NULL;
225
1eca4365 226 /* we were over a PMP link */
aadffb68
TH
227 if (++link < ap->pmp_link + ap->nr_pmp_links)
228 return link;
1eca4365
TH
229
230 if (mode == ATA_LITER_PMP_FIRST)
231 return &ap->link;
232
aadffb68
TH
233 return NULL;
234}
235
1eca4365
TH
236/**
237 * ata_dev_next - device iteration helper
238 * @dev: the previous device, NULL to start
239 * @link: ATA link containing devices to iterate
240 * @mode: iteration mode, one of ATA_DITER_*
241 *
242 * LOCKING:
243 * Host lock or EH context.
244 *
245 * RETURNS:
246 * Pointer to the next device.
247 */
248struct ata_device *ata_dev_next(struct ata_device *dev, struct ata_link *link,
249 enum ata_dev_iter_mode mode)
250{
251 BUG_ON(mode != ATA_DITER_ENABLED && mode != ATA_DITER_ENABLED_REVERSE &&
252 mode != ATA_DITER_ALL && mode != ATA_DITER_ALL_REVERSE);
253
254 /* NULL dev indicates start of iteration */
255 if (!dev)
256 switch (mode) {
257 case ATA_DITER_ENABLED:
258 case ATA_DITER_ALL:
259 dev = link->device;
260 goto check;
261 case ATA_DITER_ENABLED_REVERSE:
262 case ATA_DITER_ALL_REVERSE:
263 dev = link->device + ata_link_max_devices(link) - 1;
264 goto check;
265 }
266
267 next:
268 /* move to the next one */
269 switch (mode) {
270 case ATA_DITER_ENABLED:
271 case ATA_DITER_ALL:
272 if (++dev < link->device + ata_link_max_devices(link))
273 goto check;
274 return NULL;
275 case ATA_DITER_ENABLED_REVERSE:
276 case ATA_DITER_ALL_REVERSE:
277 if (--dev >= link->device)
278 goto check;
279 return NULL;
280 }
281
282 check:
283 if ((mode == ATA_DITER_ENABLED || mode == ATA_DITER_ENABLED_REVERSE) &&
284 !ata_dev_enabled(dev))
285 goto next;
286 return dev;
287}
288
b1c72916
TH
289/**
290 * ata_dev_phys_link - find physical link for a device
291 * @dev: ATA device to look up physical link for
292 *
293 * Look up physical link which @dev is attached to. Note that
294 * this is different from @dev->link only when @dev is on slave
295 * link. For all other cases, it's the same as @dev->link.
296 *
297 * LOCKING:
298 * Don't care.
299 *
300 * RETURNS:
301 * Pointer to the found physical link.
302 */
303struct ata_link *ata_dev_phys_link(struct ata_device *dev)
304{
305 struct ata_port *ap = dev->link->ap;
306
307 if (!ap->slave_link)
308 return dev->link;
309 if (!dev->devno)
310 return &ap->link;
311 return ap->slave_link;
312}
313
33267325
TH
314/**
315 * ata_force_cbl - force cable type according to libata.force
4cdfa1b3 316 * @ap: ATA port of interest
33267325
TH
317 *
318 * Force cable type according to libata.force and whine about it.
319 * The last entry which has matching port number is used, so it
320 * can be specified as part of device force parameters. For
321 * example, both "a:40c,1.00:udma4" and "1.00:40c,udma4" have the
322 * same effect.
323 *
324 * LOCKING:
325 * EH context.
326 */
327void ata_force_cbl(struct ata_port *ap)
328{
329 int i;
330
331 for (i = ata_force_tbl_size - 1; i >= 0; i--) {
332 const struct ata_force_ent *fe = &ata_force_tbl[i];
333
334 if (fe->port != -1 && fe->port != ap->print_id)
335 continue;
336
337 if (fe->param.cbl == ATA_CBL_NONE)
338 continue;
339
340 ap->cbl = fe->param.cbl;
a9a79dfe 341 ata_port_notice(ap, "FORCE: cable set to %s\n", fe->param.name);
33267325
TH
342 return;
343 }
344}
345
346/**
05944bdf 347 * ata_force_link_limits - force link limits according to libata.force
33267325
TH
348 * @link: ATA link of interest
349 *
05944bdf
TH
350 * Force link flags and SATA spd limit according to libata.force
351 * and whine about it. When only the port part is specified
352 * (e.g. 1:), the limit applies to all links connected to both
353 * the host link and all fan-out ports connected via PMP. If the
354 * device part is specified as 0 (e.g. 1.00:), it specifies the
355 * first fan-out link not the host link. Device number 15 always
b1c72916
TH
356 * points to the host link whether PMP is attached or not. If the
357 * controller has slave link, device number 16 points to it.
33267325
TH
358 *
359 * LOCKING:
360 * EH context.
361 */
05944bdf 362static void ata_force_link_limits(struct ata_link *link)
33267325 363{
05944bdf 364 bool did_spd = false;
b1c72916
TH
365 int linkno = link->pmp;
366 int i;
33267325
TH
367
368 if (ata_is_host_link(link))
b1c72916 369 linkno += 15;
33267325
TH
370
371 for (i = ata_force_tbl_size - 1; i >= 0; i--) {
372 const struct ata_force_ent *fe = &ata_force_tbl[i];
373
374 if (fe->port != -1 && fe->port != link->ap->print_id)
375 continue;
376
377 if (fe->device != -1 && fe->device != linkno)
378 continue;
379
05944bdf
TH
380 /* only honor the first spd limit */
381 if (!did_spd && fe->param.spd_limit) {
382 link->hw_sata_spd_limit = (1 << fe->param.spd_limit) - 1;
a9a79dfe 383 ata_link_notice(link, "FORCE: PHY spd limit set to %s\n",
05944bdf
TH
384 fe->param.name);
385 did_spd = true;
386 }
33267325 387
05944bdf
TH
388 /* let lflags stack */
389 if (fe->param.lflags) {
390 link->flags |= fe->param.lflags;
a9a79dfe 391 ata_link_notice(link,
05944bdf
TH
392 "FORCE: link flag 0x%x forced -> 0x%x\n",
393 fe->param.lflags, link->flags);
394 }
33267325
TH
395 }
396}
397
398/**
399 * ata_force_xfermask - force xfermask according to libata.force
400 * @dev: ATA device of interest
401 *
402 * Force xfer_mask according to libata.force and whine about it.
403 * For consistency with link selection, device number 15 selects
404 * the first device connected to the host link.
405 *
406 * LOCKING:
407 * EH context.
408 */
409static void ata_force_xfermask(struct ata_device *dev)
410{
411 int devno = dev->link->pmp + dev->devno;
412 int alt_devno = devno;
413 int i;
414
b1c72916
TH
415 /* allow n.15/16 for devices attached to host port */
416 if (ata_is_host_link(dev->link))
417 alt_devno += 15;
33267325
TH
418
419 for (i = ata_force_tbl_size - 1; i >= 0; i--) {
420 const struct ata_force_ent *fe = &ata_force_tbl[i];
421 unsigned long pio_mask, mwdma_mask, udma_mask;
422
423 if (fe->port != -1 && fe->port != dev->link->ap->print_id)
424 continue;
425
426 if (fe->device != -1 && fe->device != devno &&
427 fe->device != alt_devno)
428 continue;
429
430 if (!fe->param.xfer_mask)
431 continue;
432
433 ata_unpack_xfermask(fe->param.xfer_mask,
434 &pio_mask, &mwdma_mask, &udma_mask);
435 if (udma_mask)
436 dev->udma_mask = udma_mask;
437 else if (mwdma_mask) {
438 dev->udma_mask = 0;
439 dev->mwdma_mask = mwdma_mask;
440 } else {
441 dev->udma_mask = 0;
442 dev->mwdma_mask = 0;
443 dev->pio_mask = pio_mask;
444 }
445
a9a79dfe
JP
446 ata_dev_notice(dev, "FORCE: xfer_mask set to %s\n",
447 fe->param.name);
33267325
TH
448 return;
449 }
450}
451
452/**
453 * ata_force_horkage - force horkage according to libata.force
454 * @dev: ATA device of interest
455 *
456 * Force horkage according to libata.force and whine about it.
457 * For consistency with link selection, device number 15 selects
458 * the first device connected to the host link.
459 *
460 * LOCKING:
461 * EH context.
462 */
463static void ata_force_horkage(struct ata_device *dev)
464{
465 int devno = dev->link->pmp + dev->devno;
466 int alt_devno = devno;
467 int i;
468
b1c72916
TH
469 /* allow n.15/16 for devices attached to host port */
470 if (ata_is_host_link(dev->link))
471 alt_devno += 15;
33267325
TH
472
473 for (i = 0; i < ata_force_tbl_size; i++) {
474 const struct ata_force_ent *fe = &ata_force_tbl[i];
475
476 if (fe->port != -1 && fe->port != dev->link->ap->print_id)
477 continue;
478
479 if (fe->device != -1 && fe->device != devno &&
480 fe->device != alt_devno)
481 continue;
482
483 if (!(~dev->horkage & fe->param.horkage_on) &&
484 !(dev->horkage & fe->param.horkage_off))
485 continue;
486
487 dev->horkage |= fe->param.horkage_on;
488 dev->horkage &= ~fe->param.horkage_off;
489
a9a79dfe
JP
490 ata_dev_notice(dev, "FORCE: horkage modified (%s)\n",
491 fe->param.name);
33267325
TH
492 }
493}
494
436d34b3
TH
495/**
496 * atapi_cmd_type - Determine ATAPI command type from SCSI opcode
497 * @opcode: SCSI opcode
498 *
499 * Determine ATAPI command type from @opcode.
500 *
501 * LOCKING:
502 * None.
503 *
504 * RETURNS:
505 * ATAPI_{READ|WRITE|READ_CD|PASS_THRU|MISC}
506 */
507int atapi_cmd_type(u8 opcode)
508{
509 switch (opcode) {
510 case GPCMD_READ_10:
511 case GPCMD_READ_12:
512 return ATAPI_READ;
513
514 case GPCMD_WRITE_10:
515 case GPCMD_WRITE_12:
516 case GPCMD_WRITE_AND_VERIFY_10:
517 return ATAPI_WRITE;
518
519 case GPCMD_READ_CD:
520 case GPCMD_READ_CD_MSF:
521 return ATAPI_READ_CD;
522
e52dcc48
TH
523 case ATA_16:
524 case ATA_12:
525 if (atapi_passthru16)
526 return ATAPI_PASS_THRU;
527 /* fall thru */
436d34b3
TH
528 default:
529 return ATAPI_MISC;
530 }
531}
532
1da177e4
LT
533/**
534 * ata_tf_to_fis - Convert ATA taskfile to SATA FIS structure
535 * @tf: Taskfile to convert
1da177e4 536 * @pmp: Port multiplier port
9977126c
TH
537 * @is_cmd: This FIS is for command
538 * @fis: Buffer into which data will output
1da177e4
LT
539 *
540 * Converts a standard ATA taskfile to a Serial ATA
541 * FIS structure (Register - Host to Device).
542 *
543 * LOCKING:
544 * Inherited from caller.
545 */
9977126c 546void ata_tf_to_fis(const struct ata_taskfile *tf, u8 pmp, int is_cmd, u8 *fis)
1da177e4 547{
9977126c
TH
548 fis[0] = 0x27; /* Register - Host to Device FIS */
549 fis[1] = pmp & 0xf; /* Port multiplier number*/
550 if (is_cmd)
551 fis[1] |= (1 << 7); /* bit 7 indicates Command FIS */
552
1da177e4
LT
553 fis[2] = tf->command;
554 fis[3] = tf->feature;
555
556 fis[4] = tf->lbal;
557 fis[5] = tf->lbam;
558 fis[6] = tf->lbah;
559 fis[7] = tf->device;
560
561 fis[8] = tf->hob_lbal;
562 fis[9] = tf->hob_lbam;
563 fis[10] = tf->hob_lbah;
564 fis[11] = tf->hob_feature;
565
566 fis[12] = tf->nsect;
567 fis[13] = tf->hob_nsect;
568 fis[14] = 0;
569 fis[15] = tf->ctl;
570
571 fis[16] = 0;
572 fis[17] = 0;
573 fis[18] = 0;
574 fis[19] = 0;
575}
576
577/**
578 * ata_tf_from_fis - Convert SATA FIS to ATA taskfile
579 * @fis: Buffer from which data will be input
580 * @tf: Taskfile to output
581 *
e12a1be6 582 * Converts a serial ATA FIS structure to a standard ATA taskfile.
1da177e4
LT
583 *
584 * LOCKING:
585 * Inherited from caller.
586 */
587
057ace5e 588void ata_tf_from_fis(const u8 *fis, struct ata_taskfile *tf)
1da177e4
LT
589{
590 tf->command = fis[2]; /* status */
591 tf->feature = fis[3]; /* error */
592
593 tf->lbal = fis[4];
594 tf->lbam = fis[5];
595 tf->lbah = fis[6];
596 tf->device = fis[7];
597
598 tf->hob_lbal = fis[8];
599 tf->hob_lbam = fis[9];
600 tf->hob_lbah = fis[10];
601
602 tf->nsect = fis[12];
603 tf->hob_nsect = fis[13];
604}
605
8cbd6df1
AL
606static const u8 ata_rw_cmds[] = {
607 /* pio multi */
608 ATA_CMD_READ_MULTI,
609 ATA_CMD_WRITE_MULTI,
610 ATA_CMD_READ_MULTI_EXT,
611 ATA_CMD_WRITE_MULTI_EXT,
9a3dccc4
TH
612 0,
613 0,
614 0,
615 ATA_CMD_WRITE_MULTI_FUA_EXT,
8cbd6df1
AL
616 /* pio */
617 ATA_CMD_PIO_READ,
618 ATA_CMD_PIO_WRITE,
619 ATA_CMD_PIO_READ_EXT,
620 ATA_CMD_PIO_WRITE_EXT,
9a3dccc4
TH
621 0,
622 0,
623 0,
624 0,
8cbd6df1
AL
625 /* dma */
626 ATA_CMD_READ,
627 ATA_CMD_WRITE,
628 ATA_CMD_READ_EXT,
9a3dccc4
TH
629 ATA_CMD_WRITE_EXT,
630 0,
631 0,
632 0,
633 ATA_CMD_WRITE_FUA_EXT
8cbd6df1 634};
1da177e4
LT
635
636/**
8cbd6df1 637 * ata_rwcmd_protocol - set taskfile r/w commands and protocol
bd056d7e
TH
638 * @tf: command to examine and configure
639 * @dev: device tf belongs to
1da177e4 640 *
2e9edbf8 641 * Examine the device configuration and tf->flags to calculate
8cbd6df1 642 * the proper read/write commands and protocol to use.
1da177e4
LT
643 *
644 * LOCKING:
645 * caller.
646 */
bd056d7e 647static int ata_rwcmd_protocol(struct ata_taskfile *tf, struct ata_device *dev)
1da177e4 648{
9a3dccc4 649 u8 cmd;
1da177e4 650
9a3dccc4 651 int index, fua, lba48, write;
2e9edbf8 652
9a3dccc4 653 fua = (tf->flags & ATA_TFLAG_FUA) ? 4 : 0;
8cbd6df1
AL
654 lba48 = (tf->flags & ATA_TFLAG_LBA48) ? 2 : 0;
655 write = (tf->flags & ATA_TFLAG_WRITE) ? 1 : 0;
1da177e4 656
8cbd6df1
AL
657 if (dev->flags & ATA_DFLAG_PIO) {
658 tf->protocol = ATA_PROT_PIO;
9a3dccc4 659 index = dev->multi_count ? 0 : 8;
9af5c9c9 660 } else if (lba48 && (dev->link->ap->flags & ATA_FLAG_PIO_LBA48)) {
8d238e01
AC
661 /* Unable to use DMA due to host limitation */
662 tf->protocol = ATA_PROT_PIO;
0565c26d 663 index = dev->multi_count ? 0 : 8;
8cbd6df1
AL
664 } else {
665 tf->protocol = ATA_PROT_DMA;
9a3dccc4 666 index = 16;
8cbd6df1 667 }
1da177e4 668
9a3dccc4
TH
669 cmd = ata_rw_cmds[index + fua + lba48 + write];
670 if (cmd) {
671 tf->command = cmd;
672 return 0;
673 }
674 return -1;
1da177e4
LT
675}
676
35b649fe
TH
677/**
678 * ata_tf_read_block - Read block address from ATA taskfile
679 * @tf: ATA taskfile of interest
680 * @dev: ATA device @tf belongs to
681 *
682 * LOCKING:
683 * None.
684 *
685 * Read block address from @tf. This function can handle all
686 * three address formats - LBA, LBA48 and CHS. tf->protocol and
687 * flags select the address format to use.
688 *
689 * RETURNS:
690 * Block address read from @tf.
691 */
692u64 ata_tf_read_block(struct ata_taskfile *tf, struct ata_device *dev)
693{
694 u64 block = 0;
695
696 if (tf->flags & ATA_TFLAG_LBA) {
697 if (tf->flags & ATA_TFLAG_LBA48) {
698 block |= (u64)tf->hob_lbah << 40;
699 block |= (u64)tf->hob_lbam << 32;
44901a96 700 block |= (u64)tf->hob_lbal << 24;
35b649fe
TH
701 } else
702 block |= (tf->device & 0xf) << 24;
703
704 block |= tf->lbah << 16;
705 block |= tf->lbam << 8;
706 block |= tf->lbal;
707 } else {
708 u32 cyl, head, sect;
709
710 cyl = tf->lbam | (tf->lbah << 8);
711 head = tf->device & 0xf;
712 sect = tf->lbal;
713
ac8672ea 714 if (!sect) {
a9a79dfe
JP
715 ata_dev_warn(dev,
716 "device reported invalid CHS sector 0\n");
ac8672ea
TH
717 sect = 1; /* oh well */
718 }
719
720 block = (cyl * dev->heads + head) * dev->sectors + sect - 1;
35b649fe
TH
721 }
722
723 return block;
724}
725
bd056d7e
TH
726/**
727 * ata_build_rw_tf - Build ATA taskfile for given read/write request
728 * @tf: Target ATA taskfile
729 * @dev: ATA device @tf belongs to
730 * @block: Block address
731 * @n_block: Number of blocks
732 * @tf_flags: RW/FUA etc...
733 * @tag: tag
734 *
735 * LOCKING:
736 * None.
737 *
738 * Build ATA taskfile @tf for read/write request described by
739 * @block, @n_block, @tf_flags and @tag on @dev.
740 *
741 * RETURNS:
742 *
743 * 0 on success, -ERANGE if the request is too large for @dev,
744 * -EINVAL if the request is invalid.
745 */
746int ata_build_rw_tf(struct ata_taskfile *tf, struct ata_device *dev,
747 u64 block, u32 n_block, unsigned int tf_flags,
748 unsigned int tag)
749{
750 tf->flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
751 tf->flags |= tf_flags;
752
6d1245bf 753 if (ata_ncq_enabled(dev) && likely(tag != ATA_TAG_INTERNAL)) {
bd056d7e
TH
754 /* yay, NCQ */
755 if (!lba_48_ok(block, n_block))
756 return -ERANGE;
757
758 tf->protocol = ATA_PROT_NCQ;
759 tf->flags |= ATA_TFLAG_LBA | ATA_TFLAG_LBA48;
760
761 if (tf->flags & ATA_TFLAG_WRITE)
762 tf->command = ATA_CMD_FPDMA_WRITE;
763 else
764 tf->command = ATA_CMD_FPDMA_READ;
765
766 tf->nsect = tag << 3;
767 tf->hob_feature = (n_block >> 8) & 0xff;
768 tf->feature = n_block & 0xff;
769
770 tf->hob_lbah = (block >> 40) & 0xff;
771 tf->hob_lbam = (block >> 32) & 0xff;
772 tf->hob_lbal = (block >> 24) & 0xff;
773 tf->lbah = (block >> 16) & 0xff;
774 tf->lbam = (block >> 8) & 0xff;
775 tf->lbal = block & 0xff;
776
9ca7cfa4 777 tf->device = ATA_LBA;
bd056d7e
TH
778 if (tf->flags & ATA_TFLAG_FUA)
779 tf->device |= 1 << 7;
780 } else if (dev->flags & ATA_DFLAG_LBA) {
781 tf->flags |= ATA_TFLAG_LBA;
782
783 if (lba_28_ok(block, n_block)) {
784 /* use LBA28 */
785 tf->device |= (block >> 24) & 0xf;
786 } else if (lba_48_ok(block, n_block)) {
787 if (!(dev->flags & ATA_DFLAG_LBA48))
788 return -ERANGE;
789
790 /* use LBA48 */
791 tf->flags |= ATA_TFLAG_LBA48;
792
793 tf->hob_nsect = (n_block >> 8) & 0xff;
794
795 tf->hob_lbah = (block >> 40) & 0xff;
796 tf->hob_lbam = (block >> 32) & 0xff;
797 tf->hob_lbal = (block >> 24) & 0xff;
798 } else
799 /* request too large even for LBA48 */
800 return -ERANGE;
801
802 if (unlikely(ata_rwcmd_protocol(tf, dev) < 0))
803 return -EINVAL;
804
805 tf->nsect = n_block & 0xff;
806
807 tf->lbah = (block >> 16) & 0xff;
808 tf->lbam = (block >> 8) & 0xff;
809 tf->lbal = block & 0xff;
810
811 tf->device |= ATA_LBA;
812 } else {
813 /* CHS */
814 u32 sect, head, cyl, track;
815
816 /* The request -may- be too large for CHS addressing. */
817 if (!lba_28_ok(block, n_block))
818 return -ERANGE;
819
820 if (unlikely(ata_rwcmd_protocol(tf, dev) < 0))
821 return -EINVAL;
822
823 /* Convert LBA to CHS */
824 track = (u32)block / dev->sectors;
825 cyl = track / dev->heads;
826 head = track % dev->heads;
827 sect = (u32)block % dev->sectors + 1;
828
829 DPRINTK("block %u track %u cyl %u head %u sect %u\n",
830 (u32)block, track, cyl, head, sect);
831
832 /* Check whether the converted CHS can fit.
833 Cylinder: 0-65535
834 Head: 0-15
835 Sector: 1-255*/
836 if ((cyl >> 16) || (head >> 4) || (sect >> 8) || (!sect))
837 return -ERANGE;
838
839 tf->nsect = n_block & 0xff; /* Sector count 0 means 256 sectors */
840 tf->lbal = sect;
841 tf->lbam = cyl;
842 tf->lbah = cyl >> 8;
843 tf->device |= head;
844 }
845
846 return 0;
847}
848
cb95d562
TH
849/**
850 * ata_pack_xfermask - Pack pio, mwdma and udma masks into xfer_mask
851 * @pio_mask: pio_mask
852 * @mwdma_mask: mwdma_mask
853 * @udma_mask: udma_mask
854 *
855 * Pack @pio_mask, @mwdma_mask and @udma_mask into a single
856 * unsigned int xfer_mask.
857 *
858 * LOCKING:
859 * None.
860 *
861 * RETURNS:
862 * Packed xfer_mask.
863 */
7dc951ae
TH
864unsigned long ata_pack_xfermask(unsigned long pio_mask,
865 unsigned long mwdma_mask,
866 unsigned long udma_mask)
cb95d562
TH
867{
868 return ((pio_mask << ATA_SHIFT_PIO) & ATA_MASK_PIO) |
869 ((mwdma_mask << ATA_SHIFT_MWDMA) & ATA_MASK_MWDMA) |
870 ((udma_mask << ATA_SHIFT_UDMA) & ATA_MASK_UDMA);
871}
872
c0489e4e
TH
873/**
874 * ata_unpack_xfermask - Unpack xfer_mask into pio, mwdma and udma masks
875 * @xfer_mask: xfer_mask to unpack
876 * @pio_mask: resulting pio_mask
877 * @mwdma_mask: resulting mwdma_mask
878 * @udma_mask: resulting udma_mask
879 *
880 * Unpack @xfer_mask into @pio_mask, @mwdma_mask and @udma_mask.
881 * Any NULL distination masks will be ignored.
882 */
7dc951ae
TH
883void ata_unpack_xfermask(unsigned long xfer_mask, unsigned long *pio_mask,
884 unsigned long *mwdma_mask, unsigned long *udma_mask)
c0489e4e
TH
885{
886 if (pio_mask)
887 *pio_mask = (xfer_mask & ATA_MASK_PIO) >> ATA_SHIFT_PIO;
888 if (mwdma_mask)
889 *mwdma_mask = (xfer_mask & ATA_MASK_MWDMA) >> ATA_SHIFT_MWDMA;
890 if (udma_mask)
891 *udma_mask = (xfer_mask & ATA_MASK_UDMA) >> ATA_SHIFT_UDMA;
892}
893
cb95d562 894static const struct ata_xfer_ent {
be9a50c8 895 int shift, bits;
cb95d562
TH
896 u8 base;
897} ata_xfer_tbl[] = {
70cd071e
TH
898 { ATA_SHIFT_PIO, ATA_NR_PIO_MODES, XFER_PIO_0 },
899 { ATA_SHIFT_MWDMA, ATA_NR_MWDMA_MODES, XFER_MW_DMA_0 },
900 { ATA_SHIFT_UDMA, ATA_NR_UDMA_MODES, XFER_UDMA_0 },
cb95d562
TH
901 { -1, },
902};
903
904/**
905 * ata_xfer_mask2mode - Find matching XFER_* for the given xfer_mask
906 * @xfer_mask: xfer_mask of interest
907 *
908 * Return matching XFER_* value for @xfer_mask. Only the highest
909 * bit of @xfer_mask is considered.
910 *
911 * LOCKING:
912 * None.
913 *
914 * RETURNS:
70cd071e 915 * Matching XFER_* value, 0xff if no match found.
cb95d562 916 */
7dc951ae 917u8 ata_xfer_mask2mode(unsigned long xfer_mask)
cb95d562
TH
918{
919 int highbit = fls(xfer_mask) - 1;
920 const struct ata_xfer_ent *ent;
921
922 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
923 if (highbit >= ent->shift && highbit < ent->shift + ent->bits)
924 return ent->base + highbit - ent->shift;
70cd071e 925 return 0xff;
cb95d562
TH
926}
927
928/**
929 * ata_xfer_mode2mask - Find matching xfer_mask for XFER_*
930 * @xfer_mode: XFER_* of interest
931 *
932 * Return matching xfer_mask for @xfer_mode.
933 *
934 * LOCKING:
935 * None.
936 *
937 * RETURNS:
938 * Matching xfer_mask, 0 if no match found.
939 */
7dc951ae 940unsigned long ata_xfer_mode2mask(u8 xfer_mode)
cb95d562
TH
941{
942 const struct ata_xfer_ent *ent;
943
944 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
945 if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits)
70cd071e
TH
946 return ((2 << (ent->shift + xfer_mode - ent->base)) - 1)
947 & ~((1 << ent->shift) - 1);
cb95d562
TH
948 return 0;
949}
950
951/**
952 * ata_xfer_mode2shift - Find matching xfer_shift for XFER_*
953 * @xfer_mode: XFER_* of interest
954 *
955 * Return matching xfer_shift for @xfer_mode.
956 *
957 * LOCKING:
958 * None.
959 *
960 * RETURNS:
961 * Matching xfer_shift, -1 if no match found.
962 */
7dc951ae 963int ata_xfer_mode2shift(unsigned long xfer_mode)
cb95d562
TH
964{
965 const struct ata_xfer_ent *ent;
966
967 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
968 if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits)
969 return ent->shift;
970 return -1;
971}
972
1da177e4 973/**
1da7b0d0
TH
974 * ata_mode_string - convert xfer_mask to string
975 * @xfer_mask: mask of bits supported; only highest bit counts.
1da177e4
LT
976 *
977 * Determine string which represents the highest speed
1da7b0d0 978 * (highest bit in @modemask).
1da177e4
LT
979 *
980 * LOCKING:
981 * None.
982 *
983 * RETURNS:
984 * Constant C string representing highest speed listed in
1da7b0d0 985 * @mode_mask, or the constant C string "<n/a>".
1da177e4 986 */
7dc951ae 987const char *ata_mode_string(unsigned long xfer_mask)
1da177e4 988{
75f554bc
TH
989 static const char * const xfer_mode_str[] = {
990 "PIO0",
991 "PIO1",
992 "PIO2",
993 "PIO3",
994 "PIO4",
b352e57d
AC
995 "PIO5",
996 "PIO6",
75f554bc
TH
997 "MWDMA0",
998 "MWDMA1",
999 "MWDMA2",
b352e57d
AC
1000 "MWDMA3",
1001 "MWDMA4",
75f554bc
TH
1002 "UDMA/16",
1003 "UDMA/25",
1004 "UDMA/33",
1005 "UDMA/44",
1006 "UDMA/66",
1007 "UDMA/100",
1008 "UDMA/133",
1009 "UDMA7",
1010 };
1da7b0d0 1011 int highbit;
1da177e4 1012
1da7b0d0
TH
1013 highbit = fls(xfer_mask) - 1;
1014 if (highbit >= 0 && highbit < ARRAY_SIZE(xfer_mode_str))
1015 return xfer_mode_str[highbit];
1da177e4 1016 return "<n/a>";
1da177e4
LT
1017}
1018
d9027470 1019const char *sata_spd_string(unsigned int spd)
4c360c81
TH
1020{
1021 static const char * const spd_str[] = {
1022 "1.5 Gbps",
1023 "3.0 Gbps",
8522ee25 1024 "6.0 Gbps",
4c360c81
TH
1025 };
1026
1027 if (spd == 0 || (spd - 1) >= ARRAY_SIZE(spd_str))
1028 return "<unknown>";
1029 return spd_str[spd - 1];
1030}
1031
1da177e4
LT
1032/**
1033 * ata_dev_classify - determine device type based on ATA-spec signature
1034 * @tf: ATA taskfile register set for device to be identified
1035 *
1036 * Determine from taskfile register contents whether a device is
1037 * ATA or ATAPI, as per "Signature and persistence" section
1038 * of ATA/PI spec (volume 1, sect 5.14).
1039 *
1040 * LOCKING:
1041 * None.
1042 *
1043 * RETURNS:
633273a3
TH
1044 * Device type, %ATA_DEV_ATA, %ATA_DEV_ATAPI, %ATA_DEV_PMP or
1045 * %ATA_DEV_UNKNOWN the event of failure.
1da177e4 1046 */
057ace5e 1047unsigned int ata_dev_classify(const struct ata_taskfile *tf)
1da177e4
LT
1048{
1049 /* Apple's open source Darwin code hints that some devices only
1050 * put a proper signature into the LBA mid/high registers,
1051 * So, we only check those. It's sufficient for uniqueness.
633273a3
TH
1052 *
1053 * ATA/ATAPI-7 (d1532v1r1: Feb. 19, 2003) specified separate
1054 * signatures for ATA and ATAPI devices attached on SerialATA,
1055 * 0x3c/0xc3 and 0x69/0x96 respectively. However, SerialATA
1056 * spec has never mentioned about using different signatures
1057 * for ATA/ATAPI devices. Then, Serial ATA II: Port
1058 * Multiplier specification began to use 0x69/0x96 to identify
1059 * port multpliers and 0x3c/0xc3 to identify SEMB device.
1060 * ATA/ATAPI-7 dropped descriptions about 0x3c/0xc3 and
1061 * 0x69/0x96 shortly and described them as reserved for
1062 * SerialATA.
1063 *
1064 * We follow the current spec and consider that 0x69/0x96
1065 * identifies a port multiplier and 0x3c/0xc3 a SEMB device.
79b42bab
TH
1066 * Unfortunately, WDC WD1600JS-62MHB5 (a hard drive) reports
1067 * SEMB signature. This is worked around in
1068 * ata_dev_read_id().
1da177e4 1069 */
633273a3 1070 if ((tf->lbam == 0) && (tf->lbah == 0)) {
1da177e4
LT
1071 DPRINTK("found ATA device by sig\n");
1072 return ATA_DEV_ATA;
1073 }
1074
633273a3 1075 if ((tf->lbam == 0x14) && (tf->lbah == 0xeb)) {
1da177e4
LT
1076 DPRINTK("found ATAPI device by sig\n");
1077 return ATA_DEV_ATAPI;
1078 }
1079
633273a3
TH
1080 if ((tf->lbam == 0x69) && (tf->lbah == 0x96)) {
1081 DPRINTK("found PMP device by sig\n");
1082 return ATA_DEV_PMP;
1083 }
1084
1085 if ((tf->lbam == 0x3c) && (tf->lbah == 0xc3)) {
79b42bab
TH
1086 DPRINTK("found SEMB device by sig (could be ATA device)\n");
1087 return ATA_DEV_SEMB;
633273a3
TH
1088 }
1089
1da177e4
LT
1090 DPRINTK("unknown device\n");
1091 return ATA_DEV_UNKNOWN;
1092}
1093
1da177e4 1094/**
6a62a04d 1095 * ata_id_string - Convert IDENTIFY DEVICE page into string
1da177e4
LT
1096 * @id: IDENTIFY DEVICE results we will examine
1097 * @s: string into which data is output
1098 * @ofs: offset into identify device page
1099 * @len: length of string to return. must be an even number.
1100 *
1101 * The strings in the IDENTIFY DEVICE page are broken up into
1102 * 16-bit chunks. Run through the string, and output each
1103 * 8-bit chunk linearly, regardless of platform.
1104 *
1105 * LOCKING:
1106 * caller.
1107 */
1108
6a62a04d
TH
1109void ata_id_string(const u16 *id, unsigned char *s,
1110 unsigned int ofs, unsigned int len)
1da177e4
LT
1111{
1112 unsigned int c;
1113
963e4975
AC
1114 BUG_ON(len & 1);
1115
1da177e4
LT
1116 while (len > 0) {
1117 c = id[ofs] >> 8;
1118 *s = c;
1119 s++;
1120
1121 c = id[ofs] & 0xff;
1122 *s = c;
1123 s++;
1124
1125 ofs++;
1126 len -= 2;
1127 }
1128}
1129
0e949ff3 1130/**
6a62a04d 1131 * ata_id_c_string - Convert IDENTIFY DEVICE page into C string
0e949ff3
TH
1132 * @id: IDENTIFY DEVICE results we will examine
1133 * @s: string into which data is output
1134 * @ofs: offset into identify device page
1135 * @len: length of string to return. must be an odd number.
1136 *
6a62a04d 1137 * This function is identical to ata_id_string except that it
0e949ff3
TH
1138 * trims trailing spaces and terminates the resulting string with
1139 * null. @len must be actual maximum length (even number) + 1.
1140 *
1141 * LOCKING:
1142 * caller.
1143 */
6a62a04d
TH
1144void ata_id_c_string(const u16 *id, unsigned char *s,
1145 unsigned int ofs, unsigned int len)
0e949ff3
TH
1146{
1147 unsigned char *p;
1148
6a62a04d 1149 ata_id_string(id, s, ofs, len - 1);
0e949ff3
TH
1150
1151 p = s + strnlen(s, len - 1);
1152 while (p > s && p[-1] == ' ')
1153 p--;
1154 *p = '\0';
1155}
0baab86b 1156
db6f8759
TH
1157static u64 ata_id_n_sectors(const u16 *id)
1158{
1159 if (ata_id_has_lba(id)) {
1160 if (ata_id_has_lba48(id))
968e594a 1161 return ata_id_u64(id, ATA_ID_LBA_CAPACITY_2);
db6f8759 1162 else
968e594a 1163 return ata_id_u32(id, ATA_ID_LBA_CAPACITY);
db6f8759
TH
1164 } else {
1165 if (ata_id_current_chs_valid(id))
968e594a
RH
1166 return id[ATA_ID_CUR_CYLS] * id[ATA_ID_CUR_HEADS] *
1167 id[ATA_ID_CUR_SECTORS];
db6f8759 1168 else
968e594a
RH
1169 return id[ATA_ID_CYLS] * id[ATA_ID_HEADS] *
1170 id[ATA_ID_SECTORS];
db6f8759
TH
1171 }
1172}
1173
a5987e0a 1174u64 ata_tf_to_lba48(const struct ata_taskfile *tf)
1e999736
AC
1175{
1176 u64 sectors = 0;
1177
1178 sectors |= ((u64)(tf->hob_lbah & 0xff)) << 40;
1179 sectors |= ((u64)(tf->hob_lbam & 0xff)) << 32;
ba14a9c2 1180 sectors |= ((u64)(tf->hob_lbal & 0xff)) << 24;
1e999736
AC
1181 sectors |= (tf->lbah & 0xff) << 16;
1182 sectors |= (tf->lbam & 0xff) << 8;
1183 sectors |= (tf->lbal & 0xff);
1184
a5987e0a 1185 return sectors;
1e999736
AC
1186}
1187
a5987e0a 1188u64 ata_tf_to_lba(const struct ata_taskfile *tf)
1e999736
AC
1189{
1190 u64 sectors = 0;
1191
1192 sectors |= (tf->device & 0x0f) << 24;
1193 sectors |= (tf->lbah & 0xff) << 16;
1194 sectors |= (tf->lbam & 0xff) << 8;
1195 sectors |= (tf->lbal & 0xff);
1196
a5987e0a 1197 return sectors;
1e999736
AC
1198}
1199
1200/**
c728a914
TH
1201 * ata_read_native_max_address - Read native max address
1202 * @dev: target device
1203 * @max_sectors: out parameter for the result native max address
1e999736 1204 *
c728a914
TH
1205 * Perform an LBA48 or LBA28 native size query upon the device in
1206 * question.
1e999736 1207 *
c728a914
TH
1208 * RETURNS:
1209 * 0 on success, -EACCES if command is aborted by the drive.
1210 * -EIO on other errors.
1e999736 1211 */
c728a914 1212static int ata_read_native_max_address(struct ata_device *dev, u64 *max_sectors)
1e999736 1213{
c728a914 1214 unsigned int err_mask;
1e999736 1215 struct ata_taskfile tf;
c728a914 1216 int lba48 = ata_id_has_lba48(dev->id);
1e999736
AC
1217
1218 ata_tf_init(dev, &tf);
1219
c728a914 1220 /* always clear all address registers */
1e999736 1221 tf.flags |= ATA_TFLAG_DEVICE | ATA_TFLAG_ISADDR;
1e999736 1222
c728a914
TH
1223 if (lba48) {
1224 tf.command = ATA_CMD_READ_NATIVE_MAX_EXT;
1225 tf.flags |= ATA_TFLAG_LBA48;
1226 } else
1227 tf.command = ATA_CMD_READ_NATIVE_MAX;
1e999736 1228
1e999736 1229 tf.protocol |= ATA_PROT_NODATA;
c728a914
TH
1230 tf.device |= ATA_LBA;
1231
2b789108 1232 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0, 0);
c728a914 1233 if (err_mask) {
a9a79dfe
JP
1234 ata_dev_warn(dev,
1235 "failed to read native max address (err_mask=0x%x)\n",
1236 err_mask);
c728a914
TH
1237 if (err_mask == AC_ERR_DEV && (tf.feature & ATA_ABORTED))
1238 return -EACCES;
1239 return -EIO;
1240 }
1e999736 1241
c728a914 1242 if (lba48)
a5987e0a 1243 *max_sectors = ata_tf_to_lba48(&tf) + 1;
c728a914 1244 else
a5987e0a 1245 *max_sectors = ata_tf_to_lba(&tf) + 1;
2dcb407e 1246 if (dev->horkage & ATA_HORKAGE_HPA_SIZE)
93328e11 1247 (*max_sectors)--;
c728a914 1248 return 0;
1e999736
AC
1249}
1250
1251/**
c728a914
TH
1252 * ata_set_max_sectors - Set max sectors
1253 * @dev: target device
6b38d1d1 1254 * @new_sectors: new max sectors value to set for the device
1e999736 1255 *
c728a914
TH
1256 * Set max sectors of @dev to @new_sectors.
1257 *
1258 * RETURNS:
1259 * 0 on success, -EACCES if command is aborted or denied (due to
1260 * previous non-volatile SET_MAX) by the drive. -EIO on other
1261 * errors.
1e999736 1262 */
05027adc 1263static int ata_set_max_sectors(struct ata_device *dev, u64 new_sectors)
1e999736 1264{
c728a914 1265 unsigned int err_mask;
1e999736 1266 struct ata_taskfile tf;
c728a914 1267 int lba48 = ata_id_has_lba48(dev->id);
1e999736
AC
1268
1269 new_sectors--;
1270
1271 ata_tf_init(dev, &tf);
1272
1e999736 1273 tf.flags |= ATA_TFLAG_DEVICE | ATA_TFLAG_ISADDR;
c728a914
TH
1274
1275 if (lba48) {
1276 tf.command = ATA_CMD_SET_MAX_EXT;
1277 tf.flags |= ATA_TFLAG_LBA48;
1278
1279 tf.hob_lbal = (new_sectors >> 24) & 0xff;
1280 tf.hob_lbam = (new_sectors >> 32) & 0xff;
1281 tf.hob_lbah = (new_sectors >> 40) & 0xff;
1e582ba4 1282 } else {
c728a914
TH
1283 tf.command = ATA_CMD_SET_MAX;
1284
1e582ba4
TH
1285 tf.device |= (new_sectors >> 24) & 0xf;
1286 }
1287
1e999736 1288 tf.protocol |= ATA_PROT_NODATA;
c728a914 1289 tf.device |= ATA_LBA;
1e999736
AC
1290
1291 tf.lbal = (new_sectors >> 0) & 0xff;
1292 tf.lbam = (new_sectors >> 8) & 0xff;
1293 tf.lbah = (new_sectors >> 16) & 0xff;
1e999736 1294
2b789108 1295 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0, 0);
c728a914 1296 if (err_mask) {
a9a79dfe
JP
1297 ata_dev_warn(dev,
1298 "failed to set max address (err_mask=0x%x)\n",
1299 err_mask);
c728a914
TH
1300 if (err_mask == AC_ERR_DEV &&
1301 (tf.feature & (ATA_ABORTED | ATA_IDNF)))
1302 return -EACCES;
1303 return -EIO;
1304 }
1305
c728a914 1306 return 0;
1e999736
AC
1307}
1308
1309/**
1310 * ata_hpa_resize - Resize a device with an HPA set
1311 * @dev: Device to resize
1312 *
1313 * Read the size of an LBA28 or LBA48 disk with HPA features and resize
1314 * it if required to the full size of the media. The caller must check
1315 * the drive has the HPA feature set enabled.
05027adc
TH
1316 *
1317 * RETURNS:
1318 * 0 on success, -errno on failure.
1e999736 1319 */
05027adc 1320static int ata_hpa_resize(struct ata_device *dev)
1e999736 1321{
05027adc
TH
1322 struct ata_eh_context *ehc = &dev->link->eh_context;
1323 int print_info = ehc->i.flags & ATA_EHI_PRINTINFO;
445d211b 1324 bool unlock_hpa = ata_ignore_hpa || dev->flags & ATA_DFLAG_UNLOCK_HPA;
05027adc
TH
1325 u64 sectors = ata_id_n_sectors(dev->id);
1326 u64 native_sectors;
c728a914 1327 int rc;
a617c09f 1328
05027adc
TH
1329 /* do we need to do it? */
1330 if (dev->class != ATA_DEV_ATA ||
1331 !ata_id_has_lba(dev->id) || !ata_id_hpa_enabled(dev->id) ||
1332 (dev->horkage & ATA_HORKAGE_BROKEN_HPA))
c728a914 1333 return 0;
1e999736 1334
05027adc
TH
1335 /* read native max address */
1336 rc = ata_read_native_max_address(dev, &native_sectors);
1337 if (rc) {
dda7aba1
TH
1338 /* If device aborted the command or HPA isn't going to
1339 * be unlocked, skip HPA resizing.
05027adc 1340 */
445d211b 1341 if (rc == -EACCES || !unlock_hpa) {
a9a79dfe
JP
1342 ata_dev_warn(dev,
1343 "HPA support seems broken, skipping HPA handling\n");
05027adc
TH
1344 dev->horkage |= ATA_HORKAGE_BROKEN_HPA;
1345
1346 /* we can continue if device aborted the command */
1347 if (rc == -EACCES)
1348 rc = 0;
1e999736 1349 }
37301a55 1350
05027adc
TH
1351 return rc;
1352 }
5920dadf 1353 dev->n_native_sectors = native_sectors;
05027adc
TH
1354
1355 /* nothing to do? */
445d211b 1356 if (native_sectors <= sectors || !unlock_hpa) {
05027adc
TH
1357 if (!print_info || native_sectors == sectors)
1358 return 0;
1359
1360 if (native_sectors > sectors)
a9a79dfe 1361 ata_dev_info(dev,
05027adc
TH
1362 "HPA detected: current %llu, native %llu\n",
1363 (unsigned long long)sectors,
1364 (unsigned long long)native_sectors);
1365 else if (native_sectors < sectors)
a9a79dfe
JP
1366 ata_dev_warn(dev,
1367 "native sectors (%llu) is smaller than sectors (%llu)\n",
05027adc
TH
1368 (unsigned long long)native_sectors,
1369 (unsigned long long)sectors);
1370 return 0;
1371 }
1372
1373 /* let's unlock HPA */
1374 rc = ata_set_max_sectors(dev, native_sectors);
1375 if (rc == -EACCES) {
1376 /* if device aborted the command, skip HPA resizing */
a9a79dfe
JP
1377 ata_dev_warn(dev,
1378 "device aborted resize (%llu -> %llu), skipping HPA handling\n",
1379 (unsigned long long)sectors,
1380 (unsigned long long)native_sectors);
05027adc
TH
1381 dev->horkage |= ATA_HORKAGE_BROKEN_HPA;
1382 return 0;
1383 } else if (rc)
1384 return rc;
1385
1386 /* re-read IDENTIFY data */
1387 rc = ata_dev_reread_id(dev, 0);
1388 if (rc) {
a9a79dfe
JP
1389 ata_dev_err(dev,
1390 "failed to re-read IDENTIFY data after HPA resizing\n");
05027adc
TH
1391 return rc;
1392 }
1393
1394 if (print_info) {
1395 u64 new_sectors = ata_id_n_sectors(dev->id);
a9a79dfe 1396 ata_dev_info(dev,
05027adc
TH
1397 "HPA unlocked: %llu -> %llu, native %llu\n",
1398 (unsigned long long)sectors,
1399 (unsigned long long)new_sectors,
1400 (unsigned long long)native_sectors);
1401 }
1402
1403 return 0;
1e999736
AC
1404}
1405
1da177e4
LT
1406/**
1407 * ata_dump_id - IDENTIFY DEVICE info debugging output
0bd3300a 1408 * @id: IDENTIFY DEVICE page to dump
1da177e4 1409 *
0bd3300a
TH
1410 * Dump selected 16-bit words from the given IDENTIFY DEVICE
1411 * page.
1da177e4
LT
1412 *
1413 * LOCKING:
1414 * caller.
1415 */
1416
0bd3300a 1417static inline void ata_dump_id(const u16 *id)
1da177e4
LT
1418{
1419 DPRINTK("49==0x%04x "
1420 "53==0x%04x "
1421 "63==0x%04x "
1422 "64==0x%04x "
1423 "75==0x%04x \n",
0bd3300a
TH
1424 id[49],
1425 id[53],
1426 id[63],
1427 id[64],
1428 id[75]);
1da177e4
LT
1429 DPRINTK("80==0x%04x "
1430 "81==0x%04x "
1431 "82==0x%04x "
1432 "83==0x%04x "
1433 "84==0x%04x \n",
0bd3300a
TH
1434 id[80],
1435 id[81],
1436 id[82],
1437 id[83],
1438 id[84]);
1da177e4
LT
1439 DPRINTK("88==0x%04x "
1440 "93==0x%04x\n",
0bd3300a
TH
1441 id[88],
1442 id[93]);
1da177e4
LT
1443}
1444
cb95d562
TH
1445/**
1446 * ata_id_xfermask - Compute xfermask from the given IDENTIFY data
1447 * @id: IDENTIFY data to compute xfer mask from
1448 *
1449 * Compute the xfermask for this device. This is not as trivial
1450 * as it seems if we must consider early devices correctly.
1451 *
1452 * FIXME: pre IDE drive timing (do we care ?).
1453 *
1454 * LOCKING:
1455 * None.
1456 *
1457 * RETURNS:
1458 * Computed xfermask
1459 */
7dc951ae 1460unsigned long ata_id_xfermask(const u16 *id)
cb95d562 1461{
7dc951ae 1462 unsigned long pio_mask, mwdma_mask, udma_mask;
cb95d562
TH
1463
1464 /* Usual case. Word 53 indicates word 64 is valid */
1465 if (id[ATA_ID_FIELD_VALID] & (1 << 1)) {
1466 pio_mask = id[ATA_ID_PIO_MODES] & 0x03;
1467 pio_mask <<= 3;
1468 pio_mask |= 0x7;
1469 } else {
1470 /* If word 64 isn't valid then Word 51 high byte holds
1471 * the PIO timing number for the maximum. Turn it into
1472 * a mask.
1473 */
7a0f1c8a 1474 u8 mode = (id[ATA_ID_OLD_PIO_MODES] >> 8) & 0xFF;
46767aeb 1475 if (mode < 5) /* Valid PIO range */
2dcb407e 1476 pio_mask = (2 << mode) - 1;
46767aeb
AC
1477 else
1478 pio_mask = 1;
cb95d562
TH
1479
1480 /* But wait.. there's more. Design your standards by
1481 * committee and you too can get a free iordy field to
1482 * process. However its the speeds not the modes that
1483 * are supported... Note drivers using the timing API
1484 * will get this right anyway
1485 */
1486 }
1487
1488 mwdma_mask = id[ATA_ID_MWDMA_MODES] & 0x07;
fb21f0d0 1489
b352e57d
AC
1490 if (ata_id_is_cfa(id)) {
1491 /*
1492 * Process compact flash extended modes
1493 */
62afe5d7
SS
1494 int pio = (id[ATA_ID_CFA_MODES] >> 0) & 0x7;
1495 int dma = (id[ATA_ID_CFA_MODES] >> 3) & 0x7;
b352e57d
AC
1496
1497 if (pio)
1498 pio_mask |= (1 << 5);
1499 if (pio > 1)
1500 pio_mask |= (1 << 6);
1501 if (dma)
1502 mwdma_mask |= (1 << 3);
1503 if (dma > 1)
1504 mwdma_mask |= (1 << 4);
1505 }
1506
fb21f0d0
TH
1507 udma_mask = 0;
1508 if (id[ATA_ID_FIELD_VALID] & (1 << 2))
1509 udma_mask = id[ATA_ID_UDMA_MODES] & 0xff;
cb95d562
TH
1510
1511 return ata_pack_xfermask(pio_mask, mwdma_mask, udma_mask);
1512}
1513
7102d230 1514static void ata_qc_complete_internal(struct ata_queued_cmd *qc)
a2a7a662 1515{
77853bf2 1516 struct completion *waiting = qc->private_data;
a2a7a662 1517
a2a7a662 1518 complete(waiting);
a2a7a662
TH
1519}
1520
1521/**
2432697b 1522 * ata_exec_internal_sg - execute libata internal command
a2a7a662
TH
1523 * @dev: Device to which the command is sent
1524 * @tf: Taskfile registers for the command and the result
d69cf37d 1525 * @cdb: CDB for packet command
a2a7a662 1526 * @dma_dir: Data tranfer direction of the command
5c1ad8b3 1527 * @sgl: sg list for the data buffer of the command
2432697b 1528 * @n_elem: Number of sg entries
2b789108 1529 * @timeout: Timeout in msecs (0 for default)
a2a7a662
TH
1530 *
1531 * Executes libata internal command with timeout. @tf contains
1532 * command on entry and result on return. Timeout and error
1533 * conditions are reported via return value. No recovery action
1534 * is taken after a command times out. It's caller's duty to
1535 * clean up after timeout.
1536 *
1537 * LOCKING:
1538 * None. Should be called with kernel context, might sleep.
551e8889
TH
1539 *
1540 * RETURNS:
1541 * Zero on success, AC_ERR_* mask on failure
a2a7a662 1542 */
2432697b
TH
1543unsigned ata_exec_internal_sg(struct ata_device *dev,
1544 struct ata_taskfile *tf, const u8 *cdb,
87260216 1545 int dma_dir, struct scatterlist *sgl,
2b789108 1546 unsigned int n_elem, unsigned long timeout)
a2a7a662 1547{
9af5c9c9
TH
1548 struct ata_link *link = dev->link;
1549 struct ata_port *ap = link->ap;
a2a7a662 1550 u8 command = tf->command;
87fbc5a0 1551 int auto_timeout = 0;
a2a7a662 1552 struct ata_queued_cmd *qc;
2ab7db1f 1553 unsigned int tag, preempted_tag;
dedaf2b0 1554 u32 preempted_sactive, preempted_qc_active;
da917d69 1555 int preempted_nr_active_links;
60be6b9a 1556 DECLARE_COMPLETION_ONSTACK(wait);
a2a7a662 1557 unsigned long flags;
77853bf2 1558 unsigned int err_mask;
d95a717f 1559 int rc;
a2a7a662 1560
ba6a1308 1561 spin_lock_irqsave(ap->lock, flags);
a2a7a662 1562
e3180499 1563 /* no internal command while frozen */
b51e9e5d 1564 if (ap->pflags & ATA_PFLAG_FROZEN) {
ba6a1308 1565 spin_unlock_irqrestore(ap->lock, flags);
e3180499
TH
1566 return AC_ERR_SYSTEM;
1567 }
1568
2ab7db1f 1569 /* initialize internal qc */
a2a7a662 1570
2ab7db1f
TH
1571 /* XXX: Tag 0 is used for drivers with legacy EH as some
1572 * drivers choke if any other tag is given. This breaks
1573 * ata_tag_internal() test for those drivers. Don't use new
1574 * EH stuff without converting to it.
1575 */
1576 if (ap->ops->error_handler)
1577 tag = ATA_TAG_INTERNAL;
1578 else
1579 tag = 0;
1580
8a8bc223
TH
1581 if (test_and_set_bit(tag, &ap->qc_allocated))
1582 BUG();
f69499f4 1583 qc = __ata_qc_from_tag(ap, tag);
2ab7db1f
TH
1584
1585 qc->tag = tag;
1586 qc->scsicmd = NULL;
1587 qc->ap = ap;
1588 qc->dev = dev;
1589 ata_qc_reinit(qc);
1590
9af5c9c9
TH
1591 preempted_tag = link->active_tag;
1592 preempted_sactive = link->sactive;
dedaf2b0 1593 preempted_qc_active = ap->qc_active;
da917d69 1594 preempted_nr_active_links = ap->nr_active_links;
9af5c9c9
TH
1595 link->active_tag = ATA_TAG_POISON;
1596 link->sactive = 0;
dedaf2b0 1597 ap->qc_active = 0;
da917d69 1598 ap->nr_active_links = 0;
2ab7db1f
TH
1599
1600 /* prepare & issue qc */
a2a7a662 1601 qc->tf = *tf;
d69cf37d
TH
1602 if (cdb)
1603 memcpy(qc->cdb, cdb, ATAPI_CDB_LEN);
e61e0672 1604 qc->flags |= ATA_QCFLAG_RESULT_TF;
a2a7a662
TH
1605 qc->dma_dir = dma_dir;
1606 if (dma_dir != DMA_NONE) {
2432697b 1607 unsigned int i, buflen = 0;
87260216 1608 struct scatterlist *sg;
2432697b 1609
87260216
JA
1610 for_each_sg(sgl, sg, n_elem, i)
1611 buflen += sg->length;
2432697b 1612
87260216 1613 ata_sg_init(qc, sgl, n_elem);
49c80429 1614 qc->nbytes = buflen;
a2a7a662
TH
1615 }
1616
77853bf2 1617 qc->private_data = &wait;
a2a7a662
TH
1618 qc->complete_fn = ata_qc_complete_internal;
1619
8e0e694a 1620 ata_qc_issue(qc);
a2a7a662 1621
ba6a1308 1622 spin_unlock_irqrestore(ap->lock, flags);
a2a7a662 1623
87fbc5a0
TH
1624 if (!timeout) {
1625 if (ata_probe_timeout)
1626 timeout = ata_probe_timeout * 1000;
1627 else {
1628 timeout = ata_internal_cmd_timeout(dev, command);
1629 auto_timeout = 1;
1630 }
1631 }
2b789108 1632
c0c362b6
TH
1633 if (ap->ops->error_handler)
1634 ata_eh_release(ap);
1635
2b789108 1636 rc = wait_for_completion_timeout(&wait, msecs_to_jiffies(timeout));
d95a717f 1637
c0c362b6
TH
1638 if (ap->ops->error_handler)
1639 ata_eh_acquire(ap);
1640
c429137a 1641 ata_sff_flush_pio_task(ap);
41ade50c 1642
d95a717f 1643 if (!rc) {
ba6a1308 1644 spin_lock_irqsave(ap->lock, flags);
a2a7a662
TH
1645
1646 /* We're racing with irq here. If we lose, the
1647 * following test prevents us from completing the qc
d95a717f
TH
1648 * twice. If we win, the port is frozen and will be
1649 * cleaned up by ->post_internal_cmd().
a2a7a662 1650 */
77853bf2 1651 if (qc->flags & ATA_QCFLAG_ACTIVE) {
d95a717f
TH
1652 qc->err_mask |= AC_ERR_TIMEOUT;
1653
1654 if (ap->ops->error_handler)
1655 ata_port_freeze(ap);
1656 else
1657 ata_qc_complete(qc);
f15a1daf 1658
0dd4b21f 1659 if (ata_msg_warn(ap))
a9a79dfe
JP
1660 ata_dev_warn(dev, "qc timeout (cmd 0x%x)\n",
1661 command);
a2a7a662
TH
1662 }
1663
ba6a1308 1664 spin_unlock_irqrestore(ap->lock, flags);
a2a7a662
TH
1665 }
1666
d95a717f
TH
1667 /* do post_internal_cmd */
1668 if (ap->ops->post_internal_cmd)
1669 ap->ops->post_internal_cmd(qc);
1670
a51d644a
TH
1671 /* perform minimal error analysis */
1672 if (qc->flags & ATA_QCFLAG_FAILED) {
1673 if (qc->result_tf.command & (ATA_ERR | ATA_DF))
1674 qc->err_mask |= AC_ERR_DEV;
1675
1676 if (!qc->err_mask)
1677 qc->err_mask |= AC_ERR_OTHER;
1678
1679 if (qc->err_mask & ~AC_ERR_OTHER)
1680 qc->err_mask &= ~AC_ERR_OTHER;
d95a717f
TH
1681 }
1682
15869303 1683 /* finish up */
ba6a1308 1684 spin_lock_irqsave(ap->lock, flags);
15869303 1685
e61e0672 1686 *tf = qc->result_tf;
77853bf2
TH
1687 err_mask = qc->err_mask;
1688
1689 ata_qc_free(qc);
9af5c9c9
TH
1690 link->active_tag = preempted_tag;
1691 link->sactive = preempted_sactive;
dedaf2b0 1692 ap->qc_active = preempted_qc_active;
da917d69 1693 ap->nr_active_links = preempted_nr_active_links;
77853bf2 1694
ba6a1308 1695 spin_unlock_irqrestore(ap->lock, flags);
15869303 1696
87fbc5a0
TH
1697 if ((err_mask & AC_ERR_TIMEOUT) && auto_timeout)
1698 ata_internal_cmd_timed_out(dev, command);
1699
77853bf2 1700 return err_mask;
a2a7a662
TH
1701}
1702
2432697b 1703/**
33480a0e 1704 * ata_exec_internal - execute libata internal command
2432697b
TH
1705 * @dev: Device to which the command is sent
1706 * @tf: Taskfile registers for the command and the result
1707 * @cdb: CDB for packet command
1708 * @dma_dir: Data tranfer direction of the command
1709 * @buf: Data buffer of the command
1710 * @buflen: Length of data buffer
2b789108 1711 * @timeout: Timeout in msecs (0 for default)
2432697b
TH
1712 *
1713 * Wrapper around ata_exec_internal_sg() which takes simple
1714 * buffer instead of sg list.
1715 *
1716 * LOCKING:
1717 * None. Should be called with kernel context, might sleep.
1718 *
1719 * RETURNS:
1720 * Zero on success, AC_ERR_* mask on failure
1721 */
1722unsigned ata_exec_internal(struct ata_device *dev,
1723 struct ata_taskfile *tf, const u8 *cdb,
2b789108
TH
1724 int dma_dir, void *buf, unsigned int buflen,
1725 unsigned long timeout)
2432697b 1726{
33480a0e
TH
1727 struct scatterlist *psg = NULL, sg;
1728 unsigned int n_elem = 0;
2432697b 1729
33480a0e
TH
1730 if (dma_dir != DMA_NONE) {
1731 WARN_ON(!buf);
1732 sg_init_one(&sg, buf, buflen);
1733 psg = &sg;
1734 n_elem++;
1735 }
2432697b 1736
2b789108
TH
1737 return ata_exec_internal_sg(dev, tf, cdb, dma_dir, psg, n_elem,
1738 timeout);
2432697b
TH
1739}
1740
977e6b9f
TH
1741/**
1742 * ata_do_simple_cmd - execute simple internal command
1743 * @dev: Device to which the command is sent
1744 * @cmd: Opcode to execute
1745 *
1746 * Execute a 'simple' command, that only consists of the opcode
1747 * 'cmd' itself, without filling any other registers
1748 *
1749 * LOCKING:
1750 * Kernel thread context (may sleep).
1751 *
1752 * RETURNS:
1753 * Zero on success, AC_ERR_* mask on failure
e58eb583 1754 */
77b08fb5 1755unsigned int ata_do_simple_cmd(struct ata_device *dev, u8 cmd)
e58eb583
TH
1756{
1757 struct ata_taskfile tf;
e58eb583
TH
1758
1759 ata_tf_init(dev, &tf);
1760
1761 tf.command = cmd;
1762 tf.flags |= ATA_TFLAG_DEVICE;
1763 tf.protocol = ATA_PROT_NODATA;
1764
2b789108 1765 return ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0, 0);
e58eb583
TH
1766}
1767
1bc4ccff
AC
1768/**
1769 * ata_pio_need_iordy - check if iordy needed
1770 * @adev: ATA device
1771 *
1772 * Check if the current speed of the device requires IORDY. Used
1773 * by various controllers for chip configuration.
1774 */
1bc4ccff
AC
1775unsigned int ata_pio_need_iordy(const struct ata_device *adev)
1776{
0d9e6659
TH
1777 /* Don't set IORDY if we're preparing for reset. IORDY may
1778 * lead to controller lock up on certain controllers if the
1779 * port is not occupied. See bko#11703 for details.
1780 */
1781 if (adev->link->ap->pflags & ATA_PFLAG_RESETTING)
1782 return 0;
1783 /* Controller doesn't support IORDY. Probably a pointless
1784 * check as the caller should know this.
1785 */
9af5c9c9 1786 if (adev->link->ap->flags & ATA_FLAG_NO_IORDY)
1bc4ccff 1787 return 0;
5c18c4d2
DD
1788 /* CF spec. r4.1 Table 22 says no iordy on PIO5 and PIO6. */
1789 if (ata_id_is_cfa(adev->id)
1790 && (adev->pio_mode == XFER_PIO_5 || adev->pio_mode == XFER_PIO_6))
1791 return 0;
432729f0
AC
1792 /* PIO3 and higher it is mandatory */
1793 if (adev->pio_mode > XFER_PIO_2)
1794 return 1;
1795 /* We turn it on when possible */
1796 if (ata_id_has_iordy(adev->id))
1bc4ccff 1797 return 1;
432729f0
AC
1798 return 0;
1799}
2e9edbf8 1800
432729f0
AC
1801/**
1802 * ata_pio_mask_no_iordy - Return the non IORDY mask
1803 * @adev: ATA device
1804 *
1805 * Compute the highest mode possible if we are not using iordy. Return
1806 * -1 if no iordy mode is available.
1807 */
432729f0
AC
1808static u32 ata_pio_mask_no_iordy(const struct ata_device *adev)
1809{
1bc4ccff 1810 /* If we have no drive specific rule, then PIO 2 is non IORDY */
1bc4ccff 1811 if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE */
432729f0 1812 u16 pio = adev->id[ATA_ID_EIDE_PIO];
1bc4ccff
AC
1813 /* Is the speed faster than the drive allows non IORDY ? */
1814 if (pio) {
1815 /* This is cycle times not frequency - watch the logic! */
1816 if (pio > 240) /* PIO2 is 240nS per cycle */
432729f0
AC
1817 return 3 << ATA_SHIFT_PIO;
1818 return 7 << ATA_SHIFT_PIO;
1bc4ccff
AC
1819 }
1820 }
432729f0 1821 return 3 << ATA_SHIFT_PIO;
1bc4ccff
AC
1822}
1823
963e4975
AC
1824/**
1825 * ata_do_dev_read_id - default ID read method
1826 * @dev: device
1827 * @tf: proposed taskfile
1828 * @id: data buffer
1829 *
1830 * Issue the identify taskfile and hand back the buffer containing
1831 * identify data. For some RAID controllers and for pre ATA devices
1832 * this function is wrapped or replaced by the driver
1833 */
1834unsigned int ata_do_dev_read_id(struct ata_device *dev,
1835 struct ata_taskfile *tf, u16 *id)
1836{
1837 return ata_exec_internal(dev, tf, NULL, DMA_FROM_DEVICE,
1838 id, sizeof(id[0]) * ATA_ID_WORDS, 0);
1839}
1840
1da177e4 1841/**
49016aca 1842 * ata_dev_read_id - Read ID data from the specified device
49016aca
TH
1843 * @dev: target device
1844 * @p_class: pointer to class of the target device (may be changed)
bff04647 1845 * @flags: ATA_READID_* flags
fe635c7e 1846 * @id: buffer to read IDENTIFY data into
1da177e4 1847 *
49016aca
TH
1848 * Read ID data from the specified device. ATA_CMD_ID_ATA is
1849 * performed on ATA devices and ATA_CMD_ID_ATAPI on ATAPI
aec5c3c1
TH
1850 * devices. This function also issues ATA_CMD_INIT_DEV_PARAMS
1851 * for pre-ATA4 drives.
1da177e4 1852 *
50a99018 1853 * FIXME: ATA_CMD_ID_ATA is optional for early drives and right
2dcb407e 1854 * now we abort if we hit that case.
50a99018 1855 *
1da177e4 1856 * LOCKING:
49016aca
TH
1857 * Kernel thread context (may sleep)
1858 *
1859 * RETURNS:
1860 * 0 on success, -errno otherwise.
1da177e4 1861 */
a9beec95 1862int ata_dev_read_id(struct ata_device *dev, unsigned int *p_class,
bff04647 1863 unsigned int flags, u16 *id)
1da177e4 1864{
9af5c9c9 1865 struct ata_port *ap = dev->link->ap;
49016aca 1866 unsigned int class = *p_class;
a0123703 1867 struct ata_taskfile tf;
49016aca
TH
1868 unsigned int err_mask = 0;
1869 const char *reason;
79b42bab 1870 bool is_semb = class == ATA_DEV_SEMB;
54936f8b 1871 int may_fallback = 1, tried_spinup = 0;
49016aca 1872 int rc;
1da177e4 1873
0dd4b21f 1874 if (ata_msg_ctl(ap))
a9a79dfe 1875 ata_dev_dbg(dev, "%s: ENTER\n", __func__);
1da177e4 1876
963e4975 1877retry:
3373efd8 1878 ata_tf_init(dev, &tf);
a0123703 1879
49016aca 1880 switch (class) {
79b42bab
TH
1881 case ATA_DEV_SEMB:
1882 class = ATA_DEV_ATA; /* some hard drives report SEMB sig */
49016aca 1883 case ATA_DEV_ATA:
a0123703 1884 tf.command = ATA_CMD_ID_ATA;
49016aca
TH
1885 break;
1886 case ATA_DEV_ATAPI:
a0123703 1887 tf.command = ATA_CMD_ID_ATAPI;
49016aca
TH
1888 break;
1889 default:
1890 rc = -ENODEV;
1891 reason = "unsupported class";
1892 goto err_out;
1da177e4
LT
1893 }
1894
a0123703 1895 tf.protocol = ATA_PROT_PIO;
81afe893
TH
1896
1897 /* Some devices choke if TF registers contain garbage. Make
1898 * sure those are properly initialized.
1899 */
1900 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
1901
1902 /* Device presence detection is unreliable on some
1903 * controllers. Always poll IDENTIFY if available.
1904 */
1905 tf.flags |= ATA_TFLAG_POLLING;
1da177e4 1906
963e4975
AC
1907 if (ap->ops->read_id)
1908 err_mask = ap->ops->read_id(dev, &tf, id);
1909 else
1910 err_mask = ata_do_dev_read_id(dev, &tf, id);
1911
a0123703 1912 if (err_mask) {
800b3996 1913 if (err_mask & AC_ERR_NODEV_HINT) {
a9a79dfe 1914 ata_dev_dbg(dev, "NODEV after polling detection\n");
55a8e2c8
TH
1915 return -ENOENT;
1916 }
1917
79b42bab 1918 if (is_semb) {
a9a79dfe
JP
1919 ata_dev_info(dev,
1920 "IDENTIFY failed on device w/ SEMB sig, disabled\n");
79b42bab
TH
1921 /* SEMB is not supported yet */
1922 *p_class = ATA_DEV_SEMB_UNSUP;
1923 return 0;
1924 }
1925
1ffc151f
TH
1926 if ((err_mask == AC_ERR_DEV) && (tf.feature & ATA_ABORTED)) {
1927 /* Device or controller might have reported
1928 * the wrong device class. Give a shot at the
1929 * other IDENTIFY if the current one is
1930 * aborted by the device.
1931 */
1932 if (may_fallback) {
1933 may_fallback = 0;
1934
1935 if (class == ATA_DEV_ATA)
1936 class = ATA_DEV_ATAPI;
1937 else
1938 class = ATA_DEV_ATA;
1939 goto retry;
1940 }
1941
1942 /* Control reaches here iff the device aborted
1943 * both flavors of IDENTIFYs which happens
1944 * sometimes with phantom devices.
1945 */
a9a79dfe
JP
1946 ata_dev_dbg(dev,
1947 "both IDENTIFYs aborted, assuming NODEV\n");
1ffc151f 1948 return -ENOENT;
54936f8b
TH
1949 }
1950
49016aca
TH
1951 rc = -EIO;
1952 reason = "I/O error";
1da177e4
LT
1953 goto err_out;
1954 }
1955
43c9c591 1956 if (dev->horkage & ATA_HORKAGE_DUMP_ID) {
a9a79dfe
JP
1957 ata_dev_dbg(dev, "dumping IDENTIFY data, "
1958 "class=%d may_fallback=%d tried_spinup=%d\n",
1959 class, may_fallback, tried_spinup);
43c9c591
TH
1960 print_hex_dump(KERN_DEBUG, "", DUMP_PREFIX_OFFSET,
1961 16, 2, id, ATA_ID_WORDS * sizeof(*id), true);
1962 }
1963
54936f8b
TH
1964 /* Falling back doesn't make sense if ID data was read
1965 * successfully at least once.
1966 */
1967 may_fallback = 0;
1968
49016aca 1969 swap_buf_le16(id, ATA_ID_WORDS);
1da177e4 1970
49016aca 1971 /* sanity check */
a4f5749b 1972 rc = -EINVAL;
6070068b 1973 reason = "device reports invalid type";
a4f5749b
TH
1974
1975 if (class == ATA_DEV_ATA) {
1976 if (!ata_id_is_ata(id) && !ata_id_is_cfa(id))
1977 goto err_out;
db63a4c8
AW
1978 if (ap->host->flags & ATA_HOST_IGNORE_ATA &&
1979 ata_id_is_ata(id)) {
1980 ata_dev_dbg(dev,
1981 "host indicates ignore ATA devices, ignored\n");
1982 return -ENOENT;
1983 }
a4f5749b
TH
1984 } else {
1985 if (ata_id_is_ata(id))
1986 goto err_out;
49016aca
TH
1987 }
1988
169439c2
ML
1989 if (!tried_spinup && (id[2] == 0x37c8 || id[2] == 0x738c)) {
1990 tried_spinup = 1;
1991 /*
1992 * Drive powered-up in standby mode, and requires a specific
1993 * SET_FEATURES spin-up subcommand before it will accept
1994 * anything other than the original IDENTIFY command.
1995 */
218f3d30 1996 err_mask = ata_dev_set_feature(dev, SETFEATURES_SPINUP, 0);
fb0582f9 1997 if (err_mask && id[2] != 0x738c) {
169439c2
ML
1998 rc = -EIO;
1999 reason = "SPINUP failed";
2000 goto err_out;
2001 }
2002 /*
2003 * If the drive initially returned incomplete IDENTIFY info,
2004 * we now must reissue the IDENTIFY command.
2005 */
2006 if (id[2] == 0x37c8)
2007 goto retry;
2008 }
2009
bff04647 2010 if ((flags & ATA_READID_POSTRESET) && class == ATA_DEV_ATA) {
49016aca
TH
2011 /*
2012 * The exact sequence expected by certain pre-ATA4 drives is:
2013 * SRST RESET
50a99018
AC
2014 * IDENTIFY (optional in early ATA)
2015 * INITIALIZE DEVICE PARAMETERS (later IDE and ATA)
49016aca
TH
2016 * anything else..
2017 * Some drives were very specific about that exact sequence.
50a99018
AC
2018 *
2019 * Note that ATA4 says lba is mandatory so the second check
c9404c9c 2020 * should never trigger.
49016aca
TH
2021 */
2022 if (ata_id_major_version(id) < 4 || !ata_id_has_lba(id)) {
3373efd8 2023 err_mask = ata_dev_init_params(dev, id[3], id[6]);
49016aca
TH
2024 if (err_mask) {
2025 rc = -EIO;
2026 reason = "INIT_DEV_PARAMS failed";
2027 goto err_out;
2028 }
2029
2030 /* current CHS translation info (id[53-58]) might be
2031 * changed. reread the identify device info.
2032 */
bff04647 2033 flags &= ~ATA_READID_POSTRESET;
49016aca
TH
2034 goto retry;
2035 }
2036 }
2037
2038 *p_class = class;
fe635c7e 2039
49016aca
TH
2040 return 0;
2041
2042 err_out:
88574551 2043 if (ata_msg_warn(ap))
a9a79dfe
JP
2044 ata_dev_warn(dev, "failed to IDENTIFY (%s, err_mask=0x%x)\n",
2045 reason, err_mask);
49016aca
TH
2046 return rc;
2047}
2048
9062712f
TH
2049static int ata_do_link_spd_horkage(struct ata_device *dev)
2050{
2051 struct ata_link *plink = ata_dev_phys_link(dev);
2052 u32 target, target_limit;
2053
2054 if (!sata_scr_valid(plink))
2055 return 0;
2056
2057 if (dev->horkage & ATA_HORKAGE_1_5_GBPS)
2058 target = 1;
2059 else
2060 return 0;
2061
2062 target_limit = (1 << target) - 1;
2063
2064 /* if already on stricter limit, no need to push further */
2065 if (plink->sata_spd_limit <= target_limit)
2066 return 0;
2067
2068 plink->sata_spd_limit = target_limit;
2069
2070 /* Request another EH round by returning -EAGAIN if link is
2071 * going faster than the target speed. Forward progress is
2072 * guaranteed by setting sata_spd_limit to target_limit above.
2073 */
2074 if (plink->sata_spd > target) {
a9a79dfe
JP
2075 ata_dev_info(dev, "applying link speed limit horkage to %s\n",
2076 sata_spd_string(target));
9062712f
TH
2077 return -EAGAIN;
2078 }
2079 return 0;
2080}
2081
3373efd8 2082static inline u8 ata_dev_knobble(struct ata_device *dev)
4b2f3ede 2083{
9af5c9c9 2084 struct ata_port *ap = dev->link->ap;
9ce8e307
JA
2085
2086 if (ata_dev_blacklisted(dev) & ATA_HORKAGE_BRIDGE_OK)
2087 return 0;
2088
9af5c9c9 2089 return ((ap->cbl == ATA_CBL_SATA) && (!ata_id_is_sata(dev->id)));
4b2f3ede
TH
2090}
2091
388539f3 2092static int ata_dev_config_ncq(struct ata_device *dev,
a6e6ce8e
TH
2093 char *desc, size_t desc_sz)
2094{
9af5c9c9 2095 struct ata_port *ap = dev->link->ap;
a6e6ce8e 2096 int hdepth = 0, ddepth = ata_id_queue_depth(dev->id);
388539f3
SL
2097 unsigned int err_mask;
2098 char *aa_desc = "";
a6e6ce8e
TH
2099
2100 if (!ata_id_has_ncq(dev->id)) {
2101 desc[0] = '\0';
388539f3 2102 return 0;
a6e6ce8e 2103 }
75683fe7 2104 if (dev->horkage & ATA_HORKAGE_NONCQ) {
6919a0a6 2105 snprintf(desc, desc_sz, "NCQ (not used)");
388539f3 2106 return 0;
6919a0a6 2107 }
a6e6ce8e 2108 if (ap->flags & ATA_FLAG_NCQ) {
cca3974e 2109 hdepth = min(ap->scsi_host->can_queue, ATA_MAX_QUEUE - 1);
a6e6ce8e
TH
2110 dev->flags |= ATA_DFLAG_NCQ;
2111 }
2112
388539f3
SL
2113 if (!(dev->horkage & ATA_HORKAGE_BROKEN_FPDMA_AA) &&
2114 (ap->flags & ATA_FLAG_FPDMA_AA) &&
2115 ata_id_has_fpdma_aa(dev->id)) {
2116 err_mask = ata_dev_set_feature(dev, SETFEATURES_SATA_ENABLE,
2117 SATA_FPDMA_AA);
2118 if (err_mask) {
a9a79dfe
JP
2119 ata_dev_err(dev,
2120 "failed to enable AA (error_mask=0x%x)\n",
2121 err_mask);
388539f3
SL
2122 if (err_mask != AC_ERR_DEV) {
2123 dev->horkage |= ATA_HORKAGE_BROKEN_FPDMA_AA;
2124 return -EIO;
2125 }
2126 } else
2127 aa_desc = ", AA";
2128 }
2129
a6e6ce8e 2130 if (hdepth >= ddepth)
388539f3 2131 snprintf(desc, desc_sz, "NCQ (depth %d)%s", ddepth, aa_desc);
a6e6ce8e 2132 else
388539f3
SL
2133 snprintf(desc, desc_sz, "NCQ (depth %d/%d)%s", hdepth,
2134 ddepth, aa_desc);
2135 return 0;
a6e6ce8e
TH
2136}
2137
49016aca 2138/**
ffeae418 2139 * ata_dev_configure - Configure the specified ATA/ATAPI device
ffeae418
TH
2140 * @dev: Target device to configure
2141 *
2142 * Configure @dev according to @dev->id. Generic and low-level
2143 * driver specific fixups are also applied.
49016aca
TH
2144 *
2145 * LOCKING:
ffeae418
TH
2146 * Kernel thread context (may sleep)
2147 *
2148 * RETURNS:
2149 * 0 on success, -errno otherwise
49016aca 2150 */
efdaedc4 2151int ata_dev_configure(struct ata_device *dev)
49016aca 2152{
9af5c9c9
TH
2153 struct ata_port *ap = dev->link->ap;
2154 struct ata_eh_context *ehc = &dev->link->eh_context;
6746544c 2155 int print_info = ehc->i.flags & ATA_EHI_PRINTINFO;
1148c3a7 2156 const u16 *id = dev->id;
7dc951ae 2157 unsigned long xfer_mask;
65fe1f0f 2158 unsigned int err_mask;
b352e57d 2159 char revbuf[7]; /* XYZ-99\0 */
3f64f565
EM
2160 char fwrevbuf[ATA_ID_FW_REV_LEN+1];
2161 char modelbuf[ATA_ID_PROD_LEN+1];
e6d902a3 2162 int rc;
49016aca 2163
0dd4b21f 2164 if (!ata_dev_enabled(dev) && ata_msg_info(ap)) {
a9a79dfe 2165 ata_dev_info(dev, "%s: ENTER/EXIT -- nodev\n", __func__);
ffeae418 2166 return 0;
49016aca
TH
2167 }
2168
0dd4b21f 2169 if (ata_msg_probe(ap))
a9a79dfe 2170 ata_dev_dbg(dev, "%s: ENTER\n", __func__);
1da177e4 2171
75683fe7
TH
2172 /* set horkage */
2173 dev->horkage |= ata_dev_blacklisted(dev);
33267325 2174 ata_force_horkage(dev);
75683fe7 2175
50af2fa1 2176 if (dev->horkage & ATA_HORKAGE_DISABLE) {
a9a79dfe 2177 ata_dev_info(dev, "unsupported device, disabling\n");
50af2fa1
TH
2178 ata_dev_disable(dev);
2179 return 0;
2180 }
2181
2486fa56
TH
2182 if ((!atapi_enabled || (ap->flags & ATA_FLAG_NO_ATAPI)) &&
2183 dev->class == ATA_DEV_ATAPI) {
a9a79dfe
JP
2184 ata_dev_warn(dev, "WARNING: ATAPI is %s, device ignored\n",
2185 atapi_enabled ? "not supported with this driver"
2186 : "disabled");
2486fa56
TH
2187 ata_dev_disable(dev);
2188 return 0;
2189 }
2190
9062712f
TH
2191 rc = ata_do_link_spd_horkage(dev);
2192 if (rc)
2193 return rc;
2194
6746544c
TH
2195 /* let ACPI work its magic */
2196 rc = ata_acpi_on_devcfg(dev);
2197 if (rc)
2198 return rc;
08573a86 2199
05027adc
TH
2200 /* massage HPA, do it early as it might change IDENTIFY data */
2201 rc = ata_hpa_resize(dev);
2202 if (rc)
2203 return rc;
2204
c39f5ebe 2205 /* print device capabilities */
0dd4b21f 2206 if (ata_msg_probe(ap))
a9a79dfe
JP
2207 ata_dev_dbg(dev,
2208 "%s: cfg 49:%04x 82:%04x 83:%04x 84:%04x "
2209 "85:%04x 86:%04x 87:%04x 88:%04x\n",
2210 __func__,
2211 id[49], id[82], id[83], id[84],
2212 id[85], id[86], id[87], id[88]);
c39f5ebe 2213
208a9933 2214 /* initialize to-be-configured parameters */
ea1dd4e1 2215 dev->flags &= ~ATA_DFLAG_CFG_MASK;
208a9933
TH
2216 dev->max_sectors = 0;
2217 dev->cdb_len = 0;
2218 dev->n_sectors = 0;
2219 dev->cylinders = 0;
2220 dev->heads = 0;
2221 dev->sectors = 0;
e18086d6 2222 dev->multi_count = 0;
208a9933 2223
1da177e4
LT
2224 /*
2225 * common ATA, ATAPI feature tests
2226 */
2227
ff8854b2 2228 /* find max transfer mode; for printk only */
1148c3a7 2229 xfer_mask = ata_id_xfermask(id);
1da177e4 2230
0dd4b21f
BP
2231 if (ata_msg_probe(ap))
2232 ata_dump_id(id);
1da177e4 2233
ef143d57
AL
2234 /* SCSI only uses 4-char revisions, dump full 8 chars from ATA */
2235 ata_id_c_string(dev->id, fwrevbuf, ATA_ID_FW_REV,
2236 sizeof(fwrevbuf));
2237
2238 ata_id_c_string(dev->id, modelbuf, ATA_ID_PROD,
2239 sizeof(modelbuf));
2240
1da177e4
LT
2241 /* ATA-specific feature tests */
2242 if (dev->class == ATA_DEV_ATA) {
b352e57d 2243 if (ata_id_is_cfa(id)) {
62afe5d7
SS
2244 /* CPRM may make this media unusable */
2245 if (id[ATA_ID_CFA_KEY_MGMT] & 1)
a9a79dfe
JP
2246 ata_dev_warn(dev,
2247 "supports DRM functions and may not be fully accessible\n");
b352e57d 2248 snprintf(revbuf, 7, "CFA");
ae8d4ee7 2249 } else {
2dcb407e 2250 snprintf(revbuf, 7, "ATA-%d", ata_id_major_version(id));
ae8d4ee7
AC
2251 /* Warn the user if the device has TPM extensions */
2252 if (ata_id_has_tpm(id))
a9a79dfe
JP
2253 ata_dev_warn(dev,
2254 "supports DRM functions and may not be fully accessible\n");
ae8d4ee7 2255 }
b352e57d 2256
1148c3a7 2257 dev->n_sectors = ata_id_n_sectors(id);
2940740b 2258
e18086d6
ML
2259 /* get current R/W Multiple count setting */
2260 if ((dev->id[47] >> 8) == 0x80 && (dev->id[59] & 0x100)) {
2261 unsigned int max = dev->id[47] & 0xff;
2262 unsigned int cnt = dev->id[59] & 0xff;
2263 /* only recognize/allow powers of two here */
2264 if (is_power_of_2(max) && is_power_of_2(cnt))
2265 if (cnt <= max)
2266 dev->multi_count = cnt;
2267 }
3f64f565 2268
1148c3a7 2269 if (ata_id_has_lba(id)) {
4c2d721a 2270 const char *lba_desc;
388539f3 2271 char ncq_desc[24];
8bf62ece 2272
4c2d721a
TH
2273 lba_desc = "LBA";
2274 dev->flags |= ATA_DFLAG_LBA;
1148c3a7 2275 if (ata_id_has_lba48(id)) {
8bf62ece 2276 dev->flags |= ATA_DFLAG_LBA48;
4c2d721a 2277 lba_desc = "LBA48";
6fc49adb
TH
2278
2279 if (dev->n_sectors >= (1UL << 28) &&
2280 ata_id_has_flush_ext(id))
2281 dev->flags |= ATA_DFLAG_FLUSH_EXT;
4c2d721a 2282 }
8bf62ece 2283
a6e6ce8e 2284 /* config NCQ */
388539f3
SL
2285 rc = ata_dev_config_ncq(dev, ncq_desc, sizeof(ncq_desc));
2286 if (rc)
2287 return rc;
a6e6ce8e 2288
8bf62ece 2289 /* print device info to dmesg */
3f64f565 2290 if (ata_msg_drv(ap) && print_info) {
a9a79dfe
JP
2291 ata_dev_info(dev, "%s: %s, %s, max %s\n",
2292 revbuf, modelbuf, fwrevbuf,
2293 ata_mode_string(xfer_mask));
2294 ata_dev_info(dev,
2295 "%llu sectors, multi %u: %s %s\n",
f15a1daf 2296 (unsigned long long)dev->n_sectors,
3f64f565
EM
2297 dev->multi_count, lba_desc, ncq_desc);
2298 }
ffeae418 2299 } else {
8bf62ece
AL
2300 /* CHS */
2301
2302 /* Default translation */
1148c3a7
TH
2303 dev->cylinders = id[1];
2304 dev->heads = id[3];
2305 dev->sectors = id[6];
8bf62ece 2306
1148c3a7 2307 if (ata_id_current_chs_valid(id)) {
8bf62ece 2308 /* Current CHS translation is valid. */
1148c3a7
TH
2309 dev->cylinders = id[54];
2310 dev->heads = id[55];
2311 dev->sectors = id[56];
8bf62ece
AL
2312 }
2313
2314 /* print device info to dmesg */
3f64f565 2315 if (ata_msg_drv(ap) && print_info) {
a9a79dfe
JP
2316 ata_dev_info(dev, "%s: %s, %s, max %s\n",
2317 revbuf, modelbuf, fwrevbuf,
2318 ata_mode_string(xfer_mask));
2319 ata_dev_info(dev,
2320 "%llu sectors, multi %u, CHS %u/%u/%u\n",
2321 (unsigned long long)dev->n_sectors,
2322 dev->multi_count, dev->cylinders,
2323 dev->heads, dev->sectors);
3f64f565 2324 }
07f6f7d0
AL
2325 }
2326
65fe1f0f
SH
2327 /* check and mark DevSlp capability */
2328 if (ata_id_has_devslp(dev->id))
2329 dev->flags |= ATA_DFLAG_DEVSLP;
2330
2331 /* Obtain SATA Settings page from Identify Device Data Log,
2332 * which contains DevSlp timing variables etc.
65fe1f0f 2333 */
de90cd71 2334 if (ata_id_has_hw_feature_ctrl(dev->id)) {
65fe1f0f
SH
2335 err_mask = ata_read_log_page(dev,
2336 ATA_LOG_SATA_ID_DEV_DATA,
2337 ATA_LOG_SATA_SETTINGS,
2338 dev->sata_settings,
2339 1);
2340 if (err_mask)
2341 ata_dev_dbg(dev,
2342 "failed to get Identify Device Data, Emask 0x%x\n",
2343 err_mask);
2344 }
2345
6e7846e9 2346 dev->cdb_len = 16;
1da177e4
LT
2347 }
2348
2349 /* ATAPI-specific feature tests */
2c13b7ce 2350 else if (dev->class == ATA_DEV_ATAPI) {
854c73a2
TH
2351 const char *cdb_intr_string = "";
2352 const char *atapi_an_string = "";
91163006 2353 const char *dma_dir_string = "";
7d77b247 2354 u32 sntf;
08a556db 2355
1148c3a7 2356 rc = atapi_cdb_len(id);
1da177e4 2357 if ((rc < 12) || (rc > ATAPI_CDB_LEN)) {
0dd4b21f 2358 if (ata_msg_warn(ap))
a9a79dfe 2359 ata_dev_warn(dev, "unsupported CDB len\n");
ffeae418 2360 rc = -EINVAL;
1da177e4
LT
2361 goto err_out_nosup;
2362 }
6e7846e9 2363 dev->cdb_len = (unsigned int) rc;
1da177e4 2364
7d77b247
TH
2365 /* Enable ATAPI AN if both the host and device have
2366 * the support. If PMP is attached, SNTF is required
2367 * to enable ATAPI AN to discern between PHY status
2368 * changed notifications and ATAPI ANs.
9f45cbd3 2369 */
e7ecd435
TH
2370 if (atapi_an &&
2371 (ap->flags & ATA_FLAG_AN) && ata_id_has_atapi_AN(id) &&
071f44b1 2372 (!sata_pmp_attached(ap) ||
7d77b247 2373 sata_scr_read(&ap->link, SCR_NOTIFICATION, &sntf) == 0)) {
9f45cbd3 2374 /* issue SET feature command to turn this on */
218f3d30
JG
2375 err_mask = ata_dev_set_feature(dev,
2376 SETFEATURES_SATA_ENABLE, SATA_AN);
854c73a2 2377 if (err_mask)
a9a79dfe
JP
2378 ata_dev_err(dev,
2379 "failed to enable ATAPI AN (err_mask=0x%x)\n",
2380 err_mask);
854c73a2 2381 else {
9f45cbd3 2382 dev->flags |= ATA_DFLAG_AN;
854c73a2
TH
2383 atapi_an_string = ", ATAPI AN";
2384 }
9f45cbd3
KCA
2385 }
2386
08a556db 2387 if (ata_id_cdb_intr(dev->id)) {
312f7da2 2388 dev->flags |= ATA_DFLAG_CDB_INTR;
08a556db
AL
2389 cdb_intr_string = ", CDB intr";
2390 }
312f7da2 2391
91163006
TH
2392 if (atapi_dmadir || atapi_id_dmadir(dev->id)) {
2393 dev->flags |= ATA_DFLAG_DMADIR;
2394 dma_dir_string = ", DMADIR";
2395 }
2396
b1354cbb
LM
2397 if (ata_id_has_da(dev->id))
2398 dev->flags |= ATA_DFLAG_DA;
2399
1da177e4 2400 /* print device info to dmesg */
5afc8142 2401 if (ata_msg_drv(ap) && print_info)
a9a79dfe
JP
2402 ata_dev_info(dev,
2403 "ATAPI: %s, %s, max %s%s%s%s\n",
2404 modelbuf, fwrevbuf,
2405 ata_mode_string(xfer_mask),
2406 cdb_intr_string, atapi_an_string,
2407 dma_dir_string);
1da177e4
LT
2408 }
2409
914ed354
TH
2410 /* determine max_sectors */
2411 dev->max_sectors = ATA_MAX_SECTORS;
2412 if (dev->flags & ATA_DFLAG_LBA48)
2413 dev->max_sectors = ATA_MAX_SECTORS_LBA48;
2414
c5038fc0
AC
2415 /* Limit PATA drive on SATA cable bridge transfers to udma5,
2416 200 sectors */
3373efd8 2417 if (ata_dev_knobble(dev)) {
5afc8142 2418 if (ata_msg_drv(ap) && print_info)
a9a79dfe 2419 ata_dev_info(dev, "applying bridge limits\n");
5a529139 2420 dev->udma_mask &= ATA_UDMA5;
4b2f3ede
TH
2421 dev->max_sectors = ATA_MAX_SECTORS;
2422 }
2423
f8d8e579 2424 if ((dev->class == ATA_DEV_ATAPI) &&
f442cd86 2425 (atapi_command_packet_set(id) == TYPE_TAPE)) {
f8d8e579 2426 dev->max_sectors = ATA_MAX_SECTORS_TAPE;
f442cd86
AL
2427 dev->horkage |= ATA_HORKAGE_STUCK_ERR;
2428 }
f8d8e579 2429
75683fe7 2430 if (dev->horkage & ATA_HORKAGE_MAX_SEC_128)
03ec52de
TH
2431 dev->max_sectors = min_t(unsigned int, ATA_MAX_SECTORS_128,
2432 dev->max_sectors);
18d6e9d5 2433
4b2f3ede 2434 if (ap->ops->dev_config)
cd0d3bbc 2435 ap->ops->dev_config(dev);
4b2f3ede 2436
c5038fc0
AC
2437 if (dev->horkage & ATA_HORKAGE_DIAGNOSTIC) {
2438 /* Let the user know. We don't want to disallow opens for
2439 rescue purposes, or in case the vendor is just a blithering
2440 idiot. Do this after the dev_config call as some controllers
2441 with buggy firmware may want to avoid reporting false device
2442 bugs */
2443
2444 if (print_info) {
a9a79dfe 2445 ata_dev_warn(dev,
c5038fc0 2446"Drive reports diagnostics failure. This may indicate a drive\n");
a9a79dfe 2447 ata_dev_warn(dev,
c5038fc0
AC
2448"fault or invalid emulation. Contact drive vendor for information.\n");
2449 }
2450 }
2451
ac70a964 2452 if ((dev->horkage & ATA_HORKAGE_FIRMWARE_WARN) && print_info) {
a9a79dfe
JP
2453 ata_dev_warn(dev, "WARNING: device requires firmware update to be fully functional\n");
2454 ata_dev_warn(dev, " contact the vendor or visit http://ata.wiki.kernel.org\n");
ac70a964
TH
2455 }
2456
ffeae418 2457 return 0;
1da177e4
LT
2458
2459err_out_nosup:
0dd4b21f 2460 if (ata_msg_probe(ap))
a9a79dfe 2461 ata_dev_dbg(dev, "%s: EXIT, err\n", __func__);
ffeae418 2462 return rc;
1da177e4
LT
2463}
2464
be0d18df 2465/**
2e41e8e6 2466 * ata_cable_40wire - return 40 wire cable type
be0d18df
AC
2467 * @ap: port
2468 *
2e41e8e6 2469 * Helper method for drivers which want to hardwire 40 wire cable
be0d18df
AC
2470 * detection.
2471 */
2472
2473int ata_cable_40wire(struct ata_port *ap)
2474{
2475 return ATA_CBL_PATA40;
2476}
2477
2478/**
2e41e8e6 2479 * ata_cable_80wire - return 80 wire cable type
be0d18df
AC
2480 * @ap: port
2481 *
2e41e8e6 2482 * Helper method for drivers which want to hardwire 80 wire cable
be0d18df
AC
2483 * detection.
2484 */
2485
2486int ata_cable_80wire(struct ata_port *ap)
2487{
2488 return ATA_CBL_PATA80;
2489}
2490
2491/**
2492 * ata_cable_unknown - return unknown PATA cable.
2493 * @ap: port
2494 *
2495 * Helper method for drivers which have no PATA cable detection.
2496 */
2497
2498int ata_cable_unknown(struct ata_port *ap)
2499{
2500 return ATA_CBL_PATA_UNK;
2501}
2502
c88f90c3
TH
2503/**
2504 * ata_cable_ignore - return ignored PATA cable.
2505 * @ap: port
2506 *
2507 * Helper method for drivers which don't use cable type to limit
2508 * transfer mode.
2509 */
2510int ata_cable_ignore(struct ata_port *ap)
2511{
2512 return ATA_CBL_PATA_IGN;
2513}
2514
be0d18df
AC
2515/**
2516 * ata_cable_sata - return SATA cable type
2517 * @ap: port
2518 *
2519 * Helper method for drivers which have SATA cables
2520 */
2521
2522int ata_cable_sata(struct ata_port *ap)
2523{
2524 return ATA_CBL_SATA;
2525}
2526
1da177e4
LT
2527/**
2528 * ata_bus_probe - Reset and probe ATA bus
2529 * @ap: Bus to probe
2530 *
0cba632b
JG
2531 * Master ATA bus probing function. Initiates a hardware-dependent
2532 * bus reset, then attempts to identify any devices found on
2533 * the bus.
2534 *
1da177e4 2535 * LOCKING:
0cba632b 2536 * PCI/etc. bus probe sem.
1da177e4
LT
2537 *
2538 * RETURNS:
96072e69 2539 * Zero on success, negative errno otherwise.
1da177e4
LT
2540 */
2541
80289167 2542int ata_bus_probe(struct ata_port *ap)
1da177e4 2543{
28ca5c57 2544 unsigned int classes[ATA_MAX_DEVICES];
14d2bac1 2545 int tries[ATA_MAX_DEVICES];
f58229f8 2546 int rc;
e82cbdb9 2547 struct ata_device *dev;
1da177e4 2548
1eca4365 2549 ata_for_each_dev(dev, &ap->link, ALL)
f58229f8 2550 tries[dev->devno] = ATA_PROBE_MAX_TRIES;
14d2bac1
TH
2551
2552 retry:
1eca4365 2553 ata_for_each_dev(dev, &ap->link, ALL) {
cdeab114
TH
2554 /* If we issue an SRST then an ATA drive (not ATAPI)
2555 * may change configuration and be in PIO0 timing. If
2556 * we do a hard reset (or are coming from power on)
2557 * this is true for ATA or ATAPI. Until we've set a
2558 * suitable controller mode we should not touch the
2559 * bus as we may be talking too fast.
2560 */
2561 dev->pio_mode = XFER_PIO_0;
2562
2563 /* If the controller has a pio mode setup function
2564 * then use it to set the chipset to rights. Don't
2565 * touch the DMA setup as that will be dealt with when
2566 * configuring devices.
2567 */
2568 if (ap->ops->set_piomode)
2569 ap->ops->set_piomode(ap, dev);
2570 }
2571
2044470c 2572 /* reset and determine device classes */
52783c5d 2573 ap->ops->phy_reset(ap);
2061a47a 2574
1eca4365 2575 ata_for_each_dev(dev, &ap->link, ALL) {
3e4ec344 2576 if (dev->class != ATA_DEV_UNKNOWN)
52783c5d
TH
2577 classes[dev->devno] = dev->class;
2578 else
2579 classes[dev->devno] = ATA_DEV_NONE;
2044470c 2580
52783c5d 2581 dev->class = ATA_DEV_UNKNOWN;
28ca5c57 2582 }
1da177e4 2583
f31f0cc2
JG
2584 /* read IDENTIFY page and configure devices. We have to do the identify
2585 specific sequence bass-ackwards so that PDIAG- is released by
2586 the slave device */
2587
1eca4365 2588 ata_for_each_dev(dev, &ap->link, ALL_REVERSE) {
f58229f8
TH
2589 if (tries[dev->devno])
2590 dev->class = classes[dev->devno];
ffeae418 2591
14d2bac1 2592 if (!ata_dev_enabled(dev))
ffeae418 2593 continue;
ffeae418 2594
bff04647
TH
2595 rc = ata_dev_read_id(dev, &dev->class, ATA_READID_POSTRESET,
2596 dev->id);
14d2bac1
TH
2597 if (rc)
2598 goto fail;
f31f0cc2
JG
2599 }
2600
be0d18df
AC
2601 /* Now ask for the cable type as PDIAG- should have been released */
2602 if (ap->ops->cable_detect)
2603 ap->cbl = ap->ops->cable_detect(ap);
2604
1eca4365
TH
2605 /* We may have SATA bridge glue hiding here irrespective of
2606 * the reported cable types and sensed types. When SATA
2607 * drives indicate we have a bridge, we don't know which end
2608 * of the link the bridge is which is a problem.
2609 */
2610 ata_for_each_dev(dev, &ap->link, ENABLED)
614fe29b
AC
2611 if (ata_id_is_sata(dev->id))
2612 ap->cbl = ATA_CBL_SATA;
614fe29b 2613
f31f0cc2
JG
2614 /* After the identify sequence we can now set up the devices. We do
2615 this in the normal order so that the user doesn't get confused */
2616
1eca4365 2617 ata_for_each_dev(dev, &ap->link, ENABLED) {
9af5c9c9 2618 ap->link.eh_context.i.flags |= ATA_EHI_PRINTINFO;
efdaedc4 2619 rc = ata_dev_configure(dev);
9af5c9c9 2620 ap->link.eh_context.i.flags &= ~ATA_EHI_PRINTINFO;
14d2bac1
TH
2621 if (rc)
2622 goto fail;
1da177e4
LT
2623 }
2624
e82cbdb9 2625 /* configure transfer mode */
0260731f 2626 rc = ata_set_mode(&ap->link, &dev);
4ae72a1e 2627 if (rc)
51713d35 2628 goto fail;
1da177e4 2629
1eca4365
TH
2630 ata_for_each_dev(dev, &ap->link, ENABLED)
2631 return 0;
1da177e4 2632
96072e69 2633 return -ENODEV;
14d2bac1
TH
2634
2635 fail:
4ae72a1e
TH
2636 tries[dev->devno]--;
2637
14d2bac1
TH
2638 switch (rc) {
2639 case -EINVAL:
4ae72a1e 2640 /* eeek, something went very wrong, give up */
14d2bac1
TH
2641 tries[dev->devno] = 0;
2642 break;
4ae72a1e
TH
2643
2644 case -ENODEV:
2645 /* give it just one more chance */
2646 tries[dev->devno] = min(tries[dev->devno], 1);
14d2bac1 2647 case -EIO:
4ae72a1e
TH
2648 if (tries[dev->devno] == 1) {
2649 /* This is the last chance, better to slow
2650 * down than lose it.
2651 */
a07d499b 2652 sata_down_spd_limit(&ap->link, 0);
4ae72a1e
TH
2653 ata_down_xfermask_limit(dev, ATA_DNXFER_PIO);
2654 }
14d2bac1
TH
2655 }
2656
4ae72a1e 2657 if (!tries[dev->devno])
3373efd8 2658 ata_dev_disable(dev);
ec573755 2659
14d2bac1 2660 goto retry;
1da177e4
LT
2661}
2662
3be680b7
TH
2663/**
2664 * sata_print_link_status - Print SATA link status
936fd732 2665 * @link: SATA link to printk link status about
3be680b7
TH
2666 *
2667 * This function prints link speed and status of a SATA link.
2668 *
2669 * LOCKING:
2670 * None.
2671 */
6bdb4fc9 2672static void sata_print_link_status(struct ata_link *link)
3be680b7 2673{
6d5f9732 2674 u32 sstatus, scontrol, tmp;
3be680b7 2675
936fd732 2676 if (sata_scr_read(link, SCR_STATUS, &sstatus))
3be680b7 2677 return;
936fd732 2678 sata_scr_read(link, SCR_CONTROL, &scontrol);
3be680b7 2679
b1c72916 2680 if (ata_phys_link_online(link)) {
3be680b7 2681 tmp = (sstatus >> 4) & 0xf;
a9a79dfe
JP
2682 ata_link_info(link, "SATA link up %s (SStatus %X SControl %X)\n",
2683 sata_spd_string(tmp), sstatus, scontrol);
3be680b7 2684 } else {
a9a79dfe
JP
2685 ata_link_info(link, "SATA link down (SStatus %X SControl %X)\n",
2686 sstatus, scontrol);
3be680b7
TH
2687 }
2688}
2689
ebdfca6e
AC
2690/**
2691 * ata_dev_pair - return other device on cable
ebdfca6e
AC
2692 * @adev: device
2693 *
2694 * Obtain the other device on the same cable, or if none is
2695 * present NULL is returned
2696 */
2e9edbf8 2697
3373efd8 2698struct ata_device *ata_dev_pair(struct ata_device *adev)
ebdfca6e 2699{
9af5c9c9
TH
2700 struct ata_link *link = adev->link;
2701 struct ata_device *pair = &link->device[1 - adev->devno];
e1211e3f 2702 if (!ata_dev_enabled(pair))
ebdfca6e
AC
2703 return NULL;
2704 return pair;
2705}
2706
1c3fae4d 2707/**
3c567b7d 2708 * sata_down_spd_limit - adjust SATA spd limit downward
936fd732 2709 * @link: Link to adjust SATA spd limit for
a07d499b 2710 * @spd_limit: Additional limit
1c3fae4d 2711 *
936fd732 2712 * Adjust SATA spd limit of @link downward. Note that this
1c3fae4d 2713 * function only adjusts the limit. The change must be applied
3c567b7d 2714 * using sata_set_spd().
1c3fae4d 2715 *
a07d499b
TH
2716 * If @spd_limit is non-zero, the speed is limited to equal to or
2717 * lower than @spd_limit if such speed is supported. If
2718 * @spd_limit is slower than any supported speed, only the lowest
2719 * supported speed is allowed.
2720 *
1c3fae4d
TH
2721 * LOCKING:
2722 * Inherited from caller.
2723 *
2724 * RETURNS:
2725 * 0 on success, negative errno on failure
2726 */
a07d499b 2727int sata_down_spd_limit(struct ata_link *link, u32 spd_limit)
1c3fae4d 2728{
81952c54 2729 u32 sstatus, spd, mask;
a07d499b 2730 int rc, bit;
1c3fae4d 2731
936fd732 2732 if (!sata_scr_valid(link))
008a7896
TH
2733 return -EOPNOTSUPP;
2734
2735 /* If SCR can be read, use it to determine the current SPD.
936fd732 2736 * If not, use cached value in link->sata_spd.
008a7896 2737 */
936fd732 2738 rc = sata_scr_read(link, SCR_STATUS, &sstatus);
9913ff8a 2739 if (rc == 0 && ata_sstatus_online(sstatus))
008a7896
TH
2740 spd = (sstatus >> 4) & 0xf;
2741 else
936fd732 2742 spd = link->sata_spd;
1c3fae4d 2743
936fd732 2744 mask = link->sata_spd_limit;
1c3fae4d
TH
2745 if (mask <= 1)
2746 return -EINVAL;
008a7896
TH
2747
2748 /* unconditionally mask off the highest bit */
a07d499b
TH
2749 bit = fls(mask) - 1;
2750 mask &= ~(1 << bit);
1c3fae4d 2751
008a7896
TH
2752 /* Mask off all speeds higher than or equal to the current
2753 * one. Force 1.5Gbps if current SPD is not available.
2754 */
2755 if (spd > 1)
2756 mask &= (1 << (spd - 1)) - 1;
2757 else
2758 mask &= 1;
2759
2760 /* were we already at the bottom? */
1c3fae4d
TH
2761 if (!mask)
2762 return -EINVAL;
2763
a07d499b
TH
2764 if (spd_limit) {
2765 if (mask & ((1 << spd_limit) - 1))
2766 mask &= (1 << spd_limit) - 1;
2767 else {
2768 bit = ffs(mask) - 1;
2769 mask = 1 << bit;
2770 }
2771 }
2772
936fd732 2773 link->sata_spd_limit = mask;
1c3fae4d 2774
a9a79dfe
JP
2775 ata_link_warn(link, "limiting SATA link speed to %s\n",
2776 sata_spd_string(fls(mask)));
1c3fae4d
TH
2777
2778 return 0;
2779}
2780
936fd732 2781static int __sata_set_spd_needed(struct ata_link *link, u32 *scontrol)
1c3fae4d 2782{
5270222f
TH
2783 struct ata_link *host_link = &link->ap->link;
2784 u32 limit, target, spd;
1c3fae4d 2785
5270222f
TH
2786 limit = link->sata_spd_limit;
2787
2788 /* Don't configure downstream link faster than upstream link.
2789 * It doesn't speed up anything and some PMPs choke on such
2790 * configuration.
2791 */
2792 if (!ata_is_host_link(link) && host_link->sata_spd)
2793 limit &= (1 << host_link->sata_spd) - 1;
2794
2795 if (limit == UINT_MAX)
2796 target = 0;
1c3fae4d 2797 else
5270222f 2798 target = fls(limit);
1c3fae4d
TH
2799
2800 spd = (*scontrol >> 4) & 0xf;
5270222f 2801 *scontrol = (*scontrol & ~0xf0) | ((target & 0xf) << 4);
1c3fae4d 2802
5270222f 2803 return spd != target;
1c3fae4d
TH
2804}
2805
2806/**
3c567b7d 2807 * sata_set_spd_needed - is SATA spd configuration needed
936fd732 2808 * @link: Link in question
1c3fae4d
TH
2809 *
2810 * Test whether the spd limit in SControl matches
936fd732 2811 * @link->sata_spd_limit. This function is used to determine
1c3fae4d
TH
2812 * whether hardreset is necessary to apply SATA spd
2813 * configuration.
2814 *
2815 * LOCKING:
2816 * Inherited from caller.
2817 *
2818 * RETURNS:
2819 * 1 if SATA spd configuration is needed, 0 otherwise.
2820 */
1dc55e87 2821static int sata_set_spd_needed(struct ata_link *link)
1c3fae4d
TH
2822{
2823 u32 scontrol;
2824
936fd732 2825 if (sata_scr_read(link, SCR_CONTROL, &scontrol))
db64bcf3 2826 return 1;
1c3fae4d 2827
936fd732 2828 return __sata_set_spd_needed(link, &scontrol);
1c3fae4d
TH
2829}
2830
2831/**
3c567b7d 2832 * sata_set_spd - set SATA spd according to spd limit
936fd732 2833 * @link: Link to set SATA spd for
1c3fae4d 2834 *
936fd732 2835 * Set SATA spd of @link according to sata_spd_limit.
1c3fae4d
TH
2836 *
2837 * LOCKING:
2838 * Inherited from caller.
2839 *
2840 * RETURNS:
2841 * 0 if spd doesn't need to be changed, 1 if spd has been
81952c54 2842 * changed. Negative errno if SCR registers are inaccessible.
1c3fae4d 2843 */
936fd732 2844int sata_set_spd(struct ata_link *link)
1c3fae4d
TH
2845{
2846 u32 scontrol;
81952c54 2847 int rc;
1c3fae4d 2848
936fd732 2849 if ((rc = sata_scr_read(link, SCR_CONTROL, &scontrol)))
81952c54 2850 return rc;
1c3fae4d 2851
936fd732 2852 if (!__sata_set_spd_needed(link, &scontrol))
1c3fae4d
TH
2853 return 0;
2854
936fd732 2855 if ((rc = sata_scr_write(link, SCR_CONTROL, scontrol)))
81952c54
TH
2856 return rc;
2857
1c3fae4d
TH
2858 return 1;
2859}
2860
452503f9
AC
2861/*
2862 * This mode timing computation functionality is ported over from
2863 * drivers/ide/ide-timing.h and was originally written by Vojtech Pavlik
2864 */
2865/*
b352e57d 2866 * PIO 0-4, MWDMA 0-2 and UDMA 0-6 timings (in nanoseconds).
452503f9 2867 * These were taken from ATA/ATAPI-6 standard, rev 0a, except
b352e57d
AC
2868 * for UDMA6, which is currently supported only by Maxtor drives.
2869 *
2870 * For PIO 5/6 MWDMA 3/4 see the CFA specification 3.0.
452503f9
AC
2871 */
2872
2873static const struct ata_timing ata_timing[] = {
3ada9c12
DD
2874/* { XFER_PIO_SLOW, 120, 290, 240, 960, 290, 240, 0, 960, 0 }, */
2875 { XFER_PIO_0, 70, 290, 240, 600, 165, 150, 0, 600, 0 },
2876 { XFER_PIO_1, 50, 290, 93, 383, 125, 100, 0, 383, 0 },
2877 { XFER_PIO_2, 30, 290, 40, 330, 100, 90, 0, 240, 0 },
2878 { XFER_PIO_3, 30, 80, 70, 180, 80, 70, 0, 180, 0 },
2879 { XFER_PIO_4, 25, 70, 25, 120, 70, 25, 0, 120, 0 },
2880 { XFER_PIO_5, 15, 65, 25, 100, 65, 25, 0, 100, 0 },
2881 { XFER_PIO_6, 10, 55, 20, 80, 55, 20, 0, 80, 0 },
2882
2883 { XFER_SW_DMA_0, 120, 0, 0, 0, 480, 480, 50, 960, 0 },
2884 { XFER_SW_DMA_1, 90, 0, 0, 0, 240, 240, 30, 480, 0 },
2885 { XFER_SW_DMA_2, 60, 0, 0, 0, 120, 120, 20, 240, 0 },
2886
2887 { XFER_MW_DMA_0, 60, 0, 0, 0, 215, 215, 20, 480, 0 },
2888 { XFER_MW_DMA_1, 45, 0, 0, 0, 80, 50, 5, 150, 0 },
2889 { XFER_MW_DMA_2, 25, 0, 0, 0, 70, 25, 5, 120, 0 },
2890 { XFER_MW_DMA_3, 25, 0, 0, 0, 65, 25, 5, 100, 0 },
2891 { XFER_MW_DMA_4, 25, 0, 0, 0, 55, 20, 5, 80, 0 },
2892
2893/* { XFER_UDMA_SLOW, 0, 0, 0, 0, 0, 0, 0, 0, 150 }, */
2894 { XFER_UDMA_0, 0, 0, 0, 0, 0, 0, 0, 0, 120 },
2895 { XFER_UDMA_1, 0, 0, 0, 0, 0, 0, 0, 0, 80 },
2896 { XFER_UDMA_2, 0, 0, 0, 0, 0, 0, 0, 0, 60 },
2897 { XFER_UDMA_3, 0, 0, 0, 0, 0, 0, 0, 0, 45 },
2898 { XFER_UDMA_4, 0, 0, 0, 0, 0, 0, 0, 0, 30 },
2899 { XFER_UDMA_5, 0, 0, 0, 0, 0, 0, 0, 0, 20 },
2900 { XFER_UDMA_6, 0, 0, 0, 0, 0, 0, 0, 0, 15 },
452503f9
AC
2901
2902 { 0xFF }
2903};
2904
2dcb407e
JG
2905#define ENOUGH(v, unit) (((v)-1)/(unit)+1)
2906#define EZ(v, unit) ((v)?ENOUGH(v, unit):0)
452503f9
AC
2907
2908static void ata_timing_quantize(const struct ata_timing *t, struct ata_timing *q, int T, int UT)
2909{
3ada9c12
DD
2910 q->setup = EZ(t->setup * 1000, T);
2911 q->act8b = EZ(t->act8b * 1000, T);
2912 q->rec8b = EZ(t->rec8b * 1000, T);
2913 q->cyc8b = EZ(t->cyc8b * 1000, T);
2914 q->active = EZ(t->active * 1000, T);
2915 q->recover = EZ(t->recover * 1000, T);
2916 q->dmack_hold = EZ(t->dmack_hold * 1000, T);
2917 q->cycle = EZ(t->cycle * 1000, T);
2918 q->udma = EZ(t->udma * 1000, UT);
452503f9
AC
2919}
2920
2921void ata_timing_merge(const struct ata_timing *a, const struct ata_timing *b,
2922 struct ata_timing *m, unsigned int what)
2923{
2924 if (what & ATA_TIMING_SETUP ) m->setup = max(a->setup, b->setup);
2925 if (what & ATA_TIMING_ACT8B ) m->act8b = max(a->act8b, b->act8b);
2926 if (what & ATA_TIMING_REC8B ) m->rec8b = max(a->rec8b, b->rec8b);
2927 if (what & ATA_TIMING_CYC8B ) m->cyc8b = max(a->cyc8b, b->cyc8b);
2928 if (what & ATA_TIMING_ACTIVE ) m->active = max(a->active, b->active);
2929 if (what & ATA_TIMING_RECOVER) m->recover = max(a->recover, b->recover);
3ada9c12 2930 if (what & ATA_TIMING_DMACK_HOLD) m->dmack_hold = max(a->dmack_hold, b->dmack_hold);
452503f9
AC
2931 if (what & ATA_TIMING_CYCLE ) m->cycle = max(a->cycle, b->cycle);
2932 if (what & ATA_TIMING_UDMA ) m->udma = max(a->udma, b->udma);
2933}
2934
6357357c 2935const struct ata_timing *ata_timing_find_mode(u8 xfer_mode)
452503f9 2936{
70cd071e
TH
2937 const struct ata_timing *t = ata_timing;
2938
2939 while (xfer_mode > t->mode)
2940 t++;
452503f9 2941
70cd071e
TH
2942 if (xfer_mode == t->mode)
2943 return t;
cd705d5a
BP
2944
2945 WARN_ONCE(true, "%s: unable to find timing for xfer_mode 0x%x\n",
2946 __func__, xfer_mode);
2947
70cd071e 2948 return NULL;
452503f9
AC
2949}
2950
2951int ata_timing_compute(struct ata_device *adev, unsigned short speed,
2952 struct ata_timing *t, int T, int UT)
2953{
9e8808a9 2954 const u16 *id = adev->id;
452503f9
AC
2955 const struct ata_timing *s;
2956 struct ata_timing p;
2957
2958 /*
2e9edbf8 2959 * Find the mode.
75b1f2f8 2960 */
452503f9
AC
2961
2962 if (!(s = ata_timing_find_mode(speed)))
2963 return -EINVAL;
2964
75b1f2f8
AL
2965 memcpy(t, s, sizeof(*s));
2966
452503f9
AC
2967 /*
2968 * If the drive is an EIDE drive, it can tell us it needs extended
2969 * PIO/MW_DMA cycle timing.
2970 */
2971
9e8808a9 2972 if (id[ATA_ID_FIELD_VALID] & 2) { /* EIDE drive */
452503f9 2973 memset(&p, 0, sizeof(p));
9e8808a9 2974
bff00256 2975 if (speed >= XFER_PIO_0 && speed < XFER_SW_DMA_0) {
9e8808a9
BZ
2976 if (speed <= XFER_PIO_2)
2977 p.cycle = p.cyc8b = id[ATA_ID_EIDE_PIO];
2978 else if ((speed <= XFER_PIO_4) ||
2979 (speed == XFER_PIO_5 && !ata_id_is_cfa(id)))
2980 p.cycle = p.cyc8b = id[ATA_ID_EIDE_PIO_IORDY];
2981 } else if (speed >= XFER_MW_DMA_0 && speed <= XFER_MW_DMA_2)
2982 p.cycle = id[ATA_ID_EIDE_DMA_MIN];
2983
452503f9
AC
2984 ata_timing_merge(&p, t, t, ATA_TIMING_CYCLE | ATA_TIMING_CYC8B);
2985 }
2986
2987 /*
2988 * Convert the timing to bus clock counts.
2989 */
2990
75b1f2f8 2991 ata_timing_quantize(t, t, T, UT);
452503f9
AC
2992
2993 /*
c893a3ae
RD
2994 * Even in DMA/UDMA modes we still use PIO access for IDENTIFY,
2995 * S.M.A.R.T * and some other commands. We have to ensure that the
2996 * DMA cycle timing is slower/equal than the fastest PIO timing.
452503f9
AC
2997 */
2998
fd3367af 2999 if (speed > XFER_PIO_6) {
452503f9
AC
3000 ata_timing_compute(adev, adev->pio_mode, &p, T, UT);
3001 ata_timing_merge(&p, t, t, ATA_TIMING_ALL);
3002 }
3003
3004 /*
c893a3ae 3005 * Lengthen active & recovery time so that cycle time is correct.
452503f9
AC
3006 */
3007
3008 if (t->act8b + t->rec8b < t->cyc8b) {
3009 t->act8b += (t->cyc8b - (t->act8b + t->rec8b)) / 2;
3010 t->rec8b = t->cyc8b - t->act8b;
3011 }
3012
3013 if (t->active + t->recover < t->cycle) {
3014 t->active += (t->cycle - (t->active + t->recover)) / 2;
3015 t->recover = t->cycle - t->active;
3016 }
a617c09f 3017
4f701d1e
AC
3018 /* In a few cases quantisation may produce enough errors to
3019 leave t->cycle too low for the sum of active and recovery
3020 if so we must correct this */
3021 if (t->active + t->recover > t->cycle)
3022 t->cycle = t->active + t->recover;
452503f9
AC
3023
3024 return 0;
3025}
3026
a0f79b92
TH
3027/**
3028 * ata_timing_cycle2mode - find xfer mode for the specified cycle duration
3029 * @xfer_shift: ATA_SHIFT_* value for transfer type to examine.
3030 * @cycle: cycle duration in ns
3031 *
3032 * Return matching xfer mode for @cycle. The returned mode is of
3033 * the transfer type specified by @xfer_shift. If @cycle is too
3034 * slow for @xfer_shift, 0xff is returned. If @cycle is faster
3035 * than the fastest known mode, the fasted mode is returned.
3036 *
3037 * LOCKING:
3038 * None.
3039 *
3040 * RETURNS:
3041 * Matching xfer_mode, 0xff if no match found.
3042 */
3043u8 ata_timing_cycle2mode(unsigned int xfer_shift, int cycle)
3044{
3045 u8 base_mode = 0xff, last_mode = 0xff;
3046 const struct ata_xfer_ent *ent;
3047 const struct ata_timing *t;
3048
3049 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
3050 if (ent->shift == xfer_shift)
3051 base_mode = ent->base;
3052
3053 for (t = ata_timing_find_mode(base_mode);
3054 t && ata_xfer_mode2shift(t->mode) == xfer_shift; t++) {
3055 unsigned short this_cycle;
3056
3057 switch (xfer_shift) {
3058 case ATA_SHIFT_PIO:
3059 case ATA_SHIFT_MWDMA:
3060 this_cycle = t->cycle;
3061 break;
3062 case ATA_SHIFT_UDMA:
3063 this_cycle = t->udma;
3064 break;
3065 default:
3066 return 0xff;
3067 }
3068
3069 if (cycle > this_cycle)
3070 break;
3071
3072 last_mode = t->mode;
3073 }
3074
3075 return last_mode;
3076}
3077
cf176e1a
TH
3078/**
3079 * ata_down_xfermask_limit - adjust dev xfer masks downward
cf176e1a 3080 * @dev: Device to adjust xfer masks
458337db 3081 * @sel: ATA_DNXFER_* selector
cf176e1a
TH
3082 *
3083 * Adjust xfer masks of @dev downward. Note that this function
3084 * does not apply the change. Invoking ata_set_mode() afterwards
3085 * will apply the limit.
3086 *
3087 * LOCKING:
3088 * Inherited from caller.
3089 *
3090 * RETURNS:
3091 * 0 on success, negative errno on failure
3092 */
458337db 3093int ata_down_xfermask_limit(struct ata_device *dev, unsigned int sel)
cf176e1a 3094{
458337db 3095 char buf[32];
7dc951ae
TH
3096 unsigned long orig_mask, xfer_mask;
3097 unsigned long pio_mask, mwdma_mask, udma_mask;
458337db 3098 int quiet, highbit;
cf176e1a 3099
458337db
TH
3100 quiet = !!(sel & ATA_DNXFER_QUIET);
3101 sel &= ~ATA_DNXFER_QUIET;
cf176e1a 3102
458337db
TH
3103 xfer_mask = orig_mask = ata_pack_xfermask(dev->pio_mask,
3104 dev->mwdma_mask,
3105 dev->udma_mask);
3106 ata_unpack_xfermask(xfer_mask, &pio_mask, &mwdma_mask, &udma_mask);
cf176e1a 3107
458337db
TH
3108 switch (sel) {
3109 case ATA_DNXFER_PIO:
3110 highbit = fls(pio_mask) - 1;
3111 pio_mask &= ~(1 << highbit);
3112 break;
3113
3114 case ATA_DNXFER_DMA:
3115 if (udma_mask) {
3116 highbit = fls(udma_mask) - 1;
3117 udma_mask &= ~(1 << highbit);
3118 if (!udma_mask)
3119 return -ENOENT;
3120 } else if (mwdma_mask) {
3121 highbit = fls(mwdma_mask) - 1;
3122 mwdma_mask &= ~(1 << highbit);
3123 if (!mwdma_mask)
3124 return -ENOENT;
3125 }
3126 break;
3127
3128 case ATA_DNXFER_40C:
3129 udma_mask &= ATA_UDMA_MASK_40C;
3130 break;
3131
3132 case ATA_DNXFER_FORCE_PIO0:
3133 pio_mask &= 1;
3134 case ATA_DNXFER_FORCE_PIO:
3135 mwdma_mask = 0;
3136 udma_mask = 0;
3137 break;
3138
458337db
TH
3139 default:
3140 BUG();
3141 }
3142
3143 xfer_mask &= ata_pack_xfermask(pio_mask, mwdma_mask, udma_mask);
3144
3145 if (!(xfer_mask & ATA_MASK_PIO) || xfer_mask == orig_mask)
3146 return -ENOENT;
3147
3148 if (!quiet) {
3149 if (xfer_mask & (ATA_MASK_MWDMA | ATA_MASK_UDMA))
3150 snprintf(buf, sizeof(buf), "%s:%s",
3151 ata_mode_string(xfer_mask),
3152 ata_mode_string(xfer_mask & ATA_MASK_PIO));
3153 else
3154 snprintf(buf, sizeof(buf), "%s",
3155 ata_mode_string(xfer_mask));
3156
a9a79dfe 3157 ata_dev_warn(dev, "limiting speed to %s\n", buf);
458337db 3158 }
cf176e1a
TH
3159
3160 ata_unpack_xfermask(xfer_mask, &dev->pio_mask, &dev->mwdma_mask,
3161 &dev->udma_mask);
3162
cf176e1a 3163 return 0;
cf176e1a
TH
3164}
3165
3373efd8 3166static int ata_dev_set_mode(struct ata_device *dev)
1da177e4 3167{
d0cb43b3 3168 struct ata_port *ap = dev->link->ap;
9af5c9c9 3169 struct ata_eh_context *ehc = &dev->link->eh_context;
d0cb43b3 3170 const bool nosetxfer = dev->horkage & ATA_HORKAGE_NOSETXFER;
4055dee7
TH
3171 const char *dev_err_whine = "";
3172 int ign_dev_err = 0;
d0cb43b3 3173 unsigned int err_mask = 0;
83206a29 3174 int rc;
1da177e4 3175
e8384607 3176 dev->flags &= ~ATA_DFLAG_PIO;
1da177e4
LT
3177 if (dev->xfer_shift == ATA_SHIFT_PIO)
3178 dev->flags |= ATA_DFLAG_PIO;
3179
d0cb43b3
TH
3180 if (nosetxfer && ap->flags & ATA_FLAG_SATA && ata_id_is_sata(dev->id))
3181 dev_err_whine = " (SET_XFERMODE skipped)";
3182 else {
3183 if (nosetxfer)
a9a79dfe
JP
3184 ata_dev_warn(dev,
3185 "NOSETXFER but PATA detected - can't "
3186 "skip SETXFER, might malfunction\n");
d0cb43b3
TH
3187 err_mask = ata_dev_set_xfermode(dev);
3188 }
2dcb407e 3189
4055dee7
TH
3190 if (err_mask & ~AC_ERR_DEV)
3191 goto fail;
3192
3193 /* revalidate */
3194 ehc->i.flags |= ATA_EHI_POST_SETMODE;
3195 rc = ata_dev_revalidate(dev, ATA_DEV_UNKNOWN, 0);
3196 ehc->i.flags &= ~ATA_EHI_POST_SETMODE;
3197 if (rc)
3198 return rc;
3199
b93fda12
AC
3200 if (dev->xfer_shift == ATA_SHIFT_PIO) {
3201 /* Old CFA may refuse this command, which is just fine */
3202 if (ata_id_is_cfa(dev->id))
3203 ign_dev_err = 1;
3204 /* Catch several broken garbage emulations plus some pre
3205 ATA devices */
3206 if (ata_id_major_version(dev->id) == 0 &&
3207 dev->pio_mode <= XFER_PIO_2)
3208 ign_dev_err = 1;
3209 /* Some very old devices and some bad newer ones fail
3210 any kind of SET_XFERMODE request but support PIO0-2
3211 timings and no IORDY */
3212 if (!ata_id_has_iordy(dev->id) && dev->pio_mode <= XFER_PIO_2)
3213 ign_dev_err = 1;
3214 }
3acaf94b
AC
3215 /* Early MWDMA devices do DMA but don't allow DMA mode setting.
3216 Don't fail an MWDMA0 set IFF the device indicates it is in MWDMA0 */
c5038fc0 3217 if (dev->xfer_shift == ATA_SHIFT_MWDMA &&
3acaf94b
AC
3218 dev->dma_mode == XFER_MW_DMA_0 &&
3219 (dev->id[63] >> 8) & 1)
4055dee7 3220 ign_dev_err = 1;
3acaf94b 3221
4055dee7
TH
3222 /* if the device is actually configured correctly, ignore dev err */
3223 if (dev->xfer_mode == ata_xfer_mask2mode(ata_id_xfermask(dev->id)))
3224 ign_dev_err = 1;
1da177e4 3225
4055dee7
TH
3226 if (err_mask & AC_ERR_DEV) {
3227 if (!ign_dev_err)
3228 goto fail;
3229 else
3230 dev_err_whine = " (device error ignored)";
3231 }
48a8a14f 3232
23e71c3d
TH
3233 DPRINTK("xfer_shift=%u, xfer_mode=0x%x\n",
3234 dev->xfer_shift, (int)dev->xfer_mode);
1da177e4 3235
a9a79dfe
JP
3236 ata_dev_info(dev, "configured for %s%s\n",
3237 ata_mode_string(ata_xfer_mode2mask(dev->xfer_mode)),
3238 dev_err_whine);
4055dee7 3239
83206a29 3240 return 0;
4055dee7
TH
3241
3242 fail:
a9a79dfe 3243 ata_dev_err(dev, "failed to set xfermode (err_mask=0x%x)\n", err_mask);
4055dee7 3244 return -EIO;
1da177e4
LT
3245}
3246
1da177e4 3247/**
04351821 3248 * ata_do_set_mode - Program timings and issue SET FEATURES - XFER
0260731f 3249 * @link: link on which timings will be programmed
1967b7ff 3250 * @r_failed_dev: out parameter for failed device
1da177e4 3251 *
04351821
AC
3252 * Standard implementation of the function used to tune and set
3253 * ATA device disk transfer mode (PIO3, UDMA6, etc.). If
3254 * ata_dev_set_mode() fails, pointer to the failing device is
e82cbdb9 3255 * returned in @r_failed_dev.
780a87f7 3256 *
1da177e4 3257 * LOCKING:
0cba632b 3258 * PCI/etc. bus probe sem.
e82cbdb9
TH
3259 *
3260 * RETURNS:
3261 * 0 on success, negative errno otherwise
1da177e4 3262 */
04351821 3263
0260731f 3264int ata_do_set_mode(struct ata_link *link, struct ata_device **r_failed_dev)
1da177e4 3265{
0260731f 3266 struct ata_port *ap = link->ap;
e8e0619f 3267 struct ata_device *dev;
f58229f8 3268 int rc = 0, used_dma = 0, found = 0;
3adcebb2 3269
a6d5a51c 3270 /* step 1: calculate xfer_mask */
1eca4365 3271 ata_for_each_dev(dev, link, ENABLED) {
7dc951ae 3272 unsigned long pio_mask, dma_mask;
b3a70601 3273 unsigned int mode_mask;
a6d5a51c 3274
b3a70601
AC
3275 mode_mask = ATA_DMA_MASK_ATA;
3276 if (dev->class == ATA_DEV_ATAPI)
3277 mode_mask = ATA_DMA_MASK_ATAPI;
3278 else if (ata_id_is_cfa(dev->id))
3279 mode_mask = ATA_DMA_MASK_CFA;
3280
3373efd8 3281 ata_dev_xfermask(dev);
33267325 3282 ata_force_xfermask(dev);
1da177e4 3283
acf356b1 3284 pio_mask = ata_pack_xfermask(dev->pio_mask, 0, 0);
b3a70601
AC
3285
3286 if (libata_dma_mask & mode_mask)
80a9c430
SS
3287 dma_mask = ata_pack_xfermask(0, dev->mwdma_mask,
3288 dev->udma_mask);
b3a70601
AC
3289 else
3290 dma_mask = 0;
3291
acf356b1
TH
3292 dev->pio_mode = ata_xfer_mask2mode(pio_mask);
3293 dev->dma_mode = ata_xfer_mask2mode(dma_mask);
5444a6f4 3294
4f65977d 3295 found = 1;
b15b3eba 3296 if (ata_dma_enabled(dev))
5444a6f4 3297 used_dma = 1;
a6d5a51c 3298 }
4f65977d 3299 if (!found)
e82cbdb9 3300 goto out;
a6d5a51c
TH
3301
3302 /* step 2: always set host PIO timings */
1eca4365 3303 ata_for_each_dev(dev, link, ENABLED) {
70cd071e 3304 if (dev->pio_mode == 0xff) {
a9a79dfe 3305 ata_dev_warn(dev, "no PIO support\n");
e8e0619f 3306 rc = -EINVAL;
e82cbdb9 3307 goto out;
e8e0619f
TH
3308 }
3309
3310 dev->xfer_mode = dev->pio_mode;
3311 dev->xfer_shift = ATA_SHIFT_PIO;
3312 if (ap->ops->set_piomode)
3313 ap->ops->set_piomode(ap, dev);
3314 }
1da177e4 3315
a6d5a51c 3316 /* step 3: set host DMA timings */
1eca4365
TH
3317 ata_for_each_dev(dev, link, ENABLED) {
3318 if (!ata_dma_enabled(dev))
e8e0619f
TH
3319 continue;
3320
3321 dev->xfer_mode = dev->dma_mode;
3322 dev->xfer_shift = ata_xfer_mode2shift(dev->dma_mode);
3323 if (ap->ops->set_dmamode)
3324 ap->ops->set_dmamode(ap, dev);
3325 }
1da177e4
LT
3326
3327 /* step 4: update devices' xfer mode */
1eca4365 3328 ata_for_each_dev(dev, link, ENABLED) {
3373efd8 3329 rc = ata_dev_set_mode(dev);
5bbc53f4 3330 if (rc)
e82cbdb9 3331 goto out;
83206a29 3332 }
1da177e4 3333
e8e0619f
TH
3334 /* Record simplex status. If we selected DMA then the other
3335 * host channels are not permitted to do so.
5444a6f4 3336 */
cca3974e 3337 if (used_dma && (ap->host->flags & ATA_HOST_SIMPLEX))
032af1ce 3338 ap->host->simplex_claimed = ap;
5444a6f4 3339
e82cbdb9
TH
3340 out:
3341 if (rc)
3342 *r_failed_dev = dev;
3343 return rc;
1da177e4
LT
3344}
3345
aa2731ad
TH
3346/**
3347 * ata_wait_ready - wait for link to become ready
3348 * @link: link to be waited on
3349 * @deadline: deadline jiffies for the operation
3350 * @check_ready: callback to check link readiness
3351 *
3352 * Wait for @link to become ready. @check_ready should return
3353 * positive number if @link is ready, 0 if it isn't, -ENODEV if
3354 * link doesn't seem to be occupied, other errno for other error
3355 * conditions.
3356 *
3357 * Transient -ENODEV conditions are allowed for
3358 * ATA_TMOUT_FF_WAIT.
3359 *
3360 * LOCKING:
3361 * EH context.
3362 *
3363 * RETURNS:
3364 * 0 if @linke is ready before @deadline; otherwise, -errno.
3365 */
3366int ata_wait_ready(struct ata_link *link, unsigned long deadline,
3367 int (*check_ready)(struct ata_link *link))
3368{
3369 unsigned long start = jiffies;
b48d58f5 3370 unsigned long nodev_deadline;
aa2731ad
TH
3371 int warned = 0;
3372
b48d58f5
TH
3373 /* choose which 0xff timeout to use, read comment in libata.h */
3374 if (link->ap->host->flags & ATA_HOST_PARALLEL_SCAN)
3375 nodev_deadline = ata_deadline(start, ATA_TMOUT_FF_WAIT_LONG);
3376 else
3377 nodev_deadline = ata_deadline(start, ATA_TMOUT_FF_WAIT);
3378
b1c72916
TH
3379 /* Slave readiness can't be tested separately from master. On
3380 * M/S emulation configuration, this function should be called
3381 * only on the master and it will handle both master and slave.
3382 */
3383 WARN_ON(link == link->ap->slave_link);
3384
aa2731ad
TH
3385 if (time_after(nodev_deadline, deadline))
3386 nodev_deadline = deadline;
3387
3388 while (1) {
3389 unsigned long now = jiffies;
3390 int ready, tmp;
3391
3392 ready = tmp = check_ready(link);
3393 if (ready > 0)
3394 return 0;
3395
b48d58f5
TH
3396 /*
3397 * -ENODEV could be transient. Ignore -ENODEV if link
aa2731ad 3398 * is online. Also, some SATA devices take a long
b48d58f5
TH
3399 * time to clear 0xff after reset. Wait for
3400 * ATA_TMOUT_FF_WAIT[_LONG] on -ENODEV if link isn't
3401 * offline.
aa2731ad
TH
3402 *
3403 * Note that some PATA controllers (pata_ali) explode
3404 * if status register is read more than once when
3405 * there's no device attached.
3406 */
3407 if (ready == -ENODEV) {
3408 if (ata_link_online(link))
3409 ready = 0;
3410 else if ((link->ap->flags & ATA_FLAG_SATA) &&
3411 !ata_link_offline(link) &&
3412 time_before(now, nodev_deadline))
3413 ready = 0;
3414 }
3415
3416 if (ready)
3417 return ready;
3418 if (time_after(now, deadline))
3419 return -EBUSY;
3420
3421 if (!warned && time_after(now, start + 5 * HZ) &&
3422 (deadline - now > 3 * HZ)) {
a9a79dfe 3423 ata_link_warn(link,
aa2731ad
TH
3424 "link is slow to respond, please be patient "
3425 "(ready=%d)\n", tmp);
3426 warned = 1;
3427 }
3428
97750ceb 3429 ata_msleep(link->ap, 50);
aa2731ad
TH
3430 }
3431}
3432
3433/**
3434 * ata_wait_after_reset - wait for link to become ready after reset
3435 * @link: link to be waited on
3436 * @deadline: deadline jiffies for the operation
3437 * @check_ready: callback to check link readiness
3438 *
3439 * Wait for @link to become ready after reset.
3440 *
3441 * LOCKING:
3442 * EH context.
3443 *
3444 * RETURNS:
3445 * 0 if @linke is ready before @deadline; otherwise, -errno.
3446 */
2b4221bb 3447int ata_wait_after_reset(struct ata_link *link, unsigned long deadline,
aa2731ad
TH
3448 int (*check_ready)(struct ata_link *link))
3449{
97750ceb 3450 ata_msleep(link->ap, ATA_WAIT_AFTER_RESET);
aa2731ad
TH
3451
3452 return ata_wait_ready(link, deadline, check_ready);
3453}
3454
d7bb4cc7 3455/**
936fd732
TH
3456 * sata_link_debounce - debounce SATA phy status
3457 * @link: ATA link to debounce SATA phy status for
d7bb4cc7 3458 * @params: timing parameters { interval, duratinon, timeout } in msec
d4b2bab4 3459 * @deadline: deadline jiffies for the operation
d7bb4cc7 3460 *
1152b261 3461 * Make sure SStatus of @link reaches stable state, determined by
d7bb4cc7
TH
3462 * holding the same value where DET is not 1 for @duration polled
3463 * every @interval, before @timeout. Timeout constraints the
d4b2bab4
TH
3464 * beginning of the stable state. Because DET gets stuck at 1 on
3465 * some controllers after hot unplugging, this functions waits
d7bb4cc7
TH
3466 * until timeout then returns 0 if DET is stable at 1.
3467 *
d4b2bab4
TH
3468 * @timeout is further limited by @deadline. The sooner of the
3469 * two is used.
3470 *
d7bb4cc7
TH
3471 * LOCKING:
3472 * Kernel thread context (may sleep)
3473 *
3474 * RETURNS:
3475 * 0 on success, -errno on failure.
3476 */
936fd732
TH
3477int sata_link_debounce(struct ata_link *link, const unsigned long *params,
3478 unsigned long deadline)
7a7921e8 3479{
341c2c95
TH
3480 unsigned long interval = params[0];
3481 unsigned long duration = params[1];
d4b2bab4 3482 unsigned long last_jiffies, t;
d7bb4cc7
TH
3483 u32 last, cur;
3484 int rc;
3485
341c2c95 3486 t = ata_deadline(jiffies, params[2]);
d4b2bab4
TH
3487 if (time_before(t, deadline))
3488 deadline = t;
3489
936fd732 3490 if ((rc = sata_scr_read(link, SCR_STATUS, &cur)))
d7bb4cc7
TH
3491 return rc;
3492 cur &= 0xf;
3493
3494 last = cur;
3495 last_jiffies = jiffies;
3496
3497 while (1) {
97750ceb 3498 ata_msleep(link->ap, interval);
936fd732 3499 if ((rc = sata_scr_read(link, SCR_STATUS, &cur)))
d7bb4cc7
TH
3500 return rc;
3501 cur &= 0xf;
3502
3503 /* DET stable? */
3504 if (cur == last) {
d4b2bab4 3505 if (cur == 1 && time_before(jiffies, deadline))
d7bb4cc7 3506 continue;
341c2c95
TH
3507 if (time_after(jiffies,
3508 ata_deadline(last_jiffies, duration)))
d7bb4cc7
TH
3509 return 0;
3510 continue;
3511 }
3512
3513 /* unstable, start over */
3514 last = cur;
3515 last_jiffies = jiffies;
3516
f1545154
TH
3517 /* Check deadline. If debouncing failed, return
3518 * -EPIPE to tell upper layer to lower link speed.
3519 */
d4b2bab4 3520 if (time_after(jiffies, deadline))
f1545154 3521 return -EPIPE;
d7bb4cc7
TH
3522 }
3523}
3524
3525/**
936fd732
TH
3526 * sata_link_resume - resume SATA link
3527 * @link: ATA link to resume SATA
d7bb4cc7 3528 * @params: timing parameters { interval, duratinon, timeout } in msec
d4b2bab4 3529 * @deadline: deadline jiffies for the operation
d7bb4cc7 3530 *
936fd732 3531 * Resume SATA phy @link and debounce it.
d7bb4cc7
TH
3532 *
3533 * LOCKING:
3534 * Kernel thread context (may sleep)
3535 *
3536 * RETURNS:
3537 * 0 on success, -errno on failure.
3538 */
936fd732
TH
3539int sata_link_resume(struct ata_link *link, const unsigned long *params,
3540 unsigned long deadline)
d7bb4cc7 3541{
5040ab67 3542 int tries = ATA_LINK_RESUME_TRIES;
ac371987 3543 u32 scontrol, serror;
81952c54
TH
3544 int rc;
3545
936fd732 3546 if ((rc = sata_scr_read(link, SCR_CONTROL, &scontrol)))
81952c54 3547 return rc;
7a7921e8 3548
5040ab67
TH
3549 /*
3550 * Writes to SControl sometimes get ignored under certain
3551 * controllers (ata_piix SIDPR). Make sure DET actually is
3552 * cleared.
3553 */
3554 do {
3555 scontrol = (scontrol & 0x0f0) | 0x300;
3556 if ((rc = sata_scr_write(link, SCR_CONTROL, scontrol)))
3557 return rc;
3558 /*
3559 * Some PHYs react badly if SStatus is pounded
3560 * immediately after resuming. Delay 200ms before
3561 * debouncing.
3562 */
97750ceb 3563 ata_msleep(link->ap, 200);
81952c54 3564
5040ab67
TH
3565 /* is SControl restored correctly? */
3566 if ((rc = sata_scr_read(link, SCR_CONTROL, &scontrol)))
3567 return rc;
3568 } while ((scontrol & 0xf0f) != 0x300 && --tries);
7a7921e8 3569
5040ab67 3570 if ((scontrol & 0xf0f) != 0x300) {
38941c95 3571 ata_link_warn(link, "failed to resume link (SControl %X)\n",
a9a79dfe 3572 scontrol);
5040ab67
TH
3573 return 0;
3574 }
3575
3576 if (tries < ATA_LINK_RESUME_TRIES)
a9a79dfe
JP
3577 ata_link_warn(link, "link resume succeeded after %d retries\n",
3578 ATA_LINK_RESUME_TRIES - tries);
7a7921e8 3579
ac371987
TH
3580 if ((rc = sata_link_debounce(link, params, deadline)))
3581 return rc;
3582
f046519f 3583 /* clear SError, some PHYs require this even for SRST to work */
ac371987
TH
3584 if (!(rc = sata_scr_read(link, SCR_ERROR, &serror)))
3585 rc = sata_scr_write(link, SCR_ERROR, serror);
ac371987 3586
f046519f 3587 return rc != -EINVAL ? rc : 0;
7a7921e8
TH
3588}
3589
1152b261
TH
3590/**
3591 * sata_link_scr_lpm - manipulate SControl IPM and SPM fields
3592 * @link: ATA link to manipulate SControl for
3593 * @policy: LPM policy to configure
3594 * @spm_wakeup: initiate LPM transition to active state
3595 *
3596 * Manipulate the IPM field of the SControl register of @link
3597 * according to @policy. If @policy is ATA_LPM_MAX_POWER and
3598 * @spm_wakeup is %true, the SPM field is manipulated to wake up
3599 * the link. This function also clears PHYRDY_CHG before
3600 * returning.
3601 *
3602 * LOCKING:
3603 * EH context.
3604 *
3605 * RETURNS:
3606 * 0 on succes, -errno otherwise.
3607 */
3608int sata_link_scr_lpm(struct ata_link *link, enum ata_lpm_policy policy,
3609 bool spm_wakeup)
3610{
3611 struct ata_eh_context *ehc = &link->eh_context;
3612 bool woken_up = false;
3613 u32 scontrol;
3614 int rc;
3615
3616 rc = sata_scr_read(link, SCR_CONTROL, &scontrol);
3617 if (rc)
3618 return rc;
3619
3620 switch (policy) {
3621 case ATA_LPM_MAX_POWER:
3622 /* disable all LPM transitions */
65fe1f0f 3623 scontrol |= (0x7 << 8);
1152b261
TH
3624 /* initiate transition to active state */
3625 if (spm_wakeup) {
3626 scontrol |= (0x4 << 12);
3627 woken_up = true;
3628 }
3629 break;
3630 case ATA_LPM_MED_POWER:
3631 /* allow LPM to PARTIAL */
3632 scontrol &= ~(0x1 << 8);
65fe1f0f 3633 scontrol |= (0x6 << 8);
1152b261
TH
3634 break;
3635 case ATA_LPM_MIN_POWER:
8a745f1f
KCA
3636 if (ata_link_nr_enabled(link) > 0)
3637 /* no restrictions on LPM transitions */
65fe1f0f 3638 scontrol &= ~(0x7 << 8);
8a745f1f
KCA
3639 else {
3640 /* empty port, power off */
3641 scontrol &= ~0xf;
3642 scontrol |= (0x1 << 2);
3643 }
1152b261
TH
3644 break;
3645 default:
3646 WARN_ON(1);
3647 }
3648
3649 rc = sata_scr_write(link, SCR_CONTROL, scontrol);
3650 if (rc)
3651 return rc;
3652
3653 /* give the link time to transit out of LPM state */
3654 if (woken_up)
3655 msleep(10);
3656
3657 /* clear PHYRDY_CHG from SError */
3658 ehc->i.serror &= ~SERR_PHYRDY_CHG;
3659 return sata_scr_write(link, SCR_ERROR, SERR_PHYRDY_CHG);
3660}
3661
f5914a46 3662/**
0aa1113d 3663 * ata_std_prereset - prepare for reset
cc0680a5 3664 * @link: ATA link to be reset
d4b2bab4 3665 * @deadline: deadline jiffies for the operation
f5914a46 3666 *
cc0680a5 3667 * @link is about to be reset. Initialize it. Failure from
b8cffc6a
TH
3668 * prereset makes libata abort whole reset sequence and give up
3669 * that port, so prereset should be best-effort. It does its
3670 * best to prepare for reset sequence but if things go wrong, it
3671 * should just whine, not fail.
f5914a46
TH
3672 *
3673 * LOCKING:
3674 * Kernel thread context (may sleep)
3675 *
3676 * RETURNS:
3677 * 0 on success, -errno otherwise.
3678 */
0aa1113d 3679int ata_std_prereset(struct ata_link *link, unsigned long deadline)
f5914a46 3680{
cc0680a5 3681 struct ata_port *ap = link->ap;
936fd732 3682 struct ata_eh_context *ehc = &link->eh_context;
e9c83914 3683 const unsigned long *timing = sata_ehc_deb_timing(ehc);
f5914a46
TH
3684 int rc;
3685
f5914a46
TH
3686 /* if we're about to do hardreset, nothing more to do */
3687 if (ehc->i.action & ATA_EH_HARDRESET)
3688 return 0;
3689
936fd732 3690 /* if SATA, resume link */
a16abc0b 3691 if (ap->flags & ATA_FLAG_SATA) {
936fd732 3692 rc = sata_link_resume(link, timing, deadline);
b8cffc6a
TH
3693 /* whine about phy resume failure but proceed */
3694 if (rc && rc != -EOPNOTSUPP)
a9a79dfe
JP
3695 ata_link_warn(link,
3696 "failed to resume link for reset (errno=%d)\n",
3697 rc);
f5914a46
TH
3698 }
3699
45db2f6c 3700 /* no point in trying softreset on offline link */
b1c72916 3701 if (ata_phys_link_offline(link))
45db2f6c
TH
3702 ehc->i.action &= ~ATA_EH_SOFTRESET;
3703
f5914a46
TH
3704 return 0;
3705}
3706
c2bd5804 3707/**
624d5c51
TH
3708 * sata_link_hardreset - reset link via SATA phy reset
3709 * @link: link to reset
3710 * @timing: timing parameters { interval, duratinon, timeout } in msec
d4b2bab4 3711 * @deadline: deadline jiffies for the operation
9dadd45b
TH
3712 * @online: optional out parameter indicating link onlineness
3713 * @check_ready: optional callback to check link readiness
c2bd5804 3714 *
624d5c51 3715 * SATA phy-reset @link using DET bits of SControl register.
9dadd45b
TH
3716 * After hardreset, link readiness is waited upon using
3717 * ata_wait_ready() if @check_ready is specified. LLDs are
3718 * allowed to not specify @check_ready and wait itself after this
3719 * function returns. Device classification is LLD's
3720 * responsibility.
3721 *
3722 * *@online is set to one iff reset succeeded and @link is online
3723 * after reset.
c2bd5804
TH
3724 *
3725 * LOCKING:
3726 * Kernel thread context (may sleep)
3727 *
3728 * RETURNS:
3729 * 0 on success, -errno otherwise.
3730 */
624d5c51 3731int sata_link_hardreset(struct ata_link *link, const unsigned long *timing,
9dadd45b
TH
3732 unsigned long deadline,
3733 bool *online, int (*check_ready)(struct ata_link *))
c2bd5804 3734{
624d5c51 3735 u32 scontrol;
81952c54 3736 int rc;
852ee16a 3737
c2bd5804
TH
3738 DPRINTK("ENTER\n");
3739
9dadd45b
TH
3740 if (online)
3741 *online = false;
3742
936fd732 3743 if (sata_set_spd_needed(link)) {
1c3fae4d
TH
3744 /* SATA spec says nothing about how to reconfigure
3745 * spd. To be on the safe side, turn off phy during
3746 * reconfiguration. This works for at least ICH7 AHCI
3747 * and Sil3124.
3748 */
936fd732 3749 if ((rc = sata_scr_read(link, SCR_CONTROL, &scontrol)))
b6103f6d 3750 goto out;
81952c54 3751
a34b6fc0 3752 scontrol = (scontrol & 0x0f0) | 0x304;
81952c54 3753
936fd732 3754 if ((rc = sata_scr_write(link, SCR_CONTROL, scontrol)))
b6103f6d 3755 goto out;
1c3fae4d 3756
936fd732 3757 sata_set_spd(link);
1c3fae4d
TH
3758 }
3759
3760 /* issue phy wake/reset */
936fd732 3761 if ((rc = sata_scr_read(link, SCR_CONTROL, &scontrol)))
b6103f6d 3762 goto out;
81952c54 3763
852ee16a 3764 scontrol = (scontrol & 0x0f0) | 0x301;
81952c54 3765
936fd732 3766 if ((rc = sata_scr_write_flush(link, SCR_CONTROL, scontrol)))
b6103f6d 3767 goto out;
c2bd5804 3768
1c3fae4d 3769 /* Couldn't find anything in SATA I/II specs, but AHCI-1.1
c2bd5804
TH
3770 * 10.4.2 says at least 1 ms.
3771 */
97750ceb 3772 ata_msleep(link->ap, 1);
c2bd5804 3773
936fd732
TH
3774 /* bring link back */
3775 rc = sata_link_resume(link, timing, deadline);
9dadd45b
TH
3776 if (rc)
3777 goto out;
3778 /* if link is offline nothing more to do */
b1c72916 3779 if (ata_phys_link_offline(link))
9dadd45b
TH
3780 goto out;
3781
3782 /* Link is online. From this point, -ENODEV too is an error. */
3783 if (online)
3784 *online = true;
3785
071f44b1 3786 if (sata_pmp_supported(link->ap) && ata_is_host_link(link)) {
9dadd45b
TH
3787 /* If PMP is supported, we have to do follow-up SRST.
3788 * Some PMPs don't send D2H Reg FIS after hardreset if
3789 * the first port is empty. Wait only for
3790 * ATA_TMOUT_PMP_SRST_WAIT.
3791 */
3792 if (check_ready) {
3793 unsigned long pmp_deadline;
3794
341c2c95
TH
3795 pmp_deadline = ata_deadline(jiffies,
3796 ATA_TMOUT_PMP_SRST_WAIT);
9dadd45b
TH
3797 if (time_after(pmp_deadline, deadline))
3798 pmp_deadline = deadline;
3799 ata_wait_ready(link, pmp_deadline, check_ready);
3800 }
3801 rc = -EAGAIN;
3802 goto out;
3803 }
3804
3805 rc = 0;
3806 if (check_ready)
3807 rc = ata_wait_ready(link, deadline, check_ready);
b6103f6d 3808 out:
0cbf0711
TH
3809 if (rc && rc != -EAGAIN) {
3810 /* online is set iff link is online && reset succeeded */
3811 if (online)
3812 *online = false;
a9a79dfe 3813 ata_link_err(link, "COMRESET failed (errno=%d)\n", rc);
0cbf0711 3814 }
b6103f6d
TH
3815 DPRINTK("EXIT, rc=%d\n", rc);
3816 return rc;
3817}
3818
57c9efdf
TH
3819/**
3820 * sata_std_hardreset - COMRESET w/o waiting or classification
3821 * @link: link to reset
3822 * @class: resulting class of attached device
3823 * @deadline: deadline jiffies for the operation
3824 *
3825 * Standard SATA COMRESET w/o waiting or classification.
3826 *
3827 * LOCKING:
3828 * Kernel thread context (may sleep)
3829 *
3830 * RETURNS:
3831 * 0 if link offline, -EAGAIN if link online, -errno on errors.
3832 */
3833int sata_std_hardreset(struct ata_link *link, unsigned int *class,
3834 unsigned long deadline)
3835{
3836 const unsigned long *timing = sata_ehc_deb_timing(&link->eh_context);
3837 bool online;
3838 int rc;
3839
3840 /* do hardreset */
3841 rc = sata_link_hardreset(link, timing, deadline, &online, NULL);
57c9efdf
TH
3842 return online ? -EAGAIN : rc;
3843}
3844
c2bd5804 3845/**
203c75b8 3846 * ata_std_postreset - standard postreset callback
cc0680a5 3847 * @link: the target ata_link
c2bd5804
TH
3848 * @classes: classes of attached devices
3849 *
3850 * This function is invoked after a successful reset. Note that
3851 * the device might have been reset more than once using
3852 * different reset methods before postreset is invoked.
c2bd5804 3853 *
c2bd5804
TH
3854 * LOCKING:
3855 * Kernel thread context (may sleep)
3856 */
203c75b8 3857void ata_std_postreset(struct ata_link *link, unsigned int *classes)
c2bd5804 3858{
f046519f
TH
3859 u32 serror;
3860
c2bd5804
TH
3861 DPRINTK("ENTER\n");
3862
f046519f
TH
3863 /* reset complete, clear SError */
3864 if (!sata_scr_read(link, SCR_ERROR, &serror))
3865 sata_scr_write(link, SCR_ERROR, serror);
3866
c2bd5804 3867 /* print link status */
936fd732 3868 sata_print_link_status(link);
c2bd5804 3869
c2bd5804
TH
3870 DPRINTK("EXIT\n");
3871}
3872
623a3128
TH
3873/**
3874 * ata_dev_same_device - Determine whether new ID matches configured device
623a3128
TH
3875 * @dev: device to compare against
3876 * @new_class: class of the new device
3877 * @new_id: IDENTIFY page of the new device
3878 *
3879 * Compare @new_class and @new_id against @dev and determine
3880 * whether @dev is the device indicated by @new_class and
3881 * @new_id.
3882 *
3883 * LOCKING:
3884 * None.
3885 *
3886 * RETURNS:
3887 * 1 if @dev matches @new_class and @new_id, 0 otherwise.
3888 */
3373efd8
TH
3889static int ata_dev_same_device(struct ata_device *dev, unsigned int new_class,
3890 const u16 *new_id)
623a3128
TH
3891{
3892 const u16 *old_id = dev->id;
a0cf733b
TH
3893 unsigned char model[2][ATA_ID_PROD_LEN + 1];
3894 unsigned char serial[2][ATA_ID_SERNO_LEN + 1];
623a3128
TH
3895
3896 if (dev->class != new_class) {
a9a79dfe
JP
3897 ata_dev_info(dev, "class mismatch %d != %d\n",
3898 dev->class, new_class);
623a3128
TH
3899 return 0;
3900 }
3901
a0cf733b
TH
3902 ata_id_c_string(old_id, model[0], ATA_ID_PROD, sizeof(model[0]));
3903 ata_id_c_string(new_id, model[1], ATA_ID_PROD, sizeof(model[1]));
3904 ata_id_c_string(old_id, serial[0], ATA_ID_SERNO, sizeof(serial[0]));
3905 ata_id_c_string(new_id, serial[1], ATA_ID_SERNO, sizeof(serial[1]));
623a3128
TH
3906
3907 if (strcmp(model[0], model[1])) {
a9a79dfe
JP
3908 ata_dev_info(dev, "model number mismatch '%s' != '%s'\n",
3909 model[0], model[1]);
623a3128
TH
3910 return 0;
3911 }
3912
3913 if (strcmp(serial[0], serial[1])) {
a9a79dfe
JP
3914 ata_dev_info(dev, "serial number mismatch '%s' != '%s'\n",
3915 serial[0], serial[1]);
623a3128
TH
3916 return 0;
3917 }
3918
623a3128
TH
3919 return 1;
3920}
3921
3922/**
fe30911b 3923 * ata_dev_reread_id - Re-read IDENTIFY data
3fae450c 3924 * @dev: target ATA device
bff04647 3925 * @readid_flags: read ID flags
623a3128
TH
3926 *
3927 * Re-read IDENTIFY page and make sure @dev is still attached to
3928 * the port.
3929 *
3930 * LOCKING:
3931 * Kernel thread context (may sleep)
3932 *
3933 * RETURNS:
3934 * 0 on success, negative errno otherwise
3935 */
fe30911b 3936int ata_dev_reread_id(struct ata_device *dev, unsigned int readid_flags)
623a3128 3937{
5eb45c02 3938 unsigned int class = dev->class;
9af5c9c9 3939 u16 *id = (void *)dev->link->ap->sector_buf;
623a3128
TH
3940 int rc;
3941
fe635c7e 3942 /* read ID data */
bff04647 3943 rc = ata_dev_read_id(dev, &class, readid_flags, id);
623a3128 3944 if (rc)
fe30911b 3945 return rc;
623a3128
TH
3946
3947 /* is the device still there? */
fe30911b
TH
3948 if (!ata_dev_same_device(dev, class, id))
3949 return -ENODEV;
623a3128 3950
fe635c7e 3951 memcpy(dev->id, id, sizeof(id[0]) * ATA_ID_WORDS);
fe30911b
TH
3952 return 0;
3953}
3954
3955/**
3956 * ata_dev_revalidate - Revalidate ATA device
3957 * @dev: device to revalidate
422c9daa 3958 * @new_class: new class code
fe30911b
TH
3959 * @readid_flags: read ID flags
3960 *
3961 * Re-read IDENTIFY page, make sure @dev is still attached to the
3962 * port and reconfigure it according to the new IDENTIFY page.
3963 *
3964 * LOCKING:
3965 * Kernel thread context (may sleep)
3966 *
3967 * RETURNS:
3968 * 0 on success, negative errno otherwise
3969 */
422c9daa
TH
3970int ata_dev_revalidate(struct ata_device *dev, unsigned int new_class,
3971 unsigned int readid_flags)
fe30911b 3972{
6ddcd3b0 3973 u64 n_sectors = dev->n_sectors;
5920dadf 3974 u64 n_native_sectors = dev->n_native_sectors;
fe30911b
TH
3975 int rc;
3976
3977 if (!ata_dev_enabled(dev))
3978 return -ENODEV;
3979
422c9daa
TH
3980 /* fail early if !ATA && !ATAPI to avoid issuing [P]IDENTIFY to PMP */
3981 if (ata_class_enabled(new_class) &&
f0d0613d
BP
3982 new_class != ATA_DEV_ATA &&
3983 new_class != ATA_DEV_ATAPI &&
3984 new_class != ATA_DEV_SEMB) {
a9a79dfe
JP
3985 ata_dev_info(dev, "class mismatch %u != %u\n",
3986 dev->class, new_class);
422c9daa
TH
3987 rc = -ENODEV;
3988 goto fail;
3989 }
3990
fe30911b
TH
3991 /* re-read ID */
3992 rc = ata_dev_reread_id(dev, readid_flags);
3993 if (rc)
3994 goto fail;
623a3128
TH
3995
3996 /* configure device according to the new ID */
efdaedc4 3997 rc = ata_dev_configure(dev);
6ddcd3b0
TH
3998 if (rc)
3999 goto fail;
4000
4001 /* verify n_sectors hasn't changed */
445d211b
TH
4002 if (dev->class != ATA_DEV_ATA || !n_sectors ||
4003 dev->n_sectors == n_sectors)
4004 return 0;
4005
4006 /* n_sectors has changed */
a9a79dfe
JP
4007 ata_dev_warn(dev, "n_sectors mismatch %llu != %llu\n",
4008 (unsigned long long)n_sectors,
4009 (unsigned long long)dev->n_sectors);
445d211b
TH
4010
4011 /*
4012 * Something could have caused HPA to be unlocked
4013 * involuntarily. If n_native_sectors hasn't changed and the
4014 * new size matches it, keep the device.
4015 */
4016 if (dev->n_native_sectors == n_native_sectors &&
4017 dev->n_sectors > n_sectors && dev->n_sectors == n_native_sectors) {
a9a79dfe
JP
4018 ata_dev_warn(dev,
4019 "new n_sectors matches native, probably "
4020 "late HPA unlock, n_sectors updated\n");
68939ce5 4021 /* use the larger n_sectors */
445d211b 4022 return 0;
6ddcd3b0
TH
4023 }
4024
445d211b
TH
4025 /*
4026 * Some BIOSes boot w/o HPA but resume w/ HPA locked. Try
4027 * unlocking HPA in those cases.
4028 *
4029 * https://bugzilla.kernel.org/show_bug.cgi?id=15396
4030 */
4031 if (dev->n_native_sectors == n_native_sectors &&
4032 dev->n_sectors < n_sectors && n_sectors == n_native_sectors &&
4033 !(dev->horkage & ATA_HORKAGE_BROKEN_HPA)) {
a9a79dfe
JP
4034 ata_dev_warn(dev,
4035 "old n_sectors matches native, probably "
4036 "late HPA lock, will try to unlock HPA\n");
445d211b
TH
4037 /* try unlocking HPA */
4038 dev->flags |= ATA_DFLAG_UNLOCK_HPA;
4039 rc = -EIO;
4040 } else
4041 rc = -ENODEV;
623a3128 4042
445d211b
TH
4043 /* restore original n_[native_]sectors and fail */
4044 dev->n_native_sectors = n_native_sectors;
4045 dev->n_sectors = n_sectors;
623a3128 4046 fail:
a9a79dfe 4047 ata_dev_err(dev, "revalidation failed (errno=%d)\n", rc);
623a3128
TH
4048 return rc;
4049}
4050
6919a0a6
AC
4051struct ata_blacklist_entry {
4052 const char *model_num;
4053 const char *model_rev;
4054 unsigned long horkage;
4055};
4056
4057static const struct ata_blacklist_entry ata_device_blacklist [] = {
4058 /* Devices with DMA related problems under Linux */
4059 { "WDC AC11000H", NULL, ATA_HORKAGE_NODMA },
4060 { "WDC AC22100H", NULL, ATA_HORKAGE_NODMA },
4061 { "WDC AC32500H", NULL, ATA_HORKAGE_NODMA },
4062 { "WDC AC33100H", NULL, ATA_HORKAGE_NODMA },
4063 { "WDC AC31600H", NULL, ATA_HORKAGE_NODMA },
4064 { "WDC AC32100H", "24.09P07", ATA_HORKAGE_NODMA },
4065 { "WDC AC23200L", "21.10N21", ATA_HORKAGE_NODMA },
4066 { "Compaq CRD-8241B", NULL, ATA_HORKAGE_NODMA },
4067 { "CRD-8400B", NULL, ATA_HORKAGE_NODMA },
7da4c935 4068 { "CRD-848[02]B", NULL, ATA_HORKAGE_NODMA },
6919a0a6
AC
4069 { "CRD-84", NULL, ATA_HORKAGE_NODMA },
4070 { "SanDisk SDP3B", NULL, ATA_HORKAGE_NODMA },
4071 { "SanDisk SDP3B-64", NULL, ATA_HORKAGE_NODMA },
4072 { "SANYO CD-ROM CRD", NULL, ATA_HORKAGE_NODMA },
4073 { "HITACHI CDR-8", NULL, ATA_HORKAGE_NODMA },
7da4c935 4074 { "HITACHI CDR-8[34]35",NULL, ATA_HORKAGE_NODMA },
6919a0a6
AC
4075 { "Toshiba CD-ROM XM-6202B", NULL, ATA_HORKAGE_NODMA },
4076 { "TOSHIBA CD-ROM XM-1702BC", NULL, ATA_HORKAGE_NODMA },
4077 { "CD-532E-A", NULL, ATA_HORKAGE_NODMA },
4078 { "E-IDE CD-ROM CR-840",NULL, ATA_HORKAGE_NODMA },
4079 { "CD-ROM Drive/F5A", NULL, ATA_HORKAGE_NODMA },
4080 { "WPI CDD-820", NULL, ATA_HORKAGE_NODMA },
4081 { "SAMSUNG CD-ROM SC-148C", NULL, ATA_HORKAGE_NODMA },
4082 { "SAMSUNG CD-ROM SC", NULL, ATA_HORKAGE_NODMA },
6919a0a6
AC
4083 { "ATAPI CD-ROM DRIVE 40X MAXIMUM",NULL,ATA_HORKAGE_NODMA },
4084 { "_NEC DV5800A", NULL, ATA_HORKAGE_NODMA },
2dcb407e 4085 { "SAMSUNG CD-ROM SN-124", "N001", ATA_HORKAGE_NODMA },
39f19886 4086 { "Seagate STT20000A", NULL, ATA_HORKAGE_NODMA },
d17d794c 4087 { " 2GB ATA Flash Disk", "ADMA428M", ATA_HORKAGE_NODMA },
3af9a77a 4088 /* Odd clown on sil3726/4726 PMPs */
50af2fa1 4089 { "Config Disk", NULL, ATA_HORKAGE_DISABLE },
6919a0a6 4090
18d6e9d5 4091 /* Weird ATAPI devices */
40a1d531 4092 { "TORiSAN DVD-ROM DRD-N216", NULL, ATA_HORKAGE_MAX_SEC_128 },
6a87e42e 4093 { "QUANTUM DAT DAT72-000", NULL, ATA_HORKAGE_ATAPI_MOD16_DMA },
18d6e9d5 4094
6919a0a6
AC
4095 /* Devices we expect to fail diagnostics */
4096
4097 /* Devices where NCQ should be avoided */
4098 /* NCQ is slow */
2dcb407e 4099 { "WDC WD740ADFD-00", NULL, ATA_HORKAGE_NONCQ },
459ad688 4100 { "WDC WD740ADFD-00NLR1", NULL, ATA_HORKAGE_NONCQ, },
09125ea6
TH
4101 /* http://thread.gmane.org/gmane.linux.ide/14907 */
4102 { "FUJITSU MHT2060BH", NULL, ATA_HORKAGE_NONCQ },
7acfaf30 4103 /* NCQ is broken */
539cc7c7 4104 { "Maxtor *", "BANC*", ATA_HORKAGE_NONCQ },
0e3dbc01 4105 { "Maxtor 7V300F0", "VA111630", ATA_HORKAGE_NONCQ },
da6f0ec2 4106 { "ST380817AS", "3.42", ATA_HORKAGE_NONCQ },
e41bd3e8 4107 { "ST3160023AS", "3.42", ATA_HORKAGE_NONCQ },
5ccfca97 4108 { "OCZ CORE_SSD", "02.10104", ATA_HORKAGE_NONCQ },
539cc7c7 4109
ac70a964 4110 /* Seagate NCQ + FLUSH CACHE firmware bug */
4d1f9082 4111 { "ST31500341AS", "SD1[5-9]", ATA_HORKAGE_NONCQ |
ac70a964 4112 ATA_HORKAGE_FIRMWARE_WARN },
d10d491f 4113
4d1f9082 4114 { "ST31000333AS", "SD1[5-9]", ATA_HORKAGE_NONCQ |
d10d491f
TH
4115 ATA_HORKAGE_FIRMWARE_WARN },
4116
4d1f9082 4117 { "ST3640[36]23AS", "SD1[5-9]", ATA_HORKAGE_NONCQ |
d10d491f
TH
4118 ATA_HORKAGE_FIRMWARE_WARN },
4119
4d1f9082 4120 { "ST3320[68]13AS", "SD1[5-9]", ATA_HORKAGE_NONCQ |
ac70a964
TH
4121 ATA_HORKAGE_FIRMWARE_WARN },
4122
36e337d0
RH
4123 /* Blacklist entries taken from Silicon Image 3124/3132
4124 Windows driver .inf file - also several Linux problem reports */
4125 { "HTS541060G9SA00", "MB3OC60D", ATA_HORKAGE_NONCQ, },
4126 { "HTS541080G9SA00", "MB4OC60D", ATA_HORKAGE_NONCQ, },
4127 { "HTS541010G9SA00", "MBZOC60D", ATA_HORKAGE_NONCQ, },
6919a0a6 4128
68b0ddb2
TH
4129 /* https://bugzilla.kernel.org/show_bug.cgi?id=15573 */
4130 { "C300-CTFDDAC128MAG", "0001", ATA_HORKAGE_NONCQ, },
4131
16c55b03
TH
4132 /* devices which puke on READ_NATIVE_MAX */
4133 { "HDS724040KLSA80", "KFAOA20N", ATA_HORKAGE_BROKEN_HPA, },
4134 { "WDC WD3200JD-00KLB0", "WD-WCAMR1130137", ATA_HORKAGE_BROKEN_HPA },
4135 { "WDC WD2500JD-00HBB0", "WD-WMAL71490727", ATA_HORKAGE_BROKEN_HPA },
4136 { "MAXTOR 6L080L4", "A93.0500", ATA_HORKAGE_BROKEN_HPA },
6919a0a6 4137
7831387b
TH
4138 /* this one allows HPA unlocking but fails IOs on the area */
4139 { "OCZ-VERTEX", "1.30", ATA_HORKAGE_BROKEN_HPA },
4140
93328e11
AC
4141 /* Devices which report 1 sector over size HPA */
4142 { "ST340823A", NULL, ATA_HORKAGE_HPA_SIZE, },
4143 { "ST320413A", NULL, ATA_HORKAGE_HPA_SIZE, },
b152fcd3 4144 { "ST310211A", NULL, ATA_HORKAGE_HPA_SIZE, },
93328e11 4145
6bbfd53d
AC
4146 /* Devices which get the IVB wrong */
4147 { "QUANTUM FIREBALLlct10 05", "A03.0900", ATA_HORKAGE_IVB, },
a79067e5 4148 /* Maybe we should just blacklist TSSTcorp... */
7da4c935 4149 { "TSSTcorp CDDVDW SH-S202[HJN]", "SB0[01]", ATA_HORKAGE_IVB, },
6bbfd53d 4150
9ce8e307
JA
4151 /* Devices that do not need bridging limits applied */
4152 { "MTRON MSP-SATA*", NULL, ATA_HORKAGE_BRIDGE_OK, },
04d0f1b8 4153 { "BUFFALO HD-QSU2/R5", NULL, ATA_HORKAGE_BRIDGE_OK, },
9ce8e307 4154
9062712f
TH
4155 /* Devices which aren't very happy with higher link speeds */
4156 { "WD My Book", NULL, ATA_HORKAGE_1_5_GBPS, },
c531077f 4157 { "Seagate FreeAgent GoFlex", NULL, ATA_HORKAGE_1_5_GBPS, },
9062712f 4158
d0cb43b3
TH
4159 /*
4160 * Devices which choke on SETXFER. Applies only if both the
4161 * device and controller are SATA.
4162 */
cd691876 4163 { "PIONEER DVD-RW DVRTD08", NULL, ATA_HORKAGE_NOSETXFER },
3a25179e
VL
4164 { "PIONEER DVD-RW DVRTD08A", NULL, ATA_HORKAGE_NOSETXFER },
4165 { "PIONEER DVD-RW DVR-215", NULL, ATA_HORKAGE_NOSETXFER },
cd691876
TH
4166 { "PIONEER DVD-RW DVR-212D", NULL, ATA_HORKAGE_NOSETXFER },
4167 { "PIONEER DVD-RW DVR-216D", NULL, ATA_HORKAGE_NOSETXFER },
d0cb43b3 4168
6919a0a6
AC
4169 /* End Marker */
4170 { }
1da177e4 4171};
2e9edbf8 4172
bce036ce
ML
4173/**
4174 * glob_match - match a text string against a glob-style pattern
4175 * @text: the string to be examined
4176 * @pattern: the glob-style pattern to be matched against
4177 *
4178 * Either/both of text and pattern can be empty strings.
4179 *
4180 * Match text against a glob-style pattern, with wildcards and simple sets:
4181 *
4182 * ? matches any single character.
4183 * * matches any run of characters.
4184 * [xyz] matches a single character from the set: x, y, or z.
2f9e4d16
ML
4185 * [a-d] matches a single character from the range: a, b, c, or d.
4186 * [a-d0-9] matches a single character from either range.
bce036ce 4187 *
2f9e4d16
ML
4188 * The special characters ?, [, -, or *, can be matched using a set, eg. [*]
4189 * Behaviour with malformed patterns is undefined, though generally reasonable.
bce036ce 4190 *
3d2be54b 4191 * Sample patterns: "SD1?", "SD1[0-5]", "*R0", "SD*1?[012]*xx"
bce036ce
ML
4192 *
4193 * This function uses one level of recursion per '*' in pattern.
4194 * Since it calls _nothing_ else, and has _no_ explicit local variables,
4195 * this will not cause stack problems for any reasonable use here.
4196 *
4197 * RETURNS:
4198 * 0 on match, 1 otherwise.
4199 */
4200static int glob_match (const char *text, const char *pattern)
539cc7c7 4201{
bce036ce
ML
4202 do {
4203 /* Match single character or a '?' wildcard */
4204 if (*text == *pattern || *pattern == '?') {
4205 if (!*pattern++)
4206 return 0; /* End of both strings: match */
4207 } else {
4208 /* Match single char against a '[' bracketed ']' pattern set */
4209 if (!*text || *pattern != '[')
4210 break; /* Not a pattern set */
2f9e4d16
ML
4211 while (*++pattern && *pattern != ']' && *text != *pattern) {
4212 if (*pattern == '-' && *(pattern - 1) != '[')
4213 if (*text > *(pattern - 1) && *text < *(pattern + 1)) {
4214 ++pattern;
4215 break;
4216 }
4217 }
bce036ce
ML
4218 if (!*pattern || *pattern == ']')
4219 return 1; /* No match */
4220 while (*pattern && *pattern++ != ']');
4221 }
4222 } while (*++text && *pattern);
4223
4224 /* Match any run of chars against a '*' wildcard */
4225 if (*pattern == '*') {
4226 if (!*++pattern)
4227 return 0; /* Match: avoid recursion at end of pattern */
4228 /* Loop to handle additional pattern chars after the wildcard */
4229 while (*text) {
4230 if (glob_match(text, pattern) == 0)
4231 return 0; /* Remainder matched */
4232 ++text; /* Absorb (match) this char and try again */
317b50b8
AP
4233 }
4234 }
bce036ce
ML
4235 if (!*text && !*pattern)
4236 return 0; /* End of both strings: match */
4237 return 1; /* No match */
539cc7c7 4238}
4fca377f 4239
75683fe7 4240static unsigned long ata_dev_blacklisted(const struct ata_device *dev)
1da177e4 4241{
8bfa79fc
TH
4242 unsigned char model_num[ATA_ID_PROD_LEN + 1];
4243 unsigned char model_rev[ATA_ID_FW_REV_LEN + 1];
6919a0a6 4244 const struct ata_blacklist_entry *ad = ata_device_blacklist;
3a778275 4245
8bfa79fc
TH
4246 ata_id_c_string(dev->id, model_num, ATA_ID_PROD, sizeof(model_num));
4247 ata_id_c_string(dev->id, model_rev, ATA_ID_FW_REV, sizeof(model_rev));
1da177e4 4248
6919a0a6 4249 while (ad->model_num) {
bce036ce 4250 if (!glob_match(model_num, ad->model_num)) {
6919a0a6
AC
4251 if (ad->model_rev == NULL)
4252 return ad->horkage;
bce036ce 4253 if (!glob_match(model_rev, ad->model_rev))
6919a0a6 4254 return ad->horkage;
f4b15fef 4255 }
6919a0a6 4256 ad++;
f4b15fef 4257 }
1da177e4
LT
4258 return 0;
4259}
4260
6919a0a6
AC
4261static int ata_dma_blacklisted(const struct ata_device *dev)
4262{
4263 /* We don't support polling DMA.
4264 * DMA blacklist those ATAPI devices with CDB-intr (and use PIO)
4265 * if the LLDD handles only interrupts in the HSM_ST_LAST state.
4266 */
9af5c9c9 4267 if ((dev->link->ap->flags & ATA_FLAG_PIO_POLLING) &&
6919a0a6
AC
4268 (dev->flags & ATA_DFLAG_CDB_INTR))
4269 return 1;
75683fe7 4270 return (dev->horkage & ATA_HORKAGE_NODMA) ? 1 : 0;
6919a0a6
AC
4271}
4272
6bbfd53d
AC
4273/**
4274 * ata_is_40wire - check drive side detection
4275 * @dev: device
4276 *
4277 * Perform drive side detection decoding, allowing for device vendors
4278 * who can't follow the documentation.
4279 */
4280
4281static int ata_is_40wire(struct ata_device *dev)
4282{
4283 if (dev->horkage & ATA_HORKAGE_IVB)
4284 return ata_drive_40wire_relaxed(dev->id);
4285 return ata_drive_40wire(dev->id);
4286}
4287
15a5551c
AC
4288/**
4289 * cable_is_40wire - 40/80/SATA decider
4290 * @ap: port to consider
4291 *
4292 * This function encapsulates the policy for speed management
4293 * in one place. At the moment we don't cache the result but
4294 * there is a good case for setting ap->cbl to the result when
4295 * we are called with unknown cables (and figuring out if it
4296 * impacts hotplug at all).
4297 *
4298 * Return 1 if the cable appears to be 40 wire.
4299 */
4300
4301static int cable_is_40wire(struct ata_port *ap)
4302{
4303 struct ata_link *link;
4304 struct ata_device *dev;
4305
4a9c7b33 4306 /* If the controller thinks we are 40 wire, we are. */
15a5551c
AC
4307 if (ap->cbl == ATA_CBL_PATA40)
4308 return 1;
4a9c7b33
TH
4309
4310 /* If the controller thinks we are 80 wire, we are. */
15a5551c
AC
4311 if (ap->cbl == ATA_CBL_PATA80 || ap->cbl == ATA_CBL_SATA)
4312 return 0;
4a9c7b33
TH
4313
4314 /* If the system is known to be 40 wire short cable (eg
4315 * laptop), then we allow 80 wire modes even if the drive
4316 * isn't sure.
4317 */
f792068e
AC
4318 if (ap->cbl == ATA_CBL_PATA40_SHORT)
4319 return 0;
4a9c7b33
TH
4320
4321 /* If the controller doesn't know, we scan.
4322 *
4323 * Note: We look for all 40 wire detects at this point. Any
4324 * 80 wire detect is taken to be 80 wire cable because
4325 * - in many setups only the one drive (slave if present) will
4326 * give a valid detect
4327 * - if you have a non detect capable drive you don't want it
4328 * to colour the choice
4329 */
1eca4365
TH
4330 ata_for_each_link(link, ap, EDGE) {
4331 ata_for_each_dev(dev, link, ENABLED) {
4332 if (!ata_is_40wire(dev))
15a5551c
AC
4333 return 0;
4334 }
4335 }
4336 return 1;
4337}
4338
a6d5a51c
TH
4339/**
4340 * ata_dev_xfermask - Compute supported xfermask of the given device
a6d5a51c
TH
4341 * @dev: Device to compute xfermask for
4342 *
acf356b1
TH
4343 * Compute supported xfermask of @dev and store it in
4344 * dev->*_mask. This function is responsible for applying all
4345 * known limits including host controller limits, device
4346 * blacklist, etc...
a6d5a51c
TH
4347 *
4348 * LOCKING:
4349 * None.
a6d5a51c 4350 */
3373efd8 4351static void ata_dev_xfermask(struct ata_device *dev)
1da177e4 4352{
9af5c9c9
TH
4353 struct ata_link *link = dev->link;
4354 struct ata_port *ap = link->ap;
cca3974e 4355 struct ata_host *host = ap->host;
a6d5a51c 4356 unsigned long xfer_mask;
1da177e4 4357
37deecb5 4358 /* controller modes available */
565083e1
TH
4359 xfer_mask = ata_pack_xfermask(ap->pio_mask,
4360 ap->mwdma_mask, ap->udma_mask);
4361
8343f889 4362 /* drive modes available */
37deecb5
TH
4363 xfer_mask &= ata_pack_xfermask(dev->pio_mask,
4364 dev->mwdma_mask, dev->udma_mask);
4365 xfer_mask &= ata_id_xfermask(dev->id);
565083e1 4366
b352e57d
AC
4367 /*
4368 * CFA Advanced TrueIDE timings are not allowed on a shared
4369 * cable
4370 */
4371 if (ata_dev_pair(dev)) {
4372 /* No PIO5 or PIO6 */
4373 xfer_mask &= ~(0x03 << (ATA_SHIFT_PIO + 5));
4374 /* No MWDMA3 or MWDMA 4 */
4375 xfer_mask &= ~(0x03 << (ATA_SHIFT_MWDMA + 3));
4376 }
4377
37deecb5
TH
4378 if (ata_dma_blacklisted(dev)) {
4379 xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA);
a9a79dfe
JP
4380 ata_dev_warn(dev,
4381 "device is on DMA blacklist, disabling DMA\n");
37deecb5 4382 }
a6d5a51c 4383
14d66ab7 4384 if ((host->flags & ATA_HOST_SIMPLEX) &&
2dcb407e 4385 host->simplex_claimed && host->simplex_claimed != ap) {
37deecb5 4386 xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA);
a9a79dfe
JP
4387 ata_dev_warn(dev,
4388 "simplex DMA is claimed by other device, disabling DMA\n");
5444a6f4 4389 }
565083e1 4390
e424675f
JG
4391 if (ap->flags & ATA_FLAG_NO_IORDY)
4392 xfer_mask &= ata_pio_mask_no_iordy(dev);
4393
5444a6f4 4394 if (ap->ops->mode_filter)
a76b62ca 4395 xfer_mask = ap->ops->mode_filter(dev, xfer_mask);
5444a6f4 4396
8343f889
RH
4397 /* Apply cable rule here. Don't apply it early because when
4398 * we handle hot plug the cable type can itself change.
4399 * Check this last so that we know if the transfer rate was
4400 * solely limited by the cable.
4401 * Unknown or 80 wire cables reported host side are checked
4402 * drive side as well. Cases where we know a 40wire cable
4403 * is used safely for 80 are not checked here.
4404 */
4405 if (xfer_mask & (0xF8 << ATA_SHIFT_UDMA))
4406 /* UDMA/44 or higher would be available */
15a5551c 4407 if (cable_is_40wire(ap)) {
a9a79dfe
JP
4408 ata_dev_warn(dev,
4409 "limited to UDMA/33 due to 40-wire cable\n");
8343f889
RH
4410 xfer_mask &= ~(0xF8 << ATA_SHIFT_UDMA);
4411 }
4412
565083e1
TH
4413 ata_unpack_xfermask(xfer_mask, &dev->pio_mask,
4414 &dev->mwdma_mask, &dev->udma_mask);
1da177e4
LT
4415}
4416
1da177e4
LT
4417/**
4418 * ata_dev_set_xfermode - Issue SET FEATURES - XFER MODE command
1da177e4
LT
4419 * @dev: Device to which command will be sent
4420 *
780a87f7
JG
4421 * Issue SET FEATURES - XFER MODE command to device @dev
4422 * on port @ap.
4423 *
1da177e4 4424 * LOCKING:
0cba632b 4425 * PCI/etc. bus probe sem.
83206a29
TH
4426 *
4427 * RETURNS:
4428 * 0 on success, AC_ERR_* mask otherwise.
1da177e4
LT
4429 */
4430
3373efd8 4431static unsigned int ata_dev_set_xfermode(struct ata_device *dev)
1da177e4 4432{
a0123703 4433 struct ata_taskfile tf;
83206a29 4434 unsigned int err_mask;
1da177e4
LT
4435
4436 /* set up set-features taskfile */
4437 DPRINTK("set features - xfer mode\n");
4438
464cf177
TH
4439 /* Some controllers and ATAPI devices show flaky interrupt
4440 * behavior after setting xfer mode. Use polling instead.
4441 */
3373efd8 4442 ata_tf_init(dev, &tf);
a0123703
TH
4443 tf.command = ATA_CMD_SET_FEATURES;
4444 tf.feature = SETFEATURES_XFER;
464cf177 4445 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE | ATA_TFLAG_POLLING;
a0123703 4446 tf.protocol = ATA_PROT_NODATA;
b9f8ab2d 4447 /* If we are using IORDY we must send the mode setting command */
11b7becc
JG
4448 if (ata_pio_need_iordy(dev))
4449 tf.nsect = dev->xfer_mode;
b9f8ab2d
AC
4450 /* If the device has IORDY and the controller does not - turn it off */
4451 else if (ata_id_has_iordy(dev->id))
11b7becc 4452 tf.nsect = 0x01;
b9f8ab2d
AC
4453 else /* In the ancient relic department - skip all of this */
4454 return 0;
1da177e4 4455
2b789108 4456 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0, 0);
9f45cbd3
KCA
4457
4458 DPRINTK("EXIT, err_mask=%x\n", err_mask);
4459 return err_mask;
4460}
1152b261 4461
9f45cbd3 4462/**
218f3d30 4463 * ata_dev_set_feature - Issue SET FEATURES - SATA FEATURES
9f45cbd3
KCA
4464 * @dev: Device to which command will be sent
4465 * @enable: Whether to enable or disable the feature
218f3d30 4466 * @feature: The sector count represents the feature to set
9f45cbd3
KCA
4467 *
4468 * Issue SET FEATURES - SATA FEATURES command to device @dev
218f3d30 4469 * on port @ap with sector count
9f45cbd3
KCA
4470 *
4471 * LOCKING:
4472 * PCI/etc. bus probe sem.
4473 *
4474 * RETURNS:
4475 * 0 on success, AC_ERR_* mask otherwise.
4476 */
1152b261 4477unsigned int ata_dev_set_feature(struct ata_device *dev, u8 enable, u8 feature)
9f45cbd3
KCA
4478{
4479 struct ata_taskfile tf;
4480 unsigned int err_mask;
4481
4482 /* set up set-features taskfile */
4483 DPRINTK("set features - SATA features\n");
4484
4485 ata_tf_init(dev, &tf);
4486 tf.command = ATA_CMD_SET_FEATURES;
4487 tf.feature = enable;
4488 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
4489 tf.protocol = ATA_PROT_NODATA;
218f3d30 4490 tf.nsect = feature;
9f45cbd3 4491
2b789108 4492 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0, 0);
1da177e4 4493
83206a29
TH
4494 DPRINTK("EXIT, err_mask=%x\n", err_mask);
4495 return err_mask;
1da177e4 4496}
633de4cc 4497EXPORT_SYMBOL_GPL(ata_dev_set_feature);
1da177e4 4498
8bf62ece
AL
4499/**
4500 * ata_dev_init_params - Issue INIT DEV PARAMS command
8bf62ece 4501 * @dev: Device to which command will be sent
e2a7f77a
RD
4502 * @heads: Number of heads (taskfile parameter)
4503 * @sectors: Number of sectors (taskfile parameter)
8bf62ece
AL
4504 *
4505 * LOCKING:
6aff8f1f
TH
4506 * Kernel thread context (may sleep)
4507 *
4508 * RETURNS:
4509 * 0 on success, AC_ERR_* mask otherwise.
8bf62ece 4510 */
3373efd8
TH
4511static unsigned int ata_dev_init_params(struct ata_device *dev,
4512 u16 heads, u16 sectors)
8bf62ece 4513{
a0123703 4514 struct ata_taskfile tf;
6aff8f1f 4515 unsigned int err_mask;
8bf62ece
AL
4516
4517 /* Number of sectors per track 1-255. Number of heads 1-16 */
4518 if (sectors < 1 || sectors > 255 || heads < 1 || heads > 16)
00b6f5e9 4519 return AC_ERR_INVALID;
8bf62ece
AL
4520
4521 /* set up init dev params taskfile */
4522 DPRINTK("init dev params \n");
4523
3373efd8 4524 ata_tf_init(dev, &tf);
a0123703
TH
4525 tf.command = ATA_CMD_INIT_DEV_PARAMS;
4526 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
4527 tf.protocol = ATA_PROT_NODATA;
4528 tf.nsect = sectors;
4529 tf.device |= (heads - 1) & 0x0f; /* max head = num. of heads - 1 */
8bf62ece 4530
2b789108 4531 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0, 0);
18b2466c
AC
4532 /* A clean abort indicates an original or just out of spec drive
4533 and we should continue as we issue the setup based on the
4534 drive reported working geometry */
4535 if (err_mask == AC_ERR_DEV && (tf.feature & ATA_ABORTED))
4536 err_mask = 0;
8bf62ece 4537
6aff8f1f
TH
4538 DPRINTK("EXIT, err_mask=%x\n", err_mask);
4539 return err_mask;
8bf62ece
AL
4540}
4541
1da177e4 4542/**
0cba632b
JG
4543 * ata_sg_clean - Unmap DMA memory associated with command
4544 * @qc: Command containing DMA memory to be released
4545 *
4546 * Unmap all mapped DMA memory associated with this command.
1da177e4
LT
4547 *
4548 * LOCKING:
cca3974e 4549 * spin_lock_irqsave(host lock)
1da177e4 4550 */
70e6ad0c 4551void ata_sg_clean(struct ata_queued_cmd *qc)
1da177e4
LT
4552{
4553 struct ata_port *ap = qc->ap;
ff2aeb1e 4554 struct scatterlist *sg = qc->sg;
1da177e4
LT
4555 int dir = qc->dma_dir;
4556
efcb3cf7 4557 WARN_ON_ONCE(sg == NULL);
1da177e4 4558
dde20207 4559 VPRINTK("unmapping %u sg elements\n", qc->n_elem);
1da177e4 4560
dde20207 4561 if (qc->n_elem)
5825627c 4562 dma_unmap_sg(ap->dev, sg, qc->orig_n_elem, dir);
1da177e4
LT
4563
4564 qc->flags &= ~ATA_QCFLAG_DMAMAP;
ff2aeb1e 4565 qc->sg = NULL;
1da177e4
LT
4566}
4567
1da177e4 4568/**
5895ef9a 4569 * atapi_check_dma - Check whether ATAPI DMA can be supported
1da177e4
LT
4570 * @qc: Metadata associated with taskfile to check
4571 *
780a87f7
JG
4572 * Allow low-level driver to filter ATA PACKET commands, returning
4573 * a status indicating whether or not it is OK to use DMA for the
4574 * supplied PACKET command.
4575 *
1da177e4 4576 * LOCKING:
624d5c51
TH
4577 * spin_lock_irqsave(host lock)
4578 *
4579 * RETURNS: 0 when ATAPI DMA can be used
4580 * nonzero otherwise
4581 */
5895ef9a 4582int atapi_check_dma(struct ata_queued_cmd *qc)
624d5c51
TH
4583{
4584 struct ata_port *ap = qc->ap;
71601958 4585
624d5c51
TH
4586 /* Don't allow DMA if it isn't multiple of 16 bytes. Quite a
4587 * few ATAPI devices choke on such DMA requests.
4588 */
6a87e42e
TH
4589 if (!(qc->dev->horkage & ATA_HORKAGE_ATAPI_MOD16_DMA) &&
4590 unlikely(qc->nbytes & 15))
624d5c51 4591 return 1;
e2cec771 4592
624d5c51
TH
4593 if (ap->ops->check_atapi_dma)
4594 return ap->ops->check_atapi_dma(qc);
e2cec771 4595
624d5c51
TH
4596 return 0;
4597}
1da177e4 4598
624d5c51
TH
4599/**
4600 * ata_std_qc_defer - Check whether a qc needs to be deferred
4601 * @qc: ATA command in question
4602 *
4603 * Non-NCQ commands cannot run with any other command, NCQ or
4604 * not. As upper layer only knows the queue depth, we are
4605 * responsible for maintaining exclusion. This function checks
4606 * whether a new command @qc can be issued.
4607 *
4608 * LOCKING:
4609 * spin_lock_irqsave(host lock)
4610 *
4611 * RETURNS:
4612 * ATA_DEFER_* if deferring is needed, 0 otherwise.
4613 */
4614int ata_std_qc_defer(struct ata_queued_cmd *qc)
4615{
4616 struct ata_link *link = qc->dev->link;
e2cec771 4617
624d5c51
TH
4618 if (qc->tf.protocol == ATA_PROT_NCQ) {
4619 if (!ata_tag_valid(link->active_tag))
4620 return 0;
4621 } else {
4622 if (!ata_tag_valid(link->active_tag) && !link->sactive)
4623 return 0;
4624 }
e2cec771 4625
624d5c51
TH
4626 return ATA_DEFER_LINK;
4627}
6912ccd5 4628
624d5c51 4629void ata_noop_qc_prep(struct ata_queued_cmd *qc) { }
1da177e4 4630
624d5c51
TH
4631/**
4632 * ata_sg_init - Associate command with scatter-gather table.
4633 * @qc: Command to be associated
4634 * @sg: Scatter-gather table.
4635 * @n_elem: Number of elements in s/g table.
4636 *
4637 * Initialize the data-related elements of queued_cmd @qc
4638 * to point to a scatter-gather table @sg, containing @n_elem
4639 * elements.
4640 *
4641 * LOCKING:
4642 * spin_lock_irqsave(host lock)
4643 */
4644void ata_sg_init(struct ata_queued_cmd *qc, struct scatterlist *sg,
4645 unsigned int n_elem)
4646{
4647 qc->sg = sg;
4648 qc->n_elem = n_elem;
4649 qc->cursg = qc->sg;
4650}
bb5cb290 4651
624d5c51
TH
4652/**
4653 * ata_sg_setup - DMA-map the scatter-gather table associated with a command.
4654 * @qc: Command with scatter-gather table to be mapped.
4655 *
4656 * DMA-map the scatter-gather table associated with queued_cmd @qc.
4657 *
4658 * LOCKING:
4659 * spin_lock_irqsave(host lock)
4660 *
4661 * RETURNS:
4662 * Zero on success, negative on error.
4663 *
4664 */
4665static int ata_sg_setup(struct ata_queued_cmd *qc)
4666{
4667 struct ata_port *ap = qc->ap;
4668 unsigned int n_elem;
1da177e4 4669
624d5c51 4670 VPRINTK("ENTER, ata%u\n", ap->print_id);
e2cec771 4671
624d5c51
TH
4672 n_elem = dma_map_sg(ap->dev, qc->sg, qc->n_elem, qc->dma_dir);
4673 if (n_elem < 1)
4674 return -1;
bb5cb290 4675
624d5c51 4676 DPRINTK("%d sg elements mapped\n", n_elem);
5825627c 4677 qc->orig_n_elem = qc->n_elem;
624d5c51
TH
4678 qc->n_elem = n_elem;
4679 qc->flags |= ATA_QCFLAG_DMAMAP;
1da177e4 4680
624d5c51 4681 return 0;
1da177e4
LT
4682}
4683
624d5c51
TH
4684/**
4685 * swap_buf_le16 - swap halves of 16-bit words in place
4686 * @buf: Buffer to swap
4687 * @buf_words: Number of 16-bit words in buffer.
4688 *
4689 * Swap halves of 16-bit words if needed to convert from
4690 * little-endian byte order to native cpu byte order, or
4691 * vice-versa.
4692 *
4693 * LOCKING:
4694 * Inherited from caller.
4695 */
4696void swap_buf_le16(u16 *buf, unsigned int buf_words)
8061f5f0 4697{
624d5c51
TH
4698#ifdef __BIG_ENDIAN
4699 unsigned int i;
8061f5f0 4700
624d5c51
TH
4701 for (i = 0; i < buf_words; i++)
4702 buf[i] = le16_to_cpu(buf[i]);
4703#endif /* __BIG_ENDIAN */
8061f5f0
TH
4704}
4705
8a8bc223
TH
4706/**
4707 * ata_qc_new - Request an available ATA command, for queueing
5eb66fe0 4708 * @ap: target port
8a8bc223
TH
4709 *
4710 * LOCKING:
4711 * None.
4712 */
4713
4714static struct ata_queued_cmd *ata_qc_new(struct ata_port *ap)
4715{
4716 struct ata_queued_cmd *qc = NULL;
4717 unsigned int i;
4718
4719 /* no command while frozen */
4720 if (unlikely(ap->pflags & ATA_PFLAG_FROZEN))
4721 return NULL;
4722
4723 /* the last tag is reserved for internal command. */
4724 for (i = 0; i < ATA_MAX_QUEUE - 1; i++)
4725 if (!test_and_set_bit(i, &ap->qc_allocated)) {
4726 qc = __ata_qc_from_tag(ap, i);
4727 break;
4728 }
4729
4730 if (qc)
4731 qc->tag = i;
4732
4733 return qc;
4734}
4735
1da177e4
LT
4736/**
4737 * ata_qc_new_init - Request an available ATA command, and initialize it
1da177e4
LT
4738 * @dev: Device from whom we request an available command structure
4739 *
4740 * LOCKING:
0cba632b 4741 * None.
1da177e4
LT
4742 */
4743
8a8bc223 4744struct ata_queued_cmd *ata_qc_new_init(struct ata_device *dev)
1da177e4 4745{
9af5c9c9 4746 struct ata_port *ap = dev->link->ap;
1da177e4
LT
4747 struct ata_queued_cmd *qc;
4748
8a8bc223 4749 qc = ata_qc_new(ap);
1da177e4 4750 if (qc) {
1da177e4
LT
4751 qc->scsicmd = NULL;
4752 qc->ap = ap;
4753 qc->dev = dev;
1da177e4 4754
2c13b7ce 4755 ata_qc_reinit(qc);
1da177e4
LT
4756 }
4757
4758 return qc;
4759}
4760
8a8bc223
TH
4761/**
4762 * ata_qc_free - free unused ata_queued_cmd
4763 * @qc: Command to complete
4764 *
4765 * Designed to free unused ata_queued_cmd object
4766 * in case something prevents using it.
4767 *
4768 * LOCKING:
4769 * spin_lock_irqsave(host lock)
4770 */
4771void ata_qc_free(struct ata_queued_cmd *qc)
4772{
a1104016 4773 struct ata_port *ap;
8a8bc223
TH
4774 unsigned int tag;
4775
efcb3cf7 4776 WARN_ON_ONCE(qc == NULL); /* ata_qc_from_tag _might_ return NULL */
a1104016 4777 ap = qc->ap;
8a8bc223
TH
4778
4779 qc->flags = 0;
4780 tag = qc->tag;
4781 if (likely(ata_tag_valid(tag))) {
4782 qc->tag = ATA_TAG_POISON;
4783 clear_bit(tag, &ap->qc_allocated);
4784 }
4785}
4786
76014427 4787void __ata_qc_complete(struct ata_queued_cmd *qc)
1da177e4 4788{
a1104016
JL
4789 struct ata_port *ap;
4790 struct ata_link *link;
dedaf2b0 4791
efcb3cf7
TH
4792 WARN_ON_ONCE(qc == NULL); /* ata_qc_from_tag _might_ return NULL */
4793 WARN_ON_ONCE(!(qc->flags & ATA_QCFLAG_ACTIVE));
a1104016
JL
4794 ap = qc->ap;
4795 link = qc->dev->link;
1da177e4
LT
4796
4797 if (likely(qc->flags & ATA_QCFLAG_DMAMAP))
4798 ata_sg_clean(qc);
4799
7401abf2 4800 /* command should be marked inactive atomically with qc completion */
da917d69 4801 if (qc->tf.protocol == ATA_PROT_NCQ) {
9af5c9c9 4802 link->sactive &= ~(1 << qc->tag);
da917d69
TH
4803 if (!link->sactive)
4804 ap->nr_active_links--;
4805 } else {
9af5c9c9 4806 link->active_tag = ATA_TAG_POISON;
da917d69
TH
4807 ap->nr_active_links--;
4808 }
4809
4810 /* clear exclusive status */
4811 if (unlikely(qc->flags & ATA_QCFLAG_CLEAR_EXCL &&
4812 ap->excl_link == link))
4813 ap->excl_link = NULL;
7401abf2 4814
3f3791d3
AL
4815 /* atapi: mark qc as inactive to prevent the interrupt handler
4816 * from completing the command twice later, before the error handler
4817 * is called. (when rc != 0 and atapi request sense is needed)
4818 */
4819 qc->flags &= ~ATA_QCFLAG_ACTIVE;
dedaf2b0 4820 ap->qc_active &= ~(1 << qc->tag);
3f3791d3 4821
1da177e4 4822 /* call completion callback */
77853bf2 4823 qc->complete_fn(qc);
1da177e4
LT
4824}
4825
39599a53
TH
4826static void fill_result_tf(struct ata_queued_cmd *qc)
4827{
4828 struct ata_port *ap = qc->ap;
4829
39599a53 4830 qc->result_tf.flags = qc->tf.flags;
22183bf5 4831 ap->ops->qc_fill_rtf(qc);
39599a53
TH
4832}
4833
00115e0f
TH
4834static void ata_verify_xfer(struct ata_queued_cmd *qc)
4835{
4836 struct ata_device *dev = qc->dev;
4837
00115e0f
TH
4838 if (ata_is_nodata(qc->tf.protocol))
4839 return;
4840
4841 if ((dev->mwdma_mask || dev->udma_mask) && ata_is_pio(qc->tf.protocol))
4842 return;
4843
4844 dev->flags &= ~ATA_DFLAG_DUBIOUS_XFER;
4845}
4846
f686bcb8
TH
4847/**
4848 * ata_qc_complete - Complete an active ATA command
4849 * @qc: Command to complete
f686bcb8 4850 *
1aadf5c3
TH
4851 * Indicate to the mid and upper layers that an ATA command has
4852 * completed, with either an ok or not-ok status.
4853 *
4854 * Refrain from calling this function multiple times when
4855 * successfully completing multiple NCQ commands.
4856 * ata_qc_complete_multiple() should be used instead, which will
4857 * properly update IRQ expect state.
f686bcb8
TH
4858 *
4859 * LOCKING:
cca3974e 4860 * spin_lock_irqsave(host lock)
f686bcb8
TH
4861 */
4862void ata_qc_complete(struct ata_queued_cmd *qc)
4863{
4864 struct ata_port *ap = qc->ap;
4865
4866 /* XXX: New EH and old EH use different mechanisms to
4867 * synchronize EH with regular execution path.
4868 *
4869 * In new EH, a failed qc is marked with ATA_QCFLAG_FAILED.
4870 * Normal execution path is responsible for not accessing a
4871 * failed qc. libata core enforces the rule by returning NULL
4872 * from ata_qc_from_tag() for failed qcs.
4873 *
4874 * Old EH depends on ata_qc_complete() nullifying completion
4875 * requests if ATA_QCFLAG_EH_SCHEDULED is set. Old EH does
4876 * not synchronize with interrupt handler. Only PIO task is
4877 * taken care of.
4878 */
4879 if (ap->ops->error_handler) {
4dbfa39b
TH
4880 struct ata_device *dev = qc->dev;
4881 struct ata_eh_info *ehi = &dev->link->eh_info;
4882
f686bcb8
TH
4883 if (unlikely(qc->err_mask))
4884 qc->flags |= ATA_QCFLAG_FAILED;
4885
f08dc1ac
TH
4886 /*
4887 * Finish internal commands without any further processing
4888 * and always with the result TF filled.
4889 */
4890 if (unlikely(ata_tag_internal(qc->tag))) {
f4b31db9 4891 fill_result_tf(qc);
f08dc1ac
TH
4892 __ata_qc_complete(qc);
4893 return;
4894 }
f4b31db9 4895
f08dc1ac
TH
4896 /*
4897 * Non-internal qc has failed. Fill the result TF and
4898 * summon EH.
4899 */
4900 if (unlikely(qc->flags & ATA_QCFLAG_FAILED)) {
4901 fill_result_tf(qc);
4902 ata_qc_schedule_eh(qc);
f4b31db9 4903 return;
f686bcb8
TH
4904 }
4905
4dc738ed
TH
4906 WARN_ON_ONCE(ap->pflags & ATA_PFLAG_FROZEN);
4907
f686bcb8
TH
4908 /* read result TF if requested */
4909 if (qc->flags & ATA_QCFLAG_RESULT_TF)
39599a53 4910 fill_result_tf(qc);
f686bcb8 4911
4dbfa39b
TH
4912 /* Some commands need post-processing after successful
4913 * completion.
4914 */
4915 switch (qc->tf.command) {
4916 case ATA_CMD_SET_FEATURES:
4917 if (qc->tf.feature != SETFEATURES_WC_ON &&
4918 qc->tf.feature != SETFEATURES_WC_OFF)
4919 break;
4920 /* fall through */
4921 case ATA_CMD_INIT_DEV_PARAMS: /* CHS translation changed */
4922 case ATA_CMD_SET_MULTI: /* multi_count changed */
4923 /* revalidate device */
4924 ehi->dev_action[dev->devno] |= ATA_EH_REVALIDATE;
4925 ata_port_schedule_eh(ap);
4926 break;
054a5fba
TH
4927
4928 case ATA_CMD_SLEEP:
4929 dev->flags |= ATA_DFLAG_SLEEPING;
4930 break;
4dbfa39b
TH
4931 }
4932
00115e0f
TH
4933 if (unlikely(dev->flags & ATA_DFLAG_DUBIOUS_XFER))
4934 ata_verify_xfer(qc);
4935
f686bcb8
TH
4936 __ata_qc_complete(qc);
4937 } else {
4938 if (qc->flags & ATA_QCFLAG_EH_SCHEDULED)
4939 return;
4940
4941 /* read result TF if failed or requested */
4942 if (qc->err_mask || qc->flags & ATA_QCFLAG_RESULT_TF)
39599a53 4943 fill_result_tf(qc);
f686bcb8
TH
4944
4945 __ata_qc_complete(qc);
4946 }
4947}
4948
dedaf2b0
TH
4949/**
4950 * ata_qc_complete_multiple - Complete multiple qcs successfully
4951 * @ap: port in question
4952 * @qc_active: new qc_active mask
dedaf2b0
TH
4953 *
4954 * Complete in-flight commands. This functions is meant to be
4955 * called from low-level driver's interrupt routine to complete
4956 * requests normally. ap->qc_active and @qc_active is compared
4957 * and commands are completed accordingly.
4958 *
1aadf5c3
TH
4959 * Always use this function when completing multiple NCQ commands
4960 * from IRQ handlers instead of calling ata_qc_complete()
4961 * multiple times to keep IRQ expect status properly in sync.
4962 *
dedaf2b0 4963 * LOCKING:
cca3974e 4964 * spin_lock_irqsave(host lock)
dedaf2b0
TH
4965 *
4966 * RETURNS:
4967 * Number of completed commands on success, -errno otherwise.
4968 */
79f97dad 4969int ata_qc_complete_multiple(struct ata_port *ap, u32 qc_active)
dedaf2b0
TH
4970{
4971 int nr_done = 0;
4972 u32 done_mask;
dedaf2b0
TH
4973
4974 done_mask = ap->qc_active ^ qc_active;
4975
4976 if (unlikely(done_mask & qc_active)) {
a9a79dfe
JP
4977 ata_port_err(ap, "illegal qc_active transition (%08x->%08x)\n",
4978 ap->qc_active, qc_active);
dedaf2b0
TH
4979 return -EINVAL;
4980 }
4981
43768180 4982 while (done_mask) {
dedaf2b0 4983 struct ata_queued_cmd *qc;
43768180 4984 unsigned int tag = __ffs(done_mask);
dedaf2b0 4985
43768180
JA
4986 qc = ata_qc_from_tag(ap, tag);
4987 if (qc) {
dedaf2b0
TH
4988 ata_qc_complete(qc);
4989 nr_done++;
4990 }
43768180 4991 done_mask &= ~(1 << tag);
dedaf2b0
TH
4992 }
4993
4994 return nr_done;
4995}
4996
1da177e4
LT
4997/**
4998 * ata_qc_issue - issue taskfile to device
4999 * @qc: command to issue to device
5000 *
5001 * Prepare an ATA command to submission to device.
5002 * This includes mapping the data into a DMA-able
5003 * area, filling in the S/G table, and finally
5004 * writing the taskfile to hardware, starting the command.
5005 *
5006 * LOCKING:
cca3974e 5007 * spin_lock_irqsave(host lock)
1da177e4 5008 */
8e0e694a 5009void ata_qc_issue(struct ata_queued_cmd *qc)
1da177e4
LT
5010{
5011 struct ata_port *ap = qc->ap;
9af5c9c9 5012 struct ata_link *link = qc->dev->link;
405e66b3 5013 u8 prot = qc->tf.protocol;
1da177e4 5014
dedaf2b0
TH
5015 /* Make sure only one non-NCQ command is outstanding. The
5016 * check is skipped for old EH because it reuses active qc to
5017 * request ATAPI sense.
5018 */
efcb3cf7 5019 WARN_ON_ONCE(ap->ops->error_handler && ata_tag_valid(link->active_tag));
dedaf2b0 5020
1973a023 5021 if (ata_is_ncq(prot)) {
efcb3cf7 5022 WARN_ON_ONCE(link->sactive & (1 << qc->tag));
da917d69
TH
5023
5024 if (!link->sactive)
5025 ap->nr_active_links++;
9af5c9c9 5026 link->sactive |= 1 << qc->tag;
dedaf2b0 5027 } else {
efcb3cf7 5028 WARN_ON_ONCE(link->sactive);
da917d69
TH
5029
5030 ap->nr_active_links++;
9af5c9c9 5031 link->active_tag = qc->tag;
dedaf2b0
TH
5032 }
5033
e4a70e76 5034 qc->flags |= ATA_QCFLAG_ACTIVE;
dedaf2b0 5035 ap->qc_active |= 1 << qc->tag;
e4a70e76 5036
60f5d6ef
TH
5037 /*
5038 * We guarantee to LLDs that they will have at least one
f92a2636
TH
5039 * non-zero sg if the command is a data command.
5040 */
60f5d6ef
TH
5041 if (WARN_ON_ONCE(ata_is_data(prot) &&
5042 (!qc->sg || !qc->n_elem || !qc->nbytes)))
5043 goto sys_err;
f92a2636 5044
405e66b3 5045 if (ata_is_dma(prot) || (ata_is_pio(prot) &&
f92a2636 5046 (ap->flags & ATA_FLAG_PIO_DMA)))
001102d7 5047 if (ata_sg_setup(qc))
60f5d6ef 5048 goto sys_err;
1da177e4 5049
cf480626 5050 /* if device is sleeping, schedule reset and abort the link */
054a5fba 5051 if (unlikely(qc->dev->flags & ATA_DFLAG_SLEEPING)) {
cf480626 5052 link->eh_info.action |= ATA_EH_RESET;
054a5fba
TH
5053 ata_ehi_push_desc(&link->eh_info, "waking up from sleep");
5054 ata_link_abort(link);
5055 return;
5056 }
5057
1da177e4
LT
5058 ap->ops->qc_prep(qc);
5059
8e0e694a
TH
5060 qc->err_mask |= ap->ops->qc_issue(qc);
5061 if (unlikely(qc->err_mask))
5062 goto err;
5063 return;
1da177e4 5064
60f5d6ef 5065sys_err:
8e0e694a
TH
5066 qc->err_mask |= AC_ERR_SYSTEM;
5067err:
5068 ata_qc_complete(qc);
1da177e4
LT
5069}
5070
34bf2170
TH
5071/**
5072 * sata_scr_valid - test whether SCRs are accessible
936fd732 5073 * @link: ATA link to test SCR accessibility for
34bf2170 5074 *
936fd732 5075 * Test whether SCRs are accessible for @link.
34bf2170
TH
5076 *
5077 * LOCKING:
5078 * None.
5079 *
5080 * RETURNS:
5081 * 1 if SCRs are accessible, 0 otherwise.
5082 */
936fd732 5083int sata_scr_valid(struct ata_link *link)
34bf2170 5084{
936fd732
TH
5085 struct ata_port *ap = link->ap;
5086
a16abc0b 5087 return (ap->flags & ATA_FLAG_SATA) && ap->ops->scr_read;
34bf2170
TH
5088}
5089
5090/**
5091 * sata_scr_read - read SCR register of the specified port
936fd732 5092 * @link: ATA link to read SCR for
34bf2170
TH
5093 * @reg: SCR to read
5094 * @val: Place to store read value
5095 *
936fd732 5096 * Read SCR register @reg of @link into *@val. This function is
633273a3
TH
5097 * guaranteed to succeed if @link is ap->link, the cable type of
5098 * the port is SATA and the port implements ->scr_read.
34bf2170
TH
5099 *
5100 * LOCKING:
633273a3 5101 * None if @link is ap->link. Kernel thread context otherwise.
34bf2170
TH
5102 *
5103 * RETURNS:
5104 * 0 on success, negative errno on failure.
5105 */
936fd732 5106int sata_scr_read(struct ata_link *link, int reg, u32 *val)
34bf2170 5107{
633273a3 5108 if (ata_is_host_link(link)) {
633273a3 5109 if (sata_scr_valid(link))
82ef04fb 5110 return link->ap->ops->scr_read(link, reg, val);
633273a3
TH
5111 return -EOPNOTSUPP;
5112 }
5113
5114 return sata_pmp_scr_read(link, reg, val);
34bf2170
TH
5115}
5116
5117/**
5118 * sata_scr_write - write SCR register of the specified port
936fd732 5119 * @link: ATA link to write SCR for
34bf2170
TH
5120 * @reg: SCR to write
5121 * @val: value to write
5122 *
936fd732 5123 * Write @val to SCR register @reg of @link. This function is
633273a3
TH
5124 * guaranteed to succeed if @link is ap->link, the cable type of
5125 * the port is SATA and the port implements ->scr_read.
34bf2170
TH
5126 *
5127 * LOCKING:
633273a3 5128 * None if @link is ap->link. Kernel thread context otherwise.
34bf2170
TH
5129 *
5130 * RETURNS:
5131 * 0 on success, negative errno on failure.
5132 */
936fd732 5133int sata_scr_write(struct ata_link *link, int reg, u32 val)
34bf2170 5134{
633273a3 5135 if (ata_is_host_link(link)) {
633273a3 5136 if (sata_scr_valid(link))
82ef04fb 5137 return link->ap->ops->scr_write(link, reg, val);
633273a3
TH
5138 return -EOPNOTSUPP;
5139 }
936fd732 5140
633273a3 5141 return sata_pmp_scr_write(link, reg, val);
34bf2170
TH
5142}
5143
5144/**
5145 * sata_scr_write_flush - write SCR register of the specified port and flush
936fd732 5146 * @link: ATA link to write SCR for
34bf2170
TH
5147 * @reg: SCR to write
5148 * @val: value to write
5149 *
5150 * This function is identical to sata_scr_write() except that this
5151 * function performs flush after writing to the register.
5152 *
5153 * LOCKING:
633273a3 5154 * None if @link is ap->link. Kernel thread context otherwise.
34bf2170
TH
5155 *
5156 * RETURNS:
5157 * 0 on success, negative errno on failure.
5158 */
936fd732 5159int sata_scr_write_flush(struct ata_link *link, int reg, u32 val)
34bf2170 5160{
633273a3 5161 if (ata_is_host_link(link)) {
633273a3 5162 int rc;
da3dbb17 5163
633273a3 5164 if (sata_scr_valid(link)) {
82ef04fb 5165 rc = link->ap->ops->scr_write(link, reg, val);
633273a3 5166 if (rc == 0)
82ef04fb 5167 rc = link->ap->ops->scr_read(link, reg, &val);
633273a3
TH
5168 return rc;
5169 }
5170 return -EOPNOTSUPP;
34bf2170 5171 }
633273a3
TH
5172
5173 return sata_pmp_scr_write(link, reg, val);
34bf2170
TH
5174}
5175
5176/**
b1c72916 5177 * ata_phys_link_online - test whether the given link is online
936fd732 5178 * @link: ATA link to test
34bf2170 5179 *
936fd732
TH
5180 * Test whether @link is online. Note that this function returns
5181 * 0 if online status of @link cannot be obtained, so
5182 * ata_link_online(link) != !ata_link_offline(link).
34bf2170
TH
5183 *
5184 * LOCKING:
5185 * None.
5186 *
5187 * RETURNS:
b5b3fa38 5188 * True if the port online status is available and online.
34bf2170 5189 */
b1c72916 5190bool ata_phys_link_online(struct ata_link *link)
34bf2170
TH
5191{
5192 u32 sstatus;
5193
936fd732 5194 if (sata_scr_read(link, SCR_STATUS, &sstatus) == 0 &&
9913ff8a 5195 ata_sstatus_online(sstatus))
b5b3fa38
TH
5196 return true;
5197 return false;
34bf2170
TH
5198}
5199
5200/**
b1c72916 5201 * ata_phys_link_offline - test whether the given link is offline
936fd732 5202 * @link: ATA link to test
34bf2170 5203 *
936fd732
TH
5204 * Test whether @link is offline. Note that this function
5205 * returns 0 if offline status of @link cannot be obtained, so
5206 * ata_link_online(link) != !ata_link_offline(link).
34bf2170
TH
5207 *
5208 * LOCKING:
5209 * None.
5210 *
5211 * RETURNS:
b5b3fa38 5212 * True if the port offline status is available and offline.
34bf2170 5213 */
b1c72916 5214bool ata_phys_link_offline(struct ata_link *link)
34bf2170
TH
5215{
5216 u32 sstatus;
5217
936fd732 5218 if (sata_scr_read(link, SCR_STATUS, &sstatus) == 0 &&
9913ff8a 5219 !ata_sstatus_online(sstatus))
b5b3fa38
TH
5220 return true;
5221 return false;
34bf2170 5222}
0baab86b 5223
b1c72916
TH
5224/**
5225 * ata_link_online - test whether the given link is online
5226 * @link: ATA link to test
5227 *
5228 * Test whether @link is online. This is identical to
5229 * ata_phys_link_online() when there's no slave link. When
5230 * there's a slave link, this function should only be called on
5231 * the master link and will return true if any of M/S links is
5232 * online.
5233 *
5234 * LOCKING:
5235 * None.
5236 *
5237 * RETURNS:
5238 * True if the port online status is available and online.
5239 */
5240bool ata_link_online(struct ata_link *link)
5241{
5242 struct ata_link *slave = link->ap->slave_link;
5243
5244 WARN_ON(link == slave); /* shouldn't be called on slave link */
5245
5246 return ata_phys_link_online(link) ||
5247 (slave && ata_phys_link_online(slave));
5248}
5249
5250/**
5251 * ata_link_offline - test whether the given link is offline
5252 * @link: ATA link to test
5253 *
5254 * Test whether @link is offline. This is identical to
5255 * ata_phys_link_offline() when there's no slave link. When
5256 * there's a slave link, this function should only be called on
5257 * the master link and will return true if both M/S links are
5258 * offline.
5259 *
5260 * LOCKING:
5261 * None.
5262 *
5263 * RETURNS:
5264 * True if the port offline status is available and offline.
5265 */
5266bool ata_link_offline(struct ata_link *link)
5267{
5268 struct ata_link *slave = link->ap->slave_link;
5269
5270 WARN_ON(link == slave); /* shouldn't be called on slave link */
5271
5272 return ata_phys_link_offline(link) &&
5273 (!slave || ata_phys_link_offline(slave));
5274}
5275
6ffa01d8 5276#ifdef CONFIG_PM
5ef41082 5277static int ata_port_request_pm(struct ata_port *ap, pm_message_t mesg,
cca3974e 5278 unsigned int action, unsigned int ehi_flags,
2fcbdcb4 5279 int *async)
500530f6 5280{
5ef41082 5281 struct ata_link *link;
500530f6 5282 unsigned long flags;
2fcbdcb4 5283 int rc = 0;
500530f6 5284
5ef41082
LM
5285 /* Previous resume operation might still be in
5286 * progress. Wait for PM_PENDING to clear.
5287 */
5288 if (ap->pflags & ATA_PFLAG_PM_PENDING) {
2fcbdcb4
DW
5289 if (async) {
5290 *async = -EAGAIN;
5291 return 0;
5292 }
5ef41082
LM
5293 ata_port_wait_eh(ap);
5294 WARN_ON(ap->pflags & ATA_PFLAG_PM_PENDING);
5295 }
500530f6 5296
5ef41082
LM
5297 /* request PM ops to EH */
5298 spin_lock_irqsave(ap->lock, flags);
500530f6 5299
5ef41082 5300 ap->pm_mesg = mesg;
2fcbdcb4
DW
5301 if (async)
5302 ap->pm_result = async;
5303 else
5ef41082 5304 ap->pm_result = &rc;
500530f6 5305
5ef41082
LM
5306 ap->pflags |= ATA_PFLAG_PM_PENDING;
5307 ata_for_each_link(link, ap, HOST_FIRST) {
5308 link->eh_info.action |= action;
5309 link->eh_info.flags |= ehi_flags;
5310 }
500530f6 5311
5ef41082 5312 ata_port_schedule_eh(ap);
500530f6 5313
5ef41082 5314 spin_unlock_irqrestore(ap->lock, flags);
500530f6 5315
5ef41082 5316 /* wait and check result */
2fcbdcb4 5317 if (!async) {
5ef41082
LM
5318 ata_port_wait_eh(ap);
5319 WARN_ON(ap->pflags & ATA_PFLAG_PM_PENDING);
500530f6
TH
5320 }
5321
5ef41082 5322 return rc;
500530f6
TH
5323}
5324
2fcbdcb4 5325static int __ata_port_suspend_common(struct ata_port *ap, pm_message_t mesg, int *async)
5ef41082 5326{
33574d68 5327 unsigned int ehi_flags = ATA_EHI_QUIET;
5ef41082
LM
5328 int rc;
5329
33574d68
LM
5330 /*
5331 * On some hardware, device fails to respond after spun down
5332 * for suspend. As the device won't be used before being
5333 * resumed, we don't need to touch the device. Ask EH to skip
5334 * the usual stuff and proceed directly to suspend.
5335 *
5336 * http://thread.gmane.org/gmane.linux.ide/46764
5337 */
5338 if (mesg.event == PM_EVENT_SUSPEND)
5339 ehi_flags |= ATA_EHI_NO_AUTOPSY | ATA_EHI_NO_RECOVERY;
5340
2fcbdcb4 5341 rc = ata_port_request_pm(ap, mesg, 0, ehi_flags, async);
5ef41082
LM
5342 return rc;
5343}
5344
2fcbdcb4
DW
5345static int ata_port_suspend_common(struct device *dev, pm_message_t mesg)
5346{
5347 struct ata_port *ap = to_ata_port(dev);
5348
5349 return __ata_port_suspend_common(ap, mesg, NULL);
5350}
5351
5ef41082
LM
5352static int ata_port_suspend(struct device *dev)
5353{
5354 if (pm_runtime_suspended(dev))
5355 return 0;
5356
33574d68
LM
5357 return ata_port_suspend_common(dev, PMSG_SUSPEND);
5358}
5359
5360static int ata_port_do_freeze(struct device *dev)
5361{
5362 if (pm_runtime_suspended(dev))
5363 pm_runtime_resume(dev);
5364
5365 return ata_port_suspend_common(dev, PMSG_FREEZE);
5366}
5367
5368static int ata_port_poweroff(struct device *dev)
5369{
5370 if (pm_runtime_suspended(dev))
5371 return 0;
5372
5373 return ata_port_suspend_common(dev, PMSG_HIBERNATE);
5ef41082
LM
5374}
5375
2fcbdcb4 5376static int __ata_port_resume_common(struct ata_port *ap, int *async)
5ef41082 5377{
5ef41082
LM
5378 int rc;
5379
5380 rc = ata_port_request_pm(ap, PMSG_ON, ATA_EH_RESET,
2fcbdcb4 5381 ATA_EHI_NO_AUTOPSY | ATA_EHI_QUIET, async);
5ef41082
LM
5382 return rc;
5383}
5384
2fcbdcb4
DW
5385static int ata_port_resume_common(struct device *dev)
5386{
5387 struct ata_port *ap = to_ata_port(dev);
5388
5389 return __ata_port_resume_common(ap, NULL);
5390}
5391
e90b1e5a
LM
5392static int ata_port_resume(struct device *dev)
5393{
5394 int rc;
5395
5396 rc = ata_port_resume_common(dev);
5397 if (!rc) {
5398 pm_runtime_disable(dev);
5399 pm_runtime_set_active(dev);
5400 pm_runtime_enable(dev);
5401 }
5402
5403 return rc;
5404}
5405
9ee4f393
LM
5406static int ata_port_runtime_idle(struct device *dev)
5407{
5408 return pm_runtime_suspend(dev);
5409}
5410
5ef41082
LM
5411static const struct dev_pm_ops ata_port_pm_ops = {
5412 .suspend = ata_port_suspend,
5413 .resume = ata_port_resume,
33574d68
LM
5414 .freeze = ata_port_do_freeze,
5415 .thaw = ata_port_resume,
5416 .poweroff = ata_port_poweroff,
5417 .restore = ata_port_resume,
9ee4f393 5418
33574d68 5419 .runtime_suspend = ata_port_suspend,
e90b1e5a 5420 .runtime_resume = ata_port_resume_common,
9ee4f393 5421 .runtime_idle = ata_port_runtime_idle,
5ef41082
LM
5422};
5423
2fcbdcb4
DW
5424/* sas ports don't participate in pm runtime management of ata_ports,
5425 * and need to resume ata devices at the domain level, not the per-port
5426 * level. sas suspend/resume is async to allow parallel port recovery
5427 * since sas has multiple ata_port instances per Scsi_Host.
5428 */
5429int ata_sas_port_async_suspend(struct ata_port *ap, int *async)
5430{
5431 return __ata_port_suspend_common(ap, PMSG_SUSPEND, async);
5432}
5433EXPORT_SYMBOL_GPL(ata_sas_port_async_suspend);
5434
5435int ata_sas_port_async_resume(struct ata_port *ap, int *async)
5436{
5437 return __ata_port_resume_common(ap, async);
5438}
5439EXPORT_SYMBOL_GPL(ata_sas_port_async_resume);
5440
5441
500530f6 5442/**
cca3974e
JG
5443 * ata_host_suspend - suspend host
5444 * @host: host to suspend
500530f6
TH
5445 * @mesg: PM message
5446 *
5ef41082 5447 * Suspend @host. Actual operation is performed by port suspend.
500530f6 5448 */
cca3974e 5449int ata_host_suspend(struct ata_host *host, pm_message_t mesg)
500530f6 5450{
5ef41082
LM
5451 host->dev->power.power_state = mesg;
5452 return 0;
500530f6
TH
5453}
5454
5455/**
cca3974e
JG
5456 * ata_host_resume - resume host
5457 * @host: host to resume
500530f6 5458 *
5ef41082 5459 * Resume @host. Actual operation is performed by port resume.
500530f6 5460 */
cca3974e 5461void ata_host_resume(struct ata_host *host)
500530f6 5462{
72ad6ec4 5463 host->dev->power.power_state = PMSG_ON;
500530f6 5464}
6ffa01d8 5465#endif
500530f6 5466
5ef41082
LM
5467struct device_type ata_port_type = {
5468 .name = "ata_port",
5469#ifdef CONFIG_PM
5470 .pm = &ata_port_pm_ops,
5471#endif
5472};
5473
3ef3b43d
TH
5474/**
5475 * ata_dev_init - Initialize an ata_device structure
5476 * @dev: Device structure to initialize
5477 *
5478 * Initialize @dev in preparation for probing.
5479 *
5480 * LOCKING:
5481 * Inherited from caller.
5482 */
5483void ata_dev_init(struct ata_device *dev)
5484{
b1c72916 5485 struct ata_link *link = ata_dev_phys_link(dev);
9af5c9c9 5486 struct ata_port *ap = link->ap;
72fa4b74
TH
5487 unsigned long flags;
5488
b1c72916 5489 /* SATA spd limit is bound to the attached device, reset together */
9af5c9c9
TH
5490 link->sata_spd_limit = link->hw_sata_spd_limit;
5491 link->sata_spd = 0;
5a04bf4b 5492
72fa4b74
TH
5493 /* High bits of dev->flags are used to record warm plug
5494 * requests which occur asynchronously. Synchronize using
cca3974e 5495 * host lock.
72fa4b74 5496 */
ba6a1308 5497 spin_lock_irqsave(ap->lock, flags);
72fa4b74 5498 dev->flags &= ~ATA_DFLAG_INIT_MASK;
3dcc323f 5499 dev->horkage = 0;
ba6a1308 5500 spin_unlock_irqrestore(ap->lock, flags);
3ef3b43d 5501
99cf610a
TH
5502 memset((void *)dev + ATA_DEVICE_CLEAR_BEGIN, 0,
5503 ATA_DEVICE_CLEAR_END - ATA_DEVICE_CLEAR_BEGIN);
3ef3b43d
TH
5504 dev->pio_mask = UINT_MAX;
5505 dev->mwdma_mask = UINT_MAX;
5506 dev->udma_mask = UINT_MAX;
5507}
5508
4fb37a25
TH
5509/**
5510 * ata_link_init - Initialize an ata_link structure
5511 * @ap: ATA port link is attached to
5512 * @link: Link structure to initialize
8989805d 5513 * @pmp: Port multiplier port number
4fb37a25
TH
5514 *
5515 * Initialize @link.
5516 *
5517 * LOCKING:
5518 * Kernel thread context (may sleep)
5519 */
fb7fd614 5520void ata_link_init(struct ata_port *ap, struct ata_link *link, int pmp)
4fb37a25
TH
5521{
5522 int i;
5523
5524 /* clear everything except for devices */
d9027470
GG
5525 memset((void *)link + ATA_LINK_CLEAR_BEGIN, 0,
5526 ATA_LINK_CLEAR_END - ATA_LINK_CLEAR_BEGIN);
4fb37a25
TH
5527
5528 link->ap = ap;
8989805d 5529 link->pmp = pmp;
4fb37a25
TH
5530 link->active_tag = ATA_TAG_POISON;
5531 link->hw_sata_spd_limit = UINT_MAX;
5532
5533 /* can't use iterator, ap isn't initialized yet */
5534 for (i = 0; i < ATA_MAX_DEVICES; i++) {
5535 struct ata_device *dev = &link->device[i];
5536
5537 dev->link = link;
5538 dev->devno = dev - link->device;
110f66d2
TH
5539#ifdef CONFIG_ATA_ACPI
5540 dev->gtf_filter = ata_acpi_gtf_filter;
5541#endif
4fb37a25
TH
5542 ata_dev_init(dev);
5543 }
5544}
5545
5546/**
5547 * sata_link_init_spd - Initialize link->sata_spd_limit
5548 * @link: Link to configure sata_spd_limit for
5549 *
5550 * Initialize @link->[hw_]sata_spd_limit to the currently
5551 * configured value.
5552 *
5553 * LOCKING:
5554 * Kernel thread context (may sleep).
5555 *
5556 * RETURNS:
5557 * 0 on success, -errno on failure.
5558 */
fb7fd614 5559int sata_link_init_spd(struct ata_link *link)
4fb37a25 5560{
33267325 5561 u8 spd;
4fb37a25
TH
5562 int rc;
5563
d127ea7b 5564 rc = sata_scr_read(link, SCR_CONTROL, &link->saved_scontrol);
4fb37a25
TH
5565 if (rc)
5566 return rc;
5567
d127ea7b 5568 spd = (link->saved_scontrol >> 4) & 0xf;
4fb37a25
TH
5569 if (spd)
5570 link->hw_sata_spd_limit &= (1 << spd) - 1;
5571
05944bdf 5572 ata_force_link_limits(link);
33267325 5573
4fb37a25
TH
5574 link->sata_spd_limit = link->hw_sata_spd_limit;
5575
5576 return 0;
5577}
5578
1da177e4 5579/**
f3187195
TH
5580 * ata_port_alloc - allocate and initialize basic ATA port resources
5581 * @host: ATA host this allocated port belongs to
1da177e4 5582 *
f3187195
TH
5583 * Allocate and initialize basic ATA port resources.
5584 *
5585 * RETURNS:
5586 * Allocate ATA port on success, NULL on failure.
0cba632b 5587 *
1da177e4 5588 * LOCKING:
f3187195 5589 * Inherited from calling layer (may sleep).
1da177e4 5590 */
f3187195 5591struct ata_port *ata_port_alloc(struct ata_host *host)
1da177e4 5592{
f3187195 5593 struct ata_port *ap;
1da177e4 5594
f3187195
TH
5595 DPRINTK("ENTER\n");
5596
5597 ap = kzalloc(sizeof(*ap), GFP_KERNEL);
5598 if (!ap)
5599 return NULL;
4fca377f 5600
7b3a24c5 5601 ap->pflags |= ATA_PFLAG_INITIALIZING | ATA_PFLAG_FROZEN;
cca3974e 5602 ap->lock = &host->lock;
f3187195 5603 ap->print_id = -1;
cca3974e 5604 ap->host = host;
f3187195 5605 ap->dev = host->dev;
bd5d825c
BP
5606
5607#if defined(ATA_VERBOSE_DEBUG)
5608 /* turn on all debugging levels */
5609 ap->msg_enable = 0x00FF;
5610#elif defined(ATA_DEBUG)
5611 ap->msg_enable = ATA_MSG_DRV | ATA_MSG_INFO | ATA_MSG_CTL | ATA_MSG_WARN | ATA_MSG_ERR;
88574551 5612#else
0dd4b21f 5613 ap->msg_enable = ATA_MSG_DRV | ATA_MSG_ERR | ATA_MSG_WARN;
bd5d825c 5614#endif
1da177e4 5615
ad72cf98 5616 mutex_init(&ap->scsi_scan_mutex);
65f27f38
DH
5617 INIT_DELAYED_WORK(&ap->hotplug_task, ata_scsi_hotplug);
5618 INIT_WORK(&ap->scsi_rescan_task, ata_scsi_dev_rescan);
a72ec4ce 5619 INIT_LIST_HEAD(&ap->eh_done_q);
c6cf9e99 5620 init_waitqueue_head(&ap->eh_wait_q);
45fabbb7 5621 init_completion(&ap->park_req_pending);
5ddf24c5
TH
5622 init_timer_deferrable(&ap->fastdrain_timer);
5623 ap->fastdrain_timer.function = ata_eh_fastdrain_timerfn;
5624 ap->fastdrain_timer.data = (unsigned long)ap;
1da177e4 5625
838df628 5626 ap->cbl = ATA_CBL_NONE;
838df628 5627
8989805d 5628 ata_link_init(ap, &ap->link, 0);
1da177e4
LT
5629
5630#ifdef ATA_IRQ_TRAP
5631 ap->stats.unhandled_irq = 1;
5632 ap->stats.idle_irq = 1;
5633#endif
270390e1
TH
5634 ata_sff_port_init(ap);
5635
1da177e4 5636 return ap;
1da177e4
LT
5637}
5638
f0d36efd
TH
5639static void ata_host_release(struct device *gendev, void *res)
5640{
5641 struct ata_host *host = dev_get_drvdata(gendev);
5642 int i;
5643
1aa506e4
TH
5644 for (i = 0; i < host->n_ports; i++) {
5645 struct ata_port *ap = host->ports[i];
5646
4911487a
TH
5647 if (!ap)
5648 continue;
5649
5650 if (ap->scsi_host)
1aa506e4
TH
5651 scsi_host_put(ap->scsi_host);
5652
633273a3 5653 kfree(ap->pmp_link);
b1c72916 5654 kfree(ap->slave_link);
4911487a 5655 kfree(ap);
1aa506e4
TH
5656 host->ports[i] = NULL;
5657 }
5658
1aa56cca 5659 dev_set_drvdata(gendev, NULL);
f0d36efd
TH
5660}
5661
f3187195
TH
5662/**
5663 * ata_host_alloc - allocate and init basic ATA host resources
5664 * @dev: generic device this host is associated with
5665 * @max_ports: maximum number of ATA ports associated with this host
5666 *
5667 * Allocate and initialize basic ATA host resources. LLD calls
5668 * this function to allocate a host, initializes it fully and
5669 * attaches it using ata_host_register().
5670 *
5671 * @max_ports ports are allocated and host->n_ports is
5672 * initialized to @max_ports. The caller is allowed to decrease
5673 * host->n_ports before calling ata_host_register(). The unused
5674 * ports will be automatically freed on registration.
5675 *
5676 * RETURNS:
5677 * Allocate ATA host on success, NULL on failure.
5678 *
5679 * LOCKING:
5680 * Inherited from calling layer (may sleep).
5681 */
5682struct ata_host *ata_host_alloc(struct device *dev, int max_ports)
5683{
5684 struct ata_host *host;
5685 size_t sz;
5686 int i;
5687
5688 DPRINTK("ENTER\n");
5689
5690 if (!devres_open_group(dev, NULL, GFP_KERNEL))
5691 return NULL;
5692
5693 /* alloc a container for our list of ATA ports (buses) */
5694 sz = sizeof(struct ata_host) + (max_ports + 1) * sizeof(void *);
5695 /* alloc a container for our list of ATA ports (buses) */
5696 host = devres_alloc(ata_host_release, sz, GFP_KERNEL);
5697 if (!host)
5698 goto err_out;
5699
5700 devres_add(dev, host);
5701 dev_set_drvdata(dev, host);
5702
5703 spin_lock_init(&host->lock);
c0c362b6 5704 mutex_init(&host->eh_mutex);
f3187195
TH
5705 host->dev = dev;
5706 host->n_ports = max_ports;
5707
5708 /* allocate ports bound to this host */
5709 for (i = 0; i < max_ports; i++) {
5710 struct ata_port *ap;
5711
5712 ap = ata_port_alloc(host);
5713 if (!ap)
5714 goto err_out;
5715
5716 ap->port_no = i;
5717 host->ports[i] = ap;
5718 }
5719
5720 devres_remove_group(dev, NULL);
5721 return host;
5722
5723 err_out:
5724 devres_release_group(dev, NULL);
5725 return NULL;
5726}
5727
f5cda257
TH
5728/**
5729 * ata_host_alloc_pinfo - alloc host and init with port_info array
5730 * @dev: generic device this host is associated with
5731 * @ppi: array of ATA port_info to initialize host with
5732 * @n_ports: number of ATA ports attached to this host
5733 *
5734 * Allocate ATA host and initialize with info from @ppi. If NULL
5735 * terminated, @ppi may contain fewer entries than @n_ports. The
5736 * last entry will be used for the remaining ports.
5737 *
5738 * RETURNS:
5739 * Allocate ATA host on success, NULL on failure.
5740 *
5741 * LOCKING:
5742 * Inherited from calling layer (may sleep).
5743 */
5744struct ata_host *ata_host_alloc_pinfo(struct device *dev,
5745 const struct ata_port_info * const * ppi,
5746 int n_ports)
5747{
5748 const struct ata_port_info *pi;
5749 struct ata_host *host;
5750 int i, j;
5751
5752 host = ata_host_alloc(dev, n_ports);
5753 if (!host)
5754 return NULL;
5755
5756 for (i = 0, j = 0, pi = NULL; i < host->n_ports; i++) {
5757 struct ata_port *ap = host->ports[i];
5758
5759 if (ppi[j])
5760 pi = ppi[j++];
5761
5762 ap->pio_mask = pi->pio_mask;
5763 ap->mwdma_mask = pi->mwdma_mask;
5764 ap->udma_mask = pi->udma_mask;
5765 ap->flags |= pi->flags;
0c88758b 5766 ap->link.flags |= pi->link_flags;
f5cda257
TH
5767 ap->ops = pi->port_ops;
5768
5769 if (!host->ops && (pi->port_ops != &ata_dummy_port_ops))
5770 host->ops = pi->port_ops;
f5cda257
TH
5771 }
5772
5773 return host;
5774}
5775
b1c72916
TH
5776/**
5777 * ata_slave_link_init - initialize slave link
5778 * @ap: port to initialize slave link for
5779 *
5780 * Create and initialize slave link for @ap. This enables slave
5781 * link handling on the port.
5782 *
5783 * In libata, a port contains links and a link contains devices.
5784 * There is single host link but if a PMP is attached to it,
5785 * there can be multiple fan-out links. On SATA, there's usually
5786 * a single device connected to a link but PATA and SATA
5787 * controllers emulating TF based interface can have two - master
5788 * and slave.
5789 *
5790 * However, there are a few controllers which don't fit into this
5791 * abstraction too well - SATA controllers which emulate TF
5792 * interface with both master and slave devices but also have
5793 * separate SCR register sets for each device. These controllers
5794 * need separate links for physical link handling
5795 * (e.g. onlineness, link speed) but should be treated like a
5796 * traditional M/S controller for everything else (e.g. command
5797 * issue, softreset).
5798 *
5799 * slave_link is libata's way of handling this class of
5800 * controllers without impacting core layer too much. For
5801 * anything other than physical link handling, the default host
5802 * link is used for both master and slave. For physical link
5803 * handling, separate @ap->slave_link is used. All dirty details
5804 * are implemented inside libata core layer. From LLD's POV, the
5805 * only difference is that prereset, hardreset and postreset are
5806 * called once more for the slave link, so the reset sequence
5807 * looks like the following.
5808 *
5809 * prereset(M) -> prereset(S) -> hardreset(M) -> hardreset(S) ->
5810 * softreset(M) -> postreset(M) -> postreset(S)
5811 *
5812 * Note that softreset is called only for the master. Softreset
5813 * resets both M/S by definition, so SRST on master should handle
5814 * both (the standard method will work just fine).
5815 *
5816 * LOCKING:
5817 * Should be called before host is registered.
5818 *
5819 * RETURNS:
5820 * 0 on success, -errno on failure.
5821 */
5822int ata_slave_link_init(struct ata_port *ap)
5823{
5824 struct ata_link *link;
5825
5826 WARN_ON(ap->slave_link);
5827 WARN_ON(ap->flags & ATA_FLAG_PMP);
5828
5829 link = kzalloc(sizeof(*link), GFP_KERNEL);
5830 if (!link)
5831 return -ENOMEM;
5832
5833 ata_link_init(ap, link, 1);
5834 ap->slave_link = link;
5835 return 0;
5836}
5837
32ebbc0c
TH
5838static void ata_host_stop(struct device *gendev, void *res)
5839{
5840 struct ata_host *host = dev_get_drvdata(gendev);
5841 int i;
5842
5843 WARN_ON(!(host->flags & ATA_HOST_STARTED));
5844
5845 for (i = 0; i < host->n_ports; i++) {
5846 struct ata_port *ap = host->ports[i];
5847
5848 if (ap->ops->port_stop)
5849 ap->ops->port_stop(ap);
5850 }
5851
5852 if (host->ops->host_stop)
5853 host->ops->host_stop(host);
5854}
5855
029cfd6b
TH
5856/**
5857 * ata_finalize_port_ops - finalize ata_port_operations
5858 * @ops: ata_port_operations to finalize
5859 *
5860 * An ata_port_operations can inherit from another ops and that
5861 * ops can again inherit from another. This can go on as many
5862 * times as necessary as long as there is no loop in the
5863 * inheritance chain.
5864 *
5865 * Ops tables are finalized when the host is started. NULL or
5866 * unspecified entries are inherited from the closet ancestor
5867 * which has the method and the entry is populated with it.
5868 * After finalization, the ops table directly points to all the
5869 * methods and ->inherits is no longer necessary and cleared.
5870 *
5871 * Using ATA_OP_NULL, inheriting ops can force a method to NULL.
5872 *
5873 * LOCKING:
5874 * None.
5875 */
5876static void ata_finalize_port_ops(struct ata_port_operations *ops)
5877{
2da67659 5878 static DEFINE_SPINLOCK(lock);
029cfd6b
TH
5879 const struct ata_port_operations *cur;
5880 void **begin = (void **)ops;
5881 void **end = (void **)&ops->inherits;
5882 void **pp;
5883
5884 if (!ops || !ops->inherits)
5885 return;
5886
5887 spin_lock(&lock);
5888
5889 for (cur = ops->inherits; cur; cur = cur->inherits) {
5890 void **inherit = (void **)cur;
5891
5892 for (pp = begin; pp < end; pp++, inherit++)
5893 if (!*pp)
5894 *pp = *inherit;
5895 }
5896
5897 for (pp = begin; pp < end; pp++)
5898 if (IS_ERR(*pp))
5899 *pp = NULL;
5900
5901 ops->inherits = NULL;
5902
5903 spin_unlock(&lock);
5904}
5905
ecef7253
TH
5906/**
5907 * ata_host_start - start and freeze ports of an ATA host
5908 * @host: ATA host to start ports for
5909 *
5910 * Start and then freeze ports of @host. Started status is
5911 * recorded in host->flags, so this function can be called
5912 * multiple times. Ports are guaranteed to get started only
f3187195
TH
5913 * once. If host->ops isn't initialized yet, its set to the
5914 * first non-dummy port ops.
ecef7253
TH
5915 *
5916 * LOCKING:
5917 * Inherited from calling layer (may sleep).
5918 *
5919 * RETURNS:
5920 * 0 if all ports are started successfully, -errno otherwise.
5921 */
5922int ata_host_start(struct ata_host *host)
5923{
32ebbc0c
TH
5924 int have_stop = 0;
5925 void *start_dr = NULL;
ecef7253
TH
5926 int i, rc;
5927
5928 if (host->flags & ATA_HOST_STARTED)
5929 return 0;
5930
029cfd6b
TH
5931 ata_finalize_port_ops(host->ops);
5932
ecef7253
TH
5933 for (i = 0; i < host->n_ports; i++) {
5934 struct ata_port *ap = host->ports[i];
5935
029cfd6b
TH
5936 ata_finalize_port_ops(ap->ops);
5937
f3187195
TH
5938 if (!host->ops && !ata_port_is_dummy(ap))
5939 host->ops = ap->ops;
5940
32ebbc0c
TH
5941 if (ap->ops->port_stop)
5942 have_stop = 1;
5943 }
5944
5945 if (host->ops->host_stop)
5946 have_stop = 1;
5947
5948 if (have_stop) {
5949 start_dr = devres_alloc(ata_host_stop, 0, GFP_KERNEL);
5950 if (!start_dr)
5951 return -ENOMEM;
5952 }
5953
5954 for (i = 0; i < host->n_ports; i++) {
5955 struct ata_port *ap = host->ports[i];
5956
ecef7253
TH
5957 if (ap->ops->port_start) {
5958 rc = ap->ops->port_start(ap);
5959 if (rc) {
0f9fe9b7 5960 if (rc != -ENODEV)
a44fec1f
JP
5961 dev_err(host->dev,
5962 "failed to start port %d (errno=%d)\n",
5963 i, rc);
ecef7253
TH
5964 goto err_out;
5965 }
5966 }
ecef7253
TH
5967 ata_eh_freeze_port(ap);
5968 }
5969
32ebbc0c
TH
5970 if (start_dr)
5971 devres_add(host->dev, start_dr);
ecef7253
TH
5972 host->flags |= ATA_HOST_STARTED;
5973 return 0;
5974
5975 err_out:
5976 while (--i >= 0) {
5977 struct ata_port *ap = host->ports[i];
5978
5979 if (ap->ops->port_stop)
5980 ap->ops->port_stop(ap);
5981 }
32ebbc0c 5982 devres_free(start_dr);
ecef7253
TH
5983 return rc;
5984}
5985
b03732f0 5986/**
8d8e7d13 5987 * ata_sas_host_init - Initialize a host struct for sas (ipr, libsas)
cca3974e
JG
5988 * @host: host to initialize
5989 * @dev: device host is attached to
cca3974e 5990 * @ops: port_ops
b03732f0 5991 *
b03732f0 5992 */
cca3974e 5993void ata_host_init(struct ata_host *host, struct device *dev,
8d8e7d13 5994 struct ata_port_operations *ops)
b03732f0 5995{
cca3974e 5996 spin_lock_init(&host->lock);
c0c362b6 5997 mutex_init(&host->eh_mutex);
cca3974e 5998 host->dev = dev;
cca3974e 5999 host->ops = ops;
b03732f0
BK
6000}
6001
9508a66f 6002void __ata_port_probe(struct ata_port *ap)
79318057 6003{
9508a66f
DW
6004 struct ata_eh_info *ehi = &ap->link.eh_info;
6005 unsigned long flags;
886ad09f 6006
9508a66f
DW
6007 /* kick EH for boot probing */
6008 spin_lock_irqsave(ap->lock, flags);
79318057 6009
9508a66f
DW
6010 ehi->probe_mask |= ATA_ALL_DEVICES;
6011 ehi->action |= ATA_EH_RESET;
6012 ehi->flags |= ATA_EHI_NO_AUTOPSY | ATA_EHI_QUIET;
79318057 6013
9508a66f
DW
6014 ap->pflags &= ~ATA_PFLAG_INITIALIZING;
6015 ap->pflags |= ATA_PFLAG_LOADING;
6016 ata_port_schedule_eh(ap);
79318057 6017
9508a66f
DW
6018 spin_unlock_irqrestore(ap->lock, flags);
6019}
79318057 6020
9508a66f
DW
6021int ata_port_probe(struct ata_port *ap)
6022{
6023 int rc = 0;
79318057 6024
9508a66f
DW
6025 if (ap->ops->error_handler) {
6026 __ata_port_probe(ap);
79318057
AV
6027 ata_port_wait_eh(ap);
6028 } else {
6029 DPRINTK("ata%u: bus probe begin\n", ap->print_id);
6030 rc = ata_bus_probe(ap);
6031 DPRINTK("ata%u: bus probe end\n", ap->print_id);
79318057 6032 }
238c9cf9
JB
6033 return rc;
6034}
6035
6036
6037static void async_port_probe(void *data, async_cookie_t cookie)
6038{
6039 struct ata_port *ap = data;
4fca377f 6040
238c9cf9
JB
6041 /*
6042 * If we're not allowed to scan this host in parallel,
6043 * we need to wait until all previous scans have completed
6044 * before going further.
6045 * Jeff Garzik says this is only within a controller, so we
6046 * don't need to wait for port 0, only for later ports.
6047 */
6048 if (!(ap->host->flags & ATA_HOST_PARALLEL_SCAN) && ap->port_no != 0)
6049 async_synchronize_cookie(cookie);
6050
6051 (void)ata_port_probe(ap);
f29d3b23
AV
6052
6053 /* in order to keep device order, we need to synchronize at this point */
6054 async_synchronize_cookie(cookie);
6055
6056 ata_scsi_scan_host(ap, 1);
79318057 6057}
238c9cf9 6058
f3187195
TH
6059/**
6060 * ata_host_register - register initialized ATA host
6061 * @host: ATA host to register
6062 * @sht: template for SCSI host
6063 *
6064 * Register initialized ATA host. @host is allocated using
6065 * ata_host_alloc() and fully initialized by LLD. This function
6066 * starts ports, registers @host with ATA and SCSI layers and
6067 * probe registered devices.
6068 *
6069 * LOCKING:
6070 * Inherited from calling layer (may sleep).
6071 *
6072 * RETURNS:
6073 * 0 on success, -errno otherwise.
6074 */
6075int ata_host_register(struct ata_host *host, struct scsi_host_template *sht)
6076{
6077 int i, rc;
6078
6079 /* host must have been started */
6080 if (!(host->flags & ATA_HOST_STARTED)) {
a44fec1f 6081 dev_err(host->dev, "BUG: trying to register unstarted host\n");
f3187195
TH
6082 WARN_ON(1);
6083 return -EINVAL;
6084 }
6085
6086 /* Blow away unused ports. This happens when LLD can't
6087 * determine the exact number of ports to allocate at
6088 * allocation time.
6089 */
6090 for (i = host->n_ports; host->ports[i]; i++)
6091 kfree(host->ports[i]);
6092
6093 /* give ports names and add SCSI hosts */
6094 for (i = 0; i < host->n_ports; i++)
85d6725b 6095 host->ports[i]->print_id = atomic_inc_return(&ata_print_id);
f3187195 6096
4fca377f 6097
d9027470
GG
6098 /* Create associated sysfs transport objects */
6099 for (i = 0; i < host->n_ports; i++) {
6100 rc = ata_tport_add(host->dev,host->ports[i]);
6101 if (rc) {
6102 goto err_tadd;
6103 }
6104 }
6105
f3187195
TH
6106 rc = ata_scsi_add_hosts(host, sht);
6107 if (rc)
d9027470 6108 goto err_tadd;
f3187195
TH
6109
6110 /* set cable, sata_spd_limit and report */
6111 for (i = 0; i < host->n_ports; i++) {
6112 struct ata_port *ap = host->ports[i];
f3187195
TH
6113 unsigned long xfer_mask;
6114
6115 /* set SATA cable type if still unset */
6116 if (ap->cbl == ATA_CBL_NONE && (ap->flags & ATA_FLAG_SATA))
6117 ap->cbl = ATA_CBL_SATA;
6118
6119 /* init sata_spd_limit to the current value */
4fb37a25 6120 sata_link_init_spd(&ap->link);
b1c72916
TH
6121 if (ap->slave_link)
6122 sata_link_init_spd(ap->slave_link);
f3187195 6123
cbcdd875 6124 /* print per-port info to dmesg */
f3187195
TH
6125 xfer_mask = ata_pack_xfermask(ap->pio_mask, ap->mwdma_mask,
6126 ap->udma_mask);
6127
abf6e8ed 6128 if (!ata_port_is_dummy(ap)) {
a9a79dfe
JP
6129 ata_port_info(ap, "%cATA max %s %s\n",
6130 (ap->flags & ATA_FLAG_SATA) ? 'S' : 'P',
6131 ata_mode_string(xfer_mask),
6132 ap->link.eh_info.desc);
abf6e8ed
TH
6133 ata_ehi_clear_desc(&ap->link.eh_info);
6134 } else
a9a79dfe 6135 ata_port_info(ap, "DUMMY\n");
f3187195
TH
6136 }
6137
f6005354 6138 /* perform each probe asynchronously */
f3187195
TH
6139 for (i = 0; i < host->n_ports; i++) {
6140 struct ata_port *ap = host->ports[i];
79318057 6141 async_schedule(async_port_probe, ap);
f3187195 6142 }
f3187195
TH
6143
6144 return 0;
d9027470
GG
6145
6146 err_tadd:
6147 while (--i >= 0) {
6148 ata_tport_delete(host->ports[i]);
6149 }
6150 return rc;
6151
f3187195
TH
6152}
6153
f5cda257
TH
6154/**
6155 * ata_host_activate - start host, request IRQ and register it
6156 * @host: target ATA host
6157 * @irq: IRQ to request
6158 * @irq_handler: irq_handler used when requesting IRQ
6159 * @irq_flags: irq_flags used when requesting IRQ
6160 * @sht: scsi_host_template to use when registering the host
6161 *
6162 * After allocating an ATA host and initializing it, most libata
6163 * LLDs perform three steps to activate the host - start host,
6164 * request IRQ and register it. This helper takes necessasry
6165 * arguments and performs the three steps in one go.
6166 *
3d46b2e2
PM
6167 * An invalid IRQ skips the IRQ registration and expects the host to
6168 * have set polling mode on the port. In this case, @irq_handler
6169 * should be NULL.
6170 *
f5cda257
TH
6171 * LOCKING:
6172 * Inherited from calling layer (may sleep).
6173 *
6174 * RETURNS:
6175 * 0 on success, -errno otherwise.
6176 */
6177int ata_host_activate(struct ata_host *host, int irq,
6178 irq_handler_t irq_handler, unsigned long irq_flags,
6179 struct scsi_host_template *sht)
6180{
cbcdd875 6181 int i, rc;
f5cda257
TH
6182
6183 rc = ata_host_start(host);
6184 if (rc)
6185 return rc;
6186
3d46b2e2
PM
6187 /* Special case for polling mode */
6188 if (!irq) {
6189 WARN_ON(irq_handler);
6190 return ata_host_register(host, sht);
6191 }
6192
f5cda257
TH
6193 rc = devm_request_irq(host->dev, irq, irq_handler, irq_flags,
6194 dev_driver_string(host->dev), host);
6195 if (rc)
6196 return rc;
6197
cbcdd875
TH
6198 for (i = 0; i < host->n_ports; i++)
6199 ata_port_desc(host->ports[i], "irq %d", irq);
4031826b 6200
f5cda257
TH
6201 rc = ata_host_register(host, sht);
6202 /* if failed, just free the IRQ and leave ports alone */
6203 if (rc)
6204 devm_free_irq(host->dev, irq, host);
6205
6206 return rc;
6207}
6208
720ba126
TH
6209/**
6210 * ata_port_detach - Detach ATA port in prepration of device removal
6211 * @ap: ATA port to be detached
6212 *
6213 * Detach all ATA devices and the associated SCSI devices of @ap;
6214 * then, remove the associated SCSI host. @ap is guaranteed to
6215 * be quiescent on return from this function.
6216 *
6217 * LOCKING:
6218 * Kernel thread context (may sleep).
6219 */
741b7763 6220static void ata_port_detach(struct ata_port *ap)
720ba126
TH
6221{
6222 unsigned long flags;
720ba126
TH
6223
6224 if (!ap->ops->error_handler)
c3cf30a9 6225 goto skip_eh;
720ba126
TH
6226
6227 /* tell EH we're leaving & flush EH */
ba6a1308 6228 spin_lock_irqsave(ap->lock, flags);
b51e9e5d 6229 ap->pflags |= ATA_PFLAG_UNLOADING;
ece180d1 6230 ata_port_schedule_eh(ap);
ba6a1308 6231 spin_unlock_irqrestore(ap->lock, flags);
720ba126 6232
ece180d1 6233 /* wait till EH commits suicide */
720ba126
TH
6234 ata_port_wait_eh(ap);
6235
ece180d1
TH
6236 /* it better be dead now */
6237 WARN_ON(!(ap->pflags & ATA_PFLAG_UNLOADED));
720ba126 6238
afe2c511 6239 cancel_delayed_work_sync(&ap->hotplug_task);
720ba126 6240
c3cf30a9 6241 skip_eh:
d9027470
GG
6242 if (ap->pmp_link) {
6243 int i;
6244 for (i = 0; i < SATA_PMP_MAX_PORTS; i++)
6245 ata_tlink_delete(&ap->pmp_link[i]);
6246 }
6247 ata_tport_delete(ap);
6248
720ba126 6249 /* remove the associated SCSI host */
cca3974e 6250 scsi_remove_host(ap->scsi_host);
720ba126
TH
6251}
6252
0529c159
TH
6253/**
6254 * ata_host_detach - Detach all ports of an ATA host
6255 * @host: Host to detach
6256 *
6257 * Detach all ports of @host.
6258 *
6259 * LOCKING:
6260 * Kernel thread context (may sleep).
6261 */
6262void ata_host_detach(struct ata_host *host)
6263{
6264 int i;
6265
6266 for (i = 0; i < host->n_ports; i++)
6267 ata_port_detach(host->ports[i]);
562f0c2d
TH
6268
6269 /* the host is dead now, dissociate ACPI */
6270 ata_acpi_dissociate(host);
0529c159
TH
6271}
6272
374b1873
JG
6273#ifdef CONFIG_PCI
6274
1da177e4
LT
6275/**
6276 * ata_pci_remove_one - PCI layer callback for device removal
6277 * @pdev: PCI device that was removed
6278 *
b878ca5d
TH
6279 * PCI layer indicates to libata via this hook that hot-unplug or
6280 * module unload event has occurred. Detach all ports. Resource
6281 * release is handled via devres.
1da177e4
LT
6282 *
6283 * LOCKING:
6284 * Inherited from PCI layer (may sleep).
6285 */
f0d36efd 6286void ata_pci_remove_one(struct pci_dev *pdev)
1da177e4 6287{
2855568b 6288 struct device *dev = &pdev->dev;
cca3974e 6289 struct ata_host *host = dev_get_drvdata(dev);
1da177e4 6290
b878ca5d 6291 ata_host_detach(host);
1da177e4
LT
6292}
6293
6294/* move to PCI subsystem */
057ace5e 6295int pci_test_config_bits(struct pci_dev *pdev, const struct pci_bits *bits)
1da177e4
LT
6296{
6297 unsigned long tmp = 0;
6298
6299 switch (bits->width) {
6300 case 1: {
6301 u8 tmp8 = 0;
6302 pci_read_config_byte(pdev, bits->reg, &tmp8);
6303 tmp = tmp8;
6304 break;
6305 }
6306 case 2: {
6307 u16 tmp16 = 0;
6308 pci_read_config_word(pdev, bits->reg, &tmp16);
6309 tmp = tmp16;
6310 break;
6311 }
6312 case 4: {
6313 u32 tmp32 = 0;
6314 pci_read_config_dword(pdev, bits->reg, &tmp32);
6315 tmp = tmp32;
6316 break;
6317 }
6318
6319 default:
6320 return -EINVAL;
6321 }
6322
6323 tmp &= bits->mask;
6324
6325 return (tmp == bits->val) ? 1 : 0;
6326}
9b847548 6327
6ffa01d8 6328#ifdef CONFIG_PM
3c5100c1 6329void ata_pci_device_do_suspend(struct pci_dev *pdev, pm_message_t mesg)
9b847548
JA
6330{
6331 pci_save_state(pdev);
4c90d971 6332 pci_disable_device(pdev);
500530f6 6333
3a2d5b70 6334 if (mesg.event & PM_EVENT_SLEEP)
500530f6 6335 pci_set_power_state(pdev, PCI_D3hot);
9b847548
JA
6336}
6337
553c4aa6 6338int ata_pci_device_do_resume(struct pci_dev *pdev)
9b847548 6339{
553c4aa6
TH
6340 int rc;
6341
9b847548
JA
6342 pci_set_power_state(pdev, PCI_D0);
6343 pci_restore_state(pdev);
553c4aa6 6344
b878ca5d 6345 rc = pcim_enable_device(pdev);
553c4aa6 6346 if (rc) {
a44fec1f
JP
6347 dev_err(&pdev->dev,
6348 "failed to enable device after resume (%d)\n", rc);
553c4aa6
TH
6349 return rc;
6350 }
6351
9b847548 6352 pci_set_master(pdev);
553c4aa6 6353 return 0;
500530f6
TH
6354}
6355
3c5100c1 6356int ata_pci_device_suspend(struct pci_dev *pdev, pm_message_t mesg)
500530f6 6357{
cca3974e 6358 struct ata_host *host = dev_get_drvdata(&pdev->dev);
500530f6
TH
6359 int rc = 0;
6360
cca3974e 6361 rc = ata_host_suspend(host, mesg);
500530f6
TH
6362 if (rc)
6363 return rc;
6364
3c5100c1 6365 ata_pci_device_do_suspend(pdev, mesg);
500530f6
TH
6366
6367 return 0;
6368}
6369
6370int ata_pci_device_resume(struct pci_dev *pdev)
6371{
cca3974e 6372 struct ata_host *host = dev_get_drvdata(&pdev->dev);
553c4aa6 6373 int rc;
500530f6 6374
553c4aa6
TH
6375 rc = ata_pci_device_do_resume(pdev);
6376 if (rc == 0)
6377 ata_host_resume(host);
6378 return rc;
9b847548 6379}
6ffa01d8
TH
6380#endif /* CONFIG_PM */
6381
1da177e4
LT
6382#endif /* CONFIG_PCI */
6383
33267325
TH
6384static int __init ata_parse_force_one(char **cur,
6385 struct ata_force_ent *force_ent,
6386 const char **reason)
6387{
6388 /* FIXME: Currently, there's no way to tag init const data and
6389 * using __initdata causes build failure on some versions of
6390 * gcc. Once __initdataconst is implemented, add const to the
6391 * following structure.
6392 */
6393 static struct ata_force_param force_tbl[] __initdata = {
6394 { "40c", .cbl = ATA_CBL_PATA40 },
6395 { "80c", .cbl = ATA_CBL_PATA80 },
6396 { "short40c", .cbl = ATA_CBL_PATA40_SHORT },
6397 { "unk", .cbl = ATA_CBL_PATA_UNK },
6398 { "ign", .cbl = ATA_CBL_PATA_IGN },
6399 { "sata", .cbl = ATA_CBL_SATA },
6400 { "1.5Gbps", .spd_limit = 1 },
6401 { "3.0Gbps", .spd_limit = 2 },
6402 { "noncq", .horkage_on = ATA_HORKAGE_NONCQ },
6403 { "ncq", .horkage_off = ATA_HORKAGE_NONCQ },
43c9c591 6404 { "dump_id", .horkage_on = ATA_HORKAGE_DUMP_ID },
33267325
TH
6405 { "pio0", .xfer_mask = 1 << (ATA_SHIFT_PIO + 0) },
6406 { "pio1", .xfer_mask = 1 << (ATA_SHIFT_PIO + 1) },
6407 { "pio2", .xfer_mask = 1 << (ATA_SHIFT_PIO + 2) },
6408 { "pio3", .xfer_mask = 1 << (ATA_SHIFT_PIO + 3) },
6409 { "pio4", .xfer_mask = 1 << (ATA_SHIFT_PIO + 4) },
6410 { "pio5", .xfer_mask = 1 << (ATA_SHIFT_PIO + 5) },
6411 { "pio6", .xfer_mask = 1 << (ATA_SHIFT_PIO + 6) },
6412 { "mwdma0", .xfer_mask = 1 << (ATA_SHIFT_MWDMA + 0) },
6413 { "mwdma1", .xfer_mask = 1 << (ATA_SHIFT_MWDMA + 1) },
6414 { "mwdma2", .xfer_mask = 1 << (ATA_SHIFT_MWDMA + 2) },
6415 { "mwdma3", .xfer_mask = 1 << (ATA_SHIFT_MWDMA + 3) },
6416 { "mwdma4", .xfer_mask = 1 << (ATA_SHIFT_MWDMA + 4) },
6417 { "udma0", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 0) },
6418 { "udma16", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 0) },
6419 { "udma/16", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 0) },
6420 { "udma1", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 1) },
6421 { "udma25", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 1) },
6422 { "udma/25", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 1) },
6423 { "udma2", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 2) },
6424 { "udma33", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 2) },
6425 { "udma/33", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 2) },
6426 { "udma3", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 3) },
6427 { "udma44", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 3) },
6428 { "udma/44", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 3) },
6429 { "udma4", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 4) },
6430 { "udma66", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 4) },
6431 { "udma/66", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 4) },
6432 { "udma5", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 5) },
6433 { "udma100", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 5) },
6434 { "udma/100", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 5) },
6435 { "udma6", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 6) },
6436 { "udma133", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 6) },
6437 { "udma/133", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 6) },
6438 { "udma7", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 7) },
05944bdf
TH
6439 { "nohrst", .lflags = ATA_LFLAG_NO_HRST },
6440 { "nosrst", .lflags = ATA_LFLAG_NO_SRST },
6441 { "norst", .lflags = ATA_LFLAG_NO_HRST | ATA_LFLAG_NO_SRST },
ca6d43b0 6442 { "rstonce", .lflags = ATA_LFLAG_RST_ONCE },
33267325
TH
6443 };
6444 char *start = *cur, *p = *cur;
6445 char *id, *val, *endp;
6446 const struct ata_force_param *match_fp = NULL;
6447 int nr_matches = 0, i;
6448
6449 /* find where this param ends and update *cur */
6450 while (*p != '\0' && *p != ',')
6451 p++;
6452
6453 if (*p == '\0')
6454 *cur = p;
6455 else
6456 *cur = p + 1;
6457
6458 *p = '\0';
6459
6460 /* parse */
6461 p = strchr(start, ':');
6462 if (!p) {
6463 val = strstrip(start);
6464 goto parse_val;
6465 }
6466 *p = '\0';
6467
6468 id = strstrip(start);
6469 val = strstrip(p + 1);
6470
6471 /* parse id */
6472 p = strchr(id, '.');
6473 if (p) {
6474 *p++ = '\0';
6475 force_ent->device = simple_strtoul(p, &endp, 10);
6476 if (p == endp || *endp != '\0') {
6477 *reason = "invalid device";
6478 return -EINVAL;
6479 }
6480 }
6481
6482 force_ent->port = simple_strtoul(id, &endp, 10);
6483 if (p == endp || *endp != '\0') {
6484 *reason = "invalid port/link";
6485 return -EINVAL;
6486 }
6487
6488 parse_val:
6489 /* parse val, allow shortcuts so that both 1.5 and 1.5Gbps work */
6490 for (i = 0; i < ARRAY_SIZE(force_tbl); i++) {
6491 const struct ata_force_param *fp = &force_tbl[i];
6492
6493 if (strncasecmp(val, fp->name, strlen(val)))
6494 continue;
6495
6496 nr_matches++;
6497 match_fp = fp;
6498
6499 if (strcasecmp(val, fp->name) == 0) {
6500 nr_matches = 1;
6501 break;
6502 }
6503 }
6504
6505 if (!nr_matches) {
6506 *reason = "unknown value";
6507 return -EINVAL;
6508 }
6509 if (nr_matches > 1) {
6510 *reason = "ambigious value";
6511 return -EINVAL;
6512 }
6513
6514 force_ent->param = *match_fp;
6515
6516 return 0;
6517}
6518
6519static void __init ata_parse_force_param(void)
6520{
6521 int idx = 0, size = 1;
6522 int last_port = -1, last_device = -1;
6523 char *p, *cur, *next;
6524
6525 /* calculate maximum number of params and allocate force_tbl */
6526 for (p = ata_force_param_buf; *p; p++)
6527 if (*p == ',')
6528 size++;
6529
6530 ata_force_tbl = kzalloc(sizeof(ata_force_tbl[0]) * size, GFP_KERNEL);
6531 if (!ata_force_tbl) {
6532 printk(KERN_WARNING "ata: failed to extend force table, "
6533 "libata.force ignored\n");
6534 return;
6535 }
6536
6537 /* parse and populate the table */
6538 for (cur = ata_force_param_buf; *cur != '\0'; cur = next) {
6539 const char *reason = "";
6540 struct ata_force_ent te = { .port = -1, .device = -1 };
6541
6542 next = cur;
6543 if (ata_parse_force_one(&next, &te, &reason)) {
6544 printk(KERN_WARNING "ata: failed to parse force "
6545 "parameter \"%s\" (%s)\n",
6546 cur, reason);
6547 continue;
6548 }
6549
6550 if (te.port == -1) {
6551 te.port = last_port;
6552 te.device = last_device;
6553 }
6554
6555 ata_force_tbl[idx++] = te;
6556
6557 last_port = te.port;
6558 last_device = te.device;
6559 }
6560
6561 ata_force_tbl_size = idx;
6562}
1da177e4 6563
1da177e4
LT
6564static int __init ata_init(void)
6565{
d9027470 6566 int rc;
270390e1 6567
33267325
TH
6568 ata_parse_force_param();
6569
6b66d958
MG
6570 ata_acpi_register();
6571
270390e1 6572 rc = ata_sff_init();
ad72cf98
TH
6573 if (rc) {
6574 kfree(ata_force_tbl);
6575 return rc;
6576 }
453b07ac 6577
d9027470
GG
6578 libata_transport_init();
6579 ata_scsi_transport_template = ata_attach_transport();
6580 if (!ata_scsi_transport_template) {
6581 ata_sff_exit();
6582 rc = -ENOMEM;
6583 goto err_out;
4fca377f 6584 }
d9027470 6585
1da177e4
LT
6586 printk(KERN_DEBUG "libata version " DRV_VERSION " loaded.\n");
6587 return 0;
d9027470
GG
6588
6589err_out:
6590 return rc;
1da177e4
LT
6591}
6592
6593static void __exit ata_exit(void)
6594{
d9027470
GG
6595 ata_release_transport(ata_scsi_transport_template);
6596 libata_transport_exit();
270390e1 6597 ata_sff_exit();
6b66d958 6598 ata_acpi_unregister();
33267325 6599 kfree(ata_force_tbl);
1da177e4
LT
6600}
6601
a4625085 6602subsys_initcall(ata_init);
1da177e4
LT
6603module_exit(ata_exit);
6604
9990b6f3 6605static DEFINE_RATELIMIT_STATE(ratelimit, HZ / 5, 1);
67846b30
JG
6606
6607int ata_ratelimit(void)
6608{
9990b6f3 6609 return __ratelimit(&ratelimit);
67846b30
JG
6610}
6611
c0c362b6
TH
6612/**
6613 * ata_msleep - ATA EH owner aware msleep
6614 * @ap: ATA port to attribute the sleep to
6615 * @msecs: duration to sleep in milliseconds
6616 *
6617 * Sleeps @msecs. If the current task is owner of @ap's EH, the
6618 * ownership is released before going to sleep and reacquired
6619 * after the sleep is complete. IOW, other ports sharing the
6620 * @ap->host will be allowed to own the EH while this task is
6621 * sleeping.
6622 *
6623 * LOCKING:
6624 * Might sleep.
6625 */
97750ceb
TH
6626void ata_msleep(struct ata_port *ap, unsigned int msecs)
6627{
c0c362b6
TH
6628 bool owns_eh = ap && ap->host->eh_owner == current;
6629
6630 if (owns_eh)
6631 ata_eh_release(ap);
6632
97750ceb 6633 msleep(msecs);
c0c362b6
TH
6634
6635 if (owns_eh)
6636 ata_eh_acquire(ap);
97750ceb
TH
6637}
6638
c22daff4
TH
6639/**
6640 * ata_wait_register - wait until register value changes
97750ceb 6641 * @ap: ATA port to wait register for, can be NULL
c22daff4
TH
6642 * @reg: IO-mapped register
6643 * @mask: Mask to apply to read register value
6644 * @val: Wait condition
341c2c95
TH
6645 * @interval: polling interval in milliseconds
6646 * @timeout: timeout in milliseconds
c22daff4
TH
6647 *
6648 * Waiting for some bits of register to change is a common
6649 * operation for ATA controllers. This function reads 32bit LE
6650 * IO-mapped register @reg and tests for the following condition.
6651 *
6652 * (*@reg & mask) != val
6653 *
6654 * If the condition is met, it returns; otherwise, the process is
6655 * repeated after @interval_msec until timeout.
6656 *
6657 * LOCKING:
6658 * Kernel thread context (may sleep)
6659 *
6660 * RETURNS:
6661 * The final register value.
6662 */
97750ceb 6663u32 ata_wait_register(struct ata_port *ap, void __iomem *reg, u32 mask, u32 val,
341c2c95 6664 unsigned long interval, unsigned long timeout)
c22daff4 6665{
341c2c95 6666 unsigned long deadline;
c22daff4
TH
6667 u32 tmp;
6668
6669 tmp = ioread32(reg);
6670
6671 /* Calculate timeout _after_ the first read to make sure
6672 * preceding writes reach the controller before starting to
6673 * eat away the timeout.
6674 */
341c2c95 6675 deadline = ata_deadline(jiffies, timeout);
c22daff4 6676
341c2c95 6677 while ((tmp & mask) == val && time_before(jiffies, deadline)) {
97750ceb 6678 ata_msleep(ap, interval);
c22daff4
TH
6679 tmp = ioread32(reg);
6680 }
6681
6682 return tmp;
6683}
6684
dd5b06c4
TH
6685/*
6686 * Dummy port_ops
6687 */
182d7bba 6688static unsigned int ata_dummy_qc_issue(struct ata_queued_cmd *qc)
dd5b06c4 6689{
182d7bba 6690 return AC_ERR_SYSTEM;
dd5b06c4
TH
6691}
6692
182d7bba 6693static void ata_dummy_error_handler(struct ata_port *ap)
dd5b06c4 6694{
182d7bba 6695 /* truly dummy */
dd5b06c4
TH
6696}
6697
029cfd6b 6698struct ata_port_operations ata_dummy_port_ops = {
dd5b06c4
TH
6699 .qc_prep = ata_noop_qc_prep,
6700 .qc_issue = ata_dummy_qc_issue,
182d7bba 6701 .error_handler = ata_dummy_error_handler,
e4a9c373
DW
6702 .sched_eh = ata_std_sched_eh,
6703 .end_eh = ata_std_end_eh,
dd5b06c4
TH
6704};
6705
21b0ad4f
TH
6706const struct ata_port_info ata_dummy_port_info = {
6707 .port_ops = &ata_dummy_port_ops,
6708};
6709
a9a79dfe
JP
6710/*
6711 * Utility print functions
6712 */
6713int ata_port_printk(const struct ata_port *ap, const char *level,
6714 const char *fmt, ...)
6715{
6716 struct va_format vaf;
6717 va_list args;
6718 int r;
6719
6720 va_start(args, fmt);
6721
6722 vaf.fmt = fmt;
6723 vaf.va = &args;
6724
6725 r = printk("%sata%u: %pV", level, ap->print_id, &vaf);
6726
6727 va_end(args);
6728
6729 return r;
6730}
6731EXPORT_SYMBOL(ata_port_printk);
6732
6733int ata_link_printk(const struct ata_link *link, const char *level,
6734 const char *fmt, ...)
6735{
6736 struct va_format vaf;
6737 va_list args;
6738 int r;
6739
6740 va_start(args, fmt);
6741
6742 vaf.fmt = fmt;
6743 vaf.va = &args;
6744
6745 if (sata_pmp_attached(link->ap) || link->ap->slave_link)
6746 r = printk("%sata%u.%02u: %pV",
6747 level, link->ap->print_id, link->pmp, &vaf);
6748 else
6749 r = printk("%sata%u: %pV",
6750 level, link->ap->print_id, &vaf);
6751
6752 va_end(args);
6753
6754 return r;
6755}
6756EXPORT_SYMBOL(ata_link_printk);
6757
6758int ata_dev_printk(const struct ata_device *dev, const char *level,
6759 const char *fmt, ...)
6760{
6761 struct va_format vaf;
6762 va_list args;
6763 int r;
6764
6765 va_start(args, fmt);
6766
6767 vaf.fmt = fmt;
6768 vaf.va = &args;
6769
6770 r = printk("%sata%u.%02u: %pV",
6771 level, dev->link->ap->print_id, dev->link->pmp + dev->devno,
6772 &vaf);
6773
6774 va_end(args);
6775
6776 return r;
6777}
6778EXPORT_SYMBOL(ata_dev_printk);
6779
06296a1e
JP
6780void ata_print_version(const struct device *dev, const char *version)
6781{
6782 dev_printk(KERN_DEBUG, dev, "version %s\n", version);
6783}
6784EXPORT_SYMBOL(ata_print_version);
6785
1da177e4
LT
6786/*
6787 * libata is essentially a library of internal helper functions for
6788 * low-level ATA host controller drivers. As such, the API/ABI is
6789 * likely to change as new drivers are added and updated.
6790 * Do not depend on ABI/API stability.
6791 */
e9c83914
TH
6792EXPORT_SYMBOL_GPL(sata_deb_timing_normal);
6793EXPORT_SYMBOL_GPL(sata_deb_timing_hotplug);
6794EXPORT_SYMBOL_GPL(sata_deb_timing_long);
029cfd6b
TH
6795EXPORT_SYMBOL_GPL(ata_base_port_ops);
6796EXPORT_SYMBOL_GPL(sata_port_ops);
dd5b06c4 6797EXPORT_SYMBOL_GPL(ata_dummy_port_ops);
21b0ad4f 6798EXPORT_SYMBOL_GPL(ata_dummy_port_info);
1eca4365
TH
6799EXPORT_SYMBOL_GPL(ata_link_next);
6800EXPORT_SYMBOL_GPL(ata_dev_next);
1da177e4 6801EXPORT_SYMBOL_GPL(ata_std_bios_param);
d8d9129e 6802EXPORT_SYMBOL_GPL(ata_scsi_unlock_native_capacity);
cca3974e 6803EXPORT_SYMBOL_GPL(ata_host_init);
f3187195 6804EXPORT_SYMBOL_GPL(ata_host_alloc);
f5cda257 6805EXPORT_SYMBOL_GPL(ata_host_alloc_pinfo);
b1c72916 6806EXPORT_SYMBOL_GPL(ata_slave_link_init);
ecef7253 6807EXPORT_SYMBOL_GPL(ata_host_start);
f3187195 6808EXPORT_SYMBOL_GPL(ata_host_register);
f5cda257 6809EXPORT_SYMBOL_GPL(ata_host_activate);
0529c159 6810EXPORT_SYMBOL_GPL(ata_host_detach);
1da177e4 6811EXPORT_SYMBOL_GPL(ata_sg_init);
f686bcb8 6812EXPORT_SYMBOL_GPL(ata_qc_complete);
dedaf2b0 6813EXPORT_SYMBOL_GPL(ata_qc_complete_multiple);
436d34b3 6814EXPORT_SYMBOL_GPL(atapi_cmd_type);
1da177e4
LT
6815EXPORT_SYMBOL_GPL(ata_tf_to_fis);
6816EXPORT_SYMBOL_GPL(ata_tf_from_fis);
6357357c
TH
6817EXPORT_SYMBOL_GPL(ata_pack_xfermask);
6818EXPORT_SYMBOL_GPL(ata_unpack_xfermask);
6819EXPORT_SYMBOL_GPL(ata_xfer_mask2mode);
6820EXPORT_SYMBOL_GPL(ata_xfer_mode2mask);
6821EXPORT_SYMBOL_GPL(ata_xfer_mode2shift);
6822EXPORT_SYMBOL_GPL(ata_mode_string);
6823EXPORT_SYMBOL_GPL(ata_id_xfermask);
04351821 6824EXPORT_SYMBOL_GPL(ata_do_set_mode);
31cc23b3 6825EXPORT_SYMBOL_GPL(ata_std_qc_defer);
e46834cd 6826EXPORT_SYMBOL_GPL(ata_noop_qc_prep);
10305f0f 6827EXPORT_SYMBOL_GPL(ata_dev_disable);
3c567b7d 6828EXPORT_SYMBOL_GPL(sata_set_spd);
aa2731ad 6829EXPORT_SYMBOL_GPL(ata_wait_after_reset);
936fd732
TH
6830EXPORT_SYMBOL_GPL(sata_link_debounce);
6831EXPORT_SYMBOL_GPL(sata_link_resume);
1152b261 6832EXPORT_SYMBOL_GPL(sata_link_scr_lpm);
0aa1113d 6833EXPORT_SYMBOL_GPL(ata_std_prereset);
cc0680a5 6834EXPORT_SYMBOL_GPL(sata_link_hardreset);
57c9efdf 6835EXPORT_SYMBOL_GPL(sata_std_hardreset);
203c75b8 6836EXPORT_SYMBOL_GPL(ata_std_postreset);
2e9edbf8
JG
6837EXPORT_SYMBOL_GPL(ata_dev_classify);
6838EXPORT_SYMBOL_GPL(ata_dev_pair);
67846b30 6839EXPORT_SYMBOL_GPL(ata_ratelimit);
97750ceb 6840EXPORT_SYMBOL_GPL(ata_msleep);
c22daff4 6841EXPORT_SYMBOL_GPL(ata_wait_register);
1da177e4 6842EXPORT_SYMBOL_GPL(ata_scsi_queuecmd);
1da177e4 6843EXPORT_SYMBOL_GPL(ata_scsi_slave_config);
83c47bcb 6844EXPORT_SYMBOL_GPL(ata_scsi_slave_destroy);
a6e6ce8e 6845EXPORT_SYMBOL_GPL(ata_scsi_change_queue_depth);
f6e67035 6846EXPORT_SYMBOL_GPL(__ata_change_queue_depth);
34bf2170
TH
6847EXPORT_SYMBOL_GPL(sata_scr_valid);
6848EXPORT_SYMBOL_GPL(sata_scr_read);
6849EXPORT_SYMBOL_GPL(sata_scr_write);
6850EXPORT_SYMBOL_GPL(sata_scr_write_flush);
936fd732
TH
6851EXPORT_SYMBOL_GPL(ata_link_online);
6852EXPORT_SYMBOL_GPL(ata_link_offline);
6ffa01d8 6853#ifdef CONFIG_PM
cca3974e
JG
6854EXPORT_SYMBOL_GPL(ata_host_suspend);
6855EXPORT_SYMBOL_GPL(ata_host_resume);
6ffa01d8 6856#endif /* CONFIG_PM */
6a62a04d
TH
6857EXPORT_SYMBOL_GPL(ata_id_string);
6858EXPORT_SYMBOL_GPL(ata_id_c_string);
963e4975 6859EXPORT_SYMBOL_GPL(ata_do_dev_read_id);
1da177e4
LT
6860EXPORT_SYMBOL_GPL(ata_scsi_simulate);
6861
1bc4ccff 6862EXPORT_SYMBOL_GPL(ata_pio_need_iordy);
6357357c 6863EXPORT_SYMBOL_GPL(ata_timing_find_mode);
452503f9
AC
6864EXPORT_SYMBOL_GPL(ata_timing_compute);
6865EXPORT_SYMBOL_GPL(ata_timing_merge);
a0f79b92 6866EXPORT_SYMBOL_GPL(ata_timing_cycle2mode);
452503f9 6867
1da177e4
LT
6868#ifdef CONFIG_PCI
6869EXPORT_SYMBOL_GPL(pci_test_config_bits);
1da177e4 6870EXPORT_SYMBOL_GPL(ata_pci_remove_one);
6ffa01d8 6871#ifdef CONFIG_PM
500530f6
TH
6872EXPORT_SYMBOL_GPL(ata_pci_device_do_suspend);
6873EXPORT_SYMBOL_GPL(ata_pci_device_do_resume);
9b847548
JA
6874EXPORT_SYMBOL_GPL(ata_pci_device_suspend);
6875EXPORT_SYMBOL_GPL(ata_pci_device_resume);
6ffa01d8 6876#endif /* CONFIG_PM */
1da177e4 6877#endif /* CONFIG_PCI */
9b847548 6878
b64bbc39
TH
6879EXPORT_SYMBOL_GPL(__ata_ehi_push_desc);
6880EXPORT_SYMBOL_GPL(ata_ehi_push_desc);
6881EXPORT_SYMBOL_GPL(ata_ehi_clear_desc);
cbcdd875
TH
6882EXPORT_SYMBOL_GPL(ata_port_desc);
6883#ifdef CONFIG_PCI
6884EXPORT_SYMBOL_GPL(ata_port_pbar_desc);
6885#endif /* CONFIG_PCI */
7b70fc03 6886EXPORT_SYMBOL_GPL(ata_port_schedule_eh);
dbd82616 6887EXPORT_SYMBOL_GPL(ata_link_abort);
7b70fc03 6888EXPORT_SYMBOL_GPL(ata_port_abort);
e3180499 6889EXPORT_SYMBOL_GPL(ata_port_freeze);
7d77b247 6890EXPORT_SYMBOL_GPL(sata_async_notification);
e3180499
TH
6891EXPORT_SYMBOL_GPL(ata_eh_freeze_port);
6892EXPORT_SYMBOL_GPL(ata_eh_thaw_port);
ece1d636
TH
6893EXPORT_SYMBOL_GPL(ata_eh_qc_complete);
6894EXPORT_SYMBOL_GPL(ata_eh_qc_retry);
10acf3b0 6895EXPORT_SYMBOL_GPL(ata_eh_analyze_ncq_error);
022bdb07 6896EXPORT_SYMBOL_GPL(ata_do_eh);
a1efdaba 6897EXPORT_SYMBOL_GPL(ata_std_error_handler);
be0d18df
AC
6898
6899EXPORT_SYMBOL_GPL(ata_cable_40wire);
6900EXPORT_SYMBOL_GPL(ata_cable_80wire);
6901EXPORT_SYMBOL_GPL(ata_cable_unknown);
c88f90c3 6902EXPORT_SYMBOL_GPL(ata_cable_ignore);
be0d18df 6903EXPORT_SYMBOL_GPL(ata_cable_sata);