[mirror_ubuntu-artful-kernel.git] / drivers / ata / pata_ali.c

/*
 * pata_ali.c 	- ALI 15x3 PATA for new ATA layer
 *			  (C) 2005 Red Hat Inc
 *			  Alan Cox <alan@redhat.com>
 *
 * based in part upon
 * linux/drivers/ide/pci/alim15x3.c		Version 0.17	2003/01/02
 *
 *  Copyright (C) 1998-2000 Michel Aubry, Maintainer
 *  Copyright (C) 1998-2000 Andrzej Krzysztofowicz, Maintainer
 *  Copyright (C) 1999-2000 CJ, cjtsai@ali.com.tw, Maintainer
 *
 *  Copyright (C) 1998-2000 Andre Hedrick (andre@linux-ide.org)
 *  May be copied or modified under the terms of the GNU General Public License
 *  Copyright (C) 2002 Alan Cox <alan@redhat.com>
 *  ALi (now ULi M5228) support by Clear Zhang <Clear.Zhang@ali.com.tw>
 *
 *  Documentation
 *	Chipset documentation available under NDA only
 *
 *  TODO/CHECK
 *	Cannot have ATAPI on both master & slave for rev < c2 (???) but
 *	otherwise should do atapi DMA.
 */

#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/pci.h>
#include <linux/init.h>
#include <linux/blkdev.h>
#include <linux/delay.h>
#include <scsi/scsi_host.h>
#include <linux/libata.h>
#include <linux/dmi.h>

#define DRV_NAME "pata_ali"
#define DRV_VERSION "0.7.2"

/*
 *	Cable special cases
 */

static struct dmi_system_id cable_dmi_table[] = {
	{
		.ident = "HP Pavilion N5430",
		.matches = {
			DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
			DMI_MATCH(DMI_BOARD_NAME, "OmniBook N32N-736"),
		},
	},
	{ }
};

static int ali_cable_override(struct pci_dev *pdev)
{
	/* Fujitsu P2000 */
	if (pdev->subsystem_vendor == 0x10CF && pdev->subsystem_device == 0x10AF)
	   	return 1;
	/* Systems by DMI */
	if (dmi_check_system(cable_dmi_table))
		return 1;
	return 0;
}

/**
 *	ali_c2_cable_detect	-	cable detection
 *	@ap: ATA port
 *
 *	Perform cable detection for C2 and later revisions
 */

static int ali_c2_cable_detect(struct ata_port *ap)
{
	struct pci_dev *pdev = to_pci_dev(ap->host->dev);
	u8 ata66;

	/* Certain laptops use short but suitable cables and don't
	   implement the detect logic */

	if (ali_cable_override(pdev))
		return ATA_CBL_PATA40_SHORT;

	/* Host view cable detect 0x4A bit 0 primary bit 1 secondary
	   Bit set for 40 pin */
	pci_read_config_byte(pdev, 0x4A, &ata66);
	if (ata66 & (1 << ap->port_no))
		return ATA_CBL_PATA40;
	else
		return ATA_CBL_PATA80;
}

/**
 *	ali_early_error_handler	-	reset for eary chip
 *	@ap: ATA port
 *
 *	Handle the reset callback for the later chips with cable detect
 */

static int ali_c2_pre_reset(struct ata_port *ap)
{
	ap->cbl = ali_c2_cable_detect(ap);
	return ata_std_prereset(ap);
}

static void ali_c2_error_handler(struct ata_port *ap)
{
	ata_bmdma_drive_eh(ap, ali_c2_pre_reset,
			       ata_std_softreset, NULL,
			       ata_std_postreset);
}

/**
 *	ali_early_cable_detect	-	cable detection
 *	@ap: ATA port
 *
 *	Perform cable detection for older chipsets. This turns out to be
 *	rather easy to implement
 */

static int ali_early_cable_detect(struct ata_port *ap)
{
	return ATA_CBL_PATA40;
}

/**
 *	ali_early_probe_init	-	reset for early chip
 *	@ap: ATA port
 *
 *	Handle the reset callback for the early (pre cable detect) chips.
 */

static int ali_early_pre_reset(struct ata_port *ap)
{
	ap->cbl = ali_early_cable_detect(ap);
	return ata_std_prereset(ap);
}

static void ali_early_error_handler(struct ata_port *ap)
{
	return ata_bmdma_drive_eh(ap, ali_early_pre_reset,
				     ata_std_softreset, NULL,
				     ata_std_postreset);
}

/**
 *	ali_20_filter		-	filter for earlier ALI DMA
 *	@ap: ALi ATA port
 *	@adev: attached device
 *
 *	Ensure that we do not do DMA on CD devices. We may be able to
 *	fix that later on. Also ensure we do not do UDMA on WDC drives
 */

static unsigned long ali_20_filter(const struct ata_port *ap, struct ata_device *adev, unsigned long mask)
{
	char model_num[ATA_ID_PROD_LEN + 1];
	/* No DMA on anything but a disk for now */
	if (adev->class != ATA_DEV_ATA)
		mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA);
	ata_id_c_string(adev->id, model_num, ATA_ID_PROD, sizeof(model_num));
	if (strstr(model_num, "WDC"))
		return mask &= ~ATA_MASK_UDMA;
	return ata_pci_default_filter(ap, adev, mask);
}

/**
 *	ali_fifo_control	-	FIFO manager
 *	@ap: ALi channel to control
 *	@adev: device for FIFO control
 *	@on: 0 for off 1 for on
 *
 *	Enable or disable the FIFO on a given device. Because of the way the
 *	ALi FIFO works it provides a boost on ATA disk but can be confused by
 *	ATAPI and we must therefore manage it.
 */

static void ali_fifo_control(struct ata_port *ap, struct ata_device *adev, int on)
{
	struct pci_dev *pdev = to_pci_dev(ap->host->dev);
	int pio_fifo = 0x54 + ap->port_no;
	u8 fifo;
	int shift = 4 * adev->devno;

	/* ATA - FIFO on set nibble to 0x05, ATAPI - FIFO off, set nibble to
	   0x00. Not all the docs agree but the behaviour we now use is the
	   one stated in the BIOS Programming Guide */

	pci_read_config_byte(pdev, pio_fifo, &fifo);
	fifo &= ~(0x0F << shift);
	if (on)
		fifo |= (on << shift);
	pci_write_config_byte(pdev, pio_fifo, fifo);
}

/**
 *	ali_program_modes	-	load mode registers
 *	@ap: ALi channel to load
 *	@adev: Device the timing is for
 *	@cmd: Command timing
 *	@data: Data timing
 *	@ultra: UDMA timing or zero for off
 *
 *	Loads the timing registers for cmd/data and disable UDMA if
 *	ultra is zero. If ultra is set then load and enable the UDMA
 *	timing but do not touch the command/data timing.
 */

static void ali_program_modes(struct ata_port *ap, struct ata_device *adev, struct ata_timing *t, u8 ultra)
{
	struct pci_dev *pdev = to_pci_dev(ap->host->dev);
	int cas = 0x58 + 4 * ap->port_no;	/* Command timing */
	int cbt = 0x59 + 4 * ap->port_no;	/* Command timing */
	int drwt = 0x5A + 4 * ap->port_no + adev->devno; /* R/W timing */
	int udmat = 0x56 + ap->port_no;	/* UDMA timing */
	int shift = 4 * adev->devno;
	u8 udma;

	if (t != NULL) {
		t->setup = FIT(t->setup, 1, 8) & 7;
		t->act8b = FIT(t->act8b, 1, 8) & 7;
		t->rec8b = FIT(t->rec8b, 1, 16) & 15;
		t->active = FIT(t->active, 1, 8) & 7;
		t->recover = FIT(t->recover, 1, 16) & 15;

		pci_write_config_byte(pdev, cas, t->setup);
		pci_write_config_byte(pdev, cbt, (t->act8b << 4) | t->rec8b);
		pci_write_config_byte(pdev, drwt, (t->active << 4) | t->recover);
	}

	/* Set up the UDMA enable */
	pci_read_config_byte(pdev, udmat, &udma);
	udma &= ~(0x0F << shift);
	udma |= ultra << shift;
	pci_write_config_byte(pdev, udmat, udma);
}

/**
 *	ali_set_piomode	-	set initial PIO mode data
 *	@ap: ATA interface
 *	@adev: ATA device
 *
 *	Program the ALi registers for PIO mode. FIXME: add timings for
 *	PIO5.
 */

static void ali_set_piomode(struct ata_port *ap, struct ata_device *adev)
{
	struct ata_device *pair = ata_dev_pair(adev);
	struct ata_timing t;
	unsigned long T =  1000000000 / 33333;	/* PCI clock based */

	ata_timing_compute(adev, adev->pio_mode, &t, T, 1);
	if (pair) {
		struct ata_timing p;
		ata_timing_compute(pair, pair->pio_mode, &p, T, 1);
		ata_timing_merge(&p, &t, &t, ATA_TIMING_SETUP|ATA_TIMING_8BIT);
		if (pair->dma_mode) {
			ata_timing_compute(pair, pair->dma_mode, &p, T, 1);
			ata_timing_merge(&p, &t, &t, ATA_TIMING_SETUP|ATA_TIMING_8BIT);
		}
	}

	/* PIO FIFO is only permitted on ATA disk */
	if (adev->class != ATA_DEV_ATA)
		ali_fifo_control(ap, adev, 0x00);
	ali_program_modes(ap, adev, &t, 0);
	if (adev->class == ATA_DEV_ATA)
		ali_fifo_control(ap, adev, 0x05);

}

/**
 *	ali_set_dmamode	-	set initial DMA mode data
 *	@ap: ATA interface
 *	@adev: ATA device
 *
 *	FIXME: MWDMA timings
 */

static void ali_set_dmamode(struct ata_port *ap, struct ata_device *adev)
{
	static u8 udma_timing[7] = { 0xC, 0xB, 0xA, 0x9, 0x8, 0xF, 0xD };
	struct ata_device *pair = ata_dev_pair(adev);
	struct ata_timing t;
	unsigned long T =  1000000000 / 33333;	/* PCI clock based */
	struct pci_dev *pdev = to_pci_dev(ap->host->dev);


	if (adev->class == ATA_DEV_ATA)
		ali_fifo_control(ap, adev, 0x08);

	if (adev->dma_mode >= XFER_UDMA_0) {
		ali_program_modes(ap, adev, NULL, udma_timing[adev->dma_mode - XFER_UDMA_0]);
		if (adev->dma_mode >= XFER_UDMA_3) {
			u8 reg4b;
			pci_read_config_byte(pdev, 0x4B, &reg4b);
			reg4b |= 1;
			pci_write_config_byte(pdev, 0x4B, reg4b);
		}
	} else {
		ata_timing_compute(adev, adev->dma_mode, &t, T, 1);
		if (pair) {
			struct ata_timing p;
			ata_timing_compute(pair, pair->pio_mode, &p, T, 1);
			ata_timing_merge(&p, &t, &t, ATA_TIMING_SETUP|ATA_TIMING_8BIT);
			if (pair->dma_mode) {
				ata_timing_compute(pair, pair->dma_mode, &p, T, 1);
				ata_timing_merge(&p, &t, &t, ATA_TIMING_SETUP|ATA_TIMING_8BIT);
			}
		}
		ali_program_modes(ap, adev, &t, 0);
	}
}

/**
 *	ali_lock_sectors	-	Keep older devices to 255 sector mode
 *	@ap: ATA port
 *	@adev: Device
 *
 *	Called during the bus probe for each device that is found. We use
 *	this call to lock the sector count of the device to 255 or less on
 *	older ALi controllers. If we didn't do this then large I/O's would
 *	require LBA48 commands which the older ALi requires are issued by
 *	slower PIO methods
 */

static void ali_lock_sectors(struct ata_port *ap, struct ata_device *adev)
{
	adev->max_sectors = 255;
}

static struct scsi_host_template ali_sht = {
	.module			= THIS_MODULE,
	.name			= DRV_NAME,
	.ioctl			= ata_scsi_ioctl,
	.queuecommand		= ata_scsi_queuecmd,
	.can_queue		= ATA_DEF_QUEUE,
	.this_id		= ATA_SHT_THIS_ID,
	.sg_tablesize		= LIBATA_MAX_PRD,
	.cmd_per_lun		= ATA_SHT_CMD_PER_LUN,
	.emulated		= ATA_SHT_EMULATED,
	.use_clustering		= ATA_SHT_USE_CLUSTERING,
	.proc_name		= DRV_NAME,
	.dma_boundary		= ATA_DMA_BOUNDARY,
	.slave_configure	= ata_scsi_slave_config,
	.slave_destroy		= ata_scsi_slave_destroy,
	.bios_param		= ata_std_bios_param,
	.resume			= ata_scsi_device_resume,
	.suspend		= ata_scsi_device_suspend,
};

/*
 *	Port operations for PIO only ALi
 */

static struct ata_port_operations ali_early_port_ops = {
	.port_disable	= ata_port_disable,
	.set_piomode	= ali_set_piomode,
	.tf_load	= ata_tf_load,
	.tf_read	= ata_tf_read,
	.check_status 	= ata_check_status,
	.exec_command	= ata_exec_command,
	.dev_select 	= ata_std_dev_select,

	.freeze		= ata_bmdma_freeze,
	.thaw		= ata_bmdma_thaw,
	.error_handler	= ali_early_error_handler,
	.post_internal_cmd = ata_bmdma_post_internal_cmd,

	.qc_prep 	= ata_qc_prep,
	.qc_issue	= ata_qc_issue_prot,

	.data_xfer	= ata_data_xfer,

	.irq_handler	= ata_interrupt,
	.irq_clear	= ata_bmdma_irq_clear,

	.port_start	= ata_port_start,
};

/*
 *	Port operations for DMA capable ALi without cable
 *	detect
 */
static struct ata_port_operations ali_20_port_ops = {
	.port_disable	= ata_port_disable,

	.set_piomode	= ali_set_piomode,
	.set_dmamode	= ali_set_dmamode,
	.mode_filter	= ali_20_filter,

	.tf_load	= ata_tf_load,
	.tf_read	= ata_tf_read,
	.check_status 	= ata_check_status,
	.exec_command	= ata_exec_command,
	.dev_select 	= ata_std_dev_select,
	.dev_config	= ali_lock_sectors,

	.freeze		= ata_bmdma_freeze,
	.thaw		= ata_bmdma_thaw,
	.error_handler	= ali_early_error_handler,
	.post_internal_cmd = ata_bmdma_post_internal_cmd,

	.bmdma_setup 	= ata_bmdma_setup,
	.bmdma_start 	= ata_bmdma_start,
	.bmdma_stop	= ata_bmdma_stop,
	.bmdma_status 	= ata_bmdma_status,

	.qc_prep 	= ata_qc_prep,
	.qc_issue	= ata_qc_issue_prot,

	.data_xfer	= ata_data_xfer,

	.irq_handler	= ata_interrupt,
	.irq_clear	= ata_bmdma_irq_clear,

	.port_start	= ata_port_start,
};

/*
 *	Port operations for DMA capable ALi with cable detect
 */
static struct ata_port_operations ali_c2_port_ops = {
	.port_disable	= ata_port_disable,
	.set_piomode	= ali_set_piomode,
	.set_dmamode	= ali_set_dmamode,
	.mode_filter	= ata_pci_default_filter,
	.tf_load	= ata_tf_load,
	.tf_read	= ata_tf_read,
	.check_status 	= ata_check_status,
	.exec_command	= ata_exec_command,
	.dev_select 	= ata_std_dev_select,
	.dev_config	= ali_lock_sectors,

	.freeze		= ata_bmdma_freeze,
	.thaw		= ata_bmdma_thaw,
	.error_handler	= ali_c2_error_handler,
	.post_internal_cmd = ata_bmdma_post_internal_cmd,

	.bmdma_setup 	= ata_bmdma_setup,
	.bmdma_start 	= ata_bmdma_start,
	.bmdma_stop	= ata_bmdma_stop,
	.bmdma_status 	= ata_bmdma_status,

	.qc_prep 	= ata_qc_prep,
	.qc_issue	= ata_qc_issue_prot,

	.data_xfer	= ata_data_xfer,

	.irq_handler	= ata_interrupt,
	.irq_clear	= ata_bmdma_irq_clear,

	.port_start	= ata_port_start,
};

/*
 *	Port operations for DMA capable ALi with cable detect and LBA48
 */
static struct ata_port_operations ali_c5_port_ops = {
	.port_disable	= ata_port_disable,
	.set_piomode	= ali_set_piomode,
	.set_dmamode	= ali_set_dmamode,
	.mode_filter	= ata_pci_default_filter,
	.tf_load	= ata_tf_load,
	.tf_read	= ata_tf_read,
	.check_status 	= ata_check_status,
	.exec_command	= ata_exec_command,
	.dev_select 	= ata_std_dev_select,

	.freeze		= ata_bmdma_freeze,
	.thaw		= ata_bmdma_thaw,
	.error_handler	= ali_c2_error_handler,
	.post_internal_cmd = ata_bmdma_post_internal_cmd,

	.bmdma_setup 	= ata_bmdma_setup,
	.bmdma_start 	= ata_bmdma_start,
	.bmdma_stop	= ata_bmdma_stop,
	.bmdma_status 	= ata_bmdma_status,

	.qc_prep 	= ata_qc_prep,
	.qc_issue	= ata_qc_issue_prot,

	.data_xfer	= ata_data_xfer,

	.irq_handler	= ata_interrupt,
	.irq_clear	= ata_bmdma_irq_clear,

	.port_start	= ata_port_start,
};


/**
 *	ali_init_chipset	-	chip setup function
 *	@pdev: PCI device of ATA controller
 *
 *	Perform the setup on the device that must be done both at boot
 *	and at resume time.
 */

static void ali_init_chipset(struct pci_dev *pdev)
{
	u8 rev, tmp;
	struct pci_dev *north, *isa_bridge;

	pci_read_config_byte(pdev, PCI_REVISION_ID, &rev);

	/*
	 * The chipset revision selects the driver operations and
	 * mode data.
	 */

	if (rev >= 0x20 && rev < 0xC2) {
		/* 1543-E/F, 1543C-C, 1543C-D, 1543C-E */
		pci_read_config_byte(pdev, 0x4B, &tmp);
		/* Clear CD-ROM DMA write bit */
		tmp &= 0x7F;
		pci_write_config_byte(pdev, 0x4B, tmp);
	} else if (rev >= 0xC2) {
		/* Enable cable detection logic */
		pci_read_config_byte(pdev, 0x4B, &tmp);
		pci_write_config_byte(pdev, 0x4B, tmp | 0x08);
	}
	north = pci_get_bus_and_slot(0, PCI_DEVFN(0,0));
	isa_bridge = pci_get_device(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M1533, NULL);

	if (north && north->vendor == PCI_VENDOR_ID_AL && isa_bridge) {
		/* Configure the ALi bridge logic. For non ALi rely on BIOS.
		   Set the south bridge enable bit */
		pci_read_config_byte(isa_bridge, 0x79, &tmp);
		if (rev == 0xC2)
			pci_write_config_byte(isa_bridge, 0x79, tmp | 0x04);
		else if (rev > 0xC2 && rev < 0xC5)
			pci_write_config_byte(isa_bridge, 0x79, tmp | 0x02);
	}
	if (rev >= 0x20) {
		/*
		 * CD_ROM DMA on (0x53 bit 0). Enable this even if we want
		 * to use PIO. 0x53 bit 1 (rev 20 only) - enable FIFO control
		 * via 0x54/55.
		 */
		pci_read_config_byte(pdev, 0x53, &tmp);
		if (rev <= 0x20)
			tmp &= ~0x02;
		if (rev >= 0xc7)
			tmp |= 0x03;
		else
			tmp |= 0x01;	/* CD_ROM enable for DMA */
		pci_write_config_byte(pdev, 0x53, tmp);
	}
	pci_dev_put(isa_bridge);
	pci_dev_put(north);
	ata_pci_clear_simplex(pdev);
}
/**
 *	ali_init_one		-	discovery callback
 *	@pdev: PCI device ID
 *	@id: PCI table info
 *
 *	An ALi IDE interface has been discovered. Figure out what revision
 *	and perform configuration work before handing it to the ATA layer
 */

static int ali_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
{
	static struct ata_port_info info_early = {
		.sht = &ali_sht,
		.flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST,
		.pio_mask = 0x1f,
		.port_ops = &ali_early_port_ops
	};
	/* Revision 0x20 added DMA */
	static struct ata_port_info info_20 = {
		.sht = &ali_sht,
		.flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST | ATA_FLAG_PIO_LBA48,
		.pio_mask = 0x1f,
		.mwdma_mask = 0x07,
		.port_ops = &ali_20_port_ops
	};
	/* Revision 0x20 with support logic added UDMA */
	static struct ata_port_info info_20_udma = {
		.sht = &ali_sht,
		.flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST | ATA_FLAG_PIO_LBA48,
		.pio_mask = 0x1f,
		.mwdma_mask = 0x07,
		.udma_mask = 0x07,	/* UDMA33 */
		.port_ops = &ali_20_port_ops
	};
	/* Revision 0xC2 adds UDMA66 */
	static struct ata_port_info info_c2 = {
		.sht = &ali_sht,
		.flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST | ATA_FLAG_PIO_LBA48,
		.pio_mask = 0x1f,
		.mwdma_mask = 0x07,
		.udma_mask = 0x1f,
		.port_ops = &ali_c2_port_ops
	};
	/* Revision 0xC3 is UDMA100 */
	static struct ata_port_info info_c3 = {
		.sht = &ali_sht,
		.flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST | ATA_FLAG_PIO_LBA48,
		.pio_mask = 0x1f,
		.mwdma_mask = 0x07,
		.udma_mask = 0x3f,
		.port_ops = &ali_c2_port_ops
	};
	/* Revision 0xC4 is UDMA133 */
	static struct ata_port_info info_c4 = {
		.sht = &ali_sht,
		.flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST | ATA_FLAG_PIO_LBA48,
		.pio_mask = 0x1f,
		.mwdma_mask = 0x07,
		.udma_mask = 0x7f,
		.port_ops = &ali_c2_port_ops
	};
	/* Revision 0xC5 is UDMA133 with LBA48 DMA */
	static struct ata_port_info info_c5 = {
		.sht = &ali_sht,
		.flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST,
		.pio_mask = 0x1f,
		.mwdma_mask = 0x07,
		.udma_mask = 0x7f,
		.port_ops = &ali_c5_port_ops
	};

	static struct ata_port_info *port_info[2];
	u8 rev, tmp;
	struct pci_dev *isa_bridge;

	pci_read_config_byte(pdev, PCI_REVISION_ID, &rev);

	/*
	 * The chipset revision selects the driver operations and
	 * mode data.
	 */

	if (rev < 0x20) {
		port_info[0] = port_info[1] = &info_early;
	} else if (rev < 0xC2) {
        	port_info[0] = port_info[1] = &info_20;
	} else if (rev == 0xC2) {
        	port_info[0] = port_info[1] = &info_c2;
	} else if (rev == 0xC3) {
        	port_info[0] = port_info[1] = &info_c3;
	} else if (rev == 0xC4) {
        	port_info[0] = port_info[1] = &info_c4;
	} else
        	port_info[0] = port_info[1] = &info_c5;

	ali_init_chipset(pdev);

	isa_bridge = pci_get_device(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M1533, NULL);
	if (isa_bridge && rev >= 0x20 && rev < 0xC2) {
		/* Are we paired with a UDMA capable chip */
		pci_read_config_byte(isa_bridge, 0x5E, &tmp);
		if ((tmp & 0x1E) == 0x12)
	        	port_info[0] = port_info[1] = &info_20_udma;
		pci_dev_put(isa_bridge);
	}
	return ata_pci_init_one(pdev, port_info, 2);
}

static int ali_reinit_one(struct pci_dev *pdev)
{
	ali_init_chipset(pdev);
	return ata_pci_device_resume(pdev);
}

static const struct pci_device_id ali[] = {
	{ PCI_VDEVICE(AL, PCI_DEVICE_ID_AL_M5228), },
	{ PCI_VDEVICE(AL, PCI_DEVICE_ID_AL_M5229), },

	{ },
};

static struct pci_driver ali_pci_driver = {
	.name 		= DRV_NAME,
	.id_table	= ali,
	.probe 		= ali_init_one,
	.remove		= ata_pci_remove_one,
	.suspend	= ata_pci_device_suspend,
	.resume		= ali_reinit_one,
};

static int __init ali_init(void)
{
	return pci_register_driver(&ali_pci_driver);
}


static void __exit ali_exit(void)
{
	pci_unregister_driver(&ali_pci_driver);
}


MODULE_AUTHOR("Alan Cox");
MODULE_DESCRIPTION("low-level driver for ALi PATA");
MODULE_LICENSE("GPL");
MODULE_DEVICE_TABLE(pci, ali);
MODULE_VERSION(DRV_VERSION);

module_init(ali_init);
module_exit(ali_exit);
Commit	Line	Data
669a5db4 JG	1	/*
	2	* pata_ali.c - ALI 15x3 PATA for new ATA layer
	3	* (C) 2005 Red Hat Inc
	4	* Alan Cox <alan@redhat.com>
	5	*
	6	* based in part upon
	7	* linux/drivers/ide/pci/alim15x3.c Version 0.17 2003/01/02
	8	*
	9	* Copyright (C) 1998-2000 Michel Aubry, Maintainer
	10	* Copyright (C) 1998-2000 Andrzej Krzysztofowicz, Maintainer
	11	* Copyright (C) 1999-2000 CJ, cjtsai@ali.com.tw, Maintainer
	12	*
	13	* Copyright (C) 1998-2000 Andre Hedrick (andre@linux-ide.org)
	14	* May be copied or modified under the terms of the GNU General Public License
	15	* Copyright (C) 2002 Alan Cox <alan@redhat.com>
	16	* ALi (now ULi M5228) support by Clear Zhang <Clear.Zhang@ali.com.tw>
	17	*
	18	* Documentation
	19	* Chipset documentation available under NDA only
	20	*
	21	* TODO/CHECK
	22	* Cannot have ATAPI on both master & slave for rev < c2 (???) but
	23	* otherwise should do atapi DMA.
	24	*/
	25
	26	#include <linux/kernel.h>
	27	#include <linux/module.h>
	28	#include <linux/pci.h>
	29	#include <linux/init.h>
	30	#include <linux/blkdev.h>
	31	#include <linux/delay.h>
	32	#include <scsi/scsi_host.h>
	33	#include <linux/libata.h>
	34	#include <linux/dmi.h>
	35
	36	#define DRV_NAME "pata_ali"
8e42a5a2	37	#define DRV_VERSION "0.7.2"
669a5db4 JG	38
	39	/*
	40	* Cable special cases
	41	*/
	42
	43	static struct dmi_system_id cable_dmi_table[] = {
	44	{
	45	.ident = "HP Pavilion N5430",
	46	.matches = {
	47	DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
	48	DMI_MATCH(DMI_BOARD_NAME, "OmniBook N32N-736"),
	49	},
	50	},
	51	{ }
	52	};
	53
	54	static int ali_cable_override(struct pci_dev *pdev)
	55	{
	56	/* Fujitsu P2000 */
	57	if (pdev->subsystem_vendor == 0x10CF && pdev->subsystem_device == 0x10AF)
	58	return 1;
	59	/* Systems by DMI */
	60	if (dmi_check_system(cable_dmi_table))
	61	return 1;
	62	return 0;
	63	}
	64
	65	/**
	66	* ali_c2_cable_detect - cable detection
	67	* @ap: ATA port
	68	*
	69	* Perform cable detection for C2 and later revisions
	70	*/
	71
	72	static int ali_c2_cable_detect(struct ata_port *ap)
	73	{
	74	struct pci_dev *pdev = to_pci_dev(ap->host->dev);
	75	u8 ata66;
	76
	77	/* Certain laptops use short but suitable cables and don't
	78	implement the detect logic */
	79
	80	if (ali_cable_override(pdev))
fc085150	81	return ATA_CBL_PATA40_SHORT;
669a5db4 JG	82
	83	/* Host view cable detect 0x4A bit 0 primary bit 1 secondary
	84	Bit set for 40 pin */
	85	pci_read_config_byte(pdev, 0x4A, &ata66);
	86	if (ata66 & (1 << ap->port_no))
	87	return ATA_CBL_PATA40;
	88	else
	89	return ATA_CBL_PATA80;
	90	}
	91
	92	/**
	93	* ali_early_error_handler - reset for eary chip
	94	* @ap: ATA port
	95	*
	96	* Handle the reset callback for the later chips with cable detect
	97	*/
	98
	99	static int ali_c2_pre_reset(struct ata_port *ap)
	100	{
	101	ap->cbl = ali_c2_cable_detect(ap);
	102	return ata_std_prereset(ap);
	103	}
	104
	105	static void ali_c2_error_handler(struct ata_port *ap)
	106	{
	107	ata_bmdma_drive_eh(ap, ali_c2_pre_reset,
	108	ata_std_softreset, NULL,
	109	ata_std_postreset);
	110	}
	111
	112	/**
	113	* ali_early_cable_detect - cable detection
	114	* @ap: ATA port
	115	*
	116	* Perform cable detection for older chipsets. This turns out to be
	117	* rather easy to implement
	118	*/
	119
	120	static int ali_early_cable_detect(struct ata_port *ap)
	121	{
	122	return ATA_CBL_PATA40;
	123	}
	124
	125	/**
	126	* ali_early_probe_init - reset for early chip
	127	* @ap: ATA port
	128	*
	129	* Handle the reset callback for the early (pre cable detect) chips.
	130	*/
	131
	132	static int ali_early_pre_reset(struct ata_port *ap)
	133	{
	134	ap->cbl = ali_early_cable_detect(ap);
	135	return ata_std_prereset(ap);
	136	}
	137
	138	static void ali_early_error_handler(struct ata_port *ap)
	139	{
	140	return ata_bmdma_drive_eh(ap, ali_early_pre_reset,
	141	ata_std_softreset, NULL,
	142	ata_std_postreset);
	143	}
	144
	145	/**
146	* ali_20_filter - filter for earlier ALI DMA
147	* @ap: ALi ATA port
148	* @adev: attached device
149	*
150	* Ensure that we do not do DMA on CD devices. We may be able to
151	* fix that later on. Also ensure we do not do UDMA on WDC drives
152	*/
153
154	static unsigned long ali_20_filter(const struct ata_port ap, struct ata_device adev, unsigned long mask)
155	{
8bfa79fc	156	char model_num[ATA_ID_PROD_LEN + 1];
669a5db4 JG	157	/* No DMA on anything but a disk for now */
	158	if (adev->class != ATA_DEV_ATA)
	159	mask &= ~(ATA_MASK_MWDMA \| ATA_MASK_UDMA);
8bfa79fc	160	ata_id_c_string(adev->id, model_num, ATA_ID_PROD, sizeof(model_num));
669a5db4 JG	161	if (strstr(model_num, "WDC"))
	162	return mask &= ~ATA_MASK_UDMA;
	163	return ata_pci_default_filter(ap, adev, mask);
	164	}
	165
	166	/**
	167	* ali_fifo_control - FIFO manager
	168	* @ap: ALi channel to control
	169	* @adev: device for FIFO control
	170	* @on: 0 for off 1 for on
	171	*
	172	* Enable or disable the FIFO on a given device. Because of the way the
	173	* ALi FIFO works it provides a boost on ATA disk but can be confused by
	174	* ATAPI and we must therefore manage it.
	175	*/
	176
	177	static void ali_fifo_control(struct ata_port ap, struct ata_device adev, int on)
	178	{
	179	struct pci_dev *pdev = to_pci_dev(ap->host->dev);
	180	int pio_fifo = 0x54 + ap->port_no;
	181	u8 fifo;
	182	int shift = 4 * adev->devno;
	183
	184	/* ATA - FIFO on set nibble to 0x05, ATAPI - FIFO off, set nibble to
	185	0x00. Not all the docs agree but the behaviour we now use is the
	186	one stated in the BIOS Programming Guide */
85cd7251	187
669a5db4 JG	188	pci_read_config_byte(pdev, pio_fifo, &fifo);
	189	fifo &= ~(0x0F << shift);
	190	if (on)
	191	fifo \|= (on << shift);
	192	pci_write_config_byte(pdev, pio_fifo, fifo);
	193	}
	194
	195	/**
	196	* ali_program_modes - load mode registers
	197	* @ap: ALi channel to load
	198	* @adev: Device the timing is for
	199	* @cmd: Command timing
	200	* @data: Data timing
	201	* @ultra: UDMA timing or zero for off
	202	*
	203	* Loads the timing registers for cmd/data and disable UDMA if
	204	* ultra is zero. If ultra is set then load and enable the UDMA
	205	* timing but do not touch the command/data timing.
	206	*/
	207
	208	static void ali_program_modes(struct ata_port ap, struct ata_device adev, struct ata_timing *t, u8 ultra)
	209	{
	210	struct pci_dev *pdev = to_pci_dev(ap->host->dev);
	211	int cas = 0x58 + 4 * ap->port_no; /* Command timing */
	212	int cbt = 0x59 + 4 * ap->port_no; /* Command timing */
	213	int drwt = 0x5A + 4 * ap->port_no + adev->devno; /* R/W timing */
	214	int udmat = 0x56 + ap->port_no; /* UDMA timing */
	215	int shift = 4 * adev->devno;
	216	u8 udma;
	217
	218	if (t != NULL) {
	219	t->setup = FIT(t->setup, 1, 8) & 7;
	220	t->act8b = FIT(t->act8b, 1, 8) & 7;
	221	t->rec8b = FIT(t->rec8b, 1, 16) & 15;
	222	t->active = FIT(t->active, 1, 8) & 7;
	223	t->recover = FIT(t->recover, 1, 16) & 15;
	224
	225	pci_write_config_byte(pdev, cas, t->setup);
	226	pci_write_config_byte(pdev, cbt, (t->act8b << 4) \| t->rec8b);
	227	pci_write_config_byte(pdev, drwt, (t->active << 4) \| t->recover);
	228	}
	229
	230	/* Set up the UDMA enable */
	231	pci_read_config_byte(pdev, udmat, &udma);
	232	udma &= ~(0x0F << shift);
	233	udma \|= ultra << shift;
	234	pci_write_config_byte(pdev, udmat, udma);
	235	}
	236
	237	/**
	238	* ali_set_piomode - set initial PIO mode data
	239	* @ap: ATA interface
	240	* @adev: ATA device
	241	*
	242	* Program the ALi registers for PIO mode. FIXME: add timings for
	243	* PIO5.
	244	*/
	245
	246	static void ali_set_piomode(struct ata_port ap, struct ata_device adev)
	247	{
	248	struct ata_device *pair = ata_dev_pair(adev);
	249	struct ata_timing t;
	250	unsigned long T = 1000000000 / 33333; /* PCI clock based */
	251
252	ata_timing_compute(adev, adev->pio_mode, &t, T, 1);
253	if (pair) {
254	struct ata_timing p;
255	ata_timing_compute(pair, pair->pio_mode, &p, T, 1);
256	ata_timing_merge(&p, &t, &t, ATA_TIMING_SETUP\|ATA_TIMING_8BIT);
257	if (pair->dma_mode) {
258	ata_timing_compute(pair, pair->dma_mode, &p, T, 1);
259	ata_timing_merge(&p, &t, &t, ATA_TIMING_SETUP\|ATA_TIMING_8BIT);
260	}
261	}
262
263	/* PIO FIFO is only permitted on ATA disk */
264	if (adev->class != ATA_DEV_ATA)
265	ali_fifo_control(ap, adev, 0x00);
266	ali_program_modes(ap, adev, &t, 0);
267	if (adev->class == ATA_DEV_ATA)
268	ali_fifo_control(ap, adev, 0x05);
269
270	}
271
272	/**
273	* ali_set_dmamode - set initial DMA mode data
274	* @ap: ATA interface
275	* @adev: ATA device
276	*
277	* FIXME: MWDMA timings
278	*/
279
280	static void ali_set_dmamode(struct ata_port ap, struct ata_device adev)
281	{
282	static u8 udma_timing[7] = { 0xC, 0xB, 0xA, 0x9, 0x8, 0xF, 0xD };
283	struct ata_device *pair = ata_dev_pair(adev);
284	struct ata_timing t;
285	unsigned long T = 1000000000 / 33333; /* PCI clock based */
286	struct pci_dev *pdev = to_pci_dev(ap->host->dev);
287
288
289	if (adev->class == ATA_DEV_ATA)
290	ali_fifo_control(ap, adev, 0x08);
291
292	if (adev->dma_mode >= XFER_UDMA_0) {
293	ali_program_modes(ap, adev, NULL, udma_timing[adev->dma_mode - XFER_UDMA_0]);
294	if (adev->dma_mode >= XFER_UDMA_3) {
295	u8 reg4b;
296	pci_read_config_byte(pdev, 0x4B, &reg4b);
297	reg4b \|= 1;
298	pci_write_config_byte(pdev, 0x4B, reg4b);
299	}
300	} else {
301	ata_timing_compute(adev, adev->dma_mode, &t, T, 1);
302	if (pair) {
303	struct ata_timing p;
304	ata_timing_compute(pair, pair->pio_mode, &p, T, 1);
305	ata_timing_merge(&p, &t, &t, ATA_TIMING_SETUP\|ATA_TIMING_8BIT);
306	if (pair->dma_mode) {
307	ata_timing_compute(pair, pair->dma_mode, &p, T, 1);
308	ata_timing_merge(&p, &t, &t, ATA_TIMING_SETUP\|ATA_TIMING_8BIT);
309	}
310	}
311	ali_program_modes(ap, adev, &t, 0);
312	}
313	}
314
315	/**
316	* ali_lock_sectors - Keep older devices to 255 sector mode
317	* @ap: ATA port
318	* @adev: Device
319	*
320	* Called during the bus probe for each device that is found. We use
321	* this call to lock the sector count of the device to 255 or less on
322	* older ALi controllers. If we didn't do this then large I/O's would
323	* require LBA48 commands which the older ALi requires are issued by
324	* slower PIO methods
325	*/
326
327	static void ali_lock_sectors(struct ata_port ap, struct ata_device adev)
328	{
329	adev->max_sectors = 255;
330	}
331
332	static struct scsi_host_template ali_sht = {
333	.module = THIS_MODULE,
334	.name = DRV_NAME,
335	.ioctl = ata_scsi_ioctl,
336	.queuecommand = ata_scsi_queuecmd,
337	.can_queue = ATA_DEF_QUEUE,
338	.this_id = ATA_SHT_THIS_ID,
339	.sg_tablesize = LIBATA_MAX_PRD,
669a5db4 JG	340	.cmd_per_lun = ATA_SHT_CMD_PER_LUN,
	341	.emulated = ATA_SHT_EMULATED,
	342	.use_clustering = ATA_SHT_USE_CLUSTERING,
	343	.proc_name = DRV_NAME,
	344	.dma_boundary = ATA_DMA_BOUNDARY,
	345	.slave_configure = ata_scsi_slave_config,
afdfe899	346	.slave_destroy = ata_scsi_slave_destroy,
669a5db4	347	.bios_param = ata_std_bios_param,
34d8dfb1 AC	348	.resume = ata_scsi_device_resume,
34d8dfb1 AC	349	.suspend = ata_scsi_device_suspend,
669a5db4 JG	350	};
	351
	352	/*
	353	* Port operations for PIO only ALi
	354	*/
	355
	356	static struct ata_port_operations ali_early_port_ops = {
	357	.port_disable = ata_port_disable,
	358	.set_piomode = ali_set_piomode,
	359	.tf_load = ata_tf_load,
	360	.tf_read = ata_tf_read,
	361	.check_status = ata_check_status,
	362	.exec_command = ata_exec_command,
	363	.dev_select = ata_std_dev_select,
	364
	365	.freeze = ata_bmdma_freeze,
	366	.thaw = ata_bmdma_thaw,
	367	.error_handler = ali_early_error_handler,
	368	.post_internal_cmd = ata_bmdma_post_internal_cmd,
	369
	370	.qc_prep = ata_qc_prep,
	371	.qc_issue = ata_qc_issue_prot,
bda30288	372
0d5ff566	373	.data_xfer = ata_data_xfer,
669a5db4 JG	374
	375	.irq_handler = ata_interrupt,
	376	.irq_clear = ata_bmdma_irq_clear,
	377
	378	.port_start = ata_port_start,
669a5db4 JG	379	};
	380
	381	/*
	382	* Port operations for DMA capable ALi without cable
	383	* detect
	384	*/
	385	static struct ata_port_operations ali_20_port_ops = {
	386	.port_disable = ata_port_disable,
	387
	388	.set_piomode = ali_set_piomode,
	389	.set_dmamode = ali_set_dmamode,
	390	.mode_filter = ali_20_filter,
	391
	392	.tf_load = ata_tf_load,
	393	.tf_read = ata_tf_read,
	394	.check_status = ata_check_status,
	395	.exec_command = ata_exec_command,
	396	.dev_select = ata_std_dev_select,
	397	.dev_config = ali_lock_sectors,
	398
	399	.freeze = ata_bmdma_freeze,
	400	.thaw = ata_bmdma_thaw,
	401	.error_handler = ali_early_error_handler,
	402	.post_internal_cmd = ata_bmdma_post_internal_cmd,
	403
	404	.bmdma_setup = ata_bmdma_setup,
	405	.bmdma_start = ata_bmdma_start,
	406	.bmdma_stop = ata_bmdma_stop,
	407	.bmdma_status = ata_bmdma_status,
	408
	409	.qc_prep = ata_qc_prep,
	410	.qc_issue = ata_qc_issue_prot,
bda30288	411
0d5ff566	412	.data_xfer = ata_data_xfer,
669a5db4 JG	413
	414	.irq_handler = ata_interrupt,
	415	.irq_clear = ata_bmdma_irq_clear,
	416
	417	.port_start = ata_port_start,
669a5db4 JG	418	};
	419
	420	/*
	421	* Port operations for DMA capable ALi with cable detect
	422	*/
	423	static struct ata_port_operations ali_c2_port_ops = {
	424	.port_disable = ata_port_disable,
	425	.set_piomode = ali_set_piomode,
	426	.set_dmamode = ali_set_dmamode,
	427	.mode_filter = ata_pci_default_filter,
	428	.tf_load = ata_tf_load,
	429	.tf_read = ata_tf_read,
	430	.check_status = ata_check_status,
	431	.exec_command = ata_exec_command,
	432	.dev_select = ata_std_dev_select,
	433	.dev_config = ali_lock_sectors,
	434
	435	.freeze = ata_bmdma_freeze,
	436	.thaw = ata_bmdma_thaw,
	437	.error_handler = ali_c2_error_handler,
	438	.post_internal_cmd = ata_bmdma_post_internal_cmd,
	439
	440	.bmdma_setup = ata_bmdma_setup,
	441	.bmdma_start = ata_bmdma_start,
	442	.bmdma_stop = ata_bmdma_stop,
	443	.bmdma_status = ata_bmdma_status,
	444
	445	.qc_prep = ata_qc_prep,
	446	.qc_issue = ata_qc_issue_prot,
bda30288	447
0d5ff566	448	.data_xfer = ata_data_xfer,
669a5db4 JG	449
	450	.irq_handler = ata_interrupt,
	451	.irq_clear = ata_bmdma_irq_clear,
	452
	453	.port_start = ata_port_start,
669a5db4 JG	454	};
	455
	456	/*
	457	* Port operations for DMA capable ALi with cable detect and LBA48
	458	*/
	459	static struct ata_port_operations ali_c5_port_ops = {
	460	.port_disable = ata_port_disable,
	461	.set_piomode = ali_set_piomode,
	462	.set_dmamode = ali_set_dmamode,
	463	.mode_filter = ata_pci_default_filter,
	464	.tf_load = ata_tf_load,
	465	.tf_read = ata_tf_read,
	466	.check_status = ata_check_status,
	467	.exec_command = ata_exec_command,
	468	.dev_select = ata_std_dev_select,
	469
	470	.freeze = ata_bmdma_freeze,
	471	.thaw = ata_bmdma_thaw,
	472	.error_handler = ali_c2_error_handler,
	473	.post_internal_cmd = ata_bmdma_post_internal_cmd,
	474
	475	.bmdma_setup = ata_bmdma_setup,
	476	.bmdma_start = ata_bmdma_start,
	477	.bmdma_stop = ata_bmdma_stop,
	478	.bmdma_status = ata_bmdma_status,
	479
	480	.qc_prep = ata_qc_prep,
	481	.qc_issue = ata_qc_issue_prot,
bda30288	482
0d5ff566	483	.data_xfer = ata_data_xfer,
669a5db4 JG	484
	485	.irq_handler = ata_interrupt,
	486	.irq_clear = ata_bmdma_irq_clear,
	487
	488	.port_start = ata_port_start,
669a5db4 JG	489	};
669a5db4 JG	490
34d8dfb1 AC	491
	492	/**
	493	* ali_init_chipset - chip setup function
	494	* @pdev: PCI device of ATA controller
	495	*
	496	* Perform the setup on the device that must be done both at boot
	497	* and at resume time.
	498	*/
f20b16ff	499
34d8dfb1 AC	500	static void ali_init_chipset(struct pci_dev *pdev)
	501	{
	502	u8 rev, tmp;
	503	struct pci_dev north, isa_bridge;
	504
	505	pci_read_config_byte(pdev, PCI_REVISION_ID, &rev);
	506
	507	/*
	508	* The chipset revision selects the driver operations and
	509	* mode data.
	510	*/
	511
	512	if (rev >= 0x20 && rev < 0xC2) {
	513	/* 1543-E/F, 1543C-C, 1543C-D, 1543C-E */
	514	pci_read_config_byte(pdev, 0x4B, &tmp);
	515	/* Clear CD-ROM DMA write bit */
	516	tmp &= 0x7F;
	517	pci_write_config_byte(pdev, 0x4B, tmp);
	518	} else if (rev >= 0xC2) {
	519	/* Enable cable detection logic */
	520	pci_read_config_byte(pdev, 0x4B, &tmp);
	521	pci_write_config_byte(pdev, 0x4B, tmp \| 0x08);
	522	}
8e42a5a2	523	north = pci_get_bus_and_slot(0, PCI_DEVFN(0,0));
34d8dfb1 AC	524	isa_bridge = pci_get_device(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M1533, NULL);
	525
	526	if (north && north->vendor == PCI_VENDOR_ID_AL && isa_bridge) {
	527	/* Configure the ALi bridge logic. For non ALi rely on BIOS.
	528	Set the south bridge enable bit */
	529	pci_read_config_byte(isa_bridge, 0x79, &tmp);
	530	if (rev == 0xC2)
	531	pci_write_config_byte(isa_bridge, 0x79, tmp \| 0x04);
8e42a5a2	532	else if (rev > 0xC2 && rev < 0xC5)
34d8dfb1 AC	533	pci_write_config_byte(isa_bridge, 0x79, tmp \| 0x02);
	534	}
	535	if (rev >= 0x20) {
	536	/*
	537	* CD_ROM DMA on (0x53 bit 0). Enable this even if we want
	538	* to use PIO. 0x53 bit 1 (rev 20 only) - enable FIFO control
	539	* via 0x54/55.
	540	*/
	541	pci_read_config_byte(pdev, 0x53, &tmp);
	542	if (rev <= 0x20)
	543	tmp &= ~0x02;
	544	if (rev >= 0xc7)
	545	tmp \|= 0x03;
	546	else
	547	tmp \|= 0x01; /* CD_ROM enable for DMA */
	548	pci_write_config_byte(pdev, 0x53, tmp);
	549	}
	550	pci_dev_put(isa_bridge);
	551	pci_dev_put(north);
	552	ata_pci_clear_simplex(pdev);
	553	}
669a5db4 JG	554	/**
	555	* ali_init_one - discovery callback
	556	* @pdev: PCI device ID
	557	* @id: PCI table info
	558	*
	559	* An ALi IDE interface has been discovered. Figure out what revision
	560	* and perform configuration work before handing it to the ATA layer
	561	*/
	562
	563	static int ali_init_one(struct pci_dev pdev, const struct pci_device_id id)
	564	{
	565	static struct ata_port_info info_early = {
	566	.sht = &ali_sht,
	567	.flags = ATA_FLAG_SLAVE_POSS \| ATA_FLAG_SRST,
	568	.pio_mask = 0x1f,
	569	.port_ops = &ali_early_port_ops
	570	};
	571	/* Revision 0x20 added DMA */
	572	static struct ata_port_info info_20 = {
	573	.sht = &ali_sht,
	574	.flags = ATA_FLAG_SLAVE_POSS \| ATA_FLAG_SRST \| ATA_FLAG_PIO_LBA48,
	575	.pio_mask = 0x1f,
	576	.mwdma_mask = 0x07,
	577	.port_ops = &ali_20_port_ops
	578	};
	579	/* Revision 0x20 with support logic added UDMA */
	580	static struct ata_port_info info_20_udma = {
	581	.sht = &ali_sht,
	582	.flags = ATA_FLAG_SLAVE_POSS \| ATA_FLAG_SRST \| ATA_FLAG_PIO_LBA48,
	583	.pio_mask = 0x1f,
85cd7251	584	.mwdma_mask = 0x07,
669a5db4 JG	585	.udma_mask = 0x07, /* UDMA33 */
	586	.port_ops = &ali_20_port_ops
	587	};
	588	/* Revision 0xC2 adds UDMA66 */
	589	static struct ata_port_info info_c2 = {
	590	.sht = &ali_sht,
	591	.flags = ATA_FLAG_SLAVE_POSS \| ATA_FLAG_SRST \| ATA_FLAG_PIO_LBA48,
	592	.pio_mask = 0x1f,
	593	.mwdma_mask = 0x07,
	594	.udma_mask = 0x1f,
	595	.port_ops = &ali_c2_port_ops
	596	};
	597	/* Revision 0xC3 is UDMA100 */
	598	static struct ata_port_info info_c3 = {
	599	.sht = &ali_sht,
	600	.flags = ATA_FLAG_SLAVE_POSS \| ATA_FLAG_SRST \| ATA_FLAG_PIO_LBA48,
	601	.pio_mask = 0x1f,
	602	.mwdma_mask = 0x07,
	603	.udma_mask = 0x3f,
	604	.port_ops = &ali_c2_port_ops
	605	};
	606	/* Revision 0xC4 is UDMA133 */
	607	static struct ata_port_info info_c4 = {
	608	.sht = &ali_sht,
	609	.flags = ATA_FLAG_SLAVE_POSS \| ATA_FLAG_SRST \| ATA_FLAG_PIO_LBA48,
	610	.pio_mask = 0x1f,
	611	.mwdma_mask = 0x07,
	612	.udma_mask = 0x7f,
	613	.port_ops = &ali_c2_port_ops
	614	};
	615	/* Revision 0xC5 is UDMA133 with LBA48 DMA */
	616	static struct ata_port_info info_c5 = {
	617	.sht = &ali_sht,
	618	.flags = ATA_FLAG_SLAVE_POSS \| ATA_FLAG_SRST,
	619	.pio_mask = 0x1f,
	620	.mwdma_mask = 0x07,
	621	.udma_mask = 0x7f,
	622	.port_ops = &ali_c5_port_ops
	623	};
	624
	625	static struct ata_port_info *port_info[2];
	626	u8 rev, tmp;
34d8dfb1	627	struct pci_dev *isa_bridge;
669a5db4 JG	628
	629	pci_read_config_byte(pdev, PCI_REVISION_ID, &rev);
	630
	631	/*
	632	* The chipset revision selects the driver operations and
	633	* mode data.
	634	*/
	635
	636	if (rev < 0x20) {
	637	port_info[0] = port_info[1] = &info_early;
	638	} else if (rev < 0xC2) {
669a5db4 JG	639	port_info[0] = port_info[1] = &info_20;
	640	} else if (rev == 0xC2) {
	641	port_info[0] = port_info[1] = &info_c2;
	642	} else if (rev == 0xC3) {
	643	port_info[0] = port_info[1] = &info_c3;
	644	} else if (rev == 0xC4) {
	645	port_info[0] = port_info[1] = &info_c4;
	646	} else
	647	port_info[0] = port_info[1] = &info_c5;
	648
34d8dfb1	649	ali_init_chipset(pdev);
f20b16ff	650
669a5db4	651	isa_bridge = pci_get_device(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M1533, NULL);
34d8dfb1 AC	652	if (isa_bridge && rev >= 0x20 && rev < 0xC2) {
	653	/* Are we paired with a UDMA capable chip */
	654	pci_read_config_byte(isa_bridge, 0x5E, &tmp);
	655	if ((tmp & 0x1E) == 0x12)
	656	port_info[0] = port_info[1] = &info_20_udma;
	657	pci_dev_put(isa_bridge);
669a5db4	658	}
669a5db4 JG	659	return ata_pci_init_one(pdev, port_info, 2);
	660	}
	661
34d8dfb1 AC	662	static int ali_reinit_one(struct pci_dev *pdev)
	663	{
	664	ali_init_chipset(pdev);
	665	return ata_pci_device_resume(pdev);
	666	}
	667
2d2744fc JG	668	static const struct pci_device_id ali[] = {
	669	{ PCI_VDEVICE(AL, PCI_DEVICE_ID_AL_M5228), },
	670	{ PCI_VDEVICE(AL, PCI_DEVICE_ID_AL_M5229), },
	671
	672	{ },
669a5db4 JG	673	};
	674
	675	static struct pci_driver ali_pci_driver = {
	676	.name = DRV_NAME,
	677	.id_table = ali,
	678	.probe = ali_init_one,
34d8dfb1 AC	679	.remove = ata_pci_remove_one,
	680	.suspend = ata_pci_device_suspend,
	681	.resume = ali_reinit_one,
669a5db4 JG	682	};
	683
	684	static int __init ali_init(void)
	685	{
	686	return pci_register_driver(&ali_pci_driver);
	687	}
	688
	689
	690	static void __exit ali_exit(void)
	691	{
	692	pci_unregister_driver(&ali_pci_driver);
	693	}
	694
	695
	696	MODULE_AUTHOR("Alan Cox");
	697	MODULE_DESCRIPTION("low-level driver for ALi PATA");
	698	MODULE_LICENSE("GPL");
	699	MODULE_DEVICE_TABLE(pci, ali);
	700	MODULE_VERSION(DRV_VERSION);
	701
	702	module_init(ali_init);
	703	module_exit(ali_exit);