[mirror_ubuntu-bionic-kernel.git] / drivers / ata / pata_cmd640.c

/*
 * pata_cmd640.c 	- CMD640 PCI PATA for new ATA layer
 *			  (C) 2007 Red Hat Inc
 *
 * Based upon
 *  linux/drivers/ide/pci/cmd640.c		Version 1.02  Sep 01, 1996
 *
 *  Copyright (C) 1995-1996  Linus Torvalds & authors (see driver)
 *
 *	This drives only the PCI version of the controller. If you have a
 *	VLB one then we have enough docs to support it but you can write
 *	your own code.
 */

#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/pci.h>
#include <linux/init.h>
#include <linux/blkdev.h>
#include <linux/delay.h>
#include <linux/gfp.h>
#include <scsi/scsi_host.h>
#include <linux/libata.h>

#define DRV_NAME "pata_cmd640"
#define DRV_VERSION "0.0.5"

struct cmd640_reg {
	int last;
	u8 reg58[ATA_MAX_DEVICES];
};

enum {
	CFR = 0x50,
	CNTRL = 0x51,
	CMDTIM = 0x52,
	ARTIM0 = 0x53,
	DRWTIM0 = 0x54,
	ARTIM23 = 0x57,
	DRWTIM23 = 0x58,
	BRST = 0x59
};

/**
 *	cmd640_set_piomode	-	set initial PIO mode data
 *	@ap: ATA port
 *	@adev: ATA device
 *
 *	Called to do the PIO mode setup.
 */

static void cmd640_set_piomode(struct ata_port *ap, struct ata_device *adev)
{
	struct cmd640_reg *timing = ap->private_data;
	struct pci_dev *pdev = to_pci_dev(ap->host->dev);
	struct ata_timing t;
	const unsigned long T = 1000000 / 33;
	const u8 setup_data[] = { 0x40, 0x40, 0x40, 0x80, 0x00 };
	u8 reg;
	int arttim = ARTIM0 + 2 * adev->devno;
	struct ata_device *pair = ata_dev_pair(adev);

	if (ata_timing_compute(adev, adev->pio_mode, &t, T, 0) < 0) {
		printk(KERN_ERR DRV_NAME ": mode computation failed.\n");
		return;
	}

	/* The second channel has shared timings and the setup timing is
	   messy to switch to merge it for worst case */
	if (ap->port_no && pair) {
		struct ata_timing p;
		ata_timing_compute(pair, pair->pio_mode, &p, T, 1);
		ata_timing_merge(&p, &t, &t, ATA_TIMING_SETUP);
	}

	/* Make the timings fit */
	if (t.recover > 16) {
		t.active += t.recover - 16;
		t.recover = 16;
	}
	if (t.active > 16)
		t.active = 16;

	/* Now convert the clocks into values we can actually stuff into
	   the chip */

	if (t.recover > 1)
		t.recover--;	/* 640B only */
	else
		t.recover = 15;

	if (t.setup > 4)
		t.setup = 0xC0;
	else
		t.setup = setup_data[t.setup];

	if (ap->port_no == 0) {
		t.active &= 0x0F;	/* 0 = 16 */

		/* Load setup timing */
		pci_read_config_byte(pdev, arttim, &reg);
		reg &= 0x3F;
		reg |= t.setup;
		pci_write_config_byte(pdev, arttim, reg);

		/* Load active/recovery */
		pci_write_config_byte(pdev, arttim + 1, (t.active << 4) | t.recover);
	} else {
		/* Save the shared timings for channel, they will be loaded
		   by qc_issue. Reloading the setup time is expensive so we
		   keep a merged one loaded */
		pci_read_config_byte(pdev, ARTIM23, &reg);
		reg &= 0x3F;
		reg |= t.setup;
		pci_write_config_byte(pdev, ARTIM23, reg);
		timing->reg58[adev->devno] = (t.active << 4) | t.recover;
	}
}


/**
 *	cmd640_qc_issue	-	command preparation hook
 *	@qc: Command to be issued
 *
 *	Channel 1 has shared timings. We must reprogram the
 *	clock each drive 2/3 switch we do.
 */

static unsigned int cmd640_qc_issue(struct ata_queued_cmd *qc)
{
	struct ata_port *ap = qc->ap;
	struct ata_device *adev = qc->dev;
	struct pci_dev *pdev = to_pci_dev(ap->host->dev);
	struct cmd640_reg *timing = ap->private_data;

	if (ap->port_no != 0 && adev->devno != timing->last) {
		pci_write_config_byte(pdev, DRWTIM23, timing->reg58[adev->devno]);
		timing->last = adev->devno;
	}
	return ata_sff_qc_issue(qc);
}

/**
 *	cmd640_port_start	-	port setup
 *	@ap: ATA port being set up
 *
 *	The CMD640 needs to maintain private data structures so we
 *	allocate space here.
 */

static int cmd640_port_start(struct ata_port *ap)
{
	struct pci_dev *pdev = to_pci_dev(ap->host->dev);
	struct cmd640_reg *timing;

	timing = devm_kzalloc(&pdev->dev, sizeof(struct cmd640_reg), GFP_KERNEL);
	if (timing == NULL)
		return -ENOMEM;
	timing->last = -1;	/* Force a load */
	ap->private_data = timing;
	return 0;
}

static bool cmd640_sff_irq_check(struct ata_port *ap)
{
	struct pci_dev *pdev	= to_pci_dev(ap->host->dev);
	int irq_reg		= ap->port_no ? ARTIM23 : CFR;
	u8  irq_stat, irq_mask	= ap->port_no ? 0x10 : 0x04;

	pci_read_config_byte(pdev, irq_reg, &irq_stat);

	return irq_stat & irq_mask;
}

static struct scsi_host_template cmd640_sht = {
	ATA_PIO_SHT(DRV_NAME),
};

static struct ata_port_operations cmd640_port_ops = {
	.inherits	= &ata_sff_port_ops,
	/* In theory xfer_noirq is not needed once we kill the prefetcher */
	.sff_data_xfer	= ata_sff_data_xfer_noirq,
	.sff_irq_check	= cmd640_sff_irq_check,
	.qc_issue	= cmd640_qc_issue,
	.cable_detect	= ata_cable_40wire,
	.set_piomode	= cmd640_set_piomode,
	.port_start	= cmd640_port_start,
};

static void cmd640_hardware_init(struct pci_dev *pdev)
{
	u8 ctrl;

	/* CMD640 detected, commiserations */
	pci_write_config_byte(pdev, 0x5B, 0x00);
	/* PIO0 command cycles */
	pci_write_config_byte(pdev, CMDTIM, 0);
	/* 512 byte bursts (sector) */
	pci_write_config_byte(pdev, BRST, 0x40);
	/*
	 * A reporter a long time ago
	 * Had problems with the data fifo
	 * So don't run the risk
	 * Of putting crap on the disk
	 * For its better just to go slow
	 */
	/* Do channel 0 */
	pci_read_config_byte(pdev, CNTRL, &ctrl);
	pci_write_config_byte(pdev, CNTRL, ctrl | 0xC0);
	/* Ditto for channel 1 */
	pci_read_config_byte(pdev, ARTIM23, &ctrl);
	ctrl |= 0x0C;
	pci_write_config_byte(pdev, ARTIM23, ctrl);
}

static int cmd640_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
{
	static const struct ata_port_info info = {
		.flags = ATA_FLAG_SLAVE_POSS,
		.pio_mask = ATA_PIO4,
		.port_ops = &cmd640_port_ops
	};
	const struct ata_port_info *ppi[] = { &info, NULL };
	int rc;

	rc = pcim_enable_device(pdev);
	if (rc)
		return rc;

	cmd640_hardware_init(pdev);

	return ata_pci_sff_init_one(pdev, ppi, &cmd640_sht, NULL, 0);
}

#ifdef CONFIG_PM
static int cmd640_reinit_one(struct pci_dev *pdev)
{
	struct ata_host *host = dev_get_drvdata(&pdev->dev);
	int rc;

	rc = ata_pci_device_do_resume(pdev);
	if (rc)
		return rc;
	cmd640_hardware_init(pdev);
	ata_host_resume(host);
	return 0;
}
#endif

static const struct pci_device_id cmd640[] = {
	{ PCI_VDEVICE(CMD, 0x640), 0 },
	{ },
};

static struct pci_driver cmd640_pci_driver = {
	.name 		= DRV_NAME,
	.id_table	= cmd640,
	.probe 		= cmd640_init_one,
	.remove		= ata_pci_remove_one,
#ifdef CONFIG_PM
	.suspend	= ata_pci_device_suspend,
	.resume		= cmd640_reinit_one,
#endif
};

module_pci_driver(cmd640_pci_driver);

MODULE_AUTHOR("Alan Cox");
MODULE_DESCRIPTION("low-level driver for CMD640 PATA controllers");
MODULE_LICENSE("GPL");
MODULE_DEVICE_TABLE(pci, cmd640);
MODULE_VERSION(DRV_VERSION);
Commit	Line	Data
b2248dac AC	1	/*
	2	* pata_cmd640.c - CMD640 PCI PATA for new ATA layer
	3	* (C) 2007 Red Hat Inc
b2248dac AC	4	*
	5	* Based upon
	6	* linux/drivers/ide/pci/cmd640.c Version 1.02 Sep 01, 1996
	7	*
	8	* Copyright (C) 1995-1996 Linus Torvalds & authors (see driver)
	9	*
	10	* This drives only the PCI version of the controller. If you have a
	11	* VLB one then we have enough docs to support it but you can write
	12	* your own code.
	13	*/
	14
	15	#include <linux/kernel.h>
	16	#include <linux/module.h>
	17	#include <linux/pci.h>
	18	#include <linux/init.h>
	19	#include <linux/blkdev.h>
	20	#include <linux/delay.h>
5a0e3ad6	21	#include <linux/gfp.h>
b2248dac AC	22	#include <scsi/scsi_host.h>
	23	#include <linux/libata.h>
	24
	25	#define DRV_NAME "pata_cmd640"
7938a72d	26	#define DRV_VERSION "0.0.5"
b2248dac AC	27
	28	struct cmd640_reg {
	29	int last;
	30	u8 reg58[ATA_MAX_DEVICES];
	31	};
	32
	33	enum {
	34	CFR = 0x50,
	35	CNTRL = 0x51,
	36	CMDTIM = 0x52,
	37	ARTIM0 = 0x53,
	38	DRWTIM0 = 0x54,
	39	ARTIM23 = 0x57,
	40	DRWTIM23 = 0x58,
	41	BRST = 0x59
	42	};
	43
	44	/**
	45	* cmd640_set_piomode - set initial PIO mode data
7938a72d	46	* @ap: ATA port
b2248dac AC	47	* @adev: ATA device
	48	*
	49	* Called to do the PIO mode setup.
	50	*/
	51
	52	static void cmd640_set_piomode(struct ata_port ap, struct ata_device adev)
	53	{
	54	struct cmd640_reg *timing = ap->private_data;
	55	struct pci_dev *pdev = to_pci_dev(ap->host->dev);
	56	struct ata_timing t;
	57	const unsigned long T = 1000000 / 33;
	58	const u8 setup_data[] = { 0x40, 0x40, 0x40, 0x80, 0x00 };
	59	u8 reg;
	60	int arttim = ARTIM0 + 2 * adev->devno;
	61	struct ata_device *pair = ata_dev_pair(adev);
	62
	63	if (ata_timing_compute(adev, adev->pio_mode, &t, T, 0) < 0) {
	64	printk(KERN_ERR DRV_NAME ": mode computation failed.\n");
	65	return;
	66	}
	67
	68	/* The second channel has shared timings and the setup timing is
	69	messy to switch to merge it for worst case */
	70	if (ap->port_no && pair) {
	71	struct ata_timing p;
	72	ata_timing_compute(pair, pair->pio_mode, &p, T, 1);
	73	ata_timing_merge(&p, &t, &t, ATA_TIMING_SETUP);
	74	}
	75
	76	/* Make the timings fit */
	77	if (t.recover > 16) {
	78	t.active += t.recover - 16;
	79	t.recover = 16;
	80	}
	81	if (t.active > 16)
	82	t.active = 16;
	83
	84	/* Now convert the clocks into values we can actually stuff into
	85	the chip */
	86
	87	if (t.recover > 1)
	88	t.recover--; /* 640B only */
	89	else
	90	t.recover = 15;
	91
	92	if (t.setup > 4)
	93	t.setup = 0xC0;
	94	else
	95	t.setup = setup_data[t.setup];
	96
	97	if (ap->port_no == 0) {
	98	t.active &= 0x0F; /* 0 = 16 */
	99
	100	/* Load setup timing */
	101	pci_read_config_byte(pdev, arttim, &reg);
	102	reg &= 0x3F;
	103	reg \|= t.setup;
	104	pci_write_config_byte(pdev, arttim, reg);
	105
	106	/* Load active/recovery */
	107	pci_write_config_byte(pdev, arttim + 1, (t.active << 4) \| t.recover);
	108	} else {
	109	/* Save the shared timings for channel, they will be loaded
9363c382 TH	110	by qc_issue. Reloading the setup time is expensive so we
9363c382 TH	111	keep a merged one loaded */
b2248dac AC	112	pci_read_config_byte(pdev, ARTIM23, &reg);
	113	reg &= 0x3F;
	114	reg \|= t.setup;
	115	pci_write_config_byte(pdev, ARTIM23, reg);
	116	timing->reg58[adev->devno] = (t.active << 4) \| t.recover;
	117	}
	118	}
	119
	120
	121	/**
9363c382	122	* cmd640_qc_issue - command preparation hook
b2248dac AC	123	* @qc: Command to be issued
	124	*
	125	* Channel 1 has shared timings. We must reprogram the
	126	* clock each drive 2/3 switch we do.
	127	*/
	128
9363c382	129	static unsigned int cmd640_qc_issue(struct ata_queued_cmd *qc)
b2248dac AC	130	{
	131	struct ata_port *ap = qc->ap;
	132	struct ata_device *adev = qc->dev;
	133	struct pci_dev *pdev = to_pci_dev(ap->host->dev);
	134	struct cmd640_reg *timing = ap->private_data;
	135
	136	if (ap->port_no != 0 && adev->devno != timing->last) {
	137	pci_write_config_byte(pdev, DRWTIM23, timing->reg58[adev->devno]);
	138	timing->last = adev->devno;
	139	}
9363c382	140	return ata_sff_qc_issue(qc);
b2248dac AC	141	}
	142
	143	/**
	144	* cmd640_port_start - port setup
	145	* @ap: ATA port being set up
	146	*
	147	* The CMD640 needs to maintain private data structures so we
	148	* allocate space here.
	149	*/
	150
	151	static int cmd640_port_start(struct ata_port *ap)
	152	{
	153	struct pci_dev *pdev = to_pci_dev(ap->host->dev);
	154	struct cmd640_reg *timing;
	155
b2248dac AC	156	timing = devm_kzalloc(&pdev->dev, sizeof(struct cmd640_reg), GFP_KERNEL);
	157	if (timing == NULL)
	158	return -ENOMEM;
	159	timing->last = -1; /* Force a load */
	160	ap->private_data = timing;
c7087652	161	return 0;
b2248dac AC	162	}
b2248dac AC	163
c1ce90f2 SS	164	static bool cmd640_sff_irq_check(struct ata_port *ap)
	165	{
	166	struct pci_dev *pdev = to_pci_dev(ap->host->dev);
	167	int irq_reg = ap->port_no ? ARTIM23 : CFR;
	168	u8 irq_stat, irq_mask = ap->port_no ? 0x10 : 0x04;
	169
	170	pci_read_config_byte(pdev, irq_reg, &irq_stat);
	171
	172	return irq_stat & irq_mask;
	173	}
	174
b2248dac	175	static struct scsi_host_template cmd640_sht = {
8930ff25	176	ATA_PIO_SHT(DRV_NAME),
b2248dac AC	177	};
	178
	179	static struct ata_port_operations cmd640_port_ops = {
8930ff25	180	.inherits = &ata_sff_port_ops,
029cfd6b	181	/* In theory xfer_noirq is not needed once we kill the prefetcher */
5682ed33	182	.sff_data_xfer = ata_sff_data_xfer_noirq,
c1ce90f2	183	.sff_irq_check = cmd640_sff_irq_check,
9363c382	184	.qc_issue = cmd640_qc_issue,
029cfd6b TH	185	.cable_detect = ata_cable_40wire,
029cfd6b TH	186	.set_piomode = cmd640_set_piomode,
b2248dac AC	187	.port_start = cmd640_port_start,
	188	};
	189
7938a72d	190	static void cmd640_hardware_init(struct pci_dev *pdev)
b2248dac	191	{
b2248dac AC	192	u8 ctrl;
b2248dac AC	193
b2248dac	194	/* CMD640 detected, commiserations */
7938a72d	195	pci_write_config_byte(pdev, 0x5B, 0x00);
b2248dac AC	196	/* PIO0 command cycles */
	197	pci_write_config_byte(pdev, CMDTIM, 0);
	198	/* 512 byte bursts (sector) */
	199	pci_write_config_byte(pdev, BRST, 0x40);
a617c09f	200	/*
b2248dac AC	201	* A reporter a long time ago
	202	* Had problems with the data fifo
	203	* So don't run the risk
	204	* Of putting crap on the disk
	205	* For its better just to go slow
	206	*/
	207	/* Do channel 0 */
	208	pci_read_config_byte(pdev, CNTRL, &ctrl);
	209	pci_write_config_byte(pdev, CNTRL, ctrl \| 0xC0);
	210	/* Ditto for channel 1 */
	211	pci_read_config_byte(pdev, ARTIM23, &ctrl);
	212	ctrl \|= 0x0C;
	213	pci_write_config_byte(pdev, ARTIM23, ctrl);
7938a72d AC	214	}
	215
	216	static int cmd640_init_one(struct pci_dev pdev, const struct pci_device_id id)
	217	{
1626aeb8	218	static const struct ata_port_info info = {
1d2808fd	219	.flags = ATA_FLAG_SLAVE_POSS,
14bdef98	220	.pio_mask = ATA_PIO4,
7938a72d AC	221	.port_ops = &cmd640_port_ops
7938a72d AC	222	};
1626aeb8	223	const struct ata_port_info *ppi[] = { &info, NULL };
f08048e9 TH	224	int rc;
	225
	226	rc = pcim_enable_device(pdev);
	227	if (rc)
	228	return rc;
b2248dac	229
7938a72d	230	cmd640_hardware_init(pdev);
f08048e9	231
16ea0fc9	232	return ata_pci_sff_init_one(pdev, ppi, &cmd640_sht, NULL, 0);
b2248dac AC	233	}
b2248dac AC	234
f08048e9	235	#ifdef CONFIG_PM
b2248dac AC	236	static int cmd640_reinit_one(struct pci_dev *pdev)
b2248dac AC	237	{
f08048e9 TH	238	struct ata_host *host = dev_get_drvdata(&pdev->dev);
	239	int rc;
	240
	241	rc = ata_pci_device_do_resume(pdev);
	242	if (rc)
	243	return rc;
7938a72d	244	cmd640_hardware_init(pdev);
f08048e9	245	ata_host_resume(host);
4b22afd7	246	return 0;
b2248dac	247	}
f08048e9	248	#endif
b2248dac AC	249
	250	static const struct pci_device_id cmd640[] = {
	251	{ PCI_VDEVICE(CMD, 0x640), 0 },
	252	{ },
	253	};
	254
	255	static struct pci_driver cmd640_pci_driver = {
	256	.name = DRV_NAME,
	257	.id_table = cmd640,
	258	.probe = cmd640_init_one,
	259	.remove = ata_pci_remove_one,
4b22afd7	260	#ifdef CONFIG_PM
b2248dac AC	261	.suspend = ata_pci_device_suspend,
b2248dac AC	262	.resume = cmd640_reinit_one,
f08048e9	263	#endif
b2248dac AC	264	};
b2248dac AC	265
2fc75da0	266	module_pci_driver(cmd640_pci_driver);
b2248dac AC	267
	268	MODULE_AUTHOR("Alan Cox");
	269	MODULE_DESCRIPTION("low-level driver for CMD640 PATA controllers");
	270	MODULE_LICENSE("GPL");
	271	MODULE_DEVICE_TABLE(pci, cmd640);
	272	MODULE_VERSION(DRV_VERSION);