]> git.proxmox.com Git - mirror_ubuntu-bionic-kernel.git/blame - drivers/ata/pata_cs5535.c
libata: rename SFF functions
[mirror_ubuntu-bionic-kernel.git] / drivers / ata / pata_cs5535.c
CommitLineData
669a5db4
JG
1/*
2 * pata-cs5535.c - CS5535 PATA for new ATA layer
3 * (C) 2005-2006 Red Hat Inc
4 * Alan Cox <alan@redhat.com>
5 *
6 * based upon cs5535.c from AMD <Jens.Altmann@amd.com> as cleaned up and
7 * made readable and Linux style by Wolfgang Zuleger <wolfgang.zuleger@gmx.de
8 * and Alexander Kiausch <alex.kiausch@t-online.de>
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
22 *
23 * Loosely based on the piix & svwks drivers.
24 *
25 * Documentation:
26 * Available from AMD web site.
27 * TODO
3a4fa0a2 28 * Review errata to see if serializing is necessary
669a5db4
JG
29 */
30
31#include <linux/kernel.h>
32#include <linux/module.h>
33#include <linux/pci.h>
34#include <linux/init.h>
35#include <linux/blkdev.h>
36#include <linux/delay.h>
37#include <scsi/scsi_host.h>
38#include <linux/libata.h>
39#include <asm/msr.h>
40
41#define DRV_NAME "cs5535"
8bc3fc47 42#define DRV_VERSION "0.2.12"
669a5db4
JG
43
44/*
45 * The Geode (Aka Athlon GX now) uses an internal MSR based
46 * bus system for control. Demented but there you go.
47 */
48
49#define MSR_ATAC_BASE 0x51300000
50#define ATAC_GLD_MSR_CAP (MSR_ATAC_BASE+0)
51#define ATAC_GLD_MSR_CONFIG (MSR_ATAC_BASE+0x01)
52#define ATAC_GLD_MSR_SMI (MSR_ATAC_BASE+0x02)
53#define ATAC_GLD_MSR_ERROR (MSR_ATAC_BASE+0x03)
54#define ATAC_GLD_MSR_PM (MSR_ATAC_BASE+0x04)
55#define ATAC_GLD_MSR_DIAG (MSR_ATAC_BASE+0x05)
56#define ATAC_IO_BAR (MSR_ATAC_BASE+0x08)
57#define ATAC_RESET (MSR_ATAC_BASE+0x10)
58#define ATAC_CH0D0_PIO (MSR_ATAC_BASE+0x20)
59#define ATAC_CH0D0_DMA (MSR_ATAC_BASE+0x21)
60#define ATAC_CH0D1_PIO (MSR_ATAC_BASE+0x22)
61#define ATAC_CH0D1_DMA (MSR_ATAC_BASE+0x23)
62#define ATAC_PCI_ABRTERR (MSR_ATAC_BASE+0x24)
63
64#define ATAC_BM0_CMD_PRIM 0x00
65#define ATAC_BM0_STS_PRIM 0x02
66#define ATAC_BM0_PRD 0x04
67
68#define CS5535_CABLE_DETECT 0x48
69
70#define CS5535_BAD_PIO(timings) ( (timings&~0x80000000UL)==0x00009172 )
71
72/**
eb4a2c7f 73 * cs5535_cable_detect - detect cable type
669a5db4 74 * @ap: Port to detect on
d4b2bab4 75 * @deadline: deadline jiffies for the operation
669a5db4
JG
76 *
77 * Perform cable detection for ATA66 capable cable. Return a libata
78 * cable type.
79 */
80
eb4a2c7f 81static int cs5535_cable_detect(struct ata_port *ap)
669a5db4
JG
82{
83 u8 cable;
84 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
85
86 pci_read_config_byte(pdev, CS5535_CABLE_DETECT, &cable);
87 if (cable & 1)
eb4a2c7f 88 return ATA_CBL_PATA80;
669a5db4 89 else
eb4a2c7f 90 return ATA_CBL_PATA40;
669a5db4
JG
91}
92
93/**
94 * cs5535_set_piomode - PIO setup
95 * @ap: ATA interface
96 * @adev: device on the interface
97 *
98 * Set our PIO requirements. The CS5535 is pretty clean about all this
99 */
100
101static void cs5535_set_piomode(struct ata_port *ap, struct ata_device *adev)
102{
103 static const u16 pio_timings[5] = {
104 0xF7F4, 0x53F3, 0x13F1, 0x5131, 0x1131
105 };
106 static const u16 pio_cmd_timings[5] = {
107 0xF7F4, 0x53F3, 0x13F1, 0x5131, 0x1131
108 };
109 u32 reg, dummy;
110 struct ata_device *pair = ata_dev_pair(adev);
111
112 int mode = adev->pio_mode - XFER_PIO_0;
113 int cmdmode = mode;
114
115 /* Command timing has to be for the lowest of the pair of devices */
116 if (pair) {
117 int pairmode = pair->pio_mode - XFER_PIO_0;
118 cmdmode = min(mode, pairmode);
119 /* Write the other drive timing register if it changed */
120 if (cmdmode < pairmode)
121 wrmsr(ATAC_CH0D0_PIO + 2 * pair->devno,
122 pio_cmd_timings[cmdmode] << 16 | pio_timings[pairmode], 0);
123 }
124 /* Write the drive timing register */
125 wrmsr(ATAC_CH0D0_PIO + 2 * adev->devno,
126 pio_cmd_timings[cmdmode] << 16 | pio_timings[mode], 0);
127
128 /* Set the PIO "format 1" bit in the DMA timing register */
129 rdmsr(ATAC_CH0D0_DMA + 2 * adev->devno, reg, dummy);
130 wrmsr(ATAC_CH0D0_DMA + 2 * adev->devno, reg | 0x80000000UL, 0);
131}
132
133/**
134 * cs5535_set_dmamode - DMA timing setup
135 * @ap: ATA interface
136 * @adev: Device being configured
137 *
138 */
139
140static void cs5535_set_dmamode(struct ata_port *ap, struct ata_device *adev)
141{
142 static const u32 udma_timings[5] = {
143 0x7F7436A1, 0x7F733481, 0x7F723261, 0x7F713161, 0x7F703061
144 };
145 static const u32 mwdma_timings[3] = {
146 0x7F0FFFF3, 0x7F035352, 0x7F024241
147 };
148 u32 reg, dummy;
149 int mode = adev->dma_mode;
150
151 rdmsr(ATAC_CH0D0_DMA + 2 * adev->devno, reg, dummy);
152 reg &= 0x80000000UL;
153 if (mode >= XFER_UDMA_0)
154 reg |= udma_timings[mode - XFER_UDMA_0];
155 else
156 reg |= mwdma_timings[mode - XFER_MW_DMA_0];
157 wrmsr(ATAC_CH0D0_DMA + 2 * adev->devno, reg, 0);
158}
159
160static struct scsi_host_template cs5535_sht = {
68d1d07b 161 ATA_BMDMA_SHT(DRV_NAME),
669a5db4
JG
162};
163
164static struct ata_port_operations cs5535_port_ops = {
029cfd6b
TH
165 .inherits = &ata_bmdma_port_ops,
166 .cable_detect = cs5535_cable_detect,
669a5db4
JG
167 .set_piomode = cs5535_set_piomode,
168 .set_dmamode = cs5535_set_dmamode,
669a5db4
JG
169};
170
171/**
172 * cs5535_init_one - Initialise a CS5530
173 * @dev: PCI device
174 * @id: Entry in match table
175 *
176 * Install a driver for the newly found CS5530 companion chip. Most of
177 * this is just housekeeping. We have to set the chip up correctly and
178 * turn off various bits of emulation magic.
179 */
180
181static int cs5535_init_one(struct pci_dev *dev, const struct pci_device_id *id)
182{
1626aeb8 183 static const struct ata_port_info info = {
1d2808fd 184 .flags = ATA_FLAG_SLAVE_POSS,
669a5db4
JG
185 .pio_mask = 0x1f,
186 .mwdma_mask = 0x07,
bf6263a8 187 .udma_mask = ATA_UDMA4,
669a5db4
JG
188 .port_ops = &cs5535_port_ops
189 };
1626aeb8 190 const struct ata_port_info *ppi[] = { &info, &ata_dummy_port_info };
669a5db4
JG
191
192 u32 timings, dummy;
193
194 /* Check the BIOS set the initial timing clock. If not set the
195 timings for PIO0 */
196 rdmsr(ATAC_CH0D0_PIO, timings, dummy);
197 if (CS5535_BAD_PIO(timings))
198 wrmsr(ATAC_CH0D0_PIO, 0xF7F4F7F4UL, 0);
199 rdmsr(ATAC_CH0D1_PIO, timings, dummy);
200 if (CS5535_BAD_PIO(timings))
201 wrmsr(ATAC_CH0D1_PIO, 0xF7F4F7F4UL, 0);
9363c382 202 return ata_pci_sff_init_one(dev, ppi, &cs5535_sht, NULL);
669a5db4
JG
203}
204
2d2744fc
JG
205static const struct pci_device_id cs5535[] = {
206 { PCI_VDEVICE(NS, 0x002D), },
207
208 { },
669a5db4
JG
209};
210
211static struct pci_driver cs5535_pci_driver = {
212 .name = DRV_NAME,
213 .id_table = cs5535,
214 .probe = cs5535_init_one,
3ac551a6 215 .remove = ata_pci_remove_one,
438ac6d5 216#ifdef CONFIG_PM
30ced0f0
AC
217 .suspend = ata_pci_device_suspend,
218 .resume = ata_pci_device_resume,
438ac6d5 219#endif
669a5db4
JG
220};
221
222static int __init cs5535_init(void)
223{
224 return pci_register_driver(&cs5535_pci_driver);
225}
226
669a5db4
JG
227static void __exit cs5535_exit(void)
228{
229 pci_unregister_driver(&cs5535_pci_driver);
230}
231
669a5db4
JG
232MODULE_AUTHOR("Alan Cox, Jens Altmann, Wolfgan Zuleger, Alexander Kiausch");
233MODULE_DESCRIPTION("low-level driver for the NS/AMD 5530");
234MODULE_LICENSE("GPL");
235MODULE_DEVICE_TABLE(pci, cs5535);
236MODULE_VERSION(DRV_VERSION);
237
238module_init(cs5535_init);
239module_exit(cs5535_exit);