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3957df61 MP |
1 | /* |
2 | * pata_cs5536.c - CS5536 PATA for new ATA layer | |
3 | * (C) 2007 Martin K. Petersen <mkp@mkp.net> | |
4 | * | |
5 | * This program is free software; you can redistribute it and/or modify | |
6 | * it under the terms of the GNU General Public License version 2 as | |
7 | * published by the Free Software Foundation. | |
8 | * | |
9 | * This program is distributed in the hope that it will be useful, | |
10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
12 | * GNU General Public License for more details. | |
13 | * | |
14 | * You should have received a copy of the GNU General Public License | |
15 | * along with this program; if not, write to the Free Software | |
16 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
17 | * | |
18 | * Documentation: | |
19 | * Available from AMD web site. | |
20 | * | |
21 | * The IDE timing registers for the CS5536 live in the Geode Machine | |
22 | * Specific Register file and not PCI config space. Most BIOSes | |
23 | * virtualize the PCI registers so the chip looks like a standard IDE | |
24 | * controller. Unfortunately not all implementations get this right. | |
25 | * In particular some have problems with unaligned accesses to the | |
26 | * virtualized PCI registers. This driver always does full dword | |
27 | * writes to work around the issue. Also, in case of a bad BIOS this | |
28 | * driver can be loaded with the "msr=1" parameter which forces using | |
29 | * the Machine Specific Registers to configure the device. | |
30 | */ | |
31 | ||
32 | #include <linux/kernel.h> | |
33 | #include <linux/module.h> | |
34 | #include <linux/pci.h> | |
35 | #include <linux/init.h> | |
36 | #include <linux/blkdev.h> | |
37 | #include <linux/delay.h> | |
38 | #include <linux/libata.h> | |
39 | #include <scsi/scsi_host.h> | |
9272dcc2 WZ |
40 | |
41 | #ifdef CONFIG_X86_32 | |
3957df61 | 42 | #include <asm/msr.h> |
9272dcc2 WZ |
43 | static int use_msr; |
44 | module_param_named(msr, use_msr, int, 0644); | |
45 | MODULE_PARM_DESC(msr, "Force using MSR to configure IDE function (Default: 0)"); | |
46 | #else | |
ff5dd32b JG |
47 | #undef rdmsr /* avoid accidental MSR usage on, e.g. x86-64 */ |
48 | #undef wrmsr | |
9272dcc2 WZ |
49 | #define rdmsr(x, y, z) do { } while (0) |
50 | #define wrmsr(x, y, z) do { } while (0) | |
51 | #define use_msr 0 | |
52 | #endif | |
3957df61 MP |
53 | |
54 | #define DRV_NAME "pata_cs5536" | |
9272dcc2 | 55 | #define DRV_VERSION "0.0.8" |
3957df61 MP |
56 | |
57 | enum { | |
58 | CFG = 0, | |
59 | DTC = 1, | |
60 | CAST = 2, | |
61 | ETC = 3, | |
62 | ||
63 | MSR_IDE_BASE = 0x51300000, | |
64 | MSR_IDE_CFG = (MSR_IDE_BASE + 0x10), | |
65 | MSR_IDE_DTC = (MSR_IDE_BASE + 0x12), | |
66 | MSR_IDE_CAST = (MSR_IDE_BASE + 0x13), | |
67 | MSR_IDE_ETC = (MSR_IDE_BASE + 0x14), | |
68 | ||
69 | PCI_IDE_CFG = 0x40, | |
70 | PCI_IDE_DTC = 0x48, | |
71 | PCI_IDE_CAST = 0x4c, | |
72 | PCI_IDE_ETC = 0x50, | |
73 | ||
74 | IDE_CFG_CHANEN = 0x2, | |
75 | IDE_CFG_CABLE = 0x10000, | |
76 | ||
77 | IDE_D0_SHIFT = 24, | |
78 | IDE_D1_SHIFT = 16, | |
79 | IDE_DRV_MASK = 0xff, | |
80 | ||
81 | IDE_CAST_D0_SHIFT = 6, | |
82 | IDE_CAST_D1_SHIFT = 4, | |
83 | IDE_CAST_DRV_MASK = 0x3, | |
84 | IDE_CAST_CMD_MASK = 0xff, | |
85 | IDE_CAST_CMD_SHIFT = 24, | |
86 | ||
87 | IDE_ETC_NODMA = 0x03, | |
88 | }; | |
89 | ||
3957df61 MP |
90 | static const u32 msr_reg[4] = { |
91 | MSR_IDE_CFG, MSR_IDE_DTC, MSR_IDE_CAST, MSR_IDE_ETC, | |
92 | }; | |
93 | ||
94 | static const u8 pci_reg[4] = { | |
95 | PCI_IDE_CFG, PCI_IDE_DTC, PCI_IDE_CAST, PCI_IDE_ETC, | |
96 | }; | |
97 | ||
2072fb55 | 98 | static inline int cs5536_read(struct pci_dev *pdev, int reg, u32 *val) |
3957df61 MP |
99 | { |
100 | if (unlikely(use_msr)) { | |
9272dcc2 | 101 | u32 dummy __maybe_unused; |
3957df61 MP |
102 | |
103 | rdmsr(msr_reg[reg], *val, dummy); | |
104 | return 0; | |
105 | } | |
106 | ||
107 | return pci_read_config_dword(pdev, pci_reg[reg], val); | |
108 | } | |
109 | ||
110 | static inline int cs5536_write(struct pci_dev *pdev, int reg, int val) | |
111 | { | |
112 | if (unlikely(use_msr)) { | |
113 | wrmsr(msr_reg[reg], val, 0); | |
114 | return 0; | |
115 | } | |
116 | ||
117 | return pci_write_config_dword(pdev, pci_reg[reg], val); | |
118 | } | |
119 | ||
120 | /** | |
121 | * cs5536_cable_detect - detect cable type | |
122 | * @ap: Port to detect on | |
3957df61 MP |
123 | * |
124 | * Perform cable detection for ATA66 capable cable. Return a libata | |
125 | * cable type. | |
126 | */ | |
127 | ||
128 | static int cs5536_cable_detect(struct ata_port *ap) | |
129 | { | |
130 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); | |
131 | u32 cfg; | |
132 | ||
133 | cs5536_read(pdev, CFG, &cfg); | |
134 | ||
135 | if (cfg & (IDE_CFG_CABLE << ap->port_no)) | |
136 | return ATA_CBL_PATA80; | |
137 | else | |
138 | return ATA_CBL_PATA40; | |
139 | } | |
140 | ||
141 | /** | |
142 | * cs5536_set_piomode - PIO setup | |
143 | * @ap: ATA interface | |
144 | * @adev: device on the interface | |
145 | */ | |
146 | ||
147 | static void cs5536_set_piomode(struct ata_port *ap, struct ata_device *adev) | |
148 | { | |
149 | static const u8 drv_timings[5] = { | |
150 | 0x98, 0x55, 0x32, 0x21, 0x20, | |
151 | }; | |
152 | ||
153 | static const u8 addr_timings[5] = { | |
154 | 0x2, 0x1, 0x0, 0x0, 0x0, | |
155 | }; | |
156 | ||
157 | static const u8 cmd_timings[5] = { | |
158 | 0x99, 0x92, 0x90, 0x22, 0x20, | |
159 | }; | |
160 | ||
161 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); | |
162 | struct ata_device *pair = ata_dev_pair(adev); | |
163 | int mode = adev->pio_mode - XFER_PIO_0; | |
164 | int cmdmode = mode; | |
b6966a61 MP |
165 | int dshift = adev->devno ? IDE_D1_SHIFT : IDE_D0_SHIFT; |
166 | int cshift = adev->devno ? IDE_CAST_D1_SHIFT : IDE_CAST_D0_SHIFT; | |
3957df61 MP |
167 | u32 dtc, cast, etc; |
168 | ||
169 | if (pair) | |
170 | cmdmode = min(mode, pair->pio_mode - XFER_PIO_0); | |
171 | ||
172 | cs5536_read(pdev, DTC, &dtc); | |
173 | cs5536_read(pdev, CAST, &cast); | |
174 | cs5536_read(pdev, ETC, &etc); | |
175 | ||
176 | dtc &= ~(IDE_DRV_MASK << dshift); | |
177 | dtc |= drv_timings[mode] << dshift; | |
178 | ||
179 | cast &= ~(IDE_CAST_DRV_MASK << cshift); | |
180 | cast |= addr_timings[mode] << cshift; | |
181 | ||
182 | cast &= ~(IDE_CAST_CMD_MASK << IDE_CAST_CMD_SHIFT); | |
183 | cast |= cmd_timings[cmdmode] << IDE_CAST_CMD_SHIFT; | |
184 | ||
185 | etc &= ~(IDE_DRV_MASK << dshift); | |
186 | etc |= IDE_ETC_NODMA << dshift; | |
187 | ||
188 | cs5536_write(pdev, DTC, dtc); | |
189 | cs5536_write(pdev, CAST, cast); | |
190 | cs5536_write(pdev, ETC, etc); | |
191 | } | |
192 | ||
193 | /** | |
194 | * cs5536_set_dmamode - DMA timing setup | |
195 | * @ap: ATA interface | |
196 | * @adev: Device being configured | |
197 | * | |
198 | */ | |
199 | ||
200 | static void cs5536_set_dmamode(struct ata_port *ap, struct ata_device *adev) | |
201 | { | |
202 | static const u8 udma_timings[6] = { | |
203 | 0xc2, 0xc1, 0xc0, 0xc4, 0xc5, 0xc6, | |
204 | }; | |
205 | ||
206 | static const u8 mwdma_timings[3] = { | |
207 | 0x67, 0x21, 0x20, | |
208 | }; | |
209 | ||
210 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); | |
211 | u32 dtc, etc; | |
212 | int mode = adev->dma_mode; | |
b6966a61 | 213 | int dshift = adev->devno ? IDE_D1_SHIFT : IDE_D0_SHIFT; |
3957df61 MP |
214 | |
215 | if (mode >= XFER_UDMA_0) { | |
216 | cs5536_read(pdev, ETC, &etc); | |
217 | ||
218 | etc &= ~(IDE_DRV_MASK << dshift); | |
219 | etc |= udma_timings[mode - XFER_UDMA_0] << dshift; | |
220 | ||
221 | cs5536_write(pdev, ETC, etc); | |
222 | } else { /* MWDMA */ | |
223 | cs5536_read(pdev, DTC, &dtc); | |
224 | ||
225 | dtc &= ~(IDE_DRV_MASK << dshift); | |
80f6fd38 | 226 | dtc |= mwdma_timings[mode - XFER_MW_DMA_0] << dshift; |
3957df61 MP |
227 | |
228 | cs5536_write(pdev, DTC, dtc); | |
229 | } | |
230 | } | |
231 | ||
232 | static struct scsi_host_template cs5536_sht = { | |
68d1d07b | 233 | ATA_BMDMA_SHT(DRV_NAME), |
3957df61 MP |
234 | }; |
235 | ||
236 | static struct ata_port_operations cs5536_port_ops = { | |
ba3a221c | 237 | .inherits = &ata_bmdma32_port_ops, |
029cfd6b | 238 | .cable_detect = cs5536_cable_detect, |
3957df61 MP |
239 | .set_piomode = cs5536_set_piomode, |
240 | .set_dmamode = cs5536_set_dmamode, | |
3957df61 MP |
241 | }; |
242 | ||
243 | /** | |
244 | * cs5536_init_one | |
245 | * @dev: PCI device | |
246 | * @id: Entry in match table | |
247 | * | |
248 | */ | |
249 | ||
250 | static int cs5536_init_one(struct pci_dev *dev, const struct pci_device_id *id) | |
251 | { | |
252 | static const struct ata_port_info info = { | |
3957df61 | 253 | .flags = ATA_FLAG_SLAVE_POSS, |
14bdef98 EIB |
254 | .pio_mask = ATA_PIO4, |
255 | .mwdma_mask = ATA_MWDMA2, | |
3957df61 MP |
256 | .udma_mask = ATA_UDMA5, |
257 | .port_ops = &cs5536_port_ops, | |
258 | }; | |
259 | ||
260 | const struct ata_port_info *ppi[] = { &info, &ata_dummy_port_info }; | |
261 | u32 cfg; | |
262 | ||
263 | if (use_msr) | |
264 | printk(KERN_ERR DRV_NAME ": Using MSR regs instead of PCI\n"); | |
265 | ||
266 | cs5536_read(dev, CFG, &cfg); | |
267 | ||
268 | if ((cfg & IDE_CFG_CHANEN) == 0) { | |
269 | printk(KERN_ERR DRV_NAME ": disabled by BIOS\n"); | |
270 | return -ENODEV; | |
271 | } | |
272 | ||
1c5afdf7 | 273 | return ata_pci_bmdma_init_one(dev, ppi, &cs5536_sht, NULL, 0); |
3957df61 MP |
274 | } |
275 | ||
276 | static const struct pci_device_id cs5536[] = { | |
277 | { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_CS5536_IDE), }, | |
278 | { }, | |
279 | }; | |
280 | ||
281 | static struct pci_driver cs5536_pci_driver = { | |
282 | .name = DRV_NAME, | |
283 | .id_table = cs5536, | |
284 | .probe = cs5536_init_one, | |
285 | .remove = ata_pci_remove_one, | |
286 | #ifdef CONFIG_PM | |
287 | .suspend = ata_pci_device_suspend, | |
288 | .resume = ata_pci_device_resume, | |
289 | #endif | |
290 | }; | |
291 | ||
292 | static int __init cs5536_init(void) | |
293 | { | |
294 | return pci_register_driver(&cs5536_pci_driver); | |
295 | } | |
296 | ||
297 | static void __exit cs5536_exit(void) | |
298 | { | |
299 | pci_unregister_driver(&cs5536_pci_driver); | |
300 | } | |
301 | ||
302 | MODULE_AUTHOR("Martin K. Petersen"); | |
303 | MODULE_DESCRIPTION("low-level driver for the CS5536 IDE controller"); | |
304 | MODULE_LICENSE("GPL"); | |
305 | MODULE_DEVICE_TABLE(pci, cs5536); | |
306 | MODULE_VERSION(DRV_VERSION); | |
3957df61 MP |
307 | |
308 | module_init(cs5536_init); | |
309 | module_exit(cs5536_exit); |