[mirror_ubuntu-zesty-kernel.git] / drivers / ata / pata_cs5536.c

/*
 * pata_cs5536.c	- CS5536 PATA for new ATA layer
 *			  (C) 2007 Martin K. Petersen <mkp@mkp.net>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307	 USA
 *
 * Documentation:
 *	Available from AMD web site.
 *
 * The IDE timing registers for the CS5536 live in the Geode Machine
 * Specific Register file and not PCI config space.  Most BIOSes
 * virtualize the PCI registers so the chip looks like a standard IDE
 * controller.	Unfortunately not all implementations get this right.
 * In particular some have problems with unaligned accesses to the
 * virtualized PCI registers.  This driver always does full dword
 * writes to work around the issue.  Also, in case of a bad BIOS this
 * driver can be loaded with the "msr=1" parameter which forces using
 * the Machine Specific Registers to configure the device.
 */

#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/pci.h>
#include <linux/init.h>
#include <linux/blkdev.h>
#include <linux/delay.h>
#include <linux/libata.h>
#include <scsi/scsi_host.h>

#ifdef CONFIG_X86_32
#include <asm/msr.h>
static int use_msr;
module_param_named(msr, use_msr, int, 0644);
MODULE_PARM_DESC(msr, "Force using MSR to configure IDE function (Default: 0)");
#else
#define rdmsr(x, y, z) do { } while (0)
#define wrmsr(x, y, z) do { } while (0)
#define use_msr 0
#endif

#define DRV_NAME	"pata_cs5536"
#define DRV_VERSION	"0.0.8"

enum {
	CFG			= 0,
	DTC			= 1,
	CAST			= 2,
	ETC			= 3,

	MSR_IDE_BASE		= 0x51300000,
	MSR_IDE_CFG		= (MSR_IDE_BASE + 0x10),
	MSR_IDE_DTC		= (MSR_IDE_BASE + 0x12),
	MSR_IDE_CAST		= (MSR_IDE_BASE + 0x13),
	MSR_IDE_ETC		= (MSR_IDE_BASE + 0x14),

	PCI_IDE_CFG		= 0x40,
	PCI_IDE_DTC		= 0x48,
	PCI_IDE_CAST		= 0x4c,
	PCI_IDE_ETC		= 0x50,

	IDE_CFG_CHANEN		= 0x2,
	IDE_CFG_CABLE		= 0x10000,

	IDE_D0_SHIFT		= 24,
	IDE_D1_SHIFT		= 16,
	IDE_DRV_MASK		= 0xff,

	IDE_CAST_D0_SHIFT	= 6,
	IDE_CAST_D1_SHIFT	= 4,
	IDE_CAST_DRV_MASK	= 0x3,
	IDE_CAST_CMD_MASK	= 0xff,
	IDE_CAST_CMD_SHIFT	= 24,

	IDE_ETC_NODMA		= 0x03,
};

static const u32 msr_reg[4] = {
	MSR_IDE_CFG, MSR_IDE_DTC, MSR_IDE_CAST, MSR_IDE_ETC,
};

static const u8 pci_reg[4] = {
	PCI_IDE_CFG, PCI_IDE_DTC, PCI_IDE_CAST, PCI_IDE_ETC,
};

static inline int cs5536_read(struct pci_dev *pdev, int reg, u32 *val)
{
	if (unlikely(use_msr)) {
		u32 dummy __maybe_unused;

		rdmsr(msr_reg[reg], *val, dummy);
		return 0;
	}

	return pci_read_config_dword(pdev, pci_reg[reg], val);
}

static inline int cs5536_write(struct pci_dev *pdev, int reg, int val)
{
	if (unlikely(use_msr)) {
		wrmsr(msr_reg[reg], val, 0);
		return 0;
	}

	return pci_write_config_dword(pdev, pci_reg[reg], val);
}

/**
 *	cs5536_cable_detect	-	detect cable type
 *	@ap: Port to detect on
 *
 *	Perform cable detection for ATA66 capable cable. Return a libata
 *	cable type.
 */

static int cs5536_cable_detect(struct ata_port *ap)
{
	struct pci_dev *pdev = to_pci_dev(ap->host->dev);
	u32 cfg;

	cs5536_read(pdev, CFG, &cfg);

	if (cfg & (IDE_CFG_CABLE << ap->port_no))
		return ATA_CBL_PATA80;
	else
		return ATA_CBL_PATA40;
}

/**
 *	cs5536_set_piomode		-	PIO setup
 *	@ap: ATA interface
 *	@adev: device on the interface
 */

static void cs5536_set_piomode(struct ata_port *ap, struct ata_device *adev)
{
	static const u8 drv_timings[5] = {
		0x98, 0x55, 0x32, 0x21, 0x20,
	};

	static const u8 addr_timings[5] = {
		0x2, 0x1, 0x0, 0x0, 0x0,
	};

	static const u8 cmd_timings[5] = {
		0x99, 0x92, 0x90, 0x22, 0x20,
	};

	struct pci_dev *pdev = to_pci_dev(ap->host->dev);
	struct ata_device *pair = ata_dev_pair(adev);
	int mode = adev->pio_mode - XFER_PIO_0;
	int cmdmode = mode;
	int dshift = adev->devno ? IDE_D1_SHIFT : IDE_D0_SHIFT;
	int cshift = adev->devno ? IDE_CAST_D1_SHIFT : IDE_CAST_D0_SHIFT;
	u32 dtc, cast, etc;

	if (pair)
		cmdmode = min(mode, pair->pio_mode - XFER_PIO_0);

	cs5536_read(pdev, DTC, &dtc);
	cs5536_read(pdev, CAST, &cast);
	cs5536_read(pdev, ETC, &etc);

	dtc &= ~(IDE_DRV_MASK << dshift);
	dtc |= drv_timings[mode] << dshift;

	cast &= ~(IDE_CAST_DRV_MASK << cshift);
	cast |= addr_timings[mode] << cshift;

	cast &= ~(IDE_CAST_CMD_MASK << IDE_CAST_CMD_SHIFT);
	cast |= cmd_timings[cmdmode] << IDE_CAST_CMD_SHIFT;

	etc &= ~(IDE_DRV_MASK << dshift);
	etc |= IDE_ETC_NODMA << dshift;

	cs5536_write(pdev, DTC, dtc);
	cs5536_write(pdev, CAST, cast);
	cs5536_write(pdev, ETC, etc);
}

/**
 *	cs5536_set_dmamode		-	DMA timing setup
 *	@ap: ATA interface
 *	@adev: Device being configured
 *
 */

static void cs5536_set_dmamode(struct ata_port *ap, struct ata_device *adev)
{
	static const u8 udma_timings[6] = {
		0xc2, 0xc1, 0xc0, 0xc4, 0xc5, 0xc6,
	};

	static const u8 mwdma_timings[3] = {
		0x67, 0x21, 0x20,
	};

	struct pci_dev *pdev = to_pci_dev(ap->host->dev);
	u32 dtc, etc;
	int mode = adev->dma_mode;
	int dshift = adev->devno ? IDE_D1_SHIFT : IDE_D0_SHIFT;

	if (mode >= XFER_UDMA_0) {
		cs5536_read(pdev, ETC, &etc);

		etc &= ~(IDE_DRV_MASK << dshift);
		etc |= udma_timings[mode - XFER_UDMA_0] << dshift;

		cs5536_write(pdev, ETC, etc);
	} else { /* MWDMA */
		cs5536_read(pdev, DTC, &dtc);

		dtc &= ~(IDE_DRV_MASK << dshift);
		dtc |= mwdma_timings[mode - XFER_MW_DMA_0] << dshift;

		cs5536_write(pdev, DTC, dtc);
	}
}

static struct scsi_host_template cs5536_sht = {
	ATA_BMDMA_SHT(DRV_NAME),
};

static struct ata_port_operations cs5536_port_ops = {
	.inherits		= &ata_bmdma32_port_ops,
	.cable_detect		= cs5536_cable_detect,
	.set_piomode		= cs5536_set_piomode,
	.set_dmamode		= cs5536_set_dmamode,
};

/**
 *	cs5536_init_one
 *	@dev: PCI device
 *	@id: Entry in match table
 *
 */

static int cs5536_init_one(struct pci_dev *dev, const struct pci_device_id *id)
{
	static const struct ata_port_info info = {
		.flags = ATA_FLAG_SLAVE_POSS,
		.pio_mask = ATA_PIO4,
		.mwdma_mask = ATA_MWDMA2,
		.udma_mask = ATA_UDMA5,
		.port_ops = &cs5536_port_ops,
	};

	const struct ata_port_info *ppi[] = { &info, &ata_dummy_port_info };
	u32 cfg;

	if (use_msr)
		printk(KERN_ERR DRV_NAME ": Using MSR regs instead of PCI\n");

	cs5536_read(dev, CFG, &cfg);

	if ((cfg & IDE_CFG_CHANEN) == 0) {
		printk(KERN_ERR DRV_NAME ": disabled by BIOS\n");
		return -ENODEV;
	}

	return ata_pci_bmdma_init_one(dev, ppi, &cs5536_sht, NULL, 0);
}

static const struct pci_device_id cs5536[] = {
	{ PCI_VDEVICE(AMD,	PCI_DEVICE_ID_AMD_CS5536_IDE), },
	{ },
};

static struct pci_driver cs5536_pci_driver = {
	.name		= DRV_NAME,
	.id_table	= cs5536,
	.probe		= cs5536_init_one,
	.remove		= ata_pci_remove_one,
#ifdef CONFIG_PM
	.suspend	= ata_pci_device_suspend,
	.resume		= ata_pci_device_resume,
#endif
};

static int __init cs5536_init(void)
{
	return pci_register_driver(&cs5536_pci_driver);
}

static void __exit cs5536_exit(void)
{
	pci_unregister_driver(&cs5536_pci_driver);
}

MODULE_AUTHOR("Martin K. Petersen");
MODULE_DESCRIPTION("low-level driver for the CS5536 IDE controller");
MODULE_LICENSE("GPL");
MODULE_DEVICE_TABLE(pci, cs5536);
MODULE_VERSION(DRV_VERSION);

module_init(cs5536_init);
module_exit(cs5536_exit);
Commit	Line	Data
3957df61 MP	1	/*
	2	* pata_cs5536.c - CS5536 PATA for new ATA layer
	3	* (C) 2007 Martin K. Petersen <mkp@mkp.net>
	4	*
	5	* This program is free software; you can redistribute it and/or modify
	6	* it under the terms of the GNU General Public License version 2 as
	7	* published by the Free Software Foundation.
	8	*
	9	* This program is distributed in the hope that it will be useful,
	10	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	11	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	12	* GNU General Public License for more details.
	13	*
	14	* You should have received a copy of the GNU General Public License
	15	* along with this program; if not, write to the Free Software
	16	* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
	17	*
	18	* Documentation:
	19	* Available from AMD web site.
	20	*
	21	* The IDE timing registers for the CS5536 live in the Geode Machine
	22	* Specific Register file and not PCI config space. Most BIOSes
	23	* virtualize the PCI registers so the chip looks like a standard IDE
	24	* controller. Unfortunately not all implementations get this right.
	25	* In particular some have problems with unaligned accesses to the
	26	* virtualized PCI registers. This driver always does full dword
	27	* writes to work around the issue. Also, in case of a bad BIOS this
	28	* driver can be loaded with the "msr=1" parameter which forces using
	29	* the Machine Specific Registers to configure the device.
	30	*/
	31
	32	#include <linux/kernel.h>
	33	#include <linux/module.h>
	34	#include <linux/pci.h>
	35	#include <linux/init.h>
	36	#include <linux/blkdev.h>
	37	#include <linux/delay.h>
	38	#include <linux/libata.h>
	39	#include <scsi/scsi_host.h>
9272dcc2 WZ	40
9272dcc2 WZ	41	#ifdef CONFIG_X86_32
3957df61	42	#include <asm/msr.h>
9272dcc2 WZ	43	static int use_msr;
	44	module_param_named(msr, use_msr, int, 0644);
	45	MODULE_PARM_DESC(msr, "Force using MSR to configure IDE function (Default: 0)");
	46	#else
	47	#define rdmsr(x, y, z) do { } while (0)
	48	#define wrmsr(x, y, z) do { } while (0)
	49	#define use_msr 0
	50	#endif
3957df61 MP	51
3957df61 MP	52	#define DRV_NAME "pata_cs5536"
9272dcc2	53	#define DRV_VERSION "0.0.8"
3957df61 MP	54
	55	enum {
	56	CFG = 0,
	57	DTC = 1,
	58	CAST = 2,
	59	ETC = 3,
	60
	61	MSR_IDE_BASE = 0x51300000,
	62	MSR_IDE_CFG = (MSR_IDE_BASE + 0x10),
	63	MSR_IDE_DTC = (MSR_IDE_BASE + 0x12),
	64	MSR_IDE_CAST = (MSR_IDE_BASE + 0x13),
	65	MSR_IDE_ETC = (MSR_IDE_BASE + 0x14),
	66
	67	PCI_IDE_CFG = 0x40,
	68	PCI_IDE_DTC = 0x48,
	69	PCI_IDE_CAST = 0x4c,
	70	PCI_IDE_ETC = 0x50,
	71
	72	IDE_CFG_CHANEN = 0x2,
	73	IDE_CFG_CABLE = 0x10000,
	74
	75	IDE_D0_SHIFT = 24,
	76	IDE_D1_SHIFT = 16,
	77	IDE_DRV_MASK = 0xff,
	78
	79	IDE_CAST_D0_SHIFT = 6,
	80	IDE_CAST_D1_SHIFT = 4,
	81	IDE_CAST_DRV_MASK = 0x3,
	82	IDE_CAST_CMD_MASK = 0xff,
	83	IDE_CAST_CMD_SHIFT = 24,
	84
	85	IDE_ETC_NODMA = 0x03,
	86	};
	87
3957df61 MP	88	static const u32 msr_reg[4] = {
	89	MSR_IDE_CFG, MSR_IDE_DTC, MSR_IDE_CAST, MSR_IDE_ETC,
	90	};
	91
	92	static const u8 pci_reg[4] = {
	93	PCI_IDE_CFG, PCI_IDE_DTC, PCI_IDE_CAST, PCI_IDE_ETC,
	94	};
	95
2072fb55	96	static inline int cs5536_read(struct pci_dev pdev, int reg, u32 val)
3957df61 MP	97	{
3957df61 MP	98	if (unlikely(use_msr)) {
9272dcc2	99	u32 dummy __maybe_unused;
3957df61 MP	100
	101	rdmsr(msr_reg[reg], *val, dummy);
	102	return 0;
	103	}
	104
	105	return pci_read_config_dword(pdev, pci_reg[reg], val);
	106	}
	107
	108	static inline int cs5536_write(struct pci_dev *pdev, int reg, int val)
	109	{
	110	if (unlikely(use_msr)) {
	111	wrmsr(msr_reg[reg], val, 0);
	112	return 0;
	113	}
	114
	115	return pci_write_config_dword(pdev, pci_reg[reg], val);
	116	}
	117
	118	/**
	119	* cs5536_cable_detect - detect cable type
	120	* @ap: Port to detect on
3957df61 MP	121	*
	122	* Perform cable detection for ATA66 capable cable. Return a libata
	123	* cable type.
	124	*/
	125
	126	static int cs5536_cable_detect(struct ata_port *ap)
	127	{
	128	struct pci_dev *pdev = to_pci_dev(ap->host->dev);
	129	u32 cfg;
	130
	131	cs5536_read(pdev, CFG, &cfg);
	132
	133	if (cfg & (IDE_CFG_CABLE << ap->port_no))
	134	return ATA_CBL_PATA80;
	135	else
	136	return ATA_CBL_PATA40;
	137	}
	138
	139	/**
	140	* cs5536_set_piomode - PIO setup
	141	* @ap: ATA interface
	142	* @adev: device on the interface
	143	*/
	144
	145	static void cs5536_set_piomode(struct ata_port ap, struct ata_device adev)
	146	{
	147	static const u8 drv_timings[5] = {
	148	0x98, 0x55, 0x32, 0x21, 0x20,
	149	};
	150
	151	static const u8 addr_timings[5] = {
	152	0x2, 0x1, 0x0, 0x0, 0x0,
	153	};
	154
	155	static const u8 cmd_timings[5] = {
	156	0x99, 0x92, 0x90, 0x22, 0x20,
	157	};
	158
	159	struct pci_dev *pdev = to_pci_dev(ap->host->dev);
	160	struct ata_device *pair = ata_dev_pair(adev);
	161	int mode = adev->pio_mode - XFER_PIO_0;
	162	int cmdmode = mode;
b6966a61 MP	163	int dshift = adev->devno ? IDE_D1_SHIFT : IDE_D0_SHIFT;
b6966a61 MP	164	int cshift = adev->devno ? IDE_CAST_D1_SHIFT : IDE_CAST_D0_SHIFT;
3957df61 MP	165	u32 dtc, cast, etc;
	166
	167	if (pair)
	168	cmdmode = min(mode, pair->pio_mode - XFER_PIO_0);
	169
	170	cs5536_read(pdev, DTC, &dtc);
	171	cs5536_read(pdev, CAST, &cast);
	172	cs5536_read(pdev, ETC, &etc);
	173
	174	dtc &= ~(IDE_DRV_MASK << dshift);
	175	dtc \|= drv_timings[mode] << dshift;
	176
	177	cast &= ~(IDE_CAST_DRV_MASK << cshift);
	178	cast \|= addr_timings[mode] << cshift;
	179
	180	cast &= ~(IDE_CAST_CMD_MASK << IDE_CAST_CMD_SHIFT);
	181	cast \|= cmd_timings[cmdmode] << IDE_CAST_CMD_SHIFT;
	182
	183	etc &= ~(IDE_DRV_MASK << dshift);
	184	etc \|= IDE_ETC_NODMA << dshift;
	185
	186	cs5536_write(pdev, DTC, dtc);
	187	cs5536_write(pdev, CAST, cast);
	188	cs5536_write(pdev, ETC, etc);
	189	}
	190
	191	/**
	192	* cs5536_set_dmamode - DMA timing setup
	193	* @ap: ATA interface
	194	* @adev: Device being configured
	195	*
	196	*/
	197
	198	static void cs5536_set_dmamode(struct ata_port ap, struct ata_device adev)
	199	{
	200	static const u8 udma_timings[6] = {
	201	0xc2, 0xc1, 0xc0, 0xc4, 0xc5, 0xc6,
	202	};
	203
	204	static const u8 mwdma_timings[3] = {
	205	0x67, 0x21, 0x20,
	206	};
	207
	208	struct pci_dev *pdev = to_pci_dev(ap->host->dev);
	209	u32 dtc, etc;
	210	int mode = adev->dma_mode;
b6966a61	211	int dshift = adev->devno ? IDE_D1_SHIFT : IDE_D0_SHIFT;
3957df61 MP	212
	213	if (mode >= XFER_UDMA_0) {
	214	cs5536_read(pdev, ETC, &etc);
	215
	216	etc &= ~(IDE_DRV_MASK << dshift);
	217	etc \|= udma_timings[mode - XFER_UDMA_0] << dshift;
	218
	219	cs5536_write(pdev, ETC, etc);
	220	} else { /* MWDMA */
	221	cs5536_read(pdev, DTC, &dtc);
	222
	223	dtc &= ~(IDE_DRV_MASK << dshift);
80f6fd38	224	dtc \|= mwdma_timings[mode - XFER_MW_DMA_0] << dshift;
3957df61 MP	225
	226	cs5536_write(pdev, DTC, dtc);
	227	}
	228	}
	229
	230	static struct scsi_host_template cs5536_sht = {
68d1d07b	231	ATA_BMDMA_SHT(DRV_NAME),
3957df61 MP	232	};
	233
	234	static struct ata_port_operations cs5536_port_ops = {
ba3a221c	235	.inherits = &ata_bmdma32_port_ops,
029cfd6b	236	.cable_detect = cs5536_cable_detect,
3957df61 MP	237	.set_piomode = cs5536_set_piomode,
3957df61 MP	238	.set_dmamode = cs5536_set_dmamode,
3957df61 MP	239	};
	240
	241	/**
	242	* cs5536_init_one
	243	* @dev: PCI device
	244	* @id: Entry in match table
	245	*
	246	*/
	247
	248	static int cs5536_init_one(struct pci_dev dev, const struct pci_device_id id)
	249	{
	250	static const struct ata_port_info info = {
3957df61	251	.flags = ATA_FLAG_SLAVE_POSS,
14bdef98 EIB	252	.pio_mask = ATA_PIO4,
14bdef98 EIB	253	.mwdma_mask = ATA_MWDMA2,
3957df61 MP	254	.udma_mask = ATA_UDMA5,
	255	.port_ops = &cs5536_port_ops,
	256	};
	257
	258	const struct ata_port_info *ppi[] = { &info, &ata_dummy_port_info };
	259	u32 cfg;
	260
	261	if (use_msr)
	262	printk(KERN_ERR DRV_NAME ": Using MSR regs instead of PCI\n");
	263
	264	cs5536_read(dev, CFG, &cfg);
	265
	266	if ((cfg & IDE_CFG_CHANEN) == 0) {
	267	printk(KERN_ERR DRV_NAME ": disabled by BIOS\n");
	268	return -ENODEV;
	269	}
	270
1c5afdf7	271	return ata_pci_bmdma_init_one(dev, ppi, &cs5536_sht, NULL, 0);
3957df61 MP	272	}
	273
	274	static const struct pci_device_id cs5536[] = {
	275	{ PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_CS5536_IDE), },
	276	{ },
	277	};
	278
	279	static struct pci_driver cs5536_pci_driver = {
	280	.name = DRV_NAME,
	281	.id_table = cs5536,
	282	.probe = cs5536_init_one,
	283	.remove = ata_pci_remove_one,
	284	#ifdef CONFIG_PM
	285	.suspend = ata_pci_device_suspend,
	286	.resume = ata_pci_device_resume,
	287	#endif
	288	};
	289
	290	static int __init cs5536_init(void)
	291	{
	292	return pci_register_driver(&cs5536_pci_driver);
	293	}
	294
	295	static void __exit cs5536_exit(void)
	296	{
	297	pci_unregister_driver(&cs5536_pci_driver);
	298	}
	299
	300	MODULE_AUTHOR("Martin K. Petersen");
	301	MODULE_DESCRIPTION("low-level driver for the CS5536 IDE controller");
	302	MODULE_LICENSE("GPL");
	303	MODULE_DEVICE_TABLE(pci, cs5536);
	304	MODULE_VERSION(DRV_VERSION);
3957df61 MP	305
	306	module_init(cs5536_init);
	307	module_exit(cs5536_exit);