]>
Commit | Line | Data |
---|---|---|
669a5db4 JG |
1 | /* |
2 | * pata_cypress.c - Cypress PATA for new ATA layer | |
3 | * (C) 2006 Red Hat Inc | |
4 | * Alan Cox <alan@redhat.com> | |
5 | * | |
6 | * Based heavily on | |
7 | * linux/drivers/ide/pci/cy82c693.c Version 0.40 Sep. 10, 2002 | |
8 | * | |
9 | */ | |
85cd7251 | 10 | |
669a5db4 JG |
11 | #include <linux/kernel.h> |
12 | #include <linux/module.h> | |
13 | #include <linux/pci.h> | |
14 | #include <linux/init.h> | |
15 | #include <linux/blkdev.h> | |
16 | #include <linux/delay.h> | |
17 | #include <scsi/scsi_host.h> | |
18 | #include <linux/libata.h> | |
19 | ||
20 | #define DRV_NAME "pata_cypress" | |
8bc3fc47 | 21 | #define DRV_VERSION "0.1.5" |
669a5db4 JG |
22 | |
23 | /* here are the offset definitions for the registers */ | |
24 | ||
25 | enum { | |
26 | CY82_IDE_CMDREG = 0x04, | |
27 | CY82_IDE_ADDRSETUP = 0x48, | |
28 | CY82_IDE_MASTER_IOR = 0x4C, | |
29 | CY82_IDE_MASTER_IOW = 0x4D, | |
30 | CY82_IDE_SLAVE_IOR = 0x4E, | |
31 | CY82_IDE_SLAVE_IOW = 0x4F, | |
32 | CY82_IDE_MASTER_8BIT = 0x50, | |
33 | CY82_IDE_SLAVE_8BIT = 0x51, | |
34 | ||
35 | CY82_INDEX_PORT = 0x22, | |
36 | CY82_DATA_PORT = 0x23, | |
37 | ||
38 | CY82_INDEX_CTRLREG1 = 0x01, | |
39 | CY82_INDEX_CHANNEL0 = 0x30, | |
40 | CY82_INDEX_CHANNEL1 = 0x31, | |
41 | CY82_INDEX_TIMEOUT = 0x32 | |
42 | }; | |
43 | ||
669a5db4 JG |
44 | /** |
45 | * cy82c693_set_piomode - set initial PIO mode data | |
46 | * @ap: ATA interface | |
47 | * @adev: ATA device | |
48 | * | |
49 | * Called to do the PIO mode setup. | |
50 | */ | |
85cd7251 | 51 | |
669a5db4 JG |
52 | static void cy82c693_set_piomode(struct ata_port *ap, struct ata_device *adev) |
53 | { | |
54 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); | |
55 | struct ata_timing t; | |
56 | const unsigned long T = 1000000 / 33; | |
57 | short time_16, time_8; | |
58 | u32 addr; | |
85cd7251 | 59 | |
669a5db4 JG |
60 | if (ata_timing_compute(adev, adev->pio_mode, &t, T, 1) < 0) { |
61 | printk(KERN_ERR DRV_NAME ": mome computation failed.\n"); | |
62 | return; | |
63 | } | |
64 | ||
65 | time_16 = FIT(t.recover, 0, 15) | (FIT(t.active, 0, 15) << 4); | |
66 | time_8 = FIT(t.act8b, 0, 15) | (FIT(t.rec8b, 0, 15) << 4); | |
85cd7251 | 67 | |
669a5db4 JG |
68 | if (adev->devno == 0) { |
69 | pci_read_config_dword(pdev, CY82_IDE_ADDRSETUP, &addr); | |
85cd7251 | 70 | |
669a5db4 JG |
71 | addr &= ~0x0F; /* Mask bits */ |
72 | addr |= FIT(t.setup, 0, 15); | |
85cd7251 | 73 | |
669a5db4 JG |
74 | pci_write_config_dword(pdev, CY82_IDE_ADDRSETUP, addr); |
75 | pci_write_config_byte(pdev, CY82_IDE_MASTER_IOR, time_16); | |
76 | pci_write_config_byte(pdev, CY82_IDE_MASTER_IOW, time_16); | |
77 | pci_write_config_byte(pdev, CY82_IDE_MASTER_8BIT, time_8); | |
78 | } else { | |
79 | pci_read_config_dword(pdev, CY82_IDE_ADDRSETUP, &addr); | |
85cd7251 | 80 | |
669a5db4 JG |
81 | addr &= ~0xF0; /* Mask bits */ |
82 | addr |= (FIT(t.setup, 0, 15) << 4); | |
83 | ||
84 | pci_write_config_dword(pdev, CY82_IDE_ADDRSETUP, addr); | |
85 | pci_write_config_byte(pdev, CY82_IDE_SLAVE_IOR, time_16); | |
86 | pci_write_config_byte(pdev, CY82_IDE_SLAVE_IOW, time_16); | |
87 | pci_write_config_byte(pdev, CY82_IDE_SLAVE_8BIT, time_8); | |
88 | } | |
89 | } | |
90 | ||
91 | /** | |
92 | * cy82c693_set_dmamode - set initial DMA mode data | |
93 | * @ap: ATA interface | |
94 | * @adev: ATA device | |
95 | * | |
96 | * Called to do the DMA mode setup. | |
97 | */ | |
85cd7251 | 98 | |
669a5db4 JG |
99 | static void cy82c693_set_dmamode(struct ata_port *ap, struct ata_device *adev) |
100 | { | |
101 | int reg = CY82_INDEX_CHANNEL0 + ap->port_no; | |
85cd7251 | 102 | |
669a5db4 JG |
103 | /* Be afraid, be very afraid. Magic registers in low I/O space */ |
104 | outb(reg, 0x22); | |
105 | outb(adev->dma_mode - XFER_MW_DMA_0, 0x23); | |
85cd7251 | 106 | |
669a5db4 JG |
107 | /* 0x50 gives the best behaviour on the Alpha's using this chip */ |
108 | outb(CY82_INDEX_TIMEOUT, 0x22); | |
109 | outb(0x50, 0x23); | |
110 | } | |
111 | ||
112 | static struct scsi_host_template cy82c693_sht = { | |
68d1d07b | 113 | ATA_BMDMA_SHT(DRV_NAME), |
669a5db4 JG |
114 | }; |
115 | ||
116 | static struct ata_port_operations cy82c693_port_ops = { | |
669a5db4 JG |
117 | .set_piomode = cy82c693_set_piomode, |
118 | .set_dmamode = cy82c693_set_dmamode, | |
119 | .mode_filter = ata_pci_default_filter, | |
85cd7251 | 120 | |
669a5db4 JG |
121 | .tf_load = ata_tf_load, |
122 | .tf_read = ata_tf_read, | |
123 | .check_status = ata_check_status, | |
124 | .exec_command = ata_exec_command, | |
125 | .dev_select = ata_std_dev_select, | |
126 | ||
127 | .freeze = ata_bmdma_freeze, | |
128 | .thaw = ata_bmdma_thaw, | |
eb4a2c7f | 129 | .error_handler = ata_bmdma_error_handler, |
669a5db4 | 130 | .post_internal_cmd = ata_bmdma_post_internal_cmd, |
eb4a2c7f | 131 | .cable_detect = ata_cable_40wire, |
669a5db4 JG |
132 | |
133 | .bmdma_setup = ata_bmdma_setup, | |
134 | .bmdma_start = ata_bmdma_start, | |
135 | .bmdma_stop = ata_bmdma_stop, | |
136 | .bmdma_status = ata_bmdma_status, | |
137 | ||
138 | .qc_prep = ata_qc_prep, | |
139 | .qc_issue = ata_qc_issue_prot, | |
bda30288 | 140 | |
0d5ff566 | 141 | .data_xfer = ata_data_xfer, |
669a5db4 JG |
142 | |
143 | .irq_handler = ata_interrupt, | |
144 | .irq_clear = ata_bmdma_irq_clear, | |
246ce3b6 | 145 | .irq_on = ata_irq_on, |
85cd7251 | 146 | |
81ad1837 | 147 | .port_start = ata_sff_port_start, |
85cd7251 | 148 | }; |
669a5db4 JG |
149 | |
150 | static int cy82c693_init_one(struct pci_dev *pdev, const struct pci_device_id *id) | |
151 | { | |
1626aeb8 | 152 | static const struct ata_port_info info = { |
669a5db4 | 153 | .sht = &cy82c693_sht, |
1d2808fd | 154 | .flags = ATA_FLAG_SLAVE_POSS, |
669a5db4 JG |
155 | .pio_mask = 0x1f, |
156 | .mwdma_mask = 0x07, | |
157 | .port_ops = &cy82c693_port_ops | |
158 | }; | |
1626aeb8 | 159 | const struct ata_port_info *ppi[] = { &info, &ata_dummy_port_info }; |
85cd7251 | 160 | |
2d2744fc JG |
161 | /* Devfn 1 is the ATA primary. The secondary is magic and on devfn2. |
162 | For the moment we don't handle the secondary. FIXME */ | |
85cd7251 | 163 | |
669a5db4 JG |
164 | if (PCI_FUNC(pdev->devfn) != 1) |
165 | return -ENODEV; | |
85cd7251 | 166 | |
1626aeb8 | 167 | return ata_pci_init_one(pdev, ppi); |
669a5db4 JG |
168 | } |
169 | ||
2d2744fc JG |
170 | static const struct pci_device_id cy82c693[] = { |
171 | { PCI_VDEVICE(CONTAQ, PCI_DEVICE_ID_CONTAQ_82C693), }, | |
172 | ||
173 | { }, | |
669a5db4 JG |
174 | }; |
175 | ||
176 | static struct pci_driver cy82c693_pci_driver = { | |
2d2744fc | 177 | .name = DRV_NAME, |
669a5db4 JG |
178 | .id_table = cy82c693, |
179 | .probe = cy82c693_init_one, | |
30ced0f0 | 180 | .remove = ata_pci_remove_one, |
438ac6d5 | 181 | #ifdef CONFIG_PM |
30ced0f0 AC |
182 | .suspend = ata_pci_device_suspend, |
183 | .resume = ata_pci_device_resume, | |
438ac6d5 | 184 | #endif |
669a5db4 JG |
185 | }; |
186 | ||
187 | static int __init cy82c693_init(void) | |
188 | { | |
189 | return pci_register_driver(&cy82c693_pci_driver); | |
190 | } | |
191 | ||
192 | ||
193 | static void __exit cy82c693_exit(void) | |
194 | { | |
195 | pci_unregister_driver(&cy82c693_pci_driver); | |
196 | } | |
197 | ||
198 | ||
199 | MODULE_AUTHOR("Alan Cox"); | |
200 | MODULE_DESCRIPTION("low-level driver for the CY82C693 PATA controller"); | |
201 | MODULE_LICENSE("GPL"); | |
202 | MODULE_DEVICE_TABLE(pci, cy82c693); | |
203 | MODULE_VERSION(DRV_VERSION); | |
204 | ||
205 | module_init(cy82c693_init); | |
206 | module_exit(cy82c693_exit); |