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669a5db4 JG |
1 | /* |
2 | * pata_jmicron.c - JMicron ATA driver for non AHCI mode. This drives the | |
3 | * PATA port of the controller. The SATA ports are | |
4 | * driven by AHCI in the usual configuration although | |
5 | * this driver can handle other setups if we need it. | |
6 | * | |
7 | * (c) 2006 Red Hat <alan@redhat.com> | |
8 | */ | |
9 | ||
10 | #include <linux/kernel.h> | |
11 | #include <linux/module.h> | |
12 | #include <linux/pci.h> | |
13 | #include <linux/init.h> | |
14 | #include <linux/blkdev.h> | |
15 | #include <linux/delay.h> | |
16 | #include <linux/device.h> | |
17 | #include <scsi/scsi_host.h> | |
18 | #include <linux/libata.h> | |
19 | #include <linux/ata.h> | |
20 | ||
21 | #define DRV_NAME "pata_jmicron" | |
8bc3fc47 | 22 | #define DRV_VERSION "0.1.5" |
669a5db4 JG |
23 | |
24 | typedef enum { | |
25 | PORT_PATA0 = 0, | |
26 | PORT_PATA1 = 1, | |
27 | PORT_SATA = 2, | |
28 | } port_type; | |
29 | ||
30 | /** | |
31 | * jmicron_pre_reset - check for 40/80 pin | |
cc0680a5 | 32 | * @link: ATA link |
d4b2bab4 | 33 | * @deadline: deadline jiffies for the operation |
669a5db4 JG |
34 | * |
35 | * Perform the PATA port setup we need. | |
d4b2bab4 | 36 | * |
669a5db4 JG |
37 | * On the Jmicron 361/363 there is a single PATA port that can be mapped |
38 | * either as primary or secondary (or neither). We don't do any policy | |
39 | * and setup here. We assume that has been done by init_one and the | |
40 | * BIOS. | |
41 | */ | |
cc0680a5 | 42 | static int jmicron_pre_reset(struct ata_link *link, unsigned long deadline) |
669a5db4 | 43 | { |
cc0680a5 | 44 | struct ata_port *ap = link->ap; |
669a5db4 JG |
45 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); |
46 | u32 control; | |
47 | u32 control5; | |
48 | int port_mask = 1<< (4 * ap->port_no); | |
49 | int port = ap->port_no; | |
50 | port_type port_map[2]; | |
51 | ||
52 | /* Check if our port is enabled */ | |
53 | pci_read_config_dword(pdev, 0x40, &control); | |
54 | if ((control & port_mask) == 0) | |
c961922b | 55 | return -ENOENT; |
669a5db4 JG |
56 | |
57 | /* There are two basic mappings. One has the two SATA ports merged | |
58 | as master/slave and the secondary as PATA, the other has only the | |
59 | SATA port mapped */ | |
60 | if (control & (1 << 23)) { | |
61 | port_map[0] = PORT_SATA; | |
62 | port_map[1] = PORT_PATA0; | |
63 | } else { | |
64 | port_map[0] = PORT_SATA; | |
65 | port_map[1] = PORT_SATA; | |
66 | } | |
67 | ||
68 | /* The 365/366 may have this bit set to map the second PATA port | |
69 | as the internal primary channel */ | |
70 | pci_read_config_dword(pdev, 0x80, &control5); | |
71 | if (control5 & (1<<24)) | |
72 | port_map[0] = PORT_PATA1; | |
73 | ||
74 | /* The two ports may then be logically swapped by the firmware */ | |
75 | if (control & (1 << 22)) | |
76 | port = port ^ 1; | |
77 | ||
78 | /* | |
79 | * Now we know which physical port we are talking about we can | |
80 | * actually do our cable checking etc. Thankfully we don't need | |
81 | * to do the plumbing for other cases. | |
82 | */ | |
83 | switch (port_map[port]) | |
84 | { | |
85 | case PORT_PATA0: | |
86 | if (control & (1 << 5)) | |
87 | return 0; | |
88 | if (control & (1 << 3)) /* 40/80 pin primary */ | |
89 | ap->cbl = ATA_CBL_PATA40; | |
90 | else | |
91 | ap->cbl = ATA_CBL_PATA80; | |
92 | break; | |
93 | case PORT_PATA1: | |
94 | /* Bit 21 is set if the port is enabled */ | |
95 | if ((control5 & (1 << 21)) == 0) | |
96 | return 0; | |
97 | if (control5 & (1 << 19)) /* 40/80 pin secondary */ | |
98 | ap->cbl = ATA_CBL_PATA40; | |
99 | else | |
100 | ap->cbl = ATA_CBL_PATA80; | |
101 | break; | |
102 | case PORT_SATA: | |
103 | ap->cbl = ATA_CBL_SATA; | |
104 | break; | |
105 | } | |
cc0680a5 | 106 | return ata_std_prereset(link, deadline); |
669a5db4 JG |
107 | } |
108 | ||
109 | /** | |
110 | * jmicron_error_handler - Setup and error handler | |
111 | * @ap: Port to handle | |
112 | * | |
113 | * LOCKING: | |
114 | * None (inherited from caller). | |
115 | */ | |
116 | ||
117 | static void jmicron_error_handler(struct ata_port *ap) | |
118 | { | |
119 | return ata_bmdma_drive_eh(ap, jmicron_pre_reset, ata_std_softreset, NULL, ata_std_postreset); | |
120 | } | |
121 | ||
122 | /* No PIO or DMA methods needed for this device */ | |
123 | ||
124 | static struct scsi_host_template jmicron_sht = { | |
125 | .module = THIS_MODULE, | |
126 | .name = DRV_NAME, | |
127 | .ioctl = ata_scsi_ioctl, | |
128 | .queuecommand = ata_scsi_queuecmd, | |
129 | .can_queue = ATA_DEF_QUEUE, | |
130 | .this_id = ATA_SHT_THIS_ID, | |
131 | .sg_tablesize = LIBATA_MAX_PRD, | |
669a5db4 JG |
132 | .cmd_per_lun = ATA_SHT_CMD_PER_LUN, |
133 | .emulated = ATA_SHT_EMULATED, | |
134 | .use_clustering = ATA_SHT_USE_CLUSTERING, | |
135 | .proc_name = DRV_NAME, | |
136 | .dma_boundary = ATA_DMA_BOUNDARY, | |
137 | .slave_configure = ata_scsi_slave_config, | |
afdfe899 | 138 | .slave_destroy = ata_scsi_slave_destroy, |
669a5db4 JG |
139 | /* Use standard CHS mapping rules */ |
140 | .bios_param = ata_std_bios_param, | |
141 | }; | |
142 | ||
143 | static const struct ata_port_operations jmicron_ops = { | |
669a5db4 JG |
144 | /* Task file is PCI ATA format, use helpers */ |
145 | .tf_load = ata_tf_load, | |
146 | .tf_read = ata_tf_read, | |
147 | .check_status = ata_check_status, | |
148 | .exec_command = ata_exec_command, | |
149 | .dev_select = ata_std_dev_select, | |
150 | ||
151 | .freeze = ata_bmdma_freeze, | |
152 | .thaw = ata_bmdma_thaw, | |
153 | .error_handler = jmicron_error_handler, | |
154 | .post_internal_cmd = ata_bmdma_post_internal_cmd, | |
155 | ||
156 | /* BMDMA handling is PCI ATA format, use helpers */ | |
157 | .bmdma_setup = ata_bmdma_setup, | |
158 | .bmdma_start = ata_bmdma_start, | |
159 | .bmdma_stop = ata_bmdma_stop, | |
160 | .bmdma_status = ata_bmdma_status, | |
161 | .qc_prep = ata_qc_prep, | |
162 | .qc_issue = ata_qc_issue_prot, | |
0d5ff566 | 163 | .data_xfer = ata_data_xfer, |
669a5db4 | 164 | |
bda30288 | 165 | /* IRQ-related hooks */ |
669a5db4 JG |
166 | .irq_handler = ata_interrupt, |
167 | .irq_clear = ata_bmdma_irq_clear, | |
246ce3b6 | 168 | .irq_on = ata_irq_on, |
669a5db4 JG |
169 | |
170 | /* Generic PATA PCI ATA helpers */ | |
171 | .port_start = ata_port_start, | |
669a5db4 JG |
172 | }; |
173 | ||
174 | ||
175 | /** | |
176 | * jmicron_init_one - Register Jmicron ATA PCI device with kernel services | |
177 | * @pdev: PCI device to register | |
178 | * @ent: Entry in jmicron_pci_tbl matching with @pdev | |
179 | * | |
180 | * Called from kernel PCI layer. | |
181 | * | |
182 | * LOCKING: | |
183 | * Inherited from PCI layer (may sleep). | |
184 | * | |
185 | * RETURNS: | |
186 | * Zero on success, or -ERRNO value. | |
187 | */ | |
188 | ||
189 | static int jmicron_init_one (struct pci_dev *pdev, const struct pci_device_id *id) | |
190 | { | |
1626aeb8 | 191 | static const struct ata_port_info info = { |
669a5db4 | 192 | .sht = &jmicron_sht, |
1d2808fd | 193 | .flags = ATA_FLAG_SLAVE_POSS, |
669a5db4 JG |
194 | |
195 | .pio_mask = 0x1f, | |
196 | .mwdma_mask = 0x07, | |
bf6263a8 | 197 | .udma_mask = ATA_UDMA5, |
669a5db4 JG |
198 | |
199 | .port_ops = &jmicron_ops, | |
200 | }; | |
1626aeb8 | 201 | const struct ata_port_info *ppi[] = { &info, NULL }; |
669a5db4 | 202 | |
1626aeb8 | 203 | return ata_pci_init_one(pdev, ppi); |
669a5db4 JG |
204 | } |
205 | ||
206 | static const struct pci_device_id jmicron_pci_tbl[] = { | |
e34bb370 TH |
207 | { PCI_VENDOR_ID_JMICRON, PCI_DEVICE_ID_JMICRON_JMB361, |
208 | PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_STORAGE_IDE << 8, 0xffff00, 361 }, | |
209 | { PCI_VENDOR_ID_JMICRON, PCI_DEVICE_ID_JMICRON_JMB363, | |
210 | PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_STORAGE_IDE << 8, 0xffff00, 363 }, | |
211 | { PCI_VENDOR_ID_JMICRON, PCI_DEVICE_ID_JMICRON_JMB365, | |
212 | PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_STORAGE_IDE << 8, 0xffff00, 365 }, | |
213 | { PCI_VENDOR_ID_JMICRON, PCI_DEVICE_ID_JMICRON_JMB366, | |
214 | PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_STORAGE_IDE << 8, 0xffff00, 366 }, | |
215 | { PCI_VENDOR_ID_JMICRON, PCI_DEVICE_ID_JMICRON_JMB368, | |
216 | PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_STORAGE_IDE << 8, 0xffff00, 368 }, | |
2d2744fc | 217 | |
669a5db4 JG |
218 | { } /* terminate list */ |
219 | }; | |
220 | ||
221 | static struct pci_driver jmicron_pci_driver = { | |
222 | .name = DRV_NAME, | |
223 | .id_table = jmicron_pci_tbl, | |
224 | .probe = jmicron_init_one, | |
225 | .remove = ata_pci_remove_one, | |
438ac6d5 | 226 | #ifdef CONFIG_PM |
d39ca896 | 227 | .suspend = ata_pci_device_suspend, |
960627b7 | 228 | .resume = ata_pci_device_resume, |
438ac6d5 | 229 | #endif |
669a5db4 JG |
230 | }; |
231 | ||
232 | static int __init jmicron_init(void) | |
233 | { | |
234 | return pci_register_driver(&jmicron_pci_driver); | |
235 | } | |
236 | ||
237 | static void __exit jmicron_exit(void) | |
238 | { | |
239 | pci_unregister_driver(&jmicron_pci_driver); | |
240 | } | |
241 | ||
242 | module_init(jmicron_init); | |
243 | module_exit(jmicron_exit); | |
244 | ||
245 | MODULE_AUTHOR("Alan Cox"); | |
246 | MODULE_DESCRIPTION("SCSI low-level driver for Jmicron PATA ports"); | |
247 | MODULE_LICENSE("GPL"); | |
248 | MODULE_DEVICE_TABLE(pci, jmicron_pci_tbl); | |
249 | MODULE_VERSION(DRV_VERSION); | |
250 |