[mirror_ubuntu-artful-kernel.git] / drivers / ata / pata_qdi.c

/*
 *    pata_qdi.c - QDI VLB ATA controllers
 *	(C) 2006 Red Hat <alan@redhat.com>
 *
 * This driver mostly exists as a proof of concept for non PCI devices under
 * libata. While the QDI6580 was 'neat' in 1993 it is no longer terribly
 * useful.
 *
 * Tuning code written from the documentation at
 * http://www.ryston.cz/petr/vlb/qd6500.html
 * http://www.ryston.cz/petr/vlb/qd6580.html
 *
 * Probe code based on drivers/ide/legacy/qd65xx.c
 * Rewritten from the work of Colten Edwards <pje120@cs.usask.ca> by
 * Samuel Thibault <samuel.thibault@fnac.net>
 */

#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/pci.h>
#include <linux/init.h>
#include <linux/blkdev.h>
#include <linux/delay.h>
#include <scsi/scsi_host.h>
#include <linux/libata.h>
#include <linux/platform_device.h>

#define DRV_NAME "pata_qdi"
#define DRV_VERSION "0.2.4"

#define NR_HOST 4	/* Two 6580s */

struct qdi_data {
	unsigned long timing;
	u8 clock[2];
	u8 last;
	int fast;
	struct platform_device *platform_dev;

};

static struct ata_host *qdi_host[NR_HOST];
static struct qdi_data qdi_data[NR_HOST];
static int nr_qdi_host;

#ifdef MODULE
static int probe_qdi = 1;
#else
static int probe_qdi;
#endif

static void qdi6500_set_piomode(struct ata_port *ap, struct ata_device *adev)
{
	struct ata_timing t;
	struct qdi_data *qdi = ap->host->private_data;
	int active, recovery;
	u8 timing;

	/* Get the timing data in cycles */
	ata_timing_compute(adev, adev->pio_mode, &t, 30303, 1000);

	if (qdi->fast) {
		active = 8 - FIT(t.active, 1, 8);
		recovery = 18 - FIT(t.recover, 3, 18);
	} else {
		active = 9 - FIT(t.active, 2, 9);
		recovery = 15 - FIT(t.recover, 0, 15);
	}
	timing = (recovery << 4) | active | 0x08;

	qdi->clock[adev->devno] = timing;

	outb(timing, qdi->timing);
}

static void qdi6580_set_piomode(struct ata_port *ap, struct ata_device *adev)
{
	struct ata_timing t;
	struct qdi_data *qdi = ap->host->private_data;
	int active, recovery;
	u8 timing;

	/* Get the timing data in cycles */
	ata_timing_compute(adev, adev->pio_mode, &t, 30303, 1000);

	if (qdi->fast) {
		active = 8 - FIT(t.active, 1, 8);
		recovery = 18 - FIT(t.recover, 3, 18);
	} else {
		active = 9 - FIT(t.active, 2, 9);
		recovery = 15 - FIT(t.recover, 0, 15);
	}
	timing = (recovery << 4) | active | 0x08;

	qdi->clock[adev->devno] = timing;

	outb(timing, qdi->timing);

	/* Clear the FIFO */
	if (adev->class != ATA_DEV_ATA)
		outb(0x5F, (qdi->timing & 0xFFF0) + 3);
}

/**
 *	qdi_qc_issue_prot	-	command issue
 *	@qc: command pending
 *
 *	Called when the libata layer is about to issue a command. We wrap
 *	this interface so that we can load the correct ATA timings.
 */

static unsigned int qdi_qc_issue_prot(struct ata_queued_cmd *qc)
{
	struct ata_port *ap = qc->ap;
	struct ata_device *adev = qc->dev;
	struct qdi_data *qdi = ap->host->private_data;

	if (qdi->clock[adev->devno] != qdi->last) {
		if (adev->pio_mode) {
			qdi->last = qdi->clock[adev->devno];
			outb(qdi->clock[adev->devno], qdi->timing);
		}
	}
	return ata_qc_issue_prot(qc);
}

static void qdi_data_xfer(struct ata_device *adev, unsigned char *buf, unsigned int buflen, int write_data)
{
	struct ata_port *ap = adev->ap;
	int slop = buflen & 3;

	if (ata_id_has_dword_io(adev->id)) {
		if (write_data)
			outsl(ap->ioaddr.data_addr, buf, buflen >> 2);
		else
			insl(ap->ioaddr.data_addr, buf, buflen >> 2);

		if (unlikely(slop)) {
			u32 pad;
			if (write_data) {
				memcpy(&pad, buf + buflen - slop, slop);
				outl(le32_to_cpu(pad), ap->ioaddr.data_addr);
			} else {
				pad = cpu_to_le32(inl(ap->ioaddr.data_addr));
				memcpy(buf + buflen - slop, &pad, slop);
			}
		}
	} else
		ata_pio_data_xfer(adev, buf, buflen, write_data);
}

static struct scsi_host_template qdi_sht = {
	.module			= THIS_MODULE,
	.name			= DRV_NAME,
	.ioctl			= ata_scsi_ioctl,
	.queuecommand		= ata_scsi_queuecmd,
	.can_queue		= ATA_DEF_QUEUE,
	.this_id		= ATA_SHT_THIS_ID,
	.sg_tablesize		= LIBATA_MAX_PRD,
	.cmd_per_lun		= ATA_SHT_CMD_PER_LUN,
	.emulated		= ATA_SHT_EMULATED,
	.use_clustering		= ATA_SHT_USE_CLUSTERING,
	.proc_name		= DRV_NAME,
	.dma_boundary		= ATA_DMA_BOUNDARY,
	.slave_configure	= ata_scsi_slave_config,
	.slave_destroy		= ata_scsi_slave_destroy,
	.bios_param		= ata_std_bios_param,
};

static struct ata_port_operations qdi6500_port_ops = {
	.port_disable	= ata_port_disable,
	.set_piomode	= qdi6500_set_piomode,

	.tf_load	= ata_tf_load,
	.tf_read	= ata_tf_read,
	.check_status 	= ata_check_status,
	.exec_command	= ata_exec_command,
	.dev_select 	= ata_std_dev_select,

	.freeze		= ata_bmdma_freeze,
	.thaw		= ata_bmdma_thaw,
	.error_handler	= ata_bmdma_error_handler,
	.post_internal_cmd = ata_bmdma_post_internal_cmd,

	.qc_prep 	= ata_qc_prep,
	.qc_issue	= qdi_qc_issue_prot,

	.data_xfer	= qdi_data_xfer,

	.irq_handler	= ata_interrupt,
	.irq_clear	= ata_bmdma_irq_clear,

	.port_start	= ata_port_start,
};

static struct ata_port_operations qdi6580_port_ops = {
	.port_disable	= ata_port_disable,
	.set_piomode	= qdi6580_set_piomode,

	.tf_load	= ata_tf_load,
	.tf_read	= ata_tf_read,
	.check_status 	= ata_check_status,
	.exec_command	= ata_exec_command,
	.dev_select 	= ata_std_dev_select,

	.freeze		= ata_bmdma_freeze,
	.thaw		= ata_bmdma_thaw,
	.error_handler	= ata_bmdma_error_handler,
	.post_internal_cmd = ata_bmdma_post_internal_cmd,

	.qc_prep 	= ata_qc_prep,
	.qc_issue	= qdi_qc_issue_prot,

	.data_xfer	= qdi_data_xfer,

	.irq_handler	= ata_interrupt,
	.irq_clear	= ata_bmdma_irq_clear,

	.port_start	= ata_port_start,
};

/**
 *	qdi_init_one		-	attach a qdi interface
 *	@type: Type to display
 *	@io: I/O port start
 *	@irq: interrupt line
 *	@fast: True if on a > 33Mhz VLB
 *
 *	Register an ISA bus IDE interface. Such interfaces are PIO and we
 *	assume do not support IRQ sharing.
 */

static __init int qdi_init_one(unsigned long port, int type, unsigned long io, int irq, int fast)
{
	struct ata_probe_ent ae;
	struct platform_device *pdev;
	int ret;

	unsigned long ctrl = io + 0x206;

	/*
	 *	Fill in a probe structure first of all
	 */

	pdev = platform_device_register_simple(DRV_NAME, nr_qdi_host, NULL, 0);
	if (IS_ERR(pdev))
		return PTR_ERR(pdev);

	memset(&ae, 0, sizeof(struct ata_probe_ent));
	INIT_LIST_HEAD(&ae.node);
	ae.dev = &pdev->dev;

	if (type == 6580) {
		ae.port_ops = &qdi6580_port_ops;
		ae.pio_mask = 0x1F;
	} else {
		ae.port_ops = &qdi6500_port_ops;
		ae.pio_mask = 0x07;	/* Actually PIO3 !IORDY is possible */
	}

	ae.sht = &qdi_sht;
	ae.n_ports = 1;
	ae.irq = irq;
	ae.irq_flags = 0;
	ae.port_flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST;
	ae.port[0].cmd_addr = io;
	ae.port[0].altstatus_addr = ctrl;
	ae.port[0].ctl_addr =	ctrl;
	ata_std_ports(&ae.port[0]);

	/*
	 *	Hook in a private data structure per channel
	 */
	ae.private_data = &qdi_data[nr_qdi_host];

	qdi_data[nr_qdi_host].timing = port;
	qdi_data[nr_qdi_host].fast = fast;
	qdi_data[nr_qdi_host].platform_dev = pdev;

	printk(KERN_INFO DRV_NAME": qd%d at 0x%lx.\n", type, io);
	ret = ata_device_add(&ae);
	if (ret == 0) {
		platform_device_unregister(pdev);
		return -ENODEV;
	}

	qdi_host[nr_qdi_host++] = dev_get_drvdata(&pdev->dev);
	return 0;
}

/**
 *	qdi_init		-	attach qdi interfaces
 *
 *	Attach qdi IDE interfaces by scanning the ports it may occupy.
 */

static __init int qdi_init(void)
{
	unsigned long flags;
	static const unsigned long qd_port[2] = { 0x30, 0xB0 };
	static const unsigned long ide_port[2] = { 0x170, 0x1F0 };
	static const int ide_irq[2] = { 14, 15 };

	int ct = 0;
	int i;

	if (probe_qdi == 0)
		return -ENODEV;

	/*
 	 *	Check each possible QD65xx base address
	 */

	for (i = 0; i < 2; i++) {
		unsigned long port = qd_port[i];
		u8 r, res;


		if (request_region(port, 2, "pata_qdi")) {
			/* Check for a card */
			local_irq_save(flags);
			r = inb_p(port);
			outb_p(0x19, port);
			res = inb_p(port);
			outb_p(r, port);
			local_irq_restore(flags);

			/* Fail */
			if (res == 0x19)
			{
				release_region(port, 2);
				continue;
			}

			/* Passes the presence test */
			r = inb_p(port + 1);	/* Check port agrees with port set */
			if ((r & 2) >> 1 != i) {
				release_region(port, 2);
				continue;
			}

			/* Check card type */
			if ((r & 0xF0) == 0xC0) {
				/* QD6500: single channel */
				if (r & 8) {
					/* Disabled ? */
					release_region(port, 2);
					continue;
				}
				ct += qdi_init_one(port, 6500, ide_port[r & 0x01], ide_irq[r & 0x01], r & 0x04);
			}
			if (((r & 0xF0) == 0xA0) || (r & 0xF0) == 0x50) {
				/* QD6580: dual channel */
				if (!request_region(port + 2 , 2, "pata_qdi"))
				{
					release_region(port, 2);
					continue;
				}
				res = inb(port + 3);
				if (res & 1) {
					/* Single channel mode */
					ct += qdi_init_one(port, 6580, ide_port[r & 0x01], ide_irq[r & 0x01], r & 0x04);
				} else {
					/* Dual channel mode */
					ct += qdi_init_one(port, 6580, 0x1F0, 14, r & 0x04);
					ct += qdi_init_one(port + 2, 6580, 0x170, 15, r & 0x04);
				}
			}
		}
	}
	if (ct != 0)
		return 0;
	return -ENODEV;
}

static __exit void qdi_exit(void)
{
	int i;

	for (i = 0; i < nr_qdi_host; i++) {
		ata_host_detach(qdi_host[i]);
		/* Free the control resource. The 6580 dual channel has the resources
		 * claimed as a pair of 2 byte resources so we need no special cases...
		 */
		release_region(qdi_data[i].timing, 2);
		platform_device_unregister(qdi_data[i].platform_dev);
	}
}

MODULE_AUTHOR("Alan Cox");
MODULE_DESCRIPTION("low-level driver for qdi ATA");
MODULE_LICENSE("GPL");
MODULE_VERSION(DRV_VERSION);

module_init(qdi_init);
module_exit(qdi_exit);

module_param(probe_qdi, int, 0);
Commit	Line	Data
669a5db4 JG	1	/*
	2	* pata_qdi.c - QDI VLB ATA controllers
	3	* (C) 2006 Red Hat <alan@redhat.com>
	4	*
	5	* This driver mostly exists as a proof of concept for non PCI devices under
	6	* libata. While the QDI6580 was 'neat' in 1993 it is no longer terribly
	7	* useful.
	8	*
	9	* Tuning code written from the documentation at
	10	* http://www.ryston.cz/petr/vlb/qd6500.html
	11	* http://www.ryston.cz/petr/vlb/qd6580.html
	12	*
	13	* Probe code based on drivers/ide/legacy/qd65xx.c
	14	* Rewritten from the work of Colten Edwards <pje120@cs.usask.ca> by
	15	* Samuel Thibault <samuel.thibault@fnac.net>
	16	*/
	17
	18	#include <linux/kernel.h>
	19	#include <linux/module.h>
	20	#include <linux/pci.h>
	21	#include <linux/init.h>
	22	#include <linux/blkdev.h>
	23	#include <linux/delay.h>
	24	#include <scsi/scsi_host.h>
	25	#include <linux/libata.h>
	26	#include <linux/platform_device.h>
	27
	28	#define DRV_NAME "pata_qdi"
	29	#define DRV_VERSION "0.2.4"
	30
	31	#define NR_HOST 4 /* Two 6580s */
	32
	33	struct qdi_data {
	34	unsigned long timing;
	35	u8 clock[2];
	36	u8 last;
	37	int fast;
	38	struct platform_device *platform_dev;
85cd7251	39
669a5db4 JG	40	};
	41
	42	static struct ata_host *qdi_host[NR_HOST];
	43	static struct qdi_data qdi_data[NR_HOST];
	44	static int nr_qdi_host;
	45
	46	#ifdef MODULE
	47	static int probe_qdi = 1;
	48	#else
	49	static int probe_qdi;
	50	#endif
	51
	52	static void qdi6500_set_piomode(struct ata_port ap, struct ata_device adev)
	53	{
	54	struct ata_timing t;
	55	struct qdi_data *qdi = ap->host->private_data;
	56	int active, recovery;
	57	u8 timing;
	58
	59	/* Get the timing data in cycles */
	60	ata_timing_compute(adev, adev->pio_mode, &t, 30303, 1000);
85cd7251	61
669a5db4 JG	62	if (qdi->fast) {
	63	active = 8 - FIT(t.active, 1, 8);
	64	recovery = 18 - FIT(t.recover, 3, 18);
	65	} else {
	66	active = 9 - FIT(t.active, 2, 9);
	67	recovery = 15 - FIT(t.recover, 0, 15);
	68	}
	69	timing = (recovery << 4) \| active \| 0x08;
85cd7251	70
669a5db4 JG	71	qdi->clock[adev->devno] = timing;
669a5db4 JG	72
85cd7251	73	outb(timing, qdi->timing);
669a5db4 JG	74	}
	75
	76	static void qdi6580_set_piomode(struct ata_port ap, struct ata_device adev)
	77	{
	78	struct ata_timing t;
	79	struct qdi_data *qdi = ap->host->private_data;
	80	int active, recovery;
	81	u8 timing;
	82
	83	/* Get the timing data in cycles */
	84	ata_timing_compute(adev, adev->pio_mode, &t, 30303, 1000);
85cd7251	85
669a5db4 JG	86	if (qdi->fast) {
	87	active = 8 - FIT(t.active, 1, 8);
	88	recovery = 18 - FIT(t.recover, 3, 18);
	89	} else {
	90	active = 9 - FIT(t.active, 2, 9);
	91	recovery = 15 - FIT(t.recover, 0, 15);
	92	}
	93	timing = (recovery << 4) \| active \| 0x08;
85cd7251	94
669a5db4 JG	95	qdi->clock[adev->devno] = timing;
	96
	97	outb(timing, qdi->timing);
85cd7251	98
669a5db4 JG	99	/* Clear the FIFO */
	100	if (adev->class != ATA_DEV_ATA)
	101	outb(0x5F, (qdi->timing & 0xFFF0) + 3);
	102	}
	103
	104	/**
	105	* qdi_qc_issue_prot - command issue
	106	* @qc: command pending
	107	*
	108	* Called when the libata layer is about to issue a command. We wrap
	109	* this interface so that we can load the correct ATA timings.
	110	*/
	111
	112	static unsigned int qdi_qc_issue_prot(struct ata_queued_cmd *qc)
	113	{
	114	struct ata_port *ap = qc->ap;
	115	struct ata_device *adev = qc->dev;
	116	struct qdi_data *qdi = ap->host->private_data;
	117
	118	if (qdi->clock[adev->devno] != qdi->last) {
	119	if (adev->pio_mode) {
	120	qdi->last = qdi->clock[adev->devno];
	121	outb(qdi->clock[adev->devno], qdi->timing);
	122	}
	123	}
	124	return ata_qc_issue_prot(qc);
	125	}
	126
	127	static void qdi_data_xfer(struct ata_device adev, unsigned char buf, unsigned int buflen, int write_data)
	128	{
	129	struct ata_port *ap = adev->ap;
	130	int slop = buflen & 3;
85cd7251	131
669a5db4 JG	132	if (ata_id_has_dword_io(adev->id)) {
	133	if (write_data)
	134	outsl(ap->ioaddr.data_addr, buf, buflen >> 2);
	135	else
	136	insl(ap->ioaddr.data_addr, buf, buflen >> 2);
85cd7251	137
669a5db4 JG	138	if (unlikely(slop)) {
	139	u32 pad;
	140	if (write_data) {
	141	memcpy(&pad, buf + buflen - slop, slop);
	142	outl(le32_to_cpu(pad), ap->ioaddr.data_addr);
	143	} else {
53e36ada	144	pad = cpu_to_le32(inl(ap->ioaddr.data_addr));
669a5db4 JG	145	memcpy(buf + buflen - slop, &pad, slop);
	146	}
	147	}
	148	} else
	149	ata_pio_data_xfer(adev, buf, buflen, write_data);
	150	}
	151
	152	static struct scsi_host_template qdi_sht = {
	153	.module = THIS_MODULE,
	154	.name = DRV_NAME,
	155	.ioctl = ata_scsi_ioctl,
	156	.queuecommand = ata_scsi_queuecmd,
	157	.can_queue = ATA_DEF_QUEUE,
	158	.this_id = ATA_SHT_THIS_ID,
	159	.sg_tablesize = LIBATA_MAX_PRD,
669a5db4 JG	160	.cmd_per_lun = ATA_SHT_CMD_PER_LUN,
	161	.emulated = ATA_SHT_EMULATED,
	162	.use_clustering = ATA_SHT_USE_CLUSTERING,
	163	.proc_name = DRV_NAME,
	164	.dma_boundary = ATA_DMA_BOUNDARY,
	165	.slave_configure = ata_scsi_slave_config,
afdfe899	166	.slave_destroy = ata_scsi_slave_destroy,
669a5db4 JG	167	.bios_param = ata_std_bios_param,
	168	};
	169
	170	static struct ata_port_operations qdi6500_port_ops = {
	171	.port_disable = ata_port_disable,
	172	.set_piomode = qdi6500_set_piomode,
	173
	174	.tf_load = ata_tf_load,
	175	.tf_read = ata_tf_read,
	176	.check_status = ata_check_status,
	177	.exec_command = ata_exec_command,
	178	.dev_select = ata_std_dev_select,
	179
	180	.freeze = ata_bmdma_freeze,
	181	.thaw = ata_bmdma_thaw,
	182	.error_handler = ata_bmdma_error_handler,
	183	.post_internal_cmd = ata_bmdma_post_internal_cmd,
85cd7251	184
669a5db4 JG	185	.qc_prep = ata_qc_prep,
669a5db4 JG	186	.qc_issue = qdi_qc_issue_prot,
bda30288	187
669a5db4 JG	188	.data_xfer = qdi_data_xfer,
	189
	190	.irq_handler = ata_interrupt,
	191	.irq_clear = ata_bmdma_irq_clear,
85cd7251	192
669a5db4	193	.port_start = ata_port_start,
85cd7251	194	};
669a5db4 JG	195
	196	static struct ata_port_operations qdi6580_port_ops = {
	197	.port_disable = ata_port_disable,
	198	.set_piomode = qdi6580_set_piomode,
	199
	200	.tf_load = ata_tf_load,
	201	.tf_read = ata_tf_read,
	202	.check_status = ata_check_status,
	203	.exec_command = ata_exec_command,
	204	.dev_select = ata_std_dev_select,
	205
	206	.freeze = ata_bmdma_freeze,
	207	.thaw = ata_bmdma_thaw,
	208	.error_handler = ata_bmdma_error_handler,
	209	.post_internal_cmd = ata_bmdma_post_internal_cmd,
85cd7251	210
669a5db4 JG	211	.qc_prep = ata_qc_prep,
669a5db4 JG	212	.qc_issue = qdi_qc_issue_prot,
bda30288	213
669a5db4 JG	214	.data_xfer = qdi_data_xfer,
	215
	216	.irq_handler = ata_interrupt,
	217	.irq_clear = ata_bmdma_irq_clear,
85cd7251	218
669a5db4	219	.port_start = ata_port_start,
85cd7251	220	};
669a5db4 JG	221
	222	/**
	223	* qdi_init_one - attach a qdi interface
	224	* @type: Type to display
	225	* @io: I/O port start
	226	* @irq: interrupt line
	227	* @fast: True if on a > 33Mhz VLB
	228	*
	229	* Register an ISA bus IDE interface. Such interfaces are PIO and we
	230	* assume do not support IRQ sharing.
	231	*/
85cd7251	232
669a5db4 JG	233	static __init int qdi_init_one(unsigned long port, int type, unsigned long io, int irq, int fast)
	234	{
	235	struct ata_probe_ent ae;
	236	struct platform_device *pdev;
	237	int ret;
	238
	239	unsigned long ctrl = io + 0x206;
	240
	241	/*
	242	* Fill in a probe structure first of all
	243	*/
	244
	245	pdev = platform_device_register_simple(DRV_NAME, nr_qdi_host, NULL, 0);
9825d73c AM	246	if (IS_ERR(pdev))
9825d73c AM	247	return PTR_ERR(pdev);
85cd7251	248
669a5db4 JG	249	memset(&ae, 0, sizeof(struct ata_probe_ent));
	250	INIT_LIST_HEAD(&ae.node);
	251	ae.dev = &pdev->dev;
85cd7251	252
669a5db4 JG	253	if (type == 6580) {
	254	ae.port_ops = &qdi6580_port_ops;
	255	ae.pio_mask = 0x1F;
	256	} else {
	257	ae.port_ops = &qdi6500_port_ops;
	258	ae.pio_mask = 0x07; /* Actually PIO3 !IORDY is possible */
	259	}
85cd7251	260
669a5db4 JG	261	ae.sht = &qdi_sht;
	262	ae.n_ports = 1;
	263	ae.irq = irq;
	264	ae.irq_flags = 0;
	265	ae.port_flags = ATA_FLAG_SLAVE_POSS \| ATA_FLAG_SRST;
	266	ae.port[0].cmd_addr = io;
	267	ae.port[0].altstatus_addr = ctrl;
	268	ae.port[0].ctl_addr = ctrl;
	269	ata_std_ports(&ae.port[0]);
	270
	271	/*
	272	* Hook in a private data structure per channel
	273	*/
	274	ae.private_data = &qdi_data[nr_qdi_host];
	275
	276	qdi_data[nr_qdi_host].timing = port;
	277	qdi_data[nr_qdi_host].fast = fast;
	278	qdi_data[nr_qdi_host].platform_dev = pdev;
	279
	280	printk(KERN_INFO DRV_NAME": qd%d at 0x%lx.\n", type, io);
	281	ret = ata_device_add(&ae);
	282	if (ret == 0) {
	283	platform_device_unregister(pdev);
	284	return -ENODEV;
	285	}
85cd7251	286
669a5db4	287	qdi_host[nr_qdi_host++] = dev_get_drvdata(&pdev->dev);
85cd7251	288	return 0;
669a5db4 JG	289	}
	290
	291	/**
	292	* qdi_init - attach qdi interfaces
	293	*
	294	* Attach qdi IDE interfaces by scanning the ports it may occupy.
	295	*/
85cd7251	296
669a5db4 JG	297	static __init int qdi_init(void)
	298	{
	299	unsigned long flags;
	300	static const unsigned long qd_port[2] = { 0x30, 0xB0 };
	301	static const unsigned long ide_port[2] = { 0x170, 0x1F0 };
	302	static const int ide_irq[2] = { 14, 15 };
85cd7251	303
669a5db4 JG	304	int ct = 0;
669a5db4 JG	305	int i;
85cd7251	306
669a5db4 JG	307	if (probe_qdi == 0)
669a5db4 JG	308	return -ENODEV;
85cd7251	309
669a5db4 JG	310	/*
	311	* Check each possible QD65xx base address
	312	*/
85cd7251	313
669a5db4 JG	314	for (i = 0; i < 2; i++) {
	315	unsigned long port = qd_port[i];
	316	u8 r, res;
85cd7251 JG	317
85cd7251 JG	318
669a5db4 JG	319	if (request_region(port, 2, "pata_qdi")) {
	320	/* Check for a card */
	321	local_irq_save(flags);
	322	r = inb_p(port);
	323	outb_p(0x19, port);
	324	res = inb_p(port);
	325	outb_p(r, port);
	326	local_irq_restore(flags);
85cd7251	327
669a5db4 JG	328	/* Fail */
	329	if (res == 0x19)
	330	{
	331	release_region(port, 2);
	332	continue;
	333	}
85cd7251	334
669a5db4 JG	335	/* Passes the presence test */
	336	r = inb_p(port + 1); /* Check port agrees with port set */
	337	if ((r & 2) >> 1 != i) {
	338	release_region(port, 2);
	339	continue;
	340	}
	341
85cd7251	342	/* Check card type */
669a5db4 JG	343	if ((r & 0xF0) == 0xC0) {
	344	/* QD6500: single channel */
	345	if (r & 8) {
	346	/* Disabled ? */
	347	release_region(port, 2);
	348	continue;
	349	}
	350	ct += qdi_init_one(port, 6500, ide_port[r & 0x01], ide_irq[r & 0x01], r & 0x04);
	351	}
	352	if (((r & 0xF0) == 0xA0) \|\| (r & 0xF0) == 0x50) {
	353	/* QD6580: dual channel */
	354	if (!request_region(port + 2 , 2, "pata_qdi"))
	355	{
	356	release_region(port, 2);
	357	continue;
	358	}
	359	res = inb(port + 3);
	360	if (res & 1) {
	361	/* Single channel mode */
	362	ct += qdi_init_one(port, 6580, ide_port[r & 0x01], ide_irq[r & 0x01], r & 0x04);
	363	} else {
	364	/* Dual channel mode */
	365	ct += qdi_init_one(port, 6580, 0x1F0, 14, r & 0x04);
	366	ct += qdi_init_one(port + 2, 6580, 0x170, 15, r & 0x04);
	367	}
	368	}
	369	}
	370	}
	371	if (ct != 0)
	372	return 0;
	373	return -ENODEV;
	374	}
	375
	376	static __exit void qdi_exit(void)
	377	{
	378	int i;
	379
	380	for (i = 0; i < nr_qdi_host; i++) {
24dc5f33	381	ata_host_detach(qdi_host[i]);
669a5db4 JG	382	/* Free the control resource. The 6580 dual channel has the resources
	383	* claimed as a pair of 2 byte resources so we need no special cases...
	384	*/
	385	release_region(qdi_data[i].timing, 2);
	386	platform_device_unregister(qdi_data[i].platform_dev);
85cd7251	387	}
669a5db4 JG	388	}
	389
	390	MODULE_AUTHOR("Alan Cox");
	391	MODULE_DESCRIPTION("low-level driver for qdi ATA");
	392	MODULE_LICENSE("GPL");
	393	MODULE_VERSION(DRV_VERSION);
	394
	395	module_init(qdi_init);
	396	module_exit(qdi_exit);
	397
	398	module_param(probe_qdi, int, 0);
	399