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669a5db4 JG |
1 | /* |
2 | * pata_qdi.c - QDI VLB ATA controllers | |
3 | * (C) 2006 Red Hat <alan@redhat.com> | |
4 | * | |
5 | * This driver mostly exists as a proof of concept for non PCI devices under | |
6 | * libata. While the QDI6580 was 'neat' in 1993 it is no longer terribly | |
7 | * useful. | |
8 | * | |
9 | * Tuning code written from the documentation at | |
10 | * http://www.ryston.cz/petr/vlb/qd6500.html | |
11 | * http://www.ryston.cz/petr/vlb/qd6580.html | |
12 | * | |
13 | * Probe code based on drivers/ide/legacy/qd65xx.c | |
14 | * Rewritten from the work of Colten Edwards <pje120@cs.usask.ca> by | |
15 | * Samuel Thibault <samuel.thibault@fnac.net> | |
16 | */ | |
17 | ||
18 | #include <linux/kernel.h> | |
19 | #include <linux/module.h> | |
20 | #include <linux/pci.h> | |
21 | #include <linux/init.h> | |
22 | #include <linux/blkdev.h> | |
23 | #include <linux/delay.h> | |
24 | #include <scsi/scsi_host.h> | |
25 | #include <linux/libata.h> | |
26 | #include <linux/platform_device.h> | |
27 | ||
28 | #define DRV_NAME "pata_qdi" | |
8bc3fc47 | 29 | #define DRV_VERSION "0.3.1" |
669a5db4 JG |
30 | |
31 | #define NR_HOST 4 /* Two 6580s */ | |
32 | ||
33 | struct qdi_data { | |
34 | unsigned long timing; | |
35 | u8 clock[2]; | |
36 | u8 last; | |
37 | int fast; | |
38 | struct platform_device *platform_dev; | |
85cd7251 | 39 | |
669a5db4 JG |
40 | }; |
41 | ||
42 | static struct ata_host *qdi_host[NR_HOST]; | |
43 | static struct qdi_data qdi_data[NR_HOST]; | |
44 | static int nr_qdi_host; | |
45 | ||
46 | #ifdef MODULE | |
47 | static int probe_qdi = 1; | |
48 | #else | |
49 | static int probe_qdi; | |
50 | #endif | |
51 | ||
52 | static void qdi6500_set_piomode(struct ata_port *ap, struct ata_device *adev) | |
53 | { | |
54 | struct ata_timing t; | |
55 | struct qdi_data *qdi = ap->host->private_data; | |
56 | int active, recovery; | |
57 | u8 timing; | |
58 | ||
59 | /* Get the timing data in cycles */ | |
60 | ata_timing_compute(adev, adev->pio_mode, &t, 30303, 1000); | |
85cd7251 | 61 | |
669a5db4 JG |
62 | if (qdi->fast) { |
63 | active = 8 - FIT(t.active, 1, 8); | |
64 | recovery = 18 - FIT(t.recover, 3, 18); | |
65 | } else { | |
66 | active = 9 - FIT(t.active, 2, 9); | |
67 | recovery = 15 - FIT(t.recover, 0, 15); | |
68 | } | |
69 | timing = (recovery << 4) | active | 0x08; | |
85cd7251 | 70 | |
669a5db4 JG |
71 | qdi->clock[adev->devno] = timing; |
72 | ||
85cd7251 | 73 | outb(timing, qdi->timing); |
669a5db4 JG |
74 | } |
75 | ||
76 | static void qdi6580_set_piomode(struct ata_port *ap, struct ata_device *adev) | |
77 | { | |
78 | struct ata_timing t; | |
79 | struct qdi_data *qdi = ap->host->private_data; | |
80 | int active, recovery; | |
81 | u8 timing; | |
82 | ||
83 | /* Get the timing data in cycles */ | |
84 | ata_timing_compute(adev, adev->pio_mode, &t, 30303, 1000); | |
85cd7251 | 85 | |
669a5db4 JG |
86 | if (qdi->fast) { |
87 | active = 8 - FIT(t.active, 1, 8); | |
88 | recovery = 18 - FIT(t.recover, 3, 18); | |
89 | } else { | |
90 | active = 9 - FIT(t.active, 2, 9); | |
91 | recovery = 15 - FIT(t.recover, 0, 15); | |
92 | } | |
93 | timing = (recovery << 4) | active | 0x08; | |
85cd7251 | 94 | |
669a5db4 JG |
95 | qdi->clock[adev->devno] = timing; |
96 | ||
97 | outb(timing, qdi->timing); | |
85cd7251 | 98 | |
669a5db4 JG |
99 | /* Clear the FIFO */ |
100 | if (adev->class != ATA_DEV_ATA) | |
101 | outb(0x5F, (qdi->timing & 0xFFF0) + 3); | |
102 | } | |
103 | ||
104 | /** | |
105 | * qdi_qc_issue_prot - command issue | |
106 | * @qc: command pending | |
107 | * | |
108 | * Called when the libata layer is about to issue a command. We wrap | |
109 | * this interface so that we can load the correct ATA timings. | |
110 | */ | |
111 | ||
112 | static unsigned int qdi_qc_issue_prot(struct ata_queued_cmd *qc) | |
113 | { | |
114 | struct ata_port *ap = qc->ap; | |
115 | struct ata_device *adev = qc->dev; | |
116 | struct qdi_data *qdi = ap->host->private_data; | |
117 | ||
118 | if (qdi->clock[adev->devno] != qdi->last) { | |
119 | if (adev->pio_mode) { | |
120 | qdi->last = qdi->clock[adev->devno]; | |
121 | outb(qdi->clock[adev->devno], qdi->timing); | |
122 | } | |
123 | } | |
124 | return ata_qc_issue_prot(qc); | |
125 | } | |
126 | ||
55dba312 TH |
127 | static unsigned int qdi_data_xfer(struct ata_device *dev, unsigned char *buf, |
128 | unsigned int buflen, int rw) | |
669a5db4 | 129 | { |
55dba312 TH |
130 | if (ata_id_has_dword_io(dev->id)) { |
131 | struct ata_port *ap = dev->link->ap; | |
132 | int slop = buflen & 3; | |
85cd7251 | 133 | |
55dba312 | 134 | if (rw == READ) |
0d5ff566 | 135 | ioread32_rep(ap->ioaddr.data_addr, buf, buflen >> 2); |
55dba312 TH |
136 | else |
137 | iowrite32_rep(ap->ioaddr.data_addr, buf, buflen >> 2); | |
85cd7251 | 138 | |
669a5db4 | 139 | if (unlikely(slop)) { |
55dba312 TH |
140 | u32 pad; |
141 | if (rw == READ) { | |
b50e56d8 | 142 | pad = cpu_to_le32(ioread32(ap->ioaddr.data_addr)); |
669a5db4 | 143 | memcpy(buf + buflen - slop, &pad, slop); |
55dba312 TH |
144 | } else { |
145 | memcpy(&pad, buf + buflen - slop, slop); | |
146 | iowrite32(le32_to_cpu(pad), ap->ioaddr.data_addr); | |
669a5db4 | 147 | } |
55dba312 | 148 | buflen += 4 - slop; |
669a5db4 JG |
149 | } |
150 | } else | |
55dba312 TH |
151 | buflen = ata_data_xfer(dev, buf, buflen, rw); |
152 | ||
153 | return buflen; | |
669a5db4 JG |
154 | } |
155 | ||
156 | static struct scsi_host_template qdi_sht = { | |
68d1d07b | 157 | ATA_PIO_SHT(DRV_NAME), |
669a5db4 JG |
158 | }; |
159 | ||
160 | static struct ata_port_operations qdi6500_port_ops = { | |
669a5db4 JG |
161 | .set_piomode = qdi6500_set_piomode, |
162 | ||
163 | .tf_load = ata_tf_load, | |
164 | .tf_read = ata_tf_read, | |
165 | .check_status = ata_check_status, | |
166 | .exec_command = ata_exec_command, | |
167 | .dev_select = ata_std_dev_select, | |
168 | ||
169 | .freeze = ata_bmdma_freeze, | |
170 | .thaw = ata_bmdma_thaw, | |
171 | .error_handler = ata_bmdma_error_handler, | |
172 | .post_internal_cmd = ata_bmdma_post_internal_cmd, | |
3be40d76 | 173 | .cable_detect = ata_cable_40wire, |
85cd7251 | 174 | |
669a5db4 JG |
175 | .qc_prep = ata_qc_prep, |
176 | .qc_issue = qdi_qc_issue_prot, | |
bda30288 | 177 | |
669a5db4 JG |
178 | .data_xfer = qdi_data_xfer, |
179 | ||
358f9a77 | 180 | .irq_clear = ata_noop_irq_clear, |
246ce3b6 | 181 | .irq_on = ata_irq_on, |
85cd7251 | 182 | |
81ad1837 | 183 | .port_start = ata_sff_port_start, |
85cd7251 | 184 | }; |
669a5db4 JG |
185 | |
186 | static struct ata_port_operations qdi6580_port_ops = { | |
669a5db4 JG |
187 | .set_piomode = qdi6580_set_piomode, |
188 | ||
189 | .tf_load = ata_tf_load, | |
190 | .tf_read = ata_tf_read, | |
191 | .check_status = ata_check_status, | |
192 | .exec_command = ata_exec_command, | |
193 | .dev_select = ata_std_dev_select, | |
194 | ||
195 | .freeze = ata_bmdma_freeze, | |
196 | .thaw = ata_bmdma_thaw, | |
197 | .error_handler = ata_bmdma_error_handler, | |
198 | .post_internal_cmd = ata_bmdma_post_internal_cmd, | |
3be40d76 | 199 | .cable_detect = ata_cable_40wire, |
85cd7251 | 200 | |
669a5db4 JG |
201 | .qc_prep = ata_qc_prep, |
202 | .qc_issue = qdi_qc_issue_prot, | |
bda30288 | 203 | |
669a5db4 JG |
204 | .data_xfer = qdi_data_xfer, |
205 | ||
358f9a77 | 206 | .irq_clear = ata_noop_irq_clear, |
246ce3b6 | 207 | .irq_on = ata_irq_on, |
85cd7251 | 208 | |
81ad1837 | 209 | .port_start = ata_sff_port_start, |
85cd7251 | 210 | }; |
669a5db4 JG |
211 | |
212 | /** | |
213 | * qdi_init_one - attach a qdi interface | |
214 | * @type: Type to display | |
215 | * @io: I/O port start | |
216 | * @irq: interrupt line | |
217 | * @fast: True if on a > 33Mhz VLB | |
218 | * | |
219 | * Register an ISA bus IDE interface. Such interfaces are PIO and we | |
220 | * assume do not support IRQ sharing. | |
221 | */ | |
85cd7251 | 222 | |
669a5db4 JG |
223 | static __init int qdi_init_one(unsigned long port, int type, unsigned long io, int irq, int fast) |
224 | { | |
cbcdd875 | 225 | unsigned long ctl = io + 0x206; |
669a5db4 | 226 | struct platform_device *pdev; |
5d728824 TH |
227 | struct ata_host *host; |
228 | struct ata_port *ap; | |
0d5ff566 | 229 | void __iomem *io_addr, *ctl_addr; |
669a5db4 JG |
230 | int ret; |
231 | ||
669a5db4 JG |
232 | /* |
233 | * Fill in a probe structure first of all | |
234 | */ | |
235 | ||
236 | pdev = platform_device_register_simple(DRV_NAME, nr_qdi_host, NULL, 0); | |
9825d73c AM |
237 | if (IS_ERR(pdev)) |
238 | return PTR_ERR(pdev); | |
85cd7251 | 239 | |
0d5ff566 TH |
240 | ret = -ENOMEM; |
241 | io_addr = devm_ioport_map(&pdev->dev, io, 8); | |
cbcdd875 | 242 | ctl_addr = devm_ioport_map(&pdev->dev, ctl, 1); |
0d5ff566 TH |
243 | if (!io_addr || !ctl_addr) |
244 | goto fail; | |
245 | ||
5d728824 TH |
246 | ret = -ENOMEM; |
247 | host = ata_host_alloc(&pdev->dev, 1); | |
248 | if (!host) | |
249 | goto fail; | |
250 | ap = host->ports[0]; | |
85cd7251 | 251 | |
669a5db4 | 252 | if (type == 6580) { |
5d728824 TH |
253 | ap->ops = &qdi6580_port_ops; |
254 | ap->pio_mask = 0x1F; | |
255 | ap->flags |= ATA_FLAG_SLAVE_POSS; | |
669a5db4 | 256 | } else { |
5d728824 TH |
257 | ap->ops = &qdi6500_port_ops; |
258 | ap->pio_mask = 0x07; /* Actually PIO3 !IORDY is possible */ | |
259 | ap->flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_NO_IORDY; | |
669a5db4 | 260 | } |
85cd7251 | 261 | |
5d728824 TH |
262 | ap->ioaddr.cmd_addr = io_addr; |
263 | ap->ioaddr.altstatus_addr = ctl_addr; | |
264 | ap->ioaddr.ctl_addr = ctl_addr; | |
265 | ata_std_ports(&ap->ioaddr); | |
669a5db4 | 266 | |
cbcdd875 TH |
267 | ata_port_desc(ap, "cmd %lx ctl %lx", io, ctl); |
268 | ||
669a5db4 JG |
269 | /* |
270 | * Hook in a private data structure per channel | |
271 | */ | |
5d728824 | 272 | ap->private_data = &qdi_data[nr_qdi_host]; |
669a5db4 JG |
273 | |
274 | qdi_data[nr_qdi_host].timing = port; | |
275 | qdi_data[nr_qdi_host].fast = fast; | |
276 | qdi_data[nr_qdi_host].platform_dev = pdev; | |
277 | ||
278 | printk(KERN_INFO DRV_NAME": qd%d at 0x%lx.\n", type, io); | |
0d5ff566 | 279 | |
5d728824 TH |
280 | /* activate */ |
281 | ret = ata_host_activate(host, irq, ata_interrupt, 0, &qdi_sht); | |
282 | if (ret) | |
0d5ff566 | 283 | goto fail; |
85cd7251 | 284 | |
669a5db4 | 285 | qdi_host[nr_qdi_host++] = dev_get_drvdata(&pdev->dev); |
85cd7251 | 286 | return 0; |
0d5ff566 TH |
287 | |
288 | fail: | |
289 | platform_device_unregister(pdev); | |
290 | return ret; | |
669a5db4 JG |
291 | } |
292 | ||
293 | /** | |
294 | * qdi_init - attach qdi interfaces | |
295 | * | |
296 | * Attach qdi IDE interfaces by scanning the ports it may occupy. | |
297 | */ | |
85cd7251 | 298 | |
669a5db4 JG |
299 | static __init int qdi_init(void) |
300 | { | |
301 | unsigned long flags; | |
302 | static const unsigned long qd_port[2] = { 0x30, 0xB0 }; | |
303 | static const unsigned long ide_port[2] = { 0x170, 0x1F0 }; | |
304 | static const int ide_irq[2] = { 14, 15 }; | |
85cd7251 | 305 | |
669a5db4 JG |
306 | int ct = 0; |
307 | int i; | |
85cd7251 | 308 | |
669a5db4 JG |
309 | if (probe_qdi == 0) |
310 | return -ENODEV; | |
85cd7251 | 311 | |
669a5db4 JG |
312 | /* |
313 | * Check each possible QD65xx base address | |
314 | */ | |
85cd7251 | 315 | |
669a5db4 JG |
316 | for (i = 0; i < 2; i++) { |
317 | unsigned long port = qd_port[i]; | |
318 | u8 r, res; | |
85cd7251 JG |
319 | |
320 | ||
669a5db4 JG |
321 | if (request_region(port, 2, "pata_qdi")) { |
322 | /* Check for a card */ | |
323 | local_irq_save(flags); | |
324 | r = inb_p(port); | |
325 | outb_p(0x19, port); | |
326 | res = inb_p(port); | |
327 | outb_p(r, port); | |
328 | local_irq_restore(flags); | |
85cd7251 | 329 | |
669a5db4 JG |
330 | /* Fail */ |
331 | if (res == 0x19) | |
332 | { | |
333 | release_region(port, 2); | |
334 | continue; | |
335 | } | |
85cd7251 | 336 | |
669a5db4 JG |
337 | /* Passes the presence test */ |
338 | r = inb_p(port + 1); /* Check port agrees with port set */ | |
339 | if ((r & 2) >> 1 != i) { | |
340 | release_region(port, 2); | |
341 | continue; | |
342 | } | |
343 | ||
85cd7251 | 344 | /* Check card type */ |
669a5db4 JG |
345 | if ((r & 0xF0) == 0xC0) { |
346 | /* QD6500: single channel */ | |
347 | if (r & 8) { | |
348 | /* Disabled ? */ | |
349 | release_region(port, 2); | |
350 | continue; | |
351 | } | |
cc7c15ec AC |
352 | if (qdi_init_one(port, 6500, ide_port[r & 0x01], ide_irq[r & 0x01], r & 0x04) == 0) |
353 | ct++; | |
669a5db4 JG |
354 | } |
355 | if (((r & 0xF0) == 0xA0) || (r & 0xF0) == 0x50) { | |
356 | /* QD6580: dual channel */ | |
357 | if (!request_region(port + 2 , 2, "pata_qdi")) | |
358 | { | |
359 | release_region(port, 2); | |
360 | continue; | |
361 | } | |
362 | res = inb(port + 3); | |
363 | if (res & 1) { | |
364 | /* Single channel mode */ | |
6878cce5 | 365 | if (qdi_init_one(port, 6580, ide_port[r & 0x01], ide_irq[r & 0x01], r & 0x04) == 0) |
cc7c15ec | 366 | ct++; |
669a5db4 JG |
367 | } else { |
368 | /* Dual channel mode */ | |
cc7c15ec AC |
369 | if (qdi_init_one(port, 6580, 0x1F0, 14, r & 0x04) == 0) |
370 | ct++; | |
371 | if (qdi_init_one(port + 2, 6580, 0x170, 15, r & 0x04) == 0) | |
372 | ct++; | |
669a5db4 JG |
373 | } |
374 | } | |
375 | } | |
376 | } | |
377 | if (ct != 0) | |
378 | return 0; | |
379 | return -ENODEV; | |
380 | } | |
381 | ||
382 | static __exit void qdi_exit(void) | |
383 | { | |
384 | int i; | |
385 | ||
386 | for (i = 0; i < nr_qdi_host; i++) { | |
24dc5f33 | 387 | ata_host_detach(qdi_host[i]); |
669a5db4 JG |
388 | /* Free the control resource. The 6580 dual channel has the resources |
389 | * claimed as a pair of 2 byte resources so we need no special cases... | |
390 | */ | |
391 | release_region(qdi_data[i].timing, 2); | |
392 | platform_device_unregister(qdi_data[i].platform_dev); | |
85cd7251 | 393 | } |
669a5db4 JG |
394 | } |
395 | ||
396 | MODULE_AUTHOR("Alan Cox"); | |
397 | MODULE_DESCRIPTION("low-level driver for qdi ATA"); | |
398 | MODULE_LICENSE("GPL"); | |
399 | MODULE_VERSION(DRV_VERSION); | |
400 | ||
401 | module_init(qdi_init); | |
402 | module_exit(qdi_exit); | |
403 | ||
404 | module_param(probe_qdi, int, 0); | |
405 |