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1/*
2 * pata_via.c - VIA PATA for new ATA layer
3 * (C) 2005-2006 Red Hat Inc
4 * Alan Cox <alan@redhat.com>
5 *
6 * Documentation
7 * Most chipset documentation available under NDA only
8 *
9 * VIA version guide
10 * VIA VT82C561 - early design, uses ata_generic currently
11 * VIA VT82C576 - MWDMA, 33Mhz
12 * VIA VT82C586 - MWDMA, 33Mhz
13 * VIA VT82C586a - Added UDMA to 33Mhz
14 * VIA VT82C586b - UDMA33
15 * VIA VT82C596a - Nonfunctional UDMA66
16 * VIA VT82C596b - Working UDMA66
17 * VIA VT82C686 - Nonfunctional UDMA66
18 * VIA VT82C686a - Working UDMA66
19 * VIA VT82C686b - Updated to UDMA100
20 * VIA VT8231 - UDMA100
21 * VIA VT8233 - UDMA100
22 * VIA VT8233a - UDMA133
23 * VIA VT8233c - UDMA100
24 * VIA VT8235 - UDMA133
25 * VIA VT8237 - UDMA133
05c39e50 26 * VIA VT8237S - UDMA133
75f609d2 27 * VIA VT8251 - UDMA133
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28 *
29 * Most registers remain compatible across chips. Others start reserved
30 * and acquire sensible semantics if set to 1 (eg cable detect). A few
31 * exceptions exist, notably around the FIFO settings.
32 *
33 * One additional quirk of the VIA design is that like ALi they use few
34 * PCI IDs for a lot of chips.
35 *
36 * Based heavily on:
37 *
38 * Version 3.38
39 *
40 * VIA IDE driver for Linux. Supported southbridges:
41 *
42 * vt82c576, vt82c586, vt82c586a, vt82c586b, vt82c596a, vt82c596b,
43 * vt82c686, vt82c686a, vt82c686b, vt8231, vt8233, vt8233c, vt8233a,
44 * vt8235, vt8237
45 *
46 * Copyright (c) 2000-2002 Vojtech Pavlik
47 *
48 * Based on the work of:
49 * Michel Aubry
50 * Jeff Garzik
51 * Andre Hedrick
52
53 */
54
55#include <linux/kernel.h>
56#include <linux/module.h>
57#include <linux/pci.h>
58#include <linux/init.h>
59#include <linux/blkdev.h>
60#include <linux/delay.h>
61#include <scsi/scsi_host.h>
62#include <linux/libata.h>
cf5792d2 63#include <linux/dmi.h>
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64
65#define DRV_NAME "pata_via"
97cb81c3 66#define DRV_VERSION "0.3.1"
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67
68/*
69 * The following comes directly from Vojtech Pavlik's ide/pci/via82cxxx
70 * driver.
71 */
72
73enum {
74 VIA_UDMA = 0x007,
75 VIA_UDMA_NONE = 0x000,
76 VIA_UDMA_33 = 0x001,
77 VIA_UDMA_66 = 0x002,
78 VIA_UDMA_100 = 0x003,
79 VIA_UDMA_133 = 0x004,
80 VIA_BAD_PREQ = 0x010, /* Crashes if PREQ# till DDACK# set */
81 VIA_BAD_CLK66 = 0x020, /* 66 MHz clock doesn't work correctly */
82 VIA_SET_FIFO = 0x040, /* Needs to have FIFO split set */
83 VIA_NO_UNMASK = 0x080, /* Doesn't work with IRQ unmasking on */
84 VIA_BAD_ID = 0x100, /* Has wrong vendor ID (0x1107) */
85 VIA_BAD_AST = 0x200, /* Don't touch Address Setup Timing */
86 VIA_NO_ENABLES = 0x400, /* Has no enablebits */
87};
88
89/*
90 * VIA SouthBridge chips.
91 */
92
93static const struct via_isa_bridge {
94 const char *name;
95 u16 id;
96 u8 rev_min;
97 u8 rev_max;
98 u16 flags;
99} via_isa_bridges[] = {
e0b874df 100 { "vt8237s", PCI_DEVICE_ID_VIA_8237S, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST },
75f609d2 101 { "vt8251", PCI_DEVICE_ID_VIA_8251, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST },
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102 { "cx700", PCI_DEVICE_ID_VIA_CX700, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST },
103 { "vt6410", PCI_DEVICE_ID_VIA_6410, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST | VIA_NO_ENABLES},
104 { "vt8237a", PCI_DEVICE_ID_VIA_8237A, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST },
105 { "vt8237", PCI_DEVICE_ID_VIA_8237, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST },
106 { "vt8235", PCI_DEVICE_ID_VIA_8235, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST },
107 { "vt8233a", PCI_DEVICE_ID_VIA_8233A, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST },
108 { "vt8233c", PCI_DEVICE_ID_VIA_8233C_0, 0x00, 0x2f, VIA_UDMA_100 },
109 { "vt8233", PCI_DEVICE_ID_VIA_8233_0, 0x00, 0x2f, VIA_UDMA_100 },
110 { "vt8231", PCI_DEVICE_ID_VIA_8231, 0x00, 0x2f, VIA_UDMA_100 },
111 { "vt82c686b", PCI_DEVICE_ID_VIA_82C686, 0x40, 0x4f, VIA_UDMA_100 },
112 { "vt82c686a", PCI_DEVICE_ID_VIA_82C686, 0x10, 0x2f, VIA_UDMA_66 },
113 { "vt82c686", PCI_DEVICE_ID_VIA_82C686, 0x00, 0x0f, VIA_UDMA_33 | VIA_BAD_CLK66 },
114 { "vt82c596b", PCI_DEVICE_ID_VIA_82C596, 0x10, 0x2f, VIA_UDMA_66 },
115 { "vt82c596a", PCI_DEVICE_ID_VIA_82C596, 0x00, 0x0f, VIA_UDMA_33 | VIA_BAD_CLK66 },
116 { "vt82c586b", PCI_DEVICE_ID_VIA_82C586_0, 0x47, 0x4f, VIA_UDMA_33 | VIA_SET_FIFO },
117 { "vt82c586b", PCI_DEVICE_ID_VIA_82C586_0, 0x40, 0x46, VIA_UDMA_33 | VIA_SET_FIFO | VIA_BAD_PREQ },
118 { "vt82c586b", PCI_DEVICE_ID_VIA_82C586_0, 0x30, 0x3f, VIA_UDMA_33 | VIA_SET_FIFO },
119 { "vt82c586a", PCI_DEVICE_ID_VIA_82C586_0, 0x20, 0x2f, VIA_UDMA_33 | VIA_SET_FIFO },
120 { "vt82c586", PCI_DEVICE_ID_VIA_82C586_0, 0x00, 0x0f, VIA_UDMA_NONE | VIA_SET_FIFO },
121 { "vt82c576", PCI_DEVICE_ID_VIA_82C576, 0x00, 0x2f, VIA_UDMA_NONE | VIA_SET_FIFO | VIA_NO_UNMASK },
122 { "vt82c576", PCI_DEVICE_ID_VIA_82C576, 0x00, 0x2f, VIA_UDMA_NONE | VIA_SET_FIFO | VIA_NO_UNMASK | VIA_BAD_ID },
123 { NULL }
124};
125
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126
127/*
128 * Cable special cases
129 */
130
131static struct dmi_system_id cable_dmi_table[] = {
132 {
133 .ident = "Acer Ferrari 3400",
134 .matches = {
135 DMI_MATCH(DMI_BOARD_VENDOR, "Acer,Inc."),
136 DMI_MATCH(DMI_BOARD_NAME, "Ferrari 3400"),
137 },
138 },
139 { }
140};
141
142static int via_cable_override(struct pci_dev *pdev)
143{
144 /* Systems by DMI */
145 if (dmi_check_system(cable_dmi_table))
146 return 1;
147 return 0;
148}
149
150
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151/**
152 * via_cable_detect - cable detection
153 * @ap: ATA port
154 *
155 * Perform cable detection. Actually for the VIA case the BIOS
156 * already did this for us. We read the values provided by the
157 * BIOS. If you are using an 8235 in a non-PC configuration you
158 * may need to update this code.
159 *
160 * Hotplug also impacts on this.
161 */
162
163static int via_cable_detect(struct ata_port *ap) {
97cb81c3 164 const struct via_isa_bridge *config = ap->host->private_data;
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165 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
166 u32 ata66;
167
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168 if (via_cable_override(pdev))
169 return ATA_CBL_PATA40_SHORT;
170
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171 /* Early chips are 40 wire */
172 if ((config->flags & VIA_UDMA) < VIA_UDMA_66)
173 return ATA_CBL_PATA40;
174 /* UDMA 66 chips have only drive side logic */
175 else if((config->flags & VIA_UDMA) < VIA_UDMA_100)
176 return ATA_CBL_PATA_UNK;
177 /* UDMA 100 or later */
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178 pci_read_config_dword(pdev, 0x50, &ata66);
179 /* Check both the drive cable reporting bits, we might not have
180 two drives */
181 if (ata66 & (0x10100000 >> (16 * ap->port_no)))
182 return ATA_CBL_PATA80;
97cb81c3 183 return ATA_CBL_PATA40;
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184}
185
d4b2bab4 186static int via_pre_reset(struct ata_port *ap, unsigned long deadline)
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187{
188 const struct via_isa_bridge *config = ap->host->private_data;
189
190 if (!(config->flags & VIA_NO_ENABLES)) {
191 static const struct pci_bits via_enable_bits[] = {
192 { 0x40, 1, 0x02, 0x02 },
193 { 0x40, 1, 0x01, 0x01 }
194 };
669a5db4 195 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
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196 if (!pci_test_config_bits(pdev, &via_enable_bits[ap->port_no]))
197 return -ENOENT;
669a5db4 198 }
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199
200 return ata_std_prereset(ap, deadline);
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201}
202
203
204/**
205 * via_error_handler - reset for VIA chips
206 * @ap: ATA port
207 *
208 * Handle the reset callback for the later chips with cable detect
209 */
210
211static void via_error_handler(struct ata_port *ap)
212{
213 ata_bmdma_drive_eh(ap, via_pre_reset, ata_std_softreset, NULL, ata_std_postreset);
214}
215
216/**
217 * via_do_set_mode - set initial PIO mode data
218 * @ap: ATA interface
219 * @adev: ATA device
220 * @mode: ATA mode being programmed
221 * @tdiv: Clocks per PCI clock
222 * @set_ast: Set to program address setup
223 * @udma_type: UDMA mode/format of registers
224 *
225 * Program the VIA registers for DMA and PIO modes. Uses the ata timing
226 * support in order to compute modes.
227 *
228 * FIXME: Hotplug will require we serialize multiple mode changes
229 * on the two channels.
230 */
231
232static void via_do_set_mode(struct ata_port *ap, struct ata_device *adev, int mode, int tdiv, int set_ast, int udma_type)
233{
234 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
235 struct ata_device *peer = ata_dev_pair(adev);
236 struct ata_timing t, p;
237 static int via_clock = 33333; /* Bus clock in kHZ - ought to be tunable one day */
238 unsigned long T = 1000000000 / via_clock;
239 unsigned long UT = T/tdiv;
240 int ut;
241 int offset = 3 - (2*ap->port_no) - adev->devno;
242
243
244 /* Calculate the timing values we require */
245 ata_timing_compute(adev, mode, &t, T, UT);
246
247 /* We share 8bit timing so we must merge the constraints */
248 if (peer) {
249 if (peer->pio_mode) {
250 ata_timing_compute(peer, peer->pio_mode, &p, T, UT);
251 ata_timing_merge(&p, &t, &t, ATA_TIMING_8BIT);
252 }
253 }
254
255 /* Address setup is programmable but breaks on UDMA133 setups */
256 if (set_ast) {
257 u8 setup; /* 2 bits per drive */
258 int shift = 2 * offset;
259
260 pci_read_config_byte(pdev, 0x4C, &setup);
261 setup &= ~(3 << shift);
262 setup |= FIT(t.setup, 1, 4) << shift; /* 1,4 or 1,4 - 1 FIXME */
263 pci_write_config_byte(pdev, 0x4C, setup);
264 }
265
266 /* Load the PIO mode bits */
267 pci_write_config_byte(pdev, 0x4F - ap->port_no,
268 ((FIT(t.act8b, 1, 16) - 1) << 4) | (FIT(t.rec8b, 1, 16) - 1));
269 pci_write_config_byte(pdev, 0x48 + offset,
270 ((FIT(t.active, 1, 16) - 1) << 4) | (FIT(t.recover, 1, 16) - 1));
271
272 /* Load the UDMA bits according to type */
273 switch(udma_type) {
274 default:
275 /* BUG() ? */
276 /* fall through */
277 case 33:
278 ut = t.udma ? (0xe0 | (FIT(t.udma, 2, 5) - 2)) : 0x03;
279 break;
280 case 66:
281 ut = t.udma ? (0xe8 | (FIT(t.udma, 2, 9) - 2)) : 0x0f;
282 break;
283 case 100:
284 ut = t.udma ? (0xe0 | (FIT(t.udma, 2, 9) - 2)) : 0x07;
285 break;
286 case 133:
287 ut = t.udma ? (0xe0 | (FIT(t.udma, 2, 9) - 2)) : 0x07;
288 break;
289 }
290 /* Set UDMA unless device is not UDMA capable */
291 if (udma_type)
292 pci_write_config_byte(pdev, 0x50 + offset, ut);
293}
294
295static void via_set_piomode(struct ata_port *ap, struct ata_device *adev)
296{
297 const struct via_isa_bridge *config = ap->host->private_data;
298 int set_ast = (config->flags & VIA_BAD_AST) ? 0 : 1;
299 int mode = config->flags & VIA_UDMA;
300 static u8 tclock[5] = { 1, 1, 2, 3, 4 };
301 static u8 udma[5] = { 0, 33, 66, 100, 133 };
302
303 via_do_set_mode(ap, adev, adev->pio_mode, tclock[mode], set_ast, udma[mode]);
304}
305
306static void via_set_dmamode(struct ata_port *ap, struct ata_device *adev)
307{
308 const struct via_isa_bridge *config = ap->host->private_data;
309 int set_ast = (config->flags & VIA_BAD_AST) ? 0 : 1;
310 int mode = config->flags & VIA_UDMA;
311 static u8 tclock[5] = { 1, 1, 2, 3, 4 };
312 static u8 udma[5] = { 0, 33, 66, 100, 133 };
313
314 via_do_set_mode(ap, adev, adev->dma_mode, tclock[mode], set_ast, udma[mode]);
315}
316
317static struct scsi_host_template via_sht = {
318 .module = THIS_MODULE,
319 .name = DRV_NAME,
320 .ioctl = ata_scsi_ioctl,
321 .queuecommand = ata_scsi_queuecmd,
322 .can_queue = ATA_DEF_QUEUE,
323 .this_id = ATA_SHT_THIS_ID,
324 .sg_tablesize = LIBATA_MAX_PRD,
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325 .cmd_per_lun = ATA_SHT_CMD_PER_LUN,
326 .emulated = ATA_SHT_EMULATED,
327 .use_clustering = ATA_SHT_USE_CLUSTERING,
328 .proc_name = DRV_NAME,
329 .dma_boundary = ATA_DMA_BOUNDARY,
330 .slave_configure = ata_scsi_slave_config,
afdfe899 331 .slave_destroy = ata_scsi_slave_destroy,
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332 .bios_param = ata_std_bios_param,
333};
334
335static struct ata_port_operations via_port_ops = {
336 .port_disable = ata_port_disable,
337 .set_piomode = via_set_piomode,
338 .set_dmamode = via_set_dmamode,
339 .mode_filter = ata_pci_default_filter,
340
341 .tf_load = ata_tf_load,
342 .tf_read = ata_tf_read,
343 .check_status = ata_check_status,
344 .exec_command = ata_exec_command,
345 .dev_select = ata_std_dev_select,
346
347 .freeze = ata_bmdma_freeze,
348 .thaw = ata_bmdma_thaw,
349 .error_handler = via_error_handler,
350 .post_internal_cmd = ata_bmdma_post_internal_cmd,
97cb81c3 351 .cable_detect = via_cable_detect,
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352
353 .bmdma_setup = ata_bmdma_setup,
354 .bmdma_start = ata_bmdma_start,
355 .bmdma_stop = ata_bmdma_stop,
356 .bmdma_status = ata_bmdma_status,
357
358 .qc_prep = ata_qc_prep,
359 .qc_issue = ata_qc_issue_prot,
bda30288 360
0d5ff566 361 .data_xfer = ata_data_xfer,
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362
363 .irq_handler = ata_interrupt,
364 .irq_clear = ata_bmdma_irq_clear,
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365 .irq_on = ata_irq_on,
366 .irq_ack = ata_irq_ack,
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367
368 .port_start = ata_port_start,
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369};
370
371static struct ata_port_operations via_port_ops_noirq = {
372 .port_disable = ata_port_disable,
373 .set_piomode = via_set_piomode,
374 .set_dmamode = via_set_dmamode,
375 .mode_filter = ata_pci_default_filter,
376
377 .tf_load = ata_tf_load,
378 .tf_read = ata_tf_read,
379 .check_status = ata_check_status,
380 .exec_command = ata_exec_command,
381 .dev_select = ata_std_dev_select,
382
383 .freeze = ata_bmdma_freeze,
384 .thaw = ata_bmdma_thaw,
385 .error_handler = via_error_handler,
386 .post_internal_cmd = ata_bmdma_post_internal_cmd,
97cb81c3 387 .cable_detect = via_cable_detect,
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388
389 .bmdma_setup = ata_bmdma_setup,
390 .bmdma_start = ata_bmdma_start,
391 .bmdma_stop = ata_bmdma_stop,
392 .bmdma_status = ata_bmdma_status,
393
394 .qc_prep = ata_qc_prep,
395 .qc_issue = ata_qc_issue_prot,
bda30288 396
0d5ff566 397 .data_xfer = ata_data_xfer_noirq,
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398
399 .irq_handler = ata_interrupt,
400 .irq_clear = ata_bmdma_irq_clear,
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401 .irq_on = ata_irq_on,
402 .irq_ack = ata_irq_ack,
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403
404 .port_start = ata_port_start,
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405};
406
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407/**
408 * via_config_fifo - set up the FIFO
409 * @pdev: PCI device
410 * @flags: configuration flags
411 *
412 * Set the FIFO properties for this device if neccessary. Used both on
413 * set up and on and the resume path
414 */
415
416static void via_config_fifo(struct pci_dev *pdev, unsigned int flags)
417{
418 u8 enable;
f20b16ff 419
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420 /* 0x40 low bits indicate enabled channels */
421 pci_read_config_byte(pdev, 0x40 , &enable);
422 enable &= 3;
f20b16ff 423
627d2d32 424 if (flags & VIA_SET_FIFO) {
73720861 425 static const u8 fifo_setting[4] = {0x00, 0x60, 0x00, 0x20};
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426 u8 fifo;
427
428 pci_read_config_byte(pdev, 0x43, &fifo);
429
430 /* Clear PREQ# until DDACK# for errata */
431 if (flags & VIA_BAD_PREQ)
432 fifo &= 0x7F;
433 else
434 fifo &= 0x9f;
435 /* Turn on FIFO for enabled channels */
436 fifo |= fifo_setting[enable];
437 pci_write_config_byte(pdev, 0x43, fifo);
438 }
439}
440
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441/**
442 * via_init_one - discovery callback
627d2d32 443 * @pdev: PCI device
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444 * @id: PCI table info
445 *
446 * A VIA IDE interface has been discovered. Figure out what revision
447 * and perform configuration work before handing it to the ATA layer
448 */
449
450static int via_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
451{
452 /* Early VIA without UDMA support */
1626aeb8 453 static const struct ata_port_info via_mwdma_info = {
669a5db4 454 .sht = &via_sht,
464cf177 455 .flags = ATA_FLAG_SLAVE_POSS,
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456 .pio_mask = 0x1f,
457 .mwdma_mask = 0x07,
458 .port_ops = &via_port_ops
459 };
460 /* Ditto with IRQ masking required */
1626aeb8 461 static const struct ata_port_info via_mwdma_info_borked = {
669a5db4 462 .sht = &via_sht,
464cf177 463 .flags = ATA_FLAG_SLAVE_POSS,
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464 .pio_mask = 0x1f,
465 .mwdma_mask = 0x07,
466 .port_ops = &via_port_ops_noirq,
467 };
468 /* VIA UDMA 33 devices (and borked 66) */
1626aeb8 469 static const struct ata_port_info via_udma33_info = {
669a5db4 470 .sht = &via_sht,
464cf177 471 .flags = ATA_FLAG_SLAVE_POSS,
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472 .pio_mask = 0x1f,
473 .mwdma_mask = 0x07,
bf6263a8 474 .udma_mask = ATA_UDMA2,
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475 .port_ops = &via_port_ops
476 };
477 /* VIA UDMA 66 devices */
1626aeb8 478 static const struct ata_port_info via_udma66_info = {
669a5db4 479 .sht = &via_sht,
464cf177 480 .flags = ATA_FLAG_SLAVE_POSS,
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481 .pio_mask = 0x1f,
482 .mwdma_mask = 0x07,
bf6263a8 483 .udma_mask = ATA_UDMA4,
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484 .port_ops = &via_port_ops
485 };
486 /* VIA UDMA 100 devices */
1626aeb8 487 static const struct ata_port_info via_udma100_info = {
669a5db4 488 .sht = &via_sht,
464cf177 489 .flags = ATA_FLAG_SLAVE_POSS,
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490 .pio_mask = 0x1f,
491 .mwdma_mask = 0x07,
bf6263a8 492 .udma_mask = ATA_UDMA5,
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493 .port_ops = &via_port_ops
494 };
495 /* UDMA133 with bad AST (All current 133) */
1626aeb8 496 static const struct ata_port_info via_udma133_info = {
669a5db4 497 .sht = &via_sht,
464cf177 498 .flags = ATA_FLAG_SLAVE_POSS,
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499 .pio_mask = 0x1f,
500 .mwdma_mask = 0x07,
bf6263a8 501 .udma_mask = ATA_UDMA6, /* FIXME: should check north bridge */
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502 .port_ops = &via_port_ops
503 };
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504 struct ata_port_info type;
505 const struct ata_port_info *ppi[] = { &type, NULL };
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506 struct pci_dev *isa = NULL;
507 const struct via_isa_bridge *config;
508 static int printed_version;
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509 u8 enable;
510 u32 timing;
511
512 if (!printed_version++)
513 dev_printk(KERN_DEBUG, &pdev->dev, "version " DRV_VERSION "\n");
514
515 /* To find out how the IDE will behave and what features we
516 actually have to look at the bridge not the IDE controller */
517 for (config = via_isa_bridges; config->id; config++)
518 if ((isa = pci_get_device(PCI_VENDOR_ID_VIA +
519 !!(config->flags & VIA_BAD_ID),
520 config->id, NULL))) {
521
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522 if (isa->revision >= config->rev_min &&
523 isa->revision <= config->rev_max)
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524 break;
525 pci_dev_put(isa);
526 }
527
528 if (!config->id) {
529 printk(KERN_WARNING "via: Unknown VIA SouthBridge, disabling.\n");
530 return -ENODEV;
531 }
532 pci_dev_put(isa);
533
534 /* 0x40 low bits indicate enabled channels */
535 pci_read_config_byte(pdev, 0x40 , &enable);
536 enable &= 3;
537 if (enable == 0) {
538 return -ENODEV;
539 }
540
541 /* Initialise the FIFO for the enabled channels. */
627d2d32 542 via_config_fifo(pdev, config->flags);
f20b16ff 543
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544 /* Clock set up */
545 switch(config->flags & VIA_UDMA) {
546 case VIA_UDMA_NONE:
547 if (config->flags & VIA_NO_UNMASK)
1626aeb8 548 type = via_mwdma_info_borked;
669a5db4 549 else
1626aeb8 550 type = via_mwdma_info;
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551 break;
552 case VIA_UDMA_33:
1626aeb8 553 type = via_udma33_info;
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554 break;
555 case VIA_UDMA_66:
1626aeb8 556 type = via_udma66_info;
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557 /* The 66 MHz devices require we enable the clock */
558 pci_read_config_dword(pdev, 0x50, &timing);
559 timing |= 0x80008;
560 pci_write_config_dword(pdev, 0x50, timing);
561 break;
562 case VIA_UDMA_100:
1626aeb8 563 type = via_udma100_info;
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564 break;
565 case VIA_UDMA_133:
1626aeb8 566 type = via_udma133_info;
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567 break;
568 default:
569 WARN_ON(1);
570 return -ENODEV;
571 }
572
573 if (config->flags & VIA_BAD_CLK66) {
574 /* Disable the 66MHz clock on problem devices */
575 pci_read_config_dword(pdev, 0x50, &timing);
576 timing &= ~0x80008;
577 pci_write_config_dword(pdev, 0x50, timing);
578 }
579
580 /* We have established the device type, now fire it up */
1626aeb8 581 type.private_data = (void *)config;
669a5db4 582
1626aeb8 583 return ata_pci_init_one(pdev, ppi);
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584}
585
438ac6d5 586#ifdef CONFIG_PM
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587/**
588 * via_reinit_one - reinit after resume
589 * @pdev; PCI device
590 *
591 * Called when the VIA PATA device is resumed. We must then
592 * reconfigure the fifo and other setup we may have altered. In
593 * addition the kernel needs to have the resume methods on PCI
594 * quirk supported.
595 */
596
597static int via_reinit_one(struct pci_dev *pdev)
598{
599 u32 timing;
600 struct ata_host *host = dev_get_drvdata(&pdev->dev);
601 const struct via_isa_bridge *config = host->private_data;
f20b16ff 602
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603 via_config_fifo(pdev, config->flags);
604
605 if ((config->flags & VIA_UDMA) == VIA_UDMA_66) {
606 /* The 66 MHz devices require we enable the clock */
607 pci_read_config_dword(pdev, 0x50, &timing);
608 timing |= 0x80008;
609 pci_write_config_dword(pdev, 0x50, timing);
610 }
611 if (config->flags & VIA_BAD_CLK66) {
612 /* Disable the 66MHz clock on problem devices */
613 pci_read_config_dword(pdev, 0x50, &timing);
614 timing &= ~0x80008;
615 pci_write_config_dword(pdev, 0x50, timing);
616 }
f20b16ff 617 return ata_pci_device_resume(pdev);
627d2d32 618}
438ac6d5 619#endif
627d2d32 620
669a5db4 621static const struct pci_device_id via[] = {
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622 { PCI_VDEVICE(VIA, 0x0571), },
623 { PCI_VDEVICE(VIA, 0x0581), },
624 { PCI_VDEVICE(VIA, 0x1571), },
625 { PCI_VDEVICE(VIA, 0x3164), },
626 { PCI_VDEVICE(VIA, 0x5324), },
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627
628 { },
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629};
630
631static struct pci_driver via_pci_driver = {
2d2744fc 632 .name = DRV_NAME,
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633 .id_table = via,
634 .probe = via_init_one,
627d2d32 635 .remove = ata_pci_remove_one,
438ac6d5 636#ifdef CONFIG_PM
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637 .suspend = ata_pci_device_suspend,
638 .resume = via_reinit_one,
438ac6d5 639#endif
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640};
641
642static int __init via_init(void)
643{
644 return pci_register_driver(&via_pci_driver);
645}
646
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647static void __exit via_exit(void)
648{
649 pci_unregister_driver(&via_pci_driver);
650}
651
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652MODULE_AUTHOR("Alan Cox");
653MODULE_DESCRIPTION("low-level driver for VIA PATA");
654MODULE_LICENSE("GPL");
655MODULE_DEVICE_TABLE(pci, via);
656MODULE_VERSION(DRV_VERSION);
657
658module_init(via_init);
659module_exit(via_exit);