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1da177e4 LT |
1 | /* |
2 | * sata_uli.c - ULi Electronics SATA | |
3 | * | |
af36d7f0 JG |
4 | * |
5 | * This program is free software; you can redistribute it and/or modify | |
6 | * it under the terms of the GNU General Public License as published by | |
7 | * the Free Software Foundation; either version 2, or (at your option) | |
8 | * any later version. | |
9 | * | |
10 | * This program is distributed in the hope that it will be useful, | |
11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
13 | * GNU General Public License for more details. | |
14 | * | |
15 | * You should have received a copy of the GNU General Public License | |
16 | * along with this program; see the file COPYING. If not, write to | |
17 | * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. | |
18 | * | |
19 | * | |
20 | * libata documentation is available via 'make {ps|pdf}docs', | |
21 | * as Documentation/DocBook/libata.* | |
22 | * | |
23 | * Hardware documentation available under NDA. | |
1da177e4 LT |
24 | * |
25 | */ | |
26 | ||
1da177e4 LT |
27 | #include <linux/kernel.h> |
28 | #include <linux/module.h> | |
29 | #include <linux/pci.h> | |
30 | #include <linux/init.h> | |
31 | #include <linux/blkdev.h> | |
32 | #include <linux/delay.h> | |
33 | #include <linux/interrupt.h> | |
a9524a76 | 34 | #include <linux/device.h> |
1da177e4 LT |
35 | #include <scsi/scsi_host.h> |
36 | #include <linux/libata.h> | |
37 | ||
38 | #define DRV_NAME "sata_uli" | |
2a3103ce | 39 | #define DRV_VERSION "1.3" |
1da177e4 LT |
40 | |
41 | enum { | |
42 | uli_5289 = 0, | |
43 | uli_5287 = 1, | |
44 | uli_5281 = 2, | |
45 | ||
50106c5a JG |
46 | uli_max_ports = 4, |
47 | ||
1da177e4 LT |
48 | /* PCI configuration registers */ |
49 | ULI5287_BASE = 0x90, /* sata0 phy SCR registers */ | |
50 | ULI5287_OFFS = 0x10, /* offset from sata0->sata1 phy regs */ | |
51 | ULI5281_BASE = 0x60, /* sata0 phy SCR registers */ | |
52 | ULI5281_OFFS = 0x60, /* offset from sata0->sata1 phy regs */ | |
53 | }; | |
54 | ||
50106c5a JG |
55 | struct uli_priv { |
56 | unsigned int scr_cfg_addr[uli_max_ports]; | |
57 | }; | |
58 | ||
5796d1c4 JG |
59 | static int uli_init_one(struct pci_dev *pdev, const struct pci_device_id *ent); |
60 | static int uli_scr_read(struct ata_port *ap, unsigned int sc_reg, u32 *val); | |
61 | static int uli_scr_write(struct ata_port *ap, unsigned int sc_reg, u32 val); | |
1da177e4 | 62 | |
3b7d697d | 63 | static const struct pci_device_id uli_pci_tbl[] = { |
54bb3a94 JG |
64 | { PCI_VDEVICE(AL, 0x5289), uli_5289 }, |
65 | { PCI_VDEVICE(AL, 0x5287), uli_5287 }, | |
66 | { PCI_VDEVICE(AL, 0x5281), uli_5281 }, | |
67 | ||
1da177e4 LT |
68 | { } /* terminate list */ |
69 | }; | |
70 | ||
1da177e4 LT |
71 | static struct pci_driver uli_pci_driver = { |
72 | .name = DRV_NAME, | |
73 | .id_table = uli_pci_tbl, | |
74 | .probe = uli_init_one, | |
75 | .remove = ata_pci_remove_one, | |
76 | }; | |
77 | ||
193515d5 | 78 | static struct scsi_host_template uli_sht = { |
68d1d07b | 79 | ATA_BMDMA_SHT(DRV_NAME), |
1da177e4 LT |
80 | }; |
81 | ||
029cfd6b TH |
82 | static struct ata_port_operations uli_ops = { |
83 | .inherits = &ata_bmdma_port_ops, | |
1da177e4 LT |
84 | .scr_read = uli_scr_read, |
85 | .scr_write = uli_scr_write, | |
1da177e4 LT |
86 | }; |
87 | ||
1626aeb8 | 88 | static const struct ata_port_info uli_port_info = { |
b2a8bbe6 TH |
89 | .flags = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY | |
90 | ATA_FLAG_IGN_SIMPLEX, | |
7da79312 | 91 | .pio_mask = 0x1f, /* pio0-4 */ |
bf6263a8 | 92 | .udma_mask = ATA_UDMA6, |
1da177e4 LT |
93 | .port_ops = &uli_ops, |
94 | }; | |
95 | ||
96 | ||
97 | MODULE_AUTHOR("Peer Chen"); | |
98 | MODULE_DESCRIPTION("low-level driver for ULi Electronics SATA controller"); | |
99 | MODULE_LICENSE("GPL"); | |
100 | MODULE_DEVICE_TABLE(pci, uli_pci_tbl); | |
101 | MODULE_VERSION(DRV_VERSION); | |
102 | ||
103 | static unsigned int get_scr_cfg_addr(struct ata_port *ap, unsigned int sc_reg) | |
104 | { | |
cca3974e | 105 | struct uli_priv *hpriv = ap->host->private_data; |
50106c5a | 106 | return hpriv->scr_cfg_addr[ap->port_no] + (4 * sc_reg); |
1da177e4 LT |
107 | } |
108 | ||
5796d1c4 | 109 | static u32 uli_scr_cfg_read(struct ata_port *ap, unsigned int sc_reg) |
1da177e4 | 110 | { |
cca3974e | 111 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); |
1da177e4 LT |
112 | unsigned int cfg_addr = get_scr_cfg_addr(ap, sc_reg); |
113 | u32 val; | |
114 | ||
115 | pci_read_config_dword(pdev, cfg_addr, &val); | |
116 | return val; | |
117 | } | |
118 | ||
5796d1c4 | 119 | static void uli_scr_cfg_write(struct ata_port *ap, unsigned int scr, u32 val) |
1da177e4 | 120 | { |
cca3974e | 121 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); |
1da177e4 LT |
122 | unsigned int cfg_addr = get_scr_cfg_addr(ap, scr); |
123 | ||
124 | pci_write_config_dword(pdev, cfg_addr, val); | |
125 | } | |
126 | ||
5796d1c4 | 127 | static int uli_scr_read(struct ata_port *ap, unsigned int sc_reg, u32 *val) |
1da177e4 LT |
128 | { |
129 | if (sc_reg > SCR_CONTROL) | |
da3dbb17 | 130 | return -EINVAL; |
1da177e4 | 131 | |
da3dbb17 TH |
132 | *val = uli_scr_cfg_read(ap, sc_reg); |
133 | return 0; | |
1da177e4 LT |
134 | } |
135 | ||
5796d1c4 | 136 | static int uli_scr_write(struct ata_port *ap, unsigned int sc_reg, u32 val) |
1da177e4 | 137 | { |
5796d1c4 | 138 | if (sc_reg > SCR_CONTROL) //SCR_CONTROL=2, SCR_ERROR=1, SCR_STATUS=0 |
da3dbb17 | 139 | return -EINVAL; |
1da177e4 LT |
140 | |
141 | uli_scr_cfg_write(ap, sc_reg, val); | |
da3dbb17 | 142 | return 0; |
1da177e4 LT |
143 | } |
144 | ||
5796d1c4 | 145 | static int uli_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) |
1da177e4 | 146 | { |
a9524a76 | 147 | static int printed_version; |
9a829ccf | 148 | const struct ata_port_info *ppi[] = { &uli_port_info, NULL }; |
1da177e4 | 149 | unsigned int board_idx = (unsigned int) ent->driver_data; |
9a829ccf | 150 | struct ata_host *host; |
50106c5a | 151 | struct uli_priv *hpriv; |
0d5ff566 | 152 | void __iomem * const *iomap; |
9a829ccf TH |
153 | struct ata_ioports *ioaddr; |
154 | int n_ports, rc; | |
1da177e4 | 155 | |
a9524a76 JG |
156 | if (!printed_version++) |
157 | dev_printk(KERN_INFO, &pdev->dev, "version " DRV_VERSION "\n"); | |
158 | ||
24dc5f33 | 159 | rc = pcim_enable_device(pdev); |
1da177e4 LT |
160 | if (rc) |
161 | return rc; | |
162 | ||
9a829ccf TH |
163 | n_ports = 2; |
164 | if (board_idx == uli_5287) | |
165 | n_ports = 4; | |
1626aeb8 TH |
166 | |
167 | /* allocate the host */ | |
168 | host = ata_host_alloc_pinfo(&pdev->dev, ppi, n_ports); | |
169 | if (!host) | |
170 | return -ENOMEM; | |
1da177e4 | 171 | |
24dc5f33 TH |
172 | hpriv = devm_kzalloc(&pdev->dev, sizeof(*hpriv), GFP_KERNEL); |
173 | if (!hpriv) | |
174 | return -ENOMEM; | |
9a829ccf | 175 | host->private_data = hpriv; |
50106c5a | 176 | |
1626aeb8 | 177 | /* the first two ports are standard SFF */ |
d583bc18 | 178 | rc = ata_pci_init_sff_host(host); |
1626aeb8 TH |
179 | if (rc) |
180 | return rc; | |
181 | ||
182 | rc = ata_pci_init_bmdma(host); | |
183 | if (rc) | |
184 | return rc; | |
185 | ||
9a829ccf | 186 | iomap = host->iomap; |
0d5ff566 | 187 | |
1da177e4 LT |
188 | switch (board_idx) { |
189 | case uli_5287: | |
1626aeb8 TH |
190 | /* If there are four, the last two live right after |
191 | * the standard SFF ports. | |
192 | */ | |
50106c5a JG |
193 | hpriv->scr_cfg_addr[0] = ULI5287_BASE; |
194 | hpriv->scr_cfg_addr[1] = ULI5287_BASE + ULI5287_OFFS; | |
1da177e4 | 195 | |
9a829ccf TH |
196 | ioaddr = &host->ports[2]->ioaddr; |
197 | ioaddr->cmd_addr = iomap[0] + 8; | |
198 | ioaddr->altstatus_addr = | |
199 | ioaddr->ctl_addr = (void __iomem *) | |
0d5ff566 | 200 | ((unsigned long)iomap[1] | ATA_PCI_CTL_OFS) + 4; |
9a829ccf | 201 | ioaddr->bmdma_addr = iomap[4] + 16; |
50106c5a | 202 | hpriv->scr_cfg_addr[2] = ULI5287_BASE + ULI5287_OFFS*4; |
9a829ccf | 203 | ata_std_ports(ioaddr); |
1da177e4 | 204 | |
cbcdd875 TH |
205 | ata_port_desc(host->ports[2], |
206 | "cmd 0x%llx ctl 0x%llx bmdma 0x%llx", | |
207 | (unsigned long long)pci_resource_start(pdev, 0) + 8, | |
208 | ((unsigned long long)pci_resource_start(pdev, 1) | ATA_PCI_CTL_OFS) + 4, | |
209 | (unsigned long long)pci_resource_start(pdev, 4) + 16); | |
210 | ||
9a829ccf TH |
211 | ioaddr = &host->ports[3]->ioaddr; |
212 | ioaddr->cmd_addr = iomap[2] + 8; | |
213 | ioaddr->altstatus_addr = | |
214 | ioaddr->ctl_addr = (void __iomem *) | |
0d5ff566 | 215 | ((unsigned long)iomap[3] | ATA_PCI_CTL_OFS) + 4; |
9a829ccf | 216 | ioaddr->bmdma_addr = iomap[4] + 24; |
50106c5a | 217 | hpriv->scr_cfg_addr[3] = ULI5287_BASE + ULI5287_OFFS*5; |
9a829ccf | 218 | ata_std_ports(ioaddr); |
cbcdd875 TH |
219 | |
220 | ata_port_desc(host->ports[2], | |
221 | "cmd 0x%llx ctl 0x%llx bmdma 0x%llx", | |
222 | (unsigned long long)pci_resource_start(pdev, 2) + 9, | |
223 | ((unsigned long long)pci_resource_start(pdev, 3) | ATA_PCI_CTL_OFS) + 4, | |
224 | (unsigned long long)pci_resource_start(pdev, 4) + 24); | |
225 | ||
1da177e4 LT |
226 | break; |
227 | ||
228 | case uli_5289: | |
50106c5a JG |
229 | hpriv->scr_cfg_addr[0] = ULI5287_BASE; |
230 | hpriv->scr_cfg_addr[1] = ULI5287_BASE + ULI5287_OFFS; | |
1da177e4 LT |
231 | break; |
232 | ||
233 | case uli_5281: | |
50106c5a JG |
234 | hpriv->scr_cfg_addr[0] = ULI5281_BASE; |
235 | hpriv->scr_cfg_addr[1] = ULI5281_BASE + ULI5281_OFFS; | |
1da177e4 LT |
236 | break; |
237 | ||
238 | default: | |
239 | BUG(); | |
240 | break; | |
241 | } | |
242 | ||
243 | pci_set_master(pdev); | |
a04ce0ff | 244 | pci_intx(pdev, 1); |
9a829ccf TH |
245 | return ata_host_activate(host, pdev->irq, ata_interrupt, IRQF_SHARED, |
246 | &uli_sht); | |
1da177e4 LT |
247 | } |
248 | ||
249 | static int __init uli_init(void) | |
250 | { | |
b7887196 | 251 | return pci_register_driver(&uli_pci_driver); |
1da177e4 LT |
252 | } |
253 | ||
254 | static void __exit uli_exit(void) | |
255 | { | |
256 | pci_unregister_driver(&uli_pci_driver); | |
257 | } | |
258 | ||
259 | ||
260 | module_init(uli_init); | |
261 | module_exit(uli_exit); |