[mirror_ubuntu-eoan-kernel.git] / drivers / ata / sata_uli.c

// SPDX-License-Identifier: GPL-2.0-or-later
/*
 *  sata_uli.c - ULi Electronics SATA
 *
 *  libata documentation is available via 'make {ps|pdf}docs',
 *  as Documentation/driver-api/libata.rst
 *
 *  Hardware documentation available under NDA.
 */

#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/gfp.h>
#include <linux/pci.h>
#include <linux/blkdev.h>
#include <linux/delay.h>
#include <linux/interrupt.h>
#include <linux/device.h>
#include <scsi/scsi_host.h>
#include <linux/libata.h>

#define DRV_NAME	"sata_uli"
#define DRV_VERSION	"1.3"

enum {
	uli_5289		= 0,
	uli_5287		= 1,
	uli_5281		= 2,

	uli_max_ports		= 4,

	/* PCI configuration registers */
	ULI5287_BASE		= 0x90, /* sata0 phy SCR registers */
	ULI5287_OFFS		= 0x10, /* offset from sata0->sata1 phy regs */
	ULI5281_BASE		= 0x60, /* sata0 phy SCR  registers */
	ULI5281_OFFS		= 0x60, /* offset from sata0->sata1 phy regs */
};

struct uli_priv {
	unsigned int		scr_cfg_addr[uli_max_ports];
};

static int uli_init_one(struct pci_dev *pdev, const struct pci_device_id *ent);
static int uli_scr_read(struct ata_link *link, unsigned int sc_reg, u32 *val);
static int uli_scr_write(struct ata_link *link, unsigned int sc_reg, u32 val);

static const struct pci_device_id uli_pci_tbl[] = {
	{ PCI_VDEVICE(AL, 0x5289), uli_5289 },
	{ PCI_VDEVICE(AL, 0x5287), uli_5287 },
	{ PCI_VDEVICE(AL, 0x5281), uli_5281 },

	{ }	/* terminate list */
};

static struct pci_driver uli_pci_driver = {
	.name			= DRV_NAME,
	.id_table		= uli_pci_tbl,
	.probe			= uli_init_one,
	.remove			= ata_pci_remove_one,
};

static struct scsi_host_template uli_sht = {
	ATA_BMDMA_SHT(DRV_NAME),
};

static struct ata_port_operations uli_ops = {
	.inherits		= &ata_bmdma_port_ops,
	.scr_read		= uli_scr_read,
	.scr_write		= uli_scr_write,
	.hardreset		= ATA_OP_NULL,
};

static const struct ata_port_info uli_port_info = {
	.flags		= ATA_FLAG_SATA | ATA_FLAG_IGN_SIMPLEX,
	.pio_mask       = ATA_PIO4,
	.udma_mask      = ATA_UDMA6,
	.port_ops       = &uli_ops,
};


MODULE_AUTHOR("Peer Chen");
MODULE_DESCRIPTION("low-level driver for ULi Electronics SATA controller");
MODULE_LICENSE("GPL");
MODULE_DEVICE_TABLE(pci, uli_pci_tbl);
MODULE_VERSION(DRV_VERSION);

static unsigned int get_scr_cfg_addr(struct ata_port *ap, unsigned int sc_reg)
{
	struct uli_priv *hpriv = ap->host->private_data;
	return hpriv->scr_cfg_addr[ap->port_no] + (4 * sc_reg);
}

static u32 uli_scr_cfg_read(struct ata_link *link, unsigned int sc_reg)
{
	struct pci_dev *pdev = to_pci_dev(link->ap->host->dev);
	unsigned int cfg_addr = get_scr_cfg_addr(link->ap, sc_reg);
	u32 val;

	pci_read_config_dword(pdev, cfg_addr, &val);
	return val;
}

static void uli_scr_cfg_write(struct ata_link *link, unsigned int scr, u32 val)
{
	struct pci_dev *pdev = to_pci_dev(link->ap->host->dev);
	unsigned int cfg_addr = get_scr_cfg_addr(link->ap, scr);

	pci_write_config_dword(pdev, cfg_addr, val);
}

static int uli_scr_read(struct ata_link *link, unsigned int sc_reg, u32 *val)
{
	if (sc_reg > SCR_CONTROL)
		return -EINVAL;

	*val = uli_scr_cfg_read(link, sc_reg);
	return 0;
}

static int uli_scr_write(struct ata_link *link, unsigned int sc_reg, u32 val)
{
	if (sc_reg > SCR_CONTROL) //SCR_CONTROL=2, SCR_ERROR=1, SCR_STATUS=0
		return -EINVAL;

	uli_scr_cfg_write(link, sc_reg, val);
	return 0;
}

static int uli_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
{
	const struct ata_port_info *ppi[] = { &uli_port_info, NULL };
	unsigned int board_idx = (unsigned int) ent->driver_data;
	struct ata_host *host;
	struct uli_priv *hpriv;
	void __iomem * const *iomap;
	struct ata_ioports *ioaddr;
	int n_ports, rc;

	ata_print_version_once(&pdev->dev, DRV_VERSION);

	rc = pcim_enable_device(pdev);
	if (rc)
		return rc;

	n_ports = 2;
	if (board_idx == uli_5287)
		n_ports = 4;

	/* allocate the host */
	host = ata_host_alloc_pinfo(&pdev->dev, ppi, n_ports);
	if (!host)
		return -ENOMEM;

	hpriv = devm_kzalloc(&pdev->dev, sizeof(*hpriv), GFP_KERNEL);
	if (!hpriv)
		return -ENOMEM;
	host->private_data = hpriv;

	/* the first two ports are standard SFF */
	rc = ata_pci_sff_init_host(host);
	if (rc)
		return rc;

	ata_pci_bmdma_init(host);

	iomap = host->iomap;

	switch (board_idx) {
	case uli_5287:
		/* If there are four, the last two live right after
		 * the standard SFF ports.
		 */
		hpriv->scr_cfg_addr[0] = ULI5287_BASE;
		hpriv->scr_cfg_addr[1] = ULI5287_BASE + ULI5287_OFFS;

		ioaddr = &host->ports[2]->ioaddr;
		ioaddr->cmd_addr = iomap[0] + 8;
		ioaddr->altstatus_addr =
		ioaddr->ctl_addr = (void __iomem *)
			((unsigned long)iomap[1] | ATA_PCI_CTL_OFS) + 4;
		ioaddr->bmdma_addr = iomap[4] + 16;
		hpriv->scr_cfg_addr[2] = ULI5287_BASE + ULI5287_OFFS*4;
		ata_sff_std_ports(ioaddr);

		ata_port_desc(host->ports[2],
			"cmd 0x%llx ctl 0x%llx bmdma 0x%llx",
			(unsigned long long)pci_resource_start(pdev, 0) + 8,
			((unsigned long long)pci_resource_start(pdev, 1) | ATA_PCI_CTL_OFS) + 4,
			(unsigned long long)pci_resource_start(pdev, 4) + 16);

		ioaddr = &host->ports[3]->ioaddr;
		ioaddr->cmd_addr = iomap[2] + 8;
		ioaddr->altstatus_addr =
		ioaddr->ctl_addr = (void __iomem *)
			((unsigned long)iomap[3] | ATA_PCI_CTL_OFS) + 4;
		ioaddr->bmdma_addr = iomap[4] + 24;
		hpriv->scr_cfg_addr[3] = ULI5287_BASE + ULI5287_OFFS*5;
		ata_sff_std_ports(ioaddr);

		ata_port_desc(host->ports[2],
			"cmd 0x%llx ctl 0x%llx bmdma 0x%llx",
			(unsigned long long)pci_resource_start(pdev, 2) + 9,
			((unsigned long long)pci_resource_start(pdev, 3) | ATA_PCI_CTL_OFS) + 4,
			(unsigned long long)pci_resource_start(pdev, 4) + 24);

		break;

	case uli_5289:
		hpriv->scr_cfg_addr[0] = ULI5287_BASE;
		hpriv->scr_cfg_addr[1] = ULI5287_BASE + ULI5287_OFFS;
		break;

	case uli_5281:
		hpriv->scr_cfg_addr[0] = ULI5281_BASE;
		hpriv->scr_cfg_addr[1] = ULI5281_BASE + ULI5281_OFFS;
		break;

	default:
		BUG();
		break;
	}

	pci_set_master(pdev);
	pci_intx(pdev, 1);
	return ata_host_activate(host, pdev->irq, ata_bmdma_interrupt,
				 IRQF_SHARED, &uli_sht);
}

module_pci_driver(uli_pci_driver);
Commit	Line	Data
c82ee6d3	1	// SPDX-License-Identifier: GPL-2.0-or-later
1da177e4 LT	2	/*
	3	* sata_uli.c - ULi Electronics SATA
	4	*
af36d7f0	5	* libata documentation is available via 'make {ps\|pdf}docs',
19285f3c	6	* as Documentation/driver-api/libata.rst
af36d7f0 JG	7	*
af36d7f0 JG	8	* Hardware documentation available under NDA.
1da177e4 LT	9	*/
1da177e4 LT	10
1da177e4 LT	11	#include <linux/kernel.h>
1da177e4 LT	12	#include <linux/module.h>
5a0e3ad6	13	#include <linux/gfp.h>
1da177e4	14	#include <linux/pci.h>
1da177e4 LT	15	#include <linux/blkdev.h>
	16	#include <linux/delay.h>
	17	#include <linux/interrupt.h>
a9524a76	18	#include <linux/device.h>
1da177e4 LT	19	#include <scsi/scsi_host.h>
	20	#include <linux/libata.h>
	21
	22	#define DRV_NAME "sata_uli"
2a3103ce	23	#define DRV_VERSION "1.3"
1da177e4 LT	24
	25	enum {
	26	uli_5289 = 0,
	27	uli_5287 = 1,
	28	uli_5281 = 2,
	29
50106c5a JG	30	uli_max_ports = 4,
50106c5a JG	31
1da177e4 LT	32	/* PCI configuration registers */
	33	ULI5287_BASE = 0x90, /* sata0 phy SCR registers */
	34	ULI5287_OFFS = 0x10, /* offset from sata0->sata1 phy regs */
	35	ULI5281_BASE = 0x60, /* sata0 phy SCR registers */
	36	ULI5281_OFFS = 0x60, /* offset from sata0->sata1 phy regs */
	37	};
	38
50106c5a JG	39	struct uli_priv {
	40	unsigned int scr_cfg_addr[uli_max_ports];
	41	};
	42
5796d1c4	43	static int uli_init_one(struct pci_dev pdev, const struct pci_device_id ent);
82ef04fb TH	44	static int uli_scr_read(struct ata_link link, unsigned int sc_reg, u32 val);
82ef04fb TH	45	static int uli_scr_write(struct ata_link *link, unsigned int sc_reg, u32 val);
1da177e4	46
3b7d697d	47	static const struct pci_device_id uli_pci_tbl[] = {
54bb3a94 JG	48	{ PCI_VDEVICE(AL, 0x5289), uli_5289 },
	49	{ PCI_VDEVICE(AL, 0x5287), uli_5287 },
	50	{ PCI_VDEVICE(AL, 0x5281), uli_5281 },
	51
1da177e4 LT	52	{ } /* terminate list */
	53	};
	54
1da177e4 LT	55	static struct pci_driver uli_pci_driver = {
	56	.name = DRV_NAME,
	57	.id_table = uli_pci_tbl,
	58	.probe = uli_init_one,
	59	.remove = ata_pci_remove_one,
	60	};
	61
193515d5	62	static struct scsi_host_template uli_sht = {
68d1d07b	63	ATA_BMDMA_SHT(DRV_NAME),
1da177e4 LT	64	};
1da177e4 LT	65
029cfd6b TH	66	static struct ata_port_operations uli_ops = {
029cfd6b TH	67	.inherits = &ata_bmdma_port_ops,
1da177e4 LT	68	.scr_read = uli_scr_read,
1da177e4 LT	69	.scr_write = uli_scr_write,
70a3143a	70	.hardreset = ATA_OP_NULL,
1da177e4 LT	71	};
1da177e4 LT	72
1626aeb8	73	static const struct ata_port_info uli_port_info = {
9cbe056f	74	.flags = ATA_FLAG_SATA \| ATA_FLAG_IGN_SIMPLEX,
14bdef98	75	.pio_mask = ATA_PIO4,
bf6263a8	76	.udma_mask = ATA_UDMA6,
1da177e4 LT	77	.port_ops = &uli_ops,
	78	};
	79
	80
	81	MODULE_AUTHOR("Peer Chen");
	82	MODULE_DESCRIPTION("low-level driver for ULi Electronics SATA controller");
	83	MODULE_LICENSE("GPL");
	84	MODULE_DEVICE_TABLE(pci, uli_pci_tbl);
	85	MODULE_VERSION(DRV_VERSION);
	86
	87	static unsigned int get_scr_cfg_addr(struct ata_port *ap, unsigned int sc_reg)
	88	{
cca3974e	89	struct uli_priv *hpriv = ap->host->private_data;
50106c5a	90	return hpriv->scr_cfg_addr[ap->port_no] + (4 * sc_reg);
1da177e4 LT	91	}
1da177e4 LT	92
82ef04fb	93	static u32 uli_scr_cfg_read(struct ata_link *link, unsigned int sc_reg)
1da177e4	94	{
82ef04fb TH	95	struct pci_dev *pdev = to_pci_dev(link->ap->host->dev);
82ef04fb TH	96	unsigned int cfg_addr = get_scr_cfg_addr(link->ap, sc_reg);
1da177e4 LT	97	u32 val;
	98
	99	pci_read_config_dword(pdev, cfg_addr, &val);
	100	return val;
	101	}
	102
82ef04fb	103	static void uli_scr_cfg_write(struct ata_link *link, unsigned int scr, u32 val)
1da177e4	104	{
82ef04fb TH	105	struct pci_dev *pdev = to_pci_dev(link->ap->host->dev);
82ef04fb TH	106	unsigned int cfg_addr = get_scr_cfg_addr(link->ap, scr);
1da177e4 LT	107
	108	pci_write_config_dword(pdev, cfg_addr, val);
	109	}
	110
82ef04fb	111	static int uli_scr_read(struct ata_link link, unsigned int sc_reg, u32 val)
1da177e4 LT	112	{
1da177e4 LT	113	if (sc_reg > SCR_CONTROL)
da3dbb17	114	return -EINVAL;
1da177e4	115
82ef04fb	116	*val = uli_scr_cfg_read(link, sc_reg);
da3dbb17	117	return 0;
1da177e4 LT	118	}
1da177e4 LT	119
82ef04fb	120	static int uli_scr_write(struct ata_link *link, unsigned int sc_reg, u32 val)
1da177e4	121	{
5796d1c4	122	if (sc_reg > SCR_CONTROL) //SCR_CONTROL=2, SCR_ERROR=1, SCR_STATUS=0
da3dbb17	123	return -EINVAL;
1da177e4	124
82ef04fb	125	uli_scr_cfg_write(link, sc_reg, val);
da3dbb17	126	return 0;
1da177e4 LT	127	}
1da177e4 LT	128
5796d1c4	129	static int uli_init_one(struct pci_dev pdev, const struct pci_device_id ent)
1da177e4	130	{
9a829ccf	131	const struct ata_port_info *ppi[] = { &uli_port_info, NULL };
1da177e4	132	unsigned int board_idx = (unsigned int) ent->driver_data;
9a829ccf	133	struct ata_host *host;
50106c5a	134	struct uli_priv *hpriv;
0d5ff566	135	void __iomem * const *iomap;
9a829ccf TH	136	struct ata_ioports *ioaddr;
9a829ccf TH	137	int n_ports, rc;
1da177e4	138
06296a1e	139	ata_print_version_once(&pdev->dev, DRV_VERSION);
a9524a76	140
24dc5f33	141	rc = pcim_enable_device(pdev);
1da177e4 LT	142	if (rc)
	143	return rc;
	144
9a829ccf TH	145	n_ports = 2;
	146	if (board_idx == uli_5287)
	147	n_ports = 4;
1626aeb8 TH	148
	149	/* allocate the host */
	150	host = ata_host_alloc_pinfo(&pdev->dev, ppi, n_ports);
	151	if (!host)
	152	return -ENOMEM;
1da177e4	153
24dc5f33 TH	154	hpriv = devm_kzalloc(&pdev->dev, sizeof(*hpriv), GFP_KERNEL);
	155	if (!hpriv)
	156	return -ENOMEM;
9a829ccf	157	host->private_data = hpriv;
50106c5a	158
1626aeb8	159	/* the first two ports are standard SFF */
9363c382	160	rc = ata_pci_sff_init_host(host);
1626aeb8 TH	161	if (rc)
	162	return rc;
	163
c7087652	164	ata_pci_bmdma_init(host);
1626aeb8	165
9a829ccf	166	iomap = host->iomap;
0d5ff566	167
1da177e4 LT	168	switch (board_idx) {
1da177e4 LT	169	case uli_5287:
1626aeb8 TH	170	/* If there are four, the last two live right after
	171	* the standard SFF ports.
	172	*/
50106c5a JG	173	hpriv->scr_cfg_addr[0] = ULI5287_BASE;
50106c5a JG	174	hpriv->scr_cfg_addr[1] = ULI5287_BASE + ULI5287_OFFS;
1da177e4	175
9a829ccf TH	176	ioaddr = &host->ports[2]->ioaddr;
	177	ioaddr->cmd_addr = iomap[0] + 8;
	178	ioaddr->altstatus_addr =
	179	ioaddr->ctl_addr = (void __iomem *)
0d5ff566	180	((unsigned long)iomap[1] \| ATA_PCI_CTL_OFS) + 4;
9a829ccf	181	ioaddr->bmdma_addr = iomap[4] + 16;
50106c5a	182	hpriv->scr_cfg_addr[2] = ULI5287_BASE + ULI5287_OFFS*4;
9363c382	183	ata_sff_std_ports(ioaddr);
1da177e4	184
cbcdd875 TH	185	ata_port_desc(host->ports[2],
	186	"cmd 0x%llx ctl 0x%llx bmdma 0x%llx",
	187	(unsigned long long)pci_resource_start(pdev, 0) + 8,
	188	((unsigned long long)pci_resource_start(pdev, 1) \| ATA_PCI_CTL_OFS) + 4,
	189	(unsigned long long)pci_resource_start(pdev, 4) + 16);
	190
9a829ccf TH	191	ioaddr = &host->ports[3]->ioaddr;
	192	ioaddr->cmd_addr = iomap[2] + 8;
	193	ioaddr->altstatus_addr =
	194	ioaddr->ctl_addr = (void __iomem *)
0d5ff566	195	((unsigned long)iomap[3] \| ATA_PCI_CTL_OFS) + 4;
9a829ccf	196	ioaddr->bmdma_addr = iomap[4] + 24;
50106c5a	197	hpriv->scr_cfg_addr[3] = ULI5287_BASE + ULI5287_OFFS*5;
9363c382	198	ata_sff_std_ports(ioaddr);
cbcdd875 TH	199
	200	ata_port_desc(host->ports[2],
	201	"cmd 0x%llx ctl 0x%llx bmdma 0x%llx",
	202	(unsigned long long)pci_resource_start(pdev, 2) + 9,
	203	((unsigned long long)pci_resource_start(pdev, 3) \| ATA_PCI_CTL_OFS) + 4,
	204	(unsigned long long)pci_resource_start(pdev, 4) + 24);
	205
1da177e4 LT	206	break;
	207
	208	case uli_5289:
50106c5a JG	209	hpriv->scr_cfg_addr[0] = ULI5287_BASE;
50106c5a JG	210	hpriv->scr_cfg_addr[1] = ULI5287_BASE + ULI5287_OFFS;
1da177e4 LT	211	break;
	212
	213	case uli_5281:
50106c5a JG	214	hpriv->scr_cfg_addr[0] = ULI5281_BASE;
50106c5a JG	215	hpriv->scr_cfg_addr[1] = ULI5281_BASE + ULI5281_OFFS;
1da177e4 LT	216	break;
	217
	218	default:
	219	BUG();
	220	break;
	221	}
	222
	223	pci_set_master(pdev);
a04ce0ff	224	pci_intx(pdev, 1);
c3b28894	225	return ata_host_activate(host, pdev->irq, ata_bmdma_interrupt,
9363c382	226	IRQF_SHARED, &uli_sht);
1da177e4 LT	227	}
1da177e4 LT	228
2fc75da0	229	module_pci_driver(uli_pci_driver);