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ATM-nicstar: Improve another size determination in get_scq()
[mirror_ubuntu-bionic-kernel.git] / drivers / atm / nicstar.c
CommitLineData
098fde11 1/*
1da177e4
LT		 2 * nicstar.c
3 *
4 * Device driver supporting CBR for IDT 77201/77211 "NICStAR" based cards.
5 *
6 * IMPORTANT: The included file nicstarmac.c was NOT WRITTEN BY ME.
7 * It was taken from the frle-0.22 device driver.
8 * As the file doesn't have a copyright notice, in the file
9 * nicstarmac.copyright I put the copyright notice from the
10 * frle-0.22 device driver.
11 * Some code is based on the nicstar driver by M. Welsh.
12 *
13 * Author: Rui Prior (rprior@inescn.pt)
14 * PowerPC support by Jay Talbott (jay_talbott@mcg.mot.com) April 1999
15 *
16 *
17 * (C) INESC 1999
098fde11 18 */
1da177e4 19
098fde11
C		 20/*
21 * IMPORTANT INFORMATION
1da177e4
LT		 22 *
23 * There are currently three types of spinlocks:
24 *
25 * 1 - Per card interrupt spinlock (to protect structures and such)
26 * 2 - Per SCQ scq spinlock
27 * 3 - Per card resource spinlock (to access registers, etc.)
28 *
29 * These must NEVER be grabbed in reverse order.
30 *
098fde11 31 */
1da177e4 32
098fde11 33/* Header files */
1da177e4
LT		 34
35#include <linux/module.h>
1da177e4
LT		 36#include <linux/kernel.h>
37#include <linux/skbuff.h>
38#include <linux/atmdev.h>
39#include <linux/atm.h>
40#include <linux/pci.h>
864a3ff6 41#include <linux/dma-mapping.h>
1da177e4
LT		 42#include <linux/types.h>
43#include <linux/string.h>
44#include <linux/delay.h>
45#include <linux/init.h>
46#include <linux/sched.h>
47#include <linux/timer.h>
48#include <linux/interrupt.h>
49#include <linux/bitops.h>
5a0e3ad6 50#include <linux/slab.h>
864a3ff6 51#include <linux/idr.h>
1da177e4
LT		 52#include <asm/io.h>
53#include <asm/uaccess.h>
60063497 54#include <linux/atomic.h>
4c55a462 55#include <linux/etherdevice.h>
1da177e4
LT		 56#include "nicstar.h"
57#ifdef CONFIG_ATM_NICSTAR_USE_SUNI
58#include "suni.h"
59#endif /* CONFIG_ATM_NICSTAR_USE_SUNI */
60#ifdef CONFIG_ATM_NICSTAR_USE_IDT77105
61#include "idt77105.h"
62#endif /* CONFIG_ATM_NICSTAR_USE_IDT77105 */
63
098fde11 64/* Additional code */
1da177e4
LT		 65
66#include "nicstarmac.c"
67
098fde11 68/* Configurable parameters */
1da177e4
LT		 69
70#undef PHY_LOOPBACK
71#undef TX_DEBUG
72#undef RX_DEBUG
73#undef GENERAL_DEBUG
74#undef EXTRA_DEBUG
75
098fde11 76/* Do not touch these */
1da177e4
LT		 77
78#ifdef TX_DEBUG
79#define TXPRINTK(args...) printk(args)
80#else
81#define TXPRINTK(args...)
82#endif /* TX_DEBUG */
83
84#ifdef RX_DEBUG
85#define RXPRINTK(args...) printk(args)
86#else
87#define RXPRINTK(args...)
88#endif /* RX_DEBUG */
89
90#ifdef GENERAL_DEBUG
91#define PRINTK(args...) printk(args)
92#else
93#define PRINTK(args...)
94#endif /* GENERAL_DEBUG */
95
96#ifdef EXTRA_DEBUG
97#define XPRINTK(args...) printk(args)
98#else
99#define XPRINTK(args...)
100#endif /* EXTRA_DEBUG */
101
098fde11 102/* Macros */
1da177e4
LT		 103
104#define CMD_BUSY(card) (readl((card)->membase + STAT) & NS_STAT_CMDBZ)
105
106#define NS_DELAY mdelay(1)
107
864a3ff6 108#define PTR_DIFF(a, b) ((u32)((unsigned long)(a) - (unsigned long)(b)))
1da177e4
LT		 109
110#ifndef ATM_SKB
111#define ATM_SKB(s) (&(s)->atm)
112#endif
113
864a3ff6
C		 114#define scq_virt_to_bus(scq, p) \
115 (scq->dma + ((unsigned long)(p) - (unsigned long)(scq)->org))
116
098fde11 117/* Function declarations */
1da177e4 118
098fde11
C		 119static u32 ns_read_sram(ns_dev * card, u32 sram_address);
120static void ns_write_sram(ns_dev * card, u32 sram_address, u32 * value,
121 int count);
6c44512d
GKH		 122static int ns_init_card(int i, struct pci_dev *pcidev);
123static void ns_init_card_error(ns_dev * card, int error);
864a3ff6
C		 124static scq_info *get_scq(ns_dev *card, int size, u32 scd);
125static void free_scq(ns_dev *card, scq_info * scq, struct atm_vcc *vcc);
8728b834 126static void push_rxbufs(ns_dev *, struct sk_buff *);
7d12e780 127static irqreturn_t ns_irq_handler(int irq, void *dev_id);
1da177e4
LT		 128static int ns_open(struct atm_vcc *vcc);
129static void ns_close(struct atm_vcc *vcc);
098fde11 130static void fill_tst(ns_dev * card, int n, vc_map * vc);
1da177e4 131static int ns_send(struct atm_vcc *vcc, struct sk_buff *skb);
098fde11
C		 132static int push_scqe(ns_dev * card, vc_map * vc, scq_info * scq, ns_scqe * tbd,
133 struct sk_buff *skb);
134static void process_tsq(ns_dev * card);
135static void drain_scq(ns_dev * card, scq_info * scq, int pos);
136static void process_rsq(ns_dev * card);
137static void dequeue_rx(ns_dev * card, ns_rsqe * rsqe);
098fde11
C		 138static void recycle_rx_buf(ns_dev * card, struct sk_buff *skb);
139static void recycle_iovec_rx_bufs(ns_dev * card, struct iovec *iov, int count);
140static void recycle_iov_buf(ns_dev * card, struct sk_buff *iovb);
141static void dequeue_sm_buf(ns_dev * card, struct sk_buff *sb);
142static void dequeue_lg_buf(ns_dev * card, struct sk_buff *lb);
143static int ns_proc_read(struct atm_dev *dev, loff_t * pos, char *page);
144static int ns_ioctl(struct atm_dev *dev, unsigned int cmd, void __user * arg);
864a3ff6 145#ifdef EXTRA_DEBUG
098fde11 146static void which_list(ns_dev * card, struct sk_buff *skb);
864a3ff6 147#endif
1da177e4 148static void ns_poll(unsigned long arg);
1da177e4 149static void ns_phy_put(struct atm_dev *dev, unsigned char value,
098fde11 150 unsigned long addr);
1da177e4
LT		 151static unsigned char ns_phy_get(struct atm_dev *dev, unsigned long addr);
152
098fde11 153/* Global variables */
1da177e4
LT		 154
155static struct ns_dev *cards[NS_MAX_CARDS];
156static unsigned num_cards;
098fde11
C		 157static struct atmdev_ops atm_ops = {
158 .open = ns_open,
159 .close = ns_close,
160 .ioctl = ns_ioctl,
161 .send = ns_send,
162 .phy_put = ns_phy_put,
163 .phy_get = ns_phy_get,
164 .proc_read = ns_proc_read,
165 .owner = THIS_MODULE,
1da177e4 166};
098fde11 167
1da177e4
LT		 168static struct timer_list ns_timer;
169static char *mac[NS_MAX_CARDS];
170module_param_array(mac, charp, NULL, 0);
171MODULE_LICENSE("GPL");
172
098fde11 173/* Functions */
1da177e4 174
6c44512d
GKH		 175static int nicstar_init_one(struct pci_dev *pcidev,
176 const struct pci_device_id *ent)
1da177e4 177{
098fde11
C		 178 static int index = -1;
179 unsigned int error;
1da177e4 180
098fde11
C		 181 index++;
182 cards[index] = NULL;
1da177e4 183
098fde11
C		 184 error = ns_init_card(index, pcidev);
185 if (error) {
186 cards[index--] = NULL; /* don't increment index */
187 goto err_out;
188 }
1da177e4 189
098fde11 190 return 0;
1da177e4 191err_out:
098fde11 192 return -ENODEV;
1da177e4
LT		 193}
194
6c44512d 195static void nicstar_remove_one(struct pci_dev *pcidev)
1da177e4 196{
098fde11
C		 197 int i, j;
198 ns_dev *card = pci_get_drvdata(pcidev);
199 struct sk_buff *hb;
200 struct sk_buff *iovb;
201 struct sk_buff *lb;
202 struct sk_buff *sb;
203
204 i = card->index;
205
206 if (cards[i] == NULL)
207 return;
208
209 if (card->atmdev->phy && card->atmdev->phy->stop)
210 card->atmdev->phy->stop(card->atmdev);
211
212 /* Stop everything */
213 writel(0x00000000, card->membase + CFG);
214
215 /* De-register device */
216 atm_dev_deregister(card->atmdev);
217
218 /* Disable PCI device */
219 pci_disable_device(pcidev);
220
221 /* Free up resources */
222 j = 0;
223 PRINTK("nicstar%d: freeing %d huge buffers.\n", i, card->hbpool.count);
224 while ((hb = skb_dequeue(&card->hbpool.queue)) != NULL) {
225 dev_kfree_skb_any(hb);
226 j++;
227 }
228 PRINTK("nicstar%d: %d huge buffers freed.\n", i, j);
229 j = 0;
230 PRINTK("nicstar%d: freeing %d iovec buffers.\n", i,
231 card->iovpool.count);
232 while ((iovb = skb_dequeue(&card->iovpool.queue)) != NULL) {
233 dev_kfree_skb_any(iovb);
234 j++;
235 }
236 PRINTK("nicstar%d: %d iovec buffers freed.\n", i, j);
237 while ((lb = skb_dequeue(&card->lbpool.queue)) != NULL)
238 dev_kfree_skb_any(lb);
239 while ((sb = skb_dequeue(&card->sbpool.queue)) != NULL)
240 dev_kfree_skb_any(sb);
864a3ff6 241 free_scq(card, card->scq0, NULL);
098fde11
C		 242 for (j = 0; j < NS_FRSCD_NUM; j++) {
243 if (card->scd2vc[j] != NULL)
864a3ff6
C		 244 free_scq(card, card->scd2vc[j]->scq, card->scd2vc[j]->tx_vcc);
245 }
864a3ff6 246 idr_destroy(&card->idr);
ede58ef2
C		 247 dma_free_coherent(&card->pcidev->dev, NS_RSQSIZE + NS_RSQ_ALIGNMENT,
248 card->rsq.org, card->rsq.dma);
249 dma_free_coherent(&card->pcidev->dev, NS_TSQSIZE + NS_TSQ_ALIGNMENT,
250 card->tsq.org, card->tsq.dma);
098fde11
C		 251 free_irq(card->pcidev->irq, card);
252 iounmap(card->membase);
253 kfree(card);
1da177e4
LT		 254}
255
6c44512d 256static struct pci_device_id nicstar_pci_tbl[] = {
6df7b80c 257 { PCI_VDEVICE(IDT, PCI_DEVICE_ID_IDT_IDT77201), 0 },
1da177e4
LT		 258 {0,} /* terminate list */
259};
1da177e4 260
098fde11 261MODULE_DEVICE_TABLE(pci, nicstar_pci_tbl);
1da177e4
LT		 262
263static struct pci_driver nicstar_driver = {
098fde11
C		 264 .name = "nicstar",
265 .id_table = nicstar_pci_tbl,
266 .probe = nicstar_init_one,
6c44512d 267 .remove = nicstar_remove_one,
1da177e4
LT		 268};
269
1da177e4
LT		 270static int __init nicstar_init(void)
271{
098fde11 272 unsigned error = 0; /* Initialized to remove compile warning */
1da177e4 273
098fde11 274 XPRINTK("nicstar: nicstar_init() called.\n");
1da177e4 275
098fde11
C		 276 error = pci_register_driver(&nicstar_driver);
277
278 TXPRINTK("nicstar: TX debug enabled.\n");
279 RXPRINTK("nicstar: RX debug enabled.\n");
280 PRINTK("nicstar: General debug enabled.\n");
1da177e4 281#ifdef PHY_LOOPBACK
098fde11 282 printk("nicstar: using PHY loopback.\n");
1da177e4 283#endif /* PHY_LOOPBACK */
098fde11 284 XPRINTK("nicstar: nicstar_init() returned.\n");
1da177e4 285
098fde11
C		 286 if (!error) {
287 init_timer(&ns_timer);
288 ns_timer.expires = jiffies + NS_POLL_PERIOD;
289 ns_timer.data = 0UL;
290 ns_timer.function = ns_poll;
291 add_timer(&ns_timer);
292 }
1da177e4 293
098fde11
C		 294 return error;
295}
1da177e4
LT		 296
297static void __exit nicstar_cleanup(void)
298{
098fde11 299 XPRINTK("nicstar: nicstar_cleanup() called.\n");
1da177e4 300
098fde11 301 del_timer(&ns_timer);
1da177e4 302
098fde11 303 pci_unregister_driver(&nicstar_driver);
1da177e4 304
098fde11 305 XPRINTK("nicstar: nicstar_cleanup() returned.\n");
1da177e4
LT		 306}
307
098fde11 308static u32 ns_read_sram(ns_dev * card, u32 sram_address)
1da177e4 309{
098fde11
C		 310 unsigned long flags;
311 u32 data;
312 sram_address <<= 2;
313 sram_address &= 0x0007FFFC; /* address must be dword aligned */
314 sram_address |= 0x50000000; /* SRAM read command */
315 spin_lock_irqsave(&card->res_lock, flags);
316 while (CMD_BUSY(card)) ;
317 writel(sram_address, card->membase + CMD);
318 while (CMD_BUSY(card)) ;
319 data = readl(card->membase + DR0);
320 spin_unlock_irqrestore(&card->res_lock, flags);
321 return data;
1da177e4
LT		 322}
323
098fde11
C		 324static void ns_write_sram(ns_dev * card, u32 sram_address, u32 * value,
325 int count)
1da177e4 326{
098fde11
C		 327 unsigned long flags;
328 int i, c;
329 count--; /* count range now is 0..3 instead of 1..4 */
330 c = count;
331 c <<= 2; /* to use increments of 4 */
332 spin_lock_irqsave(&card->res_lock, flags);
333 while (CMD_BUSY(card)) ;
334 for (i = 0; i <= c; i += 4)
335 writel(*(value++), card->membase + i);
336 /* Note: DR# registers are the first 4 dwords in nicstar's memspace,
337 so card->membase + DR0 == card->membase */
338 sram_address <<= 2;
339 sram_address &= 0x0007FFFC;
340 sram_address |= (0x40000000 | count);
341 writel(sram_address, card->membase + CMD);
342 spin_unlock_irqrestore(&card->res_lock, flags);
1da177e4
LT		 343}
344
6c44512d 345static int ns_init_card(int i, struct pci_dev *pcidev)
1da177e4 346{
098fde11
C		 347 int j;
348 struct ns_dev *card = NULL;
349 unsigned char pci_latency;
350 unsigned error;
351 u32 data;
352 u32 u32d[4];
353 u32 ns_cfg_rctsize;
354 int bcount;
355 unsigned long membase;
356
357 error = 0;
358
359 if (pci_enable_device(pcidev)) {
360 printk("nicstar%d: can't enable PCI device\n", i);
361 error = 2;
362 ns_init_card_error(card, error);
363 return error;
364 }
ede58ef2 365 if (dma_set_mask_and_coherent(&pcidev->dev, DMA_BIT_MASK(32)) != 0) {
864a3ff6
C		 366 printk(KERN_WARNING
367 "nicstar%d: No suitable DMA available.\n", i);
368 error = 2;
369 ns_init_card_error(card, error);
370 return error;
371 }
098fde11
C		 372
373 if ((card = kmalloc(sizeof(ns_dev), GFP_KERNEL)) == NULL) {
374 printk
375 ("nicstar%d: can't allocate memory for device structure.\n",
376 i);
377 error = 2;
378 ns_init_card_error(card, error);
379 return error;
380 }
381 cards[i] = card;
382 spin_lock_init(&card->int_lock);
383 spin_lock_init(&card->res_lock);
384
385 pci_set_drvdata(pcidev, card);
386
387 card->index = i;
388 card->atmdev = NULL;
389 card->pcidev = pcidev;
390 membase = pci_resource_start(pcidev, 1);
391 card->membase = ioremap(membase, NS_IOREMAP_SIZE);
392 if (!card->membase) {
393 printk("nicstar%d: can't ioremap() membase.\n", i);
394 error = 3;
395 ns_init_card_error(card, error);
396 return error;
397 }
864a3ff6 398 PRINTK("nicstar%d: membase at 0x%p.\n", i, card->membase);
098fde11
C		 399
400 pci_set_master(pcidev);
401
402 if (pci_read_config_byte(pcidev, PCI_LATENCY_TIMER, &pci_latency) != 0) {
403 printk("nicstar%d: can't read PCI latency timer.\n", i);
404 error = 6;
405 ns_init_card_error(card, error);
406 return error;
407 }
1da177e4 408#ifdef NS_PCI_LATENCY
098fde11
C		 409 if (pci_latency < NS_PCI_LATENCY) {
410 PRINTK("nicstar%d: setting PCI latency timer to %d.\n", i,
411 NS_PCI_LATENCY);
412 for (j = 1; j < 4; j++) {
413 if (pci_write_config_byte
414 (pcidev, PCI_LATENCY_TIMER, NS_PCI_LATENCY) != 0)
415 break;
416 }
417 if (j == 4) {
418 printk
419 ("nicstar%d: can't set PCI latency timer to %d.\n",
420 i, NS_PCI_LATENCY);
421 error = 7;
422 ns_init_card_error(card, error);
423 return error;
424 }
425 }
1da177e4 426#endif /* NS_PCI_LATENCY */
098fde11
C		 427
428 /* Clear timer overflow */
429 data = readl(card->membase + STAT);
430 if (data & NS_STAT_TMROF)
431 writel(NS_STAT_TMROF, card->membase + STAT);
432
433 /* Software reset */
434 writel(NS_CFG_SWRST, card->membase + CFG);
435 NS_DELAY;
436 writel(0x00000000, card->membase + CFG);
437
438 /* PHY reset */
439 writel(0x00000008, card->membase + GP);
440 NS_DELAY;
441 writel(0x00000001, card->membase + GP);
442 NS_DELAY;
443 while (CMD_BUSY(card)) ;
444 writel(NS_CMD_WRITE_UTILITY | 0x00000100, card->membase + CMD); /* Sync UTOPIA with SAR clock */
445 NS_DELAY;
446
447 /* Detect PHY type */
448 while (CMD_BUSY(card)) ;
449 writel(NS_CMD_READ_UTILITY | 0x00000200, card->membase + CMD);
450 while (CMD_BUSY(card)) ;
451 data = readl(card->membase + DR0);
452 switch (data) {
453 case 0x00000009:
454 printk("nicstar%d: PHY seems to be 25 Mbps.\n", i);
455 card->max_pcr = ATM_25_PCR;
456 while (CMD_BUSY(card)) ;
457 writel(0x00000008, card->membase + DR0);
458 writel(NS_CMD_WRITE_UTILITY | 0x00000200, card->membase + CMD);
459 /* Clear an eventual pending interrupt */
460 writel(NS_STAT_SFBQF, card->membase + STAT);
1da177e4 461#ifdef PHY_LOOPBACK
098fde11
C		 462 while (CMD_BUSY(card)) ;
463 writel(0x00000022, card->membase + DR0);
464 writel(NS_CMD_WRITE_UTILITY | 0x00000202, card->membase + CMD);
1da177e4 465#endif /* PHY_LOOPBACK */
098fde11
C		 466 break;
467 case 0x00000030:
468 case 0x00000031:
469 printk("nicstar%d: PHY seems to be 155 Mbps.\n", i);
470 card->max_pcr = ATM_OC3_PCR;
1da177e4 471#ifdef PHY_LOOPBACK
098fde11
C		 472 while (CMD_BUSY(card)) ;
473 writel(0x00000002, card->membase + DR0);
474 writel(NS_CMD_WRITE_UTILITY | 0x00000205, card->membase + CMD);
1da177e4 475#endif /* PHY_LOOPBACK */
098fde11
C		 476 break;
477 default:
478 printk("nicstar%d: unknown PHY type (0x%08X).\n", i, data);
479 error = 8;
480 ns_init_card_error(card, error);
481 return error;
482 }
483 writel(0x00000000, card->membase + GP);
484
485 /* Determine SRAM size */
486 data = 0x76543210;
487 ns_write_sram(card, 0x1C003, &data, 1);
488 data = 0x89ABCDEF;
489 ns_write_sram(card, 0x14003, &data, 1);
490 if (ns_read_sram(card, 0x14003) == 0x89ABCDEF &&
491 ns_read_sram(card, 0x1C003) == 0x76543210)
492 card->sram_size = 128;
493 else
494 card->sram_size = 32;
495 PRINTK("nicstar%d: %dK x 32bit SRAM size.\n", i, card->sram_size);
496
497 card->rct_size = NS_MAX_RCTSIZE;
1da177e4
LT		 498
499#if (NS_MAX_RCTSIZE == 4096)
098fde11
C		 500 if (card->sram_size == 128)
501 printk
502 ("nicstar%d: limiting maximum VCI. See NS_MAX_RCTSIZE in nicstar.h\n",
503 i);
1da177e4 504#elif (NS_MAX_RCTSIZE == 16384)
098fde11
C		 505 if (card->sram_size == 32) {
506 printk
507 ("nicstar%d: wasting memory. See NS_MAX_RCTSIZE in nicstar.h\n",
508 i);
509 card->rct_size = 4096;
510 }
1da177e4
LT		 511#else
512#error NS_MAX_RCTSIZE must be either 4096 or 16384 in nicstar.c
513#endif
514
098fde11
C		 515 card->vpibits = NS_VPIBITS;
516 if (card->rct_size == 4096)
517 card->vcibits = 12 - NS_VPIBITS;
518 else /* card->rct_size == 16384 */
519 card->vcibits = 14 - NS_VPIBITS;
520
521 /* Initialize the nicstar eeprom/eprom stuff, for the MAC addr */
522 if (mac[i] == NULL)
523 nicstar_init_eprom(card->membase);
524
525 /* Set the VPI/VCI MSb mask to zero so we can receive OAM cells */
526 writel(0x00000000, card->membase + VPM);
527
528 /* Initialize TSQ */
ede58ef2
C		 529 card->tsq.org = dma_alloc_coherent(&card->pcidev->dev,
530 NS_TSQSIZE + NS_TSQ_ALIGNMENT,
531 &card->tsq.dma, GFP_KERNEL);
098fde11
C		 532 if (card->tsq.org == NULL) {
533 printk("nicstar%d: can't allocate TSQ.\n", i);
534 error = 10;
535 ns_init_card_error(card, error);
536 return error;
537 }
864a3ff6 538 card->tsq.base = PTR_ALIGN(card->tsq.org, NS_TSQ_ALIGNMENT);
098fde11
C		 539 card->tsq.next = card->tsq.base;
540 card->tsq.last = card->tsq.base + (NS_TSQ_NUM_ENTRIES - 1);
541 for (j = 0; j < NS_TSQ_NUM_ENTRIES; j++)
542 ns_tsi_init(card->tsq.base + j);
543 writel(0x00000000, card->membase + TSQH);
864a3ff6
C		 544 writel(ALIGN(card->tsq.dma, NS_TSQ_ALIGNMENT), card->membase + TSQB);
545 PRINTK("nicstar%d: TSQ base at 0x%p.\n", i, card->tsq.base);
098fde11
C		 546
547 /* Initialize RSQ */
ede58ef2
C		 548 card->rsq.org = dma_alloc_coherent(&card->pcidev->dev,
549 NS_RSQSIZE + NS_RSQ_ALIGNMENT,
550 &card->rsq.dma, GFP_KERNEL);
098fde11
C		 551 if (card->rsq.org == NULL) {
552 printk("nicstar%d: can't allocate RSQ.\n", i);
553 error = 11;
554 ns_init_card_error(card, error);
555 return error;
556 }
864a3ff6 557 card->rsq.base = PTR_ALIGN(card->rsq.org, NS_RSQ_ALIGNMENT);
098fde11
C		 558 card->rsq.next = card->rsq.base;
559 card->rsq.last = card->rsq.base + (NS_RSQ_NUM_ENTRIES - 1);
560 for (j = 0; j < NS_RSQ_NUM_ENTRIES; j++)
561 ns_rsqe_init(card->rsq.base + j);
562 writel(0x00000000, card->membase + RSQH);
864a3ff6
C		 563 writel(ALIGN(card->rsq.dma, NS_RSQ_ALIGNMENT), card->membase + RSQB);
564 PRINTK("nicstar%d: RSQ base at 0x%p.\n", i, card->rsq.base);
098fde11
C		 565
566 /* Initialize SCQ0, the only VBR SCQ used */
567 card->scq1 = NULL;
568 card->scq2 = NULL;
864a3ff6 569 card->scq0 = get_scq(card, VBR_SCQSIZE, NS_VRSCD0);
098fde11
C		 570 if (card->scq0 == NULL) {
571 printk("nicstar%d: can't get SCQ0.\n", i);
572 error = 12;
573 ns_init_card_error(card, error);
574 return error;
575 }
864a3ff6 576 u32d[0] = scq_virt_to_bus(card->scq0, card->scq0->base);
098fde11
C		 577 u32d[1] = (u32) 0x00000000;
578 u32d[2] = (u32) 0xffffffff;
579 u32d[3] = (u32) 0x00000000;
580 ns_write_sram(card, NS_VRSCD0, u32d, 4);
581 ns_write_sram(card, NS_VRSCD1, u32d, 4); /* These last two won't be used */
582 ns_write_sram(card, NS_VRSCD2, u32d, 4); /* but are initialized, just in case... */
583 card->scq0->scd = NS_VRSCD0;
864a3ff6 584 PRINTK("nicstar%d: VBR-SCQ0 base at 0x%p.\n", i, card->scq0->base);
098fde11
C		 585
586 /* Initialize TSTs */
587 card->tst_addr = NS_TST0;
588 card->tst_free_entries = NS_TST_NUM_ENTRIES;
589 data = NS_TST_OPCODE_VARIABLE;
590 for (j = 0; j < NS_TST_NUM_ENTRIES; j++)
591 ns_write_sram(card, NS_TST0 + j, &data, 1);
592 data = ns_tste_make(NS_TST_OPCODE_END, NS_TST0);
593 ns_write_sram(card, NS_TST0 + NS_TST_NUM_ENTRIES, &data, 1);
594 for (j = 0; j < NS_TST_NUM_ENTRIES; j++)
595 ns_write_sram(card, NS_TST1 + j, &data, 1);
596 data = ns_tste_make(NS_TST_OPCODE_END, NS_TST1);
597 ns_write_sram(card, NS_TST1 + NS_TST_NUM_ENTRIES, &data, 1);
598 for (j = 0; j < NS_TST_NUM_ENTRIES; j++)
599 card->tste2vc[j] = NULL;
600 writel(NS_TST0 << 2, card->membase + TSTB);
601
602 /* Initialize RCT. AAL type is set on opening the VC. */
1da177e4 603#ifdef RCQ_SUPPORT
098fde11 604 u32d[0] = NS_RCTE_RAWCELLINTEN;
1da177e4 605#else
098fde11 606 u32d[0] = 0x00000000;
1da177e4 607#endif /* RCQ_SUPPORT */
098fde11
C		 608 u32d[1] = 0x00000000;
609 u32d[2] = 0x00000000;
610 u32d[3] = 0xFFFFFFFF;
611 for (j = 0; j < card->rct_size; j++)
612 ns_write_sram(card, j * 4, u32d, 4);
613
614 memset(card->vcmap, 0, NS_MAX_RCTSIZE * sizeof(vc_map));
615
616 for (j = 0; j < NS_FRSCD_NUM; j++)
617 card->scd2vc[j] = NULL;
618
619 /* Initialize buffer levels */
620 card->sbnr.min = MIN_SB;
621 card->sbnr.init = NUM_SB;
622 card->sbnr.max = MAX_SB;
623 card->lbnr.min = MIN_LB;
624 card->lbnr.init = NUM_LB;
625 card->lbnr.max = MAX_LB;
626 card->iovnr.min = MIN_IOVB;
627 card->iovnr.init = NUM_IOVB;
628 card->iovnr.max = MAX_IOVB;
629 card->hbnr.min = MIN_HB;
630 card->hbnr.init = NUM_HB;
631 card->hbnr.max = MAX_HB;
632
c664d638 633 card->sm_handle = NULL;
098fde11 634 card->sm_addr = 0x00000000;
c664d638 635 card->lg_handle = NULL;
098fde11
C		 636 card->lg_addr = 0x00000000;
637
638 card->efbie = 1; /* To prevent push_rxbufs from enabling the interrupt */
639
864a3ff6
C		 640 idr_init(&card->idr);
641
098fde11
C		 642 /* Pre-allocate some huge buffers */
643 skb_queue_head_init(&card->hbpool.queue);
644 card->hbpool.count = 0;
645 for (j = 0; j < NUM_HB; j++) {
646 struct sk_buff *hb;
647 hb = __dev_alloc_skb(NS_HBUFSIZE, GFP_KERNEL);
648 if (hb == NULL) {
649 printk
650 ("nicstar%d: can't allocate %dth of %d huge buffers.\n",
651 i, j, NUM_HB);
652 error = 13;
653 ns_init_card_error(card, error);
654 return error;
655 }
864a3ff6 656 NS_PRV_BUFTYPE(hb) = BUF_NONE;
098fde11
C		 657 skb_queue_tail(&card->hbpool.queue, hb);
658 card->hbpool.count++;
659 }
660
661 /* Allocate large buffers */
662 skb_queue_head_init(&card->lbpool.queue);
663 card->lbpool.count = 0; /* Not used */
664 for (j = 0; j < NUM_LB; j++) {
665 struct sk_buff *lb;
666 lb = __dev_alloc_skb(NS_LGSKBSIZE, GFP_KERNEL);
667 if (lb == NULL) {
668 printk
669 ("nicstar%d: can't allocate %dth of %d large buffers.\n",
670 i, j, NUM_LB);
671 error = 14;
672 ns_init_card_error(card, error);
673 return error;
674 }
864a3ff6 675 NS_PRV_BUFTYPE(lb) = BUF_LG;
098fde11
C		 676 skb_queue_tail(&card->lbpool.queue, lb);
677 skb_reserve(lb, NS_SMBUFSIZE);
678 push_rxbufs(card, lb);
679 /* Due to the implementation of push_rxbufs() this is 1, not 0 */
680 if (j == 1) {
681 card->rcbuf = lb;
864a3ff6
C		 682 card->rawcell = (struct ns_rcqe *) lb->data;
683 card->rawch = NS_PRV_DMA(lb);
098fde11
C		 684 }
685 }
686 /* Test for strange behaviour which leads to crashes */
687 if ((bcount =
688 ns_stat_lfbqc_get(readl(card->membase + STAT))) < card->lbnr.min) {
689 printk
690 ("nicstar%d: Strange... Just allocated %d large buffers and lfbqc = %d.\n",
691 i, j, bcount);
692 error = 14;
693 ns_init_card_error(card, error);
694 return error;
695 }
696
697 /* Allocate small buffers */
698 skb_queue_head_init(&card->sbpool.queue);
699 card->sbpool.count = 0; /* Not used */
700 for (j = 0; j < NUM_SB; j++) {
701 struct sk_buff *sb;
702 sb = __dev_alloc_skb(NS_SMSKBSIZE, GFP_KERNEL);
703 if (sb == NULL) {
704 printk
705 ("nicstar%d: can't allocate %dth of %d small buffers.\n",
706 i, j, NUM_SB);
707 error = 15;
708 ns_init_card_error(card, error);
709 return error;
710 }
864a3ff6 711 NS_PRV_BUFTYPE(sb) = BUF_SM;
098fde11
C		 712 skb_queue_tail(&card->sbpool.queue, sb);
713 skb_reserve(sb, NS_AAL0_HEADER);
714 push_rxbufs(card, sb);
715 }
716 /* Test for strange behaviour which leads to crashes */
717 if ((bcount =
718 ns_stat_sfbqc_get(readl(card->membase + STAT))) < card->sbnr.min) {
719 printk
720 ("nicstar%d: Strange... Just allocated %d small buffers and sfbqc = %d.\n",
721 i, j, bcount);
722 error = 15;
723 ns_init_card_error(card, error);
724 return error;
725 }
726
727 /* Allocate iovec buffers */
728 skb_queue_head_init(&card->iovpool.queue);
729 card->iovpool.count = 0;
730 for (j = 0; j < NUM_IOVB; j++) {
731 struct sk_buff *iovb;
732 iovb = alloc_skb(NS_IOVBUFSIZE, GFP_KERNEL);
733 if (iovb == NULL) {
734 printk
735 ("nicstar%d: can't allocate %dth of %d iovec buffers.\n",
736 i, j, NUM_IOVB);
737 error = 16;
738 ns_init_card_error(card, error);
739 return error;
740 }
864a3ff6 741 NS_PRV_BUFTYPE(iovb) = BUF_NONE;
098fde11
C		 742 skb_queue_tail(&card->iovpool.queue, iovb);
743 card->iovpool.count++;
744 }
745
746 /* Configure NICStAR */
747 if (card->rct_size == 4096)
748 ns_cfg_rctsize = NS_CFG_RCTSIZE_4096_ENTRIES;
749 else /* (card->rct_size == 16384) */
750 ns_cfg_rctsize = NS_CFG_RCTSIZE_16384_ENTRIES;
751
752 card->efbie = 1;
753
754 card->intcnt = 0;
755 if (request_irq
06df277a 756 (pcidev->irq, &ns_irq_handler, IRQF_SHARED, "nicstar", card) != 0) {
098fde11
C		 757 printk("nicstar%d: can't allocate IRQ %d.\n", i, pcidev->irq);
758 error = 9;
759 ns_init_card_error(card, error);
760 return error;
761 }
762
763 /* Register device */
d9ca676b
DW		 764 card->atmdev = atm_dev_register("nicstar", &card->pcidev->dev, &atm_ops,
765 -1, NULL);
098fde11
C		 766 if (card->atmdev == NULL) {
767 printk("nicstar%d: can't register device.\n", i);
768 error = 17;
769 ns_init_card_error(card, error);
770 return error;
771 }
772
d2bb3905 773 if (mac[i] == NULL || !mac_pton(mac[i], card->atmdev->esi)) {
098fde11
C		 774 nicstar_read_eprom(card->membase, NICSTAR_EPROM_MAC_ADDR_OFFSET,
775 card->atmdev->esi, 6);
4c55a462 776 if (ether_addr_equal(card->atmdev->esi, "\x00\x00\x00\x00\x00\x00")) {
098fde11
C		 777 nicstar_read_eprom(card->membase,
778 NICSTAR_EPROM_MAC_ADDR_OFFSET_ALT,
779 card->atmdev->esi, 6);
780 }
781 }
782
783 printk("nicstar%d: MAC address %pM\n", i, card->atmdev->esi);
784
785 card->atmdev->dev_data = card;
786 card->atmdev->ci_range.vpi_bits = card->vpibits;
787 card->atmdev->ci_range.vci_bits = card->vcibits;
788 card->atmdev->link_rate = card->max_pcr;
789 card->atmdev->phy = NULL;
1da177e4
LT		 790
791#ifdef CONFIG_ATM_NICSTAR_USE_SUNI
098fde11
C		 792 if (card->max_pcr == ATM_OC3_PCR)
793 suni_init(card->atmdev);
1da177e4
LT		 794#endif /* CONFIG_ATM_NICSTAR_USE_SUNI */
795
796#ifdef CONFIG_ATM_NICSTAR_USE_IDT77105
098fde11
C		 797 if (card->max_pcr == ATM_25_PCR)
798 idt77105_init(card->atmdev);
1da177e4
LT		 799#endif /* CONFIG_ATM_NICSTAR_USE_IDT77105 */
800
098fde11
C		 801 if (card->atmdev->phy && card->atmdev->phy->start)
802 card->atmdev->phy->start(card->atmdev);
1da177e4 803
098fde11
C		 804 writel(NS_CFG_RXPATH | NS_CFG_SMBUFSIZE | NS_CFG_LGBUFSIZE | NS_CFG_EFBIE | NS_CFG_RSQSIZE | NS_CFG_VPIBITS | ns_cfg_rctsize | NS_CFG_RXINT_NODELAY | NS_CFG_RAWIE | /* Only enabled if RCQ_SUPPORT */
805 NS_CFG_RSQAFIE | NS_CFG_TXEN | NS_CFG_TXIE | NS_CFG_TSQFIE_OPT | /* Only enabled if ENABLE_TSQFIE */
806 NS_CFG_PHYIE, card->membase + CFG);
1da177e4 807
098fde11 808 num_cards++;
1da177e4 809
098fde11 810 return error;
1da177e4
LT		 811}
812
6c44512d 813static void ns_init_card_error(ns_dev *card, int error)
098fde11
C		 814{
815 if (error >= 17) {
816 writel(0x00000000, card->membase + CFG);
817 }
818 if (error >= 16) {
819 struct sk_buff *iovb;
820 while ((iovb = skb_dequeue(&card->iovpool.queue)) != NULL)
821 dev_kfree_skb_any(iovb);
822 }
823 if (error >= 15) {
824 struct sk_buff *sb;
825 while ((sb = skb_dequeue(&card->sbpool.queue)) != NULL)
826 dev_kfree_skb_any(sb);
864a3ff6 827 free_scq(card, card->scq0, NULL);
098fde11
C		 828 }
829 if (error >= 14) {
830 struct sk_buff *lb;
831 while ((lb = skb_dequeue(&card->lbpool.queue)) != NULL)
832 dev_kfree_skb_any(lb);
833 }
834 if (error >= 13) {
835 struct sk_buff *hb;
836 while ((hb = skb_dequeue(&card->hbpool.queue)) != NULL)
837 dev_kfree_skb_any(hb);
838 }
839 if (error >= 12) {
840 kfree(card->rsq.org);
841 }
842 if (error >= 11) {
843 kfree(card->tsq.org);
844 }
845 if (error >= 10) {
846 free_irq(card->pcidev->irq, card);
847 }
848 if (error >= 4) {
849 iounmap(card->membase);
850 }
851 if (error >= 3) {
852 pci_disable_device(card->pcidev);
853 kfree(card);
854 }
855}
1da177e4 856
864a3ff6 857static scq_info *get_scq(ns_dev *card, int size, u32 scd)
1da177e4 858{
098fde11
C		 859 scq_info *scq;
860 int i;
861
862 if (size != VBR_SCQSIZE && size != CBR_SCQSIZE)
863 return NULL;
864
24310fd5 865 scq = kmalloc(sizeof(*scq), GFP_KERNEL);
864a3ff6 866 if (!scq)
098fde11 867 return NULL;
ede58ef2
C		 868 scq->org = dma_alloc_coherent(&card->pcidev->dev,
869 2 * size, &scq->dma, GFP_KERNEL);
864a3ff6 870 if (!scq->org) {
098fde11
C		 871 kfree(scq);
872 return NULL;
873 }
78706121
ME		 874 scq->skb = kmalloc_array(size / NS_SCQE_SIZE,
875 sizeof(*scq->skb),
876 GFP_KERNEL);
864a3ff6 877 if (!scq->skb) {
eab81466
CJ		 878 dma_free_coherent(&card->pcidev->dev,
879 2 * size, scq->org, scq->dma);
098fde11
C		 880 kfree(scq);
881 return NULL;
882 }
883 scq->num_entries = size / NS_SCQE_SIZE;
864a3ff6 884 scq->base = PTR_ALIGN(scq->org, size);
098fde11
C		 885 scq->next = scq->base;
886 scq->last = scq->base + (scq->num_entries - 1);
887 scq->tail = scq->last;
888 scq->scd = scd;
889 scq->num_entries = size / NS_SCQE_SIZE;
890 scq->tbd_count = 0;
891 init_waitqueue_head(&scq->scqfull_waitq);
892 scq->full = 0;
893 spin_lock_init(&scq->lock);
894
895 for (i = 0; i < scq->num_entries; i++)
896 scq->skb[i] = NULL;
897
898 return scq;
1da177e4
LT		 899}
900
1da177e4 901/* For variable rate SCQ vcc must be NULL */
864a3ff6 902static void free_scq(ns_dev *card, scq_info *scq, struct atm_vcc *vcc)
1da177e4 903{
098fde11
C		 904 int i;
905
906 if (scq->num_entries == VBR_SCQ_NUM_ENTRIES)
907 for (i = 0; i < scq->num_entries; i++) {
908 if (scq->skb[i] != NULL) {
909 vcc = ATM_SKB(scq->skb[i])->vcc;
910 if (vcc->pop != NULL)
911 vcc->pop(vcc, scq->skb[i]);
912 else
913 dev_kfree_skb_any(scq->skb[i]);
914 }
915 } else { /* vcc must be != NULL */
916
917 if (vcc == NULL) {
918 printk
919 ("nicstar: free_scq() called with vcc == NULL for fixed rate scq.");
920 for (i = 0; i < scq->num_entries; i++)
921 dev_kfree_skb_any(scq->skb[i]);
922 } else
923 for (i = 0; i < scq->num_entries; i++) {
924 if (scq->skb[i] != NULL) {
925 if (vcc->pop != NULL)
926 vcc->pop(vcc, scq->skb[i]);
927 else
928 dev_kfree_skb_any(scq->skb[i]);
929 }
930 }
931 }
932 kfree(scq->skb);
ede58ef2
C		 933 dma_free_coherent(&card->pcidev->dev,
934 2 * (scq->num_entries == VBR_SCQ_NUM_ENTRIES ?
935 VBR_SCQSIZE : CBR_SCQSIZE),
936 scq->org, scq->dma);
098fde11 937 kfree(scq);
1da177e4
LT		 938}
939
1da177e4
LT		 940/* The handles passed must be pointers to the sk_buff containing the small
941 or large buffer(s) cast to u32. */
098fde11 942static void push_rxbufs(ns_dev * card, struct sk_buff *skb)
1da177e4 943{
864a3ff6 944 struct sk_buff *handle1, *handle2;
b051f6ed 945 int id1, id2;
864a3ff6 946 u32 addr1, addr2;
098fde11
C		 947 u32 stat;
948 unsigned long flags;
949
950 /* *BARF* */
864a3ff6
C		 951 handle2 = NULL;
952 addr2 = 0;
953 handle1 = skb;
ede58ef2 954 addr1 = dma_map_single(&card->pcidev->dev,
864a3ff6
C		 955 skb->data,
956 (NS_PRV_BUFTYPE(skb) == BUF_SM
957 ? NS_SMSKBSIZE : NS_LGSKBSIZE),
ede58ef2 958 DMA_TO_DEVICE);
864a3ff6 959 NS_PRV_DMA(skb) = addr1; /* save so we can unmap later */
1da177e4
LT		 960
961#ifdef GENERAL_DEBUG
098fde11
C		 962 if (!addr1)
963 printk("nicstar%d: push_rxbufs called with addr1 = 0.\n",
964 card->index);
1da177e4
LT		 965#endif /* GENERAL_DEBUG */
966
098fde11
C		 967 stat = readl(card->membase + STAT);
968 card->sbfqc = ns_stat_sfbqc_get(stat);
969 card->lbfqc = ns_stat_lfbqc_get(stat);
864a3ff6 970 if (NS_PRV_BUFTYPE(skb) == BUF_SM) {
098fde11
C		 971 if (!addr2) {
972 if (card->sm_addr) {
973 addr2 = card->sm_addr;
974 handle2 = card->sm_handle;
975 card->sm_addr = 0x00000000;
c664d638 976 card->sm_handle = NULL;
098fde11
C		 977 } else { /* (!sm_addr) */
978
979 card->sm_addr = addr1;
980 card->sm_handle = handle1;
981 }
982 }
983 } else { /* buf_type == BUF_LG */
984
985 if (!addr2) {
986 if (card->lg_addr) {
987 addr2 = card->lg_addr;
988 handle2 = card->lg_handle;
989 card->lg_addr = 0x00000000;
c664d638 990 card->lg_handle = NULL;
098fde11
C		 991 } else { /* (!lg_addr) */
992
993 card->lg_addr = addr1;
994 card->lg_handle = handle1;
995 }
996 }
997 }
998
999 if (addr2) {
864a3ff6 1000 if (NS_PRV_BUFTYPE(skb) == BUF_SM) {
098fde11 1001 if (card->sbfqc >= card->sbnr.max) {
864a3ff6
C		 1002 skb_unlink(handle1, &card->sbpool.queue);
1003 dev_kfree_skb_any(handle1);
1004 skb_unlink(handle2, &card->sbpool.queue);
1005 dev_kfree_skb_any(handle2);
098fde11
C		 1006 return;
1007 } else
1008 card->sbfqc += 2;
1009 } else { /* (buf_type == BUF_LG) */
1010
1011 if (card->lbfqc >= card->lbnr.max) {
864a3ff6
C		 1012 skb_unlink(handle1, &card->lbpool.queue);
1013 dev_kfree_skb_any(handle1);
1014 skb_unlink(handle2, &card->lbpool.queue);
1015 dev_kfree_skb_any(handle2);
098fde11
C		 1016 return;
1017 } else
1018 card->lbfqc += 2;
1019 }
1020
b051f6ed
TH		 1021 id1 = idr_alloc(&card->idr, handle1, 0, 0, GFP_ATOMIC);
1022 if (id1 < 0)
1023 goto out;
098fde11 1024
b051f6ed
TH		 1025 id2 = idr_alloc(&card->idr, handle2, 0, 0, GFP_ATOMIC);
1026 if (id2 < 0)
864a3ff6
C		 1027 goto out;
1028
1029 spin_lock_irqsave(&card->res_lock, flags);
098fde11
C		 1030 while (CMD_BUSY(card)) ;
1031 writel(addr2, card->membase + DR3);
864a3ff6 1032 writel(id2, card->membase + DR2);
098fde11 1033 writel(addr1, card->membase + DR1);
864a3ff6
C		 1034 writel(id1, card->membase + DR0);
1035 writel(NS_CMD_WRITE_FREEBUFQ | NS_PRV_BUFTYPE(skb),
098fde11 1036 card->membase + CMD);
098fde11
C		 1037 spin_unlock_irqrestore(&card->res_lock, flags);
1038
1039 XPRINTK("nicstar%d: Pushing %s buffers at 0x%x and 0x%x.\n",
1040 card->index,
864a3ff6
C		 1041 (NS_PRV_BUFTYPE(skb) == BUF_SM ? "small" : "large"),
1042 addr1, addr2);
098fde11
C		 1043 }
1044
1045 if (!card->efbie && card->sbfqc >= card->sbnr.min &&
1046 card->lbfqc >= card->lbnr.min) {
1047 card->efbie = 1;
1048 writel((readl(card->membase + CFG) | NS_CFG_EFBIE),
1049 card->membase + CFG);
1050 }
1051
864a3ff6 1052out:
098fde11 1053 return;
1da177e4
LT		 1054}
1055
7d12e780 1056static irqreturn_t ns_irq_handler(int irq, void *dev_id)
1da177e4 1057{
098fde11
C		 1058 u32 stat_r;
1059 ns_dev *card;
1060 struct atm_dev *dev;
1061 unsigned long flags;
1062
1063 card = (ns_dev *) dev_id;
1064 dev = card->atmdev;
1065 card->intcnt++;
1066
1067 PRINTK("nicstar%d: NICStAR generated an interrupt\n", card->index);
1068
1069 spin_lock_irqsave(&card->int_lock, flags);
1070
1071 stat_r = readl(card->membase + STAT);
1072
1073 /* Transmit Status Indicator has been written to T. S. Queue */
1074 if (stat_r & NS_STAT_TSIF) {
1075 TXPRINTK("nicstar%d: TSI interrupt\n", card->index);
1076 process_tsq(card);
1077 writel(NS_STAT_TSIF, card->membase + STAT);
1078 }
1079
1080 /* Incomplete CS-PDU has been transmitted */
1081 if (stat_r & NS_STAT_TXICP) {
1082 writel(NS_STAT_TXICP, card->membase + STAT);
1083 TXPRINTK("nicstar%d: Incomplete CS-PDU transmitted.\n",
1084 card->index);
1085 }
1086
1087 /* Transmit Status Queue 7/8 full */
1088 if (stat_r & NS_STAT_TSQF) {
1089 writel(NS_STAT_TSQF, card->membase + STAT);
1090 PRINTK("nicstar%d: TSQ full.\n", card->index);
1091 process_tsq(card);
1092 }
1093
1094 /* Timer overflow */
1095 if (stat_r & NS_STAT_TMROF) {
1096 writel(NS_STAT_TMROF, card->membase + STAT);
1097 PRINTK("nicstar%d: Timer overflow.\n", card->index);
1098 }
1099
1100 /* PHY device interrupt signal active */
1101 if (stat_r & NS_STAT_PHYI) {
1102 writel(NS_STAT_PHYI, card->membase + STAT);
1103 PRINTK("nicstar%d: PHY interrupt.\n", card->index);
1104 if (dev->phy && dev->phy->interrupt) {
1105 dev->phy->interrupt(dev);
1106 }
1107 }
1108
1109 /* Small Buffer Queue is full */
1110 if (stat_r & NS_STAT_SFBQF) {
1111 writel(NS_STAT_SFBQF, card->membase + STAT);
1112 printk("nicstar%d: Small free buffer queue is full.\n",
1113 card->index);
1114 }
1115
1116 /* Large Buffer Queue is full */
1117 if (stat_r & NS_STAT_LFBQF) {
1118 writel(NS_STAT_LFBQF, card->membase + STAT);
1119 printk("nicstar%d: Large free buffer queue is full.\n",
1120 card->index);
1121 }
1122
1123 /* Receive Status Queue is full */
1124 if (stat_r & NS_STAT_RSQF) {
1125 writel(NS_STAT_RSQF, card->membase + STAT);
1126 printk("nicstar%d: RSQ full.\n", card->index);
1127 process_rsq(card);
1128 }
1129
1130 /* Complete CS-PDU received */
1131 if (stat_r & NS_STAT_EOPDU) {
1132 RXPRINTK("nicstar%d: End of CS-PDU received.\n", card->index);
1133 process_rsq(card);
1134 writel(NS_STAT_EOPDU, card->membase + STAT);
1135 }
1136
1137 /* Raw cell received */
1138 if (stat_r & NS_STAT_RAWCF) {
1139 writel(NS_STAT_RAWCF, card->membase + STAT);
1da177e4 1140#ifndef RCQ_SUPPORT
098fde11
C		 1141 printk("nicstar%d: Raw cell received and no support yet...\n",
1142 card->index);
1da177e4 1143#endif /* RCQ_SUPPORT */
098fde11
C		 1144 /* NOTE: the following procedure may keep a raw cell pending until the
1145 next interrupt. As this preliminary support is only meant to
1146 avoid buffer leakage, this is not an issue. */
1147 while (readl(card->membase + RAWCT) != card->rawch) {
098fde11 1148
864a3ff6 1149 if (ns_rcqe_islast(card->rawcell)) {
098fde11
C		 1150 struct sk_buff *oldbuf;
1151
1152 oldbuf = card->rcbuf;
864a3ff6
C		 1153 card->rcbuf = idr_find(&card->idr,
1154 ns_rcqe_nextbufhandle(card->rawcell));
1155 card->rawch = NS_PRV_DMA(card->rcbuf);
1156 card->rawcell = (struct ns_rcqe *)
1157 card->rcbuf->data;
098fde11 1158 recycle_rx_buf(card, oldbuf);
864a3ff6 1159 } else {
098fde11 1160 card->rawch += NS_RCQE_SIZE;
864a3ff6
C		 1161 card->rawcell++;
1162 }
098fde11
C		 1163 }
1164 }
1165
1166 /* Small buffer queue is empty */
1167 if (stat_r & NS_STAT_SFBQE) {
1168 int i;
1169 struct sk_buff *sb;
1170
1171 writel(NS_STAT_SFBQE, card->membase + STAT);
1172 printk("nicstar%d: Small free buffer queue empty.\n",
1173 card->index);
1174 for (i = 0; i < card->sbnr.min; i++) {
1175 sb = dev_alloc_skb(NS_SMSKBSIZE);
1176 if (sb == NULL) {
1177 writel(readl(card->membase + CFG) &
1178 ~NS_CFG_EFBIE, card->membase + CFG);
1179 card->efbie = 0;
1180 break;
1181 }
864a3ff6 1182 NS_PRV_BUFTYPE(sb) = BUF_SM;
098fde11
C		 1183 skb_queue_tail(&card->sbpool.queue, sb);
1184 skb_reserve(sb, NS_AAL0_HEADER);
1185 push_rxbufs(card, sb);
1186 }
1187 card->sbfqc = i;
1188 process_rsq(card);
1189 }
1190
1191 /* Large buffer queue empty */
1192 if (stat_r & NS_STAT_LFBQE) {
1193 int i;
1194 struct sk_buff *lb;
1195
1196 writel(NS_STAT_LFBQE, card->membase + STAT);
1197 printk("nicstar%d: Large free buffer queue empty.\n",
1198 card->index);
1199 for (i = 0; i < card->lbnr.min; i++) {
1200 lb = dev_alloc_skb(NS_LGSKBSIZE);
1201 if (lb == NULL) {
1202 writel(readl(card->membase + CFG) &
1203 ~NS_CFG_EFBIE, card->membase + CFG);
1204 card->efbie = 0;
1205 break;
1206 }
864a3ff6 1207 NS_PRV_BUFTYPE(lb) = BUF_LG;
098fde11
C		 1208 skb_queue_tail(&card->lbpool.queue, lb);
1209 skb_reserve(lb, NS_SMBUFSIZE);
1210 push_rxbufs(card, lb);
1211 }
1212 card->lbfqc = i;
1213 process_rsq(card);
1214 }
1215
1216 /* Receive Status Queue is 7/8 full */
1217 if (stat_r & NS_STAT_RSQAF) {
1218 writel(NS_STAT_RSQAF, card->membase + STAT);
1219 RXPRINTK("nicstar%d: RSQ almost full.\n", card->index);
1220 process_rsq(card);
1221 }
1222
1223 spin_unlock_irqrestore(&card->int_lock, flags);
1224 PRINTK("nicstar%d: end of interrupt service\n", card->index);
1225 return IRQ_HANDLED;
1da177e4
LT		 1226}
1227
1da177e4
LT		 1228static int ns_open(struct atm_vcc *vcc)
1229{
098fde11
C		 1230 ns_dev *card;
1231 vc_map *vc;
1232 unsigned long tmpl, modl;
1233 int tcr, tcra; /* target cell rate, and absolute value */
1234 int n = 0; /* Number of entries in the TST. Initialized to remove
1235 the compiler warning. */
1236 u32 u32d[4];
1237 int frscdi = 0; /* Index of the SCD. Initialized to remove the compiler
1238 warning. How I wish compilers were clever enough to
1239 tell which variables can truly be used
1240 uninitialized... */
1241 int inuse; /* tx or rx vc already in use by another vcc */
1242 short vpi = vcc->vpi;
1243 int vci = vcc->vci;
1244
1245 card = (ns_dev *) vcc->dev->dev_data;
1246 PRINTK("nicstar%d: opening vpi.vci %d.%d \n", card->index, (int)vpi,
1247 vci);
1248 if (vcc->qos.aal != ATM_AAL5 && vcc->qos.aal != ATM_AAL0) {
1249 PRINTK("nicstar%d: unsupported AAL.\n", card->index);
1250 return -EINVAL;
1251 }
1252
1253 vc = &(card->vcmap[vpi << card->vcibits | vci]);
1254 vcc->dev_data = vc;
1255
1256 inuse = 0;
1257 if (vcc->qos.txtp.traffic_class != ATM_NONE && vc->tx)
1258 inuse = 1;
1259 if (vcc->qos.rxtp.traffic_class != ATM_NONE && vc->rx)
1260 inuse += 2;
1261 if (inuse) {
1262 printk("nicstar%d: %s vci already in use.\n", card->index,
1263 inuse == 1 ? "tx" : inuse == 2 ? "rx" : "tx and rx");
1264 return -EINVAL;
1265 }
1266
1267 set_bit(ATM_VF_ADDR, &vcc->flags);
1268
1269 /* NOTE: You are not allowed to modify an open connection's QOS. To change
1270 that, remove the ATM_VF_PARTIAL flag checking. There may be other changes
1271 needed to do that. */
1272 if (!test_bit(ATM_VF_PARTIAL, &vcc->flags)) {
1273 scq_info *scq;
1274
1275 set_bit(ATM_VF_PARTIAL, &vcc->flags);
1276 if (vcc->qos.txtp.traffic_class == ATM_CBR) {
1277 /* Check requested cell rate and availability of SCD */
1278 if (vcc->qos.txtp.max_pcr == 0 && vcc->qos.txtp.pcr == 0
1279 && vcc->qos.txtp.min_pcr == 0) {
1280 PRINTK
1281 ("nicstar%d: trying to open a CBR vc with cell rate = 0 \n",
1282 card->index);
1283 clear_bit(ATM_VF_PARTIAL, &vcc->flags);
1284 clear_bit(ATM_VF_ADDR, &vcc->flags);
1285 return -EINVAL;
1286 }
1287
1288 tcr = atm_pcr_goal(&(vcc->qos.txtp));
1289 tcra = tcr >= 0 ? tcr : -tcr;
1290
1291 PRINTK("nicstar%d: target cell rate = %d.\n",
1292 card->index, vcc->qos.txtp.max_pcr);
1293
1294 tmpl =
1295 (unsigned long)tcra *(unsigned long)
1296 NS_TST_NUM_ENTRIES;
1297 modl = tmpl % card->max_pcr;
1298
1299 n = (int)(tmpl / card->max_pcr);
1300 if (tcr > 0) {
1301 if (modl > 0)
1302 n++;
1303 } else if (tcr == 0) {
1304 if ((n =
1305 (card->tst_free_entries -
1306 NS_TST_RESERVED)) <= 0) {
1307 PRINTK
1308 ("nicstar%d: no CBR bandwidth free.\n",
1309 card->index);
1310 clear_bit(ATM_VF_PARTIAL, &vcc->flags);
1311 clear_bit(ATM_VF_ADDR, &vcc->flags);
1312 return -EINVAL;
1313 }
1314 }
1315
1316 if (n == 0) {
1317 printk
1318 ("nicstar%d: selected bandwidth < granularity.\n",
1319 card->index);
1320 clear_bit(ATM_VF_PARTIAL, &vcc->flags);
1321 clear_bit(ATM_VF_ADDR, &vcc->flags);
1322 return -EINVAL;
1323 }
1324
1325 if (n > (card->tst_free_entries - NS_TST_RESERVED)) {
1326 PRINTK
1327 ("nicstar%d: not enough free CBR bandwidth.\n",
1328 card->index);
1329 clear_bit(ATM_VF_PARTIAL, &vcc->flags);
1330 clear_bit(ATM_VF_ADDR, &vcc->flags);
1331 return -EINVAL;
1332 } else
1333 card->tst_free_entries -= n;
1334
1335 XPRINTK("nicstar%d: writing %d tst entries.\n",
1336 card->index, n);
1337 for (frscdi = 0; frscdi < NS_FRSCD_NUM; frscdi++) {
1338 if (card->scd2vc[frscdi] == NULL) {
1339 card->scd2vc[frscdi] = vc;
1340 break;
1341 }
1342 }
1343 if (frscdi == NS_FRSCD_NUM) {
1344 PRINTK
1345 ("nicstar%d: no SCD available for CBR channel.\n",
1346 card->index);
1347 card->tst_free_entries += n;
1348 clear_bit(ATM_VF_PARTIAL, &vcc->flags);
1349 clear_bit(ATM_VF_ADDR, &vcc->flags);
1350 return -EBUSY;
1351 }
1352
1353 vc->cbr_scd = NS_FRSCD + frscdi * NS_FRSCD_SIZE;
1354
864a3ff6 1355 scq = get_scq(card, CBR_SCQSIZE, vc->cbr_scd);
098fde11
C		 1356 if (scq == NULL) {
1357 PRINTK("nicstar%d: can't get fixed rate SCQ.\n",
1358 card->index);
1359 card->scd2vc[frscdi] = NULL;
1360 card->tst_free_entries += n;
1361 clear_bit(ATM_VF_PARTIAL, &vcc->flags);
1362 clear_bit(ATM_VF_ADDR, &vcc->flags);
1363 return -ENOMEM;
1364 }
1365 vc->scq = scq;
864a3ff6 1366 u32d[0] = scq_virt_to_bus(scq, scq->base);
098fde11
C		 1367 u32d[1] = (u32) 0x00000000;
1368 u32d[2] = (u32) 0xffffffff;
1369 u32d[3] = (u32) 0x00000000;
1370 ns_write_sram(card, vc->cbr_scd, u32d, 4);
1371
1372 fill_tst(card, n, vc);
1373 } else if (vcc->qos.txtp.traffic_class == ATM_UBR) {
1374 vc->cbr_scd = 0x00000000;
1375 vc->scq = card->scq0;
1376 }
1377
1378 if (vcc->qos.txtp.traffic_class != ATM_NONE) {
1379 vc->tx = 1;
1380 vc->tx_vcc = vcc;
1381 vc->tbd_count = 0;
1382 }
1383 if (vcc->qos.rxtp.traffic_class != ATM_NONE) {
1384 u32 status;
1385
1386 vc->rx = 1;
1387 vc->rx_vcc = vcc;
1388 vc->rx_iov = NULL;
1389
1390 /* Open the connection in hardware */
1391 if (vcc->qos.aal == ATM_AAL5)
1392 status = NS_RCTE_AAL5 | NS_RCTE_CONNECTOPEN;
1393 else /* vcc->qos.aal == ATM_AAL0 */
1394 status = NS_RCTE_AAL0 | NS_RCTE_CONNECTOPEN;
1da177e4 1395#ifdef RCQ_SUPPORT
098fde11 1396 status |= NS_RCTE_RAWCELLINTEN;
1da177e4 1397#endif /* RCQ_SUPPORT */
098fde11
C		 1398 ns_write_sram(card,
1399 NS_RCT +
1400 (vpi << card->vcibits | vci) *
1401 NS_RCT_ENTRY_SIZE, &status, 1);
1402 }
1da177e4 1403
098fde11 1404 }
1da177e4 1405
098fde11
C		 1406 set_bit(ATM_VF_READY, &vcc->flags);
1407 return 0;
1408}
1da177e4
LT		 1409
1410static void ns_close(struct atm_vcc *vcc)
1411{
098fde11
C		 1412 vc_map *vc;
1413 ns_dev *card;
1414 u32 data;
1415 int i;
1416
1417 vc = vcc->dev_data;
1418 card = vcc->dev->dev_data;
1419 PRINTK("nicstar%d: closing vpi.vci %d.%d \n", card->index,
1420 (int)vcc->vpi, vcc->vci);
1421
1422 clear_bit(ATM_VF_READY, &vcc->flags);
1423
1424 if (vcc->qos.rxtp.traffic_class != ATM_NONE) {
1425 u32 addr;
1426 unsigned long flags;
1427
1428 addr =
1429 NS_RCT +
1430 (vcc->vpi << card->vcibits | vcc->vci) * NS_RCT_ENTRY_SIZE;
1431 spin_lock_irqsave(&card->res_lock, flags);
1432 while (CMD_BUSY(card)) ;
1433 writel(NS_CMD_CLOSE_CONNECTION | addr << 2,
1434 card->membase + CMD);
1435 spin_unlock_irqrestore(&card->res_lock, flags);
1436
1437 vc->rx = 0;
1438 if (vc->rx_iov != NULL) {
1439 struct sk_buff *iovb;
1440 u32 stat;
1441
1442 stat = readl(card->membase + STAT);
1443 card->sbfqc = ns_stat_sfbqc_get(stat);
1444 card->lbfqc = ns_stat_lfbqc_get(stat);
1445
1446 PRINTK
1447 ("nicstar%d: closing a VC with pending rx buffers.\n",
1448 card->index);
1449 iovb = vc->rx_iov;
1450 recycle_iovec_rx_bufs(card, (struct iovec *)iovb->data,
864a3ff6
C		 1451 NS_PRV_IOVCNT(iovb));
1452 NS_PRV_IOVCNT(iovb) = 0;
098fde11
C		 1453 spin_lock_irqsave(&card->int_lock, flags);
1454 recycle_iov_buf(card, iovb);
1455 spin_unlock_irqrestore(&card->int_lock, flags);
1456 vc->rx_iov = NULL;
1457 }
1458 }
1459
1460 if (vcc->qos.txtp.traffic_class != ATM_NONE) {
1461 vc->tx = 0;
1462 }
1463
1464 if (vcc->qos.txtp.traffic_class == ATM_CBR) {
1465 unsigned long flags;
1466 ns_scqe *scqep;
1467 scq_info *scq;
1468
1469 scq = vc->scq;
1470
1471 for (;;) {
1472 spin_lock_irqsave(&scq->lock, flags);
1473 scqep = scq->next;
1474 if (scqep == scq->base)
1475 scqep = scq->last;
1476 else
1477 scqep--;
1478 if (scqep == scq->tail) {
1479 spin_unlock_irqrestore(&scq->lock, flags);
1480 break;
1481 }
1482 /* If the last entry is not a TSR, place one in the SCQ in order to
1483 be able to completely drain it and then close. */
1484 if (!ns_scqe_is_tsr(scqep) && scq->tail != scq->next) {
1485 ns_scqe tsr;
1486 u32 scdi, scqi;
1487 u32 data;
1488 int index;
1489
1490 tsr.word_1 = ns_tsr_mkword_1(NS_TSR_INTENABLE);
1491 scdi = (vc->cbr_scd - NS_FRSCD) / NS_FRSCD_SIZE;
1492 scqi = scq->next - scq->base;
1493 tsr.word_2 = ns_tsr_mkword_2(scdi, scqi);
1494 tsr.word_3 = 0x00000000;
1495 tsr.word_4 = 0x00000000;
1496 *scq->next = tsr;
1497 index = (int)scqi;
1498 scq->skb[index] = NULL;
1499 if (scq->next == scq->last)
1500 scq->next = scq->base;
1501 else
1502 scq->next++;
864a3ff6 1503 data = scq_virt_to_bus(scq, scq->next);
098fde11
C		 1504 ns_write_sram(card, scq->scd, &data, 1);
1505 }
1506 spin_unlock_irqrestore(&scq->lock, flags);
1507 schedule();
1508 }
1509
1510 /* Free all TST entries */
1511 data = NS_TST_OPCODE_VARIABLE;
1512 for (i = 0; i < NS_TST_NUM_ENTRIES; i++) {
1513 if (card->tste2vc[i] == vc) {
1514 ns_write_sram(card, card->tst_addr + i, &data,
1515 1);
1516 card->tste2vc[i] = NULL;
1517 card->tst_free_entries++;
1518 }
1519 }
1520
1521 card->scd2vc[(vc->cbr_scd - NS_FRSCD) / NS_FRSCD_SIZE] = NULL;
864a3ff6 1522 free_scq(card, vc->scq, vcc);
098fde11
C		 1523 }
1524
1525 /* remove all references to vcc before deleting it */
1526 if (vcc->qos.txtp.traffic_class != ATM_NONE) {
1527 unsigned long flags;
1528 scq_info *scq = card->scq0;
1529
1530 spin_lock_irqsave(&scq->lock, flags);
1531
1532 for (i = 0; i < scq->num_entries; i++) {
1533 if (scq->skb[i] && ATM_SKB(scq->skb[i])->vcc == vcc) {
1534 ATM_SKB(scq->skb[i])->vcc = NULL;
1535 atm_return(vcc, scq->skb[i]->truesize);
1536 PRINTK
1537 ("nicstar: deleted pending vcc mapping\n");
1538 }
1539 }
1540
1541 spin_unlock_irqrestore(&scq->lock, flags);
1542 }
1543
1544 vcc->dev_data = NULL;
1545 clear_bit(ATM_VF_PARTIAL, &vcc->flags);
1546 clear_bit(ATM_VF_ADDR, &vcc->flags);
1da177e4
LT		 1547
1548#ifdef RX_DEBUG
098fde11
C		 1549 {
1550 u32 stat, cfg;
1551 stat = readl(card->membase + STAT);
1552 cfg = readl(card->membase + CFG);
1553 printk("STAT = 0x%08X CFG = 0x%08X \n", stat, cfg);
1554 printk
864a3ff6
C		 1555 ("TSQ: base = 0x%p next = 0x%p last = 0x%p TSQT = 0x%08X \n",
1556 card->tsq.base, card->tsq.next,
1557 card->tsq.last, readl(card->membase + TSQT));
098fde11 1558 printk
864a3ff6
C		 1559 ("RSQ: base = 0x%p next = 0x%p last = 0x%p RSQT = 0x%08X \n",
1560 card->rsq.base, card->rsq.next,
1561 card->rsq.last, readl(card->membase + RSQT));
098fde11
C		 1562 printk("Empty free buffer queue interrupt %s \n",
1563 card->efbie ? "enabled" : "disabled");
1564 printk("SBCNT = %d count = %d LBCNT = %d count = %d \n",
1565 ns_stat_sfbqc_get(stat), card->sbpool.count,
1566 ns_stat_lfbqc_get(stat), card->lbpool.count);
1567 printk("hbpool.count = %d iovpool.count = %d \n",
1568 card->hbpool.count, card->iovpool.count);
1569 }
1da177e4
LT		 1570#endif /* RX_DEBUG */
1571}
1572
098fde11 1573static void fill_tst(ns_dev * card, int n, vc_map * vc)
1da177e4 1574{
098fde11
C		 1575 u32 new_tst;
1576 unsigned long cl;
1577 int e, r;
1578 u32 data;
1579
1580 /* It would be very complicated to keep the two TSTs synchronized while
1581 assuring that writes are only made to the inactive TST. So, for now I
1582 will use only one TST. If problems occur, I will change this again */
1583
1584 new_tst = card->tst_addr;
1585
1586 /* Fill procedure */
1587
1588 for (e = 0; e < NS_TST_NUM_ENTRIES; e++) {
1589 if (card->tste2vc[e] == NULL)
1590 break;
1591 }
1592 if (e == NS_TST_NUM_ENTRIES) {
1593 printk("nicstar%d: No free TST entries found. \n", card->index);
1594 return;
1595 }
1596
1597 r = n;
1598 cl = NS_TST_NUM_ENTRIES;
1599 data = ns_tste_make(NS_TST_OPCODE_FIXED, vc->cbr_scd);
1600
1601 while (r > 0) {
1602 if (cl >= NS_TST_NUM_ENTRIES && card->tste2vc[e] == NULL) {
1603 card->tste2vc[e] = vc;
1604 ns_write_sram(card, new_tst + e, &data, 1);
1605 cl -= NS_TST_NUM_ENTRIES;
1606 r--;
1607 }
1608
1609 if (++e == NS_TST_NUM_ENTRIES) {
1610 e = 0;
1611 }
1612 cl += n;
1613 }
1614
1615 /* End of fill procedure */
1616
1617 data = ns_tste_make(NS_TST_OPCODE_END, new_tst);
1618 ns_write_sram(card, new_tst + NS_TST_NUM_ENTRIES, &data, 1);
1619 ns_write_sram(card, card->tst_addr + NS_TST_NUM_ENTRIES, &data, 1);
1620 card->tst_addr = new_tst;
1da177e4
LT		 1621}
1622
1da177e4
LT		 1623static int ns_send(struct atm_vcc *vcc, struct sk_buff *skb)
1624{
098fde11
C		 1625 ns_dev *card;
1626 vc_map *vc;
1627 scq_info *scq;
1628 unsigned long buflen;
1629 ns_scqe scqe;
1630 u32 flags; /* TBD flags, not CPU flags */
1631
1632 card = vcc->dev->dev_data;
1633 TXPRINTK("nicstar%d: ns_send() called.\n", card->index);
1634 if ((vc = (vc_map *) vcc->dev_data) == NULL) {
1635 printk("nicstar%d: vcc->dev_data == NULL on ns_send().\n",
1636 card->index);
1637 atomic_inc(&vcc->stats->tx_err);
1638 dev_kfree_skb_any(skb);
1639 return -EINVAL;
1640 }
1da177e4 1641
098fde11
C		 1642 if (!vc->tx) {
1643 printk("nicstar%d: Trying to transmit on a non-tx VC.\n",
1644 card->index);
1645 atomic_inc(&vcc->stats->tx_err);
1646 dev_kfree_skb_any(skb);
1647 return -EINVAL;
1648 }
1da177e4 1649
098fde11
C		 1650 if (vcc->qos.aal != ATM_AAL5 && vcc->qos.aal != ATM_AAL0) {
1651 printk("nicstar%d: Only AAL0 and AAL5 are supported.\n",
1652 card->index);
1653 atomic_inc(&vcc->stats->tx_err);
1654 dev_kfree_skb_any(skb);
1655 return -EINVAL;
1656 }
1da177e4 1657
098fde11
C		 1658 if (skb_shinfo(skb)->nr_frags != 0) {
1659 printk("nicstar%d: No scatter-gather yet.\n", card->index);
1660 atomic_inc(&vcc->stats->tx_err);
1661 dev_kfree_skb_any(skb);
1662 return -EINVAL;
1663 }
1664
1665 ATM_SKB(skb)->vcc = vcc;
1666
ede58ef2
C		 1667 NS_PRV_DMA(skb) = dma_map_single(&card->pcidev->dev, skb->data,
1668 skb->len, DMA_TO_DEVICE);
864a3ff6 1669
098fde11
C		 1670 if (vcc->qos.aal == ATM_AAL5) {
1671 buflen = (skb->len + 47 + 8) / 48 * 48; /* Multiple of 48 */
1672 flags = NS_TBD_AAL5;
864a3ff6
C		 1673 scqe.word_2 = cpu_to_le32(NS_PRV_DMA(skb));
1674 scqe.word_3 = cpu_to_le32(skb->len);
098fde11
C		 1675 scqe.word_4 =
1676 ns_tbd_mkword_4(0, (u32) vcc->vpi, (u32) vcc->vci, 0,
1677 ATM_SKB(skb)->
1678 atm_options & ATM_ATMOPT_CLP ? 1 : 0);
1679 flags |= NS_TBD_EOPDU;
1680 } else { /* (vcc->qos.aal == ATM_AAL0) */
1681
1682 buflen = ATM_CELL_PAYLOAD; /* i.e., 48 bytes */
1683 flags = NS_TBD_AAL0;
864a3ff6 1684 scqe.word_2 = cpu_to_le32(NS_PRV_DMA(skb) + NS_AAL0_HEADER);
098fde11
C		 1685 scqe.word_3 = cpu_to_le32(0x00000000);
1686 if (*skb->data & 0x02) /* Payload type 1 - end of pdu */
1687 flags |= NS_TBD_EOPDU;
1688 scqe.word_4 =
1689 cpu_to_le32(*((u32 *) skb->data) & ~NS_TBD_VC_MASK);
1690 /* Force the VPI/VCI to be the same as in VCC struct */
1691 scqe.word_4 |=
1692 cpu_to_le32((((u32) vcc->
1693 vpi) << NS_TBD_VPI_SHIFT | ((u32) vcc->
1694 vci) <<
1695 NS_TBD_VCI_SHIFT) & NS_TBD_VC_MASK);
1696 }
1697
1698 if (vcc->qos.txtp.traffic_class == ATM_CBR) {
1699 scqe.word_1 = ns_tbd_mkword_1_novbr(flags, (u32) buflen);
1700 scq = ((vc_map *) vcc->dev_data)->scq;
1701 } else {
1702 scqe.word_1 =
1703 ns_tbd_mkword_1(flags, (u32) 1, (u32) 1, (u32) buflen);
1704 scq = card->scq0;
1705 }
1706
1707 if (push_scqe(card, vc, scq, &scqe, skb) != 0) {
1708 atomic_inc(&vcc->stats->tx_err);
1709 dev_kfree_skb_any(skb);
1710 return -EIO;
1711 }
1712 atomic_inc(&vcc->stats->tx);
1da177e4 1713
098fde11
C		 1714 return 0;
1715}
1da177e4 1716
098fde11
C		 1717static int push_scqe(ns_dev * card, vc_map * vc, scq_info * scq, ns_scqe * tbd,
1718 struct sk_buff *skb)
1da177e4 1719{
098fde11
C		 1720 unsigned long flags;
1721 ns_scqe tsr;
1722 u32 scdi, scqi;
1723 int scq_is_vbr;
1724 u32 data;
1725 int index;
1726
1727 spin_lock_irqsave(&scq->lock, flags);
1728 while (scq->tail == scq->next) {
1729 if (in_interrupt()) {
1730 spin_unlock_irqrestore(&scq->lock, flags);
1731 printk("nicstar%d: Error pushing TBD.\n", card->index);
1732 return 1;
1733 }
1734
1735 scq->full = 1;
118ce7ab
AB		 1736 wait_event_interruptible_lock_irq_timeout(scq->scqfull_waitq,
1737 scq->tail != scq->next,
1738 scq->lock,
1739 SCQFULL_TIMEOUT);
098fde11
C		 1740
1741 if (scq->full) {
1742 spin_unlock_irqrestore(&scq->lock, flags);
1743 printk("nicstar%d: Timeout pushing TBD.\n",
1744 card->index);
1745 return 1;
1746 }
1747 }
1748 *scq->next = *tbd;
1749 index = (int)(scq->next - scq->base);
1750 scq->skb[index] = skb;
864a3ff6
C		 1751 XPRINTK("nicstar%d: sending skb at 0x%p (pos %d).\n",
1752 card->index, skb, index);
1753 XPRINTK("nicstar%d: TBD written:\n0x%x\n0x%x\n0x%x\n0x%x\n at 0x%p.\n",
098fde11
C		 1754 card->index, le32_to_cpu(tbd->word_1), le32_to_cpu(tbd->word_2),
1755 le32_to_cpu(tbd->word_3), le32_to_cpu(tbd->word_4),
864a3ff6 1756 scq->next);
098fde11
C		 1757 if (scq->next == scq->last)
1758 scq->next = scq->base;
1759 else
1760 scq->next++;
1761
1762 vc->tbd_count++;
1763 if (scq->num_entries == VBR_SCQ_NUM_ENTRIES) {
1764 scq->tbd_count++;
1765 scq_is_vbr = 1;
1766 } else
1767 scq_is_vbr = 0;
1768
1769 if (vc->tbd_count >= MAX_TBD_PER_VC
1770 || scq->tbd_count >= MAX_TBD_PER_SCQ) {
1771 int has_run = 0;
1772
1773 while (scq->tail == scq->next) {
1774 if (in_interrupt()) {
864a3ff6 1775 data = scq_virt_to_bus(scq, scq->next);
098fde11
C		 1776 ns_write_sram(card, scq->scd, &data, 1);
1777 spin_unlock_irqrestore(&scq->lock, flags);
1778 printk("nicstar%d: Error pushing TSR.\n",
1779 card->index);
1780 return 0;
1781 }
1782
1783 scq->full = 1;
1784 if (has_run++)
1785 break;
118ce7ab
AB		 1786 wait_event_interruptible_lock_irq_timeout(scq->scqfull_waitq,
1787 scq->tail != scq->next,
1788 scq->lock,
1789 SCQFULL_TIMEOUT);
098fde11
C		 1790 }
1791
1792 if (!scq->full) {
1793 tsr.word_1 = ns_tsr_mkword_1(NS_TSR_INTENABLE);
1794 if (scq_is_vbr)
1795 scdi = NS_TSR_SCDISVBR;
1796 else
1797 scdi = (vc->cbr_scd - NS_FRSCD) / NS_FRSCD_SIZE;
1798 scqi = scq->next - scq->base;
1799 tsr.word_2 = ns_tsr_mkword_2(scdi, scqi);
1800 tsr.word_3 = 0x00000000;
1801 tsr.word_4 = 0x00000000;
1802
1803 *scq->next = tsr;
1804 index = (int)scqi;
1805 scq->skb[index] = NULL;
1806 XPRINTK
864a3ff6 1807 ("nicstar%d: TSR written:\n0x%x\n0x%x\n0x%x\n0x%x\n at 0x%p.\n",
098fde11
C		 1808 card->index, le32_to_cpu(tsr.word_1),
1809 le32_to_cpu(tsr.word_2), le32_to_cpu(tsr.word_3),
864a3ff6 1810 le32_to_cpu(tsr.word_4), scq->next);
098fde11
C		 1811 if (scq->next == scq->last)
1812 scq->next = scq->base;
1813 else
1814 scq->next++;
1815 vc->tbd_count = 0;
1816 scq->tbd_count = 0;
1817 } else
1818 PRINTK("nicstar%d: Timeout pushing TSR.\n",
1819 card->index);
1820 }
864a3ff6 1821 data = scq_virt_to_bus(scq, scq->next);
098fde11
C		 1822 ns_write_sram(card, scq->scd, &data, 1);
1823
1824 spin_unlock_irqrestore(&scq->lock, flags);
1825
1826 return 0;
1da177e4
LT		 1827}
1828
098fde11 1829static void process_tsq(ns_dev * card)
1da177e4 1830{
098fde11
C		 1831 u32 scdi;
1832 scq_info *scq;
1833 ns_tsi *previous = NULL, *one_ahead, *two_ahead;
1834 int serviced_entries; /* flag indicating at least on entry was serviced */
1835
1836 serviced_entries = 0;
1837
1838 if (card->tsq.next == card->tsq.last)
1839 one_ahead = card->tsq.base;
1840 else
1841 one_ahead = card->tsq.next + 1;
1842
1843 if (one_ahead == card->tsq.last)
1844 two_ahead = card->tsq.base;
1845 else
1846 two_ahead = one_ahead + 1;
1847
1848 while (!ns_tsi_isempty(card->tsq.next) || !ns_tsi_isempty(one_ahead) ||
1849 !ns_tsi_isempty(two_ahead))
1850 /* At most two empty, as stated in the 77201 errata */
1851 {
1852 serviced_entries = 1;
1853
1854 /* Skip the one or two possible empty entries */
1855 while (ns_tsi_isempty(card->tsq.next)) {
1856 if (card->tsq.next == card->tsq.last)
1857 card->tsq.next = card->tsq.base;
1858 else
1859 card->tsq.next++;
1860 }
1861
1862 if (!ns_tsi_tmrof(card->tsq.next)) {
1863 scdi = ns_tsi_getscdindex(card->tsq.next);
1864 if (scdi == NS_TSI_SCDISVBR)
1865 scq = card->scq0;
1866 else {
1867 if (card->scd2vc[scdi] == NULL) {
1868 printk
1869 ("nicstar%d: could not find VC from SCD index.\n",
1870 card->index);
1871 ns_tsi_init(card->tsq.next);
1872 return;
1873 }
1874 scq = card->scd2vc[scdi]->scq;
1875 }
1876 drain_scq(card, scq, ns_tsi_getscqpos(card->tsq.next));
1877 scq->full = 0;
1878 wake_up_interruptible(&(scq->scqfull_waitq));
1879 }
1880
1881 ns_tsi_init(card->tsq.next);
1882 previous = card->tsq.next;
1883 if (card->tsq.next == card->tsq.last)
1884 card->tsq.next = card->tsq.base;
1885 else
1886 card->tsq.next++;
1887
1888 if (card->tsq.next == card->tsq.last)
1889 one_ahead = card->tsq.base;
1890 else
1891 one_ahead = card->tsq.next + 1;
1892
1893 if (one_ahead == card->tsq.last)
1894 two_ahead = card->tsq.base;
1895 else
1896 two_ahead = one_ahead + 1;
1897 }
1898
864a3ff6
C		 1899 if (serviced_entries)
1900 writel(PTR_DIFF(previous, card->tsq.base),
098fde11 1901 card->membase + TSQH);
1da177e4
LT		 1902}
1903
098fde11 1904static void drain_scq(ns_dev * card, scq_info * scq, int pos)
1da177e4 1905{
098fde11
C		 1906 struct atm_vcc *vcc;
1907 struct sk_buff *skb;
1908 int i;
1909 unsigned long flags;
1910
864a3ff6
C		 1911 XPRINTK("nicstar%d: drain_scq() called, scq at 0x%p, pos %d.\n",
1912 card->index, scq, pos);
098fde11
C		 1913 if (pos >= scq->num_entries) {
1914 printk("nicstar%d: Bad index on drain_scq().\n", card->index);
1915 return;
1916 }
1917
1918 spin_lock_irqsave(&scq->lock, flags);
1919 i = (int)(scq->tail - scq->base);
1920 if (++i == scq->num_entries)
1921 i = 0;
1922 while (i != pos) {
1923 skb = scq->skb[i];
864a3ff6
C		 1924 XPRINTK("nicstar%d: freeing skb at 0x%p (index %d).\n",
1925 card->index, skb, i);
098fde11 1926 if (skb != NULL) {
ede58ef2 1927 dma_unmap_single(&card->pcidev->dev,
864a3ff6
C		 1928 NS_PRV_DMA(skb),
1929 skb->len,
ede58ef2 1930 DMA_TO_DEVICE);
098fde11
C		 1931 vcc = ATM_SKB(skb)->vcc;
1932 if (vcc && vcc->pop != NULL) {
1933 vcc->pop(vcc, skb);
1934 } else {
1935 dev_kfree_skb_irq(skb);
1936 }
1937 scq->skb[i] = NULL;
1938 }
1939 if (++i == scq->num_entries)
1940 i = 0;
1941 }
1942 scq->tail = scq->base + pos;
1943 spin_unlock_irqrestore(&scq->lock, flags);
1da177e4
LT		 1944}
1945
098fde11
C		 1946static void process_rsq(ns_dev * card)
1947{
1948 ns_rsqe *previous;
1949
1950 if (!ns_rsqe_valid(card->rsq.next))
1951 return;
1952 do {
1953 dequeue_rx(card, card->rsq.next);
1954 ns_rsqe_init(card->rsq.next);
1955 previous = card->rsq.next;
1956 if (card->rsq.next == card->rsq.last)
1957 card->rsq.next = card->rsq.base;
1958 else
1959 card->rsq.next++;
1960 } while (ns_rsqe_valid(card->rsq.next));
864a3ff6 1961 writel(PTR_DIFF(previous, card->rsq.base), card->membase + RSQH);
098fde11 1962}
1da177e4 1963
098fde11 1964static void dequeue_rx(ns_dev * card, ns_rsqe * rsqe)
1da177e4 1965{
098fde11
C		 1966 u32 vpi, vci;
1967 vc_map *vc;
1968 struct sk_buff *iovb;
1969 struct iovec *iov;
1970 struct atm_vcc *vcc;
1971 struct sk_buff *skb;
1972 unsigned short aal5_len;
1973 int len;
1974 u32 stat;
864a3ff6 1975 u32 id;
098fde11
C		 1976
1977 stat = readl(card->membase + STAT);
1978 card->sbfqc = ns_stat_sfbqc_get(stat);
1979 card->lbfqc = ns_stat_lfbqc_get(stat);
1980
864a3ff6
C		 1981 id = le32_to_cpu(rsqe->buffer_handle);
1982 skb = idr_find(&card->idr, id);
1983 if (!skb) {
1984 RXPRINTK(KERN_ERR
1985 "nicstar%d: idr_find() failed!\n", card->index);
1986 return;
1987 }
1988 idr_remove(&card->idr, id);
ede58ef2
C		 1989 dma_sync_single_for_cpu(&card->pcidev->dev,
1990 NS_PRV_DMA(skb),
1991 (NS_PRV_BUFTYPE(skb) == BUF_SM
1992 ? NS_SMSKBSIZE : NS_LGSKBSIZE),
1993 DMA_FROM_DEVICE);
1994 dma_unmap_single(&card->pcidev->dev,
864a3ff6
C		 1995 NS_PRV_DMA(skb),
1996 (NS_PRV_BUFTYPE(skb) == BUF_SM
1997 ? NS_SMSKBSIZE : NS_LGSKBSIZE),
ede58ef2 1998 DMA_FROM_DEVICE);
098fde11
C		 1999 vpi = ns_rsqe_vpi(rsqe);
2000 vci = ns_rsqe_vci(rsqe);
2001 if (vpi >= 1UL << card->vpibits || vci >= 1UL << card->vcibits) {
2002 printk("nicstar%d: SDU received for out-of-range vc %d.%d.\n",
2003 card->index, vpi, vci);
2004 recycle_rx_buf(card, skb);
2005 return;
2006 }
2007
2008 vc = &(card->vcmap[vpi << card->vcibits | vci]);
2009 if (!vc->rx) {
2010 RXPRINTK("nicstar%d: SDU received on non-rx vc %d.%d.\n",
2011 card->index, vpi, vci);
2012 recycle_rx_buf(card, skb);
2013 return;
2014 }
2015
2016 vcc = vc->rx_vcc;
2017
2018 if (vcc->qos.aal == ATM_AAL0) {
2019 struct sk_buff *sb;
2020 unsigned char *cell;
2021 int i;
2022
2023 cell = skb->data;
2024 for (i = ns_rsqe_cellcount(rsqe); i; i--) {
2025 if ((sb = dev_alloc_skb(NS_SMSKBSIZE)) == NULL) {
2026 printk
2027 ("nicstar%d: Can't allocate buffers for aal0.\n",
2028 card->index);
2029 atomic_add(i, &vcc->stats->rx_drop);
2030 break;
2031 }
2032 if (!atm_charge(vcc, sb->truesize)) {
2033 RXPRINTK
2034 ("nicstar%d: atm_charge() dropped aal0 packets.\n",
2035 card->index);
2036 atomic_add(i - 1, &vcc->stats->rx_drop); /* already increased by 1 */
2037 dev_kfree_skb_any(sb);
2038 break;
2039 }
2040 /* Rebuild the header */
2041 *((u32 *) sb->data) = le32_to_cpu(rsqe->word_1) << 4 |
2042 (ns_rsqe_clp(rsqe) ? 0x00000001 : 0x00000000);
2043 if (i == 1 && ns_rsqe_eopdu(rsqe))
2044 *((u32 *) sb->data) |= 0x00000002;
2045 skb_put(sb, NS_AAL0_HEADER);
2046 memcpy(skb_tail_pointer(sb), cell, ATM_CELL_PAYLOAD);
2047 skb_put(sb, ATM_CELL_PAYLOAD);
2048 ATM_SKB(sb)->vcc = vcc;
2049 __net_timestamp(sb);
2050 vcc->push(vcc, sb);
2051 atomic_inc(&vcc->stats->rx);
2052 cell += ATM_CELL_PAYLOAD;
2053 }
2054
2055 recycle_rx_buf(card, skb);
2056 return;
2057 }
2058
2059 /* To reach this point, the AAL layer can only be AAL5 */
2060
2061 if ((iovb = vc->rx_iov) == NULL) {
2062 iovb = skb_dequeue(&(card->iovpool.queue));
2063 if (iovb == NULL) { /* No buffers in the queue */
2064 iovb = alloc_skb(NS_IOVBUFSIZE, GFP_ATOMIC);
2065 if (iovb == NULL) {
2066 printk("nicstar%d: Out of iovec buffers.\n",
2067 card->index);
2068 atomic_inc(&vcc->stats->rx_drop);
2069 recycle_rx_buf(card, skb);
2070 return;
2071 }
864a3ff6 2072 NS_PRV_BUFTYPE(iovb) = BUF_NONE;
098fde11
C		 2073 } else if (--card->iovpool.count < card->iovnr.min) {
2074 struct sk_buff *new_iovb;
2075 if ((new_iovb =
2076 alloc_skb(NS_IOVBUFSIZE, GFP_ATOMIC)) != NULL) {
864a3ff6 2077 NS_PRV_BUFTYPE(iovb) = BUF_NONE;
098fde11
C		 2078 skb_queue_tail(&card->iovpool.queue, new_iovb);
2079 card->iovpool.count++;
2080 }
2081 }
2082 vc->rx_iov = iovb;
864a3ff6 2083 NS_PRV_IOVCNT(iovb) = 0;
098fde11
C		 2084 iovb->len = 0;
2085 iovb->data = iovb->head;
2086 skb_reset_tail_pointer(iovb);
098fde11
C		 2087 /* IMPORTANT: a pointer to the sk_buff containing the small or large
2088 buffer is stored as iovec base, NOT a pointer to the
2089 small or large buffer itself. */
864a3ff6 2090 } else if (NS_PRV_IOVCNT(iovb) >= NS_MAX_IOVECS) {
098fde11
C		 2091 printk("nicstar%d: received too big AAL5 SDU.\n", card->index);
2092 atomic_inc(&vcc->stats->rx_err);
2093 recycle_iovec_rx_bufs(card, (struct iovec *)iovb->data,
2094 NS_MAX_IOVECS);
864a3ff6 2095 NS_PRV_IOVCNT(iovb) = 0;
098fde11
C		 2096 iovb->len = 0;
2097 iovb->data = iovb->head;
2098 skb_reset_tail_pointer(iovb);
098fde11 2099 }
864a3ff6 2100 iov = &((struct iovec *)iovb->data)[NS_PRV_IOVCNT(iovb)++];
098fde11
C		 2101 iov->iov_base = (void *)skb;
2102 iov->iov_len = ns_rsqe_cellcount(rsqe) * 48;
2103 iovb->len += iov->iov_len;
2104
864a3ff6
C		 2105#ifdef EXTRA_DEBUG
2106 if (NS_PRV_IOVCNT(iovb) == 1) {
2107 if (NS_PRV_BUFTYPE(skb) != BUF_SM) {
098fde11
C		 2108 printk
2109 ("nicstar%d: Expected a small buffer, and this is not one.\n",
2110 card->index);
2111 which_list(card, skb);
2112 atomic_inc(&vcc->stats->rx_err);
2113 recycle_rx_buf(card, skb);
2114 vc->rx_iov = NULL;
2115 recycle_iov_buf(card, iovb);
2116 return;
2117 }
864a3ff6 2118 } else { /* NS_PRV_IOVCNT(iovb) >= 2 */
098fde11 2119
864a3ff6 2120 if (NS_PRV_BUFTYPE(skb) != BUF_LG) {
098fde11
C		 2121 printk
2122 ("nicstar%d: Expected a large buffer, and this is not one.\n",
2123 card->index);
2124 which_list(card, skb);
2125 atomic_inc(&vcc->stats->rx_err);
2126 recycle_iovec_rx_bufs(card, (struct iovec *)iovb->data,
864a3ff6 2127 NS_PRV_IOVCNT(iovb));
098fde11
C		 2128 vc->rx_iov = NULL;
2129 recycle_iov_buf(card, iovb);
2130 return;
2131 }
2132 }
864a3ff6 2133#endif /* EXTRA_DEBUG */
098fde11
C		 2134
2135 if (ns_rsqe_eopdu(rsqe)) {
2136 /* This works correctly regardless of the endianness of the host */
864a3ff6
C		 2137 unsigned char *L1L2 = (unsigned char *)
2138 (skb->data + iov->iov_len - 6);
098fde11
C		 2139 aal5_len = L1L2[0] << 8 | L1L2[1];
2140 len = (aal5_len == 0x0000) ? 0x10000 : aal5_len;
2141 if (ns_rsqe_crcerr(rsqe) ||
2142 len + 8 > iovb->len || len + (47 + 8) < iovb->len) {
2143 printk("nicstar%d: AAL5 CRC error", card->index);
2144 if (len + 8 > iovb->len || len + (47 + 8) < iovb->len)
2145 printk(" - PDU size mismatch.\n");
2146 else
2147 printk(".\n");
2148 atomic_inc(&vcc->stats->rx_err);
2149 recycle_iovec_rx_bufs(card, (struct iovec *)iovb->data,
864a3ff6 2150 NS_PRV_IOVCNT(iovb));
098fde11
C		 2151 vc->rx_iov = NULL;
2152 recycle_iov_buf(card, iovb);
2153 return;
2154 }
2155
2156 /* By this point we (hopefully) have a complete SDU without errors. */
2157
864a3ff6 2158 if (NS_PRV_IOVCNT(iovb) == 1) { /* Just a small buffer */
098fde11
C		 2159 /* skb points to a small buffer */
2160 if (!atm_charge(vcc, skb->truesize)) {
2161 push_rxbufs(card, skb);
2162 atomic_inc(&vcc->stats->rx_drop);
2163 } else {
2164 skb_put(skb, len);
2165 dequeue_sm_buf(card, skb);
098fde11
C		 2166 ATM_SKB(skb)->vcc = vcc;
2167 __net_timestamp(skb);
2168 vcc->push(vcc, skb);
2169 atomic_inc(&vcc->stats->rx);
2170 }
864a3ff6 2171 } else if (NS_PRV_IOVCNT(iovb) == 2) { /* One small plus one large buffer */
098fde11
C		 2172 struct sk_buff *sb;
2173
2174 sb = (struct sk_buff *)(iov - 1)->iov_base;
2175 /* skb points to a large buffer */
2176
2177 if (len <= NS_SMBUFSIZE) {
2178 if (!atm_charge(vcc, sb->truesize)) {
2179 push_rxbufs(card, sb);
2180 atomic_inc(&vcc->stats->rx_drop);
2181 } else {
2182 skb_put(sb, len);
2183 dequeue_sm_buf(card, sb);
098fde11
C		 2184 ATM_SKB(sb)->vcc = vcc;
2185 __net_timestamp(sb);
2186 vcc->push(vcc, sb);
2187 atomic_inc(&vcc->stats->rx);
2188 }
2189
2190 push_rxbufs(card, skb);
2191
2192 } else { /* len > NS_SMBUFSIZE, the usual case */
2193
2194 if (!atm_charge(vcc, skb->truesize)) {
2195 push_rxbufs(card, skb);
2196 atomic_inc(&vcc->stats->rx_drop);
2197 } else {
2198 dequeue_lg_buf(card, skb);
098fde11
C		 2199 skb_push(skb, NS_SMBUFSIZE);
2200 skb_copy_from_linear_data(sb, skb->data,
2201 NS_SMBUFSIZE);
2202 skb_put(skb, len - NS_SMBUFSIZE);
2203 ATM_SKB(skb)->vcc = vcc;
2204 __net_timestamp(skb);
2205 vcc->push(vcc, skb);
2206 atomic_inc(&vcc->stats->rx);
2207 }
2208
2209 push_rxbufs(card, sb);
2210
2211 }
2212
2213 } else { /* Must push a huge buffer */
2214
2215 struct sk_buff *hb, *sb, *lb;
2216 int remaining, tocopy;
2217 int j;
2218
2219 hb = skb_dequeue(&(card->hbpool.queue));
2220 if (hb == NULL) { /* No buffers in the queue */
2221
2222 hb = dev_alloc_skb(NS_HBUFSIZE);
2223 if (hb == NULL) {
2224 printk
2225 ("nicstar%d: Out of huge buffers.\n",
2226 card->index);
2227 atomic_inc(&vcc->stats->rx_drop);
2228 recycle_iovec_rx_bufs(card,
2229 (struct iovec *)
2230 iovb->data,
864a3ff6 2231 NS_PRV_IOVCNT(iovb));
098fde11
C		 2232 vc->rx_iov = NULL;
2233 recycle_iov_buf(card, iovb);
2234 return;
2235 } else if (card->hbpool.count < card->hbnr.min) {
2236 struct sk_buff *new_hb;
2237 if ((new_hb =
2238 dev_alloc_skb(NS_HBUFSIZE)) !=
2239 NULL) {
2240 skb_queue_tail(&card->hbpool.
2241 queue, new_hb);
2242 card->hbpool.count++;
2243 }
2244 }
864a3ff6 2245 NS_PRV_BUFTYPE(hb) = BUF_NONE;
098fde11
C		 2246 } else if (--card->hbpool.count < card->hbnr.min) {
2247 struct sk_buff *new_hb;
2248 if ((new_hb =
2249 dev_alloc_skb(NS_HBUFSIZE)) != NULL) {
864a3ff6 2250 NS_PRV_BUFTYPE(new_hb) = BUF_NONE;
098fde11
C		 2251 skb_queue_tail(&card->hbpool.queue,
2252 new_hb);
2253 card->hbpool.count++;
2254 }
2255 if (card->hbpool.count < card->hbnr.min) {
2256 if ((new_hb =
2257 dev_alloc_skb(NS_HBUFSIZE)) !=
2258 NULL) {
864a3ff6 2259 NS_PRV_BUFTYPE(new_hb) =
098fde11
C		 2260 BUF_NONE;
2261 skb_queue_tail(&card->hbpool.
2262 queue, new_hb);
2263 card->hbpool.count++;
2264 }
2265 }
2266 }
2267
2268 iov = (struct iovec *)iovb->data;
2269
2270 if (!atm_charge(vcc, hb->truesize)) {
2271 recycle_iovec_rx_bufs(card, iov,
864a3ff6 2272 NS_PRV_IOVCNT(iovb));
098fde11
C		 2273 if (card->hbpool.count < card->hbnr.max) {
2274 skb_queue_tail(&card->hbpool.queue, hb);
2275 card->hbpool.count++;
2276 } else
2277 dev_kfree_skb_any(hb);
2278 atomic_inc(&vcc->stats->rx_drop);
2279 } else {
2280 /* Copy the small buffer to the huge buffer */
2281 sb = (struct sk_buff *)iov->iov_base;
2282 skb_copy_from_linear_data(sb, hb->data,
2283 iov->iov_len);
2284 skb_put(hb, iov->iov_len);
2285 remaining = len - iov->iov_len;
2286 iov++;
2287 /* Free the small buffer */
2288 push_rxbufs(card, sb);
2289
2290 /* Copy all large buffers to the huge buffer and free them */
864a3ff6 2291 for (j = 1; j < NS_PRV_IOVCNT(iovb); j++) {
098fde11
C		 2292 lb = (struct sk_buff *)iov->iov_base;
2293 tocopy =
2294 min_t(int, remaining, iov->iov_len);
2295 skb_copy_from_linear_data(lb,
2296 skb_tail_pointer
2297 (hb), tocopy);
2298 skb_put(hb, tocopy);
2299 iov++;
2300 remaining -= tocopy;
2301 push_rxbufs(card, lb);
2302 }
1da177e4 2303#ifdef EXTRA_DEBUG
098fde11
C		 2304 if (remaining != 0 || hb->len != len)
2305 printk
2306 ("nicstar%d: Huge buffer len mismatch.\n",
2307 card->index);
1da177e4 2308#endif /* EXTRA_DEBUG */
098fde11 2309 ATM_SKB(hb)->vcc = vcc;
098fde11
C		 2310 __net_timestamp(hb);
2311 vcc->push(vcc, hb);
2312 atomic_inc(&vcc->stats->rx);
2313 }
2314 }
1da177e4 2315
098fde11
C		 2316 vc->rx_iov = NULL;
2317 recycle_iov_buf(card, iovb);
2318 }
1da177e4
LT		 2319
2320}
2321
098fde11 2322static void recycle_rx_buf(ns_dev * card, struct sk_buff *skb)
1da177e4 2323{
864a3ff6 2324 if (unlikely(NS_PRV_BUFTYPE(skb) == BUF_NONE)) {
098fde11
C		 2325 printk("nicstar%d: What kind of rx buffer is this?\n",
2326 card->index);
8728b834
DM		 2327 dev_kfree_skb_any(skb);
2328 } else
2329 push_rxbufs(card, skb);
2330}
1da177e4 2331
098fde11 2332static void recycle_iovec_rx_bufs(ns_dev * card, struct iovec *iov, int count)
1da177e4 2333{
8728b834 2334 while (count-- > 0)
098fde11 2335 recycle_rx_buf(card, (struct sk_buff *)(iov++)->iov_base);
1da177e4
LT		 2336}
2337
098fde11 2338static void recycle_iov_buf(ns_dev * card, struct sk_buff *iovb)
1da177e4 2339{
098fde11
C		 2340 if (card->iovpool.count < card->iovnr.max) {
2341 skb_queue_tail(&card->iovpool.queue, iovb);
2342 card->iovpool.count++;
2343 } else
2344 dev_kfree_skb_any(iovb);
1da177e4
LT		 2345}
2346
098fde11 2347static void dequeue_sm_buf(ns_dev * card, struct sk_buff *sb)
1da177e4 2348{
098fde11 2349 skb_unlink(sb, &card->sbpool.queue);
098fde11
C		 2350 if (card->sbfqc < card->sbnr.init) {
2351 struct sk_buff *new_sb;
2352 if ((new_sb = dev_alloc_skb(NS_SMSKBSIZE)) != NULL) {
864a3ff6 2353 NS_PRV_BUFTYPE(new_sb) = BUF_SM;
098fde11
C		 2354 skb_queue_tail(&card->sbpool.queue, new_sb);
2355 skb_reserve(new_sb, NS_AAL0_HEADER);
2356 push_rxbufs(card, new_sb);
2357 }
2358 }
2359 if (card->sbfqc < card->sbnr.init)
098fde11
C		 2360 {
2361 struct sk_buff *new_sb;
2362 if ((new_sb = dev_alloc_skb(NS_SMSKBSIZE)) != NULL) {
864a3ff6 2363 NS_PRV_BUFTYPE(new_sb) = BUF_SM;
098fde11
C		 2364 skb_queue_tail(&card->sbpool.queue, new_sb);
2365 skb_reserve(new_sb, NS_AAL0_HEADER);
2366 push_rxbufs(card, new_sb);
2367 }
2368 }
1da177e4
LT		 2369}
2370
098fde11 2371static void dequeue_lg_buf(ns_dev * card, struct sk_buff *lb)
1da177e4 2372{
098fde11 2373 skb_unlink(lb, &card->lbpool.queue);
098fde11
C		 2374 if (card->lbfqc < card->lbnr.init) {
2375 struct sk_buff *new_lb;
2376 if ((new_lb = dev_alloc_skb(NS_LGSKBSIZE)) != NULL) {
864a3ff6 2377 NS_PRV_BUFTYPE(new_lb) = BUF_LG;
098fde11
C		 2378 skb_queue_tail(&card->lbpool.queue, new_lb);
2379 skb_reserve(new_lb, NS_SMBUFSIZE);
2380 push_rxbufs(card, new_lb);
2381 }
2382 }
2383 if (card->lbfqc < card->lbnr.init)
098fde11
C		 2384 {
2385 struct sk_buff *new_lb;
2386 if ((new_lb = dev_alloc_skb(NS_LGSKBSIZE)) != NULL) {
864a3ff6 2387 NS_PRV_BUFTYPE(new_lb) = BUF_LG;
098fde11
C		 2388 skb_queue_tail(&card->lbpool.queue, new_lb);
2389 skb_reserve(new_lb, NS_SMBUFSIZE);
2390 push_rxbufs(card, new_lb);
2391 }
2392 }
1da177e4
LT		 2393}
2394
098fde11 2395static int ns_proc_read(struct atm_dev *dev, loff_t * pos, char *page)
1da177e4 2396{
098fde11
C		 2397 u32 stat;
2398 ns_dev *card;
2399 int left;
2400
2401 left = (int)*pos;
2402 card = (ns_dev *) dev->dev_data;
2403 stat = readl(card->membase + STAT);
2404 if (!left--)
2405 return sprintf(page, "Pool count min init max \n");
2406 if (!left--)
2407 return sprintf(page, "Small %5d %5d %5d %5d \n",
2408 ns_stat_sfbqc_get(stat), card->sbnr.min,
2409 card->sbnr.init, card->sbnr.max);
2410 if (!left--)
2411 return sprintf(page, "Large %5d %5d %5d %5d \n",
2412 ns_stat_lfbqc_get(stat), card->lbnr.min,
2413 card->lbnr.init, card->lbnr.max);
2414 if (!left--)
2415 return sprintf(page, "Huge %5d %5d %5d %5d \n",
2416 card->hbpool.count, card->hbnr.min,
2417 card->hbnr.init, card->hbnr.max);
2418 if (!left--)
2419 return sprintf(page, "Iovec %5d %5d %5d %5d \n",
2420 card->iovpool.count, card->iovnr.min,
2421 card->iovnr.init, card->iovnr.max);
2422 if (!left--) {
2423 int retval;
2424 retval =
2425 sprintf(page, "Interrupt counter: %u \n", card->intcnt);
2426 card->intcnt = 0;
2427 return retval;
2428 }
1da177e4 2429#if 0
098fde11
C		 2430 /* Dump 25.6 Mbps PHY registers */
2431 /* Now there's a 25.6 Mbps PHY driver this code isn't needed. I left it
2432 here just in case it's needed for debugging. */
2433 if (card->max_pcr == ATM_25_PCR && !left--) {
2434 u32 phy_regs[4];
2435 u32 i;
2436
2437 for (i = 0; i < 4; i++) {
2438 while (CMD_BUSY(card)) ;
2439 writel(NS_CMD_READ_UTILITY | 0x00000200 | i,
2440 card->membase + CMD);
2441 while (CMD_BUSY(card)) ;
2442 phy_regs[i] = readl(card->membase + DR0) & 0x000000FF;
2443 }
2444
2445 return sprintf(page, "PHY regs: 0x%02X 0x%02X 0x%02X 0x%02X \n",
2446 phy_regs[0], phy_regs[1], phy_regs[2],
2447 phy_regs[3]);
2448 }
1da177e4
LT		 2449#endif /* 0 - Dump 25.6 Mbps PHY registers */
2450#if 0
098fde11
C		 2451 /* Dump TST */
2452 if (left-- < NS_TST_NUM_ENTRIES) {
2453 if (card->tste2vc[left + 1] == NULL)
2454 return sprintf(page, "%5d - VBR/UBR \n", left + 1);
2455 else
2456 return sprintf(page, "%5d - %d %d \n", left + 1,
2457 card->tste2vc[left + 1]->tx_vcc->vpi,
2458 card->tste2vc[left + 1]->tx_vcc->vci);
2459 }
1da177e4 2460#endif /* 0 */
098fde11 2461 return 0;
1da177e4
LT		 2462}
2463
098fde11 2464static int ns_ioctl(struct atm_dev *dev, unsigned int cmd, void __user * arg)
1da177e4 2465{
098fde11
C		 2466 ns_dev *card;
2467 pool_levels pl;
2468 long btype;
2469 unsigned long flags;
2470
2471 card = dev->dev_data;
2472 switch (cmd) {
2473 case NS_GETPSTAT:
2474 if (get_user
2475 (pl.buftype, &((pool_levels __user *) arg)->buftype))
2476 return -EFAULT;
2477 switch (pl.buftype) {
2478 case NS_BUFTYPE_SMALL:
2479 pl.count =
2480 ns_stat_sfbqc_get(readl(card->membase + STAT));
2481 pl.level.min = card->sbnr.min;
2482 pl.level.init = card->sbnr.init;
2483 pl.level.max = card->sbnr.max;
2484 break;
2485
2486 case NS_BUFTYPE_LARGE:
2487 pl.count =
2488 ns_stat_lfbqc_get(readl(card->membase + STAT));
2489 pl.level.min = card->lbnr.min;
2490 pl.level.init = card->lbnr.init;
2491 pl.level.max = card->lbnr.max;
2492 break;
2493
2494 case NS_BUFTYPE_HUGE:
2495 pl.count = card->hbpool.count;
2496 pl.level.min = card->hbnr.min;
2497 pl.level.init = card->hbnr.init;
2498 pl.level.max = card->hbnr.max;
2499 break;
2500
2501 case NS_BUFTYPE_IOVEC:
2502 pl.count = card->iovpool.count;
2503 pl.level.min = card->iovnr.min;
2504 pl.level.init = card->iovnr.init;
2505 pl.level.max = card->iovnr.max;
2506 break;
2507
2508 default:
2509 return -ENOIOCTLCMD;
2510
2511 }
2512 if (!copy_to_user((pool_levels __user *) arg, &pl, sizeof(pl)))
2513 return (sizeof(pl));
2514 else
2515 return -EFAULT;
2516
2517 case NS_SETBUFLEV:
2518 if (!capable(CAP_NET_ADMIN))
2519 return -EPERM;
2520 if (copy_from_user(&pl, (pool_levels __user *) arg, sizeof(pl)))
2521 return -EFAULT;
2522 if (pl.level.min >= pl.level.init
2523 || pl.level.init >= pl.level.max)
2524 return -EINVAL;
2525 if (pl.level.min == 0)
2526 return -EINVAL;
2527 switch (pl.buftype) {
2528 case NS_BUFTYPE_SMALL:
2529 if (pl.level.max > TOP_SB)
2530 return -EINVAL;
2531 card->sbnr.min = pl.level.min;
2532 card->sbnr.init = pl.level.init;
2533 card->sbnr.max = pl.level.max;
2534 break;
2535
2536 case NS_BUFTYPE_LARGE:
2537 if (pl.level.max > TOP_LB)
2538 return -EINVAL;
2539 card->lbnr.min = pl.level.min;
2540 card->lbnr.init = pl.level.init;
2541 card->lbnr.max = pl.level.max;
2542 break;
2543
2544 case NS_BUFTYPE_HUGE:
2545 if (pl.level.max > TOP_HB)
2546 return -EINVAL;
2547 card->hbnr.min = pl.level.min;
2548 card->hbnr.init = pl.level.init;
2549 card->hbnr.max = pl.level.max;
2550 break;
2551
2552 case NS_BUFTYPE_IOVEC:
2553 if (pl.level.max > TOP_IOVB)
2554 return -EINVAL;
2555 card->iovnr.min = pl.level.min;
2556 card->iovnr.init = pl.level.init;
2557 card->iovnr.max = pl.level.max;
2558 break;
2559
2560 default:
2561 return -EINVAL;
2562
2563 }
2564 return 0;
2565
2566 case NS_ADJBUFLEV:
2567 if (!capable(CAP_NET_ADMIN))
2568 return -EPERM;
2569 btype = (long)arg; /* a long is the same size as a pointer or bigger */
2570 switch (btype) {
2571 case NS_BUFTYPE_SMALL:
2572 while (card->sbfqc < card->sbnr.init) {
2573 struct sk_buff *sb;
2574
2575 sb = __dev_alloc_skb(NS_SMSKBSIZE, GFP_KERNEL);
2576 if (sb == NULL)
2577 return -ENOMEM;
864a3ff6 2578 NS_PRV_BUFTYPE(sb) = BUF_SM;
098fde11
C		 2579 skb_queue_tail(&card->sbpool.queue, sb);
2580 skb_reserve(sb, NS_AAL0_HEADER);
2581 push_rxbufs(card, sb);
2582 }
2583 break;
2584
2585 case NS_BUFTYPE_LARGE:
2586 while (card->lbfqc < card->lbnr.init) {
2587 struct sk_buff *lb;
2588
2589 lb = __dev_alloc_skb(NS_LGSKBSIZE, GFP_KERNEL);
2590 if (lb == NULL)
2591 return -ENOMEM;
864a3ff6 2592 NS_PRV_BUFTYPE(lb) = BUF_LG;
098fde11
C		 2593 skb_queue_tail(&card->lbpool.queue, lb);
2594 skb_reserve(lb, NS_SMBUFSIZE);
2595 push_rxbufs(card, lb);
2596 }
2597 break;
2598
2599 case NS_BUFTYPE_HUGE:
2600 while (card->hbpool.count > card->hbnr.init) {
2601 struct sk_buff *hb;
2602
2603 spin_lock_irqsave(&card->int_lock, flags);
2604 hb = skb_dequeue(&card->hbpool.queue);
2605 card->hbpool.count--;
2606 spin_unlock_irqrestore(&card->int_lock, flags);
2607 if (hb == NULL)
2608 printk
2609 ("nicstar%d: huge buffer count inconsistent.\n",
2610 card->index);
2611 else
2612 dev_kfree_skb_any(hb);
2613
2614 }
2615 while (card->hbpool.count < card->hbnr.init) {
2616 struct sk_buff *hb;
2617
2618 hb = __dev_alloc_skb(NS_HBUFSIZE, GFP_KERNEL);
2619 if (hb == NULL)
2620 return -ENOMEM;
864a3ff6 2621 NS_PRV_BUFTYPE(hb) = BUF_NONE;
098fde11
C		 2622 spin_lock_irqsave(&card->int_lock, flags);
2623 skb_queue_tail(&card->hbpool.queue, hb);
2624 card->hbpool.count++;
2625 spin_unlock_irqrestore(&card->int_lock, flags);
2626 }
2627 break;
2628
2629 case NS_BUFTYPE_IOVEC:
2630 while (card->iovpool.count > card->iovnr.init) {
2631 struct sk_buff *iovb;
2632
2633 spin_lock_irqsave(&card->int_lock, flags);
2634 iovb = skb_dequeue(&card->iovpool.queue);
2635 card->iovpool.count--;
2636 spin_unlock_irqrestore(&card->int_lock, flags);
2637 if (iovb == NULL)
2638 printk
2639 ("nicstar%d: iovec buffer count inconsistent.\n",
2640 card->index);
2641 else
2642 dev_kfree_skb_any(iovb);
2643
2644 }
2645 while (card->iovpool.count < card->iovnr.init) {
2646 struct sk_buff *iovb;
2647
2648 iovb = alloc_skb(NS_IOVBUFSIZE, GFP_KERNEL);
2649 if (iovb == NULL)
2650 return -ENOMEM;
864a3ff6 2651 NS_PRV_BUFTYPE(iovb) = BUF_NONE;
098fde11
C		 2652 spin_lock_irqsave(&card->int_lock, flags);
2653 skb_queue_tail(&card->iovpool.queue, iovb);
2654 card->iovpool.count++;
2655 spin_unlock_irqrestore(&card->int_lock, flags);
2656 }
2657 break;
2658
2659 default:
2660 return -EINVAL;
2661
2662 }
2663 return 0;
2664
2665 default:
2666 if (dev->phy && dev->phy->ioctl) {
2667 return dev->phy->ioctl(dev, cmd, arg);
2668 } else {
2669 printk("nicstar%d: %s == NULL \n", card->index,
2670 dev->phy ? "dev->phy->ioctl" : "dev->phy");
2671 return -ENOIOCTLCMD;
2672 }
2673 }
1da177e4
LT		 2674}
2675
864a3ff6 2676#ifdef EXTRA_DEBUG
098fde11 2677static void which_list(ns_dev * card, struct sk_buff *skb)
1da177e4 2678{
864a3ff6 2679 printk("skb buf_type: 0x%08x\n", NS_PRV_BUFTYPE(skb));
1da177e4 2680}
864a3ff6 2681#endif /* EXTRA_DEBUG */
1da177e4 2682
1da177e4
LT		 2683static void ns_poll(unsigned long arg)
2684{
098fde11
C		 2685 int i;
2686 ns_dev *card;
2687 unsigned long flags;
2688 u32 stat_r, stat_w;
2689
2690 PRINTK("nicstar: Entering ns_poll().\n");
2691 for (i = 0; i < num_cards; i++) {
2692 card = cards[i];
2693 if (spin_is_locked(&card->int_lock)) {
2694 /* Probably it isn't worth spinning */
2695 continue;
2696 }
2697 spin_lock_irqsave(&card->int_lock, flags);
2698
2699 stat_w = 0;
2700 stat_r = readl(card->membase + STAT);
2701 if (stat_r & NS_STAT_TSIF)
2702 stat_w |= NS_STAT_TSIF;
2703 if (stat_r & NS_STAT_EOPDU)
2704 stat_w |= NS_STAT_EOPDU;
2705
2706 process_tsq(card);
2707 process_rsq(card);
2708
2709 writel(stat_w, card->membase + STAT);
2710 spin_unlock_irqrestore(&card->int_lock, flags);
2711 }
2712 mod_timer(&ns_timer, jiffies + NS_POLL_PERIOD);
2713 PRINTK("nicstar: Leaving ns_poll().\n");
1da177e4
LT		 2714}
2715
1da177e4 2716static void ns_phy_put(struct atm_dev *dev, unsigned char value,
098fde11 2717 unsigned long addr)
1da177e4 2718{
098fde11
C		 2719 ns_dev *card;
2720 unsigned long flags;
2721
2722 card = dev->dev_data;
2723 spin_lock_irqsave(&card->res_lock, flags);
2724 while (CMD_BUSY(card)) ;
864a3ff6 2725 writel((u32) value, card->membase + DR0);
098fde11
C		 2726 writel(NS_CMD_WRITE_UTILITY | 0x00000200 | (addr & 0x000000FF),
2727 card->membase + CMD);
2728 spin_unlock_irqrestore(&card->res_lock, flags);
1da177e4
LT		 2729}
2730
1da177e4
LT		 2731static unsigned char ns_phy_get(struct atm_dev *dev, unsigned long addr)
2732{
098fde11
C		 2733 ns_dev *card;
2734 unsigned long flags;
864a3ff6 2735 u32 data;
098fde11
C		 2736
2737 card = dev->dev_data;
2738 spin_lock_irqsave(&card->res_lock, flags);
2739 while (CMD_BUSY(card)) ;
2740 writel(NS_CMD_READ_UTILITY | 0x00000200 | (addr & 0x000000FF),
2741 card->membase + CMD);
2742 while (CMD_BUSY(card)) ;
2743 data = readl(card->membase + DR0) & 0x000000FF;
2744 spin_unlock_irqrestore(&card->res_lock, flags);
2745 return (unsigned char)data;
1da177e4
LT		 2746}
2747
1da177e4
LT		 2748module_init(nicstar_init);
2749module_exit(nicstar_cleanup);
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