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solos: Add 'reset' module parameter to reset the DSL chips on load
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9c54004e
DW
1/*
2 * Driver for the Solos PCI ADSL2+ card, designed to support Linux by
3 * Traverse Technologies -- http://www.traverse.com.au/
4 * Xrio Limited -- http://www.xrio.com/
5 *
6 *
7 * Copyright © 2008 Traverse Technologies
8 * Copyright © 2008 Intel Corporation
9 *
10 * Authors: Nathan Williams <nathan@traverse.com.au>
11 * David Woodhouse <dwmw2@infradead.org>
7c4015bd 12 * Treker Chen <treker@xrio.com>
9c54004e
DW
13 *
14 * This program is free software; you can redistribute it and/or
15 * modify it under the terms of the GNU General Public License
16 * version 2, as published by the Free Software Foundation.
17 *
18 * This program is distributed in the hope that it will be useful,
19 * but WITHOUT ANY WARRANTY; without even the implied warranty of
20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 * GNU General Public License for more details.
22 */
23
24#define DEBUG
25#define VERBOSE_DEBUG
26
27#include <linux/interrupt.h>
28#include <linux/module.h>
29#include <linux/kernel.h>
30#include <linux/errno.h>
31#include <linux/ioport.h>
32#include <linux/types.h>
33#include <linux/pci.h>
34#include <linux/atm.h>
35#include <linux/atmdev.h>
36#include <linux/skbuff.h>
37#include <linux/sysfs.h>
38#include <linux/device.h>
39#include <linux/kobject.h>
7c4015bd 40#include <linux/firmware.h>
01e2ffac
DW
41#include <linux/ctype.h>
42#include <linux/swab.h>
9c54004e 43
7c4015bd 44#define VERSION "0.07"
9c54004e
DW
45#define PTAG "solos-pci"
46
47#define CONFIG_RAM_SIZE 128
48#define FLAGS_ADDR 0x7C
49#define IRQ_EN_ADDR 0x78
50#define FPGA_VER 0x74
51#define IRQ_CLEAR 0x70
7c4015bd
SF
52#define WRITE_FLASH 0x6C
53#define PORTS 0x68
54#define FLASH_BLOCK 0x64
55#define FLASH_BUSY 0x60
56#define FPGA_MODE 0x5C
57#define FLASH_MODE 0x58
90937231
DW
58#define TX_DMA_ADDR(port) (0x40 + (4 * (port)))
59#define RX_DMA_ADDR(port) (0x30 + (4 * (port)))
9c54004e
DW
60
61#define DATA_RAM_SIZE 32768
62#define BUF_SIZE 4096
7c4015bd
SF
63#define FPGA_PAGE 528 /* FPGA flash page size*/
64#define SOLOS_PAGE 512 /* Solos flash page size*/
65#define FPGA_BLOCK (FPGA_PAGE * 8) /* FPGA flash block size*/
66#define SOLOS_BLOCK (SOLOS_PAGE * 8) /* Solos flash block size*/
9c54004e
DW
67
68#define RX_BUF(card, nr) ((card->buffers) + (nr)*BUF_SIZE*2)
69#define TX_BUF(card, nr) ((card->buffers) + (nr)*BUF_SIZE*2 + BUF_SIZE)
70
eaf83e39
DW
71#define RX_DMA_SIZE 2048
72
cc3657e1 73static int reset = 0;
9c54004e 74static int atmdebug = 0;
7c4015bd
SF
75static int firmware_upgrade = 0;
76static int fpga_upgrade = 0;
9c54004e
DW
77
78struct pkt_hdr {
79 __le16 size;
80 __le16 vpi;
81 __le16 vci;
82 __le16 type;
83};
84
90937231
DW
85struct solos_skb_cb {
86 struct atm_vcc *vcc;
87 uint32_t dma_addr;
88};
89
90
91#define SKB_CB(skb) ((struct solos_skb_cb *)skb->cb)
92
9c54004e
DW
93#define PKT_DATA 0
94#define PKT_COMMAND 1
95#define PKT_POPEN 3
96#define PKT_PCLOSE 4
87ebb186 97#define PKT_STATUS 5
9c54004e
DW
98
99struct solos_card {
100 void __iomem *config_regs;
101 void __iomem *buffers;
102 int nr_ports;
f69e4170 103 int tx_mask;
9c54004e
DW
104 struct pci_dev *dev;
105 struct atm_dev *atmdev[4];
106 struct tasklet_struct tlet;
107 spinlock_t tx_lock;
108 spinlock_t tx_queue_lock;
109 spinlock_t cli_queue_lock;
01e2ffac
DW
110 spinlock_t param_queue_lock;
111 struct list_head param_queue;
9c54004e
DW
112 struct sk_buff_head tx_queue[4];
113 struct sk_buff_head cli_queue[4];
90937231
DW
114 struct sk_buff *tx_skb[4];
115 struct sk_buff *rx_skb[4];
01e2ffac 116 wait_queue_head_t param_wq;
fa755b9f 117 wait_queue_head_t fw_wq;
90937231 118 int using_dma;
9c54004e
DW
119};
120
01e2ffac
DW
121
122struct solos_param {
123 struct list_head list;
124 pid_t pid;
125 int port;
126 struct sk_buff *response;
01e2ffac
DW
127};
128
9c54004e
DW
129#define SOLOS_CHAN(atmdev) ((int)(unsigned long)(atmdev)->phy_data)
130
131MODULE_AUTHOR("Traverse Technologies <support@traverse.com.au>");
132MODULE_DESCRIPTION("Solos PCI driver");
133MODULE_VERSION(VERSION);
134MODULE_LICENSE("GPL");
cc3657e1 135MODULE_PARM_DESC(reset, "Reset Solos chips on startup");
9c54004e 136MODULE_PARM_DESC(atmdebug, "Print ATM data");
7c4015bd
SF
137MODULE_PARM_DESC(firmware_upgrade, "Initiate Solos firmware upgrade");
138MODULE_PARM_DESC(fpga_upgrade, "Initiate FPGA upgrade");
cc3657e1 139module_param(reset, int, 0444);
4306cad6 140module_param(atmdebug, int, 0644);
7c4015bd
SF
141module_param(firmware_upgrade, int, 0444);
142module_param(fpga_upgrade, int, 0444);
9c54004e 143
9c54004e
DW
144static void fpga_queue(struct solos_card *card, int port, struct sk_buff *skb,
145 struct atm_vcc *vcc);
35c2221b 146static uint32_t fpga_tx(struct solos_card *);
9c54004e
DW
147static irqreturn_t solos_irq(int irq, void *dev_id);
148static struct atm_vcc* find_vcc(struct atm_dev *dev, short vpi, int vci);
149static int list_vccs(int vci);
1e615df6 150static void release_vccs(struct atm_dev *dev);
9c54004e
DW
151static int atm_init(struct solos_card *);
152static void atm_remove(struct solos_card *);
153static int send_command(struct solos_card *card, int dev, const char *buf, size_t size);
154static void solos_bh(unsigned long);
155static int print_buffer(struct sk_buff *buf);
156
157static inline void solos_pop(struct atm_vcc *vcc, struct sk_buff *skb)
158{
159 if (vcc->pop)
160 vcc->pop(vcc, skb);
161 else
162 dev_kfree_skb_any(skb);
163}
164
01e2ffac
DW
165static ssize_t solos_param_show(struct device *dev, struct device_attribute *attr,
166 char *buf)
167{
168 struct atm_dev *atmdev = container_of(dev, struct atm_dev, class_dev);
169 struct solos_card *card = atmdev->dev_data;
170 struct solos_param prm;
171 struct sk_buff *skb;
172 struct pkt_hdr *header;
173 int buflen;
174
175 buflen = strlen(attr->attr.name) + 10;
176
3456b221 177 skb = alloc_skb(sizeof(*header) + buflen, GFP_KERNEL);
01e2ffac
DW
178 if (!skb) {
179 dev_warn(&card->dev->dev, "Failed to allocate sk_buff in solos_param_show()\n");
180 return -ENOMEM;
181 }
182
183 header = (void *)skb_put(skb, sizeof(*header));
184
185 buflen = snprintf((void *)&header[1], buflen - 1,
186 "L%05d\n%s\n", current->pid, attr->attr.name);
187 skb_put(skb, buflen);
188
189 header->size = cpu_to_le16(buflen);
190 header->vpi = cpu_to_le16(0);
191 header->vci = cpu_to_le16(0);
192 header->type = cpu_to_le16(PKT_COMMAND);
193
194 prm.pid = current->pid;
195 prm.response = NULL;
196 prm.port = SOLOS_CHAN(atmdev);
197
198 spin_lock_irq(&card->param_queue_lock);
199 list_add(&prm.list, &card->param_queue);
200 spin_unlock_irq(&card->param_queue_lock);
201
202 fpga_queue(card, prm.port, skb, NULL);
203
204 wait_event_timeout(card->param_wq, prm.response, 5 * HZ);
205
206 spin_lock_irq(&card->param_queue_lock);
207 list_del(&prm.list);
208 spin_unlock_irq(&card->param_queue_lock);
209
210 if (!prm.response)
211 return -EIO;
212
213 buflen = prm.response->len;
214 memcpy(buf, prm.response->data, buflen);
215 kfree_skb(prm.response);
216
217 return buflen;
218}
219
220static ssize_t solos_param_store(struct device *dev, struct device_attribute *attr,
221 const char *buf, size_t count)
222{
223 struct atm_dev *atmdev = container_of(dev, struct atm_dev, class_dev);
224 struct solos_card *card = atmdev->dev_data;
225 struct solos_param prm;
226 struct sk_buff *skb;
227 struct pkt_hdr *header;
228 int buflen;
229 ssize_t ret;
230
231 buflen = strlen(attr->attr.name) + 11 + count;
232
3456b221 233 skb = alloc_skb(sizeof(*header) + buflen, GFP_KERNEL);
01e2ffac
DW
234 if (!skb) {
235 dev_warn(&card->dev->dev, "Failed to allocate sk_buff in solos_param_store()\n");
236 return -ENOMEM;
237 }
238
239 header = (void *)skb_put(skb, sizeof(*header));
240
241 buflen = snprintf((void *)&header[1], buflen - 1,
242 "L%05d\n%s\n%s\n", current->pid, attr->attr.name, buf);
243
244 skb_put(skb, buflen);
245 header->size = cpu_to_le16(buflen);
246 header->vpi = cpu_to_le16(0);
247 header->vci = cpu_to_le16(0);
248 header->type = cpu_to_le16(PKT_COMMAND);
249
250 prm.pid = current->pid;
251 prm.response = NULL;
252 prm.port = SOLOS_CHAN(atmdev);
253
254 spin_lock_irq(&card->param_queue_lock);
255 list_add(&prm.list, &card->param_queue);
256 spin_unlock_irq(&card->param_queue_lock);
257
258 fpga_queue(card, prm.port, skb, NULL);
259
260 wait_event_timeout(card->param_wq, prm.response, 5 * HZ);
261
262 spin_lock_irq(&card->param_queue_lock);
263 list_del(&prm.list);
264 spin_unlock_irq(&card->param_queue_lock);
265
266 skb = prm.response;
267
268 if (!skb)
269 return -EIO;
270
271 buflen = skb->len;
272
273 /* Sometimes it has a newline, sometimes it doesn't. */
274 if (skb->data[buflen - 1] == '\n')
275 buflen--;
276
277 if (buflen == 2 && !strncmp(skb->data, "OK", 2))
278 ret = count;
279 else if (buflen == 5 && !strncmp(skb->data, "ERROR", 5))
280 ret = -EIO;
281 else {
282 /* We know we have enough space allocated for this; we allocated
283 it ourselves */
284 skb->data[buflen] = 0;
285
286 dev_warn(&card->dev->dev, "Unexpected parameter response: '%s'\n",
287 skb->data);
288 ret = -EIO;
289 }
290 kfree_skb(skb);
291
292 return ret;
293}
294
87ebb186
DW
295static char *next_string(struct sk_buff *skb)
296{
297 int i = 0;
298 char *this = skb->data;
c6428e52
DW
299
300 for (i = 0; i < skb->len; i++) {
87ebb186
DW
301 if (this[i] == '\n') {
302 this[i] = 0;
c6428e52 303 skb_pull(skb, i + 1);
87ebb186
DW
304 return this;
305 }
c6428e52
DW
306 if (!isprint(this[i]))
307 return NULL;
87ebb186
DW
308 }
309 return NULL;
310}
311
312/*
313 * Status packet has fields separated by \n, starting with a version number
314 * for the information therein. Fields are....
315 *
316 * packet version
317 * TxBitRate (version >= 1)
318 * RxBitRate (version >= 1)
319 * State (version >= 1)
320 */
321static int process_status(struct solos_card *card, int port, struct sk_buff *skb)
322{
af780656 323 char *str, *end, *state_str;
c6428e52 324 int ver, rate_up, rate_down, state;
87ebb186
DW
325
326 if (!card->atmdev[port])
327 return -ENODEV;
328
329 str = next_string(skb);
330 if (!str)
331 return -EIO;
332
333 ver = simple_strtol(str, NULL, 10);
334 if (ver < 1) {
335 dev_warn(&card->dev->dev, "Unexpected status interrupt version %d\n",
336 ver);
337 return -EIO;
338 }
339
340 str = next_string(skb);
c6428e52
DW
341 if (!str)
342 return -EIO;
87ebb186
DW
343 rate_up = simple_strtol(str, &end, 10);
344 if (*end)
345 return -EIO;
346
347 str = next_string(skb);
c6428e52
DW
348 if (!str)
349 return -EIO;
87ebb186
DW
350 rate_down = simple_strtol(str, &end, 10);
351 if (*end)
352 return -EIO;
353
af780656 354 state_str = next_string(skb);
c6428e52
DW
355 if (!state_str)
356 return -EIO;
af780656 357 if (!strcmp(state_str, "Showtime"))
87ebb186 358 state = ATM_PHY_SIG_FOUND;
1e615df6
DW
359 else {
360 state = ATM_PHY_SIG_LOST;
361 release_vccs(card->atmdev[port]);
362 }
87ebb186 363
c6428e52 364 if (state == ATM_PHY_SIG_LOST) {
af780656
DW
365 dev_info(&card->dev->dev, "Port %d ATM state: %s\n",
366 port, state_str);
c6428e52
DW
367 } else {
368 char *snr, *attn;
369
370 snr = next_string(skb);
371 if (!str)
372 return -EIO;
373 attn = next_string(skb);
374 if (!attn)
375 return -EIO;
376
377 dev_info(&card->dev->dev, "Port %d: %s (%d/%d kb/s%s%s%s%s)\n",
378 port, state_str, rate_down/1000, rate_up/1000,
379 snr[0]?", SNR ":"", snr, attn[0]?", Attn ":"", attn);
380 }
381 card->atmdev[port]->link_rate = rate_down / 424;
87ebb186
DW
382 card->atmdev[port]->signal = state;
383
87ebb186
DW
384 return 0;
385}
386
01e2ffac
DW
387static int process_command(struct solos_card *card, int port, struct sk_buff *skb)
388{
389 struct solos_param *prm;
390 unsigned long flags;
391 int cmdpid;
392 int found = 0;
393
394 if (skb->len < 7)
395 return 0;
396
397 if (skb->data[0] != 'L' || !isdigit(skb->data[1]) ||
398 !isdigit(skb->data[2]) || !isdigit(skb->data[3]) ||
399 !isdigit(skb->data[4]) || !isdigit(skb->data[5]) ||
400 skb->data[6] != '\n')
401 return 0;
402
403 cmdpid = simple_strtol(&skb->data[1], NULL, 10);
404
405 spin_lock_irqsave(&card->param_queue_lock, flags);
406 list_for_each_entry(prm, &card->param_queue, list) {
407 if (prm->port == port && prm->pid == cmdpid) {
408 prm->response = skb;
409 skb_pull(skb, 7);
410 wake_up(&card->param_wq);
411 found = 1;
412 break;
413 }
414 }
415 spin_unlock_irqrestore(&card->param_queue_lock, flags);
416 return found;
417}
418
9c54004e
DW
419static ssize_t console_show(struct device *dev, struct device_attribute *attr,
420 char *buf)
421{
422 struct atm_dev *atmdev = container_of(dev, struct atm_dev, class_dev);
423 struct solos_card *card = atmdev->dev_data;
424 struct sk_buff *skb;
425
426 spin_lock(&card->cli_queue_lock);
427 skb = skb_dequeue(&card->cli_queue[SOLOS_CHAN(atmdev)]);
428 spin_unlock(&card->cli_queue_lock);
429 if(skb == NULL)
430 return sprintf(buf, "No data.\n");
431
432 memcpy(buf, skb->data, skb->len);
433 dev_dbg(&card->dev->dev, "len: %d\n", skb->len);
434
435 kfree_skb(skb);
436 return skb->len;
437}
438
439static int send_command(struct solos_card *card, int dev, const char *buf, size_t size)
440{
441 struct sk_buff *skb;
442 struct pkt_hdr *header;
443
9c54004e
DW
444 if (size > (BUF_SIZE - sizeof(*header))) {
445 dev_dbg(&card->dev->dev, "Command is too big. Dropping request\n");
446 return 0;
447 }
448 skb = alloc_skb(size + sizeof(*header), GFP_ATOMIC);
449 if (!skb) {
450 dev_warn(&card->dev->dev, "Failed to allocate sk_buff in send_command()\n");
451 return 0;
452 }
453
454 header = (void *)skb_put(skb, sizeof(*header));
455
456 header->size = cpu_to_le16(size);
457 header->vpi = cpu_to_le16(0);
458 header->vci = cpu_to_le16(0);
459 header->type = cpu_to_le16(PKT_COMMAND);
460
461 memcpy(skb_put(skb, size), buf, size);
462
463 fpga_queue(card, dev, skb, NULL);
464
465 return 0;
466}
467
468static ssize_t console_store(struct device *dev, struct device_attribute *attr,
469 const char *buf, size_t count)
470{
471 struct atm_dev *atmdev = container_of(dev, struct atm_dev, class_dev);
472 struct solos_card *card = atmdev->dev_data;
473 int err;
474
475 err = send_command(card, SOLOS_CHAN(atmdev), buf, count);
476
477 return err?:count;
478}
479
480static DEVICE_ATTR(console, 0644, console_show, console_store);
d057f0a4
DW
481
482
483#define SOLOS_ATTR_RO(x) static DEVICE_ATTR(x, 0444, solos_param_show, NULL);
484#define SOLOS_ATTR_RW(x) static DEVICE_ATTR(x, 0644, solos_param_show, solos_param_store);
485
486#include "solos-attrlist.c"
487
488#undef SOLOS_ATTR_RO
489#undef SOLOS_ATTR_RW
490
491#define SOLOS_ATTR_RO(x) &dev_attr_##x.attr,
492#define SOLOS_ATTR_RW(x) &dev_attr_##x.attr,
493
494static struct attribute *solos_attrs[] = {
495#include "solos-attrlist.c"
496 NULL
497};
498
499static struct attribute_group solos_attr_group = {
500 .attrs = solos_attrs,
501 .name = "parameters",
502};
9c54004e 503
fa755b9f
DW
504static int flash_upgrade(struct solos_card *card, int chip)
505{
506 const struct firmware *fw;
507 const char *fw_name;
7c4015bd
SF
508 uint32_t data32 = 0;
509 int blocksize = 0;
510 int numblocks = 0;
fa755b9f
DW
511 int offset;
512
513 if (chip == 0) {
514 fw_name = "solos-FPGA.bin";
7c4015bd
SF
515 blocksize = FPGA_BLOCK;
516 } else {
fa755b9f 517 fw_name = "solos-Firmware.bin";
7c4015bd
SF
518 blocksize = SOLOS_BLOCK;
519 }
fa755b9f
DW
520
521 if (request_firmware(&fw, fw_name, &card->dev->dev))
522 return -ENOENT;
523
524 dev_info(&card->dev->dev, "Flash upgrade starting\n");
525
526 numblocks = fw->size / blocksize;
527 dev_info(&card->dev->dev, "Firmware size: %zd\n", fw->size);
7c4015bd
SF
528 dev_info(&card->dev->dev, "Number of blocks: %d\n", numblocks);
529
7c4015bd
SF
530 dev_info(&card->dev->dev, "Changing FPGA to Update mode\n");
531 iowrite32(1, card->config_regs + FPGA_MODE);
532 data32 = ioread32(card->config_regs + FPGA_MODE);
7c4015bd 533
fa755b9f
DW
534 /* Set mode to Chip Erase */
535 dev_info(&card->dev->dev, "Set FPGA Flash mode to %s Chip Erase\n",
536 chip?"Solos":"FPGA");
537 iowrite32((chip * 2), card->config_regs + FLASH_MODE);
7c4015bd 538
7c4015bd 539
fa755b9f
DW
540 iowrite32(1, card->config_regs + WRITE_FLASH);
541 wait_event(card->fw_wq, !ioread32(card->config_regs + FLASH_BUSY));
542
543 for (offset = 0; offset < fw->size; offset += blocksize) {
544 int i;
545
546 /* Clear write flag */
7c4015bd 547 iowrite32(0, card->config_regs + WRITE_FLASH);
7c4015bd 548
fa755b9f
DW
549 /* Set mode to Block Write */
550 /* dev_info(&card->dev->dev, "Set FPGA Flash mode to Block Write\n"); */
551 iowrite32(((chip * 2) + 1), card->config_regs + FLASH_MODE);
552
553 /* Copy block to buffer, swapping each 16 bits */
554 for(i = 0; i < blocksize; i += 4) {
555 uint32_t word = swahb32p((uint32_t *)(fw->data + offset + i));
556 iowrite32(word, RX_BUF(card, 3) + i);
7c4015bd 557 }
fa755b9f
DW
558
559 /* Specify block number and then trigger flash write */
560 iowrite32(offset / blocksize, card->config_regs + FLASH_BLOCK);
561 iowrite32(1, card->config_regs + WRITE_FLASH);
562 wait_event(card->fw_wq, !ioread32(card->config_regs + FLASH_BUSY));
7c4015bd
SF
563 }
564
fa755b9f
DW
565 release_firmware(fw);
566 iowrite32(0, card->config_regs + WRITE_FLASH);
567 iowrite32(0, card->config_regs + FPGA_MODE);
568 iowrite32(0, card->config_regs + FLASH_MODE);
569 dev_info(&card->dev->dev, "Returning FPGA to Data mode\n");
570 return 0;
7c4015bd
SF
571}
572
9c54004e
DW
573static irqreturn_t solos_irq(int irq, void *dev_id)
574{
575 struct solos_card *card = dev_id;
576 int handled = 1;
577
9c54004e 578 iowrite32(0, card->config_regs + IRQ_CLEAR);
9c54004e 579
35c2221b 580 /* If we're up and running, just kick the tasklet to process TX/RX */
fa755b9f 581 if (card->atmdev[0])
9c54004e 582 tasklet_schedule(&card->tlet);
fa755b9f
DW
583 else
584 wake_up(&card->fw_wq);
9c54004e 585
9c54004e
DW
586 return IRQ_RETVAL(handled);
587}
588
589void solos_bh(unsigned long card_arg)
590{
591 struct solos_card *card = (void *)card_arg;
9c54004e 592 uint32_t card_flags;
9c54004e 593 uint32_t rx_done = 0;
35c2221b 594 int port;
9c54004e 595
35c2221b
DW
596 /*
597 * Since fpga_tx() is going to need to read the flags under its lock,
598 * it can return them to us so that we don't have to hit PCI MMIO
599 * again for the same information
600 */
601 card_flags = fpga_tx(card);
9c54004e
DW
602
603 for (port = 0; port < card->nr_ports; port++) {
604 if (card_flags & (0x10 << port)) {
90937231 605 struct pkt_hdr _hdr, *header;
9c54004e
DW
606 struct sk_buff *skb;
607 struct atm_vcc *vcc;
608 int size;
609
90937231
DW
610 if (card->using_dma) {
611 skb = card->rx_skb[port];
eaf83e39
DW
612 card->rx_skb[port] = NULL;
613
614 pci_unmap_single(card->dev, SKB_CB(skb)->dma_addr,
615 RX_DMA_SIZE, PCI_DMA_FROMDEVICE);
616
90937231
DW
617 header = (void *)skb->data;
618 size = le16_to_cpu(header->size);
619 skb_put(skb, size + sizeof(*header));
620 skb_pull(skb, sizeof(*header));
621 } else {
622 header = &_hdr;
9c54004e 623
90937231 624 rx_done |= 0x10 << port;
9c54004e 625
90937231 626 memcpy_fromio(header, RX_BUF(card, port), sizeof(*header));
9c54004e 627
90937231 628 size = le16_to_cpu(header->size);
9c54004e 629
90937231
DW
630 skb = alloc_skb(size + 1, GFP_ATOMIC);
631 if (!skb) {
632 if (net_ratelimit())
633 dev_warn(&card->dev->dev, "Failed to allocate sk_buff for RX\n");
634 continue;
635 }
9c54004e 636
90937231
DW
637 memcpy_fromio(skb_put(skb, size),
638 RX_BUF(card, port) + sizeof(*header),
639 size);
640 }
9c54004e
DW
641 if (atmdebug) {
642 dev_info(&card->dev->dev, "Received: device %d\n", port);
643 dev_info(&card->dev->dev, "size: %d VPI: %d VCI: %d\n",
90937231
DW
644 size, le16_to_cpu(header->vpi),
645 le16_to_cpu(header->vci));
9c54004e
DW
646 print_buffer(skb);
647 }
648
90937231 649 switch (le16_to_cpu(header->type)) {
9c54004e 650 case PKT_DATA:
90937231
DW
651 vcc = find_vcc(card->atmdev[port], le16_to_cpu(header->vpi),
652 le16_to_cpu(header->vci));
9c54004e
DW
653 if (!vcc) {
654 if (net_ratelimit())
655 dev_warn(&card->dev->dev, "Received packet for unknown VCI.VPI %d.%d on port %d\n",
90937231 656 le16_to_cpu(header->vci), le16_to_cpu(header->vpi),
9c54004e
DW
657 port);
658 continue;
659 }
660 atm_charge(vcc, skb->truesize);
661 vcc->push(vcc, skb);
662 atomic_inc(&vcc->stats->rx);
663 break;
664
87ebb186
DW
665 case PKT_STATUS:
666 process_status(card, port, skb);
eaf83e39 667 dev_kfree_skb_any(skb);
87ebb186
DW
668 break;
669
9c54004e
DW
670 case PKT_COMMAND:
671 default: /* FIXME: Not really, surely? */
01e2ffac
DW
672 if (process_command(card, port, skb))
673 break;
9c54004e
DW
674 spin_lock(&card->cli_queue_lock);
675 if (skb_queue_len(&card->cli_queue[port]) > 10) {
676 if (net_ratelimit())
677 dev_warn(&card->dev->dev, "Dropping console response on port %d\n",
678 port);
eaf83e39 679 dev_kfree_skb_any(skb);
9c54004e
DW
680 } else
681 skb_queue_tail(&card->cli_queue[port], skb);
682 spin_unlock(&card->cli_queue_lock);
683 break;
684 }
685 }
eaf83e39
DW
686 /* Allocate RX skbs for any ports which need them */
687 if (card->using_dma && card->atmdev[port] &&
688 !card->rx_skb[port]) {
689 struct sk_buff *skb = alloc_skb(RX_DMA_SIZE, GFP_ATOMIC);
690 if (skb) {
691 SKB_CB(skb)->dma_addr =
692 pci_map_single(card->dev, skb->data,
693 RX_DMA_SIZE, PCI_DMA_FROMDEVICE);
694 iowrite32(SKB_CB(skb)->dma_addr,
695 card->config_regs + RX_DMA_ADDR(port));
696 card->rx_skb[port] = skb;
697 } else {
698 if (net_ratelimit())
699 dev_warn(&card->dev->dev, "Failed to allocate RX skb");
700
701 /* We'll have to try again later */
702 tasklet_schedule(&card->tlet);
703 }
704 }
9c54004e
DW
705 }
706 if (rx_done)
707 iowrite32(rx_done, card->config_regs + FLAGS_ADDR);
708
709 return;
710}
711
712static struct atm_vcc *find_vcc(struct atm_dev *dev, short vpi, int vci)
713{
714 struct hlist_head *head;
715 struct atm_vcc *vcc = NULL;
716 struct hlist_node *node;
717 struct sock *s;
718
719 read_lock(&vcc_sklist_lock);
720 head = &vcc_hash[vci & (VCC_HTABLE_SIZE -1)];
721 sk_for_each(s, node, head) {
722 vcc = atm_sk(s);
723 if (vcc->dev == dev && vcc->vci == vci &&
724 vcc->vpi == vpi && vcc->qos.rxtp.traffic_class != ATM_NONE)
725 goto out;
726 }
727 vcc = NULL;
728 out:
729 read_unlock(&vcc_sklist_lock);
730 return vcc;
731}
732
733static int list_vccs(int vci)
734{
735 struct hlist_head *head;
736 struct atm_vcc *vcc;
737 struct hlist_node *node;
738 struct sock *s;
739 int num_found = 0;
740 int i;
741
742 read_lock(&vcc_sklist_lock);
743 if (vci != 0){
744 head = &vcc_hash[vci & (VCC_HTABLE_SIZE -1)];
745 sk_for_each(s, node, head) {
746 num_found ++;
747 vcc = atm_sk(s);
748 printk(KERN_DEBUG "Device: %d Vpi: %d Vci: %d\n",
749 vcc->dev->number,
750 vcc->vpi,
751 vcc->vci);
752 }
753 } else {
1e615df6 754 for(i = 0; i < VCC_HTABLE_SIZE; i++){
9c54004e
DW
755 head = &vcc_hash[i];
756 sk_for_each(s, node, head) {
757 num_found ++;
758 vcc = atm_sk(s);
759 printk(KERN_DEBUG "Device: %d Vpi: %d Vci: %d\n",
760 vcc->dev->number,
761 vcc->vpi,
762 vcc->vci);
763 }
764 }
765 }
766 read_unlock(&vcc_sklist_lock);
767 return num_found;
768}
769
1e615df6
DW
770static void release_vccs(struct atm_dev *dev)
771{
772 int i;
773
774 write_lock_irq(&vcc_sklist_lock);
775 for (i = 0; i < VCC_HTABLE_SIZE; i++) {
776 struct hlist_head *head = &vcc_hash[i];
777 struct hlist_node *node, *tmp;
778 struct sock *s;
779 struct atm_vcc *vcc;
780
781 sk_for_each_safe(s, node, tmp, head) {
782 vcc = atm_sk(s);
783 if (vcc->dev == dev) {
784 vcc_release_async(vcc, -EPIPE);
785 sk_del_node_init(s);
786 }
787 }
788 }
789 write_unlock_irq(&vcc_sklist_lock);
790}
791
9c54004e
DW
792
793static int popen(struct atm_vcc *vcc)
794{
795 struct solos_card *card = vcc->dev->dev_data;
796 struct sk_buff *skb;
797 struct pkt_hdr *header;
798
b28a4b9a
DW
799 if (vcc->qos.aal != ATM_AAL5) {
800 dev_warn(&card->dev->dev, "Unsupported ATM type %d\n",
801 vcc->qos.aal);
802 return -EINVAL;
803 }
804
9c54004e
DW
805 skb = alloc_skb(sizeof(*header), GFP_ATOMIC);
806 if (!skb && net_ratelimit()) {
807 dev_warn(&card->dev->dev, "Failed to allocate sk_buff in popen()\n");
808 return -ENOMEM;
809 }
810 header = (void *)skb_put(skb, sizeof(*header));
811
b76811af 812 header->size = cpu_to_le16(0);
9c54004e
DW
813 header->vpi = cpu_to_le16(vcc->vpi);
814 header->vci = cpu_to_le16(vcc->vci);
815 header->type = cpu_to_le16(PKT_POPEN);
816
817 fpga_queue(card, SOLOS_CHAN(vcc->dev), skb, NULL);
818
bdc54625 819 set_bit(ATM_VF_ADDR, &vcc->flags);
9c54004e
DW
820 set_bit(ATM_VF_READY, &vcc->flags);
821 list_vccs(0);
822
9c54004e
DW
823
824 return 0;
825}
826
827static void pclose(struct atm_vcc *vcc)
828{
829 struct solos_card *card = vcc->dev->dev_data;
830 struct sk_buff *skb;
831 struct pkt_hdr *header;
832
833 skb = alloc_skb(sizeof(*header), GFP_ATOMIC);
834 if (!skb) {
835 dev_warn(&card->dev->dev, "Failed to allocate sk_buff in pclose()\n");
836 return;
837 }
838 header = (void *)skb_put(skb, sizeof(*header));
839
b76811af 840 header->size = cpu_to_le16(0);
9c54004e
DW
841 header->vpi = cpu_to_le16(vcc->vpi);
842 header->vci = cpu_to_le16(vcc->vci);
843 header->type = cpu_to_le16(PKT_PCLOSE);
844
845 fpga_queue(card, SOLOS_CHAN(vcc->dev), skb, NULL);
846
9c54004e
DW
847 clear_bit(ATM_VF_ADDR, &vcc->flags);
848 clear_bit(ATM_VF_READY, &vcc->flags);
849
850 return;
851}
852
853static int print_buffer(struct sk_buff *buf)
854{
855 int len,i;
856 char msg[500];
857 char item[10];
858
859 len = buf->len;
860 for (i = 0; i < len; i++){
861 if(i % 8 == 0)
862 sprintf(msg, "%02X: ", i);
863
864 sprintf(item,"%02X ",*(buf->data + i));
865 strcat(msg, item);
866 if(i % 8 == 7) {
867 sprintf(item, "\n");
868 strcat(msg, item);
869 printk(KERN_DEBUG "%s", msg);
870 }
871 }
872 if (i % 8 != 0) {
873 sprintf(item, "\n");
874 strcat(msg, item);
875 printk(KERN_DEBUG "%s", msg);
876 }
877 printk(KERN_DEBUG "\n");
878
879 return 0;
880}
881
882static void fpga_queue(struct solos_card *card, int port, struct sk_buff *skb,
883 struct atm_vcc *vcc)
884{
885 int old_len;
f69e4170 886 unsigned long flags;
9c54004e 887
90937231 888 SKB_CB(skb)->vcc = vcc;
9c54004e 889
f69e4170 890 spin_lock_irqsave(&card->tx_queue_lock, flags);
9c54004e
DW
891 old_len = skb_queue_len(&card->tx_queue[port]);
892 skb_queue_tail(&card->tx_queue[port], skb);
35c2221b 893 if (!old_len)
f69e4170 894 card->tx_mask |= (1 << port);
f69e4170 895 spin_unlock_irqrestore(&card->tx_queue_lock, flags);
9c54004e 896
f69e4170
DW
897 /* Theoretically we could just schedule the tasklet here, but
898 that introduces latency we don't want -- it's noticeable */
9c54004e
DW
899 if (!old_len)
900 fpga_tx(card);
901}
902
35c2221b 903static uint32_t fpga_tx(struct solos_card *card)
9c54004e 904{
35c2221b 905 uint32_t tx_pending, card_flags;
9c54004e
DW
906 uint32_t tx_started = 0;
907 struct sk_buff *skb;
908 struct atm_vcc *vcc;
909 unsigned char port;
910 unsigned long flags;
911
912 spin_lock_irqsave(&card->tx_lock, flags);
35c2221b
DW
913
914 card_flags = ioread32(card->config_regs + FLAGS_ADDR);
915 /*
916 * The queue lock is required for _writing_ to tx_mask, but we're
917 * OK to read it here without locking. The only potential update
918 * that we could race with is in fpga_queue() where it sets a bit
919 * for a new port... but it's going to call this function again if
920 * it's doing that, anyway.
921 */
922 tx_pending = card->tx_mask & ~card_flags;
923
924 for (port = 0; tx_pending; tx_pending >>= 1, port++) {
925 if (tx_pending & 1) {
eaf83e39 926 struct sk_buff *oldskb = card->tx_skb[port];
eaf83e39
DW
927 if (oldskb)
928 pci_unmap_single(card->dev, SKB_CB(oldskb)->dma_addr,
929 oldskb->len, PCI_DMA_TODEVICE);
35c2221b 930
9c54004e
DW
931 spin_lock(&card->tx_queue_lock);
932 skb = skb_dequeue(&card->tx_queue[port]);
f69e4170
DW
933 if (!skb)
934 card->tx_mask &= ~(1 << port);
9c54004e
DW
935 spin_unlock(&card->tx_queue_lock);
936
eaf83e39
DW
937 if (skb && !card->using_dma) {
938 memcpy_toio(TX_BUF(card, port), skb->data, skb->len);
bdc54625 939 tx_started |= 1 << port;
eaf83e39
DW
940 oldskb = skb; /* We're done with this skb already */
941 } else if (skb && card->using_dma) {
942 SKB_CB(skb)->dma_addr = pci_map_single(card->dev, skb->data,
943 skb->len, PCI_DMA_TODEVICE);
944 iowrite32(SKB_CB(skb)->dma_addr,
945 card->config_regs + TX_DMA_ADDR(port));
946 }
947
948 if (!oldskb)
9c54004e
DW
949 continue;
950
eaf83e39 951 /* Clean up and free oldskb now it's gone */
9c54004e
DW
952 if (atmdebug) {
953 dev_info(&card->dev->dev, "Transmitted: port %d\n",
954 port);
eaf83e39 955 print_buffer(oldskb);
9c54004e 956 }
90937231 957
eaf83e39 958 vcc = SKB_CB(oldskb)->vcc;
90937231 959
eaf83e39
DW
960 if (vcc) {
961 atomic_inc(&vcc->stats->tx);
962 solos_pop(vcc, oldskb);
963 } else
964 dev_kfree_skb_irq(oldskb);
90937231 965
9c54004e
DW
966 }
967 }
bdc54625 968 /* For non-DMA TX, write the 'TX start' bit for all four ports simultaneously */
9c54004e
DW
969 if (tx_started)
970 iowrite32(tx_started, card->config_regs + FLAGS_ADDR);
971
972 spin_unlock_irqrestore(&card->tx_lock, flags);
35c2221b 973 return card_flags;
9c54004e
DW
974}
975
976static int psend(struct atm_vcc *vcc, struct sk_buff *skb)
977{
978 struct solos_card *card = vcc->dev->dev_data;
9c54004e 979 struct pkt_hdr *header;
b76811af 980 int pktlen;
9c54004e 981
b76811af
DW
982 pktlen = skb->len;
983 if (pktlen > (BUF_SIZE - sizeof(*header))) {
9c54004e
DW
984 dev_warn(&card->dev->dev, "Length of PDU is too large. Dropping PDU.\n");
985 solos_pop(vcc, skb);
986 return 0;
987 }
988
989 if (!skb_clone_writable(skb, sizeof(*header))) {
990 int expand_by = 0;
991 int ret;
992
993 if (skb_headroom(skb) < sizeof(*header))
994 expand_by = sizeof(*header) - skb_headroom(skb);
995
996 ret = pskb_expand_head(skb, expand_by, 0, GFP_ATOMIC);
997 if (ret) {
4306cad6 998 dev_warn(&card->dev->dev, "pskb_expand_head failed.\n");
9c54004e
DW
999 solos_pop(vcc, skb);
1000 return ret;
1001 }
1002 }
1003
1004 header = (void *)skb_push(skb, sizeof(*header));
1005
b76811af
DW
1006 /* This does _not_ include the size of the header */
1007 header->size = cpu_to_le16(pktlen);
9c54004e
DW
1008 header->vpi = cpu_to_le16(vcc->vpi);
1009 header->vci = cpu_to_le16(vcc->vci);
1010 header->type = cpu_to_le16(PKT_DATA);
1011
1012 fpga_queue(card, SOLOS_CHAN(vcc->dev), skb, vcc);
1013
1014 return 0;
1015}
1016
1017static struct atmdev_ops fpga_ops = {
1018 .open = popen,
1019 .close = pclose,
1020 .ioctl = NULL,
1021 .getsockopt = NULL,
1022 .setsockopt = NULL,
1023 .send = psend,
1024 .send_oam = NULL,
1025 .phy_put = NULL,
1026 .phy_get = NULL,
1027 .change_qos = NULL,
1028 .proc_read = NULL,
1029 .owner = THIS_MODULE
1030};
1031
1032static int fpga_probe(struct pci_dev *dev, const struct pci_device_id *id)
1033{
1034 int err, i;
1035 uint16_t fpga_ver;
1036 uint8_t major_ver, minor_ver;
1037 uint32_t data32;
1038 struct solos_card *card;
1039
9c54004e
DW
1040 card = kzalloc(sizeof(*card), GFP_KERNEL);
1041 if (!card)
1042 return -ENOMEM;
1043
1044 card->dev = dev;
fa755b9f 1045 init_waitqueue_head(&card->fw_wq);
01e2ffac 1046 init_waitqueue_head(&card->param_wq);
9c54004e
DW
1047
1048 err = pci_enable_device(dev);
1049 if (err) {
1050 dev_warn(&dev->dev, "Failed to enable PCI device\n");
1051 goto out;
1052 }
1053
90937231
DW
1054 err = pci_set_dma_mask(dev, DMA_32BIT_MASK);
1055 if (err) {
1056 dev_warn(&dev->dev, "Failed to set 32-bit DMA mask\n");
1057 goto out;
1058 }
1059
9c54004e
DW
1060 err = pci_request_regions(dev, "solos");
1061 if (err) {
1062 dev_warn(&dev->dev, "Failed to request regions\n");
1063 goto out;
1064 }
1065
1066 card->config_regs = pci_iomap(dev, 0, CONFIG_RAM_SIZE);
1067 if (!card->config_regs) {
1068 dev_warn(&dev->dev, "Failed to ioremap config registers\n");
1069 goto out_release_regions;
1070 }
1071 card->buffers = pci_iomap(dev, 1, DATA_RAM_SIZE);
1072 if (!card->buffers) {
1073 dev_warn(&dev->dev, "Failed to ioremap data buffers\n");
1074 goto out_unmap_config;
1075 }
1076
cc3657e1
DW
1077 if (reset) {
1078 iowrite32(1, card->config_regs + FPGA_MODE);
1079 data32 = ioread32(card->config_regs + FPGA_MODE);
1080
1081 iowrite32(0, card->config_regs + FPGA_MODE);
1082 data32 = ioread32(card->config_regs + FPGA_MODE);
1083 }
9c54004e
DW
1084 //Fill Config Mem with zeros
1085 for(i = 0; i < 128; i += 4)
1086 iowrite32(0, card->config_regs + i);
1087
1088 //Set RX empty flags
1089 iowrite32(0xF0, card->config_regs + FLAGS_ADDR);
1090
1091 data32 = ioread32(card->config_regs + FPGA_VER);
1092 fpga_ver = (data32 & 0x0000FFFF);
1093 major_ver = ((data32 & 0xFF000000) >> 24);
1094 minor_ver = ((data32 & 0x00FF0000) >> 16);
1095 dev_info(&dev->dev, "Solos FPGA Version %d.%02d svn-%d\n",
1096 major_ver, minor_ver, fpga_ver);
1097
90937231
DW
1098 if (fpga_ver > 27)
1099 card->using_dma = 1;
1100
9c54004e
DW
1101 card->nr_ports = 2; /* FIXME: Detect daughterboard */
1102
9c54004e 1103 pci_set_drvdata(dev, card);
fa755b9f 1104
9c54004e
DW
1105 tasklet_init(&card->tlet, solos_bh, (unsigned long)card);
1106 spin_lock_init(&card->tx_lock);
1107 spin_lock_init(&card->tx_queue_lock);
1108 spin_lock_init(&card->cli_queue_lock);
01e2ffac
DW
1109 spin_lock_init(&card->param_queue_lock);
1110 INIT_LIST_HEAD(&card->param_queue);
fa755b9f 1111
fcd82664 1112 err = request_irq(dev->irq, solos_irq, IRQF_SHARED,
9c54004e 1113 "solos-pci", card);
fa755b9f 1114 if (err) {
9c54004e 1115 dev_dbg(&card->dev->dev, "Failed to request interrupt IRQ: %d\n", dev->irq);
fa755b9f
DW
1116 goto out_unmap_both;
1117 }
9c54004e 1118
9c54004e
DW
1119 iowrite32(1, card->config_regs + IRQ_EN_ADDR);
1120
fa755b9f
DW
1121 if (fpga_upgrade)
1122 flash_upgrade(card, 0);
1123
1124 if (firmware_upgrade)
1125 flash_upgrade(card, 1);
1126
1127 err = atm_init(card);
1128 if (err)
1129 goto out_free_irq;
1130
9c54004e
DW
1131 return 0;
1132
fa755b9f
DW
1133 out_free_irq:
1134 iowrite32(0, card->config_regs + IRQ_EN_ADDR);
1135 free_irq(dev->irq, card);
1136 tasklet_kill(&card->tlet);
1137
9c54004e 1138 out_unmap_both:
fa755b9f 1139 pci_set_drvdata(dev, NULL);
9c54004e
DW
1140 pci_iounmap(dev, card->config_regs);
1141 out_unmap_config:
1142 pci_iounmap(dev, card->buffers);
1143 out_release_regions:
1144 pci_release_regions(dev);
1145 out:
1146 return err;
1147}
1148
1149static int atm_init(struct solos_card *card)
1150{
1151 int i;
1152
9c54004e 1153 for (i = 0; i < card->nr_ports; i++) {
87ebb186
DW
1154 struct sk_buff *skb;
1155 struct pkt_hdr *header;
1156
9c54004e
DW
1157 skb_queue_head_init(&card->tx_queue[i]);
1158 skb_queue_head_init(&card->cli_queue[i]);
1159
1160 card->atmdev[i] = atm_dev_register("solos-pci", &fpga_ops, -1, NULL);
1161 if (!card->atmdev[i]) {
1162 dev_err(&card->dev->dev, "Could not register ATM device %d\n", i);
1163 atm_remove(card);
1164 return -ENODEV;
1165 }
1166 if (device_create_file(&card->atmdev[i]->class_dev, &dev_attr_console))
1167 dev_err(&card->dev->dev, "Could not register console for ATM device %d\n", i);
d057f0a4
DW
1168 if (sysfs_create_group(&card->atmdev[i]->class_dev.kobj, &solos_attr_group))
1169 dev_err(&card->dev->dev, "Could not register parameter group for ATM device %d\n", i);
9c54004e
DW
1170
1171 dev_info(&card->dev->dev, "Registered ATM device %d\n", card->atmdev[i]->number);
1172
1173 card->atmdev[i]->ci_range.vpi_bits = 8;
1174 card->atmdev[i]->ci_range.vci_bits = 16;
1175 card->atmdev[i]->dev_data = card;
1176 card->atmdev[i]->phy_data = (void *)(unsigned long)i;
87ebb186
DW
1177 card->atmdev[i]->signal = ATM_PHY_SIG_UNKNOWN;
1178
1179 skb = alloc_skb(sizeof(*header), GFP_ATOMIC);
1180 if (!skb) {
1181 dev_warn(&card->dev->dev, "Failed to allocate sk_buff in atm_init()\n");
1182 continue;
1183 }
1184
1185 header = (void *)skb_put(skb, sizeof(*header));
1186
1187 header->size = cpu_to_le16(0);
1188 header->vpi = cpu_to_le16(0);
1189 header->vci = cpu_to_le16(0);
1190 header->type = cpu_to_le16(PKT_STATUS);
1191
1192 fpga_queue(card, i, skb, NULL);
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1193 }
1194 return 0;
1195}
1196
1197static void atm_remove(struct solos_card *card)
1198{
1199 int i;
1200
1201 for (i = 0; i < card->nr_ports; i++) {
1202 if (card->atmdev[i]) {
1203 dev_info(&card->dev->dev, "Unregistering ATM device %d\n", card->atmdev[i]->number);
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1204
1205 sysfs_remove_group(&card->atmdev[i]->class_dev.kobj, &solos_attr_group);
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1206 atm_dev_deregister(card->atmdev[i]);
1207 }
1208 }
1209}
1210
1211static void fpga_remove(struct pci_dev *dev)
1212{
1213 struct solos_card *card = pci_get_drvdata(dev);
1214
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1215 atm_remove(card);
1216
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1217 iowrite32(0, card->config_regs + IRQ_EN_ADDR);
1218 free_irq(dev->irq, card);
1219 tasklet_kill(&card->tlet);
1220
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1221 pci_iounmap(dev, card->buffers);
1222 pci_iounmap(dev, card->config_regs);
1223
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1224 pci_release_regions(dev);
1225 pci_disable_device(dev);
1226
1227 pci_set_drvdata(dev, NULL);
1228 kfree(card);
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1229}
1230
1231static struct pci_device_id fpga_pci_tbl[] __devinitdata = {
1232 { 0x10ee, 0x0300, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
1233 { 0, }
1234};
1235
1236MODULE_DEVICE_TABLE(pci,fpga_pci_tbl);
1237
1238static struct pci_driver fpga_driver = {
1239 .name = "solos",
1240 .id_table = fpga_pci_tbl,
1241 .probe = fpga_probe,
1242 .remove = fpga_remove,
1243};
1244
1245
1246static int __init solos_pci_init(void)
1247{
1248 printk(KERN_INFO "Solos PCI Driver Version %s\n", VERSION);
1249 return pci_register_driver(&fpga_driver);
1250}
1251
1252static void __exit solos_pci_exit(void)
1253{
1254 pci_unregister_driver(&fpga_driver);
1255 printk(KERN_INFO "Solos PCI Driver %s Unloaded\n", VERSION);
1256}
1257
1258module_init(solos_pci_init);
1259module_exit(solos_pci_exit);