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cacheinfo: rename of_node to fw_token
[mirror_ubuntu-bionic-kernel.git] / drivers / base / cacheinfo.c
CommitLineData
246246cb
SH
1/*
2 * cacheinfo support - processor cache information via sysfs
3 *
4 * Based on arch/x86/kernel/cpu/intel_cacheinfo.c
5 * Author: Sudeep Holla <sudeep.holla@arm.com>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 *
11 * This program is distributed "as is" WITHOUT ANY WARRANTY of any
12 * kind, whether express or implied; without even the implied warranty
13 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program. If not, see <http://www.gnu.org/licenses/>.
18 */
8e1073b1
SH
19#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
20
55877ef4 21#include <linux/acpi.h>
246246cb
SH
22#include <linux/bitops.h>
23#include <linux/cacheinfo.h>
24#include <linux/compiler.h>
25#include <linux/cpu.h>
26#include <linux/device.h>
27#include <linux/init.h>
28#include <linux/of.h>
29#include <linux/sched.h>
30#include <linux/slab.h>
31#include <linux/smp.h>
32#include <linux/sysfs.h>
33
34/* pointer to per cpu cacheinfo */
35static DEFINE_PER_CPU(struct cpu_cacheinfo, ci_cpu_cacheinfo);
36#define ci_cacheinfo(cpu) (&per_cpu(ci_cpu_cacheinfo, cpu))
37#define cache_leaves(cpu) (ci_cacheinfo(cpu)->num_leaves)
38#define per_cpu_cacheinfo(cpu) (ci_cacheinfo(cpu)->info_list)
39
40struct cpu_cacheinfo *get_cpu_cacheinfo(unsigned int cpu)
41{
42 return ci_cacheinfo(cpu);
43}
44
45#ifdef CONFIG_OF
246246cb
SH
46static inline bool cache_leaves_are_shared(struct cacheinfo *this_leaf,
47 struct cacheinfo *sib_leaf)
48{
95c7d3b2 49 return sib_leaf->fw_token == this_leaf->fw_token;
246246cb 50}
dfea747d
SH
51
52/* OF properties to query for a given cache type */
53struct cache_type_info {
54 const char *size_prop;
55 const char *line_size_props[2];
56 const char *nr_sets_prop;
57};
58
59static const struct cache_type_info cache_type_info[] = {
60 {
61 .size_prop = "cache-size",
62 .line_size_props = { "cache-line-size",
63 "cache-block-size", },
64 .nr_sets_prop = "cache-sets",
65 }, {
66 .size_prop = "i-cache-size",
67 .line_size_props = { "i-cache-line-size",
68 "i-cache-block-size", },
69 .nr_sets_prop = "i-cache-sets",
70 }, {
71 .size_prop = "d-cache-size",
72 .line_size_props = { "d-cache-line-size",
73 "d-cache-block-size", },
74 .nr_sets_prop = "d-cache-sets",
75 },
76};
77
78static inline int get_cacheinfo_idx(enum cache_type type)
79{
80 if (type == CACHE_TYPE_UNIFIED)
81 return 0;
82 return type;
83}
84
b5d1de4c 85static void cache_size(struct cacheinfo *this_leaf, struct device_node *np)
dfea747d
SH
86{
87 const char *propname;
88 const __be32 *cache_size;
89 int ct_idx;
90
91 ct_idx = get_cacheinfo_idx(this_leaf->type);
92 propname = cache_type_info[ct_idx].size_prop;
93
b5d1de4c 94 cache_size = of_get_property(np, propname, NULL);
dfea747d
SH
95 if (cache_size)
96 this_leaf->size = of_read_number(cache_size, 1);
97}
98
99/* not cache_line_size() because that's a macro in include/linux/cache.h */
b5d1de4c
JL
100static void cache_get_line_size(struct cacheinfo *this_leaf,
101 struct device_node *np)
dfea747d
SH
102{
103 const __be32 *line_size;
104 int i, lim, ct_idx;
105
106 ct_idx = get_cacheinfo_idx(this_leaf->type);
107 lim = ARRAY_SIZE(cache_type_info[ct_idx].line_size_props);
108
109 for (i = 0; i < lim; i++) {
110 const char *propname;
111
112 propname = cache_type_info[ct_idx].line_size_props[i];
b5d1de4c 113 line_size = of_get_property(np, propname, NULL);
dfea747d
SH
114 if (line_size)
115 break;
116 }
117
118 if (line_size)
119 this_leaf->coherency_line_size = of_read_number(line_size, 1);
120}
121
b5d1de4c 122static void cache_nr_sets(struct cacheinfo *this_leaf, struct device_node *np)
dfea747d
SH
123{
124 const char *propname;
125 const __be32 *nr_sets;
126 int ct_idx;
127
128 ct_idx = get_cacheinfo_idx(this_leaf->type);
129 propname = cache_type_info[ct_idx].nr_sets_prop;
130
b5d1de4c 131 nr_sets = of_get_property(np, propname, NULL);
dfea747d
SH
132 if (nr_sets)
133 this_leaf->number_of_sets = of_read_number(nr_sets, 1);
134}
135
136static void cache_associativity(struct cacheinfo *this_leaf)
137{
138 unsigned int line_size = this_leaf->coherency_line_size;
139 unsigned int nr_sets = this_leaf->number_of_sets;
140 unsigned int size = this_leaf->size;
141
142 /*
143 * If the cache is fully associative, there is no need to
144 * check the other properties.
145 */
146 if (!(nr_sets == 1) && (nr_sets > 0 && size > 0 && line_size > 0))
147 this_leaf->ways_of_associativity = (size / nr_sets) / line_size;
148}
149
b5d1de4c
JL
150static bool cache_node_is_unified(struct cacheinfo *this_leaf,
151 struct device_node *np)
f57ab9a0 152{
b5d1de4c 153 return of_property_read_bool(np, "cache-unified");
f57ab9a0
SH
154}
155
b5d1de4c
JL
156static void cache_of_set_props(struct cacheinfo *this_leaf,
157 struct device_node *np)
dfea747d 158{
b5d1de4c
JL
159 /*
160 * init_cache_level must setup the cache level correctly
161 * overriding the architecturally specified levels, so
162 * if type is NONE at this stage, it should be unified
163 */
164 if (this_leaf->type == CACHE_TYPE_NOCACHE &&
165 cache_node_is_unified(this_leaf, np))
166 this_leaf->type = CACHE_TYPE_UNIFIED;
167 cache_size(this_leaf, np);
168 cache_get_line_size(this_leaf, np);
169 cache_nr_sets(this_leaf, np);
170 cache_associativity(this_leaf);
dfea747d 171}
fa7b8847
JL
172
173static int cache_setup_of_node(unsigned int cpu)
174{
175 struct device_node *np;
176 struct cacheinfo *this_leaf;
177 struct device *cpu_dev = get_cpu_device(cpu);
178 struct cpu_cacheinfo *this_cpu_ci = get_cpu_cacheinfo(cpu);
179 unsigned int index = 0;
180
95c7d3b2
JL
181 /* skip if fw_token is already populated */
182 if (this_cpu_ci->info_list->fw_token) {
fa7b8847 183 return 0;
95c7d3b2 184 }
fa7b8847
JL
185
186 if (!cpu_dev) {
187 pr_err("No cpu device for CPU %d\n", cpu);
188 return -ENODEV;
189 }
190 np = cpu_dev->of_node;
191 if (!np) {
192 pr_err("Failed to find cpu%d device node\n", cpu);
193 return -ENOENT;
194 }
195
196 while (index < cache_leaves(cpu)) {
197 this_leaf = this_cpu_ci->info_list + index;
198 if (this_leaf->level != 1)
199 np = of_find_next_cache_node(np);
200 else
201 np = of_node_get(np);/* cpu node itself */
202 if (!np)
203 break;
b5d1de4c 204 cache_of_set_props(this_leaf, np);
95c7d3b2 205 this_leaf->fw_token = np;
fa7b8847
JL
206 index++;
207 }
208
209 if (index != cache_leaves(cpu)) /* not all OF nodes populated */
210 return -ENOENT;
211
212 return 0;
213}
246246cb
SH
214#else
215static inline int cache_setup_of_node(unsigned int cpu) { return 0; }
216static inline bool cache_leaves_are_shared(struct cacheinfo *this_leaf,
217 struct cacheinfo *sib_leaf)
218{
219 /*
220 * For non-DT systems, assume unique level 1 cache, system-wide
221 * shared caches for all other levels. This will be used only if
222 * arch specific code has not populated shared_cpu_map
223 */
224 return !(this_leaf->level == 1);
225}
226#endif
227
228static int cache_shared_cpu_map_setup(unsigned int cpu)
229{
230 struct cpu_cacheinfo *this_cpu_ci = get_cpu_cacheinfo(cpu);
231 struct cacheinfo *this_leaf, *sib_leaf;
232 unsigned int index;
55877ef4 233 int ret = 0;
246246cb 234
fac51482
SH
235 if (this_cpu_ci->cpu_map_populated)
236 return 0;
237
55877ef4
SH
238 if (of_have_populated_dt())
239 ret = cache_setup_of_node(cpu);
240 else if (!acpi_disabled)
241 /* No cache property/hierarchy support yet in ACPI */
242 ret = -ENOTSUPP;
246246cb
SH
243 if (ret)
244 return ret;
245
246 for (index = 0; index < cache_leaves(cpu); index++) {
247 unsigned int i;
248
249 this_leaf = this_cpu_ci->info_list + index;
250 /* skip if shared_cpu_map is already populated */
251 if (!cpumask_empty(&this_leaf->shared_cpu_map))
252 continue;
253
254 cpumask_set_cpu(cpu, &this_leaf->shared_cpu_map);
255 for_each_online_cpu(i) {
256 struct cpu_cacheinfo *sib_cpu_ci = get_cpu_cacheinfo(i);
257
258 if (i == cpu || !sib_cpu_ci->info_list)
259 continue;/* skip if itself or no cacheinfo */
260 sib_leaf = sib_cpu_ci->info_list + index;
261 if (cache_leaves_are_shared(this_leaf, sib_leaf)) {
262 cpumask_set_cpu(cpu, &sib_leaf->shared_cpu_map);
263 cpumask_set_cpu(i, &this_leaf->shared_cpu_map);
264 }
265 }
266 }
267
268 return 0;
269}
270
271static void cache_shared_cpu_map_remove(unsigned int cpu)
272{
273 struct cpu_cacheinfo *this_cpu_ci = get_cpu_cacheinfo(cpu);
274 struct cacheinfo *this_leaf, *sib_leaf;
275 unsigned int sibling, index;
276
277 for (index = 0; index < cache_leaves(cpu); index++) {
278 this_leaf = this_cpu_ci->info_list + index;
279 for_each_cpu(sibling, &this_leaf->shared_cpu_map) {
280 struct cpu_cacheinfo *sib_cpu_ci;
281
282 if (sibling == cpu) /* skip itself */
283 continue;
2110d70c 284
246246cb 285 sib_cpu_ci = get_cpu_cacheinfo(sibling);
2110d70c
BP
286 if (!sib_cpu_ci->info_list)
287 continue;
288
246246cb
SH
289 sib_leaf = sib_cpu_ci->info_list + index;
290 cpumask_clear_cpu(cpu, &sib_leaf->shared_cpu_map);
291 cpumask_clear_cpu(sibling, &this_leaf->shared_cpu_map);
292 }
95c7d3b2 293 of_node_put(this_leaf->fw_token);
246246cb
SH
294 }
295}
296
297static void free_cache_attributes(unsigned int cpu)
298{
2110d70c
BP
299 if (!per_cpu_cacheinfo(cpu))
300 return;
301
246246cb
SH
302 cache_shared_cpu_map_remove(cpu);
303
304 kfree(per_cpu_cacheinfo(cpu));
305 per_cpu_cacheinfo(cpu) = NULL;
306}
307
308int __weak init_cache_level(unsigned int cpu)
309{
310 return -ENOENT;
311}
312
313int __weak populate_cache_leaves(unsigned int cpu)
314{
315 return -ENOENT;
316}
317
318static int detect_cache_attributes(unsigned int cpu)
319{
320 int ret;
321
3370e13a 322 if (init_cache_level(cpu) || !cache_leaves(cpu))
246246cb
SH
323 return -ENOENT;
324
325 per_cpu_cacheinfo(cpu) = kcalloc(cache_leaves(cpu),
326 sizeof(struct cacheinfo), GFP_KERNEL);
327 if (per_cpu_cacheinfo(cpu) == NULL)
328 return -ENOMEM;
329
b5d1de4c
JL
330 /*
331 * populate_cache_leaves() may completely setup the cache leaves and
332 * shared_cpu_map or it may leave it partially setup.
333 */
246246cb
SH
334 ret = populate_cache_leaves(cpu);
335 if (ret)
336 goto free_ci;
337 /*
95c7d3b2
JL
338 * For systems using DT for cache hierarchy, fw_token
339 * and shared_cpu_map will be set up here only if they are
340 * not populated already
246246cb
SH
341 */
342 ret = cache_shared_cpu_map_setup(cpu);
8a7d95f9 343 if (ret) {
55877ef4 344 pr_warn("Unable to detect cache hierarchy for CPU %d\n", cpu);
246246cb 345 goto free_ci;
8a7d95f9 346 }
dfea747d 347
246246cb
SH
348 return 0;
349
350free_ci:
351 free_cache_attributes(cpu);
352 return ret;
353}
354
355/* pointer to cpuX/cache device */
356static DEFINE_PER_CPU(struct device *, ci_cache_dev);
357#define per_cpu_cache_dev(cpu) (per_cpu(ci_cache_dev, cpu))
358
359static cpumask_t cache_dev_map;
360
361/* pointer to array of devices for cpuX/cache/indexY */
362static DEFINE_PER_CPU(struct device **, ci_index_dev);
363#define per_cpu_index_dev(cpu) (per_cpu(ci_index_dev, cpu))
364#define per_cache_index_dev(cpu, idx) ((per_cpu_index_dev(cpu))[idx])
365
366#define show_one(file_name, object) \
367static ssize_t file_name##_show(struct device *dev, \
368 struct device_attribute *attr, char *buf) \
369{ \
370 struct cacheinfo *this_leaf = dev_get_drvdata(dev); \
371 return sprintf(buf, "%u\n", this_leaf->object); \
372}
373
e9a2ea5a 374show_one(id, id);
246246cb
SH
375show_one(level, level);
376show_one(coherency_line_size, coherency_line_size);
377show_one(number_of_sets, number_of_sets);
378show_one(physical_line_partition, physical_line_partition);
379show_one(ways_of_associativity, ways_of_associativity);
380
381static ssize_t size_show(struct device *dev,
382 struct device_attribute *attr, char *buf)
383{
384 struct cacheinfo *this_leaf = dev_get_drvdata(dev);
385
386 return sprintf(buf, "%uK\n", this_leaf->size >> 10);
387}
388
389static ssize_t shared_cpumap_show_func(struct device *dev, bool list, char *buf)
390{
391 struct cacheinfo *this_leaf = dev_get_drvdata(dev);
392 const struct cpumask *mask = &this_leaf->shared_cpu_map;
393
394 return cpumap_print_to_pagebuf(list, buf, mask);
395}
396
397static ssize_t shared_cpu_map_show(struct device *dev,
398 struct device_attribute *attr, char *buf)
399{
400 return shared_cpumap_show_func(dev, false, buf);
401}
402
403static ssize_t shared_cpu_list_show(struct device *dev,
404 struct device_attribute *attr, char *buf)
405{
406 return shared_cpumap_show_func(dev, true, buf);
407}
408
409static ssize_t type_show(struct device *dev,
410 struct device_attribute *attr, char *buf)
411{
412 struct cacheinfo *this_leaf = dev_get_drvdata(dev);
413
414 switch (this_leaf->type) {
415 case CACHE_TYPE_DATA:
416 return sprintf(buf, "Data\n");
417 case CACHE_TYPE_INST:
418 return sprintf(buf, "Instruction\n");
419 case CACHE_TYPE_UNIFIED:
420 return sprintf(buf, "Unified\n");
421 default:
422 return -EINVAL;
423 }
424}
425
426static ssize_t allocation_policy_show(struct device *dev,
427 struct device_attribute *attr, char *buf)
428{
429 struct cacheinfo *this_leaf = dev_get_drvdata(dev);
430 unsigned int ci_attr = this_leaf->attributes;
431 int n = 0;
432
433 if ((ci_attr & CACHE_READ_ALLOCATE) && (ci_attr & CACHE_WRITE_ALLOCATE))
434 n = sprintf(buf, "ReadWriteAllocate\n");
435 else if (ci_attr & CACHE_READ_ALLOCATE)
436 n = sprintf(buf, "ReadAllocate\n");
437 else if (ci_attr & CACHE_WRITE_ALLOCATE)
438 n = sprintf(buf, "WriteAllocate\n");
439 return n;
440}
441
442static ssize_t write_policy_show(struct device *dev,
443 struct device_attribute *attr, char *buf)
444{
445 struct cacheinfo *this_leaf = dev_get_drvdata(dev);
446 unsigned int ci_attr = this_leaf->attributes;
447 int n = 0;
448
449 if (ci_attr & CACHE_WRITE_THROUGH)
450 n = sprintf(buf, "WriteThrough\n");
451 else if (ci_attr & CACHE_WRITE_BACK)
452 n = sprintf(buf, "WriteBack\n");
453 return n;
454}
455
e9a2ea5a 456static DEVICE_ATTR_RO(id);
246246cb
SH
457static DEVICE_ATTR_RO(level);
458static DEVICE_ATTR_RO(type);
459static DEVICE_ATTR_RO(coherency_line_size);
460static DEVICE_ATTR_RO(ways_of_associativity);
461static DEVICE_ATTR_RO(number_of_sets);
462static DEVICE_ATTR_RO(size);
463static DEVICE_ATTR_RO(allocation_policy);
464static DEVICE_ATTR_RO(write_policy);
465static DEVICE_ATTR_RO(shared_cpu_map);
466static DEVICE_ATTR_RO(shared_cpu_list);
467static DEVICE_ATTR_RO(physical_line_partition);
468
469static struct attribute *cache_default_attrs[] = {
e9a2ea5a 470 &dev_attr_id.attr,
246246cb
SH
471 &dev_attr_type.attr,
472 &dev_attr_level.attr,
473 &dev_attr_shared_cpu_map.attr,
474 &dev_attr_shared_cpu_list.attr,
475 &dev_attr_coherency_line_size.attr,
476 &dev_attr_ways_of_associativity.attr,
477 &dev_attr_number_of_sets.attr,
478 &dev_attr_size.attr,
479 &dev_attr_allocation_policy.attr,
480 &dev_attr_write_policy.attr,
481 &dev_attr_physical_line_partition.attr,
482 NULL
483};
484
485static umode_t
486cache_default_attrs_is_visible(struct kobject *kobj,
487 struct attribute *attr, int unused)
488{
489 struct device *dev = kobj_to_dev(kobj);
490 struct cacheinfo *this_leaf = dev_get_drvdata(dev);
491 const struct cpumask *mask = &this_leaf->shared_cpu_map;
492 umode_t mode = attr->mode;
493
e9a2ea5a
FY
494 if ((attr == &dev_attr_id.attr) && (this_leaf->attributes & CACHE_ID))
495 return mode;
246246cb
SH
496 if ((attr == &dev_attr_type.attr) && this_leaf->type)
497 return mode;
498 if ((attr == &dev_attr_level.attr) && this_leaf->level)
499 return mode;
500 if ((attr == &dev_attr_shared_cpu_map.attr) && !cpumask_empty(mask))
501 return mode;
502 if ((attr == &dev_attr_shared_cpu_list.attr) && !cpumask_empty(mask))
503 return mode;
504 if ((attr == &dev_attr_coherency_line_size.attr) &&
505 this_leaf->coherency_line_size)
506 return mode;
507 if ((attr == &dev_attr_ways_of_associativity.attr) &&
508 this_leaf->size) /* allow 0 = full associativity */
509 return mode;
510 if ((attr == &dev_attr_number_of_sets.attr) &&
511 this_leaf->number_of_sets)
512 return mode;
513 if ((attr == &dev_attr_size.attr) && this_leaf->size)
514 return mode;
515 if ((attr == &dev_attr_write_policy.attr) &&
516 (this_leaf->attributes & CACHE_WRITE_POLICY_MASK))
517 return mode;
518 if ((attr == &dev_attr_allocation_policy.attr) &&
519 (this_leaf->attributes & CACHE_ALLOCATE_POLICY_MASK))
520 return mode;
521 if ((attr == &dev_attr_physical_line_partition.attr) &&
522 this_leaf->physical_line_partition)
523 return mode;
524
525 return 0;
526}
527
528static const struct attribute_group cache_default_group = {
529 .attrs = cache_default_attrs,
530 .is_visible = cache_default_attrs_is_visible,
531};
532
533static const struct attribute_group *cache_default_groups[] = {
534 &cache_default_group,
535 NULL,
536};
537
538static const struct attribute_group *cache_private_groups[] = {
539 &cache_default_group,
540 NULL, /* Place holder for private group */
541 NULL,
542};
543
544const struct attribute_group *
545__weak cache_get_priv_group(struct cacheinfo *this_leaf)
546{
547 return NULL;
548}
549
550static const struct attribute_group **
551cache_get_attribute_groups(struct cacheinfo *this_leaf)
552{
553 const struct attribute_group *priv_group =
554 cache_get_priv_group(this_leaf);
555
556 if (!priv_group)
557 return cache_default_groups;
558
559 if (!cache_private_groups[1])
560 cache_private_groups[1] = priv_group;
561
562 return cache_private_groups;
563}
564
565/* Add/Remove cache interface for CPU device */
566static void cpu_cache_sysfs_exit(unsigned int cpu)
567{
568 int i;
569 struct device *ci_dev;
570
571 if (per_cpu_index_dev(cpu)) {
572 for (i = 0; i < cache_leaves(cpu); i++) {
573 ci_dev = per_cache_index_dev(cpu, i);
574 if (!ci_dev)
575 continue;
576 device_unregister(ci_dev);
577 }
578 kfree(per_cpu_index_dev(cpu));
579 per_cpu_index_dev(cpu) = NULL;
580 }
581 device_unregister(per_cpu_cache_dev(cpu));
582 per_cpu_cache_dev(cpu) = NULL;
583}
584
585static int cpu_cache_sysfs_init(unsigned int cpu)
586{
587 struct device *dev = get_cpu_device(cpu);
588
589 if (per_cpu_cacheinfo(cpu) == NULL)
590 return -ENOENT;
591
592 per_cpu_cache_dev(cpu) = cpu_device_create(dev, NULL, NULL, "cache");
593 if (IS_ERR(per_cpu_cache_dev(cpu)))
594 return PTR_ERR(per_cpu_cache_dev(cpu));
595
596 /* Allocate all required memory */
597 per_cpu_index_dev(cpu) = kcalloc(cache_leaves(cpu),
598 sizeof(struct device *), GFP_KERNEL);
599 if (unlikely(per_cpu_index_dev(cpu) == NULL))
600 goto err_out;
601
602 return 0;
603
604err_out:
605 cpu_cache_sysfs_exit(cpu);
606 return -ENOMEM;
607}
608
609static int cache_add_dev(unsigned int cpu)
610{
611 unsigned int i;
612 int rc;
613 struct device *ci_dev, *parent;
614 struct cacheinfo *this_leaf;
615 struct cpu_cacheinfo *this_cpu_ci = get_cpu_cacheinfo(cpu);
616 const struct attribute_group **cache_groups;
617
618 rc = cpu_cache_sysfs_init(cpu);
619 if (unlikely(rc < 0))
620 return rc;
621
622 parent = per_cpu_cache_dev(cpu);
623 for (i = 0; i < cache_leaves(cpu); i++) {
624 this_leaf = this_cpu_ci->info_list + i;
625 if (this_leaf->disable_sysfs)
626 continue;
627 cache_groups = cache_get_attribute_groups(this_leaf);
628 ci_dev = cpu_device_create(parent, this_leaf, cache_groups,
629 "index%1u", i);
630 if (IS_ERR(ci_dev)) {
631 rc = PTR_ERR(ci_dev);
632 goto err;
633 }
634 per_cache_index_dev(cpu, i) = ci_dev;
635 }
636 cpumask_set_cpu(cpu, &cache_dev_map);
637
638 return 0;
639err:
640 cpu_cache_sysfs_exit(cpu);
641 return rc;
642}
643
7cc277b4 644static int cacheinfo_cpu_online(unsigned int cpu)
246246cb 645{
7cc277b4 646 int rc = detect_cache_attributes(cpu);
246246cb 647
7cc277b4
SAS
648 if (rc)
649 return rc;
650 rc = cache_add_dev(cpu);
651 if (rc)
652 free_cache_attributes(cpu);
653 return rc;
246246cb
SH
654}
655
7cc277b4 656static int cacheinfo_cpu_pre_down(unsigned int cpu)
246246cb 657{
7cc277b4
SAS
658 if (cpumask_test_and_clear_cpu(cpu, &cache_dev_map))
659 cpu_cache_sysfs_exit(cpu);
660
661 free_cache_attributes(cpu);
662 return 0;
246246cb
SH
663}
664
665static int __init cacheinfo_sysfs_init(void)
666{
7cc277b4
SAS
667 return cpuhp_setup_state(CPUHP_AP_ONLINE_DYN, "base/cacheinfo:online",
668 cacheinfo_cpu_online, cacheinfo_cpu_pre_down);
246246cb 669}
246246cb 670device_initcall(cacheinfo_sysfs_init);