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Commit | Line | Data |
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b83a313b MB |
1 | /* |
2 | * Register map access API | |
3 | * | |
4 | * Copyright 2011 Wolfson Microelectronics plc | |
5 | * | |
6 | * Author: Mark Brown <broonie@opensource.wolfsonmicro.com> | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License version 2 as | |
10 | * published by the Free Software Foundation. | |
11 | */ | |
12 | ||
f5d6eba7 | 13 | #include <linux/device.h> |
b83a313b | 14 | #include <linux/slab.h> |
19694b5e | 15 | #include <linux/export.h> |
b83a313b MB |
16 | #include <linux/mutex.h> |
17 | #include <linux/err.h> | |
6863ca62 | 18 | #include <linux/rbtree.h> |
30b2a553 | 19 | #include <linux/sched.h> |
b83a313b | 20 | |
fb2736bb MB |
21 | #define CREATE_TRACE_POINTS |
22 | #include <trace/events/regmap.h> | |
23 | ||
93de9124 | 24 | #include "internal.h" |
b83a313b | 25 | |
1044c180 MB |
26 | /* |
27 | * Sometimes for failures during very early init the trace | |
28 | * infrastructure isn't available early enough to be used. For this | |
29 | * sort of problem defining LOG_DEVICE will add printks for basic | |
30 | * register I/O on a specific device. | |
31 | */ | |
32 | #undef LOG_DEVICE | |
33 | ||
34 | static int _regmap_update_bits(struct regmap *map, unsigned int reg, | |
35 | unsigned int mask, unsigned int val, | |
36 | bool *change); | |
37 | ||
ad278406 AS |
38 | static int _regmap_bus_read(void *context, unsigned int reg, |
39 | unsigned int *val); | |
07c320dc AS |
40 | static int _regmap_bus_formatted_write(void *context, unsigned int reg, |
41 | unsigned int val); | |
42 | static int _regmap_bus_raw_write(void *context, unsigned int reg, | |
43 | unsigned int val); | |
ad278406 | 44 | |
76aad392 DC |
45 | bool regmap_reg_in_ranges(unsigned int reg, |
46 | const struct regmap_range *ranges, | |
47 | unsigned int nranges) | |
48 | { | |
49 | const struct regmap_range *r; | |
50 | int i; | |
51 | ||
52 | for (i = 0, r = ranges; i < nranges; i++, r++) | |
53 | if (regmap_reg_in_range(reg, r)) | |
54 | return true; | |
55 | return false; | |
56 | } | |
57 | EXPORT_SYMBOL_GPL(regmap_reg_in_ranges); | |
58 | ||
154881e5 MB |
59 | bool regmap_check_range_table(struct regmap *map, unsigned int reg, |
60 | const struct regmap_access_table *table) | |
76aad392 DC |
61 | { |
62 | /* Check "no ranges" first */ | |
63 | if (regmap_reg_in_ranges(reg, table->no_ranges, table->n_no_ranges)) | |
64 | return false; | |
65 | ||
66 | /* In case zero "yes ranges" are supplied, any reg is OK */ | |
67 | if (!table->n_yes_ranges) | |
68 | return true; | |
69 | ||
70 | return regmap_reg_in_ranges(reg, table->yes_ranges, | |
71 | table->n_yes_ranges); | |
72 | } | |
154881e5 | 73 | EXPORT_SYMBOL_GPL(regmap_check_range_table); |
76aad392 | 74 | |
8de2f081 MB |
75 | bool regmap_writeable(struct regmap *map, unsigned int reg) |
76 | { | |
77 | if (map->max_register && reg > map->max_register) | |
78 | return false; | |
79 | ||
80 | if (map->writeable_reg) | |
81 | return map->writeable_reg(map->dev, reg); | |
82 | ||
76aad392 | 83 | if (map->wr_table) |
154881e5 | 84 | return regmap_check_range_table(map, reg, map->wr_table); |
76aad392 | 85 | |
8de2f081 MB |
86 | return true; |
87 | } | |
88 | ||
89 | bool regmap_readable(struct regmap *map, unsigned int reg) | |
90 | { | |
91 | if (map->max_register && reg > map->max_register) | |
92 | return false; | |
93 | ||
4191f197 WS |
94 | if (map->format.format_write) |
95 | return false; | |
96 | ||
8de2f081 MB |
97 | if (map->readable_reg) |
98 | return map->readable_reg(map->dev, reg); | |
99 | ||
76aad392 | 100 | if (map->rd_table) |
154881e5 | 101 | return regmap_check_range_table(map, reg, map->rd_table); |
76aad392 | 102 | |
8de2f081 MB |
103 | return true; |
104 | } | |
105 | ||
106 | bool regmap_volatile(struct regmap *map, unsigned int reg) | |
107 | { | |
4191f197 | 108 | if (!regmap_readable(map, reg)) |
8de2f081 MB |
109 | return false; |
110 | ||
111 | if (map->volatile_reg) | |
112 | return map->volatile_reg(map->dev, reg); | |
113 | ||
76aad392 | 114 | if (map->volatile_table) |
154881e5 | 115 | return regmap_check_range_table(map, reg, map->volatile_table); |
76aad392 | 116 | |
b92be6fe MB |
117 | if (map->cache_ops) |
118 | return false; | |
119 | else | |
120 | return true; | |
8de2f081 MB |
121 | } |
122 | ||
123 | bool regmap_precious(struct regmap *map, unsigned int reg) | |
124 | { | |
4191f197 | 125 | if (!regmap_readable(map, reg)) |
8de2f081 MB |
126 | return false; |
127 | ||
128 | if (map->precious_reg) | |
129 | return map->precious_reg(map->dev, reg); | |
130 | ||
76aad392 | 131 | if (map->precious_table) |
154881e5 | 132 | return regmap_check_range_table(map, reg, map->precious_table); |
76aad392 | 133 | |
8de2f081 MB |
134 | return false; |
135 | } | |
136 | ||
82cd9965 | 137 | static bool regmap_volatile_range(struct regmap *map, unsigned int reg, |
a8f28cfa | 138 | size_t num) |
82cd9965 LPC |
139 | { |
140 | unsigned int i; | |
141 | ||
142 | for (i = 0; i < num; i++) | |
143 | if (!regmap_volatile(map, reg + i)) | |
144 | return false; | |
145 | ||
146 | return true; | |
147 | } | |
148 | ||
9aa50750 WS |
149 | static void regmap_format_2_6_write(struct regmap *map, |
150 | unsigned int reg, unsigned int val) | |
151 | { | |
152 | u8 *out = map->work_buf; | |
153 | ||
154 | *out = (reg << 6) | val; | |
155 | } | |
156 | ||
b83a313b MB |
157 | static void regmap_format_4_12_write(struct regmap *map, |
158 | unsigned int reg, unsigned int val) | |
159 | { | |
160 | __be16 *out = map->work_buf; | |
161 | *out = cpu_to_be16((reg << 12) | val); | |
162 | } | |
163 | ||
164 | static void regmap_format_7_9_write(struct regmap *map, | |
165 | unsigned int reg, unsigned int val) | |
166 | { | |
167 | __be16 *out = map->work_buf; | |
168 | *out = cpu_to_be16((reg << 9) | val); | |
169 | } | |
170 | ||
7e5ec63e LPC |
171 | static void regmap_format_10_14_write(struct regmap *map, |
172 | unsigned int reg, unsigned int val) | |
173 | { | |
174 | u8 *out = map->work_buf; | |
175 | ||
176 | out[2] = val; | |
177 | out[1] = (val >> 8) | (reg << 6); | |
178 | out[0] = reg >> 2; | |
179 | } | |
180 | ||
d939fb9a | 181 | static void regmap_format_8(void *buf, unsigned int val, unsigned int shift) |
b83a313b MB |
182 | { |
183 | u8 *b = buf; | |
184 | ||
d939fb9a | 185 | b[0] = val << shift; |
b83a313b MB |
186 | } |
187 | ||
141eba2e | 188 | static void regmap_format_16_be(void *buf, unsigned int val, unsigned int shift) |
b83a313b MB |
189 | { |
190 | __be16 *b = buf; | |
191 | ||
d939fb9a | 192 | b[0] = cpu_to_be16(val << shift); |
b83a313b MB |
193 | } |
194 | ||
141eba2e SW |
195 | static void regmap_format_16_native(void *buf, unsigned int val, |
196 | unsigned int shift) | |
197 | { | |
198 | *(u16 *)buf = val << shift; | |
199 | } | |
200 | ||
d939fb9a | 201 | static void regmap_format_24(void *buf, unsigned int val, unsigned int shift) |
ea279fc5 MR |
202 | { |
203 | u8 *b = buf; | |
204 | ||
d939fb9a MR |
205 | val <<= shift; |
206 | ||
ea279fc5 MR |
207 | b[0] = val >> 16; |
208 | b[1] = val >> 8; | |
209 | b[2] = val; | |
210 | } | |
211 | ||
141eba2e | 212 | static void regmap_format_32_be(void *buf, unsigned int val, unsigned int shift) |
7d5e525b MB |
213 | { |
214 | __be32 *b = buf; | |
215 | ||
d939fb9a | 216 | b[0] = cpu_to_be32(val << shift); |
7d5e525b MB |
217 | } |
218 | ||
141eba2e SW |
219 | static void regmap_format_32_native(void *buf, unsigned int val, |
220 | unsigned int shift) | |
221 | { | |
222 | *(u32 *)buf = val << shift; | |
223 | } | |
224 | ||
8a819ff8 | 225 | static void regmap_parse_inplace_noop(void *buf) |
b83a313b | 226 | { |
8a819ff8 MB |
227 | } |
228 | ||
229 | static unsigned int regmap_parse_8(const void *buf) | |
230 | { | |
231 | const u8 *b = buf; | |
b83a313b MB |
232 | |
233 | return b[0]; | |
234 | } | |
235 | ||
8a819ff8 MB |
236 | static unsigned int regmap_parse_16_be(const void *buf) |
237 | { | |
238 | const __be16 *b = buf; | |
239 | ||
240 | return be16_to_cpu(b[0]); | |
241 | } | |
242 | ||
243 | static void regmap_parse_16_be_inplace(void *buf) | |
b83a313b MB |
244 | { |
245 | __be16 *b = buf; | |
246 | ||
247 | b[0] = be16_to_cpu(b[0]); | |
b83a313b MB |
248 | } |
249 | ||
8a819ff8 | 250 | static unsigned int regmap_parse_16_native(const void *buf) |
141eba2e SW |
251 | { |
252 | return *(u16 *)buf; | |
253 | } | |
254 | ||
8a819ff8 | 255 | static unsigned int regmap_parse_24(const void *buf) |
ea279fc5 | 256 | { |
8a819ff8 | 257 | const u8 *b = buf; |
ea279fc5 MR |
258 | unsigned int ret = b[2]; |
259 | ret |= ((unsigned int)b[1]) << 8; | |
260 | ret |= ((unsigned int)b[0]) << 16; | |
261 | ||
262 | return ret; | |
263 | } | |
264 | ||
8a819ff8 MB |
265 | static unsigned int regmap_parse_32_be(const void *buf) |
266 | { | |
267 | const __be32 *b = buf; | |
268 | ||
269 | return be32_to_cpu(b[0]); | |
270 | } | |
271 | ||
272 | static void regmap_parse_32_be_inplace(void *buf) | |
7d5e525b MB |
273 | { |
274 | __be32 *b = buf; | |
275 | ||
276 | b[0] = be32_to_cpu(b[0]); | |
7d5e525b MB |
277 | } |
278 | ||
8a819ff8 | 279 | static unsigned int regmap_parse_32_native(const void *buf) |
141eba2e SW |
280 | { |
281 | return *(u32 *)buf; | |
282 | } | |
283 | ||
0d4529c5 | 284 | static void regmap_lock_mutex(void *__map) |
bacdbe07 | 285 | { |
0d4529c5 | 286 | struct regmap *map = __map; |
bacdbe07 SW |
287 | mutex_lock(&map->mutex); |
288 | } | |
289 | ||
0d4529c5 | 290 | static void regmap_unlock_mutex(void *__map) |
bacdbe07 | 291 | { |
0d4529c5 | 292 | struct regmap *map = __map; |
bacdbe07 SW |
293 | mutex_unlock(&map->mutex); |
294 | } | |
295 | ||
0d4529c5 | 296 | static void regmap_lock_spinlock(void *__map) |
b4519c71 | 297 | __acquires(&map->spinlock) |
bacdbe07 | 298 | { |
0d4529c5 | 299 | struct regmap *map = __map; |
92ab1aab LPC |
300 | unsigned long flags; |
301 | ||
302 | spin_lock_irqsave(&map->spinlock, flags); | |
303 | map->spinlock_flags = flags; | |
bacdbe07 SW |
304 | } |
305 | ||
0d4529c5 | 306 | static void regmap_unlock_spinlock(void *__map) |
b4519c71 | 307 | __releases(&map->spinlock) |
bacdbe07 | 308 | { |
0d4529c5 | 309 | struct regmap *map = __map; |
92ab1aab | 310 | spin_unlock_irqrestore(&map->spinlock, map->spinlock_flags); |
bacdbe07 SW |
311 | } |
312 | ||
72b39f6f MB |
313 | static void dev_get_regmap_release(struct device *dev, void *res) |
314 | { | |
315 | /* | |
316 | * We don't actually have anything to do here; the goal here | |
317 | * is not to manage the regmap but to provide a simple way to | |
318 | * get the regmap back given a struct device. | |
319 | */ | |
320 | } | |
321 | ||
6863ca62 KG |
322 | static bool _regmap_range_add(struct regmap *map, |
323 | struct regmap_range_node *data) | |
324 | { | |
325 | struct rb_root *root = &map->range_tree; | |
326 | struct rb_node **new = &(root->rb_node), *parent = NULL; | |
327 | ||
328 | while (*new) { | |
329 | struct regmap_range_node *this = | |
330 | container_of(*new, struct regmap_range_node, node); | |
331 | ||
332 | parent = *new; | |
333 | if (data->range_max < this->range_min) | |
334 | new = &((*new)->rb_left); | |
335 | else if (data->range_min > this->range_max) | |
336 | new = &((*new)->rb_right); | |
337 | else | |
338 | return false; | |
339 | } | |
340 | ||
341 | rb_link_node(&data->node, parent, new); | |
342 | rb_insert_color(&data->node, root); | |
343 | ||
344 | return true; | |
345 | } | |
346 | ||
347 | static struct regmap_range_node *_regmap_range_lookup(struct regmap *map, | |
348 | unsigned int reg) | |
349 | { | |
350 | struct rb_node *node = map->range_tree.rb_node; | |
351 | ||
352 | while (node) { | |
353 | struct regmap_range_node *this = | |
354 | container_of(node, struct regmap_range_node, node); | |
355 | ||
356 | if (reg < this->range_min) | |
357 | node = node->rb_left; | |
358 | else if (reg > this->range_max) | |
359 | node = node->rb_right; | |
360 | else | |
361 | return this; | |
362 | } | |
363 | ||
364 | return NULL; | |
365 | } | |
366 | ||
367 | static void regmap_range_exit(struct regmap *map) | |
368 | { | |
369 | struct rb_node *next; | |
370 | struct regmap_range_node *range_node; | |
371 | ||
372 | next = rb_first(&map->range_tree); | |
373 | while (next) { | |
374 | range_node = rb_entry(next, struct regmap_range_node, node); | |
375 | next = rb_next(&range_node->node); | |
376 | rb_erase(&range_node->node, &map->range_tree); | |
377 | kfree(range_node); | |
378 | } | |
379 | ||
380 | kfree(map->selector_work_buf); | |
381 | } | |
382 | ||
6cfec04b MS |
383 | int regmap_attach_dev(struct device *dev, struct regmap *map, |
384 | const struct regmap_config *config) | |
385 | { | |
386 | struct regmap **m; | |
387 | ||
388 | map->dev = dev; | |
389 | ||
390 | regmap_debugfs_init(map, config->name); | |
391 | ||
392 | /* Add a devres resource for dev_get_regmap() */ | |
393 | m = devres_alloc(dev_get_regmap_release, sizeof(*m), GFP_KERNEL); | |
394 | if (!m) { | |
395 | regmap_debugfs_exit(map); | |
396 | return -ENOMEM; | |
397 | } | |
398 | *m = map; | |
399 | devres_add(dev, m); | |
400 | ||
401 | return 0; | |
402 | } | |
403 | EXPORT_SYMBOL_GPL(regmap_attach_dev); | |
404 | ||
b83a313b MB |
405 | /** |
406 | * regmap_init(): Initialise register map | |
407 | * | |
408 | * @dev: Device that will be interacted with | |
409 | * @bus: Bus-specific callbacks to use with device | |
0135bbcc | 410 | * @bus_context: Data passed to bus-specific callbacks |
b83a313b MB |
411 | * @config: Configuration for register map |
412 | * | |
413 | * The return value will be an ERR_PTR() on error or a valid pointer to | |
414 | * a struct regmap. This function should generally not be called | |
415 | * directly, it should be called by bus-specific init functions. | |
416 | */ | |
417 | struct regmap *regmap_init(struct device *dev, | |
418 | const struct regmap_bus *bus, | |
0135bbcc | 419 | void *bus_context, |
b83a313b MB |
420 | const struct regmap_config *config) |
421 | { | |
6cfec04b | 422 | struct regmap *map; |
b83a313b | 423 | int ret = -EINVAL; |
141eba2e | 424 | enum regmap_endian reg_endian, val_endian; |
6863ca62 | 425 | int i, j; |
b83a313b | 426 | |
d2a5884a | 427 | if (!config) |
abbb18fb | 428 | goto err; |
b83a313b MB |
429 | |
430 | map = kzalloc(sizeof(*map), GFP_KERNEL); | |
431 | if (map == NULL) { | |
432 | ret = -ENOMEM; | |
433 | goto err; | |
434 | } | |
435 | ||
0d4529c5 DC |
436 | if (config->lock && config->unlock) { |
437 | map->lock = config->lock; | |
438 | map->unlock = config->unlock; | |
439 | map->lock_arg = config->lock_arg; | |
bacdbe07 | 440 | } else { |
d2a5884a AS |
441 | if ((bus && bus->fast_io) || |
442 | config->fast_io) { | |
0d4529c5 DC |
443 | spin_lock_init(&map->spinlock); |
444 | map->lock = regmap_lock_spinlock; | |
445 | map->unlock = regmap_unlock_spinlock; | |
446 | } else { | |
447 | mutex_init(&map->mutex); | |
448 | map->lock = regmap_lock_mutex; | |
449 | map->unlock = regmap_unlock_mutex; | |
450 | } | |
451 | map->lock_arg = map; | |
bacdbe07 | 452 | } |
c212accc | 453 | map->format.reg_bytes = DIV_ROUND_UP(config->reg_bits, 8); |
82159ba8 | 454 | map->format.pad_bytes = config->pad_bits / 8; |
c212accc | 455 | map->format.val_bytes = DIV_ROUND_UP(config->val_bits, 8); |
5494a98f FE |
456 | map->format.buf_size = DIV_ROUND_UP(config->reg_bits + |
457 | config->val_bits + config->pad_bits, 8); | |
d939fb9a | 458 | map->reg_shift = config->pad_bits % 8; |
f01ee60f SW |
459 | if (config->reg_stride) |
460 | map->reg_stride = config->reg_stride; | |
461 | else | |
462 | map->reg_stride = 1; | |
2e33caf1 | 463 | map->use_single_rw = config->use_single_rw; |
e894c3f4 | 464 | map->can_multi_write = config->can_multi_write; |
b83a313b MB |
465 | map->dev = dev; |
466 | map->bus = bus; | |
0135bbcc | 467 | map->bus_context = bus_context; |
2e2ae66d | 468 | map->max_register = config->max_register; |
76aad392 DC |
469 | map->wr_table = config->wr_table; |
470 | map->rd_table = config->rd_table; | |
471 | map->volatile_table = config->volatile_table; | |
472 | map->precious_table = config->precious_table; | |
2e2ae66d MB |
473 | map->writeable_reg = config->writeable_reg; |
474 | map->readable_reg = config->readable_reg; | |
475 | map->volatile_reg = config->volatile_reg; | |
2efe1642 | 476 | map->precious_reg = config->precious_reg; |
5d1729e7 | 477 | map->cache_type = config->cache_type; |
72b39f6f | 478 | map->name = config->name; |
b83a313b | 479 | |
0d509f2b MB |
480 | spin_lock_init(&map->async_lock); |
481 | INIT_LIST_HEAD(&map->async_list); | |
7e09a979 | 482 | INIT_LIST_HEAD(&map->async_free); |
0d509f2b MB |
483 | init_waitqueue_head(&map->async_waitq); |
484 | ||
6f306441 LPC |
485 | if (config->read_flag_mask || config->write_flag_mask) { |
486 | map->read_flag_mask = config->read_flag_mask; | |
487 | map->write_flag_mask = config->write_flag_mask; | |
d2a5884a | 488 | } else if (bus) { |
6f306441 LPC |
489 | map->read_flag_mask = bus->read_flag_mask; |
490 | } | |
491 | ||
d2a5884a AS |
492 | if (!bus) { |
493 | map->reg_read = config->reg_read; | |
494 | map->reg_write = config->reg_write; | |
495 | ||
496 | map->defer_caching = false; | |
497 | goto skip_format_initialization; | |
498 | } else { | |
499 | map->reg_read = _regmap_bus_read; | |
500 | } | |
ad278406 | 501 | |
141eba2e SW |
502 | reg_endian = config->reg_format_endian; |
503 | if (reg_endian == REGMAP_ENDIAN_DEFAULT) | |
504 | reg_endian = bus->reg_format_endian_default; | |
505 | if (reg_endian == REGMAP_ENDIAN_DEFAULT) | |
506 | reg_endian = REGMAP_ENDIAN_BIG; | |
507 | ||
508 | val_endian = config->val_format_endian; | |
509 | if (val_endian == REGMAP_ENDIAN_DEFAULT) | |
510 | val_endian = bus->val_format_endian_default; | |
511 | if (val_endian == REGMAP_ENDIAN_DEFAULT) | |
512 | val_endian = REGMAP_ENDIAN_BIG; | |
513 | ||
d939fb9a | 514 | switch (config->reg_bits + map->reg_shift) { |
9aa50750 WS |
515 | case 2: |
516 | switch (config->val_bits) { | |
517 | case 6: | |
518 | map->format.format_write = regmap_format_2_6_write; | |
519 | break; | |
520 | default: | |
521 | goto err_map; | |
522 | } | |
523 | break; | |
524 | ||
b83a313b MB |
525 | case 4: |
526 | switch (config->val_bits) { | |
527 | case 12: | |
528 | map->format.format_write = regmap_format_4_12_write; | |
529 | break; | |
530 | default: | |
531 | goto err_map; | |
532 | } | |
533 | break; | |
534 | ||
535 | case 7: | |
536 | switch (config->val_bits) { | |
537 | case 9: | |
538 | map->format.format_write = regmap_format_7_9_write; | |
539 | break; | |
540 | default: | |
541 | goto err_map; | |
542 | } | |
543 | break; | |
544 | ||
7e5ec63e LPC |
545 | case 10: |
546 | switch (config->val_bits) { | |
547 | case 14: | |
548 | map->format.format_write = regmap_format_10_14_write; | |
549 | break; | |
550 | default: | |
551 | goto err_map; | |
552 | } | |
553 | break; | |
554 | ||
b83a313b MB |
555 | case 8: |
556 | map->format.format_reg = regmap_format_8; | |
557 | break; | |
558 | ||
559 | case 16: | |
141eba2e SW |
560 | switch (reg_endian) { |
561 | case REGMAP_ENDIAN_BIG: | |
562 | map->format.format_reg = regmap_format_16_be; | |
563 | break; | |
564 | case REGMAP_ENDIAN_NATIVE: | |
565 | map->format.format_reg = regmap_format_16_native; | |
566 | break; | |
567 | default: | |
568 | goto err_map; | |
569 | } | |
b83a313b MB |
570 | break; |
571 | ||
237019e7 LPC |
572 | case 24: |
573 | if (reg_endian != REGMAP_ENDIAN_BIG) | |
574 | goto err_map; | |
575 | map->format.format_reg = regmap_format_24; | |
576 | break; | |
577 | ||
7d5e525b | 578 | case 32: |
141eba2e SW |
579 | switch (reg_endian) { |
580 | case REGMAP_ENDIAN_BIG: | |
581 | map->format.format_reg = regmap_format_32_be; | |
582 | break; | |
583 | case REGMAP_ENDIAN_NATIVE: | |
584 | map->format.format_reg = regmap_format_32_native; | |
585 | break; | |
586 | default: | |
587 | goto err_map; | |
588 | } | |
7d5e525b MB |
589 | break; |
590 | ||
b83a313b MB |
591 | default: |
592 | goto err_map; | |
593 | } | |
594 | ||
8a819ff8 MB |
595 | if (val_endian == REGMAP_ENDIAN_NATIVE) |
596 | map->format.parse_inplace = regmap_parse_inplace_noop; | |
597 | ||
b83a313b MB |
598 | switch (config->val_bits) { |
599 | case 8: | |
600 | map->format.format_val = regmap_format_8; | |
601 | map->format.parse_val = regmap_parse_8; | |
8a819ff8 | 602 | map->format.parse_inplace = regmap_parse_inplace_noop; |
b83a313b MB |
603 | break; |
604 | case 16: | |
141eba2e SW |
605 | switch (val_endian) { |
606 | case REGMAP_ENDIAN_BIG: | |
607 | map->format.format_val = regmap_format_16_be; | |
608 | map->format.parse_val = regmap_parse_16_be; | |
8a819ff8 | 609 | map->format.parse_inplace = regmap_parse_16_be_inplace; |
141eba2e SW |
610 | break; |
611 | case REGMAP_ENDIAN_NATIVE: | |
612 | map->format.format_val = regmap_format_16_native; | |
613 | map->format.parse_val = regmap_parse_16_native; | |
614 | break; | |
615 | default: | |
616 | goto err_map; | |
617 | } | |
b83a313b | 618 | break; |
ea279fc5 | 619 | case 24: |
141eba2e SW |
620 | if (val_endian != REGMAP_ENDIAN_BIG) |
621 | goto err_map; | |
ea279fc5 MR |
622 | map->format.format_val = regmap_format_24; |
623 | map->format.parse_val = regmap_parse_24; | |
624 | break; | |
7d5e525b | 625 | case 32: |
141eba2e SW |
626 | switch (val_endian) { |
627 | case REGMAP_ENDIAN_BIG: | |
628 | map->format.format_val = regmap_format_32_be; | |
629 | map->format.parse_val = regmap_parse_32_be; | |
8a819ff8 | 630 | map->format.parse_inplace = regmap_parse_32_be_inplace; |
141eba2e SW |
631 | break; |
632 | case REGMAP_ENDIAN_NATIVE: | |
633 | map->format.format_val = regmap_format_32_native; | |
634 | map->format.parse_val = regmap_parse_32_native; | |
635 | break; | |
636 | default: | |
637 | goto err_map; | |
638 | } | |
7d5e525b | 639 | break; |
b83a313b MB |
640 | } |
641 | ||
141eba2e SW |
642 | if (map->format.format_write) { |
643 | if ((reg_endian != REGMAP_ENDIAN_BIG) || | |
644 | (val_endian != REGMAP_ENDIAN_BIG)) | |
645 | goto err_map; | |
7a647614 | 646 | map->use_single_rw = true; |
141eba2e | 647 | } |
7a647614 | 648 | |
b83a313b MB |
649 | if (!map->format.format_write && |
650 | !(map->format.format_reg && map->format.format_val)) | |
651 | goto err_map; | |
652 | ||
82159ba8 | 653 | map->work_buf = kzalloc(map->format.buf_size, GFP_KERNEL); |
b83a313b MB |
654 | if (map->work_buf == NULL) { |
655 | ret = -ENOMEM; | |
5204f5e3 | 656 | goto err_map; |
b83a313b MB |
657 | } |
658 | ||
d2a5884a AS |
659 | if (map->format.format_write) { |
660 | map->defer_caching = false; | |
07c320dc | 661 | map->reg_write = _regmap_bus_formatted_write; |
d2a5884a AS |
662 | } else if (map->format.format_val) { |
663 | map->defer_caching = true; | |
07c320dc | 664 | map->reg_write = _regmap_bus_raw_write; |
d2a5884a AS |
665 | } |
666 | ||
667 | skip_format_initialization: | |
07c320dc | 668 | |
6863ca62 | 669 | map->range_tree = RB_ROOT; |
e3549cd0 | 670 | for (i = 0; i < config->num_ranges; i++) { |
6863ca62 KG |
671 | const struct regmap_range_cfg *range_cfg = &config->ranges[i]; |
672 | struct regmap_range_node *new; | |
673 | ||
674 | /* Sanity check */ | |
061adc06 MB |
675 | if (range_cfg->range_max < range_cfg->range_min) { |
676 | dev_err(map->dev, "Invalid range %d: %d < %d\n", i, | |
677 | range_cfg->range_max, range_cfg->range_min); | |
6863ca62 | 678 | goto err_range; |
061adc06 MB |
679 | } |
680 | ||
681 | if (range_cfg->range_max > map->max_register) { | |
682 | dev_err(map->dev, "Invalid range %d: %d > %d\n", i, | |
683 | range_cfg->range_max, map->max_register); | |
684 | goto err_range; | |
685 | } | |
686 | ||
687 | if (range_cfg->selector_reg > map->max_register) { | |
688 | dev_err(map->dev, | |
689 | "Invalid range %d: selector out of map\n", i); | |
690 | goto err_range; | |
691 | } | |
692 | ||
693 | if (range_cfg->window_len == 0) { | |
694 | dev_err(map->dev, "Invalid range %d: window_len 0\n", | |
695 | i); | |
696 | goto err_range; | |
697 | } | |
6863ca62 KG |
698 | |
699 | /* Make sure, that this register range has no selector | |
700 | or data window within its boundary */ | |
e3549cd0 | 701 | for (j = 0; j < config->num_ranges; j++) { |
6863ca62 KG |
702 | unsigned sel_reg = config->ranges[j].selector_reg; |
703 | unsigned win_min = config->ranges[j].window_start; | |
704 | unsigned win_max = win_min + | |
705 | config->ranges[j].window_len - 1; | |
706 | ||
f161d220 PZ |
707 | /* Allow data window inside its own virtual range */ |
708 | if (j == i) | |
709 | continue; | |
710 | ||
6863ca62 KG |
711 | if (range_cfg->range_min <= sel_reg && |
712 | sel_reg <= range_cfg->range_max) { | |
061adc06 MB |
713 | dev_err(map->dev, |
714 | "Range %d: selector for %d in window\n", | |
715 | i, j); | |
6863ca62 KG |
716 | goto err_range; |
717 | } | |
718 | ||
719 | if (!(win_max < range_cfg->range_min || | |
720 | win_min > range_cfg->range_max)) { | |
061adc06 MB |
721 | dev_err(map->dev, |
722 | "Range %d: window for %d in window\n", | |
723 | i, j); | |
6863ca62 KG |
724 | goto err_range; |
725 | } | |
726 | } | |
727 | ||
728 | new = kzalloc(sizeof(*new), GFP_KERNEL); | |
729 | if (new == NULL) { | |
730 | ret = -ENOMEM; | |
731 | goto err_range; | |
732 | } | |
733 | ||
4b020b3f | 734 | new->map = map; |
d058bb49 | 735 | new->name = range_cfg->name; |
6863ca62 KG |
736 | new->range_min = range_cfg->range_min; |
737 | new->range_max = range_cfg->range_max; | |
738 | new->selector_reg = range_cfg->selector_reg; | |
739 | new->selector_mask = range_cfg->selector_mask; | |
740 | new->selector_shift = range_cfg->selector_shift; | |
741 | new->window_start = range_cfg->window_start; | |
742 | new->window_len = range_cfg->window_len; | |
743 | ||
53e87f88 | 744 | if (!_regmap_range_add(map, new)) { |
061adc06 | 745 | dev_err(map->dev, "Failed to add range %d\n", i); |
6863ca62 KG |
746 | kfree(new); |
747 | goto err_range; | |
748 | } | |
749 | ||
750 | if (map->selector_work_buf == NULL) { | |
751 | map->selector_work_buf = | |
752 | kzalloc(map->format.buf_size, GFP_KERNEL); | |
753 | if (map->selector_work_buf == NULL) { | |
754 | ret = -ENOMEM; | |
755 | goto err_range; | |
756 | } | |
757 | } | |
758 | } | |
052d2cd1 | 759 | |
e5e3b8ab | 760 | ret = regcache_init(map, config); |
0ff3e62f | 761 | if (ret != 0) |
6863ca62 KG |
762 | goto err_range; |
763 | ||
6cfec04b MS |
764 | if (dev) |
765 | ret = regmap_attach_dev(dev, map, config); | |
766 | if (ret != 0) | |
767 | goto err_regcache; | |
72b39f6f | 768 | |
b83a313b MB |
769 | return map; |
770 | ||
6cfec04b | 771 | err_regcache: |
72b39f6f | 772 | regcache_exit(map); |
6863ca62 KG |
773 | err_range: |
774 | regmap_range_exit(map); | |
58072cbf | 775 | kfree(map->work_buf); |
b83a313b MB |
776 | err_map: |
777 | kfree(map); | |
778 | err: | |
779 | return ERR_PTR(ret); | |
780 | } | |
781 | EXPORT_SYMBOL_GPL(regmap_init); | |
782 | ||
c0eb4676 MB |
783 | static void devm_regmap_release(struct device *dev, void *res) |
784 | { | |
785 | regmap_exit(*(struct regmap **)res); | |
786 | } | |
787 | ||
788 | /** | |
789 | * devm_regmap_init(): Initialise managed register map | |
790 | * | |
791 | * @dev: Device that will be interacted with | |
792 | * @bus: Bus-specific callbacks to use with device | |
0135bbcc | 793 | * @bus_context: Data passed to bus-specific callbacks |
c0eb4676 MB |
794 | * @config: Configuration for register map |
795 | * | |
796 | * The return value will be an ERR_PTR() on error or a valid pointer | |
797 | * to a struct regmap. This function should generally not be called | |
798 | * directly, it should be called by bus-specific init functions. The | |
799 | * map will be automatically freed by the device management code. | |
800 | */ | |
801 | struct regmap *devm_regmap_init(struct device *dev, | |
802 | const struct regmap_bus *bus, | |
0135bbcc | 803 | void *bus_context, |
c0eb4676 MB |
804 | const struct regmap_config *config) |
805 | { | |
806 | struct regmap **ptr, *regmap; | |
807 | ||
808 | ptr = devres_alloc(devm_regmap_release, sizeof(*ptr), GFP_KERNEL); | |
809 | if (!ptr) | |
810 | return ERR_PTR(-ENOMEM); | |
811 | ||
0135bbcc | 812 | regmap = regmap_init(dev, bus, bus_context, config); |
c0eb4676 MB |
813 | if (!IS_ERR(regmap)) { |
814 | *ptr = regmap; | |
815 | devres_add(dev, ptr); | |
816 | } else { | |
817 | devres_free(ptr); | |
818 | } | |
819 | ||
820 | return regmap; | |
821 | } | |
822 | EXPORT_SYMBOL_GPL(devm_regmap_init); | |
823 | ||
67252287 SK |
824 | static void regmap_field_init(struct regmap_field *rm_field, |
825 | struct regmap *regmap, struct reg_field reg_field) | |
826 | { | |
827 | int field_bits = reg_field.msb - reg_field.lsb + 1; | |
828 | rm_field->regmap = regmap; | |
829 | rm_field->reg = reg_field.reg; | |
830 | rm_field->shift = reg_field.lsb; | |
831 | rm_field->mask = ((BIT(field_bits) - 1) << reg_field.lsb); | |
a0102375 KM |
832 | rm_field->id_size = reg_field.id_size; |
833 | rm_field->id_offset = reg_field.id_offset; | |
67252287 SK |
834 | } |
835 | ||
836 | /** | |
837 | * devm_regmap_field_alloc(): Allocate and initialise a register field | |
838 | * in a register map. | |
839 | * | |
840 | * @dev: Device that will be interacted with | |
841 | * @regmap: regmap bank in which this register field is located. | |
842 | * @reg_field: Register field with in the bank. | |
843 | * | |
844 | * The return value will be an ERR_PTR() on error or a valid pointer | |
845 | * to a struct regmap_field. The regmap_field will be automatically freed | |
846 | * by the device management code. | |
847 | */ | |
848 | struct regmap_field *devm_regmap_field_alloc(struct device *dev, | |
849 | struct regmap *regmap, struct reg_field reg_field) | |
850 | { | |
851 | struct regmap_field *rm_field = devm_kzalloc(dev, | |
852 | sizeof(*rm_field), GFP_KERNEL); | |
853 | if (!rm_field) | |
854 | return ERR_PTR(-ENOMEM); | |
855 | ||
856 | regmap_field_init(rm_field, regmap, reg_field); | |
857 | ||
858 | return rm_field; | |
859 | ||
860 | } | |
861 | EXPORT_SYMBOL_GPL(devm_regmap_field_alloc); | |
862 | ||
863 | /** | |
864 | * devm_regmap_field_free(): Free register field allocated using | |
865 | * devm_regmap_field_alloc. Usally drivers need not call this function, | |
866 | * as the memory allocated via devm will be freed as per device-driver | |
867 | * life-cyle. | |
868 | * | |
869 | * @dev: Device that will be interacted with | |
870 | * @field: regmap field which should be freed. | |
871 | */ | |
872 | void devm_regmap_field_free(struct device *dev, | |
873 | struct regmap_field *field) | |
874 | { | |
875 | devm_kfree(dev, field); | |
876 | } | |
877 | EXPORT_SYMBOL_GPL(devm_regmap_field_free); | |
878 | ||
879 | /** | |
880 | * regmap_field_alloc(): Allocate and initialise a register field | |
881 | * in a register map. | |
882 | * | |
883 | * @regmap: regmap bank in which this register field is located. | |
884 | * @reg_field: Register field with in the bank. | |
885 | * | |
886 | * The return value will be an ERR_PTR() on error or a valid pointer | |
887 | * to a struct regmap_field. The regmap_field should be freed by the | |
888 | * user once its finished working with it using regmap_field_free(). | |
889 | */ | |
890 | struct regmap_field *regmap_field_alloc(struct regmap *regmap, | |
891 | struct reg_field reg_field) | |
892 | { | |
893 | struct regmap_field *rm_field = kzalloc(sizeof(*rm_field), GFP_KERNEL); | |
894 | ||
895 | if (!rm_field) | |
896 | return ERR_PTR(-ENOMEM); | |
897 | ||
898 | regmap_field_init(rm_field, regmap, reg_field); | |
899 | ||
900 | return rm_field; | |
901 | } | |
902 | EXPORT_SYMBOL_GPL(regmap_field_alloc); | |
903 | ||
904 | /** | |
905 | * regmap_field_free(): Free register field allocated using regmap_field_alloc | |
906 | * | |
907 | * @field: regmap field which should be freed. | |
908 | */ | |
909 | void regmap_field_free(struct regmap_field *field) | |
910 | { | |
911 | kfree(field); | |
912 | } | |
913 | EXPORT_SYMBOL_GPL(regmap_field_free); | |
914 | ||
bf315173 MB |
915 | /** |
916 | * regmap_reinit_cache(): Reinitialise the current register cache | |
917 | * | |
918 | * @map: Register map to operate on. | |
919 | * @config: New configuration. Only the cache data will be used. | |
920 | * | |
921 | * Discard any existing register cache for the map and initialize a | |
922 | * new cache. This can be used to restore the cache to defaults or to | |
923 | * update the cache configuration to reflect runtime discovery of the | |
924 | * hardware. | |
4d879514 DP |
925 | * |
926 | * No explicit locking is done here, the user needs to ensure that | |
927 | * this function will not race with other calls to regmap. | |
bf315173 MB |
928 | */ |
929 | int regmap_reinit_cache(struct regmap *map, const struct regmap_config *config) | |
930 | { | |
bf315173 | 931 | regcache_exit(map); |
a24f64a6 | 932 | regmap_debugfs_exit(map); |
bf315173 MB |
933 | |
934 | map->max_register = config->max_register; | |
935 | map->writeable_reg = config->writeable_reg; | |
936 | map->readable_reg = config->readable_reg; | |
937 | map->volatile_reg = config->volatile_reg; | |
938 | map->precious_reg = config->precious_reg; | |
939 | map->cache_type = config->cache_type; | |
940 | ||
d3c242e1 | 941 | regmap_debugfs_init(map, config->name); |
a24f64a6 | 942 | |
421e8d2d MB |
943 | map->cache_bypass = false; |
944 | map->cache_only = false; | |
945 | ||
4d879514 | 946 | return regcache_init(map, config); |
bf315173 | 947 | } |
752a6a5f | 948 | EXPORT_SYMBOL_GPL(regmap_reinit_cache); |
bf315173 | 949 | |
b83a313b MB |
950 | /** |
951 | * regmap_exit(): Free a previously allocated register map | |
952 | */ | |
953 | void regmap_exit(struct regmap *map) | |
954 | { | |
7e09a979 MB |
955 | struct regmap_async *async; |
956 | ||
5d1729e7 | 957 | regcache_exit(map); |
31244e39 | 958 | regmap_debugfs_exit(map); |
6863ca62 | 959 | regmap_range_exit(map); |
d2a5884a | 960 | if (map->bus && map->bus->free_context) |
0135bbcc | 961 | map->bus->free_context(map->bus_context); |
b83a313b | 962 | kfree(map->work_buf); |
7e09a979 MB |
963 | while (!list_empty(&map->async_free)) { |
964 | async = list_first_entry_or_null(&map->async_free, | |
965 | struct regmap_async, | |
966 | list); | |
967 | list_del(&async->list); | |
968 | kfree(async->work_buf); | |
969 | kfree(async); | |
970 | } | |
b83a313b MB |
971 | kfree(map); |
972 | } | |
973 | EXPORT_SYMBOL_GPL(regmap_exit); | |
974 | ||
72b39f6f MB |
975 | static int dev_get_regmap_match(struct device *dev, void *res, void *data) |
976 | { | |
977 | struct regmap **r = res; | |
978 | if (!r || !*r) { | |
979 | WARN_ON(!r || !*r); | |
980 | return 0; | |
981 | } | |
982 | ||
983 | /* If the user didn't specify a name match any */ | |
984 | if (data) | |
985 | return (*r)->name == data; | |
986 | else | |
987 | return 1; | |
988 | } | |
989 | ||
990 | /** | |
991 | * dev_get_regmap(): Obtain the regmap (if any) for a device | |
992 | * | |
993 | * @dev: Device to retrieve the map for | |
994 | * @name: Optional name for the register map, usually NULL. | |
995 | * | |
996 | * Returns the regmap for the device if one is present, or NULL. If | |
997 | * name is specified then it must match the name specified when | |
998 | * registering the device, if it is NULL then the first regmap found | |
999 | * will be used. Devices with multiple register maps are very rare, | |
1000 | * generic code should normally not need to specify a name. | |
1001 | */ | |
1002 | struct regmap *dev_get_regmap(struct device *dev, const char *name) | |
1003 | { | |
1004 | struct regmap **r = devres_find(dev, dev_get_regmap_release, | |
1005 | dev_get_regmap_match, (void *)name); | |
1006 | ||
1007 | if (!r) | |
1008 | return NULL; | |
1009 | return *r; | |
1010 | } | |
1011 | EXPORT_SYMBOL_GPL(dev_get_regmap); | |
1012 | ||
6863ca62 | 1013 | static int _regmap_select_page(struct regmap *map, unsigned int *reg, |
98bc7dfd | 1014 | struct regmap_range_node *range, |
6863ca62 KG |
1015 | unsigned int val_num) |
1016 | { | |
6863ca62 KG |
1017 | void *orig_work_buf; |
1018 | unsigned int win_offset; | |
1019 | unsigned int win_page; | |
1020 | bool page_chg; | |
1021 | int ret; | |
1022 | ||
98bc7dfd MB |
1023 | win_offset = (*reg - range->range_min) % range->window_len; |
1024 | win_page = (*reg - range->range_min) / range->window_len; | |
6863ca62 | 1025 | |
98bc7dfd MB |
1026 | if (val_num > 1) { |
1027 | /* Bulk write shouldn't cross range boundary */ | |
1028 | if (*reg + val_num - 1 > range->range_max) | |
1029 | return -EINVAL; | |
6863ca62 | 1030 | |
98bc7dfd MB |
1031 | /* ... or single page boundary */ |
1032 | if (val_num > range->window_len - win_offset) | |
1033 | return -EINVAL; | |
1034 | } | |
6863ca62 | 1035 | |
98bc7dfd MB |
1036 | /* It is possible to have selector register inside data window. |
1037 | In that case, selector register is located on every page and | |
1038 | it needs no page switching, when accessed alone. */ | |
1039 | if (val_num > 1 || | |
1040 | range->window_start + win_offset != range->selector_reg) { | |
1041 | /* Use separate work_buf during page switching */ | |
1042 | orig_work_buf = map->work_buf; | |
1043 | map->work_buf = map->selector_work_buf; | |
6863ca62 | 1044 | |
98bc7dfd MB |
1045 | ret = _regmap_update_bits(map, range->selector_reg, |
1046 | range->selector_mask, | |
1047 | win_page << range->selector_shift, | |
1048 | &page_chg); | |
632a5b01 | 1049 | |
98bc7dfd | 1050 | map->work_buf = orig_work_buf; |
6863ca62 | 1051 | |
0ff3e62f | 1052 | if (ret != 0) |
98bc7dfd | 1053 | return ret; |
6863ca62 KG |
1054 | } |
1055 | ||
98bc7dfd MB |
1056 | *reg = range->window_start + win_offset; |
1057 | ||
6863ca62 KG |
1058 | return 0; |
1059 | } | |
1060 | ||
584de329 | 1061 | int _regmap_raw_write(struct regmap *map, unsigned int reg, |
0a819809 | 1062 | const void *val, size_t val_len) |
b83a313b | 1063 | { |
98bc7dfd | 1064 | struct regmap_range_node *range; |
0d509f2b | 1065 | unsigned long flags; |
6f306441 | 1066 | u8 *u8 = map->work_buf; |
0d509f2b MB |
1067 | void *work_val = map->work_buf + map->format.reg_bytes + |
1068 | map->format.pad_bytes; | |
b83a313b MB |
1069 | void *buf; |
1070 | int ret = -ENOTSUPP; | |
1071 | size_t len; | |
73304781 MB |
1072 | int i; |
1073 | ||
f1b5c5c3 | 1074 | WARN_ON(!map->bus); |
d2a5884a | 1075 | |
73304781 MB |
1076 | /* Check for unwritable registers before we start */ |
1077 | if (map->writeable_reg) | |
1078 | for (i = 0; i < val_len / map->format.val_bytes; i++) | |
f01ee60f SW |
1079 | if (!map->writeable_reg(map->dev, |
1080 | reg + (i * map->reg_stride))) | |
73304781 | 1081 | return -EINVAL; |
b83a313b | 1082 | |
c9157198 LD |
1083 | if (!map->cache_bypass && map->format.parse_val) { |
1084 | unsigned int ival; | |
1085 | int val_bytes = map->format.val_bytes; | |
1086 | for (i = 0; i < val_len / val_bytes; i++) { | |
5a08d156 | 1087 | ival = map->format.parse_val(val + (i * val_bytes)); |
f01ee60f SW |
1088 | ret = regcache_write(map, reg + (i * map->reg_stride), |
1089 | ival); | |
c9157198 LD |
1090 | if (ret) { |
1091 | dev_err(map->dev, | |
6d04b8ac | 1092 | "Error in caching of register: %x ret: %d\n", |
c9157198 LD |
1093 | reg + i, ret); |
1094 | return ret; | |
1095 | } | |
1096 | } | |
1097 | if (map->cache_only) { | |
1098 | map->cache_dirty = true; | |
1099 | return 0; | |
1100 | } | |
1101 | } | |
1102 | ||
98bc7dfd MB |
1103 | range = _regmap_range_lookup(map, reg); |
1104 | if (range) { | |
8a2ceac6 MB |
1105 | int val_num = val_len / map->format.val_bytes; |
1106 | int win_offset = (reg - range->range_min) % range->window_len; | |
1107 | int win_residue = range->window_len - win_offset; | |
1108 | ||
1109 | /* If the write goes beyond the end of the window split it */ | |
1110 | while (val_num > win_residue) { | |
1a61cfe3 | 1111 | dev_dbg(map->dev, "Writing window %d/%zu\n", |
8a2ceac6 MB |
1112 | win_residue, val_len / map->format.val_bytes); |
1113 | ret = _regmap_raw_write(map, reg, val, win_residue * | |
0a819809 | 1114 | map->format.val_bytes); |
8a2ceac6 MB |
1115 | if (ret != 0) |
1116 | return ret; | |
1117 | ||
1118 | reg += win_residue; | |
1119 | val_num -= win_residue; | |
1120 | val += win_residue * map->format.val_bytes; | |
1121 | val_len -= win_residue * map->format.val_bytes; | |
1122 | ||
1123 | win_offset = (reg - range->range_min) % | |
1124 | range->window_len; | |
1125 | win_residue = range->window_len - win_offset; | |
1126 | } | |
1127 | ||
1128 | ret = _regmap_select_page(map, ®, range, val_num); | |
0ff3e62f | 1129 | if (ret != 0) |
98bc7dfd MB |
1130 | return ret; |
1131 | } | |
6863ca62 | 1132 | |
d939fb9a | 1133 | map->format.format_reg(map->work_buf, reg, map->reg_shift); |
b83a313b | 1134 | |
6f306441 LPC |
1135 | u8[0] |= map->write_flag_mask; |
1136 | ||
651e013e MB |
1137 | /* |
1138 | * Essentially all I/O mechanisms will be faster with a single | |
1139 | * buffer to write. Since register syncs often generate raw | |
1140 | * writes of single registers optimise that case. | |
1141 | */ | |
1142 | if (val != work_val && val_len == map->format.val_bytes) { | |
1143 | memcpy(work_val, val, map->format.val_bytes); | |
1144 | val = work_val; | |
1145 | } | |
1146 | ||
0a819809 | 1147 | if (map->async && map->bus->async_write) { |
7e09a979 | 1148 | struct regmap_async *async; |
0d509f2b | 1149 | |
fe7d4ccd MB |
1150 | trace_regmap_async_write_start(map->dev, reg, val_len); |
1151 | ||
7e09a979 MB |
1152 | spin_lock_irqsave(&map->async_lock, flags); |
1153 | async = list_first_entry_or_null(&map->async_free, | |
1154 | struct regmap_async, | |
1155 | list); | |
1156 | if (async) | |
1157 | list_del(&async->list); | |
1158 | spin_unlock_irqrestore(&map->async_lock, flags); | |
1159 | ||
1160 | if (!async) { | |
1161 | async = map->bus->async_alloc(); | |
1162 | if (!async) | |
1163 | return -ENOMEM; | |
1164 | ||
1165 | async->work_buf = kzalloc(map->format.buf_size, | |
1166 | GFP_KERNEL | GFP_DMA); | |
1167 | if (!async->work_buf) { | |
1168 | kfree(async); | |
1169 | return -ENOMEM; | |
1170 | } | |
0d509f2b MB |
1171 | } |
1172 | ||
0d509f2b MB |
1173 | async->map = map; |
1174 | ||
1175 | /* If the caller supplied the value we can use it safely. */ | |
1176 | memcpy(async->work_buf, map->work_buf, map->format.pad_bytes + | |
1177 | map->format.reg_bytes + map->format.val_bytes); | |
0d509f2b MB |
1178 | |
1179 | spin_lock_irqsave(&map->async_lock, flags); | |
1180 | list_add_tail(&async->list, &map->async_list); | |
1181 | spin_unlock_irqrestore(&map->async_lock, flags); | |
1182 | ||
04c50ccf MB |
1183 | if (val != work_val) |
1184 | ret = map->bus->async_write(map->bus_context, | |
1185 | async->work_buf, | |
1186 | map->format.reg_bytes + | |
1187 | map->format.pad_bytes, | |
1188 | val, val_len, async); | |
1189 | else | |
1190 | ret = map->bus->async_write(map->bus_context, | |
1191 | async->work_buf, | |
1192 | map->format.reg_bytes + | |
1193 | map->format.pad_bytes + | |
1194 | val_len, NULL, 0, async); | |
0d509f2b MB |
1195 | |
1196 | if (ret != 0) { | |
1197 | dev_err(map->dev, "Failed to schedule write: %d\n", | |
1198 | ret); | |
1199 | ||
1200 | spin_lock_irqsave(&map->async_lock, flags); | |
7e09a979 | 1201 | list_move(&async->list, &map->async_free); |
0d509f2b | 1202 | spin_unlock_irqrestore(&map->async_lock, flags); |
0d509f2b | 1203 | } |
f951b658 MB |
1204 | |
1205 | return ret; | |
0d509f2b MB |
1206 | } |
1207 | ||
fb2736bb MB |
1208 | trace_regmap_hw_write_start(map->dev, reg, |
1209 | val_len / map->format.val_bytes); | |
1210 | ||
2547e201 MB |
1211 | /* If we're doing a single register write we can probably just |
1212 | * send the work_buf directly, otherwise try to do a gather | |
1213 | * write. | |
1214 | */ | |
0d509f2b | 1215 | if (val == work_val) |
0135bbcc | 1216 | ret = map->bus->write(map->bus_context, map->work_buf, |
82159ba8 MB |
1217 | map->format.reg_bytes + |
1218 | map->format.pad_bytes + | |
1219 | val_len); | |
2547e201 | 1220 | else if (map->bus->gather_write) |
0135bbcc | 1221 | ret = map->bus->gather_write(map->bus_context, map->work_buf, |
82159ba8 MB |
1222 | map->format.reg_bytes + |
1223 | map->format.pad_bytes, | |
b83a313b MB |
1224 | val, val_len); |
1225 | ||
2547e201 | 1226 | /* If that didn't work fall back on linearising by hand. */ |
b83a313b | 1227 | if (ret == -ENOTSUPP) { |
82159ba8 MB |
1228 | len = map->format.reg_bytes + map->format.pad_bytes + val_len; |
1229 | buf = kzalloc(len, GFP_KERNEL); | |
b83a313b MB |
1230 | if (!buf) |
1231 | return -ENOMEM; | |
1232 | ||
1233 | memcpy(buf, map->work_buf, map->format.reg_bytes); | |
82159ba8 MB |
1234 | memcpy(buf + map->format.reg_bytes + map->format.pad_bytes, |
1235 | val, val_len); | |
0135bbcc | 1236 | ret = map->bus->write(map->bus_context, buf, len); |
b83a313b MB |
1237 | |
1238 | kfree(buf); | |
1239 | } | |
1240 | ||
fb2736bb MB |
1241 | trace_regmap_hw_write_done(map->dev, reg, |
1242 | val_len / map->format.val_bytes); | |
1243 | ||
b83a313b MB |
1244 | return ret; |
1245 | } | |
1246 | ||
221ad7f2 MB |
1247 | /** |
1248 | * regmap_can_raw_write - Test if regmap_raw_write() is supported | |
1249 | * | |
1250 | * @map: Map to check. | |
1251 | */ | |
1252 | bool regmap_can_raw_write(struct regmap *map) | |
1253 | { | |
1254 | return map->bus && map->format.format_val && map->format.format_reg; | |
1255 | } | |
1256 | EXPORT_SYMBOL_GPL(regmap_can_raw_write); | |
1257 | ||
07c320dc AS |
1258 | static int _regmap_bus_formatted_write(void *context, unsigned int reg, |
1259 | unsigned int val) | |
1260 | { | |
1261 | int ret; | |
1262 | struct regmap_range_node *range; | |
1263 | struct regmap *map = context; | |
1264 | ||
f1b5c5c3 | 1265 | WARN_ON(!map->bus || !map->format.format_write); |
07c320dc AS |
1266 | |
1267 | range = _regmap_range_lookup(map, reg); | |
1268 | if (range) { | |
1269 | ret = _regmap_select_page(map, ®, range, 1); | |
1270 | if (ret != 0) | |
1271 | return ret; | |
1272 | } | |
1273 | ||
1274 | map->format.format_write(map, reg, val); | |
1275 | ||
1276 | trace_regmap_hw_write_start(map->dev, reg, 1); | |
1277 | ||
1278 | ret = map->bus->write(map->bus_context, map->work_buf, | |
1279 | map->format.buf_size); | |
1280 | ||
1281 | trace_regmap_hw_write_done(map->dev, reg, 1); | |
1282 | ||
1283 | return ret; | |
1284 | } | |
1285 | ||
1286 | static int _regmap_bus_raw_write(void *context, unsigned int reg, | |
1287 | unsigned int val) | |
1288 | { | |
1289 | struct regmap *map = context; | |
1290 | ||
f1b5c5c3 | 1291 | WARN_ON(!map->bus || !map->format.format_val); |
07c320dc AS |
1292 | |
1293 | map->format.format_val(map->work_buf + map->format.reg_bytes | |
1294 | + map->format.pad_bytes, val, 0); | |
1295 | return _regmap_raw_write(map, reg, | |
1296 | map->work_buf + | |
1297 | map->format.reg_bytes + | |
1298 | map->format.pad_bytes, | |
0a819809 | 1299 | map->format.val_bytes); |
07c320dc AS |
1300 | } |
1301 | ||
d2a5884a AS |
1302 | static inline void *_regmap_map_get_context(struct regmap *map) |
1303 | { | |
1304 | return (map->bus) ? map : map->bus_context; | |
1305 | } | |
1306 | ||
4d2dc095 DP |
1307 | int _regmap_write(struct regmap *map, unsigned int reg, |
1308 | unsigned int val) | |
b83a313b | 1309 | { |
fb2736bb | 1310 | int ret; |
d2a5884a | 1311 | void *context = _regmap_map_get_context(map); |
b83a313b | 1312 | |
515f2261 IN |
1313 | if (!regmap_writeable(map, reg)) |
1314 | return -EIO; | |
1315 | ||
d2a5884a | 1316 | if (!map->cache_bypass && !map->defer_caching) { |
5d1729e7 DP |
1317 | ret = regcache_write(map, reg, val); |
1318 | if (ret != 0) | |
1319 | return ret; | |
8ae0d7e8 MB |
1320 | if (map->cache_only) { |
1321 | map->cache_dirty = true; | |
5d1729e7 | 1322 | return 0; |
8ae0d7e8 | 1323 | } |
5d1729e7 DP |
1324 | } |
1325 | ||
1044c180 MB |
1326 | #ifdef LOG_DEVICE |
1327 | if (strcmp(dev_name(map->dev), LOG_DEVICE) == 0) | |
1328 | dev_info(map->dev, "%x <= %x\n", reg, val); | |
1329 | #endif | |
1330 | ||
fb2736bb MB |
1331 | trace_regmap_reg_write(map->dev, reg, val); |
1332 | ||
d2a5884a | 1333 | return map->reg_write(context, reg, val); |
b83a313b MB |
1334 | } |
1335 | ||
1336 | /** | |
1337 | * regmap_write(): Write a value to a single register | |
1338 | * | |
1339 | * @map: Register map to write to | |
1340 | * @reg: Register to write to | |
1341 | * @val: Value to be written | |
1342 | * | |
1343 | * A value of zero will be returned on success, a negative errno will | |
1344 | * be returned in error cases. | |
1345 | */ | |
1346 | int regmap_write(struct regmap *map, unsigned int reg, unsigned int val) | |
1347 | { | |
1348 | int ret; | |
1349 | ||
f01ee60f SW |
1350 | if (reg % map->reg_stride) |
1351 | return -EINVAL; | |
1352 | ||
0d4529c5 | 1353 | map->lock(map->lock_arg); |
b83a313b MB |
1354 | |
1355 | ret = _regmap_write(map, reg, val); | |
1356 | ||
0d4529c5 | 1357 | map->unlock(map->lock_arg); |
b83a313b MB |
1358 | |
1359 | return ret; | |
1360 | } | |
1361 | EXPORT_SYMBOL_GPL(regmap_write); | |
1362 | ||
915f441b MB |
1363 | /** |
1364 | * regmap_write_async(): Write a value to a single register asynchronously | |
1365 | * | |
1366 | * @map: Register map to write to | |
1367 | * @reg: Register to write to | |
1368 | * @val: Value to be written | |
1369 | * | |
1370 | * A value of zero will be returned on success, a negative errno will | |
1371 | * be returned in error cases. | |
1372 | */ | |
1373 | int regmap_write_async(struct regmap *map, unsigned int reg, unsigned int val) | |
1374 | { | |
1375 | int ret; | |
1376 | ||
1377 | if (reg % map->reg_stride) | |
1378 | return -EINVAL; | |
1379 | ||
1380 | map->lock(map->lock_arg); | |
1381 | ||
1382 | map->async = true; | |
1383 | ||
1384 | ret = _regmap_write(map, reg, val); | |
1385 | ||
1386 | map->async = false; | |
1387 | ||
1388 | map->unlock(map->lock_arg); | |
1389 | ||
1390 | return ret; | |
1391 | } | |
1392 | EXPORT_SYMBOL_GPL(regmap_write_async); | |
1393 | ||
b83a313b MB |
1394 | /** |
1395 | * regmap_raw_write(): Write raw values to one or more registers | |
1396 | * | |
1397 | * @map: Register map to write to | |
1398 | * @reg: Initial register to write to | |
1399 | * @val: Block of data to be written, laid out for direct transmission to the | |
1400 | * device | |
1401 | * @val_len: Length of data pointed to by val. | |
1402 | * | |
1403 | * This function is intended to be used for things like firmware | |
1404 | * download where a large block of data needs to be transferred to the | |
1405 | * device. No formatting will be done on the data provided. | |
1406 | * | |
1407 | * A value of zero will be returned on success, a negative errno will | |
1408 | * be returned in error cases. | |
1409 | */ | |
1410 | int regmap_raw_write(struct regmap *map, unsigned int reg, | |
1411 | const void *val, size_t val_len) | |
1412 | { | |
1413 | int ret; | |
1414 | ||
221ad7f2 | 1415 | if (!regmap_can_raw_write(map)) |
d2a5884a | 1416 | return -EINVAL; |
851960ba SW |
1417 | if (val_len % map->format.val_bytes) |
1418 | return -EINVAL; | |
1419 | ||
0d4529c5 | 1420 | map->lock(map->lock_arg); |
b83a313b | 1421 | |
0a819809 | 1422 | ret = _regmap_raw_write(map, reg, val, val_len); |
b83a313b | 1423 | |
0d4529c5 | 1424 | map->unlock(map->lock_arg); |
b83a313b MB |
1425 | |
1426 | return ret; | |
1427 | } | |
1428 | EXPORT_SYMBOL_GPL(regmap_raw_write); | |
1429 | ||
67252287 SK |
1430 | /** |
1431 | * regmap_field_write(): Write a value to a single register field | |
1432 | * | |
1433 | * @field: Register field to write to | |
1434 | * @val: Value to be written | |
1435 | * | |
1436 | * A value of zero will be returned on success, a negative errno will | |
1437 | * be returned in error cases. | |
1438 | */ | |
1439 | int regmap_field_write(struct regmap_field *field, unsigned int val) | |
1440 | { | |
1441 | return regmap_update_bits(field->regmap, field->reg, | |
1442 | field->mask, val << field->shift); | |
1443 | } | |
1444 | EXPORT_SYMBOL_GPL(regmap_field_write); | |
1445 | ||
fdf20029 KM |
1446 | /** |
1447 | * regmap_field_update_bits(): Perform a read/modify/write cycle | |
1448 | * on the register field | |
1449 | * | |
1450 | * @field: Register field to write to | |
1451 | * @mask: Bitmask to change | |
1452 | * @val: Value to be written | |
1453 | * | |
1454 | * A value of zero will be returned on success, a negative errno will | |
1455 | * be returned in error cases. | |
1456 | */ | |
1457 | int regmap_field_update_bits(struct regmap_field *field, unsigned int mask, unsigned int val) | |
1458 | { | |
1459 | mask = (mask << field->shift) & field->mask; | |
1460 | ||
1461 | return regmap_update_bits(field->regmap, field->reg, | |
1462 | mask, val << field->shift); | |
1463 | } | |
1464 | EXPORT_SYMBOL_GPL(regmap_field_update_bits); | |
1465 | ||
a0102375 KM |
1466 | /** |
1467 | * regmap_fields_write(): Write a value to a single register field with port ID | |
1468 | * | |
1469 | * @field: Register field to write to | |
1470 | * @id: port ID | |
1471 | * @val: Value to be written | |
1472 | * | |
1473 | * A value of zero will be returned on success, a negative errno will | |
1474 | * be returned in error cases. | |
1475 | */ | |
1476 | int regmap_fields_write(struct regmap_field *field, unsigned int id, | |
1477 | unsigned int val) | |
1478 | { | |
1479 | if (id >= field->id_size) | |
1480 | return -EINVAL; | |
1481 | ||
1482 | return regmap_update_bits(field->regmap, | |
1483 | field->reg + (field->id_offset * id), | |
1484 | field->mask, val << field->shift); | |
1485 | } | |
1486 | EXPORT_SYMBOL_GPL(regmap_fields_write); | |
1487 | ||
1488 | /** | |
1489 | * regmap_fields_update_bits(): Perform a read/modify/write cycle | |
1490 | * on the register field | |
1491 | * | |
1492 | * @field: Register field to write to | |
1493 | * @id: port ID | |
1494 | * @mask: Bitmask to change | |
1495 | * @val: Value to be written | |
1496 | * | |
1497 | * A value of zero will be returned on success, a negative errno will | |
1498 | * be returned in error cases. | |
1499 | */ | |
1500 | int regmap_fields_update_bits(struct regmap_field *field, unsigned int id, | |
1501 | unsigned int mask, unsigned int val) | |
1502 | { | |
1503 | if (id >= field->id_size) | |
1504 | return -EINVAL; | |
1505 | ||
1506 | mask = (mask << field->shift) & field->mask; | |
1507 | ||
1508 | return regmap_update_bits(field->regmap, | |
1509 | field->reg + (field->id_offset * id), | |
1510 | mask, val << field->shift); | |
1511 | } | |
1512 | EXPORT_SYMBOL_GPL(regmap_fields_update_bits); | |
1513 | ||
8eaeb219 LD |
1514 | /* |
1515 | * regmap_bulk_write(): Write multiple registers to the device | |
1516 | * | |
1517 | * @map: Register map to write to | |
1518 | * @reg: First register to be write from | |
1519 | * @val: Block of data to be written, in native register size for device | |
1520 | * @val_count: Number of registers to write | |
1521 | * | |
1522 | * This function is intended to be used for writing a large block of | |
31b35e9e | 1523 | * data to the device either in single transfer or multiple transfer. |
8eaeb219 LD |
1524 | * |
1525 | * A value of zero will be returned on success, a negative errno will | |
1526 | * be returned in error cases. | |
1527 | */ | |
1528 | int regmap_bulk_write(struct regmap *map, unsigned int reg, const void *val, | |
1529 | size_t val_count) | |
1530 | { | |
1531 | int ret = 0, i; | |
1532 | size_t val_bytes = map->format.val_bytes; | |
8eaeb219 | 1533 | |
f4298360 | 1534 | if (map->bus && !map->format.parse_inplace) |
8eaeb219 | 1535 | return -EINVAL; |
f01ee60f SW |
1536 | if (reg % map->reg_stride) |
1537 | return -EINVAL; | |
8eaeb219 | 1538 | |
f4298360 SB |
1539 | /* |
1540 | * Some devices don't support bulk write, for | |
1541 | * them we have a series of single write operations. | |
1542 | */ | |
1543 | if (!map->bus || map->use_single_rw) { | |
4999e962 | 1544 | map->lock(map->lock_arg); |
f4298360 SB |
1545 | for (i = 0; i < val_count; i++) { |
1546 | unsigned int ival; | |
1547 | ||
1548 | switch (val_bytes) { | |
1549 | case 1: | |
1550 | ival = *(u8 *)(val + (i * val_bytes)); | |
1551 | break; | |
1552 | case 2: | |
1553 | ival = *(u16 *)(val + (i * val_bytes)); | |
1554 | break; | |
1555 | case 4: | |
1556 | ival = *(u32 *)(val + (i * val_bytes)); | |
1557 | break; | |
1558 | #ifdef CONFIG_64BIT | |
1559 | case 8: | |
1560 | ival = *(u64 *)(val + (i * val_bytes)); | |
1561 | break; | |
1562 | #endif | |
1563 | default: | |
1564 | ret = -EINVAL; | |
1565 | goto out; | |
1566 | } | |
8eaeb219 | 1567 | |
f4298360 SB |
1568 | ret = _regmap_write(map, reg + (i * map->reg_stride), |
1569 | ival); | |
1570 | if (ret != 0) | |
1571 | goto out; | |
1572 | } | |
4999e962 TI |
1573 | out: |
1574 | map->unlock(map->lock_arg); | |
8eaeb219 | 1575 | } else { |
f4298360 SB |
1576 | void *wval; |
1577 | ||
8eaeb219 LD |
1578 | wval = kmemdup(val, val_count * val_bytes, GFP_KERNEL); |
1579 | if (!wval) { | |
8eaeb219 | 1580 | dev_err(map->dev, "Error in memory allocation\n"); |
4999e962 | 1581 | return -ENOMEM; |
8eaeb219 LD |
1582 | } |
1583 | for (i = 0; i < val_count * val_bytes; i += val_bytes) | |
8a819ff8 | 1584 | map->format.parse_inplace(wval + i); |
f4298360 | 1585 | |
4999e962 | 1586 | map->lock(map->lock_arg); |
0a819809 | 1587 | ret = _regmap_raw_write(map, reg, wval, val_bytes * val_count); |
4999e962 | 1588 | map->unlock(map->lock_arg); |
8eaeb219 | 1589 | |
8eaeb219 | 1590 | kfree(wval); |
f4298360 | 1591 | } |
8eaeb219 LD |
1592 | return ret; |
1593 | } | |
1594 | EXPORT_SYMBOL_GPL(regmap_bulk_write); | |
1595 | ||
e894c3f4 OAO |
1596 | /* |
1597 | * _regmap_raw_multi_reg_write() | |
1598 | * | |
1599 | * the (register,newvalue) pairs in regs have not been formatted, but | |
1600 | * they are all in the same page and have been changed to being page | |
1601 | * relative. The page register has been written if that was neccessary. | |
1602 | */ | |
1603 | static int _regmap_raw_multi_reg_write(struct regmap *map, | |
1604 | const struct reg_default *regs, | |
1605 | size_t num_regs) | |
1606 | { | |
1607 | int ret; | |
1608 | void *buf; | |
1609 | int i; | |
1610 | u8 *u8; | |
1611 | size_t val_bytes = map->format.val_bytes; | |
1612 | size_t reg_bytes = map->format.reg_bytes; | |
1613 | size_t pad_bytes = map->format.pad_bytes; | |
1614 | size_t pair_size = reg_bytes + pad_bytes + val_bytes; | |
1615 | size_t len = pair_size * num_regs; | |
1616 | ||
1617 | buf = kzalloc(len, GFP_KERNEL); | |
1618 | if (!buf) | |
1619 | return -ENOMEM; | |
1620 | ||
1621 | /* We have to linearise by hand. */ | |
1622 | ||
1623 | u8 = buf; | |
1624 | ||
1625 | for (i = 0; i < num_regs; i++) { | |
1626 | int reg = regs[i].reg; | |
1627 | int val = regs[i].def; | |
1628 | trace_regmap_hw_write_start(map->dev, reg, 1); | |
1629 | map->format.format_reg(u8, reg, map->reg_shift); | |
1630 | u8 += reg_bytes + pad_bytes; | |
1631 | map->format.format_val(u8, val, 0); | |
1632 | u8 += val_bytes; | |
1633 | } | |
1634 | u8 = buf; | |
1635 | *u8 |= map->write_flag_mask; | |
1636 | ||
1637 | ret = map->bus->write(map->bus_context, buf, len); | |
1638 | ||
1639 | kfree(buf); | |
1640 | ||
1641 | for (i = 0; i < num_regs; i++) { | |
1642 | int reg = regs[i].reg; | |
1643 | trace_regmap_hw_write_done(map->dev, reg, 1); | |
1644 | } | |
1645 | return ret; | |
1646 | } | |
1647 | ||
1648 | static unsigned int _regmap_register_page(struct regmap *map, | |
1649 | unsigned int reg, | |
1650 | struct regmap_range_node *range) | |
1651 | { | |
1652 | unsigned int win_page = (reg - range->range_min) / range->window_len; | |
1653 | ||
1654 | return win_page; | |
1655 | } | |
1656 | ||
1657 | static int _regmap_range_multi_paged_reg_write(struct regmap *map, | |
1658 | struct reg_default *regs, | |
1659 | size_t num_regs) | |
1660 | { | |
1661 | int ret; | |
1662 | int i, n; | |
1663 | struct reg_default *base; | |
1664 | unsigned int this_page; | |
1665 | /* | |
1666 | * the set of registers are not neccessarily in order, but | |
1667 | * since the order of write must be preserved this algorithm | |
1668 | * chops the set each time the page changes | |
1669 | */ | |
1670 | base = regs; | |
1671 | for (i = 0, n = 0; i < num_regs; i++, n++) { | |
1672 | unsigned int reg = regs[i].reg; | |
1673 | struct regmap_range_node *range; | |
1674 | ||
1675 | range = _regmap_range_lookup(map, reg); | |
1676 | if (range) { | |
1677 | unsigned int win_page = _regmap_register_page(map, reg, | |
1678 | range); | |
1679 | ||
1680 | if (i == 0) | |
1681 | this_page = win_page; | |
1682 | if (win_page != this_page) { | |
1683 | this_page = win_page; | |
1684 | ret = _regmap_raw_multi_reg_write(map, base, n); | |
1685 | if (ret != 0) | |
1686 | return ret; | |
1687 | base += n; | |
1688 | n = 0; | |
1689 | } | |
1690 | ret = _regmap_select_page(map, &base[n].reg, range, 1); | |
1691 | if (ret != 0) | |
1692 | return ret; | |
1693 | } | |
1694 | } | |
1695 | if (n > 0) | |
1696 | return _regmap_raw_multi_reg_write(map, base, n); | |
1697 | return 0; | |
1698 | } | |
1699 | ||
1d5b40bc CK |
1700 | static int _regmap_multi_reg_write(struct regmap *map, |
1701 | const struct reg_default *regs, | |
e894c3f4 | 1702 | size_t num_regs) |
1d5b40bc | 1703 | { |
e894c3f4 OAO |
1704 | int i; |
1705 | int ret; | |
1706 | ||
1707 | if (!map->can_multi_write) { | |
1708 | for (i = 0; i < num_regs; i++) { | |
1709 | ret = _regmap_write(map, regs[i].reg, regs[i].def); | |
1710 | if (ret != 0) | |
1711 | return ret; | |
1712 | } | |
1713 | return 0; | |
1714 | } | |
1715 | ||
1716 | if (!map->format.parse_inplace) | |
1717 | return -EINVAL; | |
1718 | ||
1719 | if (map->writeable_reg) | |
1720 | for (i = 0; i < num_regs; i++) { | |
1721 | int reg = regs[i].reg; | |
1722 | if (!map->writeable_reg(map->dev, reg)) | |
1723 | return -EINVAL; | |
1724 | if (reg % map->reg_stride) | |
1725 | return -EINVAL; | |
1726 | } | |
1727 | ||
1728 | if (!map->cache_bypass) { | |
1729 | for (i = 0; i < num_regs; i++) { | |
1730 | unsigned int val = regs[i].def; | |
1731 | unsigned int reg = regs[i].reg; | |
1732 | ret = regcache_write(map, reg, val); | |
1733 | if (ret) { | |
1734 | dev_err(map->dev, | |
1735 | "Error in caching of register: %x ret: %d\n", | |
1736 | reg, ret); | |
1737 | return ret; | |
1738 | } | |
1739 | } | |
1740 | if (map->cache_only) { | |
1741 | map->cache_dirty = true; | |
1742 | return 0; | |
1743 | } | |
1744 | } | |
1745 | ||
1746 | WARN_ON(!map->bus); | |
1d5b40bc CK |
1747 | |
1748 | for (i = 0; i < num_regs; i++) { | |
e894c3f4 OAO |
1749 | unsigned int reg = regs[i].reg; |
1750 | struct regmap_range_node *range; | |
1751 | range = _regmap_range_lookup(map, reg); | |
1752 | if (range) { | |
1753 | size_t len = sizeof(struct reg_default)*num_regs; | |
1754 | struct reg_default *base = kmemdup(regs, len, | |
1755 | GFP_KERNEL); | |
1756 | if (!base) | |
1757 | return -ENOMEM; | |
1758 | ret = _regmap_range_multi_paged_reg_write(map, base, | |
1759 | num_regs); | |
1760 | kfree(base); | |
1761 | ||
1d5b40bc CK |
1762 | return ret; |
1763 | } | |
1764 | } | |
e894c3f4 | 1765 | return _regmap_raw_multi_reg_write(map, regs, num_regs); |
1d5b40bc CK |
1766 | } |
1767 | ||
e33fabd3 AO |
1768 | /* |
1769 | * regmap_multi_reg_write(): Write multiple registers to the device | |
1770 | * | |
e894c3f4 OAO |
1771 | * where the set of register,value pairs are supplied in any order, |
1772 | * possibly not all in a single range. | |
e33fabd3 AO |
1773 | * |
1774 | * @map: Register map to write to | |
1775 | * @regs: Array of structures containing register,value to be written | |
1776 | * @num_regs: Number of registers to write | |
1777 | * | |
e894c3f4 OAO |
1778 | * The 'normal' block write mode will send ultimately send data on the |
1779 | * target bus as R,V1,V2,V3,..,Vn where successively higer registers are | |
1780 | * addressed. However, this alternative block multi write mode will send | |
1781 | * the data as R1,V1,R2,V2,..,Rn,Vn on the target bus. The target device | |
1782 | * must of course support the mode. | |
e33fabd3 | 1783 | * |
e894c3f4 OAO |
1784 | * A value of zero will be returned on success, a negative errno will be |
1785 | * returned in error cases. | |
e33fabd3 | 1786 | */ |
f7e2cec0 CK |
1787 | int regmap_multi_reg_write(struct regmap *map, const struct reg_default *regs, |
1788 | int num_regs) | |
e33fabd3 | 1789 | { |
1d5b40bc | 1790 | int ret; |
e33fabd3 AO |
1791 | |
1792 | map->lock(map->lock_arg); | |
1793 | ||
1d5b40bc CK |
1794 | ret = _regmap_multi_reg_write(map, regs, num_regs); |
1795 | ||
e33fabd3 AO |
1796 | map->unlock(map->lock_arg); |
1797 | ||
1798 | return ret; | |
1799 | } | |
1800 | EXPORT_SYMBOL_GPL(regmap_multi_reg_write); | |
1801 | ||
1d5b40bc CK |
1802 | /* |
1803 | * regmap_multi_reg_write_bypassed(): Write multiple registers to the | |
1804 | * device but not the cache | |
1805 | * | |
e33fabd3 AO |
1806 | * where the set of register are supplied in any order |
1807 | * | |
1808 | * @map: Register map to write to | |
1809 | * @regs: Array of structures containing register,value to be written | |
1810 | * @num_regs: Number of registers to write | |
1811 | * | |
1812 | * This function is intended to be used for writing a large block of data | |
1813 | * atomically to the device in single transfer for those I2C client devices | |
1814 | * that implement this alternative block write mode. | |
1815 | * | |
1816 | * A value of zero will be returned on success, a negative errno will | |
1817 | * be returned in error cases. | |
1818 | */ | |
1d5b40bc CK |
1819 | int regmap_multi_reg_write_bypassed(struct regmap *map, |
1820 | const struct reg_default *regs, | |
1821 | int num_regs) | |
e33fabd3 | 1822 | { |
1d5b40bc CK |
1823 | int ret; |
1824 | bool bypass; | |
e33fabd3 AO |
1825 | |
1826 | map->lock(map->lock_arg); | |
1827 | ||
1d5b40bc CK |
1828 | bypass = map->cache_bypass; |
1829 | map->cache_bypass = true; | |
1830 | ||
1831 | ret = _regmap_multi_reg_write(map, regs, num_regs); | |
1832 | ||
1833 | map->cache_bypass = bypass; | |
1834 | ||
e33fabd3 AO |
1835 | map->unlock(map->lock_arg); |
1836 | ||
1837 | return ret; | |
1838 | } | |
1d5b40bc | 1839 | EXPORT_SYMBOL_GPL(regmap_multi_reg_write_bypassed); |
e33fabd3 | 1840 | |
0d509f2b MB |
1841 | /** |
1842 | * regmap_raw_write_async(): Write raw values to one or more registers | |
1843 | * asynchronously | |
1844 | * | |
1845 | * @map: Register map to write to | |
1846 | * @reg: Initial register to write to | |
1847 | * @val: Block of data to be written, laid out for direct transmission to the | |
1848 | * device. Must be valid until regmap_async_complete() is called. | |
1849 | * @val_len: Length of data pointed to by val. | |
1850 | * | |
1851 | * This function is intended to be used for things like firmware | |
1852 | * download where a large block of data needs to be transferred to the | |
1853 | * device. No formatting will be done on the data provided. | |
1854 | * | |
1855 | * If supported by the underlying bus the write will be scheduled | |
1856 | * asynchronously, helping maximise I/O speed on higher speed buses | |
1857 | * like SPI. regmap_async_complete() can be called to ensure that all | |
1858 | * asynchrnous writes have been completed. | |
1859 | * | |
1860 | * A value of zero will be returned on success, a negative errno will | |
1861 | * be returned in error cases. | |
1862 | */ | |
1863 | int regmap_raw_write_async(struct regmap *map, unsigned int reg, | |
1864 | const void *val, size_t val_len) | |
1865 | { | |
1866 | int ret; | |
1867 | ||
1868 | if (val_len % map->format.val_bytes) | |
1869 | return -EINVAL; | |
1870 | if (reg % map->reg_stride) | |
1871 | return -EINVAL; | |
1872 | ||
1873 | map->lock(map->lock_arg); | |
1874 | ||
0a819809 MB |
1875 | map->async = true; |
1876 | ||
1877 | ret = _regmap_raw_write(map, reg, val, val_len); | |
1878 | ||
1879 | map->async = false; | |
0d509f2b MB |
1880 | |
1881 | map->unlock(map->lock_arg); | |
1882 | ||
1883 | return ret; | |
1884 | } | |
1885 | EXPORT_SYMBOL_GPL(regmap_raw_write_async); | |
1886 | ||
b83a313b MB |
1887 | static int _regmap_raw_read(struct regmap *map, unsigned int reg, void *val, |
1888 | unsigned int val_len) | |
1889 | { | |
98bc7dfd | 1890 | struct regmap_range_node *range; |
b83a313b MB |
1891 | u8 *u8 = map->work_buf; |
1892 | int ret; | |
1893 | ||
f1b5c5c3 | 1894 | WARN_ON(!map->bus); |
d2a5884a | 1895 | |
98bc7dfd MB |
1896 | range = _regmap_range_lookup(map, reg); |
1897 | if (range) { | |
1898 | ret = _regmap_select_page(map, ®, range, | |
1899 | val_len / map->format.val_bytes); | |
0ff3e62f | 1900 | if (ret != 0) |
98bc7dfd MB |
1901 | return ret; |
1902 | } | |
6863ca62 | 1903 | |
d939fb9a | 1904 | map->format.format_reg(map->work_buf, reg, map->reg_shift); |
b83a313b MB |
1905 | |
1906 | /* | |
6f306441 | 1907 | * Some buses or devices flag reads by setting the high bits in the |
b83a313b MB |
1908 | * register addresss; since it's always the high bits for all |
1909 | * current formats we can do this here rather than in | |
1910 | * formatting. This may break if we get interesting formats. | |
1911 | */ | |
6f306441 | 1912 | u8[0] |= map->read_flag_mask; |
b83a313b | 1913 | |
fb2736bb MB |
1914 | trace_regmap_hw_read_start(map->dev, reg, |
1915 | val_len / map->format.val_bytes); | |
1916 | ||
0135bbcc | 1917 | ret = map->bus->read(map->bus_context, map->work_buf, |
82159ba8 | 1918 | map->format.reg_bytes + map->format.pad_bytes, |
40c5cc26 | 1919 | val, val_len); |
b83a313b | 1920 | |
fb2736bb MB |
1921 | trace_regmap_hw_read_done(map->dev, reg, |
1922 | val_len / map->format.val_bytes); | |
1923 | ||
1924 | return ret; | |
b83a313b MB |
1925 | } |
1926 | ||
ad278406 AS |
1927 | static int _regmap_bus_read(void *context, unsigned int reg, |
1928 | unsigned int *val) | |
1929 | { | |
1930 | int ret; | |
1931 | struct regmap *map = context; | |
1932 | ||
1933 | if (!map->format.parse_val) | |
1934 | return -EINVAL; | |
1935 | ||
1936 | ret = _regmap_raw_read(map, reg, map->work_buf, map->format.val_bytes); | |
1937 | if (ret == 0) | |
1938 | *val = map->format.parse_val(map->work_buf); | |
1939 | ||
1940 | return ret; | |
1941 | } | |
1942 | ||
b83a313b MB |
1943 | static int _regmap_read(struct regmap *map, unsigned int reg, |
1944 | unsigned int *val) | |
1945 | { | |
1946 | int ret; | |
d2a5884a AS |
1947 | void *context = _regmap_map_get_context(map); |
1948 | ||
f1b5c5c3 | 1949 | WARN_ON(!map->reg_read); |
b83a313b | 1950 | |
5d1729e7 DP |
1951 | if (!map->cache_bypass) { |
1952 | ret = regcache_read(map, reg, val); | |
1953 | if (ret == 0) | |
1954 | return 0; | |
1955 | } | |
1956 | ||
1957 | if (map->cache_only) | |
1958 | return -EBUSY; | |
1959 | ||
d4807ad2 MS |
1960 | if (!regmap_readable(map, reg)) |
1961 | return -EIO; | |
1962 | ||
d2a5884a | 1963 | ret = map->reg_read(context, reg, val); |
fb2736bb | 1964 | if (ret == 0) { |
1044c180 MB |
1965 | #ifdef LOG_DEVICE |
1966 | if (strcmp(dev_name(map->dev), LOG_DEVICE) == 0) | |
1967 | dev_info(map->dev, "%x => %x\n", reg, *val); | |
1968 | #endif | |
1969 | ||
fb2736bb | 1970 | trace_regmap_reg_read(map->dev, reg, *val); |
b83a313b | 1971 | |
ad278406 AS |
1972 | if (!map->cache_bypass) |
1973 | regcache_write(map, reg, *val); | |
1974 | } | |
f2985367 | 1975 | |
b83a313b MB |
1976 | return ret; |
1977 | } | |
1978 | ||
1979 | /** | |
1980 | * regmap_read(): Read a value from a single register | |
1981 | * | |
0093380c | 1982 | * @map: Register map to read from |
b83a313b MB |
1983 | * @reg: Register to be read from |
1984 | * @val: Pointer to store read value | |
1985 | * | |
1986 | * A value of zero will be returned on success, a negative errno will | |
1987 | * be returned in error cases. | |
1988 | */ | |
1989 | int regmap_read(struct regmap *map, unsigned int reg, unsigned int *val) | |
1990 | { | |
1991 | int ret; | |
1992 | ||
f01ee60f SW |
1993 | if (reg % map->reg_stride) |
1994 | return -EINVAL; | |
1995 | ||
0d4529c5 | 1996 | map->lock(map->lock_arg); |
b83a313b MB |
1997 | |
1998 | ret = _regmap_read(map, reg, val); | |
1999 | ||
0d4529c5 | 2000 | map->unlock(map->lock_arg); |
b83a313b MB |
2001 | |
2002 | return ret; | |
2003 | } | |
2004 | EXPORT_SYMBOL_GPL(regmap_read); | |
2005 | ||
2006 | /** | |
2007 | * regmap_raw_read(): Read raw data from the device | |
2008 | * | |
0093380c | 2009 | * @map: Register map to read from |
b83a313b MB |
2010 | * @reg: First register to be read from |
2011 | * @val: Pointer to store read value | |
2012 | * @val_len: Size of data to read | |
2013 | * | |
2014 | * A value of zero will be returned on success, a negative errno will | |
2015 | * be returned in error cases. | |
2016 | */ | |
2017 | int regmap_raw_read(struct regmap *map, unsigned int reg, void *val, | |
2018 | size_t val_len) | |
2019 | { | |
b8fb5ab1 MB |
2020 | size_t val_bytes = map->format.val_bytes; |
2021 | size_t val_count = val_len / val_bytes; | |
2022 | unsigned int v; | |
2023 | int ret, i; | |
04e016ad | 2024 | |
d2a5884a AS |
2025 | if (!map->bus) |
2026 | return -EINVAL; | |
851960ba SW |
2027 | if (val_len % map->format.val_bytes) |
2028 | return -EINVAL; | |
f01ee60f SW |
2029 | if (reg % map->reg_stride) |
2030 | return -EINVAL; | |
851960ba | 2031 | |
0d4529c5 | 2032 | map->lock(map->lock_arg); |
b83a313b | 2033 | |
b8fb5ab1 MB |
2034 | if (regmap_volatile_range(map, reg, val_count) || map->cache_bypass || |
2035 | map->cache_type == REGCACHE_NONE) { | |
2036 | /* Physical block read if there's no cache involved */ | |
2037 | ret = _regmap_raw_read(map, reg, val, val_len); | |
2038 | ||
2039 | } else { | |
2040 | /* Otherwise go word by word for the cache; should be low | |
2041 | * cost as we expect to hit the cache. | |
2042 | */ | |
2043 | for (i = 0; i < val_count; i++) { | |
f01ee60f SW |
2044 | ret = _regmap_read(map, reg + (i * map->reg_stride), |
2045 | &v); | |
b8fb5ab1 MB |
2046 | if (ret != 0) |
2047 | goto out; | |
2048 | ||
d939fb9a | 2049 | map->format.format_val(val + (i * val_bytes), v, 0); |
b8fb5ab1 MB |
2050 | } |
2051 | } | |
b83a313b | 2052 | |
b8fb5ab1 | 2053 | out: |
0d4529c5 | 2054 | map->unlock(map->lock_arg); |
b83a313b MB |
2055 | |
2056 | return ret; | |
2057 | } | |
2058 | EXPORT_SYMBOL_GPL(regmap_raw_read); | |
2059 | ||
67252287 SK |
2060 | /** |
2061 | * regmap_field_read(): Read a value to a single register field | |
2062 | * | |
2063 | * @field: Register field to read from | |
2064 | * @val: Pointer to store read value | |
2065 | * | |
2066 | * A value of zero will be returned on success, a negative errno will | |
2067 | * be returned in error cases. | |
2068 | */ | |
2069 | int regmap_field_read(struct regmap_field *field, unsigned int *val) | |
2070 | { | |
2071 | int ret; | |
2072 | unsigned int reg_val; | |
2073 | ret = regmap_read(field->regmap, field->reg, ®_val); | |
2074 | if (ret != 0) | |
2075 | return ret; | |
2076 | ||
2077 | reg_val &= field->mask; | |
2078 | reg_val >>= field->shift; | |
2079 | *val = reg_val; | |
2080 | ||
2081 | return ret; | |
2082 | } | |
2083 | EXPORT_SYMBOL_GPL(regmap_field_read); | |
2084 | ||
a0102375 KM |
2085 | /** |
2086 | * regmap_fields_read(): Read a value to a single register field with port ID | |
2087 | * | |
2088 | * @field: Register field to read from | |
2089 | * @id: port ID | |
2090 | * @val: Pointer to store read value | |
2091 | * | |
2092 | * A value of zero will be returned on success, a negative errno will | |
2093 | * be returned in error cases. | |
2094 | */ | |
2095 | int regmap_fields_read(struct regmap_field *field, unsigned int id, | |
2096 | unsigned int *val) | |
2097 | { | |
2098 | int ret; | |
2099 | unsigned int reg_val; | |
2100 | ||
2101 | if (id >= field->id_size) | |
2102 | return -EINVAL; | |
2103 | ||
2104 | ret = regmap_read(field->regmap, | |
2105 | field->reg + (field->id_offset * id), | |
2106 | ®_val); | |
2107 | if (ret != 0) | |
2108 | return ret; | |
2109 | ||
2110 | reg_val &= field->mask; | |
2111 | reg_val >>= field->shift; | |
2112 | *val = reg_val; | |
2113 | ||
2114 | return ret; | |
2115 | } | |
2116 | EXPORT_SYMBOL_GPL(regmap_fields_read); | |
2117 | ||
b83a313b MB |
2118 | /** |
2119 | * regmap_bulk_read(): Read multiple registers from the device | |
2120 | * | |
0093380c | 2121 | * @map: Register map to read from |
b83a313b MB |
2122 | * @reg: First register to be read from |
2123 | * @val: Pointer to store read value, in native register size for device | |
2124 | * @val_count: Number of registers to read | |
2125 | * | |
2126 | * A value of zero will be returned on success, a negative errno will | |
2127 | * be returned in error cases. | |
2128 | */ | |
2129 | int regmap_bulk_read(struct regmap *map, unsigned int reg, void *val, | |
2130 | size_t val_count) | |
2131 | { | |
2132 | int ret, i; | |
2133 | size_t val_bytes = map->format.val_bytes; | |
82cd9965 | 2134 | bool vol = regmap_volatile_range(map, reg, val_count); |
5d1729e7 | 2135 | |
f01ee60f SW |
2136 | if (reg % map->reg_stride) |
2137 | return -EINVAL; | |
b83a313b | 2138 | |
3b58ee13 | 2139 | if (map->bus && map->format.parse_inplace && (vol || map->cache_type == REGCACHE_NONE)) { |
2e33caf1 AJ |
2140 | /* |
2141 | * Some devices does not support bulk read, for | |
2142 | * them we have a series of single read operations. | |
2143 | */ | |
2144 | if (map->use_single_rw) { | |
2145 | for (i = 0; i < val_count; i++) { | |
2146 | ret = regmap_raw_read(map, | |
2147 | reg + (i * map->reg_stride), | |
2148 | val + (i * val_bytes), | |
2149 | val_bytes); | |
2150 | if (ret != 0) | |
2151 | return ret; | |
2152 | } | |
2153 | } else { | |
2154 | ret = regmap_raw_read(map, reg, val, | |
2155 | val_bytes * val_count); | |
2156 | if (ret != 0) | |
2157 | return ret; | |
2158 | } | |
de2d808f MB |
2159 | |
2160 | for (i = 0; i < val_count * val_bytes; i += val_bytes) | |
8a819ff8 | 2161 | map->format.parse_inplace(val + i); |
de2d808f MB |
2162 | } else { |
2163 | for (i = 0; i < val_count; i++) { | |
6560ffd1 | 2164 | unsigned int ival; |
f01ee60f | 2165 | ret = regmap_read(map, reg + (i * map->reg_stride), |
25061d28 | 2166 | &ival); |
de2d808f MB |
2167 | if (ret != 0) |
2168 | return ret; | |
6560ffd1 | 2169 | memcpy(val + (i * val_bytes), &ival, val_bytes); |
de2d808f MB |
2170 | } |
2171 | } | |
b83a313b MB |
2172 | |
2173 | return 0; | |
2174 | } | |
2175 | EXPORT_SYMBOL_GPL(regmap_bulk_read); | |
2176 | ||
018690d3 MB |
2177 | static int _regmap_update_bits(struct regmap *map, unsigned int reg, |
2178 | unsigned int mask, unsigned int val, | |
2179 | bool *change) | |
b83a313b MB |
2180 | { |
2181 | int ret; | |
d91e8db2 | 2182 | unsigned int tmp, orig; |
b83a313b | 2183 | |
d91e8db2 | 2184 | ret = _regmap_read(map, reg, &orig); |
b83a313b | 2185 | if (ret != 0) |
fc3ebd78 | 2186 | return ret; |
b83a313b | 2187 | |
d91e8db2 | 2188 | tmp = orig & ~mask; |
b83a313b MB |
2189 | tmp |= val & mask; |
2190 | ||
018690d3 | 2191 | if (tmp != orig) { |
d91e8db2 | 2192 | ret = _regmap_write(map, reg, tmp); |
e2f74dc6 XL |
2193 | if (change) |
2194 | *change = true; | |
018690d3 | 2195 | } else { |
e2f74dc6 XL |
2196 | if (change) |
2197 | *change = false; | |
018690d3 | 2198 | } |
b83a313b | 2199 | |
b83a313b MB |
2200 | return ret; |
2201 | } | |
018690d3 MB |
2202 | |
2203 | /** | |
2204 | * regmap_update_bits: Perform a read/modify/write cycle on the register map | |
2205 | * | |
2206 | * @map: Register map to update | |
2207 | * @reg: Register to update | |
2208 | * @mask: Bitmask to change | |
2209 | * @val: New value for bitmask | |
2210 | * | |
2211 | * Returns zero for success, a negative number on error. | |
2212 | */ | |
2213 | int regmap_update_bits(struct regmap *map, unsigned int reg, | |
2214 | unsigned int mask, unsigned int val) | |
2215 | { | |
fc3ebd78 KG |
2216 | int ret; |
2217 | ||
0d4529c5 | 2218 | map->lock(map->lock_arg); |
e2f74dc6 | 2219 | ret = _regmap_update_bits(map, reg, mask, val, NULL); |
0d4529c5 | 2220 | map->unlock(map->lock_arg); |
fc3ebd78 KG |
2221 | |
2222 | return ret; | |
018690d3 | 2223 | } |
b83a313b | 2224 | EXPORT_SYMBOL_GPL(regmap_update_bits); |
31244e39 | 2225 | |
915f441b MB |
2226 | /** |
2227 | * regmap_update_bits_async: Perform a read/modify/write cycle on the register | |
2228 | * map asynchronously | |
2229 | * | |
2230 | * @map: Register map to update | |
2231 | * @reg: Register to update | |
2232 | * @mask: Bitmask to change | |
2233 | * @val: New value for bitmask | |
2234 | * | |
2235 | * With most buses the read must be done synchronously so this is most | |
2236 | * useful for devices with a cache which do not need to interact with | |
2237 | * the hardware to determine the current register value. | |
2238 | * | |
2239 | * Returns zero for success, a negative number on error. | |
2240 | */ | |
2241 | int regmap_update_bits_async(struct regmap *map, unsigned int reg, | |
2242 | unsigned int mask, unsigned int val) | |
2243 | { | |
915f441b MB |
2244 | int ret; |
2245 | ||
2246 | map->lock(map->lock_arg); | |
2247 | ||
2248 | map->async = true; | |
2249 | ||
e2f74dc6 | 2250 | ret = _regmap_update_bits(map, reg, mask, val, NULL); |
915f441b MB |
2251 | |
2252 | map->async = false; | |
2253 | ||
2254 | map->unlock(map->lock_arg); | |
2255 | ||
2256 | return ret; | |
2257 | } | |
2258 | EXPORT_SYMBOL_GPL(regmap_update_bits_async); | |
2259 | ||
018690d3 MB |
2260 | /** |
2261 | * regmap_update_bits_check: Perform a read/modify/write cycle on the | |
2262 | * register map and report if updated | |
2263 | * | |
2264 | * @map: Register map to update | |
2265 | * @reg: Register to update | |
2266 | * @mask: Bitmask to change | |
2267 | * @val: New value for bitmask | |
2268 | * @change: Boolean indicating if a write was done | |
2269 | * | |
2270 | * Returns zero for success, a negative number on error. | |
2271 | */ | |
2272 | int regmap_update_bits_check(struct regmap *map, unsigned int reg, | |
2273 | unsigned int mask, unsigned int val, | |
2274 | bool *change) | |
2275 | { | |
fc3ebd78 KG |
2276 | int ret; |
2277 | ||
0d4529c5 | 2278 | map->lock(map->lock_arg); |
fc3ebd78 | 2279 | ret = _regmap_update_bits(map, reg, mask, val, change); |
0d4529c5 | 2280 | map->unlock(map->lock_arg); |
fc3ebd78 | 2281 | return ret; |
018690d3 MB |
2282 | } |
2283 | EXPORT_SYMBOL_GPL(regmap_update_bits_check); | |
2284 | ||
915f441b MB |
2285 | /** |
2286 | * regmap_update_bits_check_async: Perform a read/modify/write cycle on the | |
2287 | * register map asynchronously and report if | |
2288 | * updated | |
2289 | * | |
2290 | * @map: Register map to update | |
2291 | * @reg: Register to update | |
2292 | * @mask: Bitmask to change | |
2293 | * @val: New value for bitmask | |
2294 | * @change: Boolean indicating if a write was done | |
2295 | * | |
2296 | * With most buses the read must be done synchronously so this is most | |
2297 | * useful for devices with a cache which do not need to interact with | |
2298 | * the hardware to determine the current register value. | |
2299 | * | |
2300 | * Returns zero for success, a negative number on error. | |
2301 | */ | |
2302 | int regmap_update_bits_check_async(struct regmap *map, unsigned int reg, | |
2303 | unsigned int mask, unsigned int val, | |
2304 | bool *change) | |
2305 | { | |
2306 | int ret; | |
2307 | ||
2308 | map->lock(map->lock_arg); | |
2309 | ||
2310 | map->async = true; | |
2311 | ||
2312 | ret = _regmap_update_bits(map, reg, mask, val, change); | |
2313 | ||
2314 | map->async = false; | |
2315 | ||
2316 | map->unlock(map->lock_arg); | |
2317 | ||
2318 | return ret; | |
2319 | } | |
2320 | EXPORT_SYMBOL_GPL(regmap_update_bits_check_async); | |
2321 | ||
0d509f2b MB |
2322 | void regmap_async_complete_cb(struct regmap_async *async, int ret) |
2323 | { | |
2324 | struct regmap *map = async->map; | |
2325 | bool wake; | |
2326 | ||
fe7d4ccd MB |
2327 | trace_regmap_async_io_complete(map->dev); |
2328 | ||
0d509f2b | 2329 | spin_lock(&map->async_lock); |
7e09a979 | 2330 | list_move(&async->list, &map->async_free); |
0d509f2b MB |
2331 | wake = list_empty(&map->async_list); |
2332 | ||
2333 | if (ret != 0) | |
2334 | map->async_ret = ret; | |
2335 | ||
2336 | spin_unlock(&map->async_lock); | |
2337 | ||
0d509f2b MB |
2338 | if (wake) |
2339 | wake_up(&map->async_waitq); | |
2340 | } | |
f804fb56 | 2341 | EXPORT_SYMBOL_GPL(regmap_async_complete_cb); |
0d509f2b MB |
2342 | |
2343 | static int regmap_async_is_done(struct regmap *map) | |
2344 | { | |
2345 | unsigned long flags; | |
2346 | int ret; | |
2347 | ||
2348 | spin_lock_irqsave(&map->async_lock, flags); | |
2349 | ret = list_empty(&map->async_list); | |
2350 | spin_unlock_irqrestore(&map->async_lock, flags); | |
2351 | ||
2352 | return ret; | |
2353 | } | |
2354 | ||
2355 | /** | |
2356 | * regmap_async_complete: Ensure all asynchronous I/O has completed. | |
2357 | * | |
2358 | * @map: Map to operate on. | |
2359 | * | |
2360 | * Blocks until any pending asynchronous I/O has completed. Returns | |
2361 | * an error code for any failed I/O operations. | |
2362 | */ | |
2363 | int regmap_async_complete(struct regmap *map) | |
2364 | { | |
2365 | unsigned long flags; | |
2366 | int ret; | |
2367 | ||
2368 | /* Nothing to do with no async support */ | |
f2e055e7 | 2369 | if (!map->bus || !map->bus->async_write) |
0d509f2b MB |
2370 | return 0; |
2371 | ||
fe7d4ccd MB |
2372 | trace_regmap_async_complete_start(map->dev); |
2373 | ||
0d509f2b MB |
2374 | wait_event(map->async_waitq, regmap_async_is_done(map)); |
2375 | ||
2376 | spin_lock_irqsave(&map->async_lock, flags); | |
2377 | ret = map->async_ret; | |
2378 | map->async_ret = 0; | |
2379 | spin_unlock_irqrestore(&map->async_lock, flags); | |
2380 | ||
fe7d4ccd MB |
2381 | trace_regmap_async_complete_done(map->dev); |
2382 | ||
0d509f2b MB |
2383 | return ret; |
2384 | } | |
f88948ef | 2385 | EXPORT_SYMBOL_GPL(regmap_async_complete); |
0d509f2b | 2386 | |
22f0d90a MB |
2387 | /** |
2388 | * regmap_register_patch: Register and apply register updates to be applied | |
2389 | * on device initialistion | |
2390 | * | |
2391 | * @map: Register map to apply updates to. | |
2392 | * @regs: Values to update. | |
2393 | * @num_regs: Number of entries in regs. | |
2394 | * | |
2395 | * Register a set of register updates to be applied to the device | |
2396 | * whenever the device registers are synchronised with the cache and | |
2397 | * apply them immediately. Typically this is used to apply | |
2398 | * corrections to be applied to the device defaults on startup, such | |
2399 | * as the updates some vendors provide to undocumented registers. | |
56fb1c74 MB |
2400 | * |
2401 | * The caller must ensure that this function cannot be called | |
2402 | * concurrently with either itself or regcache_sync(). | |
22f0d90a MB |
2403 | */ |
2404 | int regmap_register_patch(struct regmap *map, const struct reg_default *regs, | |
2405 | int num_regs) | |
2406 | { | |
aab13ebc | 2407 | struct reg_default *p; |
6bf13103 | 2408 | int ret; |
22f0d90a MB |
2409 | bool bypass; |
2410 | ||
bd60e381 CZ |
2411 | if (WARN_ONCE(num_regs <= 0, "invalid registers number (%d)\n", |
2412 | num_regs)) | |
2413 | return 0; | |
2414 | ||
aab13ebc MB |
2415 | p = krealloc(map->patch, |
2416 | sizeof(struct reg_default) * (map->patch_regs + num_regs), | |
2417 | GFP_KERNEL); | |
2418 | if (p) { | |
2419 | memcpy(p + map->patch_regs, regs, num_regs * sizeof(*regs)); | |
2420 | map->patch = p; | |
2421 | map->patch_regs += num_regs; | |
22f0d90a | 2422 | } else { |
56fb1c74 | 2423 | return -ENOMEM; |
22f0d90a MB |
2424 | } |
2425 | ||
0d4529c5 | 2426 | map->lock(map->lock_arg); |
22f0d90a MB |
2427 | |
2428 | bypass = map->cache_bypass; | |
2429 | ||
2430 | map->cache_bypass = true; | |
1a25f261 | 2431 | map->async = true; |
22f0d90a | 2432 | |
6bf13103 CK |
2433 | ret = _regmap_multi_reg_write(map, regs, num_regs); |
2434 | if (ret != 0) | |
2435 | goto out; | |
22f0d90a | 2436 | |
22f0d90a | 2437 | out: |
1a25f261 | 2438 | map->async = false; |
22f0d90a MB |
2439 | map->cache_bypass = bypass; |
2440 | ||
0d4529c5 | 2441 | map->unlock(map->lock_arg); |
22f0d90a | 2442 | |
1a25f261 MB |
2443 | regmap_async_complete(map); |
2444 | ||
22f0d90a MB |
2445 | return ret; |
2446 | } | |
2447 | EXPORT_SYMBOL_GPL(regmap_register_patch); | |
2448 | ||
eae4b51b | 2449 | /* |
a6539c32 MB |
2450 | * regmap_get_val_bytes(): Report the size of a register value |
2451 | * | |
2452 | * Report the size of a register value, mainly intended to for use by | |
2453 | * generic infrastructure built on top of regmap. | |
2454 | */ | |
2455 | int regmap_get_val_bytes(struct regmap *map) | |
2456 | { | |
2457 | if (map->format.format_write) | |
2458 | return -EINVAL; | |
2459 | ||
2460 | return map->format.val_bytes; | |
2461 | } | |
2462 | EXPORT_SYMBOL_GPL(regmap_get_val_bytes); | |
2463 | ||
13ff50c8 NC |
2464 | int regmap_parse_val(struct regmap *map, const void *buf, |
2465 | unsigned int *val) | |
2466 | { | |
2467 | if (!map->format.parse_val) | |
2468 | return -EINVAL; | |
2469 | ||
2470 | *val = map->format.parse_val(buf); | |
2471 | ||
2472 | return 0; | |
2473 | } | |
2474 | EXPORT_SYMBOL_GPL(regmap_parse_val); | |
2475 | ||
31244e39 MB |
2476 | static int __init regmap_initcall(void) |
2477 | { | |
2478 | regmap_debugfs_initcall(); | |
2479 | ||
2480 | return 0; | |
2481 | } | |
2482 | postcore_initcall(regmap_initcall); |