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regmap: cache: Provide a get address of value operation
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CommitLineData
b83a313b
MB
1/*
2 * Register map access API
3 *
4 * Copyright 2011 Wolfson Microelectronics plc
5 *
6 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
f5d6eba7 13#include <linux/device.h>
b83a313b 14#include <linux/slab.h>
19694b5e 15#include <linux/export.h>
b83a313b
MB
16#include <linux/mutex.h>
17#include <linux/err.h>
6863ca62 18#include <linux/rbtree.h>
30b2a553 19#include <linux/sched.h>
b83a313b 20
fb2736bb
MB
21#define CREATE_TRACE_POINTS
22#include <trace/events/regmap.h>
23
93de9124 24#include "internal.h"
b83a313b 25
1044c180
MB
26/*
27 * Sometimes for failures during very early init the trace
28 * infrastructure isn't available early enough to be used. For this
29 * sort of problem defining LOG_DEVICE will add printks for basic
30 * register I/O on a specific device.
31 */
32#undef LOG_DEVICE
33
34static int _regmap_update_bits(struct regmap *map, unsigned int reg,
35 unsigned int mask, unsigned int val,
36 bool *change);
37
ad278406
AS
38static int _regmap_bus_read(void *context, unsigned int reg,
39 unsigned int *val);
07c320dc
AS
40static int _regmap_bus_formatted_write(void *context, unsigned int reg,
41 unsigned int val);
42static int _regmap_bus_raw_write(void *context, unsigned int reg,
43 unsigned int val);
ad278406 44
0d509f2b
MB
45static void async_cleanup(struct work_struct *work)
46{
47 struct regmap_async *async = container_of(work, struct regmap_async,
48 cleanup);
49
50 kfree(async->work_buf);
51 kfree(async);
52}
53
76aad392
DC
54bool regmap_reg_in_ranges(unsigned int reg,
55 const struct regmap_range *ranges,
56 unsigned int nranges)
57{
58 const struct regmap_range *r;
59 int i;
60
61 for (i = 0, r = ranges; i < nranges; i++, r++)
62 if (regmap_reg_in_range(reg, r))
63 return true;
64 return false;
65}
66EXPORT_SYMBOL_GPL(regmap_reg_in_ranges);
67
68static bool _regmap_check_range_table(struct regmap *map,
69 unsigned int reg,
70 const struct regmap_access_table *table)
71{
72 /* Check "no ranges" first */
73 if (regmap_reg_in_ranges(reg, table->no_ranges, table->n_no_ranges))
74 return false;
75
76 /* In case zero "yes ranges" are supplied, any reg is OK */
77 if (!table->n_yes_ranges)
78 return true;
79
80 return regmap_reg_in_ranges(reg, table->yes_ranges,
81 table->n_yes_ranges);
82}
83
8de2f081
MB
84bool regmap_writeable(struct regmap *map, unsigned int reg)
85{
86 if (map->max_register && reg > map->max_register)
87 return false;
88
89 if (map->writeable_reg)
90 return map->writeable_reg(map->dev, reg);
91
76aad392
DC
92 if (map->wr_table)
93 return _regmap_check_range_table(map, reg, map->wr_table);
94
8de2f081
MB
95 return true;
96}
97
98bool regmap_readable(struct regmap *map, unsigned int reg)
99{
100 if (map->max_register && reg > map->max_register)
101 return false;
102
4191f197
WS
103 if (map->format.format_write)
104 return false;
105
8de2f081
MB
106 if (map->readable_reg)
107 return map->readable_reg(map->dev, reg);
108
76aad392
DC
109 if (map->rd_table)
110 return _regmap_check_range_table(map, reg, map->rd_table);
111
8de2f081
MB
112 return true;
113}
114
115bool regmap_volatile(struct regmap *map, unsigned int reg)
116{
4191f197 117 if (!regmap_readable(map, reg))
8de2f081
MB
118 return false;
119
120 if (map->volatile_reg)
121 return map->volatile_reg(map->dev, reg);
122
76aad392
DC
123 if (map->volatile_table)
124 return _regmap_check_range_table(map, reg, map->volatile_table);
125
8de2f081
MB
126 return true;
127}
128
129bool regmap_precious(struct regmap *map, unsigned int reg)
130{
4191f197 131 if (!regmap_readable(map, reg))
8de2f081
MB
132 return false;
133
134 if (map->precious_reg)
135 return map->precious_reg(map->dev, reg);
136
76aad392
DC
137 if (map->precious_table)
138 return _regmap_check_range_table(map, reg, map->precious_table);
139
8de2f081
MB
140 return false;
141}
142
82cd9965 143static bool regmap_volatile_range(struct regmap *map, unsigned int reg,
a8f28cfa 144 size_t num)
82cd9965
LPC
145{
146 unsigned int i;
147
148 for (i = 0; i < num; i++)
149 if (!regmap_volatile(map, reg + i))
150 return false;
151
152 return true;
153}
154
9aa50750
WS
155static void regmap_format_2_6_write(struct regmap *map,
156 unsigned int reg, unsigned int val)
157{
158 u8 *out = map->work_buf;
159
160 *out = (reg << 6) | val;
161}
162
b83a313b
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163static void regmap_format_4_12_write(struct regmap *map,
164 unsigned int reg, unsigned int val)
165{
166 __be16 *out = map->work_buf;
167 *out = cpu_to_be16((reg << 12) | val);
168}
169
170static void regmap_format_7_9_write(struct regmap *map,
171 unsigned int reg, unsigned int val)
172{
173 __be16 *out = map->work_buf;
174 *out = cpu_to_be16((reg << 9) | val);
175}
176
7e5ec63e
LPC
177static void regmap_format_10_14_write(struct regmap *map,
178 unsigned int reg, unsigned int val)
179{
180 u8 *out = map->work_buf;
181
182 out[2] = val;
183 out[1] = (val >> 8) | (reg << 6);
184 out[0] = reg >> 2;
185}
186
d939fb9a 187static void regmap_format_8(void *buf, unsigned int val, unsigned int shift)
b83a313b
MB
188{
189 u8 *b = buf;
190
d939fb9a 191 b[0] = val << shift;
b83a313b
MB
192}
193
141eba2e 194static void regmap_format_16_be(void *buf, unsigned int val, unsigned int shift)
b83a313b
MB
195{
196 __be16 *b = buf;
197
d939fb9a 198 b[0] = cpu_to_be16(val << shift);
b83a313b
MB
199}
200
141eba2e
SW
201static void regmap_format_16_native(void *buf, unsigned int val,
202 unsigned int shift)
203{
204 *(u16 *)buf = val << shift;
205}
206
d939fb9a 207static void regmap_format_24(void *buf, unsigned int val, unsigned int shift)
ea279fc5
MR
208{
209 u8 *b = buf;
210
d939fb9a
MR
211 val <<= shift;
212
ea279fc5
MR
213 b[0] = val >> 16;
214 b[1] = val >> 8;
215 b[2] = val;
216}
217
141eba2e 218static void regmap_format_32_be(void *buf, unsigned int val, unsigned int shift)
7d5e525b
MB
219{
220 __be32 *b = buf;
221
d939fb9a 222 b[0] = cpu_to_be32(val << shift);
7d5e525b
MB
223}
224
141eba2e
SW
225static void regmap_format_32_native(void *buf, unsigned int val,
226 unsigned int shift)
227{
228 *(u32 *)buf = val << shift;
229}
230
8a819ff8 231static void regmap_parse_inplace_noop(void *buf)
b83a313b 232{
8a819ff8
MB
233}
234
235static unsigned int regmap_parse_8(const void *buf)
236{
237 const u8 *b = buf;
b83a313b
MB
238
239 return b[0];
240}
241
8a819ff8
MB
242static unsigned int regmap_parse_16_be(const void *buf)
243{
244 const __be16 *b = buf;
245
246 return be16_to_cpu(b[0]);
247}
248
249static void regmap_parse_16_be_inplace(void *buf)
b83a313b
MB
250{
251 __be16 *b = buf;
252
253 b[0] = be16_to_cpu(b[0]);
b83a313b
MB
254}
255
8a819ff8 256static unsigned int regmap_parse_16_native(const void *buf)
141eba2e
SW
257{
258 return *(u16 *)buf;
259}
260
8a819ff8 261static unsigned int regmap_parse_24(const void *buf)
ea279fc5 262{
8a819ff8 263 const u8 *b = buf;
ea279fc5
MR
264 unsigned int ret = b[2];
265 ret |= ((unsigned int)b[1]) << 8;
266 ret |= ((unsigned int)b[0]) << 16;
267
268 return ret;
269}
270
8a819ff8
MB
271static unsigned int regmap_parse_32_be(const void *buf)
272{
273 const __be32 *b = buf;
274
275 return be32_to_cpu(b[0]);
276}
277
278static void regmap_parse_32_be_inplace(void *buf)
7d5e525b
MB
279{
280 __be32 *b = buf;
281
282 b[0] = be32_to_cpu(b[0]);
7d5e525b
MB
283}
284
8a819ff8 285static unsigned int regmap_parse_32_native(const void *buf)
141eba2e
SW
286{
287 return *(u32 *)buf;
288}
289
0d4529c5 290static void regmap_lock_mutex(void *__map)
bacdbe07 291{
0d4529c5 292 struct regmap *map = __map;
bacdbe07
SW
293 mutex_lock(&map->mutex);
294}
295
0d4529c5 296static void regmap_unlock_mutex(void *__map)
bacdbe07 297{
0d4529c5 298 struct regmap *map = __map;
bacdbe07
SW
299 mutex_unlock(&map->mutex);
300}
301
0d4529c5 302static void regmap_lock_spinlock(void *__map)
bacdbe07 303{
0d4529c5 304 struct regmap *map = __map;
bacdbe07
SW
305 spin_lock(&map->spinlock);
306}
307
0d4529c5 308static void regmap_unlock_spinlock(void *__map)
bacdbe07 309{
0d4529c5 310 struct regmap *map = __map;
bacdbe07
SW
311 spin_unlock(&map->spinlock);
312}
313
72b39f6f
MB
314static void dev_get_regmap_release(struct device *dev, void *res)
315{
316 /*
317 * We don't actually have anything to do here; the goal here
318 * is not to manage the regmap but to provide a simple way to
319 * get the regmap back given a struct device.
320 */
321}
322
6863ca62
KG
323static bool _regmap_range_add(struct regmap *map,
324 struct regmap_range_node *data)
325{
326 struct rb_root *root = &map->range_tree;
327 struct rb_node **new = &(root->rb_node), *parent = NULL;
328
329 while (*new) {
330 struct regmap_range_node *this =
331 container_of(*new, struct regmap_range_node, node);
332
333 parent = *new;
334 if (data->range_max < this->range_min)
335 new = &((*new)->rb_left);
336 else if (data->range_min > this->range_max)
337 new = &((*new)->rb_right);
338 else
339 return false;
340 }
341
342 rb_link_node(&data->node, parent, new);
343 rb_insert_color(&data->node, root);
344
345 return true;
346}
347
348static struct regmap_range_node *_regmap_range_lookup(struct regmap *map,
349 unsigned int reg)
350{
351 struct rb_node *node = map->range_tree.rb_node;
352
353 while (node) {
354 struct regmap_range_node *this =
355 container_of(node, struct regmap_range_node, node);
356
357 if (reg < this->range_min)
358 node = node->rb_left;
359 else if (reg > this->range_max)
360 node = node->rb_right;
361 else
362 return this;
363 }
364
365 return NULL;
366}
367
368static void regmap_range_exit(struct regmap *map)
369{
370 struct rb_node *next;
371 struct regmap_range_node *range_node;
372
373 next = rb_first(&map->range_tree);
374 while (next) {
375 range_node = rb_entry(next, struct regmap_range_node, node);
376 next = rb_next(&range_node->node);
377 rb_erase(&range_node->node, &map->range_tree);
378 kfree(range_node);
379 }
380
381 kfree(map->selector_work_buf);
382}
383
b83a313b
MB
384/**
385 * regmap_init(): Initialise register map
386 *
387 * @dev: Device that will be interacted with
388 * @bus: Bus-specific callbacks to use with device
0135bbcc 389 * @bus_context: Data passed to bus-specific callbacks
b83a313b
MB
390 * @config: Configuration for register map
391 *
392 * The return value will be an ERR_PTR() on error or a valid pointer to
393 * a struct regmap. This function should generally not be called
394 * directly, it should be called by bus-specific init functions.
395 */
396struct regmap *regmap_init(struct device *dev,
397 const struct regmap_bus *bus,
0135bbcc 398 void *bus_context,
b83a313b
MB
399 const struct regmap_config *config)
400{
72b39f6f 401 struct regmap *map, **m;
b83a313b 402 int ret = -EINVAL;
141eba2e 403 enum regmap_endian reg_endian, val_endian;
6863ca62 404 int i, j;
b83a313b 405
d2a5884a 406 if (!config)
abbb18fb 407 goto err;
b83a313b
MB
408
409 map = kzalloc(sizeof(*map), GFP_KERNEL);
410 if (map == NULL) {
411 ret = -ENOMEM;
412 goto err;
413 }
414
0d4529c5
DC
415 if (config->lock && config->unlock) {
416 map->lock = config->lock;
417 map->unlock = config->unlock;
418 map->lock_arg = config->lock_arg;
bacdbe07 419 } else {
d2a5884a
AS
420 if ((bus && bus->fast_io) ||
421 config->fast_io) {
0d4529c5
DC
422 spin_lock_init(&map->spinlock);
423 map->lock = regmap_lock_spinlock;
424 map->unlock = regmap_unlock_spinlock;
425 } else {
426 mutex_init(&map->mutex);
427 map->lock = regmap_lock_mutex;
428 map->unlock = regmap_unlock_mutex;
429 }
430 map->lock_arg = map;
bacdbe07 431 }
c212accc 432 map->format.reg_bytes = DIV_ROUND_UP(config->reg_bits, 8);
82159ba8 433 map->format.pad_bytes = config->pad_bits / 8;
c212accc 434 map->format.val_bytes = DIV_ROUND_UP(config->val_bits, 8);
5494a98f
FE
435 map->format.buf_size = DIV_ROUND_UP(config->reg_bits +
436 config->val_bits + config->pad_bits, 8);
d939fb9a 437 map->reg_shift = config->pad_bits % 8;
f01ee60f
SW
438 if (config->reg_stride)
439 map->reg_stride = config->reg_stride;
440 else
441 map->reg_stride = 1;
2e33caf1 442 map->use_single_rw = config->use_single_rw;
b83a313b
MB
443 map->dev = dev;
444 map->bus = bus;
0135bbcc 445 map->bus_context = bus_context;
2e2ae66d 446 map->max_register = config->max_register;
76aad392
DC
447 map->wr_table = config->wr_table;
448 map->rd_table = config->rd_table;
449 map->volatile_table = config->volatile_table;
450 map->precious_table = config->precious_table;
2e2ae66d
MB
451 map->writeable_reg = config->writeable_reg;
452 map->readable_reg = config->readable_reg;
453 map->volatile_reg = config->volatile_reg;
2efe1642 454 map->precious_reg = config->precious_reg;
5d1729e7 455 map->cache_type = config->cache_type;
72b39f6f 456 map->name = config->name;
b83a313b 457
0d509f2b
MB
458 spin_lock_init(&map->async_lock);
459 INIT_LIST_HEAD(&map->async_list);
460 init_waitqueue_head(&map->async_waitq);
461
6f306441
LPC
462 if (config->read_flag_mask || config->write_flag_mask) {
463 map->read_flag_mask = config->read_flag_mask;
464 map->write_flag_mask = config->write_flag_mask;
d2a5884a 465 } else if (bus) {
6f306441
LPC
466 map->read_flag_mask = bus->read_flag_mask;
467 }
468
d2a5884a
AS
469 if (!bus) {
470 map->reg_read = config->reg_read;
471 map->reg_write = config->reg_write;
472
473 map->defer_caching = false;
474 goto skip_format_initialization;
475 } else {
476 map->reg_read = _regmap_bus_read;
477 }
ad278406 478
141eba2e
SW
479 reg_endian = config->reg_format_endian;
480 if (reg_endian == REGMAP_ENDIAN_DEFAULT)
481 reg_endian = bus->reg_format_endian_default;
482 if (reg_endian == REGMAP_ENDIAN_DEFAULT)
483 reg_endian = REGMAP_ENDIAN_BIG;
484
485 val_endian = config->val_format_endian;
486 if (val_endian == REGMAP_ENDIAN_DEFAULT)
487 val_endian = bus->val_format_endian_default;
488 if (val_endian == REGMAP_ENDIAN_DEFAULT)
489 val_endian = REGMAP_ENDIAN_BIG;
490
d939fb9a 491 switch (config->reg_bits + map->reg_shift) {
9aa50750
WS
492 case 2:
493 switch (config->val_bits) {
494 case 6:
495 map->format.format_write = regmap_format_2_6_write;
496 break;
497 default:
498 goto err_map;
499 }
500 break;
501
b83a313b
MB
502 case 4:
503 switch (config->val_bits) {
504 case 12:
505 map->format.format_write = regmap_format_4_12_write;
506 break;
507 default:
508 goto err_map;
509 }
510 break;
511
512 case 7:
513 switch (config->val_bits) {
514 case 9:
515 map->format.format_write = regmap_format_7_9_write;
516 break;
517 default:
518 goto err_map;
519 }
520 break;
521
7e5ec63e
LPC
522 case 10:
523 switch (config->val_bits) {
524 case 14:
525 map->format.format_write = regmap_format_10_14_write;
526 break;
527 default:
528 goto err_map;
529 }
530 break;
531
b83a313b
MB
532 case 8:
533 map->format.format_reg = regmap_format_8;
534 break;
535
536 case 16:
141eba2e
SW
537 switch (reg_endian) {
538 case REGMAP_ENDIAN_BIG:
539 map->format.format_reg = regmap_format_16_be;
540 break;
541 case REGMAP_ENDIAN_NATIVE:
542 map->format.format_reg = regmap_format_16_native;
543 break;
544 default:
545 goto err_map;
546 }
b83a313b
MB
547 break;
548
237019e7
LPC
549 case 24:
550 if (reg_endian != REGMAP_ENDIAN_BIG)
551 goto err_map;
552 map->format.format_reg = regmap_format_24;
553 break;
554
7d5e525b 555 case 32:
141eba2e
SW
556 switch (reg_endian) {
557 case REGMAP_ENDIAN_BIG:
558 map->format.format_reg = regmap_format_32_be;
559 break;
560 case REGMAP_ENDIAN_NATIVE:
561 map->format.format_reg = regmap_format_32_native;
562 break;
563 default:
564 goto err_map;
565 }
7d5e525b
MB
566 break;
567
b83a313b
MB
568 default:
569 goto err_map;
570 }
571
8a819ff8
MB
572 if (val_endian == REGMAP_ENDIAN_NATIVE)
573 map->format.parse_inplace = regmap_parse_inplace_noop;
574
b83a313b
MB
575 switch (config->val_bits) {
576 case 8:
577 map->format.format_val = regmap_format_8;
578 map->format.parse_val = regmap_parse_8;
8a819ff8 579 map->format.parse_inplace = regmap_parse_inplace_noop;
b83a313b
MB
580 break;
581 case 16:
141eba2e
SW
582 switch (val_endian) {
583 case REGMAP_ENDIAN_BIG:
584 map->format.format_val = regmap_format_16_be;
585 map->format.parse_val = regmap_parse_16_be;
8a819ff8 586 map->format.parse_inplace = regmap_parse_16_be_inplace;
141eba2e
SW
587 break;
588 case REGMAP_ENDIAN_NATIVE:
589 map->format.format_val = regmap_format_16_native;
590 map->format.parse_val = regmap_parse_16_native;
591 break;
592 default:
593 goto err_map;
594 }
b83a313b 595 break;
ea279fc5 596 case 24:
141eba2e
SW
597 if (val_endian != REGMAP_ENDIAN_BIG)
598 goto err_map;
ea279fc5
MR
599 map->format.format_val = regmap_format_24;
600 map->format.parse_val = regmap_parse_24;
601 break;
7d5e525b 602 case 32:
141eba2e
SW
603 switch (val_endian) {
604 case REGMAP_ENDIAN_BIG:
605 map->format.format_val = regmap_format_32_be;
606 map->format.parse_val = regmap_parse_32_be;
8a819ff8 607 map->format.parse_inplace = regmap_parse_32_be_inplace;
141eba2e
SW
608 break;
609 case REGMAP_ENDIAN_NATIVE:
610 map->format.format_val = regmap_format_32_native;
611 map->format.parse_val = regmap_parse_32_native;
612 break;
613 default:
614 goto err_map;
615 }
7d5e525b 616 break;
b83a313b
MB
617 }
618
141eba2e
SW
619 if (map->format.format_write) {
620 if ((reg_endian != REGMAP_ENDIAN_BIG) ||
621 (val_endian != REGMAP_ENDIAN_BIG))
622 goto err_map;
7a647614 623 map->use_single_rw = true;
141eba2e 624 }
7a647614 625
b83a313b
MB
626 if (!map->format.format_write &&
627 !(map->format.format_reg && map->format.format_val))
628 goto err_map;
629
82159ba8 630 map->work_buf = kzalloc(map->format.buf_size, GFP_KERNEL);
b83a313b
MB
631 if (map->work_buf == NULL) {
632 ret = -ENOMEM;
5204f5e3 633 goto err_map;
b83a313b
MB
634 }
635
d2a5884a
AS
636 if (map->format.format_write) {
637 map->defer_caching = false;
07c320dc 638 map->reg_write = _regmap_bus_formatted_write;
d2a5884a
AS
639 } else if (map->format.format_val) {
640 map->defer_caching = true;
07c320dc 641 map->reg_write = _regmap_bus_raw_write;
d2a5884a
AS
642 }
643
644skip_format_initialization:
07c320dc 645
6863ca62 646 map->range_tree = RB_ROOT;
e3549cd0 647 for (i = 0; i < config->num_ranges; i++) {
6863ca62
KG
648 const struct regmap_range_cfg *range_cfg = &config->ranges[i];
649 struct regmap_range_node *new;
650
651 /* Sanity check */
061adc06
MB
652 if (range_cfg->range_max < range_cfg->range_min) {
653 dev_err(map->dev, "Invalid range %d: %d < %d\n", i,
654 range_cfg->range_max, range_cfg->range_min);
6863ca62 655 goto err_range;
061adc06
MB
656 }
657
658 if (range_cfg->range_max > map->max_register) {
659 dev_err(map->dev, "Invalid range %d: %d > %d\n", i,
660 range_cfg->range_max, map->max_register);
661 goto err_range;
662 }
663
664 if (range_cfg->selector_reg > map->max_register) {
665 dev_err(map->dev,
666 "Invalid range %d: selector out of map\n", i);
667 goto err_range;
668 }
669
670 if (range_cfg->window_len == 0) {
671 dev_err(map->dev, "Invalid range %d: window_len 0\n",
672 i);
673 goto err_range;
674 }
6863ca62
KG
675
676 /* Make sure, that this register range has no selector
677 or data window within its boundary */
e3549cd0 678 for (j = 0; j < config->num_ranges; j++) {
6863ca62
KG
679 unsigned sel_reg = config->ranges[j].selector_reg;
680 unsigned win_min = config->ranges[j].window_start;
681 unsigned win_max = win_min +
682 config->ranges[j].window_len - 1;
683
684 if (range_cfg->range_min <= sel_reg &&
685 sel_reg <= range_cfg->range_max) {
061adc06
MB
686 dev_err(map->dev,
687 "Range %d: selector for %d in window\n",
688 i, j);
6863ca62
KG
689 goto err_range;
690 }
691
692 if (!(win_max < range_cfg->range_min ||
693 win_min > range_cfg->range_max)) {
061adc06
MB
694 dev_err(map->dev,
695 "Range %d: window for %d in window\n",
696 i, j);
6863ca62
KG
697 goto err_range;
698 }
699 }
700
701 new = kzalloc(sizeof(*new), GFP_KERNEL);
702 if (new == NULL) {
703 ret = -ENOMEM;
704 goto err_range;
705 }
706
4b020b3f 707 new->map = map;
d058bb49 708 new->name = range_cfg->name;
6863ca62
KG
709 new->range_min = range_cfg->range_min;
710 new->range_max = range_cfg->range_max;
711 new->selector_reg = range_cfg->selector_reg;
712 new->selector_mask = range_cfg->selector_mask;
713 new->selector_shift = range_cfg->selector_shift;
714 new->window_start = range_cfg->window_start;
715 new->window_len = range_cfg->window_len;
716
717 if (_regmap_range_add(map, new) == false) {
061adc06 718 dev_err(map->dev, "Failed to add range %d\n", i);
6863ca62
KG
719 kfree(new);
720 goto err_range;
721 }
722
723 if (map->selector_work_buf == NULL) {
724 map->selector_work_buf =
725 kzalloc(map->format.buf_size, GFP_KERNEL);
726 if (map->selector_work_buf == NULL) {
727 ret = -ENOMEM;
728 goto err_range;
729 }
730 }
731 }
052d2cd1 732
e5e3b8ab 733 ret = regcache_init(map, config);
0ff3e62f 734 if (ret != 0)
6863ca62
KG
735 goto err_range;
736
737 regmap_debugfs_init(map, config->name);
5d1729e7 738
72b39f6f
MB
739 /* Add a devres resource for dev_get_regmap() */
740 m = devres_alloc(dev_get_regmap_release, sizeof(*m), GFP_KERNEL);
741 if (!m) {
742 ret = -ENOMEM;
6863ca62 743 goto err_debugfs;
72b39f6f
MB
744 }
745 *m = map;
746 devres_add(dev, m);
747
b83a313b
MB
748 return map;
749
bfaa25f3
SW
750err_debugfs:
751 regmap_debugfs_exit(map);
72b39f6f 752 regcache_exit(map);
6863ca62
KG
753err_range:
754 regmap_range_exit(map);
58072cbf 755 kfree(map->work_buf);
b83a313b
MB
756err_map:
757 kfree(map);
758err:
759 return ERR_PTR(ret);
760}
761EXPORT_SYMBOL_GPL(regmap_init);
762
c0eb4676
MB
763static void devm_regmap_release(struct device *dev, void *res)
764{
765 regmap_exit(*(struct regmap **)res);
766}
767
768/**
769 * devm_regmap_init(): Initialise managed register map
770 *
771 * @dev: Device that will be interacted with
772 * @bus: Bus-specific callbacks to use with device
0135bbcc 773 * @bus_context: Data passed to bus-specific callbacks
c0eb4676
MB
774 * @config: Configuration for register map
775 *
776 * The return value will be an ERR_PTR() on error or a valid pointer
777 * to a struct regmap. This function should generally not be called
778 * directly, it should be called by bus-specific init functions. The
779 * map will be automatically freed by the device management code.
780 */
781struct regmap *devm_regmap_init(struct device *dev,
782 const struct regmap_bus *bus,
0135bbcc 783 void *bus_context,
c0eb4676
MB
784 const struct regmap_config *config)
785{
786 struct regmap **ptr, *regmap;
787
788 ptr = devres_alloc(devm_regmap_release, sizeof(*ptr), GFP_KERNEL);
789 if (!ptr)
790 return ERR_PTR(-ENOMEM);
791
0135bbcc 792 regmap = regmap_init(dev, bus, bus_context, config);
c0eb4676
MB
793 if (!IS_ERR(regmap)) {
794 *ptr = regmap;
795 devres_add(dev, ptr);
796 } else {
797 devres_free(ptr);
798 }
799
800 return regmap;
801}
802EXPORT_SYMBOL_GPL(devm_regmap_init);
803
bf315173
MB
804/**
805 * regmap_reinit_cache(): Reinitialise the current register cache
806 *
807 * @map: Register map to operate on.
808 * @config: New configuration. Only the cache data will be used.
809 *
810 * Discard any existing register cache for the map and initialize a
811 * new cache. This can be used to restore the cache to defaults or to
812 * update the cache configuration to reflect runtime discovery of the
813 * hardware.
4d879514
DP
814 *
815 * No explicit locking is done here, the user needs to ensure that
816 * this function will not race with other calls to regmap.
bf315173
MB
817 */
818int regmap_reinit_cache(struct regmap *map, const struct regmap_config *config)
819{
bf315173 820 regcache_exit(map);
a24f64a6 821 regmap_debugfs_exit(map);
bf315173
MB
822
823 map->max_register = config->max_register;
824 map->writeable_reg = config->writeable_reg;
825 map->readable_reg = config->readable_reg;
826 map->volatile_reg = config->volatile_reg;
827 map->precious_reg = config->precious_reg;
828 map->cache_type = config->cache_type;
829
d3c242e1 830 regmap_debugfs_init(map, config->name);
a24f64a6 831
421e8d2d
MB
832 map->cache_bypass = false;
833 map->cache_only = false;
834
4d879514 835 return regcache_init(map, config);
bf315173 836}
752a6a5f 837EXPORT_SYMBOL_GPL(regmap_reinit_cache);
bf315173 838
b83a313b
MB
839/**
840 * regmap_exit(): Free a previously allocated register map
841 */
842void regmap_exit(struct regmap *map)
843{
5d1729e7 844 regcache_exit(map);
31244e39 845 regmap_debugfs_exit(map);
6863ca62 846 regmap_range_exit(map);
d2a5884a 847 if (map->bus && map->bus->free_context)
0135bbcc 848 map->bus->free_context(map->bus_context);
b83a313b 849 kfree(map->work_buf);
b83a313b
MB
850 kfree(map);
851}
852EXPORT_SYMBOL_GPL(regmap_exit);
853
72b39f6f
MB
854static int dev_get_regmap_match(struct device *dev, void *res, void *data)
855{
856 struct regmap **r = res;
857 if (!r || !*r) {
858 WARN_ON(!r || !*r);
859 return 0;
860 }
861
862 /* If the user didn't specify a name match any */
863 if (data)
864 return (*r)->name == data;
865 else
866 return 1;
867}
868
869/**
870 * dev_get_regmap(): Obtain the regmap (if any) for a device
871 *
872 * @dev: Device to retrieve the map for
873 * @name: Optional name for the register map, usually NULL.
874 *
875 * Returns the regmap for the device if one is present, or NULL. If
876 * name is specified then it must match the name specified when
877 * registering the device, if it is NULL then the first regmap found
878 * will be used. Devices with multiple register maps are very rare,
879 * generic code should normally not need to specify a name.
880 */
881struct regmap *dev_get_regmap(struct device *dev, const char *name)
882{
883 struct regmap **r = devres_find(dev, dev_get_regmap_release,
884 dev_get_regmap_match, (void *)name);
885
886 if (!r)
887 return NULL;
888 return *r;
889}
890EXPORT_SYMBOL_GPL(dev_get_regmap);
891
6863ca62 892static int _regmap_select_page(struct regmap *map, unsigned int *reg,
98bc7dfd 893 struct regmap_range_node *range,
6863ca62
KG
894 unsigned int val_num)
895{
6863ca62
KG
896 void *orig_work_buf;
897 unsigned int win_offset;
898 unsigned int win_page;
899 bool page_chg;
900 int ret;
901
98bc7dfd
MB
902 win_offset = (*reg - range->range_min) % range->window_len;
903 win_page = (*reg - range->range_min) / range->window_len;
6863ca62 904
98bc7dfd
MB
905 if (val_num > 1) {
906 /* Bulk write shouldn't cross range boundary */
907 if (*reg + val_num - 1 > range->range_max)
908 return -EINVAL;
6863ca62 909
98bc7dfd
MB
910 /* ... or single page boundary */
911 if (val_num > range->window_len - win_offset)
912 return -EINVAL;
913 }
6863ca62 914
98bc7dfd
MB
915 /* It is possible to have selector register inside data window.
916 In that case, selector register is located on every page and
917 it needs no page switching, when accessed alone. */
918 if (val_num > 1 ||
919 range->window_start + win_offset != range->selector_reg) {
920 /* Use separate work_buf during page switching */
921 orig_work_buf = map->work_buf;
922 map->work_buf = map->selector_work_buf;
6863ca62 923
98bc7dfd
MB
924 ret = _regmap_update_bits(map, range->selector_reg,
925 range->selector_mask,
926 win_page << range->selector_shift,
927 &page_chg);
632a5b01 928
98bc7dfd 929 map->work_buf = orig_work_buf;
6863ca62 930
0ff3e62f 931 if (ret != 0)
98bc7dfd 932 return ret;
6863ca62
KG
933 }
934
98bc7dfd
MB
935 *reg = range->window_start + win_offset;
936
6863ca62
KG
937 return 0;
938}
939
584de329
MB
940int _regmap_raw_write(struct regmap *map, unsigned int reg,
941 const void *val, size_t val_len, bool async)
b83a313b 942{
98bc7dfd 943 struct regmap_range_node *range;
0d509f2b 944 unsigned long flags;
6f306441 945 u8 *u8 = map->work_buf;
0d509f2b
MB
946 void *work_val = map->work_buf + map->format.reg_bytes +
947 map->format.pad_bytes;
b83a313b
MB
948 void *buf;
949 int ret = -ENOTSUPP;
950 size_t len;
73304781
MB
951 int i;
952
f1b5c5c3 953 WARN_ON(!map->bus);
d2a5884a 954
73304781
MB
955 /* Check for unwritable registers before we start */
956 if (map->writeable_reg)
957 for (i = 0; i < val_len / map->format.val_bytes; i++)
f01ee60f
SW
958 if (!map->writeable_reg(map->dev,
959 reg + (i * map->reg_stride)))
73304781 960 return -EINVAL;
b83a313b 961
c9157198
LD
962 if (!map->cache_bypass && map->format.parse_val) {
963 unsigned int ival;
964 int val_bytes = map->format.val_bytes;
965 for (i = 0; i < val_len / val_bytes; i++) {
966 memcpy(map->work_buf, val + (i * val_bytes), val_bytes);
967 ival = map->format.parse_val(map->work_buf);
f01ee60f
SW
968 ret = regcache_write(map, reg + (i * map->reg_stride),
969 ival);
c9157198
LD
970 if (ret) {
971 dev_err(map->dev,
6d04b8ac 972 "Error in caching of register: %x ret: %d\n",
c9157198
LD
973 reg + i, ret);
974 return ret;
975 }
976 }
977 if (map->cache_only) {
978 map->cache_dirty = true;
979 return 0;
980 }
981 }
982
98bc7dfd
MB
983 range = _regmap_range_lookup(map, reg);
984 if (range) {
8a2ceac6
MB
985 int val_num = val_len / map->format.val_bytes;
986 int win_offset = (reg - range->range_min) % range->window_len;
987 int win_residue = range->window_len - win_offset;
988
989 /* If the write goes beyond the end of the window split it */
990 while (val_num > win_residue) {
1a61cfe3 991 dev_dbg(map->dev, "Writing window %d/%zu\n",
8a2ceac6
MB
992 win_residue, val_len / map->format.val_bytes);
993 ret = _regmap_raw_write(map, reg, val, win_residue *
0d509f2b 994 map->format.val_bytes, async);
8a2ceac6
MB
995 if (ret != 0)
996 return ret;
997
998 reg += win_residue;
999 val_num -= win_residue;
1000 val += win_residue * map->format.val_bytes;
1001 val_len -= win_residue * map->format.val_bytes;
1002
1003 win_offset = (reg - range->range_min) %
1004 range->window_len;
1005 win_residue = range->window_len - win_offset;
1006 }
1007
1008 ret = _regmap_select_page(map, &reg, range, val_num);
0ff3e62f 1009 if (ret != 0)
98bc7dfd
MB
1010 return ret;
1011 }
6863ca62 1012
d939fb9a 1013 map->format.format_reg(map->work_buf, reg, map->reg_shift);
b83a313b 1014
6f306441
LPC
1015 u8[0] |= map->write_flag_mask;
1016
0d509f2b
MB
1017 if (async && map->bus->async_write) {
1018 struct regmap_async *async = map->bus->async_alloc();
1019 if (!async)
1020 return -ENOMEM;
1021
1022 async->work_buf = kzalloc(map->format.buf_size,
1023 GFP_KERNEL | GFP_DMA);
1024 if (!async->work_buf) {
1025 kfree(async);
1026 return -ENOMEM;
1027 }
1028
1029 INIT_WORK(&async->cleanup, async_cleanup);
1030 async->map = map;
1031
1032 /* If the caller supplied the value we can use it safely. */
1033 memcpy(async->work_buf, map->work_buf, map->format.pad_bytes +
1034 map->format.reg_bytes + map->format.val_bytes);
1035 if (val == work_val)
1036 val = async->work_buf + map->format.pad_bytes +
1037 map->format.reg_bytes;
1038
1039 spin_lock_irqsave(&map->async_lock, flags);
1040 list_add_tail(&async->list, &map->async_list);
1041 spin_unlock_irqrestore(&map->async_lock, flags);
1042
1043 ret = map->bus->async_write(map->bus_context, async->work_buf,
1044 map->format.reg_bytes +
1045 map->format.pad_bytes,
1046 val, val_len, async);
1047
1048 if (ret != 0) {
1049 dev_err(map->dev, "Failed to schedule write: %d\n",
1050 ret);
1051
1052 spin_lock_irqsave(&map->async_lock, flags);
1053 list_del(&async->list);
1054 spin_unlock_irqrestore(&map->async_lock, flags);
1055
1056 kfree(async->work_buf);
1057 kfree(async);
1058 }
1059 }
1060
fb2736bb
MB
1061 trace_regmap_hw_write_start(map->dev, reg,
1062 val_len / map->format.val_bytes);
1063
2547e201
MB
1064 /* If we're doing a single register write we can probably just
1065 * send the work_buf directly, otherwise try to do a gather
1066 * write.
1067 */
0d509f2b 1068 if (val == work_val)
0135bbcc 1069 ret = map->bus->write(map->bus_context, map->work_buf,
82159ba8
MB
1070 map->format.reg_bytes +
1071 map->format.pad_bytes +
1072 val_len);
2547e201 1073 else if (map->bus->gather_write)
0135bbcc 1074 ret = map->bus->gather_write(map->bus_context, map->work_buf,
82159ba8
MB
1075 map->format.reg_bytes +
1076 map->format.pad_bytes,
b83a313b
MB
1077 val, val_len);
1078
2547e201 1079 /* If that didn't work fall back on linearising by hand. */
b83a313b 1080 if (ret == -ENOTSUPP) {
82159ba8
MB
1081 len = map->format.reg_bytes + map->format.pad_bytes + val_len;
1082 buf = kzalloc(len, GFP_KERNEL);
b83a313b
MB
1083 if (!buf)
1084 return -ENOMEM;
1085
1086 memcpy(buf, map->work_buf, map->format.reg_bytes);
82159ba8
MB
1087 memcpy(buf + map->format.reg_bytes + map->format.pad_bytes,
1088 val, val_len);
0135bbcc 1089 ret = map->bus->write(map->bus_context, buf, len);
b83a313b
MB
1090
1091 kfree(buf);
1092 }
1093
fb2736bb
MB
1094 trace_regmap_hw_write_done(map->dev, reg,
1095 val_len / map->format.val_bytes);
1096
b83a313b
MB
1097 return ret;
1098}
1099
07c320dc
AS
1100static int _regmap_bus_formatted_write(void *context, unsigned int reg,
1101 unsigned int val)
1102{
1103 int ret;
1104 struct regmap_range_node *range;
1105 struct regmap *map = context;
1106
f1b5c5c3 1107 WARN_ON(!map->bus || !map->format.format_write);
07c320dc
AS
1108
1109 range = _regmap_range_lookup(map, reg);
1110 if (range) {
1111 ret = _regmap_select_page(map, &reg, range, 1);
1112 if (ret != 0)
1113 return ret;
1114 }
1115
1116 map->format.format_write(map, reg, val);
1117
1118 trace_regmap_hw_write_start(map->dev, reg, 1);
1119
1120 ret = map->bus->write(map->bus_context, map->work_buf,
1121 map->format.buf_size);
1122
1123 trace_regmap_hw_write_done(map->dev, reg, 1);
1124
1125 return ret;
1126}
1127
1128static int _regmap_bus_raw_write(void *context, unsigned int reg,
1129 unsigned int val)
1130{
1131 struct regmap *map = context;
1132
f1b5c5c3 1133 WARN_ON(!map->bus || !map->format.format_val);
07c320dc
AS
1134
1135 map->format.format_val(map->work_buf + map->format.reg_bytes
1136 + map->format.pad_bytes, val, 0);
1137 return _regmap_raw_write(map, reg,
1138 map->work_buf +
1139 map->format.reg_bytes +
1140 map->format.pad_bytes,
0d509f2b 1141 map->format.val_bytes, false);
07c320dc
AS
1142}
1143
d2a5884a
AS
1144static inline void *_regmap_map_get_context(struct regmap *map)
1145{
1146 return (map->bus) ? map : map->bus_context;
1147}
1148
4d2dc095
DP
1149int _regmap_write(struct regmap *map, unsigned int reg,
1150 unsigned int val)
b83a313b 1151{
fb2736bb 1152 int ret;
d2a5884a 1153 void *context = _regmap_map_get_context(map);
b83a313b 1154
d2a5884a 1155 if (!map->cache_bypass && !map->defer_caching) {
5d1729e7
DP
1156 ret = regcache_write(map, reg, val);
1157 if (ret != 0)
1158 return ret;
8ae0d7e8
MB
1159 if (map->cache_only) {
1160 map->cache_dirty = true;
5d1729e7 1161 return 0;
8ae0d7e8 1162 }
5d1729e7
DP
1163 }
1164
1044c180
MB
1165#ifdef LOG_DEVICE
1166 if (strcmp(dev_name(map->dev), LOG_DEVICE) == 0)
1167 dev_info(map->dev, "%x <= %x\n", reg, val);
1168#endif
1169
fb2736bb
MB
1170 trace_regmap_reg_write(map->dev, reg, val);
1171
d2a5884a 1172 return map->reg_write(context, reg, val);
b83a313b
MB
1173}
1174
1175/**
1176 * regmap_write(): Write a value to a single register
1177 *
1178 * @map: Register map to write to
1179 * @reg: Register to write to
1180 * @val: Value to be written
1181 *
1182 * A value of zero will be returned on success, a negative errno will
1183 * be returned in error cases.
1184 */
1185int regmap_write(struct regmap *map, unsigned int reg, unsigned int val)
1186{
1187 int ret;
1188
f01ee60f
SW
1189 if (reg % map->reg_stride)
1190 return -EINVAL;
1191
0d4529c5 1192 map->lock(map->lock_arg);
b83a313b
MB
1193
1194 ret = _regmap_write(map, reg, val);
1195
0d4529c5 1196 map->unlock(map->lock_arg);
b83a313b
MB
1197
1198 return ret;
1199}
1200EXPORT_SYMBOL_GPL(regmap_write);
1201
1202/**
1203 * regmap_raw_write(): Write raw values to one or more registers
1204 *
1205 * @map: Register map to write to
1206 * @reg: Initial register to write to
1207 * @val: Block of data to be written, laid out for direct transmission to the
1208 * device
1209 * @val_len: Length of data pointed to by val.
1210 *
1211 * This function is intended to be used for things like firmware
1212 * download where a large block of data needs to be transferred to the
1213 * device. No formatting will be done on the data provided.
1214 *
1215 * A value of zero will be returned on success, a negative errno will
1216 * be returned in error cases.
1217 */
1218int regmap_raw_write(struct regmap *map, unsigned int reg,
1219 const void *val, size_t val_len)
1220{
1221 int ret;
1222
d2a5884a
AS
1223 if (!map->bus)
1224 return -EINVAL;
851960ba
SW
1225 if (val_len % map->format.val_bytes)
1226 return -EINVAL;
f01ee60f
SW
1227 if (reg % map->reg_stride)
1228 return -EINVAL;
851960ba 1229
0d4529c5 1230 map->lock(map->lock_arg);
b83a313b 1231
0d509f2b 1232 ret = _regmap_raw_write(map, reg, val, val_len, false);
b83a313b 1233
0d4529c5 1234 map->unlock(map->lock_arg);
b83a313b
MB
1235
1236 return ret;
1237}
1238EXPORT_SYMBOL_GPL(regmap_raw_write);
1239
8eaeb219
LD
1240/*
1241 * regmap_bulk_write(): Write multiple registers to the device
1242 *
1243 * @map: Register map to write to
1244 * @reg: First register to be write from
1245 * @val: Block of data to be written, in native register size for device
1246 * @val_count: Number of registers to write
1247 *
1248 * This function is intended to be used for writing a large block of
31b35e9e 1249 * data to the device either in single transfer or multiple transfer.
8eaeb219
LD
1250 *
1251 * A value of zero will be returned on success, a negative errno will
1252 * be returned in error cases.
1253 */
1254int regmap_bulk_write(struct regmap *map, unsigned int reg, const void *val,
1255 size_t val_count)
1256{
1257 int ret = 0, i;
1258 size_t val_bytes = map->format.val_bytes;
1259 void *wval;
1260
d2a5884a
AS
1261 if (!map->bus)
1262 return -EINVAL;
8a819ff8 1263 if (!map->format.parse_inplace)
8eaeb219 1264 return -EINVAL;
f01ee60f
SW
1265 if (reg % map->reg_stride)
1266 return -EINVAL;
8eaeb219 1267
0d4529c5 1268 map->lock(map->lock_arg);
8eaeb219
LD
1269
1270 /* No formatting is require if val_byte is 1 */
1271 if (val_bytes == 1) {
1272 wval = (void *)val;
1273 } else {
1274 wval = kmemdup(val, val_count * val_bytes, GFP_KERNEL);
1275 if (!wval) {
1276 ret = -ENOMEM;
1277 dev_err(map->dev, "Error in memory allocation\n");
1278 goto out;
1279 }
1280 for (i = 0; i < val_count * val_bytes; i += val_bytes)
8a819ff8 1281 map->format.parse_inplace(wval + i);
8eaeb219 1282 }
2e33caf1
AJ
1283 /*
1284 * Some devices does not support bulk write, for
1285 * them we have a series of single write operations.
1286 */
1287 if (map->use_single_rw) {
1288 for (i = 0; i < val_count; i++) {
1289 ret = regmap_raw_write(map,
0d509f2b
MB
1290 reg + (i * map->reg_stride),
1291 val + (i * val_bytes),
1292 val_bytes);
2e33caf1
AJ
1293 if (ret != 0)
1294 return ret;
1295 }
1296 } else {
0d509f2b
MB
1297 ret = _regmap_raw_write(map, reg, wval, val_bytes * val_count,
1298 false);
2e33caf1 1299 }
8eaeb219
LD
1300
1301 if (val_bytes != 1)
1302 kfree(wval);
1303
1304out:
0d4529c5 1305 map->unlock(map->lock_arg);
8eaeb219
LD
1306 return ret;
1307}
1308EXPORT_SYMBOL_GPL(regmap_bulk_write);
1309
0d509f2b
MB
1310/**
1311 * regmap_raw_write_async(): Write raw values to one or more registers
1312 * asynchronously
1313 *
1314 * @map: Register map to write to
1315 * @reg: Initial register to write to
1316 * @val: Block of data to be written, laid out for direct transmission to the
1317 * device. Must be valid until regmap_async_complete() is called.
1318 * @val_len: Length of data pointed to by val.
1319 *
1320 * This function is intended to be used for things like firmware
1321 * download where a large block of data needs to be transferred to the
1322 * device. No formatting will be done on the data provided.
1323 *
1324 * If supported by the underlying bus the write will be scheduled
1325 * asynchronously, helping maximise I/O speed on higher speed buses
1326 * like SPI. regmap_async_complete() can be called to ensure that all
1327 * asynchrnous writes have been completed.
1328 *
1329 * A value of zero will be returned on success, a negative errno will
1330 * be returned in error cases.
1331 */
1332int regmap_raw_write_async(struct regmap *map, unsigned int reg,
1333 const void *val, size_t val_len)
1334{
1335 int ret;
1336
1337 if (val_len % map->format.val_bytes)
1338 return -EINVAL;
1339 if (reg % map->reg_stride)
1340 return -EINVAL;
1341
1342 map->lock(map->lock_arg);
1343
1344 ret = _regmap_raw_write(map, reg, val, val_len, true);
1345
1346 map->unlock(map->lock_arg);
1347
1348 return ret;
1349}
1350EXPORT_SYMBOL_GPL(regmap_raw_write_async);
1351
b83a313b
MB
1352static int _regmap_raw_read(struct regmap *map, unsigned int reg, void *val,
1353 unsigned int val_len)
1354{
98bc7dfd 1355 struct regmap_range_node *range;
b83a313b
MB
1356 u8 *u8 = map->work_buf;
1357 int ret;
1358
f1b5c5c3 1359 WARN_ON(!map->bus);
d2a5884a 1360
98bc7dfd
MB
1361 range = _regmap_range_lookup(map, reg);
1362 if (range) {
1363 ret = _regmap_select_page(map, &reg, range,
1364 val_len / map->format.val_bytes);
0ff3e62f 1365 if (ret != 0)
98bc7dfd
MB
1366 return ret;
1367 }
6863ca62 1368
d939fb9a 1369 map->format.format_reg(map->work_buf, reg, map->reg_shift);
b83a313b
MB
1370
1371 /*
6f306441 1372 * Some buses or devices flag reads by setting the high bits in the
b83a313b
MB
1373 * register addresss; since it's always the high bits for all
1374 * current formats we can do this here rather than in
1375 * formatting. This may break if we get interesting formats.
1376 */
6f306441 1377 u8[0] |= map->read_flag_mask;
b83a313b 1378
fb2736bb
MB
1379 trace_regmap_hw_read_start(map->dev, reg,
1380 val_len / map->format.val_bytes);
1381
0135bbcc 1382 ret = map->bus->read(map->bus_context, map->work_buf,
82159ba8 1383 map->format.reg_bytes + map->format.pad_bytes,
40c5cc26 1384 val, val_len);
b83a313b 1385
fb2736bb
MB
1386 trace_regmap_hw_read_done(map->dev, reg,
1387 val_len / map->format.val_bytes);
1388
1389 return ret;
b83a313b
MB
1390}
1391
ad278406
AS
1392static int _regmap_bus_read(void *context, unsigned int reg,
1393 unsigned int *val)
1394{
1395 int ret;
1396 struct regmap *map = context;
1397
1398 if (!map->format.parse_val)
1399 return -EINVAL;
1400
1401 ret = _regmap_raw_read(map, reg, map->work_buf, map->format.val_bytes);
1402 if (ret == 0)
1403 *val = map->format.parse_val(map->work_buf);
1404
1405 return ret;
1406}
1407
b83a313b
MB
1408static int _regmap_read(struct regmap *map, unsigned int reg,
1409 unsigned int *val)
1410{
1411 int ret;
d2a5884a
AS
1412 void *context = _regmap_map_get_context(map);
1413
f1b5c5c3 1414 WARN_ON(!map->reg_read);
b83a313b 1415
5d1729e7
DP
1416 if (!map->cache_bypass) {
1417 ret = regcache_read(map, reg, val);
1418 if (ret == 0)
1419 return 0;
1420 }
1421
1422 if (map->cache_only)
1423 return -EBUSY;
1424
d2a5884a 1425 ret = map->reg_read(context, reg, val);
fb2736bb 1426 if (ret == 0) {
1044c180
MB
1427#ifdef LOG_DEVICE
1428 if (strcmp(dev_name(map->dev), LOG_DEVICE) == 0)
1429 dev_info(map->dev, "%x => %x\n", reg, *val);
1430#endif
1431
fb2736bb 1432 trace_regmap_reg_read(map->dev, reg, *val);
b83a313b 1433
ad278406
AS
1434 if (!map->cache_bypass)
1435 regcache_write(map, reg, *val);
1436 }
f2985367 1437
b83a313b
MB
1438 return ret;
1439}
1440
1441/**
1442 * regmap_read(): Read a value from a single register
1443 *
1444 * @map: Register map to write to
1445 * @reg: Register to be read from
1446 * @val: Pointer to store read value
1447 *
1448 * A value of zero will be returned on success, a negative errno will
1449 * be returned in error cases.
1450 */
1451int regmap_read(struct regmap *map, unsigned int reg, unsigned int *val)
1452{
1453 int ret;
1454
f01ee60f
SW
1455 if (reg % map->reg_stride)
1456 return -EINVAL;
1457
0d4529c5 1458 map->lock(map->lock_arg);
b83a313b
MB
1459
1460 ret = _regmap_read(map, reg, val);
1461
0d4529c5 1462 map->unlock(map->lock_arg);
b83a313b
MB
1463
1464 return ret;
1465}
1466EXPORT_SYMBOL_GPL(regmap_read);
1467
1468/**
1469 * regmap_raw_read(): Read raw data from the device
1470 *
1471 * @map: Register map to write to
1472 * @reg: First register to be read from
1473 * @val: Pointer to store read value
1474 * @val_len: Size of data to read
1475 *
1476 * A value of zero will be returned on success, a negative errno will
1477 * be returned in error cases.
1478 */
1479int regmap_raw_read(struct regmap *map, unsigned int reg, void *val,
1480 size_t val_len)
1481{
b8fb5ab1
MB
1482 size_t val_bytes = map->format.val_bytes;
1483 size_t val_count = val_len / val_bytes;
1484 unsigned int v;
1485 int ret, i;
04e016ad 1486
d2a5884a
AS
1487 if (!map->bus)
1488 return -EINVAL;
851960ba
SW
1489 if (val_len % map->format.val_bytes)
1490 return -EINVAL;
f01ee60f
SW
1491 if (reg % map->reg_stride)
1492 return -EINVAL;
851960ba 1493
0d4529c5 1494 map->lock(map->lock_arg);
b83a313b 1495
b8fb5ab1
MB
1496 if (regmap_volatile_range(map, reg, val_count) || map->cache_bypass ||
1497 map->cache_type == REGCACHE_NONE) {
1498 /* Physical block read if there's no cache involved */
1499 ret = _regmap_raw_read(map, reg, val, val_len);
1500
1501 } else {
1502 /* Otherwise go word by word for the cache; should be low
1503 * cost as we expect to hit the cache.
1504 */
1505 for (i = 0; i < val_count; i++) {
f01ee60f
SW
1506 ret = _regmap_read(map, reg + (i * map->reg_stride),
1507 &v);
b8fb5ab1
MB
1508 if (ret != 0)
1509 goto out;
1510
d939fb9a 1511 map->format.format_val(val + (i * val_bytes), v, 0);
b8fb5ab1
MB
1512 }
1513 }
b83a313b 1514
b8fb5ab1 1515 out:
0d4529c5 1516 map->unlock(map->lock_arg);
b83a313b
MB
1517
1518 return ret;
1519}
1520EXPORT_SYMBOL_GPL(regmap_raw_read);
1521
1522/**
1523 * regmap_bulk_read(): Read multiple registers from the device
1524 *
1525 * @map: Register map to write to
1526 * @reg: First register to be read from
1527 * @val: Pointer to store read value, in native register size for device
1528 * @val_count: Number of registers to read
1529 *
1530 * A value of zero will be returned on success, a negative errno will
1531 * be returned in error cases.
1532 */
1533int regmap_bulk_read(struct regmap *map, unsigned int reg, void *val,
1534 size_t val_count)
1535{
1536 int ret, i;
1537 size_t val_bytes = map->format.val_bytes;
82cd9965 1538 bool vol = regmap_volatile_range(map, reg, val_count);
5d1729e7 1539
d2a5884a
AS
1540 if (!map->bus)
1541 return -EINVAL;
8a819ff8 1542 if (!map->format.parse_inplace)
b83a313b 1543 return -EINVAL;
f01ee60f
SW
1544 if (reg % map->reg_stride)
1545 return -EINVAL;
b83a313b 1546
de2d808f 1547 if (vol || map->cache_type == REGCACHE_NONE) {
2e33caf1
AJ
1548 /*
1549 * Some devices does not support bulk read, for
1550 * them we have a series of single read operations.
1551 */
1552 if (map->use_single_rw) {
1553 for (i = 0; i < val_count; i++) {
1554 ret = regmap_raw_read(map,
1555 reg + (i * map->reg_stride),
1556 val + (i * val_bytes),
1557 val_bytes);
1558 if (ret != 0)
1559 return ret;
1560 }
1561 } else {
1562 ret = regmap_raw_read(map, reg, val,
1563 val_bytes * val_count);
1564 if (ret != 0)
1565 return ret;
1566 }
de2d808f
MB
1567
1568 for (i = 0; i < val_count * val_bytes; i += val_bytes)
8a819ff8 1569 map->format.parse_inplace(val + i);
de2d808f
MB
1570 } else {
1571 for (i = 0; i < val_count; i++) {
6560ffd1 1572 unsigned int ival;
f01ee60f 1573 ret = regmap_read(map, reg + (i * map->reg_stride),
25061d28 1574 &ival);
de2d808f
MB
1575 if (ret != 0)
1576 return ret;
6560ffd1 1577 memcpy(val + (i * val_bytes), &ival, val_bytes);
de2d808f
MB
1578 }
1579 }
b83a313b
MB
1580
1581 return 0;
1582}
1583EXPORT_SYMBOL_GPL(regmap_bulk_read);
1584
018690d3
MB
1585static int _regmap_update_bits(struct regmap *map, unsigned int reg,
1586 unsigned int mask, unsigned int val,
1587 bool *change)
b83a313b
MB
1588{
1589 int ret;
d91e8db2 1590 unsigned int tmp, orig;
b83a313b 1591
d91e8db2 1592 ret = _regmap_read(map, reg, &orig);
b83a313b 1593 if (ret != 0)
fc3ebd78 1594 return ret;
b83a313b 1595
d91e8db2 1596 tmp = orig & ~mask;
b83a313b
MB
1597 tmp |= val & mask;
1598
018690d3 1599 if (tmp != orig) {
d91e8db2 1600 ret = _regmap_write(map, reg, tmp);
018690d3
MB
1601 *change = true;
1602 } else {
1603 *change = false;
1604 }
b83a313b 1605
b83a313b
MB
1606 return ret;
1607}
018690d3
MB
1608
1609/**
1610 * regmap_update_bits: Perform a read/modify/write cycle on the register map
1611 *
1612 * @map: Register map to update
1613 * @reg: Register to update
1614 * @mask: Bitmask to change
1615 * @val: New value for bitmask
1616 *
1617 * Returns zero for success, a negative number on error.
1618 */
1619int regmap_update_bits(struct regmap *map, unsigned int reg,
1620 unsigned int mask, unsigned int val)
1621{
1622 bool change;
fc3ebd78
KG
1623 int ret;
1624
0d4529c5 1625 map->lock(map->lock_arg);
fc3ebd78 1626 ret = _regmap_update_bits(map, reg, mask, val, &change);
0d4529c5 1627 map->unlock(map->lock_arg);
fc3ebd78
KG
1628
1629 return ret;
018690d3 1630}
b83a313b 1631EXPORT_SYMBOL_GPL(regmap_update_bits);
31244e39 1632
018690d3
MB
1633/**
1634 * regmap_update_bits_check: Perform a read/modify/write cycle on the
1635 * register map and report if updated
1636 *
1637 * @map: Register map to update
1638 * @reg: Register to update
1639 * @mask: Bitmask to change
1640 * @val: New value for bitmask
1641 * @change: Boolean indicating if a write was done
1642 *
1643 * Returns zero for success, a negative number on error.
1644 */
1645int regmap_update_bits_check(struct regmap *map, unsigned int reg,
1646 unsigned int mask, unsigned int val,
1647 bool *change)
1648{
fc3ebd78
KG
1649 int ret;
1650
0d4529c5 1651 map->lock(map->lock_arg);
fc3ebd78 1652 ret = _regmap_update_bits(map, reg, mask, val, change);
0d4529c5 1653 map->unlock(map->lock_arg);
fc3ebd78 1654 return ret;
018690d3
MB
1655}
1656EXPORT_SYMBOL_GPL(regmap_update_bits_check);
1657
0d509f2b
MB
1658void regmap_async_complete_cb(struct regmap_async *async, int ret)
1659{
1660 struct regmap *map = async->map;
1661 bool wake;
1662
1663 spin_lock(&map->async_lock);
1664
1665 list_del(&async->list);
1666 wake = list_empty(&map->async_list);
1667
1668 if (ret != 0)
1669 map->async_ret = ret;
1670
1671 spin_unlock(&map->async_lock);
1672
1673 schedule_work(&async->cleanup);
1674
1675 if (wake)
1676 wake_up(&map->async_waitq);
1677}
f804fb56 1678EXPORT_SYMBOL_GPL(regmap_async_complete_cb);
0d509f2b
MB
1679
1680static int regmap_async_is_done(struct regmap *map)
1681{
1682 unsigned long flags;
1683 int ret;
1684
1685 spin_lock_irqsave(&map->async_lock, flags);
1686 ret = list_empty(&map->async_list);
1687 spin_unlock_irqrestore(&map->async_lock, flags);
1688
1689 return ret;
1690}
1691
1692/**
1693 * regmap_async_complete: Ensure all asynchronous I/O has completed.
1694 *
1695 * @map: Map to operate on.
1696 *
1697 * Blocks until any pending asynchronous I/O has completed. Returns
1698 * an error code for any failed I/O operations.
1699 */
1700int regmap_async_complete(struct regmap *map)
1701{
1702 unsigned long flags;
1703 int ret;
1704
1705 /* Nothing to do with no async support */
1706 if (!map->bus->async_write)
1707 return 0;
1708
1709 wait_event(map->async_waitq, regmap_async_is_done(map));
1710
1711 spin_lock_irqsave(&map->async_lock, flags);
1712 ret = map->async_ret;
1713 map->async_ret = 0;
1714 spin_unlock_irqrestore(&map->async_lock, flags);
1715
1716 return ret;
1717}
f88948ef 1718EXPORT_SYMBOL_GPL(regmap_async_complete);
0d509f2b 1719
22f0d90a
MB
1720/**
1721 * regmap_register_patch: Register and apply register updates to be applied
1722 * on device initialistion
1723 *
1724 * @map: Register map to apply updates to.
1725 * @regs: Values to update.
1726 * @num_regs: Number of entries in regs.
1727 *
1728 * Register a set of register updates to be applied to the device
1729 * whenever the device registers are synchronised with the cache and
1730 * apply them immediately. Typically this is used to apply
1731 * corrections to be applied to the device defaults on startup, such
1732 * as the updates some vendors provide to undocumented registers.
1733 */
1734int regmap_register_patch(struct regmap *map, const struct reg_default *regs,
1735 int num_regs)
1736{
1737 int i, ret;
1738 bool bypass;
1739
1740 /* If needed the implementation can be extended to support this */
1741 if (map->patch)
1742 return -EBUSY;
1743
0d4529c5 1744 map->lock(map->lock_arg);
22f0d90a
MB
1745
1746 bypass = map->cache_bypass;
1747
1748 map->cache_bypass = true;
1749
1750 /* Write out first; it's useful to apply even if we fail later. */
1751 for (i = 0; i < num_regs; i++) {
1752 ret = _regmap_write(map, regs[i].reg, regs[i].def);
1753 if (ret != 0) {
1754 dev_err(map->dev, "Failed to write %x = %x: %d\n",
1755 regs[i].reg, regs[i].def, ret);
1756 goto out;
1757 }
1758 }
1759
2a14d7d9 1760 map->patch = kcalloc(num_regs, sizeof(struct reg_default), GFP_KERNEL);
22f0d90a
MB
1761 if (map->patch != NULL) {
1762 memcpy(map->patch, regs,
1763 num_regs * sizeof(struct reg_default));
1764 map->patch_regs = num_regs;
1765 } else {
1766 ret = -ENOMEM;
1767 }
1768
1769out:
1770 map->cache_bypass = bypass;
1771
0d4529c5 1772 map->unlock(map->lock_arg);
22f0d90a
MB
1773
1774 return ret;
1775}
1776EXPORT_SYMBOL_GPL(regmap_register_patch);
1777
eae4b51b 1778/*
a6539c32
MB
1779 * regmap_get_val_bytes(): Report the size of a register value
1780 *
1781 * Report the size of a register value, mainly intended to for use by
1782 * generic infrastructure built on top of regmap.
1783 */
1784int regmap_get_val_bytes(struct regmap *map)
1785{
1786 if (map->format.format_write)
1787 return -EINVAL;
1788
1789 return map->format.val_bytes;
1790}
1791EXPORT_SYMBOL_GPL(regmap_get_val_bytes);
1792
31244e39
MB
1793static int __init regmap_initcall(void)
1794{
1795 regmap_debugfs_initcall();
1796
1797 return 0;
1798}
1799postcore_initcall(regmap_initcall);