]> git.proxmox.com Git - mirror_ubuntu-artful-kernel.git/blame - drivers/base/regmap/regmap.c
Linux 3.10-rc4
[mirror_ubuntu-artful-kernel.git] / drivers / base / regmap / regmap.c
CommitLineData
b83a313b
MB
1/*
2 * Register map access API
3 *
4 * Copyright 2011 Wolfson Microelectronics plc
5 *
6 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
f5d6eba7 13#include <linux/device.h>
b83a313b 14#include <linux/slab.h>
19694b5e 15#include <linux/export.h>
b83a313b
MB
16#include <linux/mutex.h>
17#include <linux/err.h>
6863ca62 18#include <linux/rbtree.h>
30b2a553 19#include <linux/sched.h>
b83a313b 20
fb2736bb
MB
21#define CREATE_TRACE_POINTS
22#include <trace/events/regmap.h>
23
93de9124 24#include "internal.h"
b83a313b 25
1044c180
MB
26/*
27 * Sometimes for failures during very early init the trace
28 * infrastructure isn't available early enough to be used. For this
29 * sort of problem defining LOG_DEVICE will add printks for basic
30 * register I/O on a specific device.
31 */
32#undef LOG_DEVICE
33
34static int _regmap_update_bits(struct regmap *map, unsigned int reg,
35 unsigned int mask, unsigned int val,
36 bool *change);
37
ad278406
AS
38static int _regmap_bus_read(void *context, unsigned int reg,
39 unsigned int *val);
07c320dc
AS
40static int _regmap_bus_formatted_write(void *context, unsigned int reg,
41 unsigned int val);
42static int _regmap_bus_raw_write(void *context, unsigned int reg,
43 unsigned int val);
ad278406 44
0d509f2b
MB
45static void async_cleanup(struct work_struct *work)
46{
47 struct regmap_async *async = container_of(work, struct regmap_async,
48 cleanup);
49
50 kfree(async->work_buf);
51 kfree(async);
52}
53
76aad392
DC
54bool regmap_reg_in_ranges(unsigned int reg,
55 const struct regmap_range *ranges,
56 unsigned int nranges)
57{
58 const struct regmap_range *r;
59 int i;
60
61 for (i = 0, r = ranges; i < nranges; i++, r++)
62 if (regmap_reg_in_range(reg, r))
63 return true;
64 return false;
65}
66EXPORT_SYMBOL_GPL(regmap_reg_in_ranges);
67
68static bool _regmap_check_range_table(struct regmap *map,
69 unsigned int reg,
70 const struct regmap_access_table *table)
71{
72 /* Check "no ranges" first */
73 if (regmap_reg_in_ranges(reg, table->no_ranges, table->n_no_ranges))
74 return false;
75
76 /* In case zero "yes ranges" are supplied, any reg is OK */
77 if (!table->n_yes_ranges)
78 return true;
79
80 return regmap_reg_in_ranges(reg, table->yes_ranges,
81 table->n_yes_ranges);
82}
83
8de2f081
MB
84bool regmap_writeable(struct regmap *map, unsigned int reg)
85{
86 if (map->max_register && reg > map->max_register)
87 return false;
88
89 if (map->writeable_reg)
90 return map->writeable_reg(map->dev, reg);
91
76aad392
DC
92 if (map->wr_table)
93 return _regmap_check_range_table(map, reg, map->wr_table);
94
8de2f081
MB
95 return true;
96}
97
98bool regmap_readable(struct regmap *map, unsigned int reg)
99{
100 if (map->max_register && reg > map->max_register)
101 return false;
102
4191f197
WS
103 if (map->format.format_write)
104 return false;
105
8de2f081
MB
106 if (map->readable_reg)
107 return map->readable_reg(map->dev, reg);
108
76aad392
DC
109 if (map->rd_table)
110 return _regmap_check_range_table(map, reg, map->rd_table);
111
8de2f081
MB
112 return true;
113}
114
115bool regmap_volatile(struct regmap *map, unsigned int reg)
116{
4191f197 117 if (!regmap_readable(map, reg))
8de2f081
MB
118 return false;
119
120 if (map->volatile_reg)
121 return map->volatile_reg(map->dev, reg);
122
76aad392
DC
123 if (map->volatile_table)
124 return _regmap_check_range_table(map, reg, map->volatile_table);
125
8de2f081
MB
126 return true;
127}
128
129bool regmap_precious(struct regmap *map, unsigned int reg)
130{
4191f197 131 if (!regmap_readable(map, reg))
8de2f081
MB
132 return false;
133
134 if (map->precious_reg)
135 return map->precious_reg(map->dev, reg);
136
76aad392
DC
137 if (map->precious_table)
138 return _regmap_check_range_table(map, reg, map->precious_table);
139
8de2f081
MB
140 return false;
141}
142
82cd9965 143static bool regmap_volatile_range(struct regmap *map, unsigned int reg,
a8f28cfa 144 size_t num)
82cd9965
LPC
145{
146 unsigned int i;
147
148 for (i = 0; i < num; i++)
149 if (!regmap_volatile(map, reg + i))
150 return false;
151
152 return true;
153}
154
9aa50750
WS
155static void regmap_format_2_6_write(struct regmap *map,
156 unsigned int reg, unsigned int val)
157{
158 u8 *out = map->work_buf;
159
160 *out = (reg << 6) | val;
161}
162
b83a313b
MB
163static void regmap_format_4_12_write(struct regmap *map,
164 unsigned int reg, unsigned int val)
165{
166 __be16 *out = map->work_buf;
167 *out = cpu_to_be16((reg << 12) | val);
168}
169
170static void regmap_format_7_9_write(struct regmap *map,
171 unsigned int reg, unsigned int val)
172{
173 __be16 *out = map->work_buf;
174 *out = cpu_to_be16((reg << 9) | val);
175}
176
7e5ec63e
LPC
177static void regmap_format_10_14_write(struct regmap *map,
178 unsigned int reg, unsigned int val)
179{
180 u8 *out = map->work_buf;
181
182 out[2] = val;
183 out[1] = (val >> 8) | (reg << 6);
184 out[0] = reg >> 2;
185}
186
d939fb9a 187static void regmap_format_8(void *buf, unsigned int val, unsigned int shift)
b83a313b
MB
188{
189 u8 *b = buf;
190
d939fb9a 191 b[0] = val << shift;
b83a313b
MB
192}
193
141eba2e 194static void regmap_format_16_be(void *buf, unsigned int val, unsigned int shift)
b83a313b
MB
195{
196 __be16 *b = buf;
197
d939fb9a 198 b[0] = cpu_to_be16(val << shift);
b83a313b
MB
199}
200
141eba2e
SW
201static void regmap_format_16_native(void *buf, unsigned int val,
202 unsigned int shift)
203{
204 *(u16 *)buf = val << shift;
205}
206
d939fb9a 207static void regmap_format_24(void *buf, unsigned int val, unsigned int shift)
ea279fc5
MR
208{
209 u8 *b = buf;
210
d939fb9a
MR
211 val <<= shift;
212
ea279fc5
MR
213 b[0] = val >> 16;
214 b[1] = val >> 8;
215 b[2] = val;
216}
217
141eba2e 218static void regmap_format_32_be(void *buf, unsigned int val, unsigned int shift)
7d5e525b
MB
219{
220 __be32 *b = buf;
221
d939fb9a 222 b[0] = cpu_to_be32(val << shift);
7d5e525b
MB
223}
224
141eba2e
SW
225static void regmap_format_32_native(void *buf, unsigned int val,
226 unsigned int shift)
227{
228 *(u32 *)buf = val << shift;
229}
230
8a819ff8 231static void regmap_parse_inplace_noop(void *buf)
b83a313b 232{
8a819ff8
MB
233}
234
235static unsigned int regmap_parse_8(const void *buf)
236{
237 const u8 *b = buf;
b83a313b
MB
238
239 return b[0];
240}
241
8a819ff8
MB
242static unsigned int regmap_parse_16_be(const void *buf)
243{
244 const __be16 *b = buf;
245
246 return be16_to_cpu(b[0]);
247}
248
249static void regmap_parse_16_be_inplace(void *buf)
b83a313b
MB
250{
251 __be16 *b = buf;
252
253 b[0] = be16_to_cpu(b[0]);
b83a313b
MB
254}
255
8a819ff8 256static unsigned int regmap_parse_16_native(const void *buf)
141eba2e
SW
257{
258 return *(u16 *)buf;
259}
260
8a819ff8 261static unsigned int regmap_parse_24(const void *buf)
ea279fc5 262{
8a819ff8 263 const u8 *b = buf;
ea279fc5
MR
264 unsigned int ret = b[2];
265 ret |= ((unsigned int)b[1]) << 8;
266 ret |= ((unsigned int)b[0]) << 16;
267
268 return ret;
269}
270
8a819ff8
MB
271static unsigned int regmap_parse_32_be(const void *buf)
272{
273 const __be32 *b = buf;
274
275 return be32_to_cpu(b[0]);
276}
277
278static void regmap_parse_32_be_inplace(void *buf)
7d5e525b
MB
279{
280 __be32 *b = buf;
281
282 b[0] = be32_to_cpu(b[0]);
7d5e525b
MB
283}
284
8a819ff8 285static unsigned int regmap_parse_32_native(const void *buf)
141eba2e
SW
286{
287 return *(u32 *)buf;
288}
289
0d4529c5 290static void regmap_lock_mutex(void *__map)
bacdbe07 291{
0d4529c5 292 struct regmap *map = __map;
bacdbe07
SW
293 mutex_lock(&map->mutex);
294}
295
0d4529c5 296static void regmap_unlock_mutex(void *__map)
bacdbe07 297{
0d4529c5 298 struct regmap *map = __map;
bacdbe07
SW
299 mutex_unlock(&map->mutex);
300}
301
0d4529c5 302static void regmap_lock_spinlock(void *__map)
bacdbe07 303{
0d4529c5 304 struct regmap *map = __map;
bacdbe07
SW
305 spin_lock(&map->spinlock);
306}
307
0d4529c5 308static void regmap_unlock_spinlock(void *__map)
bacdbe07 309{
0d4529c5 310 struct regmap *map = __map;
bacdbe07
SW
311 spin_unlock(&map->spinlock);
312}
313
72b39f6f
MB
314static void dev_get_regmap_release(struct device *dev, void *res)
315{
316 /*
317 * We don't actually have anything to do here; the goal here
318 * is not to manage the regmap but to provide a simple way to
319 * get the regmap back given a struct device.
320 */
321}
322
6863ca62
KG
323static bool _regmap_range_add(struct regmap *map,
324 struct regmap_range_node *data)
325{
326 struct rb_root *root = &map->range_tree;
327 struct rb_node **new = &(root->rb_node), *parent = NULL;
328
329 while (*new) {
330 struct regmap_range_node *this =
331 container_of(*new, struct regmap_range_node, node);
332
333 parent = *new;
334 if (data->range_max < this->range_min)
335 new = &((*new)->rb_left);
336 else if (data->range_min > this->range_max)
337 new = &((*new)->rb_right);
338 else
339 return false;
340 }
341
342 rb_link_node(&data->node, parent, new);
343 rb_insert_color(&data->node, root);
344
345 return true;
346}
347
348static struct regmap_range_node *_regmap_range_lookup(struct regmap *map,
349 unsigned int reg)
350{
351 struct rb_node *node = map->range_tree.rb_node;
352
353 while (node) {
354 struct regmap_range_node *this =
355 container_of(node, struct regmap_range_node, node);
356
357 if (reg < this->range_min)
358 node = node->rb_left;
359 else if (reg > this->range_max)
360 node = node->rb_right;
361 else
362 return this;
363 }
364
365 return NULL;
366}
367
368static void regmap_range_exit(struct regmap *map)
369{
370 struct rb_node *next;
371 struct regmap_range_node *range_node;
372
373 next = rb_first(&map->range_tree);
374 while (next) {
375 range_node = rb_entry(next, struct regmap_range_node, node);
376 next = rb_next(&range_node->node);
377 rb_erase(&range_node->node, &map->range_tree);
378 kfree(range_node);
379 }
380
381 kfree(map->selector_work_buf);
382}
383
b83a313b
MB
384/**
385 * regmap_init(): Initialise register map
386 *
387 * @dev: Device that will be interacted with
388 * @bus: Bus-specific callbacks to use with device
0135bbcc 389 * @bus_context: Data passed to bus-specific callbacks
b83a313b
MB
390 * @config: Configuration for register map
391 *
392 * The return value will be an ERR_PTR() on error or a valid pointer to
393 * a struct regmap. This function should generally not be called
394 * directly, it should be called by bus-specific init functions.
395 */
396struct regmap *regmap_init(struct device *dev,
397 const struct regmap_bus *bus,
0135bbcc 398 void *bus_context,
b83a313b
MB
399 const struct regmap_config *config)
400{
72b39f6f 401 struct regmap *map, **m;
b83a313b 402 int ret = -EINVAL;
141eba2e 403 enum regmap_endian reg_endian, val_endian;
6863ca62 404 int i, j;
b83a313b 405
d2a5884a 406 if (!config)
abbb18fb 407 goto err;
b83a313b
MB
408
409 map = kzalloc(sizeof(*map), GFP_KERNEL);
410 if (map == NULL) {
411 ret = -ENOMEM;
412 goto err;
413 }
414
0d4529c5
DC
415 if (config->lock && config->unlock) {
416 map->lock = config->lock;
417 map->unlock = config->unlock;
418 map->lock_arg = config->lock_arg;
bacdbe07 419 } else {
d2a5884a
AS
420 if ((bus && bus->fast_io) ||
421 config->fast_io) {
0d4529c5
DC
422 spin_lock_init(&map->spinlock);
423 map->lock = regmap_lock_spinlock;
424 map->unlock = regmap_unlock_spinlock;
425 } else {
426 mutex_init(&map->mutex);
427 map->lock = regmap_lock_mutex;
428 map->unlock = regmap_unlock_mutex;
429 }
430 map->lock_arg = map;
bacdbe07 431 }
c212accc 432 map->format.reg_bytes = DIV_ROUND_UP(config->reg_bits, 8);
82159ba8 433 map->format.pad_bytes = config->pad_bits / 8;
c212accc 434 map->format.val_bytes = DIV_ROUND_UP(config->val_bits, 8);
5494a98f
FE
435 map->format.buf_size = DIV_ROUND_UP(config->reg_bits +
436 config->val_bits + config->pad_bits, 8);
d939fb9a 437 map->reg_shift = config->pad_bits % 8;
f01ee60f
SW
438 if (config->reg_stride)
439 map->reg_stride = config->reg_stride;
440 else
441 map->reg_stride = 1;
2e33caf1 442 map->use_single_rw = config->use_single_rw;
b83a313b
MB
443 map->dev = dev;
444 map->bus = bus;
0135bbcc 445 map->bus_context = bus_context;
2e2ae66d 446 map->max_register = config->max_register;
76aad392
DC
447 map->wr_table = config->wr_table;
448 map->rd_table = config->rd_table;
449 map->volatile_table = config->volatile_table;
450 map->precious_table = config->precious_table;
2e2ae66d
MB
451 map->writeable_reg = config->writeable_reg;
452 map->readable_reg = config->readable_reg;
453 map->volatile_reg = config->volatile_reg;
2efe1642 454 map->precious_reg = config->precious_reg;
5d1729e7 455 map->cache_type = config->cache_type;
72b39f6f 456 map->name = config->name;
b83a313b 457
0d509f2b
MB
458 spin_lock_init(&map->async_lock);
459 INIT_LIST_HEAD(&map->async_list);
460 init_waitqueue_head(&map->async_waitq);
461
6f306441
LPC
462 if (config->read_flag_mask || config->write_flag_mask) {
463 map->read_flag_mask = config->read_flag_mask;
464 map->write_flag_mask = config->write_flag_mask;
d2a5884a 465 } else if (bus) {
6f306441
LPC
466 map->read_flag_mask = bus->read_flag_mask;
467 }
468
d2a5884a
AS
469 if (!bus) {
470 map->reg_read = config->reg_read;
471 map->reg_write = config->reg_write;
472
473 map->defer_caching = false;
474 goto skip_format_initialization;
475 } else {
476 map->reg_read = _regmap_bus_read;
477 }
ad278406 478
141eba2e
SW
479 reg_endian = config->reg_format_endian;
480 if (reg_endian == REGMAP_ENDIAN_DEFAULT)
481 reg_endian = bus->reg_format_endian_default;
482 if (reg_endian == REGMAP_ENDIAN_DEFAULT)
483 reg_endian = REGMAP_ENDIAN_BIG;
484
485 val_endian = config->val_format_endian;
486 if (val_endian == REGMAP_ENDIAN_DEFAULT)
487 val_endian = bus->val_format_endian_default;
488 if (val_endian == REGMAP_ENDIAN_DEFAULT)
489 val_endian = REGMAP_ENDIAN_BIG;
490
d939fb9a 491 switch (config->reg_bits + map->reg_shift) {
9aa50750
WS
492 case 2:
493 switch (config->val_bits) {
494 case 6:
495 map->format.format_write = regmap_format_2_6_write;
496 break;
497 default:
498 goto err_map;
499 }
500 break;
501
b83a313b
MB
502 case 4:
503 switch (config->val_bits) {
504 case 12:
505 map->format.format_write = regmap_format_4_12_write;
506 break;
507 default:
508 goto err_map;
509 }
510 break;
511
512 case 7:
513 switch (config->val_bits) {
514 case 9:
515 map->format.format_write = regmap_format_7_9_write;
516 break;
517 default:
518 goto err_map;
519 }
520 break;
521
7e5ec63e
LPC
522 case 10:
523 switch (config->val_bits) {
524 case 14:
525 map->format.format_write = regmap_format_10_14_write;
526 break;
527 default:
528 goto err_map;
529 }
530 break;
531
b83a313b
MB
532 case 8:
533 map->format.format_reg = regmap_format_8;
534 break;
535
536 case 16:
141eba2e
SW
537 switch (reg_endian) {
538 case REGMAP_ENDIAN_BIG:
539 map->format.format_reg = regmap_format_16_be;
540 break;
541 case REGMAP_ENDIAN_NATIVE:
542 map->format.format_reg = regmap_format_16_native;
543 break;
544 default:
545 goto err_map;
546 }
b83a313b
MB
547 break;
548
237019e7
LPC
549 case 24:
550 if (reg_endian != REGMAP_ENDIAN_BIG)
551 goto err_map;
552 map->format.format_reg = regmap_format_24;
553 break;
554
7d5e525b 555 case 32:
141eba2e
SW
556 switch (reg_endian) {
557 case REGMAP_ENDIAN_BIG:
558 map->format.format_reg = regmap_format_32_be;
559 break;
560 case REGMAP_ENDIAN_NATIVE:
561 map->format.format_reg = regmap_format_32_native;
562 break;
563 default:
564 goto err_map;
565 }
7d5e525b
MB
566 break;
567
b83a313b
MB
568 default:
569 goto err_map;
570 }
571
8a819ff8
MB
572 if (val_endian == REGMAP_ENDIAN_NATIVE)
573 map->format.parse_inplace = regmap_parse_inplace_noop;
574
b83a313b
MB
575 switch (config->val_bits) {
576 case 8:
577 map->format.format_val = regmap_format_8;
578 map->format.parse_val = regmap_parse_8;
8a819ff8 579 map->format.parse_inplace = regmap_parse_inplace_noop;
b83a313b
MB
580 break;
581 case 16:
141eba2e
SW
582 switch (val_endian) {
583 case REGMAP_ENDIAN_BIG:
584 map->format.format_val = regmap_format_16_be;
585 map->format.parse_val = regmap_parse_16_be;
8a819ff8 586 map->format.parse_inplace = regmap_parse_16_be_inplace;
141eba2e
SW
587 break;
588 case REGMAP_ENDIAN_NATIVE:
589 map->format.format_val = regmap_format_16_native;
590 map->format.parse_val = regmap_parse_16_native;
591 break;
592 default:
593 goto err_map;
594 }
b83a313b 595 break;
ea279fc5 596 case 24:
141eba2e
SW
597 if (val_endian != REGMAP_ENDIAN_BIG)
598 goto err_map;
ea279fc5
MR
599 map->format.format_val = regmap_format_24;
600 map->format.parse_val = regmap_parse_24;
601 break;
7d5e525b 602 case 32:
141eba2e
SW
603 switch (val_endian) {
604 case REGMAP_ENDIAN_BIG:
605 map->format.format_val = regmap_format_32_be;
606 map->format.parse_val = regmap_parse_32_be;
8a819ff8 607 map->format.parse_inplace = regmap_parse_32_be_inplace;
141eba2e
SW
608 break;
609 case REGMAP_ENDIAN_NATIVE:
610 map->format.format_val = regmap_format_32_native;
611 map->format.parse_val = regmap_parse_32_native;
612 break;
613 default:
614 goto err_map;
615 }
7d5e525b 616 break;
b83a313b
MB
617 }
618
141eba2e
SW
619 if (map->format.format_write) {
620 if ((reg_endian != REGMAP_ENDIAN_BIG) ||
621 (val_endian != REGMAP_ENDIAN_BIG))
622 goto err_map;
7a647614 623 map->use_single_rw = true;
141eba2e 624 }
7a647614 625
b83a313b
MB
626 if (!map->format.format_write &&
627 !(map->format.format_reg && map->format.format_val))
628 goto err_map;
629
82159ba8 630 map->work_buf = kzalloc(map->format.buf_size, GFP_KERNEL);
b83a313b
MB
631 if (map->work_buf == NULL) {
632 ret = -ENOMEM;
5204f5e3 633 goto err_map;
b83a313b
MB
634 }
635
d2a5884a
AS
636 if (map->format.format_write) {
637 map->defer_caching = false;
07c320dc 638 map->reg_write = _regmap_bus_formatted_write;
d2a5884a
AS
639 } else if (map->format.format_val) {
640 map->defer_caching = true;
07c320dc 641 map->reg_write = _regmap_bus_raw_write;
d2a5884a
AS
642 }
643
644skip_format_initialization:
07c320dc 645
6863ca62 646 map->range_tree = RB_ROOT;
e3549cd0 647 for (i = 0; i < config->num_ranges; i++) {
6863ca62
KG
648 const struct regmap_range_cfg *range_cfg = &config->ranges[i];
649 struct regmap_range_node *new;
650
651 /* Sanity check */
061adc06
MB
652 if (range_cfg->range_max < range_cfg->range_min) {
653 dev_err(map->dev, "Invalid range %d: %d < %d\n", i,
654 range_cfg->range_max, range_cfg->range_min);
6863ca62 655 goto err_range;
061adc06
MB
656 }
657
658 if (range_cfg->range_max > map->max_register) {
659 dev_err(map->dev, "Invalid range %d: %d > %d\n", i,
660 range_cfg->range_max, map->max_register);
661 goto err_range;
662 }
663
664 if (range_cfg->selector_reg > map->max_register) {
665 dev_err(map->dev,
666 "Invalid range %d: selector out of map\n", i);
667 goto err_range;
668 }
669
670 if (range_cfg->window_len == 0) {
671 dev_err(map->dev, "Invalid range %d: window_len 0\n",
672 i);
673 goto err_range;
674 }
6863ca62
KG
675
676 /* Make sure, that this register range has no selector
677 or data window within its boundary */
e3549cd0 678 for (j = 0; j < config->num_ranges; j++) {
6863ca62
KG
679 unsigned sel_reg = config->ranges[j].selector_reg;
680 unsigned win_min = config->ranges[j].window_start;
681 unsigned win_max = win_min +
682 config->ranges[j].window_len - 1;
683
684 if (range_cfg->range_min <= sel_reg &&
685 sel_reg <= range_cfg->range_max) {
061adc06
MB
686 dev_err(map->dev,
687 "Range %d: selector for %d in window\n",
688 i, j);
6863ca62
KG
689 goto err_range;
690 }
691
692 if (!(win_max < range_cfg->range_min ||
693 win_min > range_cfg->range_max)) {
061adc06
MB
694 dev_err(map->dev,
695 "Range %d: window for %d in window\n",
696 i, j);
6863ca62
KG
697 goto err_range;
698 }
699 }
700
701 new = kzalloc(sizeof(*new), GFP_KERNEL);
702 if (new == NULL) {
703 ret = -ENOMEM;
704 goto err_range;
705 }
706
4b020b3f 707 new->map = map;
d058bb49 708 new->name = range_cfg->name;
6863ca62
KG
709 new->range_min = range_cfg->range_min;
710 new->range_max = range_cfg->range_max;
711 new->selector_reg = range_cfg->selector_reg;
712 new->selector_mask = range_cfg->selector_mask;
713 new->selector_shift = range_cfg->selector_shift;
714 new->window_start = range_cfg->window_start;
715 new->window_len = range_cfg->window_len;
716
717 if (_regmap_range_add(map, new) == false) {
061adc06 718 dev_err(map->dev, "Failed to add range %d\n", i);
6863ca62
KG
719 kfree(new);
720 goto err_range;
721 }
722
723 if (map->selector_work_buf == NULL) {
724 map->selector_work_buf =
725 kzalloc(map->format.buf_size, GFP_KERNEL);
726 if (map->selector_work_buf == NULL) {
727 ret = -ENOMEM;
728 goto err_range;
729 }
730 }
731 }
052d2cd1 732
c6432ea9
DP
733 regmap_debugfs_init(map, config->name);
734
e5e3b8ab 735 ret = regcache_init(map, config);
0ff3e62f 736 if (ret != 0)
6863ca62
KG
737 goto err_range;
738
72b39f6f
MB
739 /* Add a devres resource for dev_get_regmap() */
740 m = devres_alloc(dev_get_regmap_release, sizeof(*m), GFP_KERNEL);
741 if (!m) {
742 ret = -ENOMEM;
6863ca62 743 goto err_debugfs;
72b39f6f
MB
744 }
745 *m = map;
746 devres_add(dev, m);
747
b83a313b
MB
748 return map;
749
bfaa25f3
SW
750err_debugfs:
751 regmap_debugfs_exit(map);
72b39f6f 752 regcache_exit(map);
6863ca62
KG
753err_range:
754 regmap_range_exit(map);
58072cbf 755 kfree(map->work_buf);
b83a313b
MB
756err_map:
757 kfree(map);
758err:
759 return ERR_PTR(ret);
760}
761EXPORT_SYMBOL_GPL(regmap_init);
762
c0eb4676
MB
763static void devm_regmap_release(struct device *dev, void *res)
764{
765 regmap_exit(*(struct regmap **)res);
766}
767
768/**
769 * devm_regmap_init(): Initialise managed register map
770 *
771 * @dev: Device that will be interacted with
772 * @bus: Bus-specific callbacks to use with device
0135bbcc 773 * @bus_context: Data passed to bus-specific callbacks
c0eb4676
MB
774 * @config: Configuration for register map
775 *
776 * The return value will be an ERR_PTR() on error or a valid pointer
777 * to a struct regmap. This function should generally not be called
778 * directly, it should be called by bus-specific init functions. The
779 * map will be automatically freed by the device management code.
780 */
781struct regmap *devm_regmap_init(struct device *dev,
782 const struct regmap_bus *bus,
0135bbcc 783 void *bus_context,
c0eb4676
MB
784 const struct regmap_config *config)
785{
786 struct regmap **ptr, *regmap;
787
788 ptr = devres_alloc(devm_regmap_release, sizeof(*ptr), GFP_KERNEL);
789 if (!ptr)
790 return ERR_PTR(-ENOMEM);
791
0135bbcc 792 regmap = regmap_init(dev, bus, bus_context, config);
c0eb4676
MB
793 if (!IS_ERR(regmap)) {
794 *ptr = regmap;
795 devres_add(dev, ptr);
796 } else {
797 devres_free(ptr);
798 }
799
800 return regmap;
801}
802EXPORT_SYMBOL_GPL(devm_regmap_init);
803
bf315173
MB
804/**
805 * regmap_reinit_cache(): Reinitialise the current register cache
806 *
807 * @map: Register map to operate on.
808 * @config: New configuration. Only the cache data will be used.
809 *
810 * Discard any existing register cache for the map and initialize a
811 * new cache. This can be used to restore the cache to defaults or to
812 * update the cache configuration to reflect runtime discovery of the
813 * hardware.
4d879514
DP
814 *
815 * No explicit locking is done here, the user needs to ensure that
816 * this function will not race with other calls to regmap.
bf315173
MB
817 */
818int regmap_reinit_cache(struct regmap *map, const struct regmap_config *config)
819{
bf315173 820 regcache_exit(map);
a24f64a6 821 regmap_debugfs_exit(map);
bf315173
MB
822
823 map->max_register = config->max_register;
824 map->writeable_reg = config->writeable_reg;
825 map->readable_reg = config->readable_reg;
826 map->volatile_reg = config->volatile_reg;
827 map->precious_reg = config->precious_reg;
828 map->cache_type = config->cache_type;
829
d3c242e1 830 regmap_debugfs_init(map, config->name);
a24f64a6 831
421e8d2d
MB
832 map->cache_bypass = false;
833 map->cache_only = false;
834
4d879514 835 return regcache_init(map, config);
bf315173 836}
752a6a5f 837EXPORT_SYMBOL_GPL(regmap_reinit_cache);
bf315173 838
b83a313b
MB
839/**
840 * regmap_exit(): Free a previously allocated register map
841 */
842void regmap_exit(struct regmap *map)
843{
5d1729e7 844 regcache_exit(map);
31244e39 845 regmap_debugfs_exit(map);
6863ca62 846 regmap_range_exit(map);
d2a5884a 847 if (map->bus && map->bus->free_context)
0135bbcc 848 map->bus->free_context(map->bus_context);
b83a313b 849 kfree(map->work_buf);
b83a313b
MB
850 kfree(map);
851}
852EXPORT_SYMBOL_GPL(regmap_exit);
853
72b39f6f
MB
854static int dev_get_regmap_match(struct device *dev, void *res, void *data)
855{
856 struct regmap **r = res;
857 if (!r || !*r) {
858 WARN_ON(!r || !*r);
859 return 0;
860 }
861
862 /* If the user didn't specify a name match any */
863 if (data)
864 return (*r)->name == data;
865 else
866 return 1;
867}
868
869/**
870 * dev_get_regmap(): Obtain the regmap (if any) for a device
871 *
872 * @dev: Device to retrieve the map for
873 * @name: Optional name for the register map, usually NULL.
874 *
875 * Returns the regmap for the device if one is present, or NULL. If
876 * name is specified then it must match the name specified when
877 * registering the device, if it is NULL then the first regmap found
878 * will be used. Devices with multiple register maps are very rare,
879 * generic code should normally not need to specify a name.
880 */
881struct regmap *dev_get_regmap(struct device *dev, const char *name)
882{
883 struct regmap **r = devres_find(dev, dev_get_regmap_release,
884 dev_get_regmap_match, (void *)name);
885
886 if (!r)
887 return NULL;
888 return *r;
889}
890EXPORT_SYMBOL_GPL(dev_get_regmap);
891
6863ca62 892static int _regmap_select_page(struct regmap *map, unsigned int *reg,
98bc7dfd 893 struct regmap_range_node *range,
6863ca62
KG
894 unsigned int val_num)
895{
6863ca62
KG
896 void *orig_work_buf;
897 unsigned int win_offset;
898 unsigned int win_page;
899 bool page_chg;
900 int ret;
901
98bc7dfd
MB
902 win_offset = (*reg - range->range_min) % range->window_len;
903 win_page = (*reg - range->range_min) / range->window_len;
6863ca62 904
98bc7dfd
MB
905 if (val_num > 1) {
906 /* Bulk write shouldn't cross range boundary */
907 if (*reg + val_num - 1 > range->range_max)
908 return -EINVAL;
6863ca62 909
98bc7dfd
MB
910 /* ... or single page boundary */
911 if (val_num > range->window_len - win_offset)
912 return -EINVAL;
913 }
6863ca62 914
98bc7dfd
MB
915 /* It is possible to have selector register inside data window.
916 In that case, selector register is located on every page and
917 it needs no page switching, when accessed alone. */
918 if (val_num > 1 ||
919 range->window_start + win_offset != range->selector_reg) {
920 /* Use separate work_buf during page switching */
921 orig_work_buf = map->work_buf;
922 map->work_buf = map->selector_work_buf;
6863ca62 923
98bc7dfd
MB
924 ret = _regmap_update_bits(map, range->selector_reg,
925 range->selector_mask,
926 win_page << range->selector_shift,
927 &page_chg);
632a5b01 928
98bc7dfd 929 map->work_buf = orig_work_buf;
6863ca62 930
0ff3e62f 931 if (ret != 0)
98bc7dfd 932 return ret;
6863ca62
KG
933 }
934
98bc7dfd
MB
935 *reg = range->window_start + win_offset;
936
6863ca62
KG
937 return 0;
938}
939
584de329
MB
940int _regmap_raw_write(struct regmap *map, unsigned int reg,
941 const void *val, size_t val_len, bool async)
b83a313b 942{
98bc7dfd 943 struct regmap_range_node *range;
0d509f2b 944 unsigned long flags;
6f306441 945 u8 *u8 = map->work_buf;
0d509f2b
MB
946 void *work_val = map->work_buf + map->format.reg_bytes +
947 map->format.pad_bytes;
b83a313b
MB
948 void *buf;
949 int ret = -ENOTSUPP;
950 size_t len;
73304781
MB
951 int i;
952
f1b5c5c3 953 WARN_ON(!map->bus);
d2a5884a 954
73304781
MB
955 /* Check for unwritable registers before we start */
956 if (map->writeable_reg)
957 for (i = 0; i < val_len / map->format.val_bytes; i++)
f01ee60f
SW
958 if (!map->writeable_reg(map->dev,
959 reg + (i * map->reg_stride)))
73304781 960 return -EINVAL;
b83a313b 961
c9157198
LD
962 if (!map->cache_bypass && map->format.parse_val) {
963 unsigned int ival;
964 int val_bytes = map->format.val_bytes;
965 for (i = 0; i < val_len / val_bytes; i++) {
5a08d156 966 ival = map->format.parse_val(val + (i * val_bytes));
f01ee60f
SW
967 ret = regcache_write(map, reg + (i * map->reg_stride),
968 ival);
c9157198
LD
969 if (ret) {
970 dev_err(map->dev,
6d04b8ac 971 "Error in caching of register: %x ret: %d\n",
c9157198
LD
972 reg + i, ret);
973 return ret;
974 }
975 }
976 if (map->cache_only) {
977 map->cache_dirty = true;
978 return 0;
979 }
980 }
981
98bc7dfd
MB
982 range = _regmap_range_lookup(map, reg);
983 if (range) {
8a2ceac6
MB
984 int val_num = val_len / map->format.val_bytes;
985 int win_offset = (reg - range->range_min) % range->window_len;
986 int win_residue = range->window_len - win_offset;
987
988 /* If the write goes beyond the end of the window split it */
989 while (val_num > win_residue) {
1a61cfe3 990 dev_dbg(map->dev, "Writing window %d/%zu\n",
8a2ceac6
MB
991 win_residue, val_len / map->format.val_bytes);
992 ret = _regmap_raw_write(map, reg, val, win_residue *
0d509f2b 993 map->format.val_bytes, async);
8a2ceac6
MB
994 if (ret != 0)
995 return ret;
996
997 reg += win_residue;
998 val_num -= win_residue;
999 val += win_residue * map->format.val_bytes;
1000 val_len -= win_residue * map->format.val_bytes;
1001
1002 win_offset = (reg - range->range_min) %
1003 range->window_len;
1004 win_residue = range->window_len - win_offset;
1005 }
1006
1007 ret = _regmap_select_page(map, &reg, range, val_num);
0ff3e62f 1008 if (ret != 0)
98bc7dfd
MB
1009 return ret;
1010 }
6863ca62 1011
d939fb9a 1012 map->format.format_reg(map->work_buf, reg, map->reg_shift);
b83a313b 1013
6f306441
LPC
1014 u8[0] |= map->write_flag_mask;
1015
0d509f2b
MB
1016 if (async && map->bus->async_write) {
1017 struct regmap_async *async = map->bus->async_alloc();
1018 if (!async)
1019 return -ENOMEM;
1020
fe7d4ccd
MB
1021 trace_regmap_async_write_start(map->dev, reg, val_len);
1022
0d509f2b
MB
1023 async->work_buf = kzalloc(map->format.buf_size,
1024 GFP_KERNEL | GFP_DMA);
1025 if (!async->work_buf) {
1026 kfree(async);
1027 return -ENOMEM;
1028 }
1029
1030 INIT_WORK(&async->cleanup, async_cleanup);
1031 async->map = map;
1032
1033 /* If the caller supplied the value we can use it safely. */
1034 memcpy(async->work_buf, map->work_buf, map->format.pad_bytes +
1035 map->format.reg_bytes + map->format.val_bytes);
1036 if (val == work_val)
1037 val = async->work_buf + map->format.pad_bytes +
1038 map->format.reg_bytes;
1039
1040 spin_lock_irqsave(&map->async_lock, flags);
1041 list_add_tail(&async->list, &map->async_list);
1042 spin_unlock_irqrestore(&map->async_lock, flags);
1043
1044 ret = map->bus->async_write(map->bus_context, async->work_buf,
1045 map->format.reg_bytes +
1046 map->format.pad_bytes,
1047 val, val_len, async);
1048
1049 if (ret != 0) {
1050 dev_err(map->dev, "Failed to schedule write: %d\n",
1051 ret);
1052
1053 spin_lock_irqsave(&map->async_lock, flags);
1054 list_del(&async->list);
1055 spin_unlock_irqrestore(&map->async_lock, flags);
1056
1057 kfree(async->work_buf);
1058 kfree(async);
1059 }
f951b658
MB
1060
1061 return ret;
0d509f2b
MB
1062 }
1063
fb2736bb
MB
1064 trace_regmap_hw_write_start(map->dev, reg,
1065 val_len / map->format.val_bytes);
1066
2547e201
MB
1067 /* If we're doing a single register write we can probably just
1068 * send the work_buf directly, otherwise try to do a gather
1069 * write.
1070 */
0d509f2b 1071 if (val == work_val)
0135bbcc 1072 ret = map->bus->write(map->bus_context, map->work_buf,
82159ba8
MB
1073 map->format.reg_bytes +
1074 map->format.pad_bytes +
1075 val_len);
2547e201 1076 else if (map->bus->gather_write)
0135bbcc 1077 ret = map->bus->gather_write(map->bus_context, map->work_buf,
82159ba8
MB
1078 map->format.reg_bytes +
1079 map->format.pad_bytes,
b83a313b
MB
1080 val, val_len);
1081
2547e201 1082 /* If that didn't work fall back on linearising by hand. */
b83a313b 1083 if (ret == -ENOTSUPP) {
82159ba8
MB
1084 len = map->format.reg_bytes + map->format.pad_bytes + val_len;
1085 buf = kzalloc(len, GFP_KERNEL);
b83a313b
MB
1086 if (!buf)
1087 return -ENOMEM;
1088
1089 memcpy(buf, map->work_buf, map->format.reg_bytes);
82159ba8
MB
1090 memcpy(buf + map->format.reg_bytes + map->format.pad_bytes,
1091 val, val_len);
0135bbcc 1092 ret = map->bus->write(map->bus_context, buf, len);
b83a313b
MB
1093
1094 kfree(buf);
1095 }
1096
fb2736bb
MB
1097 trace_regmap_hw_write_done(map->dev, reg,
1098 val_len / map->format.val_bytes);
1099
b83a313b
MB
1100 return ret;
1101}
1102
221ad7f2
MB
1103/**
1104 * regmap_can_raw_write - Test if regmap_raw_write() is supported
1105 *
1106 * @map: Map to check.
1107 */
1108bool regmap_can_raw_write(struct regmap *map)
1109{
1110 return map->bus && map->format.format_val && map->format.format_reg;
1111}
1112EXPORT_SYMBOL_GPL(regmap_can_raw_write);
1113
07c320dc
AS
1114static int _regmap_bus_formatted_write(void *context, unsigned int reg,
1115 unsigned int val)
1116{
1117 int ret;
1118 struct regmap_range_node *range;
1119 struct regmap *map = context;
1120
f1b5c5c3 1121 WARN_ON(!map->bus || !map->format.format_write);
07c320dc
AS
1122
1123 range = _regmap_range_lookup(map, reg);
1124 if (range) {
1125 ret = _regmap_select_page(map, &reg, range, 1);
1126 if (ret != 0)
1127 return ret;
1128 }
1129
1130 map->format.format_write(map, reg, val);
1131
1132 trace_regmap_hw_write_start(map->dev, reg, 1);
1133
1134 ret = map->bus->write(map->bus_context, map->work_buf,
1135 map->format.buf_size);
1136
1137 trace_regmap_hw_write_done(map->dev, reg, 1);
1138
1139 return ret;
1140}
1141
1142static int _regmap_bus_raw_write(void *context, unsigned int reg,
1143 unsigned int val)
1144{
1145 struct regmap *map = context;
1146
f1b5c5c3 1147 WARN_ON(!map->bus || !map->format.format_val);
07c320dc
AS
1148
1149 map->format.format_val(map->work_buf + map->format.reg_bytes
1150 + map->format.pad_bytes, val, 0);
1151 return _regmap_raw_write(map, reg,
1152 map->work_buf +
1153 map->format.reg_bytes +
1154 map->format.pad_bytes,
0d509f2b 1155 map->format.val_bytes, false);
07c320dc
AS
1156}
1157
d2a5884a
AS
1158static inline void *_regmap_map_get_context(struct regmap *map)
1159{
1160 return (map->bus) ? map : map->bus_context;
1161}
1162
4d2dc095
DP
1163int _regmap_write(struct regmap *map, unsigned int reg,
1164 unsigned int val)
b83a313b 1165{
fb2736bb 1166 int ret;
d2a5884a 1167 void *context = _regmap_map_get_context(map);
b83a313b 1168
d2a5884a 1169 if (!map->cache_bypass && !map->defer_caching) {
5d1729e7
DP
1170 ret = regcache_write(map, reg, val);
1171 if (ret != 0)
1172 return ret;
8ae0d7e8
MB
1173 if (map->cache_only) {
1174 map->cache_dirty = true;
5d1729e7 1175 return 0;
8ae0d7e8 1176 }
5d1729e7
DP
1177 }
1178
1044c180
MB
1179#ifdef LOG_DEVICE
1180 if (strcmp(dev_name(map->dev), LOG_DEVICE) == 0)
1181 dev_info(map->dev, "%x <= %x\n", reg, val);
1182#endif
1183
fb2736bb
MB
1184 trace_regmap_reg_write(map->dev, reg, val);
1185
d2a5884a 1186 return map->reg_write(context, reg, val);
b83a313b
MB
1187}
1188
1189/**
1190 * regmap_write(): Write a value to a single register
1191 *
1192 * @map: Register map to write to
1193 * @reg: Register to write to
1194 * @val: Value to be written
1195 *
1196 * A value of zero will be returned on success, a negative errno will
1197 * be returned in error cases.
1198 */
1199int regmap_write(struct regmap *map, unsigned int reg, unsigned int val)
1200{
1201 int ret;
1202
f01ee60f
SW
1203 if (reg % map->reg_stride)
1204 return -EINVAL;
1205
0d4529c5 1206 map->lock(map->lock_arg);
b83a313b
MB
1207
1208 ret = _regmap_write(map, reg, val);
1209
0d4529c5 1210 map->unlock(map->lock_arg);
b83a313b
MB
1211
1212 return ret;
1213}
1214EXPORT_SYMBOL_GPL(regmap_write);
1215
1216/**
1217 * regmap_raw_write(): Write raw values to one or more registers
1218 *
1219 * @map: Register map to write to
1220 * @reg: Initial register to write to
1221 * @val: Block of data to be written, laid out for direct transmission to the
1222 * device
1223 * @val_len: Length of data pointed to by val.
1224 *
1225 * This function is intended to be used for things like firmware
1226 * download where a large block of data needs to be transferred to the
1227 * device. No formatting will be done on the data provided.
1228 *
1229 * A value of zero will be returned on success, a negative errno will
1230 * be returned in error cases.
1231 */
1232int regmap_raw_write(struct regmap *map, unsigned int reg,
1233 const void *val, size_t val_len)
1234{
1235 int ret;
1236
221ad7f2 1237 if (!regmap_can_raw_write(map))
d2a5884a 1238 return -EINVAL;
851960ba
SW
1239 if (val_len % map->format.val_bytes)
1240 return -EINVAL;
1241
0d4529c5 1242 map->lock(map->lock_arg);
b83a313b 1243
0d509f2b 1244 ret = _regmap_raw_write(map, reg, val, val_len, false);
b83a313b 1245
0d4529c5 1246 map->unlock(map->lock_arg);
b83a313b
MB
1247
1248 return ret;
1249}
1250EXPORT_SYMBOL_GPL(regmap_raw_write);
1251
8eaeb219
LD
1252/*
1253 * regmap_bulk_write(): Write multiple registers to the device
1254 *
1255 * @map: Register map to write to
1256 * @reg: First register to be write from
1257 * @val: Block of data to be written, in native register size for device
1258 * @val_count: Number of registers to write
1259 *
1260 * This function is intended to be used for writing a large block of
31b35e9e 1261 * data to the device either in single transfer or multiple transfer.
8eaeb219
LD
1262 *
1263 * A value of zero will be returned on success, a negative errno will
1264 * be returned in error cases.
1265 */
1266int regmap_bulk_write(struct regmap *map, unsigned int reg, const void *val,
1267 size_t val_count)
1268{
1269 int ret = 0, i;
1270 size_t val_bytes = map->format.val_bytes;
1271 void *wval;
1272
d2a5884a
AS
1273 if (!map->bus)
1274 return -EINVAL;
8a819ff8 1275 if (!map->format.parse_inplace)
8eaeb219 1276 return -EINVAL;
f01ee60f
SW
1277 if (reg % map->reg_stride)
1278 return -EINVAL;
8eaeb219 1279
0d4529c5 1280 map->lock(map->lock_arg);
8eaeb219
LD
1281
1282 /* No formatting is require if val_byte is 1 */
1283 if (val_bytes == 1) {
1284 wval = (void *)val;
1285 } else {
1286 wval = kmemdup(val, val_count * val_bytes, GFP_KERNEL);
1287 if (!wval) {
1288 ret = -ENOMEM;
1289 dev_err(map->dev, "Error in memory allocation\n");
1290 goto out;
1291 }
1292 for (i = 0; i < val_count * val_bytes; i += val_bytes)
8a819ff8 1293 map->format.parse_inplace(wval + i);
8eaeb219 1294 }
2e33caf1
AJ
1295 /*
1296 * Some devices does not support bulk write, for
1297 * them we have a series of single write operations.
1298 */
1299 if (map->use_single_rw) {
1300 for (i = 0; i < val_count; i++) {
1301 ret = regmap_raw_write(map,
0d509f2b
MB
1302 reg + (i * map->reg_stride),
1303 val + (i * val_bytes),
1304 val_bytes);
2e33caf1
AJ
1305 if (ret != 0)
1306 return ret;
1307 }
1308 } else {
0d509f2b
MB
1309 ret = _regmap_raw_write(map, reg, wval, val_bytes * val_count,
1310 false);
2e33caf1 1311 }
8eaeb219
LD
1312
1313 if (val_bytes != 1)
1314 kfree(wval);
1315
1316out:
0d4529c5 1317 map->unlock(map->lock_arg);
8eaeb219
LD
1318 return ret;
1319}
1320EXPORT_SYMBOL_GPL(regmap_bulk_write);
1321
0d509f2b
MB
1322/**
1323 * regmap_raw_write_async(): Write raw values to one or more registers
1324 * asynchronously
1325 *
1326 * @map: Register map to write to
1327 * @reg: Initial register to write to
1328 * @val: Block of data to be written, laid out for direct transmission to the
1329 * device. Must be valid until regmap_async_complete() is called.
1330 * @val_len: Length of data pointed to by val.
1331 *
1332 * This function is intended to be used for things like firmware
1333 * download where a large block of data needs to be transferred to the
1334 * device. No formatting will be done on the data provided.
1335 *
1336 * If supported by the underlying bus the write will be scheduled
1337 * asynchronously, helping maximise I/O speed on higher speed buses
1338 * like SPI. regmap_async_complete() can be called to ensure that all
1339 * asynchrnous writes have been completed.
1340 *
1341 * A value of zero will be returned on success, a negative errno will
1342 * be returned in error cases.
1343 */
1344int regmap_raw_write_async(struct regmap *map, unsigned int reg,
1345 const void *val, size_t val_len)
1346{
1347 int ret;
1348
1349 if (val_len % map->format.val_bytes)
1350 return -EINVAL;
1351 if (reg % map->reg_stride)
1352 return -EINVAL;
1353
1354 map->lock(map->lock_arg);
1355
1356 ret = _regmap_raw_write(map, reg, val, val_len, true);
1357
1358 map->unlock(map->lock_arg);
1359
1360 return ret;
1361}
1362EXPORT_SYMBOL_GPL(regmap_raw_write_async);
1363
b83a313b
MB
1364static int _regmap_raw_read(struct regmap *map, unsigned int reg, void *val,
1365 unsigned int val_len)
1366{
98bc7dfd 1367 struct regmap_range_node *range;
b83a313b
MB
1368 u8 *u8 = map->work_buf;
1369 int ret;
1370
f1b5c5c3 1371 WARN_ON(!map->bus);
d2a5884a 1372
98bc7dfd
MB
1373 range = _regmap_range_lookup(map, reg);
1374 if (range) {
1375 ret = _regmap_select_page(map, &reg, range,
1376 val_len / map->format.val_bytes);
0ff3e62f 1377 if (ret != 0)
98bc7dfd
MB
1378 return ret;
1379 }
6863ca62 1380
d939fb9a 1381 map->format.format_reg(map->work_buf, reg, map->reg_shift);
b83a313b
MB
1382
1383 /*
6f306441 1384 * Some buses or devices flag reads by setting the high bits in the
b83a313b
MB
1385 * register addresss; since it's always the high bits for all
1386 * current formats we can do this here rather than in
1387 * formatting. This may break if we get interesting formats.
1388 */
6f306441 1389 u8[0] |= map->read_flag_mask;
b83a313b 1390
fb2736bb
MB
1391 trace_regmap_hw_read_start(map->dev, reg,
1392 val_len / map->format.val_bytes);
1393
0135bbcc 1394 ret = map->bus->read(map->bus_context, map->work_buf,
82159ba8 1395 map->format.reg_bytes + map->format.pad_bytes,
40c5cc26 1396 val, val_len);
b83a313b 1397
fb2736bb
MB
1398 trace_regmap_hw_read_done(map->dev, reg,
1399 val_len / map->format.val_bytes);
1400
1401 return ret;
b83a313b
MB
1402}
1403
ad278406
AS
1404static int _regmap_bus_read(void *context, unsigned int reg,
1405 unsigned int *val)
1406{
1407 int ret;
1408 struct regmap *map = context;
1409
1410 if (!map->format.parse_val)
1411 return -EINVAL;
1412
1413 ret = _regmap_raw_read(map, reg, map->work_buf, map->format.val_bytes);
1414 if (ret == 0)
1415 *val = map->format.parse_val(map->work_buf);
1416
1417 return ret;
1418}
1419
b83a313b
MB
1420static int _regmap_read(struct regmap *map, unsigned int reg,
1421 unsigned int *val)
1422{
1423 int ret;
d2a5884a
AS
1424 void *context = _regmap_map_get_context(map);
1425
f1b5c5c3 1426 WARN_ON(!map->reg_read);
b83a313b 1427
5d1729e7
DP
1428 if (!map->cache_bypass) {
1429 ret = regcache_read(map, reg, val);
1430 if (ret == 0)
1431 return 0;
1432 }
1433
1434 if (map->cache_only)
1435 return -EBUSY;
1436
d2a5884a 1437 ret = map->reg_read(context, reg, val);
fb2736bb 1438 if (ret == 0) {
1044c180
MB
1439#ifdef LOG_DEVICE
1440 if (strcmp(dev_name(map->dev), LOG_DEVICE) == 0)
1441 dev_info(map->dev, "%x => %x\n", reg, *val);
1442#endif
1443
fb2736bb 1444 trace_regmap_reg_read(map->dev, reg, *val);
b83a313b 1445
ad278406
AS
1446 if (!map->cache_bypass)
1447 regcache_write(map, reg, *val);
1448 }
f2985367 1449
b83a313b
MB
1450 return ret;
1451}
1452
1453/**
1454 * regmap_read(): Read a value from a single register
1455 *
1456 * @map: Register map to write to
1457 * @reg: Register to be read from
1458 * @val: Pointer to store read value
1459 *
1460 * A value of zero will be returned on success, a negative errno will
1461 * be returned in error cases.
1462 */
1463int regmap_read(struct regmap *map, unsigned int reg, unsigned int *val)
1464{
1465 int ret;
1466
f01ee60f
SW
1467 if (reg % map->reg_stride)
1468 return -EINVAL;
1469
0d4529c5 1470 map->lock(map->lock_arg);
b83a313b
MB
1471
1472 ret = _regmap_read(map, reg, val);
1473
0d4529c5 1474 map->unlock(map->lock_arg);
b83a313b
MB
1475
1476 return ret;
1477}
1478EXPORT_SYMBOL_GPL(regmap_read);
1479
1480/**
1481 * regmap_raw_read(): Read raw data from the device
1482 *
1483 * @map: Register map to write to
1484 * @reg: First register to be read from
1485 * @val: Pointer to store read value
1486 * @val_len: Size of data to read
1487 *
1488 * A value of zero will be returned on success, a negative errno will
1489 * be returned in error cases.
1490 */
1491int regmap_raw_read(struct regmap *map, unsigned int reg, void *val,
1492 size_t val_len)
1493{
b8fb5ab1
MB
1494 size_t val_bytes = map->format.val_bytes;
1495 size_t val_count = val_len / val_bytes;
1496 unsigned int v;
1497 int ret, i;
04e016ad 1498
d2a5884a
AS
1499 if (!map->bus)
1500 return -EINVAL;
851960ba
SW
1501 if (val_len % map->format.val_bytes)
1502 return -EINVAL;
f01ee60f
SW
1503 if (reg % map->reg_stride)
1504 return -EINVAL;
851960ba 1505
0d4529c5 1506 map->lock(map->lock_arg);
b83a313b 1507
b8fb5ab1
MB
1508 if (regmap_volatile_range(map, reg, val_count) || map->cache_bypass ||
1509 map->cache_type == REGCACHE_NONE) {
1510 /* Physical block read if there's no cache involved */
1511 ret = _regmap_raw_read(map, reg, val, val_len);
1512
1513 } else {
1514 /* Otherwise go word by word for the cache; should be low
1515 * cost as we expect to hit the cache.
1516 */
1517 for (i = 0; i < val_count; i++) {
f01ee60f
SW
1518 ret = _regmap_read(map, reg + (i * map->reg_stride),
1519 &v);
b8fb5ab1
MB
1520 if (ret != 0)
1521 goto out;
1522
d939fb9a 1523 map->format.format_val(val + (i * val_bytes), v, 0);
b8fb5ab1
MB
1524 }
1525 }
b83a313b 1526
b8fb5ab1 1527 out:
0d4529c5 1528 map->unlock(map->lock_arg);
b83a313b
MB
1529
1530 return ret;
1531}
1532EXPORT_SYMBOL_GPL(regmap_raw_read);
1533
1534/**
1535 * regmap_bulk_read(): Read multiple registers from the device
1536 *
1537 * @map: Register map to write to
1538 * @reg: First register to be read from
1539 * @val: Pointer to store read value, in native register size for device
1540 * @val_count: Number of registers to read
1541 *
1542 * A value of zero will be returned on success, a negative errno will
1543 * be returned in error cases.
1544 */
1545int regmap_bulk_read(struct regmap *map, unsigned int reg, void *val,
1546 size_t val_count)
1547{
1548 int ret, i;
1549 size_t val_bytes = map->format.val_bytes;
82cd9965 1550 bool vol = regmap_volatile_range(map, reg, val_count);
5d1729e7 1551
d2a5884a
AS
1552 if (!map->bus)
1553 return -EINVAL;
8a819ff8 1554 if (!map->format.parse_inplace)
b83a313b 1555 return -EINVAL;
f01ee60f
SW
1556 if (reg % map->reg_stride)
1557 return -EINVAL;
b83a313b 1558
de2d808f 1559 if (vol || map->cache_type == REGCACHE_NONE) {
2e33caf1
AJ
1560 /*
1561 * Some devices does not support bulk read, for
1562 * them we have a series of single read operations.
1563 */
1564 if (map->use_single_rw) {
1565 for (i = 0; i < val_count; i++) {
1566 ret = regmap_raw_read(map,
1567 reg + (i * map->reg_stride),
1568 val + (i * val_bytes),
1569 val_bytes);
1570 if (ret != 0)
1571 return ret;
1572 }
1573 } else {
1574 ret = regmap_raw_read(map, reg, val,
1575 val_bytes * val_count);
1576 if (ret != 0)
1577 return ret;
1578 }
de2d808f
MB
1579
1580 for (i = 0; i < val_count * val_bytes; i += val_bytes)
8a819ff8 1581 map->format.parse_inplace(val + i);
de2d808f
MB
1582 } else {
1583 for (i = 0; i < val_count; i++) {
6560ffd1 1584 unsigned int ival;
f01ee60f 1585 ret = regmap_read(map, reg + (i * map->reg_stride),
25061d28 1586 &ival);
de2d808f
MB
1587 if (ret != 0)
1588 return ret;
6560ffd1 1589 memcpy(val + (i * val_bytes), &ival, val_bytes);
de2d808f
MB
1590 }
1591 }
b83a313b
MB
1592
1593 return 0;
1594}
1595EXPORT_SYMBOL_GPL(regmap_bulk_read);
1596
018690d3
MB
1597static int _regmap_update_bits(struct regmap *map, unsigned int reg,
1598 unsigned int mask, unsigned int val,
1599 bool *change)
b83a313b
MB
1600{
1601 int ret;
d91e8db2 1602 unsigned int tmp, orig;
b83a313b 1603
d91e8db2 1604 ret = _regmap_read(map, reg, &orig);
b83a313b 1605 if (ret != 0)
fc3ebd78 1606 return ret;
b83a313b 1607
d91e8db2 1608 tmp = orig & ~mask;
b83a313b
MB
1609 tmp |= val & mask;
1610
018690d3 1611 if (tmp != orig) {
d91e8db2 1612 ret = _regmap_write(map, reg, tmp);
018690d3
MB
1613 *change = true;
1614 } else {
1615 *change = false;
1616 }
b83a313b 1617
b83a313b
MB
1618 return ret;
1619}
018690d3
MB
1620
1621/**
1622 * regmap_update_bits: Perform a read/modify/write cycle on the register map
1623 *
1624 * @map: Register map to update
1625 * @reg: Register to update
1626 * @mask: Bitmask to change
1627 * @val: New value for bitmask
1628 *
1629 * Returns zero for success, a negative number on error.
1630 */
1631int regmap_update_bits(struct regmap *map, unsigned int reg,
1632 unsigned int mask, unsigned int val)
1633{
1634 bool change;
fc3ebd78
KG
1635 int ret;
1636
0d4529c5 1637 map->lock(map->lock_arg);
fc3ebd78 1638 ret = _regmap_update_bits(map, reg, mask, val, &change);
0d4529c5 1639 map->unlock(map->lock_arg);
fc3ebd78
KG
1640
1641 return ret;
018690d3 1642}
b83a313b 1643EXPORT_SYMBOL_GPL(regmap_update_bits);
31244e39 1644
018690d3
MB
1645/**
1646 * regmap_update_bits_check: Perform a read/modify/write cycle on the
1647 * register map and report if updated
1648 *
1649 * @map: Register map to update
1650 * @reg: Register to update
1651 * @mask: Bitmask to change
1652 * @val: New value for bitmask
1653 * @change: Boolean indicating if a write was done
1654 *
1655 * Returns zero for success, a negative number on error.
1656 */
1657int regmap_update_bits_check(struct regmap *map, unsigned int reg,
1658 unsigned int mask, unsigned int val,
1659 bool *change)
1660{
fc3ebd78
KG
1661 int ret;
1662
0d4529c5 1663 map->lock(map->lock_arg);
fc3ebd78 1664 ret = _regmap_update_bits(map, reg, mask, val, change);
0d4529c5 1665 map->unlock(map->lock_arg);
fc3ebd78 1666 return ret;
018690d3
MB
1667}
1668EXPORT_SYMBOL_GPL(regmap_update_bits_check);
1669
0d509f2b
MB
1670void regmap_async_complete_cb(struct regmap_async *async, int ret)
1671{
1672 struct regmap *map = async->map;
1673 bool wake;
1674
fe7d4ccd
MB
1675 trace_regmap_async_io_complete(map->dev);
1676
0d509f2b
MB
1677 spin_lock(&map->async_lock);
1678
1679 list_del(&async->list);
1680 wake = list_empty(&map->async_list);
1681
1682 if (ret != 0)
1683 map->async_ret = ret;
1684
1685 spin_unlock(&map->async_lock);
1686
1687 schedule_work(&async->cleanup);
1688
1689 if (wake)
1690 wake_up(&map->async_waitq);
1691}
f804fb56 1692EXPORT_SYMBOL_GPL(regmap_async_complete_cb);
0d509f2b
MB
1693
1694static int regmap_async_is_done(struct regmap *map)
1695{
1696 unsigned long flags;
1697 int ret;
1698
1699 spin_lock_irqsave(&map->async_lock, flags);
1700 ret = list_empty(&map->async_list);
1701 spin_unlock_irqrestore(&map->async_lock, flags);
1702
1703 return ret;
1704}
1705
1706/**
1707 * regmap_async_complete: Ensure all asynchronous I/O has completed.
1708 *
1709 * @map: Map to operate on.
1710 *
1711 * Blocks until any pending asynchronous I/O has completed. Returns
1712 * an error code for any failed I/O operations.
1713 */
1714int regmap_async_complete(struct regmap *map)
1715{
1716 unsigned long flags;
1717 int ret;
1718
1719 /* Nothing to do with no async support */
1720 if (!map->bus->async_write)
1721 return 0;
1722
fe7d4ccd
MB
1723 trace_regmap_async_complete_start(map->dev);
1724
0d509f2b
MB
1725 wait_event(map->async_waitq, regmap_async_is_done(map));
1726
1727 spin_lock_irqsave(&map->async_lock, flags);
1728 ret = map->async_ret;
1729 map->async_ret = 0;
1730 spin_unlock_irqrestore(&map->async_lock, flags);
1731
fe7d4ccd
MB
1732 trace_regmap_async_complete_done(map->dev);
1733
0d509f2b
MB
1734 return ret;
1735}
f88948ef 1736EXPORT_SYMBOL_GPL(regmap_async_complete);
0d509f2b 1737
22f0d90a
MB
1738/**
1739 * regmap_register_patch: Register and apply register updates to be applied
1740 * on device initialistion
1741 *
1742 * @map: Register map to apply updates to.
1743 * @regs: Values to update.
1744 * @num_regs: Number of entries in regs.
1745 *
1746 * Register a set of register updates to be applied to the device
1747 * whenever the device registers are synchronised with the cache and
1748 * apply them immediately. Typically this is used to apply
1749 * corrections to be applied to the device defaults on startup, such
1750 * as the updates some vendors provide to undocumented registers.
1751 */
1752int regmap_register_patch(struct regmap *map, const struct reg_default *regs,
1753 int num_regs)
1754{
1755 int i, ret;
1756 bool bypass;
1757
1758 /* If needed the implementation can be extended to support this */
1759 if (map->patch)
1760 return -EBUSY;
1761
0d4529c5 1762 map->lock(map->lock_arg);
22f0d90a
MB
1763
1764 bypass = map->cache_bypass;
1765
1766 map->cache_bypass = true;
1767
1768 /* Write out first; it's useful to apply even if we fail later. */
1769 for (i = 0; i < num_regs; i++) {
1770 ret = _regmap_write(map, regs[i].reg, regs[i].def);
1771 if (ret != 0) {
1772 dev_err(map->dev, "Failed to write %x = %x: %d\n",
1773 regs[i].reg, regs[i].def, ret);
1774 goto out;
1775 }
1776 }
1777
2a14d7d9 1778 map->patch = kcalloc(num_regs, sizeof(struct reg_default), GFP_KERNEL);
22f0d90a
MB
1779 if (map->patch != NULL) {
1780 memcpy(map->patch, regs,
1781 num_regs * sizeof(struct reg_default));
1782 map->patch_regs = num_regs;
1783 } else {
1784 ret = -ENOMEM;
1785 }
1786
1787out:
1788 map->cache_bypass = bypass;
1789
0d4529c5 1790 map->unlock(map->lock_arg);
22f0d90a
MB
1791
1792 return ret;
1793}
1794EXPORT_SYMBOL_GPL(regmap_register_patch);
1795
eae4b51b 1796/*
a6539c32
MB
1797 * regmap_get_val_bytes(): Report the size of a register value
1798 *
1799 * Report the size of a register value, mainly intended to for use by
1800 * generic infrastructure built on top of regmap.
1801 */
1802int regmap_get_val_bytes(struct regmap *map)
1803{
1804 if (map->format.format_write)
1805 return -EINVAL;
1806
1807 return map->format.val_bytes;
1808}
1809EXPORT_SYMBOL_GPL(regmap_get_val_bytes);
1810
31244e39
MB
1811static int __init regmap_initcall(void)
1812{
1813 regmap_debugfs_initcall();
1814
1815 return 0;
1816}
1817postcore_initcall(regmap_initcall);