[mirror_ubuntu-artful-kernel.git] / drivers / bcma / scan.c

/*
 * Broadcom specific AMBA
 * Bus scanning
 *
 * Licensed under the GNU/GPL. See COPYING for details.
 */

#include "scan.h"
#include "bcma_private.h"

#include <linux/bcma/bcma.h>
#include <linux/bcma/bcma_regs.h>
#include <linux/pci.h>
#include <linux/io.h>
#include <linux/dma-mapping.h>
#include <linux/slab.h>

struct bcma_device_id_name {
	u16 id;
	const char *name;
};
struct bcma_device_id_name bcma_device_names[] = {
	{ BCMA_CORE_OOB_ROUTER, "OOB Router" },
	{ BCMA_CORE_INVALID, "Invalid" },
	{ BCMA_CORE_CHIPCOMMON, "ChipCommon" },
	{ BCMA_CORE_ILINE20, "ILine 20" },
	{ BCMA_CORE_SRAM, "SRAM" },
	{ BCMA_CORE_SDRAM, "SDRAM" },
	{ BCMA_CORE_PCI, "PCI" },
	{ BCMA_CORE_MIPS, "MIPS" },
	{ BCMA_CORE_ETHERNET, "Fast Ethernet" },
	{ BCMA_CORE_V90, "V90" },
	{ BCMA_CORE_USB11_HOSTDEV, "USB 1.1 Hostdev" },
	{ BCMA_CORE_ADSL, "ADSL" },
	{ BCMA_CORE_ILINE100, "ILine 100" },
	{ BCMA_CORE_IPSEC, "IPSEC" },
	{ BCMA_CORE_UTOPIA, "UTOPIA" },
	{ BCMA_CORE_PCMCIA, "PCMCIA" },
	{ BCMA_CORE_INTERNAL_MEM, "Internal Memory" },
	{ BCMA_CORE_MEMC_SDRAM, "MEMC SDRAM" },
	{ BCMA_CORE_OFDM, "OFDM" },
	{ BCMA_CORE_EXTIF, "EXTIF" },
	{ BCMA_CORE_80211, "IEEE 802.11" },
	{ BCMA_CORE_PHY_A, "PHY A" },
	{ BCMA_CORE_PHY_B, "PHY B" },
	{ BCMA_CORE_PHY_G, "PHY G" },
	{ BCMA_CORE_MIPS_3302, "MIPS 3302" },
	{ BCMA_CORE_USB11_HOST, "USB 1.1 Host" },
	{ BCMA_CORE_USB11_DEV, "USB 1.1 Device" },
	{ BCMA_CORE_USB20_HOST, "USB 2.0 Host" },
	{ BCMA_CORE_USB20_DEV, "USB 2.0 Device" },
	{ BCMA_CORE_SDIO_HOST, "SDIO Host" },
	{ BCMA_CORE_ROBOSWITCH, "Roboswitch" },
	{ BCMA_CORE_PARA_ATA, "PATA" },
	{ BCMA_CORE_SATA_XORDMA, "SATA XOR-DMA" },
	{ BCMA_CORE_ETHERNET_GBIT, "GBit Ethernet" },
	{ BCMA_CORE_PCIE, "PCIe" },
	{ BCMA_CORE_PHY_N, "PHY N" },
	{ BCMA_CORE_SRAM_CTL, "SRAM Controller" },
	{ BCMA_CORE_MINI_MACPHY, "Mini MACPHY" },
	{ BCMA_CORE_ARM_1176, "ARM 1176" },
	{ BCMA_CORE_ARM_7TDMI, "ARM 7TDMI" },
	{ BCMA_CORE_PHY_LP, "PHY LP" },
	{ BCMA_CORE_PMU, "PMU" },
	{ BCMA_CORE_PHY_SSN, "PHY SSN" },
	{ BCMA_CORE_SDIO_DEV, "SDIO Device" },
	{ BCMA_CORE_ARM_CM3, "ARM CM3" },
	{ BCMA_CORE_PHY_HT, "PHY HT" },
	{ BCMA_CORE_MIPS_74K, "MIPS 74K" },
	{ BCMA_CORE_MAC_GBIT, "GBit MAC" },
	{ BCMA_CORE_DDR12_MEM_CTL, "DDR1/DDR2 Memory Controller" },
	{ BCMA_CORE_PCIE_RC, "PCIe Root Complex" },
	{ BCMA_CORE_OCP_OCP_BRIDGE, "OCP to OCP Bridge" },
	{ BCMA_CORE_SHARED_COMMON, "Common Shared" },
	{ BCMA_CORE_OCP_AHB_BRIDGE, "OCP to AHB Bridge" },
	{ BCMA_CORE_SPI_HOST, "SPI Host" },
	{ BCMA_CORE_I2S, "I2S" },
	{ BCMA_CORE_SDR_DDR1_MEM_CTL, "SDR/DDR1 Memory Controller" },
	{ BCMA_CORE_SHIM, "SHIM" },
	{ BCMA_CORE_DEFAULT, "Default" },
};
const char *bcma_device_name(struct bcma_device_id *id)
{
	int i;

	if (id->manuf == BCMA_MANUF_BCM) {
		for (i = 0; i < ARRAY_SIZE(bcma_device_names); i++) {
			if (bcma_device_names[i].id == id->id)
				return bcma_device_names[i].name;
		}
	}
	return "UNKNOWN";
}

static u32 bcma_scan_read32(struct bcma_bus *bus, u8 current_coreidx,
		       u16 offset)
{
	return readl(bus->mmio + offset);
}

static void bcma_scan_switch_core(struct bcma_bus *bus, u32 addr)
{
	if (bus->hosttype == BCMA_HOSTTYPE_PCI)
		pci_write_config_dword(bus->host_pci, BCMA_PCI_BAR0_WIN,
				       addr);
}

static u32 bcma_erom_get_ent(struct bcma_bus *bus, u32 **eromptr)
{
	u32 ent = readl(*eromptr);
	(*eromptr)++;
	return ent;
}

static void bcma_erom_push_ent(u32 **eromptr)
{
	(*eromptr)--;
}

static s32 bcma_erom_get_ci(struct bcma_bus *bus, u32 **eromptr)
{
	u32 ent = bcma_erom_get_ent(bus, eromptr);
	if (!(ent & SCAN_ER_VALID))
		return -ENOENT;
	if ((ent & SCAN_ER_TAG) != SCAN_ER_TAG_CI)
		return -ENOENT;
	return ent;
}

static bool bcma_erom_is_end(struct bcma_bus *bus, u32 **eromptr)
{
	u32 ent = bcma_erom_get_ent(bus, eromptr);
	bcma_erom_push_ent(eromptr);
	return (ent == (SCAN_ER_TAG_END | SCAN_ER_VALID));
}

static bool bcma_erom_is_bridge(struct bcma_bus *bus, u32 **eromptr)
{
	u32 ent = bcma_erom_get_ent(bus, eromptr);
	bcma_erom_push_ent(eromptr);
	return (((ent & SCAN_ER_VALID)) &&
		((ent & SCAN_ER_TAGX) == SCAN_ER_TAG_ADDR) &&
		((ent & SCAN_ADDR_TYPE) == SCAN_ADDR_TYPE_BRIDGE));
}

static void bcma_erom_skip_component(struct bcma_bus *bus, u32 **eromptr)
{
	u32 ent;
	while (1) {
		ent = bcma_erom_get_ent(bus, eromptr);
		if ((ent & SCAN_ER_VALID) &&
		    ((ent & SCAN_ER_TAG) == SCAN_ER_TAG_CI))
			break;
		if (ent == (SCAN_ER_TAG_END | SCAN_ER_VALID))
			break;
	}
	bcma_erom_push_ent(eromptr);
}

static s32 bcma_erom_get_mst_port(struct bcma_bus *bus, u32 **eromptr)
{
	u32 ent = bcma_erom_get_ent(bus, eromptr);
	if (!(ent & SCAN_ER_VALID))
		return -ENOENT;
	if ((ent & SCAN_ER_TAG) != SCAN_ER_TAG_MP)
		return -ENOENT;
	return ent;
}

static s32 bcma_erom_get_addr_desc(struct bcma_bus *bus, u32 **eromptr,
				  u32 type, u8 port)
{
	u32 addrl, addrh, sizel, sizeh = 0;
	u32 size;

	u32 ent = bcma_erom_get_ent(bus, eromptr);
	if ((!(ent & SCAN_ER_VALID)) ||
	    ((ent & SCAN_ER_TAGX) != SCAN_ER_TAG_ADDR) ||
	    ((ent & SCAN_ADDR_TYPE) != type) ||
	    (((ent & SCAN_ADDR_PORT) >> SCAN_ADDR_PORT_SHIFT) != port)) {
		bcma_erom_push_ent(eromptr);
		return -EINVAL;
	}

	addrl = ent & SCAN_ADDR_ADDR;
	if (ent & SCAN_ADDR_AG32)
		addrh = bcma_erom_get_ent(bus, eromptr);
	else
		addrh = 0;

	if ((ent & SCAN_ADDR_SZ) == SCAN_ADDR_SZ_SZD) {
		size = bcma_erom_get_ent(bus, eromptr);
		sizel = size & SCAN_SIZE_SZ;
		if (size & SCAN_SIZE_SG32)
			sizeh = bcma_erom_get_ent(bus, eromptr);
	} else
		sizel = SCAN_ADDR_SZ_BASE <<
				((ent & SCAN_ADDR_SZ) >> SCAN_ADDR_SZ_SHIFT);

	return addrl;
}

static struct bcma_device *bcma_find_core_by_index(struct bcma_bus *bus,
						   u16 index)
{
	struct bcma_device *core;

	list_for_each_entry(core, &bus->cores, list) {
		if (core->core_index == index)
			return core;
	}
	return NULL;
}

static struct bcma_device *bcma_find_core_reverse(struct bcma_bus *bus, u16 coreid)
{
	struct bcma_device *core;

	list_for_each_entry_reverse(core, &bus->cores, list) {
		if (core->id.id == coreid)
			return core;
	}
	return NULL;
}

static int bcma_get_next_core(struct bcma_bus *bus, u32 __iomem **eromptr,
			      struct bcma_device_id *match, int core_num,
			      struct bcma_device *core)
{
	s32 tmp;
	u8 i, j;
	s32 cia, cib;
	u8 ports[2], wrappers[2];

	/* get CIs */
	cia = bcma_erom_get_ci(bus, eromptr);
	if (cia < 0) {
		bcma_erom_push_ent(eromptr);
		if (bcma_erom_is_end(bus, eromptr))
			return -ESPIPE;
		return -EILSEQ;
	}
	cib = bcma_erom_get_ci(bus, eromptr);
	if (cib < 0)
		return -EILSEQ;

	/* parse CIs */
	core->id.class = (cia & SCAN_CIA_CLASS) >> SCAN_CIA_CLASS_SHIFT;
	core->id.id = (cia & SCAN_CIA_ID) >> SCAN_CIA_ID_SHIFT;
	core->id.manuf = (cia & SCAN_CIA_MANUF) >> SCAN_CIA_MANUF_SHIFT;
	ports[0] = (cib & SCAN_CIB_NMP) >> SCAN_CIB_NMP_SHIFT;
	ports[1] = (cib & SCAN_CIB_NSP) >> SCAN_CIB_NSP_SHIFT;
	wrappers[0] = (cib & SCAN_CIB_NMW) >> SCAN_CIB_NMW_SHIFT;
	wrappers[1] = (cib & SCAN_CIB_NSW) >> SCAN_CIB_NSW_SHIFT;
	core->id.rev = (cib & SCAN_CIB_REV) >> SCAN_CIB_REV_SHIFT;

	if (((core->id.manuf == BCMA_MANUF_ARM) &&
	     (core->id.id == 0xFFF)) ||
	    (ports[1] == 0)) {
		bcma_erom_skip_component(bus, eromptr);
		return -ENXIO;
	}

	/* check if component is a core at all */
	if (wrappers[0] + wrappers[1] == 0) {
		/* we could save addrl of the router
		if (cid == BCMA_CORE_OOB_ROUTER)
		 */
		bcma_erom_skip_component(bus, eromptr);
		return -ENXIO;
	}

	if (bcma_erom_is_bridge(bus, eromptr)) {
		bcma_erom_skip_component(bus, eromptr);
		return -ENXIO;
	}

	if (bcma_find_core_by_index(bus, core_num)) {
		bcma_erom_skip_component(bus, eromptr);
		return -ENODEV;
	}

	if (match && ((match->manuf != BCMA_ANY_MANUF &&
	      match->manuf != core->id.manuf) ||
	     (match->id != BCMA_ANY_ID && match->id != core->id.id) ||
	     (match->rev != BCMA_ANY_REV && match->rev != core->id.rev) ||
	     (match->class != BCMA_ANY_CLASS && match->class != core->id.class)
	    )) {
		bcma_erom_skip_component(bus, eromptr);
		return -ENODEV;
	}

	/* get & parse master ports */
	for (i = 0; i < ports[0]; i++) {
		s32 mst_port_d = bcma_erom_get_mst_port(bus, eromptr);
		if (mst_port_d < 0)
			return -EILSEQ;
	}

	/* get & parse slave ports */
	for (i = 0; i < ports[1]; i++) {
		for (j = 0; ; j++) {
			tmp = bcma_erom_get_addr_desc(bus, eromptr,
				SCAN_ADDR_TYPE_SLAVE, i);
			if (tmp < 0) {
				/* no more entries for port _i_ */
				/* pr_debug("erom: slave port %d "
				 * "has %d descriptors\n", i, j); */
				break;
			} else {
				if (i == 0 && j == 0)
					core->addr = tmp;
			}
		}
	}

	/* get & parse master wrappers */
	for (i = 0; i < wrappers[0]; i++) {
		for (j = 0; ; j++) {
			tmp = bcma_erom_get_addr_desc(bus, eromptr,
				SCAN_ADDR_TYPE_MWRAP, i);
			if (tmp < 0) {
				/* no more entries for port _i_ */
				/* pr_debug("erom: master wrapper %d "
				 * "has %d descriptors\n", i, j); */
				break;
			} else {
				if (i == 0 && j == 0)
					core->wrap = tmp;
			}
		}
	}

	/* get & parse slave wrappers */
	for (i = 0; i < wrappers[1]; i++) {
		u8 hack = (ports[1] == 1) ? 0 : 1;
		for (j = 0; ; j++) {
			tmp = bcma_erom_get_addr_desc(bus, eromptr,
				SCAN_ADDR_TYPE_SWRAP, i + hack);
			if (tmp < 0) {
				/* no more entries for port _i_ */
				/* pr_debug("erom: master wrapper %d "
				 * has %d descriptors\n", i, j); */
				break;
			} else {
				if (wrappers[0] == 0 && !i && !j)
					core->wrap = tmp;
			}
		}
	}
	if (bus->hosttype == BCMA_HOSTTYPE_SOC) {
		core->io_addr = ioremap_nocache(core->addr, BCMA_CORE_SIZE);
		if (!core->io_addr)
			return -ENOMEM;
		core->io_wrap = ioremap_nocache(core->wrap, BCMA_CORE_SIZE);
		if (!core->io_wrap) {
			iounmap(core->io_addr);
			return -ENOMEM;
		}
	}
	return 0;
}

void bcma_init_bus(struct bcma_bus *bus)
{
	s32 tmp;
	struct bcma_chipinfo *chipinfo = &(bus->chipinfo);

	if (bus->init_done)
		return;

	INIT_LIST_HEAD(&bus->cores);
	bus->nr_cores = 0;

	bcma_scan_switch_core(bus, BCMA_ADDR_BASE);

	tmp = bcma_scan_read32(bus, 0, BCMA_CC_ID);
	chipinfo->id = (tmp & BCMA_CC_ID_ID) >> BCMA_CC_ID_ID_SHIFT;
	chipinfo->rev = (tmp & BCMA_CC_ID_REV) >> BCMA_CC_ID_REV_SHIFT;
	chipinfo->pkg = (tmp & BCMA_CC_ID_PKG) >> BCMA_CC_ID_PKG_SHIFT;
	pr_info("Found chip with id 0x%04X, rev 0x%02X and package 0x%02X\n",
		chipinfo->id, chipinfo->rev, chipinfo->pkg);

	bus->init_done = true;
}

int bcma_bus_scan(struct bcma_bus *bus)
{
	u32 erombase;
	u32 __iomem *eromptr, *eromend;

	int err, core_num = 0;

	bcma_init_bus(bus);

	erombase = bcma_scan_read32(bus, 0, BCMA_CC_EROM);
	if (bus->hosttype == BCMA_HOSTTYPE_SOC) {
		eromptr = ioremap_nocache(erombase, BCMA_CORE_SIZE);
		if (!eromptr)
			return -ENOMEM;
	} else {
		eromptr = bus->mmio;
	}

	eromend = eromptr + BCMA_CORE_SIZE / sizeof(u32);

	bcma_scan_switch_core(bus, erombase);

	while (eromptr < eromend) {
		struct bcma_device *other_core;
		struct bcma_device *core = kzalloc(sizeof(*core), GFP_KERNEL);
		if (!core)
			return -ENOMEM;
		INIT_LIST_HEAD(&core->list);
		core->bus = bus;

		err = bcma_get_next_core(bus, &eromptr, NULL, core_num, core);
		if (err < 0) {
			kfree(core);
			if (err == -ENODEV) {
				core_num++;
				continue;
			} else if (err == -ENXIO) {
				continue;
			} else if (err == -ESPIPE) {
				break;
			}
			return err;
		}

		core->core_index = core_num++;
		bus->nr_cores++;
		other_core = bcma_find_core_reverse(bus, core->id.id);
		core->core_unit = (other_core == NULL) ? 0 : other_core->core_unit + 1;

		pr_info("Core %d found: %s "
			"(manuf 0x%03X, id 0x%03X, rev 0x%02X, class 0x%X)\n",
			core->core_index, bcma_device_name(&core->id),
			core->id.manuf, core->id.id, core->id.rev,
			core->id.class);

		list_add(&core->list, &bus->cores);
	}

	if (bus->hosttype == BCMA_HOSTTYPE_SOC)
		iounmap(eromptr);

	return 0;
}

int __init bcma_bus_scan_early(struct bcma_bus *bus,
			       struct bcma_device_id *match,
			       struct bcma_device *core)
{
	u32 erombase;
	u32 __iomem *eromptr, *eromend;

	int err = -ENODEV;
	int core_num = 0;

	erombase = bcma_scan_read32(bus, 0, BCMA_CC_EROM);
	if (bus->hosttype == BCMA_HOSTTYPE_SOC) {
		eromptr = ioremap_nocache(erombase, BCMA_CORE_SIZE);
		if (!eromptr)
			return -ENOMEM;
	} else {
		eromptr = bus->mmio;
	}

	eromend = eromptr + BCMA_CORE_SIZE / sizeof(u32);

	bcma_scan_switch_core(bus, erombase);

	while (eromptr < eromend) {
		memset(core, 0, sizeof(*core));
		INIT_LIST_HEAD(&core->list);
		core->bus = bus;

		err = bcma_get_next_core(bus, &eromptr, match, core_num, core);
		if (err == -ENODEV) {
			core_num++;
			continue;
		} else if (err == -ENXIO)
			continue;
		else if (err == -ESPIPE)
			break;
		else if (err < 0)
			return err;

		core->core_index = core_num++;
		bus->nr_cores++;
		pr_info("Core %d found: %s "
			"(manuf 0x%03X, id 0x%03X, rev 0x%02X, class 0x%X)\n",
			core->core_index, bcma_device_name(&core->id),
			core->id.manuf, core->id.id, core->id.rev,
			core->id.class);

		list_add(&core->list, &bus->cores);
		err = 0;
		break;
	}

	if (bus->hosttype == BCMA_HOSTTYPE_SOC)
		iounmap(eromptr);

	return err;
}
Commit	Line	Data
8369ae33 RM	1	/*
	2	* Broadcom specific AMBA
	3	* Bus scanning
	4	*
	5	* Licensed under the GNU/GPL. See COPYING for details.
	6	*/
	7
	8	#include "scan.h"
	9	#include "bcma_private.h"
	10
	11	#include <linux/bcma/bcma.h>
	12	#include <linux/bcma/bcma_regs.h>
	13	#include <linux/pci.h>
	14	#include <linux/io.h>
	15	#include <linux/dma-mapping.h>
	16	#include <linux/slab.h>
	17
	18	struct bcma_device_id_name {
	19	u16 id;
	20	const char *name;
	21	};
	22	struct bcma_device_id_name bcma_device_names[] = {
	23	{ BCMA_CORE_OOB_ROUTER, "OOB Router" },
	24	{ BCMA_CORE_INVALID, "Invalid" },
	25	{ BCMA_CORE_CHIPCOMMON, "ChipCommon" },
	26	{ BCMA_CORE_ILINE20, "ILine 20" },
	27	{ BCMA_CORE_SRAM, "SRAM" },
	28	{ BCMA_CORE_SDRAM, "SDRAM" },
	29	{ BCMA_CORE_PCI, "PCI" },
	30	{ BCMA_CORE_MIPS, "MIPS" },
	31	{ BCMA_CORE_ETHERNET, "Fast Ethernet" },
	32	{ BCMA_CORE_V90, "V90" },
	33	{ BCMA_CORE_USB11_HOSTDEV, "USB 1.1 Hostdev" },
	34	{ BCMA_CORE_ADSL, "ADSL" },
	35	{ BCMA_CORE_ILINE100, "ILine 100" },
	36	{ BCMA_CORE_IPSEC, "IPSEC" },
	37	{ BCMA_CORE_UTOPIA, "UTOPIA" },
	38	{ BCMA_CORE_PCMCIA, "PCMCIA" },
	39	{ BCMA_CORE_INTERNAL_MEM, "Internal Memory" },
	40	{ BCMA_CORE_MEMC_SDRAM, "MEMC SDRAM" },
	41	{ BCMA_CORE_OFDM, "OFDM" },
	42	{ BCMA_CORE_EXTIF, "EXTIF" },
	43	{ BCMA_CORE_80211, "IEEE 802.11" },
	44	{ BCMA_CORE_PHY_A, "PHY A" },
	45	{ BCMA_CORE_PHY_B, "PHY B" },
	46	{ BCMA_CORE_PHY_G, "PHY G" },
	47	{ BCMA_CORE_MIPS_3302, "MIPS 3302" },
	48	{ BCMA_CORE_USB11_HOST, "USB 1.1 Host" },
	49	{ BCMA_CORE_USB11_DEV, "USB 1.1 Device" },
	50	{ BCMA_CORE_USB20_HOST, "USB 2.0 Host" },
	51	{ BCMA_CORE_USB20_DEV, "USB 2.0 Device" },
	52	{ BCMA_CORE_SDIO_HOST, "SDIO Host" },
	53	{ BCMA_CORE_ROBOSWITCH, "Roboswitch" },
	54	{ BCMA_CORE_PARA_ATA, "PATA" },
	55	{ BCMA_CORE_SATA_XORDMA, "SATA XOR-DMA" },
	56	{ BCMA_CORE_ETHERNET_GBIT, "GBit Ethernet" },
	57	{ BCMA_CORE_PCIE, "PCIe" },
	58	{ BCMA_CORE_PHY_N, "PHY N" },
	59	{ BCMA_CORE_SRAM_CTL, "SRAM Controller" },
	60	{ BCMA_CORE_MINI_MACPHY, "Mini MACPHY" },
	61	{ BCMA_CORE_ARM_1176, "ARM 1176" },
	62	{ BCMA_CORE_ARM_7TDMI, "ARM 7TDMI" },
	63	{ BCMA_CORE_PHY_LP, "PHY LP" },
	64	{ BCMA_CORE_PMU, "PMU" },
65	{ BCMA_CORE_PHY_SSN, "PHY SSN" },
66	{ BCMA_CORE_SDIO_DEV, "SDIO Device" },
67	{ BCMA_CORE_ARM_CM3, "ARM CM3" },
68	{ BCMA_CORE_PHY_HT, "PHY HT" },
69	{ BCMA_CORE_MIPS_74K, "MIPS 74K" },
70	{ BCMA_CORE_MAC_GBIT, "GBit MAC" },
71	{ BCMA_CORE_DDR12_MEM_CTL, "DDR1/DDR2 Memory Controller" },
72	{ BCMA_CORE_PCIE_RC, "PCIe Root Complex" },
73	{ BCMA_CORE_OCP_OCP_BRIDGE, "OCP to OCP Bridge" },
74	{ BCMA_CORE_SHARED_COMMON, "Common Shared" },
75	{ BCMA_CORE_OCP_AHB_BRIDGE, "OCP to AHB Bridge" },
76	{ BCMA_CORE_SPI_HOST, "SPI Host" },
77	{ BCMA_CORE_I2S, "I2S" },
78	{ BCMA_CORE_SDR_DDR1_MEM_CTL, "SDR/DDR1 Memory Controller" },
79	{ BCMA_CORE_SHIM, "SHIM" },
80	{ BCMA_CORE_DEFAULT, "Default" },
81	};
82	const char bcma_device_name(struct bcma_device_id id)
83	{
84	int i;
85
86	if (id->manuf == BCMA_MANUF_BCM) {
87	for (i = 0; i < ARRAY_SIZE(bcma_device_names); i++) {
88	if (bcma_device_names[i].id == id->id)
89	return bcma_device_names[i].name;
90	}
91	}
92	return "UNKNOWN";
93	}
94
95	static u32 bcma_scan_read32(struct bcma_bus *bus, u8 current_coreidx,
96	u16 offset)
97	{
98	return readl(bus->mmio + offset);
99	}
100
101	static void bcma_scan_switch_core(struct bcma_bus *bus, u32 addr)
102	{
103	if (bus->hosttype == BCMA_HOSTTYPE_PCI)
104	pci_write_config_dword(bus->host_pci, BCMA_PCI_BAR0_WIN,
105	addr);
106	}
107
108	static u32 bcma_erom_get_ent(struct bcma_bus bus, u32 *eromptr)
109	{
110	u32 ent = readl(*eromptr);
111	(*eromptr)++;
112	return ent;
113	}
114
115	static void bcma_erom_push_ent(u32 **eromptr)
116	{
117	(*eromptr)--;
118	}
119
120	static s32 bcma_erom_get_ci(struct bcma_bus bus, u32 *eromptr)
121	{
122	u32 ent = bcma_erom_get_ent(bus, eromptr);
123	if (!(ent & SCAN_ER_VALID))
124	return -ENOENT;
125	if ((ent & SCAN_ER_TAG) != SCAN_ER_TAG_CI)
126	return -ENOENT;
127	return ent;
128	}
129
130	static bool bcma_erom_is_end(struct bcma_bus bus, u32 *eromptr)
131	{
132	u32 ent = bcma_erom_get_ent(bus, eromptr);
133	bcma_erom_push_ent(eromptr);
134	return (ent == (SCAN_ER_TAG_END \| SCAN_ER_VALID));
135	}
136
137	static bool bcma_erom_is_bridge(struct bcma_bus bus, u32 *eromptr)
138	{
139	u32 ent = bcma_erom_get_ent(bus, eromptr);
140	bcma_erom_push_ent(eromptr);
141	return (((ent & SCAN_ER_VALID)) &&
142	((ent & SCAN_ER_TAGX) == SCAN_ER_TAG_ADDR) &&
143	((ent & SCAN_ADDR_TYPE) == SCAN_ADDR_TYPE_BRIDGE));
144	}
145
146	static void bcma_erom_skip_component(struct bcma_bus bus, u32 *eromptr)
147	{
148	u32 ent;
149	while (1) {
150	ent = bcma_erom_get_ent(bus, eromptr);
151	if ((ent & SCAN_ER_VALID) &&
152	((ent & SCAN_ER_TAG) == SCAN_ER_TAG_CI))
153	break;
154	if (ent == (SCAN_ER_TAG_END \| SCAN_ER_VALID))
155	break;
156	}
157	bcma_erom_push_ent(eromptr);
158	}
159
160	static s32 bcma_erom_get_mst_port(struct bcma_bus bus, u32 *eromptr)
161	{
162	u32 ent = bcma_erom_get_ent(bus, eromptr);
163	if (!(ent & SCAN_ER_VALID))
164	return -ENOENT;
165	if ((ent & SCAN_ER_TAG) != SCAN_ER_TAG_MP)
166	return -ENOENT;
167	return ent;
168	}
169
170	static s32 bcma_erom_get_addr_desc(struct bcma_bus bus, u32 *eromptr,
171	u32 type, u8 port)
172	{
173	u32 addrl, addrh, sizel, sizeh = 0;
174	u32 size;
175
176	u32 ent = bcma_erom_get_ent(bus, eromptr);
177	if ((!(ent & SCAN_ER_VALID)) \|\|
178	((ent & SCAN_ER_TAGX) != SCAN_ER_TAG_ADDR) \|\|
179	((ent & SCAN_ADDR_TYPE) != type) \|\|
180	(((ent & SCAN_ADDR_PORT) >> SCAN_ADDR_PORT_SHIFT) != port)) {
181	bcma_erom_push_ent(eromptr);
182	return -EINVAL;
183	}
184
185	addrl = ent & SCAN_ADDR_ADDR;
186	if (ent & SCAN_ADDR_AG32)
187	addrh = bcma_erom_get_ent(bus, eromptr);
188	else
189	addrh = 0;
190
191	if ((ent & SCAN_ADDR_SZ) == SCAN_ADDR_SZ_SZD) {
192	size = bcma_erom_get_ent(bus, eromptr);
193	sizel = size & SCAN_SIZE_SZ;
194	if (size & SCAN_SIZE_SG32)
195	sizeh = bcma_erom_get_ent(bus, eromptr);
196	} else
197	sizel = SCAN_ADDR_SZ_BASE <<
198	((ent & SCAN_ADDR_SZ) >> SCAN_ADDR_SZ_SHIFT);
199
200	return addrl;
201	}
202
517f43e5 HM	203	static struct bcma_device bcma_find_core_by_index(struct bcma_bus bus,
	204	u16 index)
	205	{
	206	struct bcma_device *core;
	207
	208	list_for_each_entry(core, &bus->cores, list) {
	209	if (core->core_index == index)
	210	return core;
	211	}
	212	return NULL;
	213	}
	214
5f2d6171 HM	215	static struct bcma_device bcma_find_core_reverse(struct bcma_bus bus, u16 coreid)
	216	{
	217	struct bcma_device *core;
	218
	219	list_for_each_entry_reverse(core, &bus->cores, list) {
	220	if (core->id.id == coreid)
	221	return core;
	222	}
	223	return NULL;
	224	}
	225
982eee67	226	static int bcma_get_next_core(struct bcma_bus bus, u32 __iomem *eromptr,
517f43e5	227	struct bcma_device_id *match, int core_num,
982eee67 HM	228	struct bcma_device *core)
	229	{
	230	s32 tmp;
	231	u8 i, j;
	232	s32 cia, cib;
	233	u8 ports[2], wrappers[2];
	234
	235	/* get CIs */
	236	cia = bcma_erom_get_ci(bus, eromptr);
	237	if (cia < 0) {
	238	bcma_erom_push_ent(eromptr);
	239	if (bcma_erom_is_end(bus, eromptr))
	240	return -ESPIPE;
	241	return -EILSEQ;
	242	}
	243	cib = bcma_erom_get_ci(bus, eromptr);
	244	if (cib < 0)
	245	return -EILSEQ;
	246
	247	/* parse CIs */
	248	core->id.class = (cia & SCAN_CIA_CLASS) >> SCAN_CIA_CLASS_SHIFT;
	249	core->id.id = (cia & SCAN_CIA_ID) >> SCAN_CIA_ID_SHIFT;
	250	core->id.manuf = (cia & SCAN_CIA_MANUF) >> SCAN_CIA_MANUF_SHIFT;
	251	ports[0] = (cib & SCAN_CIB_NMP) >> SCAN_CIB_NMP_SHIFT;
	252	ports[1] = (cib & SCAN_CIB_NSP) >> SCAN_CIB_NSP_SHIFT;
	253	wrappers[0] = (cib & SCAN_CIB_NMW) >> SCAN_CIB_NMW_SHIFT;
	254	wrappers[1] = (cib & SCAN_CIB_NSW) >> SCAN_CIB_NSW_SHIFT;
	255	core->id.rev = (cib & SCAN_CIB_REV) >> SCAN_CIB_REV_SHIFT;
	256
	257	if (((core->id.manuf == BCMA_MANUF_ARM) &&
	258	(core->id.id == 0xFFF)) \|\|
	259	(ports[1] == 0)) {
	260	bcma_erom_skip_component(bus, eromptr);
	261	return -ENXIO;
	262	}
	263
	264	/* check if component is a core at all */
	265	if (wrappers[0] + wrappers[1] == 0) {
	266	/* we could save addrl of the router
	267	if (cid == BCMA_CORE_OOB_ROUTER)
	268	*/
	269	bcma_erom_skip_component(bus, eromptr);
	270	return -ENXIO;
	271	}
	272
	273	if (bcma_erom_is_bridge(bus, eromptr)) {
	274	bcma_erom_skip_component(bus, eromptr);
	275	return -ENXIO;
	276	}
	277
517f43e5 HM	278	if (bcma_find_core_by_index(bus, core_num)) {
	279	bcma_erom_skip_component(bus, eromptr);
	280	return -ENODEV;
	281	}
	282
	283	if (match && ((match->manuf != BCMA_ANY_MANUF &&
	284	match->manuf != core->id.manuf) \|\|
	285	(match->id != BCMA_ANY_ID && match->id != core->id.id) \|\|
	286	(match->rev != BCMA_ANY_REV && match->rev != core->id.rev) \|\|
	287	(match->class != BCMA_ANY_CLASS && match->class != core->id.class)
	288	)) {
	289	bcma_erom_skip_component(bus, eromptr);
	290	return -ENODEV;
	291	}
	292
982eee67 HM	293	/* get & parse master ports */
982eee67 HM	294	for (i = 0; i < ports[0]; i++) {
4e0d8cc1	295	s32 mst_port_d = bcma_erom_get_mst_port(bus, eromptr);
982eee67 HM	296	if (mst_port_d < 0)
	297	return -EILSEQ;
	298	}
	299
	300	/* get & parse slave ports */
	301	for (i = 0; i < ports[1]; i++) {
	302	for (j = 0; ; j++) {
	303	tmp = bcma_erom_get_addr_desc(bus, eromptr,
	304	SCAN_ADDR_TYPE_SLAVE, i);
	305	if (tmp < 0) {
	306	/* no more entries for port _i_ */
	307	/* pr_debug("erom: slave port %d "
	308	* "has %d descriptors\n", i, j); */
	309	break;
	310	} else {
	311	if (i == 0 && j == 0)
	312	core->addr = tmp;
	313	}
	314	}
	315	}
	316
	317	/* get & parse master wrappers */
	318	for (i = 0; i < wrappers[0]; i++) {
	319	for (j = 0; ; j++) {
	320	tmp = bcma_erom_get_addr_desc(bus, eromptr,
	321	SCAN_ADDR_TYPE_MWRAP, i);
	322	if (tmp < 0) {
	323	/* no more entries for port _i_ */
	324	/* pr_debug("erom: master wrapper %d "
	325	* "has %d descriptors\n", i, j); */
	326	break;
	327	} else {
	328	if (i == 0 && j == 0)
	329	core->wrap = tmp;
	330	}
	331	}
	332	}
	333
	334	/* get & parse slave wrappers */
	335	for (i = 0; i < wrappers[1]; i++) {
	336	u8 hack = (ports[1] == 1) ? 0 : 1;
	337	for (j = 0; ; j++) {
	338	tmp = bcma_erom_get_addr_desc(bus, eromptr,
	339	SCAN_ADDR_TYPE_SWRAP, i + hack);
	340	if (tmp < 0) {
	341	/* no more entries for port _i_ */
	342	/* pr_debug("erom: master wrapper %d "
	343	* has %d descriptors\n", i, j); */
	344	break;
	345	} else {
	346	if (wrappers[0] == 0 && !i && !j)
	347	core->wrap = tmp;
	348	}
	349	}
	350	}
ecd177c2 HM	351	if (bus->hosttype == BCMA_HOSTTYPE_SOC) {
	352	core->io_addr = ioremap_nocache(core->addr, BCMA_CORE_SIZE);
	353	if (!core->io_addr)
	354	return -ENOMEM;
	355	core->io_wrap = ioremap_nocache(core->wrap, BCMA_CORE_SIZE);
	356	if (!core->io_wrap) {
	357	iounmap(core->io_addr);
	358	return -ENOMEM;
	359	}
	360	}
982eee67 HM	361	return 0;
	362	}
	363
517f43e5	364	void bcma_init_bus(struct bcma_bus *bus)
8369ae33	365	{
8369ae33	366	s32 tmp;
f0d4724b	367	struct bcma_chipinfo *chipinfo = &(bus->chipinfo);
8369ae33	368
517f43e5 HM	369	if (bus->init_done)
	370	return;
	371
8369ae33 RM	372	INIT_LIST_HEAD(&bus->cores);
	373	bus->nr_cores = 0;
	374
	375	bcma_scan_switch_core(bus, BCMA_ADDR_BASE);
	376
	377	tmp = bcma_scan_read32(bus, 0, BCMA_CC_ID);
f0d4724b HM	378	chipinfo->id = (tmp & BCMA_CC_ID_ID) >> BCMA_CC_ID_ID_SHIFT;
	379	chipinfo->rev = (tmp & BCMA_CC_ID_REV) >> BCMA_CC_ID_REV_SHIFT;
	380	chipinfo->pkg = (tmp & BCMA_CC_ID_PKG) >> BCMA_CC_ID_PKG_SHIFT;
	381	pr_info("Found chip with id 0x%04X, rev 0x%02X and package 0x%02X\n",
	382	chipinfo->id, chipinfo->rev, chipinfo->pkg);
	383
517f43e5	384	bus->init_done = true;
67a5c29e HM	385	}
	386
	387	int bcma_bus_scan(struct bcma_bus *bus)
	388	{
	389	u32 erombase;
	390	u32 __iomem eromptr, eromend;
	391
517f43e5	392	int err, core_num = 0;
67a5c29e HM	393
67a5c29e HM	394	bcma_init_bus(bus);
8369ae33 RM	395
8369ae33 RM	396	erombase = bcma_scan_read32(bus, 0, BCMA_CC_EROM);
ecd177c2 HM	397	if (bus->hosttype == BCMA_HOSTTYPE_SOC) {
	398	eromptr = ioremap_nocache(erombase, BCMA_CORE_SIZE);
	399	if (!eromptr)
	400	return -ENOMEM;
	401	} else {
	402	eromptr = bus->mmio;
	403	}
	404
8369ae33 RM	405	eromend = eromptr + BCMA_CORE_SIZE / sizeof(u32);
	406
	407	bcma_scan_switch_core(bus, erombase);
	408
	409	while (eromptr < eromend) {
5f2d6171	410	struct bcma_device *other_core;
8369ae33 RM	411	struct bcma_device core = kzalloc(sizeof(core), GFP_KERNEL);
	412	if (!core)
	413	return -ENOMEM;
	414	INIT_LIST_HEAD(&core->list);
	415	core->bus = bus;
	416
517f43e5	417	err = bcma_get_next_core(bus, &eromptr, NULL, core_num, core);
f9721ed2 JJ	418	if (err < 0) {
	419	kfree(core);
	420	if (err == -ENODEV) {
	421	core_num++;
	422	continue;
	423	} else if (err == -ENXIO) {
	424	continue;
	425	} else if (err == -ESPIPE) {
	426	break;
	427	}
982eee67	428	return err;
f9721ed2	429	}
8369ae33	430
517f43e5 HM	431	core->core_index = core_num++;
517f43e5 HM	432	bus->nr_cores++;
5f2d6171 HM	433	other_core = bcma_find_core_reverse(bus, core->id.id);
5f2d6171 HM	434	core->core_unit = (other_core == NULL) ? 0 : other_core->core_unit + 1;
517f43e5	435
8369ae33 RM	436	pr_info("Core %d found: %s "
8369ae33 RM	437	"(manuf 0x%03X, id 0x%03X, rev 0x%02X, class 0x%X)\n",
517f43e5	438	core->core_index, bcma_device_name(&core->id),
8369ae33 RM	439	core->id.manuf, core->id.id, core->id.rev,
	440	core->id.class);
	441
8369ae33	442	list_add(&core->list, &bus->cores);
8369ae33 RM	443	}
8369ae33 RM	444
ecd177c2 HM	445	if (bus->hosttype == BCMA_HOSTTYPE_SOC)
	446	iounmap(eromptr);
	447
8369ae33 RM	448	return 0;
8369ae33 RM	449	}
517f43e5 HM	450
	451	int __init bcma_bus_scan_early(struct bcma_bus *bus,
	452	struct bcma_device_id *match,
	453	struct bcma_device *core)
	454	{
	455	u32 erombase;
	456	u32 __iomem eromptr, eromend;
	457
ecd177c2 HM	458	int err = -ENODEV;
ecd177c2 HM	459	int core_num = 0;
517f43e5 HM	460
517f43e5 HM	461	erombase = bcma_scan_read32(bus, 0, BCMA_CC_EROM);
ecd177c2 HM	462	if (bus->hosttype == BCMA_HOSTTYPE_SOC) {
	463	eromptr = ioremap_nocache(erombase, BCMA_CORE_SIZE);
	464	if (!eromptr)
	465	return -ENOMEM;
	466	} else {
	467	eromptr = bus->mmio;
	468	}
	469
517f43e5 HM	470	eromend = eromptr + BCMA_CORE_SIZE / sizeof(u32);
	471
	472	bcma_scan_switch_core(bus, erombase);
	473
	474	while (eromptr < eromend) {
	475	memset(core, 0, sizeof(*core));
	476	INIT_LIST_HEAD(&core->list);
	477	core->bus = bus;
	478
	479	err = bcma_get_next_core(bus, &eromptr, match, core_num, core);
	480	if (err == -ENODEV) {
	481	core_num++;
	482	continue;
	483	} else if (err == -ENXIO)
	484	continue;
	485	else if (err == -ESPIPE)
	486	break;
	487	else if (err < 0)
	488	return err;
	489
	490	core->core_index = core_num++;
	491	bus->nr_cores++;
	492	pr_info("Core %d found: %s "
	493	"(manuf 0x%03X, id 0x%03X, rev 0x%02X, class 0x%X)\n",
	494	core->core_index, bcma_device_name(&core->id),
	495	core->id.manuf, core->id.id, core->id.rev,
	496	core->id.class);
	497
	498	list_add(&core->list, &bus->cores);
ecd177c2 HM	499	err = 0;
ecd177c2 HM	500	break;
517f43e5 HM	501	}
517f43e5 HM	502
ecd177c2 HM	503	if (bus->hosttype == BCMA_HOSTTYPE_SOC)
	504	iounmap(eromptr);
	505
	506	return err;
517f43e5	507	}