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Commit | Line | Data |
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27f18dc2 RM |
1 | /* |
2 | * Broadcom specific AMBA | |
3 | * SPROM reading | |
4 | * | |
5 | * Licensed under the GNU/GPL. See COPYING for details. | |
6 | */ | |
7 | ||
8 | #include "bcma_private.h" | |
9 | ||
10 | #include <linux/bcma/bcma.h> | |
11 | #include <linux/bcma/bcma_regs.h> | |
12 | #include <linux/pci.h> | |
13 | #include <linux/io.h> | |
14 | #include <linux/dma-mapping.h> | |
15 | #include <linux/slab.h> | |
16 | ||
27f18dc2 RM |
17 | /************************************************** |
18 | * R/W ops. | |
19 | **************************************************/ | |
20 | ||
eb1577b7 | 21 | static void bcma_sprom_read(struct bcma_bus *bus, u16 offset, u16 *sprom) |
27f18dc2 RM |
22 | { |
23 | int i; | |
24 | for (i = 0; i < SSB_SPROMSIZE_WORDS_R4; i++) | |
25 | sprom[i] = bcma_read16(bus->drv_cc.core, | |
eb1577b7 | 26 | offset + (i * 2)); |
27f18dc2 RM |
27 | } |
28 | ||
29 | /************************************************** | |
30 | * Validation. | |
31 | **************************************************/ | |
32 | ||
33 | static inline u8 bcma_crc8(u8 crc, u8 data) | |
34 | { | |
35 | /* Polynomial: x^8 + x^7 + x^6 + x^4 + x^2 + 1 */ | |
36 | static const u8 t[] = { | |
37 | 0x00, 0xF7, 0xB9, 0x4E, 0x25, 0xD2, 0x9C, 0x6B, | |
38 | 0x4A, 0xBD, 0xF3, 0x04, 0x6F, 0x98, 0xD6, 0x21, | |
39 | 0x94, 0x63, 0x2D, 0xDA, 0xB1, 0x46, 0x08, 0xFF, | |
40 | 0xDE, 0x29, 0x67, 0x90, 0xFB, 0x0C, 0x42, 0xB5, | |
41 | 0x7F, 0x88, 0xC6, 0x31, 0x5A, 0xAD, 0xE3, 0x14, | |
42 | 0x35, 0xC2, 0x8C, 0x7B, 0x10, 0xE7, 0xA9, 0x5E, | |
43 | 0xEB, 0x1C, 0x52, 0xA5, 0xCE, 0x39, 0x77, 0x80, | |
44 | 0xA1, 0x56, 0x18, 0xEF, 0x84, 0x73, 0x3D, 0xCA, | |
45 | 0xFE, 0x09, 0x47, 0xB0, 0xDB, 0x2C, 0x62, 0x95, | |
46 | 0xB4, 0x43, 0x0D, 0xFA, 0x91, 0x66, 0x28, 0xDF, | |
47 | 0x6A, 0x9D, 0xD3, 0x24, 0x4F, 0xB8, 0xF6, 0x01, | |
48 | 0x20, 0xD7, 0x99, 0x6E, 0x05, 0xF2, 0xBC, 0x4B, | |
49 | 0x81, 0x76, 0x38, 0xCF, 0xA4, 0x53, 0x1D, 0xEA, | |
50 | 0xCB, 0x3C, 0x72, 0x85, 0xEE, 0x19, 0x57, 0xA0, | |
51 | 0x15, 0xE2, 0xAC, 0x5B, 0x30, 0xC7, 0x89, 0x7E, | |
52 | 0x5F, 0xA8, 0xE6, 0x11, 0x7A, 0x8D, 0xC3, 0x34, | |
53 | 0xAB, 0x5C, 0x12, 0xE5, 0x8E, 0x79, 0x37, 0xC0, | |
54 | 0xE1, 0x16, 0x58, 0xAF, 0xC4, 0x33, 0x7D, 0x8A, | |
55 | 0x3F, 0xC8, 0x86, 0x71, 0x1A, 0xED, 0xA3, 0x54, | |
56 | 0x75, 0x82, 0xCC, 0x3B, 0x50, 0xA7, 0xE9, 0x1E, | |
57 | 0xD4, 0x23, 0x6D, 0x9A, 0xF1, 0x06, 0x48, 0xBF, | |
58 | 0x9E, 0x69, 0x27, 0xD0, 0xBB, 0x4C, 0x02, 0xF5, | |
59 | 0x40, 0xB7, 0xF9, 0x0E, 0x65, 0x92, 0xDC, 0x2B, | |
60 | 0x0A, 0xFD, 0xB3, 0x44, 0x2F, 0xD8, 0x96, 0x61, | |
61 | 0x55, 0xA2, 0xEC, 0x1B, 0x70, 0x87, 0xC9, 0x3E, | |
62 | 0x1F, 0xE8, 0xA6, 0x51, 0x3A, 0xCD, 0x83, 0x74, | |
63 | 0xC1, 0x36, 0x78, 0x8F, 0xE4, 0x13, 0x5D, 0xAA, | |
64 | 0x8B, 0x7C, 0x32, 0xC5, 0xAE, 0x59, 0x17, 0xE0, | |
65 | 0x2A, 0xDD, 0x93, 0x64, 0x0F, 0xF8, 0xB6, 0x41, | |
66 | 0x60, 0x97, 0xD9, 0x2E, 0x45, 0xB2, 0xFC, 0x0B, | |
67 | 0xBE, 0x49, 0x07, 0xF0, 0x9B, 0x6C, 0x22, 0xD5, | |
68 | 0xF4, 0x03, 0x4D, 0xBA, 0xD1, 0x26, 0x68, 0x9F, | |
69 | }; | |
70 | return t[crc ^ data]; | |
71 | } | |
72 | ||
73 | static u8 bcma_sprom_crc(const u16 *sprom) | |
74 | { | |
75 | int word; | |
76 | u8 crc = 0xFF; | |
77 | ||
78 | for (word = 0; word < SSB_SPROMSIZE_WORDS_R4 - 1; word++) { | |
79 | crc = bcma_crc8(crc, sprom[word] & 0x00FF); | |
80 | crc = bcma_crc8(crc, (sprom[word] & 0xFF00) >> 8); | |
81 | } | |
82 | crc = bcma_crc8(crc, sprom[SSB_SPROMSIZE_WORDS_R4 - 1] & 0x00FF); | |
83 | crc ^= 0xFF; | |
84 | ||
85 | return crc; | |
86 | } | |
87 | ||
88 | static int bcma_sprom_check_crc(const u16 *sprom) | |
89 | { | |
90 | u8 crc; | |
91 | u8 expected_crc; | |
92 | u16 tmp; | |
93 | ||
94 | crc = bcma_sprom_crc(sprom); | |
95 | tmp = sprom[SSB_SPROMSIZE_WORDS_R4 - 1] & SSB_SPROM_REVISION_CRC; | |
96 | expected_crc = tmp >> SSB_SPROM_REVISION_CRC_SHIFT; | |
97 | if (crc != expected_crc) | |
98 | return -EPROTO; | |
99 | ||
100 | return 0; | |
101 | } | |
102 | ||
103 | static int bcma_sprom_valid(const u16 *sprom) | |
104 | { | |
105 | u16 revision; | |
106 | int err; | |
107 | ||
108 | err = bcma_sprom_check_crc(sprom); | |
109 | if (err) | |
110 | return err; | |
111 | ||
112 | revision = sprom[SSB_SPROMSIZE_WORDS_R4 - 1] & SSB_SPROM_REVISION_REV; | |
c54dcd19 | 113 | if (revision != 8 && revision != 9) { |
27f18dc2 RM |
114 | pr_err("Unsupported SPROM revision: %d\n", revision); |
115 | return -ENOENT; | |
116 | } | |
117 | ||
118 | return 0; | |
119 | } | |
120 | ||
121 | /************************************************** | |
122 | * SPROM extraction. | |
123 | **************************************************/ | |
124 | ||
b35a9aca RM |
125 | #define SPOFF(offset) ((offset) / sizeof(u16)) |
126 | ||
127 | #define SPEX(_field, _offset, _mask, _shift) \ | |
128 | bus->sprom._field = ((sprom[SPOFF(_offset)] & (_mask)) >> (_shift)) | |
129 | ||
27f18dc2 RM |
130 | static void bcma_sprom_extract_r8(struct bcma_bus *bus, const u16 *sprom) |
131 | { | |
507f9a71 | 132 | u16 v, o; |
27f18dc2 | 133 | int i; |
507f9a71 RM |
134 | u16 pwr_info_offset[] = { |
135 | SSB_SROM8_PWR_INFO_CORE0, SSB_SROM8_PWR_INFO_CORE1, | |
136 | SSB_SROM8_PWR_INFO_CORE2, SSB_SROM8_PWR_INFO_CORE3 | |
137 | }; | |
138 | BUILD_BUG_ON(ARRAY_SIZE(pwr_info_offset) != | |
139 | ARRAY_SIZE(bus->sprom.core_pwr_info)); | |
27f18dc2 | 140 | |
daadc6b3 RM |
141 | bus->sprom.revision = sprom[SSB_SPROMSIZE_WORDS_R4 - 1] & |
142 | SSB_SPROM_REVISION_REV; | |
143 | ||
27f18dc2 RM |
144 | for (i = 0; i < 3; i++) { |
145 | v = sprom[SPOFF(SSB_SPROM8_IL0MAC) + i]; | |
146 | *(((__be16 *)bus->sprom.il0mac) + i) = cpu_to_be16(v); | |
147 | } | |
d703a5ae | 148 | |
b35a9aca RM |
149 | SPEX(board_rev, SSB_SPROM8_BOARDREV, ~0, 0); |
150 | ||
151 | SPEX(txpid2g[0], SSB_SPROM4_TXPID2G01, SSB_SPROM4_TXPID2G0, | |
152 | SSB_SPROM4_TXPID2G0_SHIFT); | |
153 | SPEX(txpid2g[1], SSB_SPROM4_TXPID2G01, SSB_SPROM4_TXPID2G1, | |
154 | SSB_SPROM4_TXPID2G1_SHIFT); | |
155 | SPEX(txpid2g[2], SSB_SPROM4_TXPID2G23, SSB_SPROM4_TXPID2G2, | |
156 | SSB_SPROM4_TXPID2G2_SHIFT); | |
157 | SPEX(txpid2g[3], SSB_SPROM4_TXPID2G23, SSB_SPROM4_TXPID2G3, | |
158 | SSB_SPROM4_TXPID2G3_SHIFT); | |
159 | ||
160 | SPEX(txpid5gl[0], SSB_SPROM4_TXPID5GL01, SSB_SPROM4_TXPID5GL0, | |
161 | SSB_SPROM4_TXPID5GL0_SHIFT); | |
162 | SPEX(txpid5gl[1], SSB_SPROM4_TXPID5GL01, SSB_SPROM4_TXPID5GL1, | |
163 | SSB_SPROM4_TXPID5GL1_SHIFT); | |
164 | SPEX(txpid5gl[2], SSB_SPROM4_TXPID5GL23, SSB_SPROM4_TXPID5GL2, | |
165 | SSB_SPROM4_TXPID5GL2_SHIFT); | |
166 | SPEX(txpid5gl[3], SSB_SPROM4_TXPID5GL23, SSB_SPROM4_TXPID5GL3, | |
167 | SSB_SPROM4_TXPID5GL3_SHIFT); | |
168 | ||
169 | SPEX(txpid5g[0], SSB_SPROM4_TXPID5G01, SSB_SPROM4_TXPID5G0, | |
170 | SSB_SPROM4_TXPID5G0_SHIFT); | |
171 | SPEX(txpid5g[1], SSB_SPROM4_TXPID5G01, SSB_SPROM4_TXPID5G1, | |
172 | SSB_SPROM4_TXPID5G1_SHIFT); | |
173 | SPEX(txpid5g[2], SSB_SPROM4_TXPID5G23, SSB_SPROM4_TXPID5G2, | |
174 | SSB_SPROM4_TXPID5G2_SHIFT); | |
175 | SPEX(txpid5g[3], SSB_SPROM4_TXPID5G23, SSB_SPROM4_TXPID5G3, | |
176 | SSB_SPROM4_TXPID5G3_SHIFT); | |
177 | ||
178 | SPEX(txpid5gh[0], SSB_SPROM4_TXPID5GH01, SSB_SPROM4_TXPID5GH0, | |
179 | SSB_SPROM4_TXPID5GH0_SHIFT); | |
180 | SPEX(txpid5gh[1], SSB_SPROM4_TXPID5GH01, SSB_SPROM4_TXPID5GH1, | |
181 | SSB_SPROM4_TXPID5GH1_SHIFT); | |
182 | SPEX(txpid5gh[2], SSB_SPROM4_TXPID5GH23, SSB_SPROM4_TXPID5GH2, | |
183 | SSB_SPROM4_TXPID5GH2_SHIFT); | |
184 | SPEX(txpid5gh[3], SSB_SPROM4_TXPID5GH23, SSB_SPROM4_TXPID5GH3, | |
185 | SSB_SPROM4_TXPID5GH3_SHIFT); | |
186 | ||
187 | SPEX(boardflags_lo, SSB_SPROM8_BFLLO, ~0, 0); | |
188 | SPEX(boardflags_hi, SSB_SPROM8_BFLHI, ~0, 0); | |
189 | SPEX(boardflags2_lo, SSB_SPROM8_BFL2LO, ~0, 0); | |
190 | SPEX(boardflags2_hi, SSB_SPROM8_BFL2HI, ~0, 0); | |
191 | ||
192 | SPEX(country_code, SSB_SPROM8_CCODE, ~0, 0); | |
193 | ||
507f9a71 RM |
194 | /* Extract cores power info info */ |
195 | for (i = 0; i < ARRAY_SIZE(pwr_info_offset); i++) { | |
196 | o = pwr_info_offset[i]; | |
197 | SPEX(core_pwr_info[i].itssi_2g, o + SSB_SROM8_2G_MAXP_ITSSI, | |
198 | SSB_SPROM8_2G_ITSSI, SSB_SPROM8_2G_ITSSI_SHIFT); | |
199 | SPEX(core_pwr_info[i].maxpwr_2g, o + SSB_SROM8_2G_MAXP_ITSSI, | |
200 | SSB_SPROM8_2G_MAXP, 0); | |
201 | ||
202 | SPEX(core_pwr_info[i].pa_2g[0], o + SSB_SROM8_2G_PA_0, ~0, 0); | |
203 | SPEX(core_pwr_info[i].pa_2g[1], o + SSB_SROM8_2G_PA_1, ~0, 0); | |
204 | SPEX(core_pwr_info[i].pa_2g[2], o + SSB_SROM8_2G_PA_2, ~0, 0); | |
205 | ||
206 | SPEX(core_pwr_info[i].itssi_5g, o + SSB_SROM8_5G_MAXP_ITSSI, | |
207 | SSB_SPROM8_5G_ITSSI, SSB_SPROM8_5G_ITSSI_SHIFT); | |
208 | SPEX(core_pwr_info[i].maxpwr_5g, o + SSB_SROM8_5G_MAXP_ITSSI, | |
209 | SSB_SPROM8_5G_MAXP, 0); | |
210 | SPEX(core_pwr_info[i].maxpwr_5gh, o + SSB_SPROM8_5GHL_MAXP, | |
211 | SSB_SPROM8_5GH_MAXP, 0); | |
212 | SPEX(core_pwr_info[i].maxpwr_5gl, o + SSB_SPROM8_5GHL_MAXP, | |
213 | SSB_SPROM8_5GL_MAXP, SSB_SPROM8_5GL_MAXP_SHIFT); | |
214 | ||
215 | SPEX(core_pwr_info[i].pa_5gl[0], o + SSB_SROM8_5GL_PA_0, ~0, 0); | |
216 | SPEX(core_pwr_info[i].pa_5gl[1], o + SSB_SROM8_5GL_PA_1, ~0, 0); | |
217 | SPEX(core_pwr_info[i].pa_5gl[2], o + SSB_SROM8_5GL_PA_2, ~0, 0); | |
218 | SPEX(core_pwr_info[i].pa_5g[0], o + SSB_SROM8_5G_PA_0, ~0, 0); | |
219 | SPEX(core_pwr_info[i].pa_5g[1], o + SSB_SROM8_5G_PA_1, ~0, 0); | |
220 | SPEX(core_pwr_info[i].pa_5g[2], o + SSB_SROM8_5G_PA_2, ~0, 0); | |
221 | SPEX(core_pwr_info[i].pa_5gh[0], o + SSB_SROM8_5GH_PA_0, ~0, 0); | |
222 | SPEX(core_pwr_info[i].pa_5gh[1], o + SSB_SROM8_5GH_PA_1, ~0, 0); | |
223 | SPEX(core_pwr_info[i].pa_5gh[2], o + SSB_SROM8_5GH_PA_2, ~0, 0); | |
224 | } | |
225 | ||
b35a9aca RM |
226 | SPEX(fem.ghz2.tssipos, SSB_SPROM8_FEM2G, SSB_SROM8_FEM_TSSIPOS, |
227 | SSB_SROM8_FEM_TSSIPOS_SHIFT); | |
228 | SPEX(fem.ghz2.extpa_gain, SSB_SPROM8_FEM2G, SSB_SROM8_FEM_EXTPA_GAIN, | |
229 | SSB_SROM8_FEM_EXTPA_GAIN_SHIFT); | |
230 | SPEX(fem.ghz2.pdet_range, SSB_SPROM8_FEM2G, SSB_SROM8_FEM_PDET_RANGE, | |
231 | SSB_SROM8_FEM_PDET_RANGE_SHIFT); | |
232 | SPEX(fem.ghz2.tr_iso, SSB_SPROM8_FEM2G, SSB_SROM8_FEM_TR_ISO, | |
233 | SSB_SROM8_FEM_TR_ISO_SHIFT); | |
234 | SPEX(fem.ghz2.antswlut, SSB_SPROM8_FEM2G, SSB_SROM8_FEM_ANTSWLUT, | |
235 | SSB_SROM8_FEM_ANTSWLUT_SHIFT); | |
236 | ||
237 | SPEX(fem.ghz5.tssipos, SSB_SPROM8_FEM5G, SSB_SROM8_FEM_TSSIPOS, | |
238 | SSB_SROM8_FEM_TSSIPOS_SHIFT); | |
239 | SPEX(fem.ghz5.extpa_gain, SSB_SPROM8_FEM5G, SSB_SROM8_FEM_EXTPA_GAIN, | |
240 | SSB_SROM8_FEM_EXTPA_GAIN_SHIFT); | |
241 | SPEX(fem.ghz5.pdet_range, SSB_SPROM8_FEM5G, SSB_SROM8_FEM_PDET_RANGE, | |
242 | SSB_SROM8_FEM_PDET_RANGE_SHIFT); | |
243 | SPEX(fem.ghz5.tr_iso, SSB_SPROM8_FEM5G, SSB_SROM8_FEM_TR_ISO, | |
244 | SSB_SROM8_FEM_TR_ISO_SHIFT); | |
245 | SPEX(fem.ghz5.antswlut, SSB_SPROM8_FEM5G, SSB_SROM8_FEM_ANTSWLUT, | |
246 | SSB_SROM8_FEM_ANTSWLUT_SHIFT); | |
27f18dc2 RM |
247 | } |
248 | ||
249 | int bcma_sprom_get(struct bcma_bus *bus) | |
250 | { | |
eb1577b7 | 251 | u16 offset; |
27f18dc2 RM |
252 | u16 *sprom; |
253 | int err = 0; | |
254 | ||
255 | if (!bus->drv_cc.core) | |
256 | return -EOPNOTSUPP; | |
257 | ||
534e7a45 HM |
258 | if (!(bus->drv_cc.capabilities & BCMA_CC_CAP_SPROM)) |
259 | return -ENOENT; | |
260 | ||
27f18dc2 RM |
261 | sprom = kcalloc(SSB_SPROMSIZE_WORDS_R4, sizeof(u16), |
262 | GFP_KERNEL); | |
263 | if (!sprom) | |
264 | return -ENOMEM; | |
265 | ||
984e5bef RM |
266 | if (bus->chipinfo.id == 0x4331) |
267 | bcma_chipco_bcm4331_ext_pa_lines_ctl(&bus->drv_cc, false); | |
268 | ||
eb1577b7 RM |
269 | /* Most cards have SPROM moved by additional offset 0x30 (48 dwords). |
270 | * According to brcm80211 this applies to cards with PCIe rev >= 6 | |
271 | * TODO: understand this condition and use it */ | |
272 | offset = (bus->chipinfo.id == 0x4331) ? BCMA_CC_SPROM : | |
273 | BCMA_CC_SPROM_PCIE6; | |
274 | bcma_sprom_read(bus, offset, sprom); | |
27f18dc2 | 275 | |
984e5bef RM |
276 | if (bus->chipinfo.id == 0x4331) |
277 | bcma_chipco_bcm4331_ext_pa_lines_ctl(&bus->drv_cc, true); | |
278 | ||
27f18dc2 RM |
279 | err = bcma_sprom_valid(sprom); |
280 | if (err) | |
281 | goto out; | |
282 | ||
283 | bcma_sprom_extract_r8(bus, sprom); | |
284 | ||
285 | out: | |
286 | kfree(sprom); | |
287 | return err; | |
288 | } |