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floppy: fix race condition in __floppy_read_block_0()
[mirror_ubuntu-bionic-kernel.git] / drivers / block / DAC960.c
CommitLineData
1da177e4
LT		 1/*
2
3 Linux Driver for Mylex DAC960/AcceleRAID/eXtremeRAID PCI RAID Controllers
4
5 Copyright 1998-2001 by Leonard N. Zubkoff <lnz@dandelion.com>
5b76ffd5 6 Portions Copyright 2002 by Mylex (An IBM Business Unit)
1da177e4
LT		 7
8 This program is free software; you may redistribute and/or modify it under
9 the terms of the GNU General Public License Version 2 as published by the
10 Free Software Foundation.
11
12 This program is distributed in the hope that it will be useful, but
13 WITHOUT ANY WARRANTY, without even the implied warranty of MERCHANTABILITY
14 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
15 for complete details.
16
17*/
18
19
868047fc
MW		 20#define DAC960_DriverVersion "2.5.49"
21#define DAC960_DriverDate "21 Aug 2007"
1da177e4
LT		 22
23
a138d3cb 24#include <linux/compiler.h>
1da177e4
LT		 25#include <linux/module.h>
26#include <linux/types.h>
27#include <linux/miscdevice.h>
28#include <linux/blkdev.h>
29#include <linux/bio.h>
30#include <linux/completion.h>
31#include <linux/delay.h>
32#include <linux/genhd.h>
33#include <linux/hdreg.h>
34#include <linux/blkpg.h>
3558c9b3 35#include <linux/dma-mapping.h>
1da177e4
LT		 36#include <linux/interrupt.h>
37#include <linux/ioport.h>
38#include <linux/mm.h>
39#include <linux/slab.h>
2a48fc0a 40#include <linux/mutex.h>
1da177e4 41#include <linux/proc_fs.h>
d5d03eec 42#include <linux/seq_file.h>
1da177e4
LT		 43#include <linux/reboot.h>
44#include <linux/spinlock.h>
45#include <linux/timer.h>
46#include <linux/pci.h>
47#include <linux/init.h>
50297cbf 48#include <linux/jiffies.h>
62287fbb 49#include <linux/random.h>
11763609 50#include <linux/scatterlist.h>
1da177e4 51#include <asm/io.h>
7c0f6ba6 52#include <linux/uaccess.h>
1da177e4
LT		 53#include "DAC960.h"
54
55#define DAC960_GAM_MINOR 252
56
57
2a48fc0a 58static DEFINE_MUTEX(DAC960_mutex);
1da177e4
LT		 59static DAC960_Controller_T *DAC960_Controllers[DAC960_MaxControllers];
60static int DAC960_ControllerCount;
61static struct proc_dir_entry *DAC960_ProcDirectoryEntry;
62
63static long disk_size(DAC960_Controller_T *p, int drive_nr)
64{
65 if (p->FirmwareType == DAC960_V1_Controller) {
66 if (drive_nr >= p->LogicalDriveCount)
67 return 0;
68 return p->V1.LogicalDriveInformation[drive_nr].
69 LogicalDriveSize;
70 } else {
71 DAC960_V2_LogicalDeviceInfo_T *i =
72 p->V2.LogicalDeviceInformation[drive_nr];
73 if (i == NULL)
74 return 0;
75 return i->ConfigurableDeviceSize;
76 }
77}
78
b564f027 79static int DAC960_open(struct block_device *bdev, fmode_t mode)
1da177e4 80{
b564f027 81 struct gendisk *disk = bdev->bd_disk;
1da177e4
LT		 82 DAC960_Controller_T *p = disk->queue->queuedata;
83 int drive_nr = (long)disk->private_data;
6e9624b8 84 int ret = -ENXIO;
1da177e4 85
2a48fc0a 86 mutex_lock(&DAC960_mutex);
1da177e4
LT		 87 if (p->FirmwareType == DAC960_V1_Controller) {
88 if (p->V1.LogicalDriveInformation[drive_nr].
89 LogicalDriveState == DAC960_V1_LogicalDrive_Offline)
6e9624b8 90 goto out;
1da177e4
LT		 91 } else {
92 DAC960_V2_LogicalDeviceInfo_T *i =
93 p->V2.LogicalDeviceInformation[drive_nr];
94 if (!i || i->LogicalDeviceState == DAC960_V2_LogicalDevice_Offline)
6e9624b8 95 goto out;
1da177e4
LT		 96 }
97
b564f027 98 check_disk_change(bdev);
1da177e4
LT		 99
100 if (!get_capacity(p->disks[drive_nr]))
6e9624b8
AB		 101 goto out;
102 ret = 0;
103out:
2a48fc0a 104 mutex_unlock(&DAC960_mutex);
6e9624b8 105 return ret;
1da177e4
LT		 106}
107
a885c8c4 108static int DAC960_getgeo(struct block_device *bdev, struct hd_geometry *geo)
1da177e4 109{
a885c8c4 110 struct gendisk *disk = bdev->bd_disk;
1da177e4
LT		 111 DAC960_Controller_T *p = disk->queue->queuedata;
112 int drive_nr = (long)disk->private_data;
1da177e4
LT		 113
114 if (p->FirmwareType == DAC960_V1_Controller) {
a885c8c4
CH		 115 geo->heads = p->V1.GeometryTranslationHeads;
116 geo->sectors = p->V1.GeometryTranslationSectors;
117 geo->cylinders = p->V1.LogicalDriveInformation[drive_nr].
118 LogicalDriveSize / (geo->heads * geo->sectors);
1da177e4
LT		 119 } else {
120 DAC960_V2_LogicalDeviceInfo_T *i =
121 p->V2.LogicalDeviceInformation[drive_nr];
122 switch (i->DriveGeometry) {
123 case DAC960_V2_Geometry_128_32:
a885c8c4
CH		 124 geo->heads = 128;
125 geo->sectors = 32;
1da177e4
LT		 126 break;
127 case DAC960_V2_Geometry_255_63:
a885c8c4
CH		 128 geo->heads = 255;
129 geo->sectors = 63;
1da177e4
LT		 130 break;
131 default:
132 DAC960_Error("Illegal Logical Device Geometry %d\n",
133 p, i->DriveGeometry);
134 return -EINVAL;
135 }
136
a885c8c4
CH		 137 geo->cylinders = i->ConfigurableDeviceSize /
138 (geo->heads * geo->sectors);
1da177e4
LT		 139 }
140
a885c8c4 141 return 0;
1da177e4
LT		 142}
143
507daea2
TH		 144static unsigned int DAC960_check_events(struct gendisk *disk,
145 unsigned int clearing)
1da177e4
LT		 146{
147 DAC960_Controller_T *p = disk->queue->queuedata;
148 int drive_nr = (long)disk->private_data;
149
150 if (!p->LogicalDriveInitiallyAccessible[drive_nr])
507daea2 151 return DISK_EVENT_MEDIA_CHANGE;
1da177e4
LT		 152 return 0;
153}
154
155static int DAC960_revalidate_disk(struct gendisk *disk)
156{
157 DAC960_Controller_T *p = disk->queue->queuedata;
158 int unit = (long)disk->private_data;
159
160 set_capacity(disk, disk_size(p, unit));
161 return 0;
162}
163
83d5cde4 164static const struct block_device_operations DAC960_BlockDeviceOperations = {
1da177e4 165 .owner = THIS_MODULE,
b564f027 166 .open = DAC960_open,
a885c8c4 167 .getgeo = DAC960_getgeo,
507daea2 168 .check_events = DAC960_check_events,
1da177e4
LT		 169 .revalidate_disk = DAC960_revalidate_disk,
170};
171
172
173/*
174 DAC960_AnnounceDriver announces the Driver Version and Date, Author's Name,
175 Copyright Notice, and Electronic Mail Address.
176*/
177
178static void DAC960_AnnounceDriver(DAC960_Controller_T *Controller)
179{
180 DAC960_Announce("***** DAC960 RAID Driver Version "
181 DAC960_DriverVersion " of "
182 DAC960_DriverDate " *****\n", Controller);
183 DAC960_Announce("Copyright 1998-2001 by Leonard N. Zubkoff "
184 "<lnz@dandelion.com>\n", Controller);
185}
186
187
188/*
189 DAC960_Failure prints a standardized error message, and then returns false.
190*/
191
87d156bf 192static bool DAC960_Failure(DAC960_Controller_T *Controller,
1da177e4
LT		 193 unsigned char *ErrorMessage)
194{
195 DAC960_Error("While configuring DAC960 PCI RAID Controller at\n",
196 Controller);
197 if (Controller->IO_Address == 0)
198 DAC960_Error("PCI Bus %d Device %d Function %d I/O Address N/A "
199 "PCI Address 0x%X\n", Controller,
200 Controller->Bus, Controller->Device,
201 Controller->Function, Controller->PCI_Address);
202 else DAC960_Error("PCI Bus %d Device %d Function %d I/O Address "
203 "0x%X PCI Address 0x%X\n", Controller,
204 Controller->Bus, Controller->Device,
205 Controller->Function, Controller->IO_Address,
206 Controller->PCI_Address);
207 DAC960_Error("%s FAILED - DETACHING\n", Controller, ErrorMessage);
208 return false;
209}
210
211/*
212 init_dma_loaf() and slice_dma_loaf() are helper functions for
213 aggregating the dma-mapped memory for a well-known collection of
214 data structures that are of different lengths.
215
216 These routines don't guarantee any alignment. The caller must
217 include any space needed for alignment in the sizes of the structures
218 that are passed in.
219 */
220
87d156bf 221static bool init_dma_loaf(struct pci_dev *dev, struct dma_loaf *loaf,
1da177e4
LT		 222 size_t len)
223{
224 void *cpu_addr;
225 dma_addr_t dma_handle;
226
227 cpu_addr = pci_alloc_consistent(dev, len, &dma_handle);
228 if (cpu_addr == NULL)
229 return false;
230
231 loaf->cpu_free = loaf->cpu_base = cpu_addr;
232 loaf->dma_free =loaf->dma_base = dma_handle;
233 loaf->length = len;
234 memset(cpu_addr, 0, len);
235 return true;
236}
237
238static void *slice_dma_loaf(struct dma_loaf *loaf, size_t len,
239 dma_addr_t *dma_handle)
240{
241 void *cpu_end = loaf->cpu_free + len;
242 void *cpu_addr = loaf->cpu_free;
243
089fe1b2 244 BUG_ON(cpu_end > loaf->cpu_base + loaf->length);
1da177e4
LT		 245 *dma_handle = loaf->dma_free;
246 loaf->cpu_free = cpu_end;
247 loaf->dma_free += len;
248 return cpu_addr;
249}
250
251static void free_dma_loaf(struct pci_dev *dev, struct dma_loaf *loaf_handle)
252{
253 if (loaf_handle->cpu_base != NULL)
254 pci_free_consistent(dev, loaf_handle->length,
255 loaf_handle->cpu_base, loaf_handle->dma_base);
256}
257
258
259/*
260 DAC960_CreateAuxiliaryStructures allocates and initializes the auxiliary
261 data structures for Controller. It returns true on success and false on
262 failure.
263*/
264
87d156bf 265static bool DAC960_CreateAuxiliaryStructures(DAC960_Controller_T *Controller)
1da177e4
LT		 266{
267 int CommandAllocationLength, CommandAllocationGroupSize;
268 int CommandsRemaining = 0, CommandIdentifier, CommandGroupByteCount;
269 void *AllocationPointer = NULL;
270 void *ScatterGatherCPU = NULL;
271 dma_addr_t ScatterGatherDMA;
272 struct pci_pool *ScatterGatherPool;
273 void *RequestSenseCPU = NULL;
274 dma_addr_t RequestSenseDMA;
275 struct pci_pool *RequestSensePool = NULL;
276
277 if (Controller->FirmwareType == DAC960_V1_Controller)
278 {
279 CommandAllocationLength = offsetof(DAC960_Command_T, V1.EndMarker);
280 CommandAllocationGroupSize = DAC960_V1_CommandAllocationGroupSize;
281 ScatterGatherPool = pci_pool_create("DAC960_V1_ScatterGather",
282 Controller->PCIDevice,
283 DAC960_V1_ScatterGatherLimit * sizeof(DAC960_V1_ScatterGatherSegment_T),
284 sizeof(DAC960_V1_ScatterGatherSegment_T), 0);
285 if (ScatterGatherPool == NULL)
286 return DAC960_Failure(Controller,
287 "AUXILIARY STRUCTURE CREATION (SG)");
288 Controller->ScatterGatherPool = ScatterGatherPool;
289 }
290 else
291 {
292 CommandAllocationLength = offsetof(DAC960_Command_T, V2.EndMarker);
293 CommandAllocationGroupSize = DAC960_V2_CommandAllocationGroupSize;
294 ScatterGatherPool = pci_pool_create("DAC960_V2_ScatterGather",
295 Controller->PCIDevice,
296 DAC960_V2_ScatterGatherLimit * sizeof(DAC960_V2_ScatterGatherSegment_T),
297 sizeof(DAC960_V2_ScatterGatherSegment_T), 0);
298 if (ScatterGatherPool == NULL)
299 return DAC960_Failure(Controller,
300 "AUXILIARY STRUCTURE CREATION (SG)");
301 RequestSensePool = pci_pool_create("DAC960_V2_RequestSense",
302 Controller->PCIDevice, sizeof(DAC960_SCSI_RequestSense_T),
303 sizeof(int), 0);
304 if (RequestSensePool == NULL) {
305 pci_pool_destroy(ScatterGatherPool);
306 return DAC960_Failure(Controller,
307 "AUXILIARY STRUCTURE CREATION (SG)");
308 }
309 Controller->ScatterGatherPool = ScatterGatherPool;
310 Controller->V2.RequestSensePool = RequestSensePool;
311 }
312 Controller->CommandAllocationGroupSize = CommandAllocationGroupSize;
313 Controller->FreeCommands = NULL;
314 for (CommandIdentifier = 1;
315 CommandIdentifier <= Controller->DriverQueueDepth;
316 CommandIdentifier++)
317 {
318 DAC960_Command_T *Command;
319 if (--CommandsRemaining <= 0)
320 {
321 CommandsRemaining =
322 Controller->DriverQueueDepth - CommandIdentifier + 1;
323 if (CommandsRemaining > CommandAllocationGroupSize)
324 CommandsRemaining = CommandAllocationGroupSize;
325 CommandGroupByteCount =
326 CommandsRemaining * CommandAllocationLength;
06ff37ff 327 AllocationPointer = kzalloc(CommandGroupByteCount, GFP_ATOMIC);
1da177e4
LT		 328 if (AllocationPointer == NULL)
329 return DAC960_Failure(Controller,
330 "AUXILIARY STRUCTURE CREATION");
1da177e4
LT		 331 }
332 Command = (DAC960_Command_T *) AllocationPointer;
333 AllocationPointer += CommandAllocationLength;
334 Command->CommandIdentifier = CommandIdentifier;
335 Command->Controller = Controller;
336 Command->Next = Controller->FreeCommands;
337 Controller->FreeCommands = Command;
338 Controller->Commands[CommandIdentifier-1] = Command;
54e6ecb2 339 ScatterGatherCPU = pci_pool_alloc(ScatterGatherPool, GFP_ATOMIC,
1da177e4
LT		 340 &ScatterGatherDMA);
341 if (ScatterGatherCPU == NULL)
342 return DAC960_Failure(Controller, "AUXILIARY STRUCTURE CREATION");
343
344 if (RequestSensePool != NULL) {
54e6ecb2 345 RequestSenseCPU = pci_pool_alloc(RequestSensePool, GFP_ATOMIC,
1da177e4
LT		 346 &RequestSenseDMA);
347 if (RequestSenseCPU == NULL) {
348 pci_pool_free(ScatterGatherPool, ScatterGatherCPU,
349 ScatterGatherDMA);
350 return DAC960_Failure(Controller,
351 "AUXILIARY STRUCTURE CREATION");
352 }
353 }
354 if (Controller->FirmwareType == DAC960_V1_Controller) {
355 Command->cmd_sglist = Command->V1.ScatterList;
356 Command->V1.ScatterGatherList =
357 (DAC960_V1_ScatterGatherSegment_T *)ScatterGatherCPU;
358 Command->V1.ScatterGatherListDMA = ScatterGatherDMA;
45711f1a 359 sg_init_table(Command->cmd_sglist, DAC960_V1_ScatterGatherLimit);
1da177e4
LT		 360 } else {
361 Command->cmd_sglist = Command->V2.ScatterList;
362 Command->V2.ScatterGatherList =
363 (DAC960_V2_ScatterGatherSegment_T *)ScatterGatherCPU;
364 Command->V2.ScatterGatherListDMA = ScatterGatherDMA;
365 Command->V2.RequestSense =
366 (DAC960_SCSI_RequestSense_T *)RequestSenseCPU;
367 Command->V2.RequestSenseDMA = RequestSenseDMA;
45711f1a 368 sg_init_table(Command->cmd_sglist, DAC960_V2_ScatterGatherLimit);
1da177e4
LT		 369 }
370 }
371 return true;
372}
373
374
375/*
376 DAC960_DestroyAuxiliaryStructures deallocates the auxiliary data
377 structures for Controller.
378*/
379
380static void DAC960_DestroyAuxiliaryStructures(DAC960_Controller_T *Controller)
381{
382 int i;
383 struct pci_pool *ScatterGatherPool = Controller->ScatterGatherPool;
384 struct pci_pool *RequestSensePool = NULL;
385 void *ScatterGatherCPU;
386 dma_addr_t ScatterGatherDMA;
387 void *RequestSenseCPU;
388 dma_addr_t RequestSenseDMA;
389 DAC960_Command_T *CommandGroup = NULL;
390
391
392 if (Controller->FirmwareType == DAC960_V2_Controller)
393 RequestSensePool = Controller->V2.RequestSensePool;
394
395 Controller->FreeCommands = NULL;
396 for (i = 0; i < Controller->DriverQueueDepth; i++)
397 {
398 DAC960_Command_T *Command = Controller->Commands[i];
399
400 if (Command == NULL)
401 continue;
402
403 if (Controller->FirmwareType == DAC960_V1_Controller) {
404 ScatterGatherCPU = (void *)Command->V1.ScatterGatherList;
405 ScatterGatherDMA = Command->V1.ScatterGatherListDMA;
406 RequestSenseCPU = NULL;
407 RequestSenseDMA = (dma_addr_t)0;
408 } else {
409 ScatterGatherCPU = (void *)Command->V2.ScatterGatherList;
410 ScatterGatherDMA = Command->V2.ScatterGatherListDMA;
411 RequestSenseCPU = (void *)Command->V2.RequestSense;
412 RequestSenseDMA = Command->V2.RequestSenseDMA;
413 }
414 if (ScatterGatherCPU != NULL)
415 pci_pool_free(ScatterGatherPool, ScatterGatherCPU, ScatterGatherDMA);
416 if (RequestSenseCPU != NULL)
417 pci_pool_free(RequestSensePool, RequestSenseCPU, RequestSenseDMA);
418
419 if ((Command->CommandIdentifier
420 % Controller->CommandAllocationGroupSize) == 1) {
421 /*
422 * We can't free the group of commands until all of the
423 * request sense and scatter gather dma structures are free.
424 * Remember the beginning of the group, but don't free it
425 * until we've reached the beginning of the next group.
426 */
6044ec88
JJ		 427 kfree(CommandGroup);
428 CommandGroup = Command;
1da177e4
LT		 429 }
430 Controller->Commands[i] = NULL;
431 }
6044ec88 432 kfree(CommandGroup);
1da177e4
LT		 433
434 if (Controller->CombinedStatusBuffer != NULL)
435 {
436 kfree(Controller->CombinedStatusBuffer);
437 Controller->CombinedStatusBuffer = NULL;
438 Controller->CurrentStatusBuffer = NULL;
439 }
440
441 if (ScatterGatherPool != NULL)
442 pci_pool_destroy(ScatterGatherPool);
6044ec88
JJ		 443 if (Controller->FirmwareType == DAC960_V1_Controller)
444 return;
1da177e4
LT		 445
446 if (RequestSensePool != NULL)
447 pci_pool_destroy(RequestSensePool);
448
6044ec88 449 for (i = 0; i < DAC960_MaxLogicalDrives; i++) {
1da177e4
LT		 450 kfree(Controller->V2.LogicalDeviceInformation[i]);
451 Controller->V2.LogicalDeviceInformation[i] = NULL;
6044ec88 452 }
1da177e4
LT		 453
454 for (i = 0; i < DAC960_V2_MaxPhysicalDevices; i++)
455 {
6044ec88
JJ		 456 kfree(Controller->V2.PhysicalDeviceInformation[i]);
457 Controller->V2.PhysicalDeviceInformation[i] = NULL;
458 kfree(Controller->V2.InquiryUnitSerialNumber[i]);
459 Controller->V2.InquiryUnitSerialNumber[i] = NULL;
1da177e4
LT		 460 }
461}
462
463
464/*
465 DAC960_V1_ClearCommand clears critical fields of Command for DAC960 V1
466 Firmware Controllers.
467*/
468
469static inline void DAC960_V1_ClearCommand(DAC960_Command_T *Command)
470{
471 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
472 memset(CommandMailbox, 0, sizeof(DAC960_V1_CommandMailbox_T));
473 Command->V1.CommandStatus = 0;
474}
475
476
477/*
478 DAC960_V2_ClearCommand clears critical fields of Command for DAC960 V2
479 Firmware Controllers.
480*/
481
482static inline void DAC960_V2_ClearCommand(DAC960_Command_T *Command)
483{
484 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
485 memset(CommandMailbox, 0, sizeof(DAC960_V2_CommandMailbox_T));
486 Command->V2.CommandStatus = 0;
487}
488
489
490/*
491 DAC960_AllocateCommand allocates a Command structure from Controller's
492 free list. During driver initialization, a special initialization command
493 has been placed on the free list to guarantee that command allocation can
494 never fail.
495*/
496
497static inline DAC960_Command_T *DAC960_AllocateCommand(DAC960_Controller_T
498 *Controller)
499{
500 DAC960_Command_T *Command = Controller->FreeCommands;
501 if (Command == NULL) return NULL;
502 Controller->FreeCommands = Command->Next;
503 Command->Next = NULL;
504 return Command;
505}
506
507
508/*
509 DAC960_DeallocateCommand deallocates Command, returning it to Controller's
510 free list.
511*/
512
513static inline void DAC960_DeallocateCommand(DAC960_Command_T *Command)
514{
515 DAC960_Controller_T *Controller = Command->Controller;
516
517 Command->Request = NULL;
518 Command->Next = Controller->FreeCommands;
519 Controller->FreeCommands = Command;
520}
521
522
523/*
524 DAC960_WaitForCommand waits for a wake_up on Controller's Command Wait Queue.
525*/
526
527static void DAC960_WaitForCommand(DAC960_Controller_T *Controller)
528{
529 spin_unlock_irq(&Controller->queue_lock);
530 __wait_event(Controller->CommandWaitQueue, Controller->FreeCommands);
531 spin_lock_irq(&Controller->queue_lock);
532}
533
5b76ffd5
CH		 534/*
535 DAC960_GEM_QueueCommand queues Command for DAC960 GEM Series Controllers.
536*/
537
538static void DAC960_GEM_QueueCommand(DAC960_Command_T *Command)
539{
540 DAC960_Controller_T *Controller = Command->Controller;
541 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
542 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
543 DAC960_V2_CommandMailbox_T *NextCommandMailbox =
544 Controller->V2.NextCommandMailbox;
545
546 CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier;
547 DAC960_GEM_WriteCommandMailbox(NextCommandMailbox, CommandMailbox);
548
549 if (Controller->V2.PreviousCommandMailbox1->Words[0] == 0 ||
550 Controller->V2.PreviousCommandMailbox2->Words[0] == 0)
551 DAC960_GEM_MemoryMailboxNewCommand(ControllerBaseAddress);
552
553 Controller->V2.PreviousCommandMailbox2 =
554 Controller->V2.PreviousCommandMailbox1;
555 Controller->V2.PreviousCommandMailbox1 = NextCommandMailbox;
556
557 if (++NextCommandMailbox > Controller->V2.LastCommandMailbox)
558 NextCommandMailbox = Controller->V2.FirstCommandMailbox;
559
560 Controller->V2.NextCommandMailbox = NextCommandMailbox;
561}
1da177e4
LT		 562
563/*
564 DAC960_BA_QueueCommand queues Command for DAC960 BA Series Controllers.
565*/
566
567static void DAC960_BA_QueueCommand(DAC960_Command_T *Command)
568{
569 DAC960_Controller_T *Controller = Command->Controller;
570 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
571 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
572 DAC960_V2_CommandMailbox_T *NextCommandMailbox =
573 Controller->V2.NextCommandMailbox;
574 CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier;
575 DAC960_BA_WriteCommandMailbox(NextCommandMailbox, CommandMailbox);
576 if (Controller->V2.PreviousCommandMailbox1->Words[0] == 0 ||
577 Controller->V2.PreviousCommandMailbox2->Words[0] == 0)
578 DAC960_BA_MemoryMailboxNewCommand(ControllerBaseAddress);
579 Controller->V2.PreviousCommandMailbox2 =
580 Controller->V2.PreviousCommandMailbox1;
581 Controller->V2.PreviousCommandMailbox1 = NextCommandMailbox;
582 if (++NextCommandMailbox > Controller->V2.LastCommandMailbox)
583 NextCommandMailbox = Controller->V2.FirstCommandMailbox;
584 Controller->V2.NextCommandMailbox = NextCommandMailbox;
585}
586
587
588/*
589 DAC960_LP_QueueCommand queues Command for DAC960 LP Series Controllers.
590*/
591
592static void DAC960_LP_QueueCommand(DAC960_Command_T *Command)
593{
594 DAC960_Controller_T *Controller = Command->Controller;
595 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
596 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
597 DAC960_V2_CommandMailbox_T *NextCommandMailbox =
598 Controller->V2.NextCommandMailbox;
599 CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier;
600 DAC960_LP_WriteCommandMailbox(NextCommandMailbox, CommandMailbox);
601 if (Controller->V2.PreviousCommandMailbox1->Words[0] == 0 ||
602 Controller->V2.PreviousCommandMailbox2->Words[0] == 0)
603 DAC960_LP_MemoryMailboxNewCommand(ControllerBaseAddress);
604 Controller->V2.PreviousCommandMailbox2 =
605 Controller->V2.PreviousCommandMailbox1;
606 Controller->V2.PreviousCommandMailbox1 = NextCommandMailbox;
607 if (++NextCommandMailbox > Controller->V2.LastCommandMailbox)
608 NextCommandMailbox = Controller->V2.FirstCommandMailbox;
609 Controller->V2.NextCommandMailbox = NextCommandMailbox;
610}
611
612
613/*
614 DAC960_LA_QueueCommandDualMode queues Command for DAC960 LA Series
615 Controllers with Dual Mode Firmware.
616*/
617
618static void DAC960_LA_QueueCommandDualMode(DAC960_Command_T *Command)
619{
620 DAC960_Controller_T *Controller = Command->Controller;
621 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
622 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
623 DAC960_V1_CommandMailbox_T *NextCommandMailbox =
624 Controller->V1.NextCommandMailbox;
625 CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier;
626 DAC960_LA_WriteCommandMailbox(NextCommandMailbox, CommandMailbox);
627 if (Controller->V1.PreviousCommandMailbox1->Words[0] == 0 ||
628 Controller->V1.PreviousCommandMailbox2->Words[0] == 0)
629 DAC960_LA_MemoryMailboxNewCommand(ControllerBaseAddress);
630 Controller->V1.PreviousCommandMailbox2 =
631 Controller->V1.PreviousCommandMailbox1;
632 Controller->V1.PreviousCommandMailbox1 = NextCommandMailbox;
633 if (++NextCommandMailbox > Controller->V1.LastCommandMailbox)
634 NextCommandMailbox = Controller->V1.FirstCommandMailbox;
635 Controller->V1.NextCommandMailbox = NextCommandMailbox;
636}
637
638
639/*
640 DAC960_LA_QueueCommandSingleMode queues Command for DAC960 LA Series
641 Controllers with Single Mode Firmware.
642*/
643
644static void DAC960_LA_QueueCommandSingleMode(DAC960_Command_T *Command)
645{
646 DAC960_Controller_T *Controller = Command->Controller;
647 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
648 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
649 DAC960_V1_CommandMailbox_T *NextCommandMailbox =
650 Controller->V1.NextCommandMailbox;
651 CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier;
652 DAC960_LA_WriteCommandMailbox(NextCommandMailbox, CommandMailbox);
653 if (Controller->V1.PreviousCommandMailbox1->Words[0] == 0 ||
654 Controller->V1.PreviousCommandMailbox2->Words[0] == 0)
655 DAC960_LA_HardwareMailboxNewCommand(ControllerBaseAddress);
656 Controller->V1.PreviousCommandMailbox2 =
657 Controller->V1.PreviousCommandMailbox1;
658 Controller->V1.PreviousCommandMailbox1 = NextCommandMailbox;
659 if (++NextCommandMailbox > Controller->V1.LastCommandMailbox)
660 NextCommandMailbox = Controller->V1.FirstCommandMailbox;
661 Controller->V1.NextCommandMailbox = NextCommandMailbox;
662}
663
664
665/*
666 DAC960_PG_QueueCommandDualMode queues Command for DAC960 PG Series
667 Controllers with Dual Mode Firmware.
668*/
669
670static void DAC960_PG_QueueCommandDualMode(DAC960_Command_T *Command)
671{
672 DAC960_Controller_T *Controller = Command->Controller;
673 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
674 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
675 DAC960_V1_CommandMailbox_T *NextCommandMailbox =
676 Controller->V1.NextCommandMailbox;
677 CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier;
678 DAC960_PG_WriteCommandMailbox(NextCommandMailbox, CommandMailbox);
679 if (Controller->V1.PreviousCommandMailbox1->Words[0] == 0 ||
680 Controller->V1.PreviousCommandMailbox2->Words[0] == 0)
681 DAC960_PG_MemoryMailboxNewCommand(ControllerBaseAddress);
682 Controller->V1.PreviousCommandMailbox2 =
683 Controller->V1.PreviousCommandMailbox1;
684 Controller->V1.PreviousCommandMailbox1 = NextCommandMailbox;
685 if (++NextCommandMailbox > Controller->V1.LastCommandMailbox)
686 NextCommandMailbox = Controller->V1.FirstCommandMailbox;
687 Controller->V1.NextCommandMailbox = NextCommandMailbox;
688}
689
690
691/*
692 DAC960_PG_QueueCommandSingleMode queues Command for DAC960 PG Series
693 Controllers with Single Mode Firmware.
694*/
695
696static void DAC960_PG_QueueCommandSingleMode(DAC960_Command_T *Command)
697{
698 DAC960_Controller_T *Controller = Command->Controller;
699 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
700 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
701 DAC960_V1_CommandMailbox_T *NextCommandMailbox =
702 Controller->V1.NextCommandMailbox;
703 CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier;
704 DAC960_PG_WriteCommandMailbox(NextCommandMailbox, CommandMailbox);
705 if (Controller->V1.PreviousCommandMailbox1->Words[0] == 0 ||
706 Controller->V1.PreviousCommandMailbox2->Words[0] == 0)
707 DAC960_PG_HardwareMailboxNewCommand(ControllerBaseAddress);
708 Controller->V1.PreviousCommandMailbox2 =
709 Controller->V1.PreviousCommandMailbox1;
710 Controller->V1.PreviousCommandMailbox1 = NextCommandMailbox;
711 if (++NextCommandMailbox > Controller->V1.LastCommandMailbox)
712 NextCommandMailbox = Controller->V1.FirstCommandMailbox;
713 Controller->V1.NextCommandMailbox = NextCommandMailbox;
714}
715
716
717/*
718 DAC960_PD_QueueCommand queues Command for DAC960 PD Series Controllers.
719*/
720
721static void DAC960_PD_QueueCommand(DAC960_Command_T *Command)
722{
723 DAC960_Controller_T *Controller = Command->Controller;
724 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
725 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
726 CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier;
727 while (DAC960_PD_MailboxFullP(ControllerBaseAddress))
728 udelay(1);
729 DAC960_PD_WriteCommandMailbox(ControllerBaseAddress, CommandMailbox);
730 DAC960_PD_NewCommand(ControllerBaseAddress);
731}
732
733
734/*
735 DAC960_P_QueueCommand queues Command for DAC960 P Series Controllers.
736*/
737
738static void DAC960_P_QueueCommand(DAC960_Command_T *Command)
739{
740 DAC960_Controller_T *Controller = Command->Controller;
741 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
742 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
743 CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier;
744 switch (CommandMailbox->Common.CommandOpcode)
745 {
746 case DAC960_V1_Enquiry:
747 CommandMailbox->Common.CommandOpcode = DAC960_V1_Enquiry_Old;
748 break;
749 case DAC960_V1_GetDeviceState:
750 CommandMailbox->Common.CommandOpcode = DAC960_V1_GetDeviceState_Old;
751 break;
752 case DAC960_V1_Read:
753 CommandMailbox->Common.CommandOpcode = DAC960_V1_Read_Old;
754 DAC960_PD_To_P_TranslateReadWriteCommand(CommandMailbox);
755 break;
756 case DAC960_V1_Write:
757 CommandMailbox->Common.CommandOpcode = DAC960_V1_Write_Old;
758 DAC960_PD_To_P_TranslateReadWriteCommand(CommandMailbox);
759 break;
760 case DAC960_V1_ReadWithScatterGather:
761 CommandMailbox->Common.CommandOpcode =
762 DAC960_V1_ReadWithScatterGather_Old;
763 DAC960_PD_To_P_TranslateReadWriteCommand(CommandMailbox);
764 break;
765 case DAC960_V1_WriteWithScatterGather:
766 CommandMailbox->Common.CommandOpcode =
767 DAC960_V1_WriteWithScatterGather_Old;
768 DAC960_PD_To_P_TranslateReadWriteCommand(CommandMailbox);
769 break;
770 default:
771 break;
772 }
773 while (DAC960_PD_MailboxFullP(ControllerBaseAddress))
774 udelay(1);
775 DAC960_PD_WriteCommandMailbox(ControllerBaseAddress, CommandMailbox);
776 DAC960_PD_NewCommand(ControllerBaseAddress);
777}
778
779
780/*
781 DAC960_ExecuteCommand executes Command and waits for completion.
782*/
783
784static void DAC960_ExecuteCommand(DAC960_Command_T *Command)
785{
786 DAC960_Controller_T *Controller = Command->Controller;
6e9a4738 787 DECLARE_COMPLETION_ONSTACK(Completion);
1da177e4
LT		 788 unsigned long flags;
789 Command->Completion = &Completion;
790
791 spin_lock_irqsave(&Controller->queue_lock, flags);
792 DAC960_QueueCommand(Command);
793 spin_unlock_irqrestore(&Controller->queue_lock, flags);
794
795 if (in_interrupt())
796 return;
797 wait_for_completion(&Completion);
798}
799
800
801/*
802 DAC960_V1_ExecuteType3 executes a DAC960 V1 Firmware Controller Type 3
803 Command and waits for completion. It returns true on success and false
804 on failure.
805*/
806
87d156bf 807static bool DAC960_V1_ExecuteType3(DAC960_Controller_T *Controller,
1da177e4
LT		 808 DAC960_V1_CommandOpcode_T CommandOpcode,
809 dma_addr_t DataDMA)
810{
811 DAC960_Command_T *Command = DAC960_AllocateCommand(Controller);
812 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
813 DAC960_V1_CommandStatus_T CommandStatus;
814 DAC960_V1_ClearCommand(Command);
815 Command->CommandType = DAC960_ImmediateCommand;
816 CommandMailbox->Type3.CommandOpcode = CommandOpcode;
817 CommandMailbox->Type3.BusAddress = DataDMA;
818 DAC960_ExecuteCommand(Command);
819 CommandStatus = Command->V1.CommandStatus;
820 DAC960_DeallocateCommand(Command);
821 return (CommandStatus == DAC960_V1_NormalCompletion);
822}
823
824
825/*
826 DAC960_V1_ExecuteTypeB executes a DAC960 V1 Firmware Controller Type 3B
827 Command and waits for completion. It returns true on success and false
828 on failure.
829*/
830
87d156bf 831static bool DAC960_V1_ExecuteType3B(DAC960_Controller_T *Controller,
1da177e4
LT		 832 DAC960_V1_CommandOpcode_T CommandOpcode,
833 unsigned char CommandOpcode2,
834 dma_addr_t DataDMA)
835{
836 DAC960_Command_T *Command = DAC960_AllocateCommand(Controller);
837 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
838 DAC960_V1_CommandStatus_T CommandStatus;
839 DAC960_V1_ClearCommand(Command);
840 Command->CommandType = DAC960_ImmediateCommand;
841 CommandMailbox->Type3B.CommandOpcode = CommandOpcode;
842 CommandMailbox->Type3B.CommandOpcode2 = CommandOpcode2;
843 CommandMailbox->Type3B.BusAddress = DataDMA;
844 DAC960_ExecuteCommand(Command);
845 CommandStatus = Command->V1.CommandStatus;
846 DAC960_DeallocateCommand(Command);
847 return (CommandStatus == DAC960_V1_NormalCompletion);
848}
849
850
851/*
852 DAC960_V1_ExecuteType3D executes a DAC960 V1 Firmware Controller Type 3D
853 Command and waits for completion. It returns true on success and false
854 on failure.
855*/
856
87d156bf 857static bool DAC960_V1_ExecuteType3D(DAC960_Controller_T *Controller,
1da177e4
LT		 858 DAC960_V1_CommandOpcode_T CommandOpcode,
859 unsigned char Channel,
860 unsigned char TargetID,
861 dma_addr_t DataDMA)
862{
863 DAC960_Command_T *Command = DAC960_AllocateCommand(Controller);
864 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
865 DAC960_V1_CommandStatus_T CommandStatus;
866 DAC960_V1_ClearCommand(Command);
867 Command->CommandType = DAC960_ImmediateCommand;
868 CommandMailbox->Type3D.CommandOpcode = CommandOpcode;
869 CommandMailbox->Type3D.Channel = Channel;
870 CommandMailbox->Type3D.TargetID = TargetID;
871 CommandMailbox->Type3D.BusAddress = DataDMA;
872 DAC960_ExecuteCommand(Command);
873 CommandStatus = Command->V1.CommandStatus;
874 DAC960_DeallocateCommand(Command);
875 return (CommandStatus == DAC960_V1_NormalCompletion);
876}
877
878
879/*
880 DAC960_V2_GeneralInfo executes a DAC960 V2 Firmware General Information
881 Reading IOCTL Command and waits for completion. It returns true on success
882 and false on failure.
883
884 Return data in The controller's HealthStatusBuffer, which is dma-able memory
885*/
886
87d156bf 887static bool DAC960_V2_GeneralInfo(DAC960_Controller_T *Controller)
1da177e4
LT		 888{
889 DAC960_Command_T *Command = DAC960_AllocateCommand(Controller);
890 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
891 DAC960_V2_CommandStatus_T CommandStatus;
892 DAC960_V2_ClearCommand(Command);
893 Command->CommandType = DAC960_ImmediateCommand;
894 CommandMailbox->Common.CommandOpcode = DAC960_V2_IOCTL;
895 CommandMailbox->Common.CommandControlBits
896 .DataTransferControllerToHost = true;
897 CommandMailbox->Common.CommandControlBits
898 .NoAutoRequestSense = true;
899 CommandMailbox->Common.DataTransferSize = sizeof(DAC960_V2_HealthStatusBuffer_T);
900 CommandMailbox->Common.IOCTL_Opcode = DAC960_V2_GetHealthStatus;
901 CommandMailbox->Common.DataTransferMemoryAddress
902 .ScatterGatherSegments[0]
903 .SegmentDataPointer =
904 Controller->V2.HealthStatusBufferDMA;
905 CommandMailbox->Common.DataTransferMemoryAddress
906 .ScatterGatherSegments[0]
907 .SegmentByteCount =
908 CommandMailbox->Common.DataTransferSize;
909 DAC960_ExecuteCommand(Command);
910 CommandStatus = Command->V2.CommandStatus;
911 DAC960_DeallocateCommand(Command);
912 return (CommandStatus == DAC960_V2_NormalCompletion);
913}
914
915
916/*
917 DAC960_V2_ControllerInfo executes a DAC960 V2 Firmware Controller
918 Information Reading IOCTL Command and waits for completion. It returns
919 true on success and false on failure.
920
921 Data is returned in the controller's V2.NewControllerInformation dma-able
922 memory buffer.
923*/
924
87d156bf 925static bool DAC960_V2_NewControllerInfo(DAC960_Controller_T *Controller)
1da177e4
LT		 926{
927 DAC960_Command_T *Command = DAC960_AllocateCommand(Controller);
928 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
929 DAC960_V2_CommandStatus_T CommandStatus;
930 DAC960_V2_ClearCommand(Command);
931 Command->CommandType = DAC960_ImmediateCommand;
932 CommandMailbox->ControllerInfo.CommandOpcode = DAC960_V2_IOCTL;
933 CommandMailbox->ControllerInfo.CommandControlBits
934 .DataTransferControllerToHost = true;
935 CommandMailbox->ControllerInfo.CommandControlBits
936 .NoAutoRequestSense = true;
937 CommandMailbox->ControllerInfo.DataTransferSize = sizeof(DAC960_V2_ControllerInfo_T);
938 CommandMailbox->ControllerInfo.ControllerNumber = 0;
939 CommandMailbox->ControllerInfo.IOCTL_Opcode = DAC960_V2_GetControllerInfo;
940 CommandMailbox->ControllerInfo.DataTransferMemoryAddress
941 .ScatterGatherSegments[0]
942 .SegmentDataPointer =
943 Controller->V2.NewControllerInformationDMA;
944 CommandMailbox->ControllerInfo.DataTransferMemoryAddress
945 .ScatterGatherSegments[0]
946 .SegmentByteCount =
947 CommandMailbox->ControllerInfo.DataTransferSize;
948 DAC960_ExecuteCommand(Command);
949 CommandStatus = Command->V2.CommandStatus;
950 DAC960_DeallocateCommand(Command);
951 return (CommandStatus == DAC960_V2_NormalCompletion);
952}
953
954
955/*
956 DAC960_V2_LogicalDeviceInfo executes a DAC960 V2 Firmware Controller Logical
957 Device Information Reading IOCTL Command and waits for completion. It
958 returns true on success and false on failure.
959
960 Data is returned in the controller's V2.NewLogicalDeviceInformation
961*/
962
87d156bf 963static bool DAC960_V2_NewLogicalDeviceInfo(DAC960_Controller_T *Controller,
1da177e4
LT		 964 unsigned short LogicalDeviceNumber)
965{
966 DAC960_Command_T *Command = DAC960_AllocateCommand(Controller);
967 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
968 DAC960_V2_CommandStatus_T CommandStatus;
969
970 DAC960_V2_ClearCommand(Command);
971 Command->CommandType = DAC960_ImmediateCommand;
972 CommandMailbox->LogicalDeviceInfo.CommandOpcode =
973 DAC960_V2_IOCTL;
974 CommandMailbox->LogicalDeviceInfo.CommandControlBits
975 .DataTransferControllerToHost = true;
976 CommandMailbox->LogicalDeviceInfo.CommandControlBits
977 .NoAutoRequestSense = true;
978 CommandMailbox->LogicalDeviceInfo.DataTransferSize =
979 sizeof(DAC960_V2_LogicalDeviceInfo_T);
980 CommandMailbox->LogicalDeviceInfo.LogicalDevice.LogicalDeviceNumber =
981 LogicalDeviceNumber;
982 CommandMailbox->LogicalDeviceInfo.IOCTL_Opcode = DAC960_V2_GetLogicalDeviceInfoValid;
983 CommandMailbox->LogicalDeviceInfo.DataTransferMemoryAddress
984 .ScatterGatherSegments[0]
985 .SegmentDataPointer =
986 Controller->V2.NewLogicalDeviceInformationDMA;
987 CommandMailbox->LogicalDeviceInfo.DataTransferMemoryAddress
988 .ScatterGatherSegments[0]
989 .SegmentByteCount =
990 CommandMailbox->LogicalDeviceInfo.DataTransferSize;
991 DAC960_ExecuteCommand(Command);
992 CommandStatus = Command->V2.CommandStatus;
993 DAC960_DeallocateCommand(Command);
994 return (CommandStatus == DAC960_V2_NormalCompletion);
995}
996
997
998/*
999 DAC960_V2_PhysicalDeviceInfo executes a DAC960 V2 Firmware Controller "Read
1000 Physical Device Information" IOCTL Command and waits for completion. It
1001 returns true on success and false on failure.
1002
1003 The Channel, TargetID, LogicalUnit arguments should be 0 the first time
1004 this function is called for a given controller. This will return data
1005 for the "first" device on that controller. The returned data includes a
1006 Channel, TargetID, LogicalUnit that can be passed in to this routine to
1007 get data for the NEXT device on that controller.
1008
1009 Data is stored in the controller's V2.NewPhysicalDeviceInfo dma-able
1010 memory buffer.
1011
1012*/
1013
87d156bf 1014static bool DAC960_V2_NewPhysicalDeviceInfo(DAC960_Controller_T *Controller,
1da177e4
LT		 1015 unsigned char Channel,
1016 unsigned char TargetID,
1017 unsigned char LogicalUnit)
1018{
1019 DAC960_Command_T *Command = DAC960_AllocateCommand(Controller);
1020 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
1021 DAC960_V2_CommandStatus_T CommandStatus;
1022
1023 DAC960_V2_ClearCommand(Command);
1024 Command->CommandType = DAC960_ImmediateCommand;
1025 CommandMailbox->PhysicalDeviceInfo.CommandOpcode = DAC960_V2_IOCTL;
1026 CommandMailbox->PhysicalDeviceInfo.CommandControlBits
1027 .DataTransferControllerToHost = true;
1028 CommandMailbox->PhysicalDeviceInfo.CommandControlBits
1029 .NoAutoRequestSense = true;
1030 CommandMailbox->PhysicalDeviceInfo.DataTransferSize =
1031 sizeof(DAC960_V2_PhysicalDeviceInfo_T);
1032 CommandMailbox->PhysicalDeviceInfo.PhysicalDevice.LogicalUnit = LogicalUnit;
1033 CommandMailbox->PhysicalDeviceInfo.PhysicalDevice.TargetID = TargetID;
1034 CommandMailbox->PhysicalDeviceInfo.PhysicalDevice.Channel = Channel;
1035 CommandMailbox->PhysicalDeviceInfo.IOCTL_Opcode =
1036 DAC960_V2_GetPhysicalDeviceInfoValid;
1037 CommandMailbox->PhysicalDeviceInfo.DataTransferMemoryAddress
1038 .ScatterGatherSegments[0]
1039 .SegmentDataPointer =
1040 Controller->V2.NewPhysicalDeviceInformationDMA;
1041 CommandMailbox->PhysicalDeviceInfo.DataTransferMemoryAddress
1042 .ScatterGatherSegments[0]
1043 .SegmentByteCount =
1044 CommandMailbox->PhysicalDeviceInfo.DataTransferSize;
1045 DAC960_ExecuteCommand(Command);
1046 CommandStatus = Command->V2.CommandStatus;
1047 DAC960_DeallocateCommand(Command);
1048 return (CommandStatus == DAC960_V2_NormalCompletion);
1049}
1050
1051
1052static void DAC960_V2_ConstructNewUnitSerialNumber(
1053 DAC960_Controller_T *Controller,
1054 DAC960_V2_CommandMailbox_T *CommandMailbox, int Channel, int TargetID,
1055 int LogicalUnit)
1056{
1057 CommandMailbox->SCSI_10.CommandOpcode = DAC960_V2_SCSI_10_Passthru;
1058 CommandMailbox->SCSI_10.CommandControlBits
1059 .DataTransferControllerToHost = true;
1060 CommandMailbox->SCSI_10.CommandControlBits
1061 .NoAutoRequestSense = true;
1062 CommandMailbox->SCSI_10.DataTransferSize =
1063 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T);
1064 CommandMailbox->SCSI_10.PhysicalDevice.LogicalUnit = LogicalUnit;
1065 CommandMailbox->SCSI_10.PhysicalDevice.TargetID = TargetID;
1066 CommandMailbox->SCSI_10.PhysicalDevice.Channel = Channel;
1067 CommandMailbox->SCSI_10.CDBLength = 6;
1068 CommandMailbox->SCSI_10.SCSI_CDB[0] = 0x12; /* INQUIRY */
1069 CommandMailbox->SCSI_10.SCSI_CDB[1] = 1; /* EVPD = 1 */
1070 CommandMailbox->SCSI_10.SCSI_CDB[2] = 0x80; /* Page Code */
1071 CommandMailbox->SCSI_10.SCSI_CDB[3] = 0; /* Reserved */
1072 CommandMailbox->SCSI_10.SCSI_CDB[4] =
1073 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T);
1074 CommandMailbox->SCSI_10.SCSI_CDB[5] = 0; /* Control */
1075 CommandMailbox->SCSI_10.DataTransferMemoryAddress
1076 .ScatterGatherSegments[0]
1077 .SegmentDataPointer =
1078 Controller->V2.NewInquiryUnitSerialNumberDMA;
1079 CommandMailbox->SCSI_10.DataTransferMemoryAddress
1080 .ScatterGatherSegments[0]
1081 .SegmentByteCount =
1082 CommandMailbox->SCSI_10.DataTransferSize;
1083}
1084
1085
1086/*
1087 DAC960_V2_NewUnitSerialNumber executes an SCSI pass-through
1088 Inquiry command to a SCSI device identified by Channel number,
1089 Target id, Logical Unit Number. This function Waits for completion
1090 of the command.
1091
1092 The return data includes Unit Serial Number information for the
1093 specified device.
1094
1095 Data is stored in the controller's V2.NewPhysicalDeviceInfo dma-able
1096 memory buffer.
1097*/
1098
87d156bf 1099static bool DAC960_V2_NewInquiryUnitSerialNumber(DAC960_Controller_T *Controller,
1da177e4
LT		 1100 int Channel, int TargetID, int LogicalUnit)
1101{
1102 DAC960_Command_T *Command;
1103 DAC960_V2_CommandMailbox_T *CommandMailbox;
1104 DAC960_V2_CommandStatus_T CommandStatus;
1105
1106 Command = DAC960_AllocateCommand(Controller);
1107 CommandMailbox = &Command->V2.CommandMailbox;
1108 DAC960_V2_ClearCommand(Command);
1109 Command->CommandType = DAC960_ImmediateCommand;
1110
1111 DAC960_V2_ConstructNewUnitSerialNumber(Controller, CommandMailbox,
1112 Channel, TargetID, LogicalUnit);
1113
1114 DAC960_ExecuteCommand(Command);
1115 CommandStatus = Command->V2.CommandStatus;
1116 DAC960_DeallocateCommand(Command);
1117 return (CommandStatus == DAC960_V2_NormalCompletion);
1118}
1119
1120
1121/*
1122 DAC960_V2_DeviceOperation executes a DAC960 V2 Firmware Controller Device
1123 Operation IOCTL Command and waits for completion. It returns true on
1124 success and false on failure.
1125*/
1126
87d156bf 1127static bool DAC960_V2_DeviceOperation(DAC960_Controller_T *Controller,
1da177e4
LT		 1128 DAC960_V2_IOCTL_Opcode_T IOCTL_Opcode,
1129 DAC960_V2_OperationDevice_T
1130 OperationDevice)
1131{
1132 DAC960_Command_T *Command = DAC960_AllocateCommand(Controller);
1133 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
1134 DAC960_V2_CommandStatus_T CommandStatus;
1135 DAC960_V2_ClearCommand(Command);
1136 Command->CommandType = DAC960_ImmediateCommand;
1137 CommandMailbox->DeviceOperation.CommandOpcode = DAC960_V2_IOCTL;
1138 CommandMailbox->DeviceOperation.CommandControlBits
1139 .DataTransferControllerToHost = true;
1140 CommandMailbox->DeviceOperation.CommandControlBits
1141 .NoAutoRequestSense = true;
1142 CommandMailbox->DeviceOperation.IOCTL_Opcode = IOCTL_Opcode;
1143 CommandMailbox->DeviceOperation.OperationDevice = OperationDevice;
1144 DAC960_ExecuteCommand(Command);
1145 CommandStatus = Command->V2.CommandStatus;
1146 DAC960_DeallocateCommand(Command);
1147 return (CommandStatus == DAC960_V2_NormalCompletion);
1148}
1149
1150
1151/*
1152 DAC960_V1_EnableMemoryMailboxInterface enables the Memory Mailbox Interface
1153 for DAC960 V1 Firmware Controllers.
1154
1155 PD and P controller types have no memory mailbox, but still need the
1156 other dma mapped memory.
1157*/
1158
87d156bf 1159static bool DAC960_V1_EnableMemoryMailboxInterface(DAC960_Controller_T
1da177e4
LT		 1160 *Controller)
1161{
1162 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
1163 DAC960_HardwareType_T hw_type = Controller->HardwareType;
1164 struct pci_dev *PCI_Device = Controller->PCIDevice;
1165 struct dma_loaf *DmaPages = &Controller->DmaPages;
1166 size_t DmaPagesSize;
1167 size_t CommandMailboxesSize;
1168 size_t StatusMailboxesSize;
1169
1170 DAC960_V1_CommandMailbox_T *CommandMailboxesMemory;
1171 dma_addr_t CommandMailboxesMemoryDMA;
1172
1173 DAC960_V1_StatusMailbox_T *StatusMailboxesMemory;
1174 dma_addr_t StatusMailboxesMemoryDMA;
1175
1176 DAC960_V1_CommandMailbox_T CommandMailbox;
1177 DAC960_V1_CommandStatus_T CommandStatus;
1178 int TimeoutCounter;
1179 int i;
1180
cecd353a
DK		 1181 memset(&CommandMailbox, 0, sizeof(DAC960_V1_CommandMailbox_T));
1182
284901a9 1183 if (pci_set_dma_mask(Controller->PCIDevice, DMA_BIT_MASK(32)))
1da177e4 1184 return DAC960_Failure(Controller, "DMA mask out of range");
284901a9 1185 Controller->BounceBufferLimit = DMA_BIT_MASK(32);
1da177e4
LT		 1186
1187 if ((hw_type == DAC960_PD_Controller) || (hw_type == DAC960_P_Controller)) {
1188 CommandMailboxesSize = 0;
1189 StatusMailboxesSize = 0;
1190 } else {
1191 CommandMailboxesSize = DAC960_V1_CommandMailboxCount * sizeof(DAC960_V1_CommandMailbox_T);
1192 StatusMailboxesSize = DAC960_V1_StatusMailboxCount * sizeof(DAC960_V1_StatusMailbox_T);
1193 }
1194 DmaPagesSize = CommandMailboxesSize + StatusMailboxesSize +
1195 sizeof(DAC960_V1_DCDB_T) + sizeof(DAC960_V1_Enquiry_T) +
1196 sizeof(DAC960_V1_ErrorTable_T) + sizeof(DAC960_V1_EventLogEntry_T) +
1197 sizeof(DAC960_V1_RebuildProgress_T) +
1198 sizeof(DAC960_V1_LogicalDriveInformationArray_T) +
1199 sizeof(DAC960_V1_BackgroundInitializationStatus_T) +
1200 sizeof(DAC960_V1_DeviceState_T) + sizeof(DAC960_SCSI_Inquiry_T) +
1201 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T);
1202
1203 if (!init_dma_loaf(PCI_Device, DmaPages, DmaPagesSize))
1204 return false;
1205
1206
1207 if ((hw_type == DAC960_PD_Controller) || (hw_type == DAC960_P_Controller))
1208 goto skip_mailboxes;
1209
1210 CommandMailboxesMemory = slice_dma_loaf(DmaPages,
1211 CommandMailboxesSize, &CommandMailboxesMemoryDMA);
1212
1213 /* These are the base addresses for the command memory mailbox array */
1214 Controller->V1.FirstCommandMailbox = CommandMailboxesMemory;
1215 Controller->V1.FirstCommandMailboxDMA = CommandMailboxesMemoryDMA;
1216
1217 CommandMailboxesMemory += DAC960_V1_CommandMailboxCount - 1;
1218 Controller->V1.LastCommandMailbox = CommandMailboxesMemory;
1219 Controller->V1.NextCommandMailbox = Controller->V1.FirstCommandMailbox;
1220 Controller->V1.PreviousCommandMailbox1 = Controller->V1.LastCommandMailbox;
1221 Controller->V1.PreviousCommandMailbox2 =
1222 Controller->V1.LastCommandMailbox - 1;
1223
1224 /* These are the base addresses for the status memory mailbox array */
1225 StatusMailboxesMemory = slice_dma_loaf(DmaPages,
1226 StatusMailboxesSize, &StatusMailboxesMemoryDMA);
1227
1228 Controller->V1.FirstStatusMailbox = StatusMailboxesMemory;
1229 Controller->V1.FirstStatusMailboxDMA = StatusMailboxesMemoryDMA;
1230 StatusMailboxesMemory += DAC960_V1_StatusMailboxCount - 1;
1231 Controller->V1.LastStatusMailbox = StatusMailboxesMemory;
1232 Controller->V1.NextStatusMailbox = Controller->V1.FirstStatusMailbox;
1233
1234skip_mailboxes:
1235 Controller->V1.MonitoringDCDB = slice_dma_loaf(DmaPages,
1236 sizeof(DAC960_V1_DCDB_T),
1237 &Controller->V1.MonitoringDCDB_DMA);
1238
1239 Controller->V1.NewEnquiry = slice_dma_loaf(DmaPages,
1240 sizeof(DAC960_V1_Enquiry_T),
1241 &Controller->V1.NewEnquiryDMA);
1242
1243 Controller->V1.NewErrorTable = slice_dma_loaf(DmaPages,
1244 sizeof(DAC960_V1_ErrorTable_T),
1245 &Controller->V1.NewErrorTableDMA);
1246
1247 Controller->V1.EventLogEntry = slice_dma_loaf(DmaPages,
1248 sizeof(DAC960_V1_EventLogEntry_T),
1249 &Controller->V1.EventLogEntryDMA);
1250
1251 Controller->V1.RebuildProgress = slice_dma_loaf(DmaPages,
1252 sizeof(DAC960_V1_RebuildProgress_T),
1253 &Controller->V1.RebuildProgressDMA);
1254
1255 Controller->V1.NewLogicalDriveInformation = slice_dma_loaf(DmaPages,
1256 sizeof(DAC960_V1_LogicalDriveInformationArray_T),
1257 &Controller->V1.NewLogicalDriveInformationDMA);
1258
1259 Controller->V1.BackgroundInitializationStatus = slice_dma_loaf(DmaPages,
1260 sizeof(DAC960_V1_BackgroundInitializationStatus_T),
1261 &Controller->V1.BackgroundInitializationStatusDMA);
1262
1263 Controller->V1.NewDeviceState = slice_dma_loaf(DmaPages,
1264 sizeof(DAC960_V1_DeviceState_T),
1265 &Controller->V1.NewDeviceStateDMA);
1266
1267 Controller->V1.NewInquiryStandardData = slice_dma_loaf(DmaPages,
1268 sizeof(DAC960_SCSI_Inquiry_T),
1269 &Controller->V1.NewInquiryStandardDataDMA);
1270
1271 Controller->V1.NewInquiryUnitSerialNumber = slice_dma_loaf(DmaPages,
1272 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T),
1273 &Controller->V1.NewInquiryUnitSerialNumberDMA);
1274
1275 if ((hw_type == DAC960_PD_Controller) || (hw_type == DAC960_P_Controller))
1276 return true;
1277
1278 /* Enable the Memory Mailbox Interface. */
1279 Controller->V1.DualModeMemoryMailboxInterface = true;
1280 CommandMailbox.TypeX.CommandOpcode = 0x2B;
1281 CommandMailbox.TypeX.CommandIdentifier = 0;
1282 CommandMailbox.TypeX.CommandOpcode2 = 0x14;
1283 CommandMailbox.TypeX.CommandMailboxesBusAddress =
1284 Controller->V1.FirstCommandMailboxDMA;
1285 CommandMailbox.TypeX.StatusMailboxesBusAddress =
1286 Controller->V1.FirstStatusMailboxDMA;
1287#define TIMEOUT_COUNT 1000000
1288
1289 for (i = 0; i < 2; i++)
1290 switch (Controller->HardwareType)
1291 {
1292 case DAC960_LA_Controller:
1293 TimeoutCounter = TIMEOUT_COUNT;
1294 while (--TimeoutCounter >= 0)
1295 {
1296 if (!DAC960_LA_HardwareMailboxFullP(ControllerBaseAddress))
1297 break;
1298 udelay(10);
1299 }
1300 if (TimeoutCounter < 0) return false;
1301 DAC960_LA_WriteHardwareMailbox(ControllerBaseAddress, &CommandMailbox);
1302 DAC960_LA_HardwareMailboxNewCommand(ControllerBaseAddress);
1303 TimeoutCounter = TIMEOUT_COUNT;
1304 while (--TimeoutCounter >= 0)
1305 {
1306 if (DAC960_LA_HardwareMailboxStatusAvailableP(
1307 ControllerBaseAddress))
1308 break;
1309 udelay(10);
1310 }
1311 if (TimeoutCounter < 0) return false;
1312 CommandStatus = DAC960_LA_ReadStatusRegister(ControllerBaseAddress);
1313 DAC960_LA_AcknowledgeHardwareMailboxInterrupt(ControllerBaseAddress);
1314 DAC960_LA_AcknowledgeHardwareMailboxStatus(ControllerBaseAddress);
1315 if (CommandStatus == DAC960_V1_NormalCompletion) return true;
1316 Controller->V1.DualModeMemoryMailboxInterface = false;
1317 CommandMailbox.TypeX.CommandOpcode2 = 0x10;
1318 break;
1319 case DAC960_PG_Controller:
1320 TimeoutCounter = TIMEOUT_COUNT;
1321 while (--TimeoutCounter >= 0)
1322 {
1323 if (!DAC960_PG_HardwareMailboxFullP(ControllerBaseAddress))
1324 break;
1325 udelay(10);
1326 }
1327 if (TimeoutCounter < 0) return false;
1328 DAC960_PG_WriteHardwareMailbox(ControllerBaseAddress, &CommandMailbox);
1329 DAC960_PG_HardwareMailboxNewCommand(ControllerBaseAddress);
1330
1331 TimeoutCounter = TIMEOUT_COUNT;
1332 while (--TimeoutCounter >= 0)
1333 {
1334 if (DAC960_PG_HardwareMailboxStatusAvailableP(
1335 ControllerBaseAddress))
1336 break;
1337 udelay(10);
1338 }
1339 if (TimeoutCounter < 0) return false;
1340 CommandStatus = DAC960_PG_ReadStatusRegister(ControllerBaseAddress);
1341 DAC960_PG_AcknowledgeHardwareMailboxInterrupt(ControllerBaseAddress);
1342 DAC960_PG_AcknowledgeHardwareMailboxStatus(ControllerBaseAddress);
1343 if (CommandStatus == DAC960_V1_NormalCompletion) return true;
1344 Controller->V1.DualModeMemoryMailboxInterface = false;
1345 CommandMailbox.TypeX.CommandOpcode2 = 0x10;
1346 break;
1347 default:
1348 DAC960_Failure(Controller, "Unknown Controller Type\n");
1349 break;
1350 }
1351 return false;
1352}
1353
1354
1355/*
1356 DAC960_V2_EnableMemoryMailboxInterface enables the Memory Mailbox Interface
1357 for DAC960 V2 Firmware Controllers.
1358
1359 Aggregate the space needed for the controller's memory mailbox and
1360 the other data structures that will be targets of dma transfers with
1361 the controller. Allocate a dma-mapped region of memory to hold these
1362 structures. Then, save CPU pointers and dma_addr_t values to reference
1363 the structures that are contained in that region.
1364*/
1365
87d156bf 1366static bool DAC960_V2_EnableMemoryMailboxInterface(DAC960_Controller_T
1da177e4
LT		 1367 *Controller)
1368{
1369 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
1370 struct pci_dev *PCI_Device = Controller->PCIDevice;
1371 struct dma_loaf *DmaPages = &Controller->DmaPages;
1372 size_t DmaPagesSize;
1373 size_t CommandMailboxesSize;
1374 size_t StatusMailboxesSize;
1375
1376 DAC960_V2_CommandMailbox_T *CommandMailboxesMemory;
1377 dma_addr_t CommandMailboxesMemoryDMA;
1378
1379 DAC960_V2_StatusMailbox_T *StatusMailboxesMemory;
1380 dma_addr_t StatusMailboxesMemoryDMA;
1381
1382 DAC960_V2_CommandMailbox_T *CommandMailbox;
1383 dma_addr_t CommandMailboxDMA;
1384 DAC960_V2_CommandStatus_T CommandStatus;
1385
6a35528a
YH		 1386 if (!pci_set_dma_mask(Controller->PCIDevice, DMA_BIT_MASK(64)))
1387 Controller->BounceBufferLimit = DMA_BIT_MASK(64);
284901a9
YH		 1388 else if (!pci_set_dma_mask(Controller->PCIDevice, DMA_BIT_MASK(32)))
1389 Controller->BounceBufferLimit = DMA_BIT_MASK(32);
868047fc
MW		 1390 else
1391 return DAC960_Failure(Controller, "DMA mask out of range");
1da177e4
LT		 1392
1393 /* This is a temporary dma mapping, used only in the scope of this function */
0a361e31 1394 CommandMailbox = pci_alloc_consistent(PCI_Device,
1da177e4
LT		 1395 sizeof(DAC960_V2_CommandMailbox_T), &CommandMailboxDMA);
1396 if (CommandMailbox == NULL)
1397 return false;
1398
1399 CommandMailboxesSize = DAC960_V2_CommandMailboxCount * sizeof(DAC960_V2_CommandMailbox_T);
1400 StatusMailboxesSize = DAC960_V2_StatusMailboxCount * sizeof(DAC960_V2_StatusMailbox_T);
1401 DmaPagesSize =
1402 CommandMailboxesSize + StatusMailboxesSize +
1403 sizeof(DAC960_V2_HealthStatusBuffer_T) +
1404 sizeof(DAC960_V2_ControllerInfo_T) +
1405 sizeof(DAC960_V2_LogicalDeviceInfo_T) +
1406 sizeof(DAC960_V2_PhysicalDeviceInfo_T) +
1407 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T) +
1408 sizeof(DAC960_V2_Event_T) +
1409 sizeof(DAC960_V2_PhysicalToLogicalDevice_T);
1410
1411 if (!init_dma_loaf(PCI_Device, DmaPages, DmaPagesSize)) {
1412 pci_free_consistent(PCI_Device, sizeof(DAC960_V2_CommandMailbox_T),
1413 CommandMailbox, CommandMailboxDMA);
1414 return false;
1415 }
1416
1417 CommandMailboxesMemory = slice_dma_loaf(DmaPages,
1418 CommandMailboxesSize, &CommandMailboxesMemoryDMA);
1419
1420 /* These are the base addresses for the command memory mailbox array */
1421 Controller->V2.FirstCommandMailbox = CommandMailboxesMemory;
1422 Controller->V2.FirstCommandMailboxDMA = CommandMailboxesMemoryDMA;
1423
1424 CommandMailboxesMemory += DAC960_V2_CommandMailboxCount - 1;
1425 Controller->V2.LastCommandMailbox = CommandMailboxesMemory;
1426 Controller->V2.NextCommandMailbox = Controller->V2.FirstCommandMailbox;
1427 Controller->V2.PreviousCommandMailbox1 = Controller->V2.LastCommandMailbox;
1428 Controller->V2.PreviousCommandMailbox2 =
1429 Controller->V2.LastCommandMailbox - 1;
1430
1431 /* These are the base addresses for the status memory mailbox array */
1432 StatusMailboxesMemory = slice_dma_loaf(DmaPages,
1433 StatusMailboxesSize, &StatusMailboxesMemoryDMA);
1434
1435 Controller->V2.FirstStatusMailbox = StatusMailboxesMemory;
1436 Controller->V2.FirstStatusMailboxDMA = StatusMailboxesMemoryDMA;
1437 StatusMailboxesMemory += DAC960_V2_StatusMailboxCount - 1;
1438 Controller->V2.LastStatusMailbox = StatusMailboxesMemory;
1439 Controller->V2.NextStatusMailbox = Controller->V2.FirstStatusMailbox;
1440
1441 Controller->V2.HealthStatusBuffer = slice_dma_loaf(DmaPages,
1442 sizeof(DAC960_V2_HealthStatusBuffer_T),
1443 &Controller->V2.HealthStatusBufferDMA);
1444
1445 Controller->V2.NewControllerInformation = slice_dma_loaf(DmaPages,
1446 sizeof(DAC960_V2_ControllerInfo_T),
1447 &Controller->V2.NewControllerInformationDMA);
1448
1449 Controller->V2.NewLogicalDeviceInformation = slice_dma_loaf(DmaPages,
1450 sizeof(DAC960_V2_LogicalDeviceInfo_T),
1451 &Controller->V2.NewLogicalDeviceInformationDMA);
1452
1453 Controller->V2.NewPhysicalDeviceInformation = slice_dma_loaf(DmaPages,
1454 sizeof(DAC960_V2_PhysicalDeviceInfo_T),
1455 &Controller->V2.NewPhysicalDeviceInformationDMA);
1456
1457 Controller->V2.NewInquiryUnitSerialNumber = slice_dma_loaf(DmaPages,
1458 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T),
1459 &Controller->V2.NewInquiryUnitSerialNumberDMA);
1460
1461 Controller->V2.Event = slice_dma_loaf(DmaPages,
1462 sizeof(DAC960_V2_Event_T),
1463 &Controller->V2.EventDMA);
1464
1465 Controller->V2.PhysicalToLogicalDevice = slice_dma_loaf(DmaPages,
1466 sizeof(DAC960_V2_PhysicalToLogicalDevice_T),
1467 &Controller->V2.PhysicalToLogicalDeviceDMA);
1468
1469 /*
1470 Enable the Memory Mailbox Interface.
1471
1472 I don't know why we can't just use one of the memory mailboxes
1473 we just allocated to do this, instead of using this temporary one.
1474 Try this change later.
1475 */
1476 memset(CommandMailbox, 0, sizeof(DAC960_V2_CommandMailbox_T));
1477 CommandMailbox->SetMemoryMailbox.CommandIdentifier = 1;
1478 CommandMailbox->SetMemoryMailbox.CommandOpcode = DAC960_V2_IOCTL;
1479 CommandMailbox->SetMemoryMailbox.CommandControlBits.NoAutoRequestSense = true;
1480 CommandMailbox->SetMemoryMailbox.FirstCommandMailboxSizeKB =
1481 (DAC960_V2_CommandMailboxCount * sizeof(DAC960_V2_CommandMailbox_T)) >> 10;
1482 CommandMailbox->SetMemoryMailbox.FirstStatusMailboxSizeKB =
1483 (DAC960_V2_StatusMailboxCount * sizeof(DAC960_V2_StatusMailbox_T)) >> 10;
1484 CommandMailbox->SetMemoryMailbox.SecondCommandMailboxSizeKB = 0;
1485 CommandMailbox->SetMemoryMailbox.SecondStatusMailboxSizeKB = 0;
1486 CommandMailbox->SetMemoryMailbox.RequestSenseSize = 0;
1487 CommandMailbox->SetMemoryMailbox.IOCTL_Opcode = DAC960_V2_SetMemoryMailbox;
1488 CommandMailbox->SetMemoryMailbox.HealthStatusBufferSizeKB = 1;
1489 CommandMailbox->SetMemoryMailbox.HealthStatusBufferBusAddress =
1490 Controller->V2.HealthStatusBufferDMA;
1491 CommandMailbox->SetMemoryMailbox.FirstCommandMailboxBusAddress =
1492 Controller->V2.FirstCommandMailboxDMA;
1493 CommandMailbox->SetMemoryMailbox.FirstStatusMailboxBusAddress =
1494 Controller->V2.FirstStatusMailboxDMA;
1495 switch (Controller->HardwareType)
1496 {
5b76ffd5
CH		 1497 case DAC960_GEM_Controller:
1498 while (DAC960_GEM_HardwareMailboxFullP(ControllerBaseAddress))
1499 udelay(1);
1500 DAC960_GEM_WriteHardwareMailbox(ControllerBaseAddress, CommandMailboxDMA);
1501 DAC960_GEM_HardwareMailboxNewCommand(ControllerBaseAddress);
1502 while (!DAC960_GEM_HardwareMailboxStatusAvailableP(ControllerBaseAddress))
1503 udelay(1);
1504 CommandStatus = DAC960_GEM_ReadCommandStatus(ControllerBaseAddress);
1505 DAC960_GEM_AcknowledgeHardwareMailboxInterrupt(ControllerBaseAddress);
1506 DAC960_GEM_AcknowledgeHardwareMailboxStatus(ControllerBaseAddress);
1507 break;
1da177e4
LT		 1508 case DAC960_BA_Controller:
1509 while (DAC960_BA_HardwareMailboxFullP(ControllerBaseAddress))
1510 udelay(1);
1511 DAC960_BA_WriteHardwareMailbox(ControllerBaseAddress, CommandMailboxDMA);
1512 DAC960_BA_HardwareMailboxNewCommand(ControllerBaseAddress);
1513 while (!DAC960_BA_HardwareMailboxStatusAvailableP(ControllerBaseAddress))
1514 udelay(1);
1515 CommandStatus = DAC960_BA_ReadCommandStatus(ControllerBaseAddress);
1516 DAC960_BA_AcknowledgeHardwareMailboxInterrupt(ControllerBaseAddress);
1517 DAC960_BA_AcknowledgeHardwareMailboxStatus(ControllerBaseAddress);
1518 break;
1519 case DAC960_LP_Controller:
1520 while (DAC960_LP_HardwareMailboxFullP(ControllerBaseAddress))
1521 udelay(1);
1522 DAC960_LP_WriteHardwareMailbox(ControllerBaseAddress, CommandMailboxDMA);
1523 DAC960_LP_HardwareMailboxNewCommand(ControllerBaseAddress);
1524 while (!DAC960_LP_HardwareMailboxStatusAvailableP(ControllerBaseAddress))
1525 udelay(1);
1526 CommandStatus = DAC960_LP_ReadCommandStatus(ControllerBaseAddress);
1527 DAC960_LP_AcknowledgeHardwareMailboxInterrupt(ControllerBaseAddress);
1528 DAC960_LP_AcknowledgeHardwareMailboxStatus(ControllerBaseAddress);
1529 break;
1530 default:
1531 DAC960_Failure(Controller, "Unknown Controller Type\n");
1532 CommandStatus = DAC960_V2_AbormalCompletion;
1533 break;
1534 }
1535 pci_free_consistent(PCI_Device, sizeof(DAC960_V2_CommandMailbox_T),
1536 CommandMailbox, CommandMailboxDMA);
1537 return (CommandStatus == DAC960_V2_NormalCompletion);
1538}
1539
1540
1541/*
1542 DAC960_V1_ReadControllerConfiguration reads the Configuration Information
1543 from DAC960 V1 Firmware Controllers and initializes the Controller structure.
1544*/
1545
87d156bf 1546static bool DAC960_V1_ReadControllerConfiguration(DAC960_Controller_T
1da177e4
LT		 1547 *Controller)
1548{
1549 DAC960_V1_Enquiry2_T *Enquiry2;
1550 dma_addr_t Enquiry2DMA;
1551 DAC960_V1_Config2_T *Config2;
1552 dma_addr_t Config2DMA;
1553 int LogicalDriveNumber, Channel, TargetID;
1554 struct dma_loaf local_dma;
1555
1556 if (!init_dma_loaf(Controller->PCIDevice, &local_dma,
1557 sizeof(DAC960_V1_Enquiry2_T) + sizeof(DAC960_V1_Config2_T)))
1558 return DAC960_Failure(Controller, "LOGICAL DEVICE ALLOCATION");
1559
1560 Enquiry2 = slice_dma_loaf(&local_dma, sizeof(DAC960_V1_Enquiry2_T), &Enquiry2DMA);
1561 Config2 = slice_dma_loaf(&local_dma, sizeof(DAC960_V1_Config2_T), &Config2DMA);
1562
1563 if (!DAC960_V1_ExecuteType3(Controller, DAC960_V1_Enquiry,
1564 Controller->V1.NewEnquiryDMA)) {
1565 free_dma_loaf(Controller->PCIDevice, &local_dma);
1566 return DAC960_Failure(Controller, "ENQUIRY");
1567 }
1568 memcpy(&Controller->V1.Enquiry, Controller->V1.NewEnquiry,
1569 sizeof(DAC960_V1_Enquiry_T));
1570
1571 if (!DAC960_V1_ExecuteType3(Controller, DAC960_V1_Enquiry2, Enquiry2DMA)) {
1572 free_dma_loaf(Controller->PCIDevice, &local_dma);
1573 return DAC960_Failure(Controller, "ENQUIRY2");
1574 }
1575
1576 if (!DAC960_V1_ExecuteType3(Controller, DAC960_V1_ReadConfig2, Config2DMA)) {
1577 free_dma_loaf(Controller->PCIDevice, &local_dma);
1578 return DAC960_Failure(Controller, "READ CONFIG2");
1579 }
1580
1581 if (!DAC960_V1_ExecuteType3(Controller, DAC960_V1_GetLogicalDriveInformation,
1582 Controller->V1.NewLogicalDriveInformationDMA)) {
1583 free_dma_loaf(Controller->PCIDevice, &local_dma);
1584 return DAC960_Failure(Controller, "GET LOGICAL DRIVE INFORMATION");
1585 }
1586 memcpy(&Controller->V1.LogicalDriveInformation,
1587 Controller->V1.NewLogicalDriveInformation,
1588 sizeof(DAC960_V1_LogicalDriveInformationArray_T));
1589
1590 for (Channel = 0; Channel < Enquiry2->ActualChannels; Channel++)
1591 for (TargetID = 0; TargetID < Enquiry2->MaxTargets; TargetID++) {
1592 if (!DAC960_V1_ExecuteType3D(Controller, DAC960_V1_GetDeviceState,
1593 Channel, TargetID,
1594 Controller->V1.NewDeviceStateDMA)) {
1595 free_dma_loaf(Controller->PCIDevice, &local_dma);
1596 return DAC960_Failure(Controller, "GET DEVICE STATE");
1597 }
1598 memcpy(&Controller->V1.DeviceState[Channel][TargetID],
1599 Controller->V1.NewDeviceState, sizeof(DAC960_V1_DeviceState_T));
1600 }
1601 /*
1602 Initialize the Controller Model Name and Full Model Name fields.
1603 */
1604 switch (Enquiry2->HardwareID.SubModel)
1605 {
1606 case DAC960_V1_P_PD_PU:
1607 if (Enquiry2->SCSICapability.BusSpeed == DAC960_V1_Ultra)
1608 strcpy(Controller->ModelName, "DAC960PU");
1609 else strcpy(Controller->ModelName, "DAC960PD");
1610 break;
1611 case DAC960_V1_PL:
1612 strcpy(Controller->ModelName, "DAC960PL");
1613 break;
1614 case DAC960_V1_PG:
1615 strcpy(Controller->ModelName, "DAC960PG");
1616 break;
1617 case DAC960_V1_PJ:
1618 strcpy(Controller->ModelName, "DAC960PJ");
1619 break;
1620 case DAC960_V1_PR:
1621 strcpy(Controller->ModelName, "DAC960PR");
1622 break;
1623 case DAC960_V1_PT:
1624 strcpy(Controller->ModelName, "DAC960PT");
1625 break;
1626 case DAC960_V1_PTL0:
1627 strcpy(Controller->ModelName, "DAC960PTL0");
1628 break;
1629 case DAC960_V1_PRL:
1630 strcpy(Controller->ModelName, "DAC960PRL");
1631 break;
1632 case DAC960_V1_PTL1:
1633 strcpy(Controller->ModelName, "DAC960PTL1");
1634 break;
1635 case DAC960_V1_1164P:
1636 strcpy(Controller->ModelName, "DAC1164P");
1637 break;
1638 default:
1639 free_dma_loaf(Controller->PCIDevice, &local_dma);
1640 return DAC960_Failure(Controller, "MODEL VERIFICATION");
1641 }
1642 strcpy(Controller->FullModelName, "Mylex ");
1643 strcat(Controller->FullModelName, Controller->ModelName);
1644 /*
1645 Initialize the Controller Firmware Version field and verify that it
1646 is a supported firmware version. The supported firmware versions are:
1647
1648 DAC1164P 5.06 and above
1649 DAC960PTL/PRL/PJ/PG 4.06 and above
1650 DAC960PU/PD/PL 3.51 and above
1651 DAC960PU/PD/PL/P 2.73 and above
1652 */
1653#if defined(CONFIG_ALPHA)
1654 /*
1655 DEC Alpha machines were often equipped with DAC960 cards that were
1656 OEMed from Mylex, and had their own custom firmware. Version 2.70,
1657 the last custom FW revision to be released by DEC for these older
1658 controllers, appears to work quite well with this driver.
1659
1660 Cards tested successfully were several versions each of the PD and
1661 PU, called by DEC the KZPSC and KZPAC, respectively, and having
1662 the Manufacturer Numbers (from Mylex), usually on a sticker on the
1663 back of the board, of:
1664
1665 KZPSC: D040347 (1-channel) or D040348 (2-channel) or D040349 (3-channel)
1666 KZPAC: D040395 (1-channel) or D040396 (2-channel) or D040397 (3-channel)
1667 */
1668# define FIRMWARE_27X "2.70"
1669#else
1670# define FIRMWARE_27X "2.73"
1671#endif
1672
1673 if (Enquiry2->FirmwareID.MajorVersion == 0)
1674 {
1675 Enquiry2->FirmwareID.MajorVersion =
1676 Controller->V1.Enquiry.MajorFirmwareVersion;
1677 Enquiry2->FirmwareID.MinorVersion =
1678 Controller->V1.Enquiry.MinorFirmwareVersion;
1679 Enquiry2->FirmwareID.FirmwareType = '0';
1680 Enquiry2->FirmwareID.TurnID = 0;
1681 }
33027c2b
AB		 1682 snprintf(Controller->FirmwareVersion, sizeof(Controller->FirmwareVersion),
1683 "%d.%02d-%c-%02d",
1684 Enquiry2->FirmwareID.MajorVersion,
1685 Enquiry2->FirmwareID.MinorVersion,
1686 Enquiry2->FirmwareID.FirmwareType,
1687 Enquiry2->FirmwareID.TurnID);
1da177e4
LT		 1688 if (!((Controller->FirmwareVersion[0] == '5' &&
1689 strcmp(Controller->FirmwareVersion, "5.06") >= 0) ||
1690 (Controller->FirmwareVersion[0] == '4' &&
1691 strcmp(Controller->FirmwareVersion, "4.06") >= 0) ||
1692 (Controller->FirmwareVersion[0] == '3' &&
1693 strcmp(Controller->FirmwareVersion, "3.51") >= 0) ||
1694 (Controller->FirmwareVersion[0] == '2' &&
1695 strcmp(Controller->FirmwareVersion, FIRMWARE_27X) >= 0)))
1696 {
1697 DAC960_Failure(Controller, "FIRMWARE VERSION VERIFICATION");
1698 DAC960_Error("Firmware Version = '%s'\n", Controller,
1699 Controller->FirmwareVersion);
1700 free_dma_loaf(Controller->PCIDevice, &local_dma);
1701 return false;
1702 }
1703 /*
1704 Initialize the Controller Channels, Targets, Memory Size, and SAF-TE
1705 Enclosure Management Enabled fields.
1706 */
1707 Controller->Channels = Enquiry2->ActualChannels;
1708 Controller->Targets = Enquiry2->MaxTargets;
1709 Controller->MemorySize = Enquiry2->MemorySize >> 20;
1710 Controller->V1.SAFTE_EnclosureManagementEnabled =
1711 (Enquiry2->FaultManagementType == DAC960_V1_SAFTE);
1712 /*
1713 Initialize the Controller Queue Depth, Driver Queue Depth, Logical Drive
1714 Count, Maximum Blocks per Command, Controller Scatter/Gather Limit, and
1715 Driver Scatter/Gather Limit. The Driver Queue Depth must be at most one
1716 less than the Controller Queue Depth to allow for an automatic drive
1717 rebuild operation.
1718 */
1719 Controller->ControllerQueueDepth = Controller->V1.Enquiry.MaxCommands;
1720 Controller->DriverQueueDepth = Controller->ControllerQueueDepth - 1;
1721 if (Controller->DriverQueueDepth > DAC960_MaxDriverQueueDepth)
1722 Controller->DriverQueueDepth = DAC960_MaxDriverQueueDepth;
1723 Controller->LogicalDriveCount =
1724 Controller->V1.Enquiry.NumberOfLogicalDrives;
1725 Controller->MaxBlocksPerCommand = Enquiry2->MaxBlocksPerCommand;
1726 Controller->ControllerScatterGatherLimit = Enquiry2->MaxScatterGatherEntries;
1727 Controller->DriverScatterGatherLimit =
1728 Controller->ControllerScatterGatherLimit;
1729 if (Controller->DriverScatterGatherLimit > DAC960_V1_ScatterGatherLimit)
1730 Controller->DriverScatterGatherLimit = DAC960_V1_ScatterGatherLimit;
1731 /*
1732 Initialize the Stripe Size, Segment Size, and Geometry Translation.
1733 */
1734 Controller->V1.StripeSize = Config2->BlocksPerStripe * Config2->BlockFactor
1735 >> (10 - DAC960_BlockSizeBits);
1736 Controller->V1.SegmentSize = Config2->BlocksPerCacheLine * Config2->BlockFactor
1737 >> (10 - DAC960_BlockSizeBits);
1738 switch (Config2->DriveGeometry)
1739 {
1740 case DAC960_V1_Geometry_128_32:
1741 Controller->V1.GeometryTranslationHeads = 128;
1742 Controller->V1.GeometryTranslationSectors = 32;
1743 break;
1744 case DAC960_V1_Geometry_255_63:
1745 Controller->V1.GeometryTranslationHeads = 255;
1746 Controller->V1.GeometryTranslationSectors = 63;
1747 break;
1748 default:
1749 free_dma_loaf(Controller->PCIDevice, &local_dma);
1750 return DAC960_Failure(Controller, "CONFIG2 DRIVE GEOMETRY");
1751 }
1752 /*
1753 Initialize the Background Initialization Status.
1754 */
1755 if ((Controller->FirmwareVersion[0] == '4' &&
1756 strcmp(Controller->FirmwareVersion, "4.08") >= 0) ||
1757 (Controller->FirmwareVersion[0] == '5' &&
1758 strcmp(Controller->FirmwareVersion, "5.08") >= 0))
1759 {
1760 Controller->V1.BackgroundInitializationStatusSupported = true;
1761 DAC960_V1_ExecuteType3B(Controller,
1762 DAC960_V1_BackgroundInitializationControl, 0x20,
1763 Controller->
1764 V1.BackgroundInitializationStatusDMA);
1765 memcpy(&Controller->V1.LastBackgroundInitializationStatus,
1766 Controller->V1.BackgroundInitializationStatus,
1767 sizeof(DAC960_V1_BackgroundInitializationStatus_T));
1768 }
1769 /*
1770 Initialize the Logical Drive Initially Accessible flag.
1771 */
1772 for (LogicalDriveNumber = 0;
1773 LogicalDriveNumber < Controller->LogicalDriveCount;
1774 LogicalDriveNumber++)
1775 if (Controller->V1.LogicalDriveInformation
1776 [LogicalDriveNumber].LogicalDriveState !=
1777 DAC960_V1_LogicalDrive_Offline)
1778 Controller->LogicalDriveInitiallyAccessible[LogicalDriveNumber] = true;
1779 Controller->V1.LastRebuildStatus = DAC960_V1_NoRebuildOrCheckInProgress;
1780 free_dma_loaf(Controller->PCIDevice, &local_dma);
1781 return true;
1782}
1783
1784
1785/*
1786 DAC960_V2_ReadControllerConfiguration reads the Configuration Information
1787 from DAC960 V2 Firmware Controllers and initializes the Controller structure.
1788*/
1789
87d156bf 1790static bool DAC960_V2_ReadControllerConfiguration(DAC960_Controller_T
1da177e4
LT		 1791 *Controller)
1792{
1793 DAC960_V2_ControllerInfo_T *ControllerInfo =
1794 &Controller->V2.ControllerInformation;
1795 unsigned short LogicalDeviceNumber = 0;
1796 int ModelNameLength;
1797
25985edc 1798 /* Get data into dma-able area, then copy into permanent location */
1da177e4
LT		 1799 if (!DAC960_V2_NewControllerInfo(Controller))
1800 return DAC960_Failure(Controller, "GET CONTROLLER INFO");
1801 memcpy(ControllerInfo, Controller->V2.NewControllerInformation,
1802 sizeof(DAC960_V2_ControllerInfo_T));
1803
1804
1805 if (!DAC960_V2_GeneralInfo(Controller))
1806 return DAC960_Failure(Controller, "GET HEALTH STATUS");
1807
1808 /*
1809 Initialize the Controller Model Name and Full Model Name fields.
1810 */
1811 ModelNameLength = sizeof(ControllerInfo->ControllerName);
1812 if (ModelNameLength > sizeof(Controller->ModelName)-1)
1813 ModelNameLength = sizeof(Controller->ModelName)-1;
1814 memcpy(Controller->ModelName, ControllerInfo->ControllerName,
1815 ModelNameLength);
1816 ModelNameLength--;
1817 while (Controller->ModelName[ModelNameLength] == ' ' ||
1818 Controller->ModelName[ModelNameLength] == '\0')
1819 ModelNameLength--;
1820 Controller->ModelName[++ModelNameLength] = '\0';
1821 strcpy(Controller->FullModelName, "Mylex ");
1822 strcat(Controller->FullModelName, Controller->ModelName);
1823 /*
1824 Initialize the Controller Firmware Version field.
1825 */
1826 sprintf(Controller->FirmwareVersion, "%d.%02d-%02d",
1827 ControllerInfo->FirmwareMajorVersion,
1828 ControllerInfo->FirmwareMinorVersion,
1829 ControllerInfo->FirmwareTurnNumber);
1830 if (ControllerInfo->FirmwareMajorVersion == 6 &&
1831 ControllerInfo->FirmwareMinorVersion == 0 &&
1832 ControllerInfo->FirmwareTurnNumber < 1)
1833 {
1834 DAC960_Info("FIRMWARE VERSION %s DOES NOT PROVIDE THE CONTROLLER\n",
1835 Controller, Controller->FirmwareVersion);
1836 DAC960_Info("STATUS MONITORING FUNCTIONALITY NEEDED BY THIS DRIVER.\n",
1837 Controller);
1838 DAC960_Info("PLEASE UPGRADE TO VERSION 6.00-01 OR ABOVE.\n",
1839 Controller);
1840 }
1841 /*
1842 Initialize the Controller Channels, Targets, and Memory Size.
1843 */
1844 Controller->Channels = ControllerInfo->NumberOfPhysicalChannelsPresent;
1845 Controller->Targets =
1846 ControllerInfo->MaximumTargetsPerChannel
1847 [ControllerInfo->NumberOfPhysicalChannelsPresent-1];
1848 Controller->MemorySize = ControllerInfo->MemorySizeMB;
1849 /*
1850 Initialize the Controller Queue Depth, Driver Queue Depth, Logical Drive
1851 Count, Maximum Blocks per Command, Controller Scatter/Gather Limit, and
1852 Driver Scatter/Gather Limit. The Driver Queue Depth must be at most one
1853 less than the Controller Queue Depth to allow for an automatic drive
1854 rebuild operation.
1855 */
1856 Controller->ControllerQueueDepth = ControllerInfo->MaximumParallelCommands;
1857 Controller->DriverQueueDepth = Controller->ControllerQueueDepth - 1;
1858 if (Controller->DriverQueueDepth > DAC960_MaxDriverQueueDepth)
1859 Controller->DriverQueueDepth = DAC960_MaxDriverQueueDepth;
1860 Controller->LogicalDriveCount = ControllerInfo->LogicalDevicesPresent;
1861 Controller->MaxBlocksPerCommand =
1862 ControllerInfo->MaximumDataTransferSizeInBlocks;
1863 Controller->ControllerScatterGatherLimit =
1864 ControllerInfo->MaximumScatterGatherEntries;
1865 Controller->DriverScatterGatherLimit =
1866 Controller->ControllerScatterGatherLimit;
1867 if (Controller->DriverScatterGatherLimit > DAC960_V2_ScatterGatherLimit)
1868 Controller->DriverScatterGatherLimit = DAC960_V2_ScatterGatherLimit;
1869 /*
1870 Initialize the Logical Device Information.
1871 */
1872 while (true)
1873 {
1874 DAC960_V2_LogicalDeviceInfo_T *NewLogicalDeviceInfo =
1875 Controller->V2.NewLogicalDeviceInformation;
1876 DAC960_V2_LogicalDeviceInfo_T *LogicalDeviceInfo;
1877 DAC960_V2_PhysicalDevice_T PhysicalDevice;
1878
1879 if (!DAC960_V2_NewLogicalDeviceInfo(Controller, LogicalDeviceNumber))
1880 break;
1881 LogicalDeviceNumber = NewLogicalDeviceInfo->LogicalDeviceNumber;
1882 if (LogicalDeviceNumber >= DAC960_MaxLogicalDrives) {
1883 DAC960_Error("DAC960: Logical Drive Number %d not supported\n",
1884 Controller, LogicalDeviceNumber);
1885 break;
1886 }
1887 if (NewLogicalDeviceInfo->DeviceBlockSizeInBytes != DAC960_BlockSize) {
1888 DAC960_Error("DAC960: Logical Drive Block Size %d not supported\n",
1889 Controller, NewLogicalDeviceInfo->DeviceBlockSizeInBytes);
1890 LogicalDeviceNumber++;
1891 continue;
1892 }
1893 PhysicalDevice.Controller = 0;
1894 PhysicalDevice.Channel = NewLogicalDeviceInfo->Channel;
1895 PhysicalDevice.TargetID = NewLogicalDeviceInfo->TargetID;
1896 PhysicalDevice.LogicalUnit = NewLogicalDeviceInfo->LogicalUnit;
1897 Controller->V2.LogicalDriveToVirtualDevice[LogicalDeviceNumber] =
1898 PhysicalDevice;
1899 if (NewLogicalDeviceInfo->LogicalDeviceState !=
1900 DAC960_V2_LogicalDevice_Offline)
1901 Controller->LogicalDriveInitiallyAccessible[LogicalDeviceNumber] = true;
0a361e31
AD		 1902 LogicalDeviceInfo = kmalloc(sizeof(DAC960_V2_LogicalDeviceInfo_T),
1903 GFP_ATOMIC);
1da177e4
LT		 1904 if (LogicalDeviceInfo == NULL)
1905 return DAC960_Failure(Controller, "LOGICAL DEVICE ALLOCATION");
1906 Controller->V2.LogicalDeviceInformation[LogicalDeviceNumber] =
1907 LogicalDeviceInfo;
1908 memcpy(LogicalDeviceInfo, NewLogicalDeviceInfo,
1909 sizeof(DAC960_V2_LogicalDeviceInfo_T));
1910 LogicalDeviceNumber++;
1911 }
1912 return true;
1913}
1914
1915
1916/*
1917 DAC960_ReportControllerConfiguration reports the Configuration Information
1918 for Controller.
1919*/
1920
87d156bf 1921static bool DAC960_ReportControllerConfiguration(DAC960_Controller_T
1da177e4
LT		 1922 *Controller)
1923{
1924 DAC960_Info("Configuring Mylex %s PCI RAID Controller\n",
1925 Controller, Controller->ModelName);
1926 DAC960_Info(" Firmware Version: %s, Channels: %d, Memory Size: %dMB\n",
1927 Controller, Controller->FirmwareVersion,
1928 Controller->Channels, Controller->MemorySize);
1929 DAC960_Info(" PCI Bus: %d, Device: %d, Function: %d, I/O Address: ",
1930 Controller, Controller->Bus,
1931 Controller->Device, Controller->Function);
1932 if (Controller->IO_Address == 0)
1933 DAC960_Info("Unassigned\n", Controller);
1934 else DAC960_Info("0x%X\n", Controller, Controller->IO_Address);
1935 DAC960_Info(" PCI Address: 0x%X mapped at 0x%lX, IRQ Channel: %d\n",
1936 Controller, Controller->PCI_Address,
1937 (unsigned long) Controller->BaseAddress,
1938 Controller->IRQ_Channel);
1939 DAC960_Info(" Controller Queue Depth: %d, "
1940 "Maximum Blocks per Command: %d\n",
1941 Controller, Controller->ControllerQueueDepth,
1942 Controller->MaxBlocksPerCommand);
1943 DAC960_Info(" Driver Queue Depth: %d, "
1944 "Scatter/Gather Limit: %d of %d Segments\n",
1945 Controller, Controller->DriverQueueDepth,
1946 Controller->DriverScatterGatherLimit,
1947 Controller->ControllerScatterGatherLimit);
1948 if (Controller->FirmwareType == DAC960_V1_Controller)
1949 {
1950 DAC960_Info(" Stripe Size: %dKB, Segment Size: %dKB, "
1951 "BIOS Geometry: %d/%d\n", Controller,
1952 Controller->V1.StripeSize,
1953 Controller->V1.SegmentSize,
1954 Controller->V1.GeometryTranslationHeads,
1955 Controller->V1.GeometryTranslationSectors);
1956 if (Controller->V1.SAFTE_EnclosureManagementEnabled)
1957 DAC960_Info(" SAF-TE Enclosure Management Enabled\n", Controller);
1958 }
1959 return true;
1960}
1961
1962
1963/*
1964 DAC960_V1_ReadDeviceConfiguration reads the Device Configuration Information
1965 for DAC960 V1 Firmware Controllers by requesting the SCSI Inquiry and SCSI
1966 Inquiry Unit Serial Number information for each device connected to
1967 Controller.
1968*/
1969
87d156bf 1970static bool DAC960_V1_ReadDeviceConfiguration(DAC960_Controller_T
1da177e4
LT		 1971 *Controller)
1972{
1973 struct dma_loaf local_dma;
1974
1975 dma_addr_t DCDBs_dma[DAC960_V1_MaxChannels];
1976 DAC960_V1_DCDB_T *DCDBs_cpu[DAC960_V1_MaxChannels];
1977
1978 dma_addr_t SCSI_Inquiry_dma[DAC960_V1_MaxChannels];
1979 DAC960_SCSI_Inquiry_T *SCSI_Inquiry_cpu[DAC960_V1_MaxChannels];
1980
1981 dma_addr_t SCSI_NewInquiryUnitSerialNumberDMA[DAC960_V1_MaxChannels];
1982 DAC960_SCSI_Inquiry_UnitSerialNumber_T *SCSI_NewInquiryUnitSerialNumberCPU[DAC960_V1_MaxChannels];
1983
1984 struct completion Completions[DAC960_V1_MaxChannels];
1985 unsigned long flags;
1986 int Channel, TargetID;
1987
1988 if (!init_dma_loaf(Controller->PCIDevice, &local_dma,
1989 DAC960_V1_MaxChannels*(sizeof(DAC960_V1_DCDB_T) +
1990 sizeof(DAC960_SCSI_Inquiry_T) +
1991 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T))))
1992 return DAC960_Failure(Controller,
1993 "DMA ALLOCATION FAILED IN ReadDeviceConfiguration");
1994
1995 for (Channel = 0; Channel < Controller->Channels; Channel++) {
1996 DCDBs_cpu[Channel] = slice_dma_loaf(&local_dma,
1997 sizeof(DAC960_V1_DCDB_T), DCDBs_dma + Channel);
1998 SCSI_Inquiry_cpu[Channel] = slice_dma_loaf(&local_dma,
1999 sizeof(DAC960_SCSI_Inquiry_T),
2000 SCSI_Inquiry_dma + Channel);
2001 SCSI_NewInquiryUnitSerialNumberCPU[Channel] = slice_dma_loaf(&local_dma,
2002 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T),
2003 SCSI_NewInquiryUnitSerialNumberDMA + Channel);
2004 }
2005
2006 for (TargetID = 0; TargetID < Controller->Targets; TargetID++)
2007 {
2008 /*
2009 * For each channel, submit a probe for a device on that channel.
2010 * The timeout interval for a device that is present is 10 seconds.
2011 * With this approach, the timeout periods can elapse in parallel
2012 * on each channel.
2013 */
2014 for (Channel = 0; Channel < Controller->Channels; Channel++)
2015 {
2016 dma_addr_t NewInquiryStandardDataDMA = SCSI_Inquiry_dma[Channel];
2017 DAC960_V1_DCDB_T *DCDB = DCDBs_cpu[Channel];
2018 dma_addr_t DCDB_dma = DCDBs_dma[Channel];
2019 DAC960_Command_T *Command = Controller->Commands[Channel];
2020 struct completion *Completion = &Completions[Channel];
2021
2022 init_completion(Completion);
2023 DAC960_V1_ClearCommand(Command);
2024 Command->CommandType = DAC960_ImmediateCommand;
2025 Command->Completion = Completion;
2026 Command->V1.CommandMailbox.Type3.CommandOpcode = DAC960_V1_DCDB;
2027 Command->V1.CommandMailbox.Type3.BusAddress = DCDB_dma;
2028 DCDB->Channel = Channel;
2029 DCDB->TargetID = TargetID;
2030 DCDB->Direction = DAC960_V1_DCDB_DataTransferDeviceToSystem;
2031 DCDB->EarlyStatus = false;
2032 DCDB->Timeout = DAC960_V1_DCDB_Timeout_10_seconds;
2033 DCDB->NoAutomaticRequestSense = false;
2034 DCDB->DisconnectPermitted = true;
2035 DCDB->TransferLength = sizeof(DAC960_SCSI_Inquiry_T);
2036 DCDB->BusAddress = NewInquiryStandardDataDMA;
2037 DCDB->CDBLength = 6;
2038 DCDB->TransferLengthHigh4 = 0;
2039 DCDB->SenseLength = sizeof(DCDB->SenseData);
2040 DCDB->CDB[0] = 0x12; /* INQUIRY */
2041 DCDB->CDB[1] = 0; /* EVPD = 0 */
2042 DCDB->CDB[2] = 0; /* Page Code */
2043 DCDB->CDB[3] = 0; /* Reserved */
2044 DCDB->CDB[4] = sizeof(DAC960_SCSI_Inquiry_T);
2045 DCDB->CDB[5] = 0; /* Control */
2046
2047 spin_lock_irqsave(&Controller->queue_lock, flags);
2048 DAC960_QueueCommand(Command);
2049 spin_unlock_irqrestore(&Controller->queue_lock, flags);
2050 }
2051 /*
2052 * Wait for the problems submitted in the previous loop
2053 * to complete. On the probes that are successful,
2054 * get the serial number of the device that was found.
2055 */
2056 for (Channel = 0; Channel < Controller->Channels; Channel++)
2057 {
2058 DAC960_SCSI_Inquiry_T *InquiryStandardData =
2059 &Controller->V1.InquiryStandardData[Channel][TargetID];
2060 DAC960_SCSI_Inquiry_T *NewInquiryStandardData = SCSI_Inquiry_cpu[Channel];
2061 dma_addr_t NewInquiryUnitSerialNumberDMA =
2062 SCSI_NewInquiryUnitSerialNumberDMA[Channel];
2063 DAC960_SCSI_Inquiry_UnitSerialNumber_T *NewInquiryUnitSerialNumber =
2064 SCSI_NewInquiryUnitSerialNumberCPU[Channel];
2065 DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber =
2066 &Controller->V1.InquiryUnitSerialNumber[Channel][TargetID];
2067 DAC960_Command_T *Command = Controller->Commands[Channel];
2068 DAC960_V1_DCDB_T *DCDB = DCDBs_cpu[Channel];
2069 struct completion *Completion = &Completions[Channel];
2070
2071 wait_for_completion(Completion);
2072
2073 if (Command->V1.CommandStatus != DAC960_V1_NormalCompletion) {
2074 memset(InquiryStandardData, 0, sizeof(DAC960_SCSI_Inquiry_T));
2075 InquiryStandardData->PeripheralDeviceType = 0x1F;
2076 continue;
2077 } else
2078 memcpy(InquiryStandardData, NewInquiryStandardData, sizeof(DAC960_SCSI_Inquiry_T));
2079
2080 /* Preserve Channel and TargetID values from the previous loop */
2081 Command->Completion = Completion;
2082 DCDB->TransferLength = sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T);
2083 DCDB->BusAddress = NewInquiryUnitSerialNumberDMA;
2084 DCDB->SenseLength = sizeof(DCDB->SenseData);
2085 DCDB->CDB[0] = 0x12; /* INQUIRY */
2086 DCDB->CDB[1] = 1; /* EVPD = 1 */
2087 DCDB->CDB[2] = 0x80; /* Page Code */
2088 DCDB->CDB[3] = 0; /* Reserved */
2089 DCDB->CDB[4] = sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T);
2090 DCDB->CDB[5] = 0; /* Control */
2091
2092 spin_lock_irqsave(&Controller->queue_lock, flags);
2093 DAC960_QueueCommand(Command);
2094 spin_unlock_irqrestore(&Controller->queue_lock, flags);
2095 wait_for_completion(Completion);
2096
2097 if (Command->V1.CommandStatus != DAC960_V1_NormalCompletion) {
2098 memset(InquiryUnitSerialNumber, 0,
2099 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T));
2100 InquiryUnitSerialNumber->PeripheralDeviceType = 0x1F;
2101 } else
2102 memcpy(InquiryUnitSerialNumber, NewInquiryUnitSerialNumber,
2103 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T));
2104 }
2105 }
2106 free_dma_loaf(Controller->PCIDevice, &local_dma);
2107 return true;
2108}
2109
2110
2111/*
2112 DAC960_V2_ReadDeviceConfiguration reads the Device Configuration Information
2113 for DAC960 V2 Firmware Controllers by requesting the Physical Device
2114 Information and SCSI Inquiry Unit Serial Number information for each
2115 device connected to Controller.
2116*/
2117
87d156bf 2118static bool DAC960_V2_ReadDeviceConfiguration(DAC960_Controller_T
1da177e4
LT		 2119 *Controller)
2120{
2121 unsigned char Channel = 0, TargetID = 0, LogicalUnit = 0;
2122 unsigned short PhysicalDeviceIndex = 0;
2123
2124 while (true)
2125 {
2126 DAC960_V2_PhysicalDeviceInfo_T *NewPhysicalDeviceInfo =
2127 Controller->V2.NewPhysicalDeviceInformation;
2128 DAC960_V2_PhysicalDeviceInfo_T *PhysicalDeviceInfo;
2129 DAC960_SCSI_Inquiry_UnitSerialNumber_T *NewInquiryUnitSerialNumber =
2130 Controller->V2.NewInquiryUnitSerialNumber;
2131 DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber;
2132
2133 if (!DAC960_V2_NewPhysicalDeviceInfo(Controller, Channel, TargetID, LogicalUnit))
2134 break;
2135
0a361e31
AD		 2136 PhysicalDeviceInfo = kmalloc(sizeof(DAC960_V2_PhysicalDeviceInfo_T),
2137 GFP_ATOMIC);
1da177e4
LT		 2138 if (PhysicalDeviceInfo == NULL)
2139 return DAC960_Failure(Controller, "PHYSICAL DEVICE ALLOCATION");
2140 Controller->V2.PhysicalDeviceInformation[PhysicalDeviceIndex] =
2141 PhysicalDeviceInfo;
2142 memcpy(PhysicalDeviceInfo, NewPhysicalDeviceInfo,
2143 sizeof(DAC960_V2_PhysicalDeviceInfo_T));
2144
0a361e31
AD		 2145 InquiryUnitSerialNumber = kmalloc(
2146 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T), GFP_ATOMIC);
1da177e4
LT		 2147 if (InquiryUnitSerialNumber == NULL) {
2148 kfree(PhysicalDeviceInfo);
2149 return DAC960_Failure(Controller, "SERIAL NUMBER ALLOCATION");
2150 }
2151 Controller->V2.InquiryUnitSerialNumber[PhysicalDeviceIndex] =
2152 InquiryUnitSerialNumber;
2153
2154 Channel = NewPhysicalDeviceInfo->Channel;
2155 TargetID = NewPhysicalDeviceInfo->TargetID;
2156 LogicalUnit = NewPhysicalDeviceInfo->LogicalUnit;
2157
2158 /*
2159 Some devices do NOT have Unit Serial Numbers.
2160 This command fails for them. But, we still want to
2161 remember those devices are there. Construct a
2162 UnitSerialNumber structure for the failure case.
2163 */
2164 if (!DAC960_V2_NewInquiryUnitSerialNumber(Controller, Channel, TargetID, LogicalUnit)) {
2165 memset(InquiryUnitSerialNumber, 0,
2166 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T));
2167 InquiryUnitSerialNumber->PeripheralDeviceType = 0x1F;
2168 } else
2169 memcpy(InquiryUnitSerialNumber, NewInquiryUnitSerialNumber,
2170 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T));
2171
2172 PhysicalDeviceIndex++;
2173 LogicalUnit++;
2174 }
2175 return true;
2176}
2177
2178
2179/*
2180 DAC960_SanitizeInquiryData sanitizes the Vendor, Model, Revision, and
2181 Product Serial Number fields of the Inquiry Standard Data and Inquiry
2182 Unit Serial Number structures.
2183*/
2184
2185static void DAC960_SanitizeInquiryData(DAC960_SCSI_Inquiry_T
2186 *InquiryStandardData,
2187 DAC960_SCSI_Inquiry_UnitSerialNumber_T
2188 *InquiryUnitSerialNumber,
2189 unsigned char *Vendor,
2190 unsigned char *Model,
2191 unsigned char *Revision,
2192 unsigned char *SerialNumber)
2193{
2194 int SerialNumberLength, i;
2195 if (InquiryStandardData->PeripheralDeviceType == 0x1F) return;
2196 for (i = 0; i < sizeof(InquiryStandardData->VendorIdentification); i++)
2197 {
2198 unsigned char VendorCharacter =
2199 InquiryStandardData->VendorIdentification[i];
2200 Vendor[i] = (VendorCharacter >= ' ' && VendorCharacter <= '~'
2201 ? VendorCharacter : ' ');
2202 }
2203 Vendor[sizeof(InquiryStandardData->VendorIdentification)] = '\0';
2204 for (i = 0; i < sizeof(InquiryStandardData->ProductIdentification); i++)
2205 {
2206 unsigned char ModelCharacter =
2207 InquiryStandardData->ProductIdentification[i];
2208 Model[i] = (ModelCharacter >= ' ' && ModelCharacter <= '~'
2209 ? ModelCharacter : ' ');
2210 }
2211 Model[sizeof(InquiryStandardData->ProductIdentification)] = '\0';
2212 for (i = 0; i < sizeof(InquiryStandardData->ProductRevisionLevel); i++)
2213 {
2214 unsigned char RevisionCharacter =
2215 InquiryStandardData->ProductRevisionLevel[i];
2216 Revision[i] = (RevisionCharacter >= ' ' && RevisionCharacter <= '~'
2217 ? RevisionCharacter : ' ');
2218 }
2219 Revision[sizeof(InquiryStandardData->ProductRevisionLevel)] = '\0';
2220 if (InquiryUnitSerialNumber->PeripheralDeviceType == 0x1F) return;
2221 SerialNumberLength = InquiryUnitSerialNumber->PageLength;
2222 if (SerialNumberLength >
2223 sizeof(InquiryUnitSerialNumber->ProductSerialNumber))
2224 SerialNumberLength = sizeof(InquiryUnitSerialNumber->ProductSerialNumber);
2225 for (i = 0; i < SerialNumberLength; i++)
2226 {
2227 unsigned char SerialNumberCharacter =
2228 InquiryUnitSerialNumber->ProductSerialNumber[i];
2229 SerialNumber[i] =
2230 (SerialNumberCharacter >= ' ' && SerialNumberCharacter <= '~'
2231 ? SerialNumberCharacter : ' ');
2232 }
2233 SerialNumber[SerialNumberLength] = '\0';
2234}
2235
2236
2237/*
2238 DAC960_V1_ReportDeviceConfiguration reports the Device Configuration
2239 Information for DAC960 V1 Firmware Controllers.
2240*/
2241
87d156bf 2242static bool DAC960_V1_ReportDeviceConfiguration(DAC960_Controller_T
1da177e4
LT		 2243 *Controller)
2244{
2245 int LogicalDriveNumber, Channel, TargetID;
2246 DAC960_Info(" Physical Devices:\n", Controller);
2247 for (Channel = 0; Channel < Controller->Channels; Channel++)
2248 for (TargetID = 0; TargetID < Controller->Targets; TargetID++)
2249 {
2250 DAC960_SCSI_Inquiry_T *InquiryStandardData =
2251 &Controller->V1.InquiryStandardData[Channel][TargetID];
2252 DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber =
2253 &Controller->V1.InquiryUnitSerialNumber[Channel][TargetID];
2254 DAC960_V1_DeviceState_T *DeviceState =
2255 &Controller->V1.DeviceState[Channel][TargetID];
2256 DAC960_V1_ErrorTableEntry_T *ErrorEntry =
2257 &Controller->V1.ErrorTable.ErrorTableEntries[Channel][TargetID];
2258 char Vendor[1+sizeof(InquiryStandardData->VendorIdentification)];
2259 char Model[1+sizeof(InquiryStandardData->ProductIdentification)];
2260 char Revision[1+sizeof(InquiryStandardData->ProductRevisionLevel)];
2261 char SerialNumber[1+sizeof(InquiryUnitSerialNumber
2262 ->ProductSerialNumber)];
2263 if (InquiryStandardData->PeripheralDeviceType == 0x1F) continue;
2264 DAC960_SanitizeInquiryData(InquiryStandardData, InquiryUnitSerialNumber,
2265 Vendor, Model, Revision, SerialNumber);
2266 DAC960_Info(" %d:%d%s Vendor: %s Model: %s Revision: %s\n",
2267 Controller, Channel, TargetID, (TargetID < 10 ? " " : ""),
2268 Vendor, Model, Revision);
2269 if (InquiryUnitSerialNumber->PeripheralDeviceType != 0x1F)
2270 DAC960_Info(" Serial Number: %s\n", Controller, SerialNumber);
2271 if (DeviceState->Present &&
2272 DeviceState->DeviceType == DAC960_V1_DiskType)
2273 {
2274 if (Controller->V1.DeviceResetCount[Channel][TargetID] > 0)
2275 DAC960_Info(" Disk Status: %s, %u blocks, %d resets\n",
2276 Controller,
2277 (DeviceState->DeviceState == DAC960_V1_Device_Dead
2278 ? "Dead"
2279 : DeviceState->DeviceState
2280 == DAC960_V1_Device_WriteOnly
2281 ? "Write-Only"
2282 : DeviceState->DeviceState
2283 == DAC960_V1_Device_Online
2284 ? "Online" : "Standby"),
2285 DeviceState->DiskSize,
2286 Controller->V1.DeviceResetCount[Channel][TargetID]);
2287 else
2288 DAC960_Info(" Disk Status: %s, %u blocks\n", Controller,
2289 (DeviceState->DeviceState == DAC960_V1_Device_Dead
2290 ? "Dead"
2291 : DeviceState->DeviceState
2292 == DAC960_V1_Device_WriteOnly
2293 ? "Write-Only"
2294 : DeviceState->DeviceState
2295 == DAC960_V1_Device_Online
2296 ? "Online" : "Standby"),
2297 DeviceState->DiskSize);
2298 }
2299 if (ErrorEntry->ParityErrorCount > 0 ||
2300 ErrorEntry->SoftErrorCount > 0 ||
2301 ErrorEntry->HardErrorCount > 0 ||
2302 ErrorEntry->MiscErrorCount > 0)
2303 DAC960_Info(" Errors - Parity: %d, Soft: %d, "
2304 "Hard: %d, Misc: %d\n", Controller,
2305 ErrorEntry->ParityErrorCount,
2306 ErrorEntry->SoftErrorCount,
2307 ErrorEntry->HardErrorCount,
2308 ErrorEntry->MiscErrorCount);
2309 }
2310 DAC960_Info(" Logical Drives:\n", Controller);
2311 for (LogicalDriveNumber = 0;
2312 LogicalDriveNumber < Controller->LogicalDriveCount;
2313 LogicalDriveNumber++)
2314 {
2315 DAC960_V1_LogicalDriveInformation_T *LogicalDriveInformation =
2316 &Controller->V1.LogicalDriveInformation[LogicalDriveNumber];
2317 DAC960_Info(" /dev/rd/c%dd%d: RAID-%d, %s, %u blocks, %s\n",
2318 Controller, Controller->ControllerNumber, LogicalDriveNumber,
2319 LogicalDriveInformation->RAIDLevel,
2320 (LogicalDriveInformation->LogicalDriveState
2321 == DAC960_V1_LogicalDrive_Online
2322 ? "Online"
2323 : LogicalDriveInformation->LogicalDriveState
2324 == DAC960_V1_LogicalDrive_Critical
2325 ? "Critical" : "Offline"),
2326 LogicalDriveInformation->LogicalDriveSize,
2327 (LogicalDriveInformation->WriteBack
2328 ? "Write Back" : "Write Thru"));
2329 }
2330 return true;
2331}
2332
2333
2334/*
2335 DAC960_V2_ReportDeviceConfiguration reports the Device Configuration
2336 Information for DAC960 V2 Firmware Controllers.
2337*/
2338
87d156bf 2339static bool DAC960_V2_ReportDeviceConfiguration(DAC960_Controller_T
1da177e4
LT		 2340 *Controller)
2341{
2342 int PhysicalDeviceIndex, LogicalDriveNumber;
2343 DAC960_Info(" Physical Devices:\n", Controller);
2344 for (PhysicalDeviceIndex = 0;
2345 PhysicalDeviceIndex < DAC960_V2_MaxPhysicalDevices;
2346 PhysicalDeviceIndex++)
2347 {
2348 DAC960_V2_PhysicalDeviceInfo_T *PhysicalDeviceInfo =
2349 Controller->V2.PhysicalDeviceInformation[PhysicalDeviceIndex];
2350 DAC960_SCSI_Inquiry_T *InquiryStandardData =
2351 (DAC960_SCSI_Inquiry_T *) &PhysicalDeviceInfo->SCSI_InquiryData;
2352 DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber =
2353 Controller->V2.InquiryUnitSerialNumber[PhysicalDeviceIndex];
2354 char Vendor[1+sizeof(InquiryStandardData->VendorIdentification)];
2355 char Model[1+sizeof(InquiryStandardData->ProductIdentification)];
2356 char Revision[1+sizeof(InquiryStandardData->ProductRevisionLevel)];
2357 char SerialNumber[1+sizeof(InquiryUnitSerialNumber->ProductSerialNumber)];
2358 if (PhysicalDeviceInfo == NULL) break;
2359 DAC960_SanitizeInquiryData(InquiryStandardData, InquiryUnitSerialNumber,
2360 Vendor, Model, Revision, SerialNumber);
2361 DAC960_Info(" %d:%d%s Vendor: %s Model: %s Revision: %s\n",
2362 Controller,
2363 PhysicalDeviceInfo->Channel,
2364 PhysicalDeviceInfo->TargetID,
2365 (PhysicalDeviceInfo->TargetID < 10 ? " " : ""),
2366 Vendor, Model, Revision);
2367 if (PhysicalDeviceInfo->NegotiatedSynchronousMegaTransfers == 0)
2368 DAC960_Info(" %sAsynchronous\n", Controller,
2369 (PhysicalDeviceInfo->NegotiatedDataWidthBits == 16
2370 ? "Wide " :""));
2371 else
2372 DAC960_Info(" %sSynchronous at %d MB/sec\n", Controller,
2373 (PhysicalDeviceInfo->NegotiatedDataWidthBits == 16
2374 ? "Wide " :""),
2375 (PhysicalDeviceInfo->NegotiatedSynchronousMegaTransfers
2376 * PhysicalDeviceInfo->NegotiatedDataWidthBits/8));
2377 if (InquiryUnitSerialNumber->PeripheralDeviceType != 0x1F)
2378 DAC960_Info(" Serial Number: %s\n", Controller, SerialNumber);
2379 if (PhysicalDeviceInfo->PhysicalDeviceState ==
2380 DAC960_V2_Device_Unconfigured)
2381 continue;
2382 DAC960_Info(" Disk Status: %s, %u blocks\n", Controller,
2383 (PhysicalDeviceInfo->PhysicalDeviceState
2384 == DAC960_V2_Device_Online
2385 ? "Online"
2386 : PhysicalDeviceInfo->PhysicalDeviceState
2387 == DAC960_V2_Device_Rebuild
2388 ? "Rebuild"
2389 : PhysicalDeviceInfo->PhysicalDeviceState
2390 == DAC960_V2_Device_Missing
2391 ? "Missing"
2392 : PhysicalDeviceInfo->PhysicalDeviceState
2393 == DAC960_V2_Device_Critical
2394 ? "Critical"
2395 : PhysicalDeviceInfo->PhysicalDeviceState
2396 == DAC960_V2_Device_Dead
2397 ? "Dead"
2398 : PhysicalDeviceInfo->PhysicalDeviceState
2399 == DAC960_V2_Device_SuspectedDead
2400 ? "Suspected-Dead"
2401 : PhysicalDeviceInfo->PhysicalDeviceState
2402 == DAC960_V2_Device_CommandedOffline
2403 ? "Commanded-Offline"
2404 : PhysicalDeviceInfo->PhysicalDeviceState
2405 == DAC960_V2_Device_Standby
2406 ? "Standby" : "Unknown"),
2407 PhysicalDeviceInfo->ConfigurableDeviceSize);
2408 if (PhysicalDeviceInfo->ParityErrors == 0 &&
2409 PhysicalDeviceInfo->SoftErrors == 0 &&
2410 PhysicalDeviceInfo->HardErrors == 0 &&
2411 PhysicalDeviceInfo->MiscellaneousErrors == 0 &&
2412 PhysicalDeviceInfo->CommandTimeouts == 0 &&
2413 PhysicalDeviceInfo->Retries == 0 &&
2414 PhysicalDeviceInfo->Aborts == 0 &&
2415 PhysicalDeviceInfo->PredictedFailuresDetected == 0)
2416 continue;
2417 DAC960_Info(" Errors - Parity: %d, Soft: %d, "
2418 "Hard: %d, Misc: %d\n", Controller,
2419 PhysicalDeviceInfo->ParityErrors,
2420 PhysicalDeviceInfo->SoftErrors,
2421 PhysicalDeviceInfo->HardErrors,
2422 PhysicalDeviceInfo->MiscellaneousErrors);
2423 DAC960_Info(" Timeouts: %d, Retries: %d, "
2424 "Aborts: %d, Predicted: %d\n", Controller,
2425 PhysicalDeviceInfo->CommandTimeouts,
2426 PhysicalDeviceInfo->Retries,
2427 PhysicalDeviceInfo->Aborts,
2428 PhysicalDeviceInfo->PredictedFailuresDetected);
2429 }
2430 DAC960_Info(" Logical Drives:\n", Controller);
2431 for (LogicalDriveNumber = 0;
2432 LogicalDriveNumber < DAC960_MaxLogicalDrives;
2433 LogicalDriveNumber++)
2434 {
2435 DAC960_V2_LogicalDeviceInfo_T *LogicalDeviceInfo =
2436 Controller->V2.LogicalDeviceInformation[LogicalDriveNumber];
2437 unsigned char *ReadCacheStatus[] = { "Read Cache Disabled",
2438 "Read Cache Enabled",
2439 "Read Ahead Enabled",
2440 "Intelligent Read Ahead Enabled",
2441 "-", "-", "-", "-" };
2442 unsigned char *WriteCacheStatus[] = { "Write Cache Disabled",
2443 "Logical Device Read Only",
2444 "Write Cache Enabled",
2445 "Intelligent Write Cache Enabled",
2446 "-", "-", "-", "-" };
2447 unsigned char *GeometryTranslation;
2448 if (LogicalDeviceInfo == NULL) continue;
2449 switch (LogicalDeviceInfo->DriveGeometry)
2450 {
2451 case DAC960_V2_Geometry_128_32:
2452 GeometryTranslation = "128/32";
2453 break;
2454 case DAC960_V2_Geometry_255_63:
2455 GeometryTranslation = "255/63";
2456 break;
2457 default:
2458 GeometryTranslation = "Invalid";
2459 DAC960_Error("Illegal Logical Device Geometry %d\n",
2460 Controller, LogicalDeviceInfo->DriveGeometry);
2461 break;
2462 }
2463 DAC960_Info(" /dev/rd/c%dd%d: RAID-%d, %s, %u blocks\n",
2464 Controller, Controller->ControllerNumber, LogicalDriveNumber,
2465 LogicalDeviceInfo->RAIDLevel,
2466 (LogicalDeviceInfo->LogicalDeviceState
2467 == DAC960_V2_LogicalDevice_Online
2468 ? "Online"
2469 : LogicalDeviceInfo->LogicalDeviceState
2470 == DAC960_V2_LogicalDevice_Critical
2471 ? "Critical" : "Offline"),
2472 LogicalDeviceInfo->ConfigurableDeviceSize);
2473 DAC960_Info(" Logical Device %s, BIOS Geometry: %s\n",
2474 Controller,
2475 (LogicalDeviceInfo->LogicalDeviceControl
2476 .LogicalDeviceInitialized
2477 ? "Initialized" : "Uninitialized"),
2478 GeometryTranslation);
2479 if (LogicalDeviceInfo->StripeSize == 0)
2480 {
2481 if (LogicalDeviceInfo->CacheLineSize == 0)
2482 DAC960_Info(" Stripe Size: N/A, "
2483 "Segment Size: N/A\n", Controller);
2484 else
2485 DAC960_Info(" Stripe Size: N/A, "
2486 "Segment Size: %dKB\n", Controller,
2487 1 << (LogicalDeviceInfo->CacheLineSize - 2));
2488 }
2489 else
2490 {
2491 if (LogicalDeviceInfo->CacheLineSize == 0)
2492 DAC960_Info(" Stripe Size: %dKB, "
2493 "Segment Size: N/A\n", Controller,
2494 1 << (LogicalDeviceInfo->StripeSize - 2));
2495 else
2496 DAC960_Info(" Stripe Size: %dKB, "
2497 "Segment Size: %dKB\n", Controller,
2498 1 << (LogicalDeviceInfo->StripeSize - 2),
2499 1 << (LogicalDeviceInfo->CacheLineSize - 2));
2500 }
2501 DAC960_Info(" %s, %s\n", Controller,
2502 ReadCacheStatus[
2503 LogicalDeviceInfo->LogicalDeviceControl.ReadCache],
2504 WriteCacheStatus[
2505 LogicalDeviceInfo->LogicalDeviceControl.WriteCache]);
2506 if (LogicalDeviceInfo->SoftErrors > 0 ||
2507 LogicalDeviceInfo->CommandsFailed > 0 ||
2508 LogicalDeviceInfo->DeferredWriteErrors)
2509 DAC960_Info(" Errors - Soft: %d, Failed: %d, "
2510 "Deferred Write: %d\n", Controller,
2511 LogicalDeviceInfo->SoftErrors,
2512 LogicalDeviceInfo->CommandsFailed,
2513 LogicalDeviceInfo->DeferredWriteErrors);
2514
2515 }
2516 return true;
2517}
2518
2519/*
2520 DAC960_RegisterBlockDevice registers the Block Device structures
2521 associated with Controller.
2522*/
2523
87d156bf 2524static bool DAC960_RegisterBlockDevice(DAC960_Controller_T *Controller)
1da177e4
LT		 2525{
2526 int MajorNumber = DAC960_MAJOR + Controller->ControllerNumber;
2527 int n;
2528
2529 /*
2530 Register the Block Device Major Number for this DAC960 Controller.
2531 */
2532 if (register_blkdev(MajorNumber, "dac960") < 0)
2533 return false;
2534
2535 for (n = 0; n < DAC960_MaxLogicalDrives; n++) {
2536 struct gendisk *disk = Controller->disks[n];
2537 struct request_queue *RequestQueue;
2538
2539 /* for now, let all request queues share controller's lock */
2540 RequestQueue = blk_init_queue(DAC960_RequestFunction,&Controller->queue_lock);
2541 if (!RequestQueue) {
2542 printk("DAC960: failure to allocate request queue\n");
2543 continue;
2544 }
2545 Controller->RequestQueue[n] = RequestQueue;
2546 blk_queue_bounce_limit(RequestQueue, Controller->BounceBufferLimit);
2547 RequestQueue->queuedata = Controller;
8a78362c 2548 blk_queue_max_segments(RequestQueue, Controller->DriverScatterGatherLimit);
086fa5ff 2549 blk_queue_max_hw_sectors(RequestQueue, Controller->MaxBlocksPerCommand);
1da177e4
LT		 2550 disk->queue = RequestQueue;
2551 sprintf(disk->disk_name, "rd/c%dd%d", Controller->ControllerNumber, n);
1da177e4
LT		 2552 disk->major = MajorNumber;
2553 disk->first_minor = n << DAC960_MaxPartitionsBits;
2554 disk->fops = &DAC960_BlockDeviceOperations;
2555 }
2556 /*
2557 Indicate the Block Device Registration completed successfully,
2558 */
2559 return true;
2560}
2561
2562
2563/*
2564 DAC960_UnregisterBlockDevice unregisters the Block Device structures
2565 associated with Controller.
2566*/
2567
2568static void DAC960_UnregisterBlockDevice(DAC960_Controller_T *Controller)
2569{
2570 int MajorNumber = DAC960_MAJOR + Controller->ControllerNumber;
2571 int disk;
2572
2573 /* does order matter when deleting gendisk and cleanup in request queue? */
2574 for (disk = 0; disk < DAC960_MaxLogicalDrives; disk++) {
2575 del_gendisk(Controller->disks[disk]);
2576 blk_cleanup_queue(Controller->RequestQueue[disk]);
2577 Controller->RequestQueue[disk] = NULL;
2578 }
2579
2580 /*
2581 Unregister the Block Device Major Number for this DAC960 Controller.
2582 */
2583 unregister_blkdev(MajorNumber, "dac960");
2584}
2585
2586/*
2587 DAC960_ComputeGenericDiskInfo computes the values for the Generic Disk
2588 Information Partition Sector Counts and Block Sizes.
2589*/
2590
2591static void DAC960_ComputeGenericDiskInfo(DAC960_Controller_T *Controller)
2592{
2593 int disk;
2594 for (disk = 0; disk < DAC960_MaxLogicalDrives; disk++)
2595 set_capacity(Controller->disks[disk], disk_size(Controller, disk));
2596}
2597
2598/*
2599 DAC960_ReportErrorStatus reports Controller BIOS Messages passed through
2600 the Error Status Register when the driver performs the BIOS handshaking.
2601 It returns true for fatal errors and false otherwise.
2602*/
2603
87d156bf 2604static bool DAC960_ReportErrorStatus(DAC960_Controller_T *Controller,
1da177e4
LT		 2605 unsigned char ErrorStatus,
2606 unsigned char Parameter0,
2607 unsigned char Parameter1)
2608{
2609 switch (ErrorStatus)
2610 {
2611 case 0x00:
2612 DAC960_Notice("Physical Device %d:%d Not Responding\n",
2613 Controller, Parameter1, Parameter0);
2614 break;
2615 case 0x08:
2616 if (Controller->DriveSpinUpMessageDisplayed) break;
2617 DAC960_Notice("Spinning Up Drives\n", Controller);
2618 Controller->DriveSpinUpMessageDisplayed = true;
2619 break;
2620 case 0x30:
2621 DAC960_Notice("Configuration Checksum Error\n", Controller);
2622 break;
2623 case 0x60:
2624 DAC960_Notice("Mirror Race Recovery Failed\n", Controller);
2625 break;
2626 case 0x70:
2627 DAC960_Notice("Mirror Race Recovery In Progress\n", Controller);
2628 break;
2629 case 0x90:
2630 DAC960_Notice("Physical Device %d:%d COD Mismatch\n",
2631 Controller, Parameter1, Parameter0);
2632 break;
2633 case 0xA0:
2634 DAC960_Notice("Logical Drive Installation Aborted\n", Controller);
2635 break;
2636 case 0xB0:
2637 DAC960_Notice("Mirror Race On A Critical Logical Drive\n", Controller);
2638 break;
2639 case 0xD0:
2640 DAC960_Notice("New Controller Configuration Found\n", Controller);
2641 break;
2642 case 0xF0:
2643 DAC960_Error("Fatal Memory Parity Error for Controller at\n", Controller);
2644 return true;
2645 default:
2646 DAC960_Error("Unknown Initialization Error %02X for Controller at\n",
2647 Controller, ErrorStatus);
2648 return true;
2649 }
2650 return false;
2651}
2652
2653
2654/*
2655 * DAC960_DetectCleanup releases the resources that were allocated
2656 * during DAC960_DetectController(). DAC960_DetectController can
2657 * has several internal failure points, so not ALL resources may
2658 * have been allocated. It's important to free only
2659 * resources that HAVE been allocated. The code below always
2660 * tests that the resource has been allocated before attempting to
2661 * free it.
2662 */
2663static void DAC960_DetectCleanup(DAC960_Controller_T *Controller)
2664{
2665 int i;
2666
2667 /* Free the memory mailbox, status, and related structures */
2668 free_dma_loaf(Controller->PCIDevice, &Controller->DmaPages);
2669 if (Controller->MemoryMappedAddress) {
2670 switch(Controller->HardwareType)
2671 {
5b76ffd5
CH		 2672 case DAC960_GEM_Controller:
2673 DAC960_GEM_DisableInterrupts(Controller->BaseAddress);
2674 break;
1da177e4
LT		 2675 case DAC960_BA_Controller:
2676 DAC960_BA_DisableInterrupts(Controller->BaseAddress);
2677 break;
2678 case DAC960_LP_Controller:
2679 DAC960_LP_DisableInterrupts(Controller->BaseAddress);
2680 break;
2681 case DAC960_LA_Controller:
2682 DAC960_LA_DisableInterrupts(Controller->BaseAddress);
2683 break;
2684 case DAC960_PG_Controller:
2685 DAC960_PG_DisableInterrupts(Controller->BaseAddress);
2686 break;
2687 case DAC960_PD_Controller:
2688 DAC960_PD_DisableInterrupts(Controller->BaseAddress);
2689 break;
2690 case DAC960_P_Controller:
2691 DAC960_PD_DisableInterrupts(Controller->BaseAddress);
2692 break;
2693 }
2694 iounmap(Controller->MemoryMappedAddress);
2695 }
2696 if (Controller->IRQ_Channel)
2697 free_irq(Controller->IRQ_Channel, Controller);
2698 if (Controller->IO_Address)
2699 release_region(Controller->IO_Address, 0x80);
2700 pci_disable_device(Controller->PCIDevice);
2701 for (i = 0; (i < DAC960_MaxLogicalDrives) && Controller->disks[i]; i++)
2702 put_disk(Controller->disks[i]);
2703 DAC960_Controllers[Controller->ControllerNumber] = NULL;
2704 kfree(Controller);
2705}
2706
2707
2708/*
2709 DAC960_DetectController detects Mylex DAC960/AcceleRAID/eXtremeRAID
2710 PCI RAID Controllers by interrogating the PCI Configuration Space for
2711 Controller Type.
2712*/
2713
2714static DAC960_Controller_T *
2715DAC960_DetectController(struct pci_dev *PCI_Device,
2716 const struct pci_device_id *entry)
2717{
2718 struct DAC960_privdata *privdata =
2719 (struct DAC960_privdata *)entry->driver_data;
7d12e780 2720 irq_handler_t InterruptHandler = privdata->InterruptHandler;
1da177e4
LT		 2721 unsigned int MemoryWindowSize = privdata->MemoryWindowSize;
2722 DAC960_Controller_T *Controller = NULL;
2723 unsigned char DeviceFunction = PCI_Device->devfn;
2724 unsigned char ErrorStatus, Parameter0, Parameter1;
2725 unsigned int IRQ_Channel;
2726 void __iomem *BaseAddress;
2727 int i;
2728
06ff37ff 2729 Controller = kzalloc(sizeof(DAC960_Controller_T), GFP_ATOMIC);
1da177e4
LT		 2730 if (Controller == NULL) {
2731 DAC960_Error("Unable to allocate Controller structure for "
2732 "Controller at\n", NULL);
2733 return NULL;
2734 }
1da177e4
LT		 2735 Controller->ControllerNumber = DAC960_ControllerCount;
2736 DAC960_Controllers[DAC960_ControllerCount++] = Controller;
2737 Controller->Bus = PCI_Device->bus->number;
2738 Controller->FirmwareType = privdata->FirmwareType;
2739 Controller->HardwareType = privdata->HardwareType;
2740 Controller->Device = DeviceFunction >> 3;
2741 Controller->Function = DeviceFunction & 0x7;
2742 Controller->PCIDevice = PCI_Device;
2743 strcpy(Controller->FullModelName, "DAC960");
2744
2745 if (pci_enable_device(PCI_Device))
2746 goto Failure;
2747
2748 switch (Controller->HardwareType)
2749 {
5b76ffd5
CH		 2750 case DAC960_GEM_Controller:
2751 Controller->PCI_Address = pci_resource_start(PCI_Device, 0);
2752 break;
1da177e4
LT		 2753 case DAC960_BA_Controller:
2754 Controller->PCI_Address = pci_resource_start(PCI_Device, 0);
2755 break;
2756 case DAC960_LP_Controller:
2757 Controller->PCI_Address = pci_resource_start(PCI_Device, 0);
2758 break;
2759 case DAC960_LA_Controller:
2760 Controller->PCI_Address = pci_resource_start(PCI_Device, 0);
2761 break;
2762 case DAC960_PG_Controller:
2763 Controller->PCI_Address = pci_resource_start(PCI_Device, 0);
2764 break;
2765 case DAC960_PD_Controller:
2766 Controller->IO_Address = pci_resource_start(PCI_Device, 0);
2767 Controller->PCI_Address = pci_resource_start(PCI_Device, 1);
2768 break;
2769 case DAC960_P_Controller:
2770 Controller->IO_Address = pci_resource_start(PCI_Device, 0);
2771 Controller->PCI_Address = pci_resource_start(PCI_Device, 1);
2772 break;
2773 }
2774
2775 pci_set_drvdata(PCI_Device, (void *)((long)Controller->ControllerNumber));
2776 for (i = 0; i < DAC960_MaxLogicalDrives; i++) {
2777 Controller->disks[i] = alloc_disk(1<<DAC960_MaxPartitionsBits);
2778 if (!Controller->disks[i])
2779 goto Failure;
2780 Controller->disks[i]->private_data = (void *)((long)i);
2781 }
2782 init_waitqueue_head(&Controller->CommandWaitQueue);
2783 init_waitqueue_head(&Controller->HealthStatusWaitQueue);
2784 spin_lock_init(&Controller->queue_lock);
2785 DAC960_AnnounceDriver(Controller);
2786 /*
2787 Map the Controller Register Window.
2788 */
2789 if (MemoryWindowSize < PAGE_SIZE)
2790 MemoryWindowSize = PAGE_SIZE;
2791 Controller->MemoryMappedAddress =
2792 ioremap_nocache(Controller->PCI_Address & PAGE_MASK, MemoryWindowSize);
2793 Controller->BaseAddress =
2794 Controller->MemoryMappedAddress + (Controller->PCI_Address & ~PAGE_MASK);
2795 if (Controller->MemoryMappedAddress == NULL)
2796 {
2797 DAC960_Error("Unable to map Controller Register Window for "
2798 "Controller at\n", Controller);
2799 goto Failure;
2800 }
2801 BaseAddress = Controller->BaseAddress;
2802 switch (Controller->HardwareType)
2803 {
5b76ffd5
CH		 2804 case DAC960_GEM_Controller:
2805 DAC960_GEM_DisableInterrupts(BaseAddress);
2806 DAC960_GEM_AcknowledgeHardwareMailboxStatus(BaseAddress);
2807 udelay(1000);
2808 while (DAC960_GEM_InitializationInProgressP(BaseAddress))
2809 {
2810 if (DAC960_GEM_ReadErrorStatus(BaseAddress, &ErrorStatus,
2811 &Parameter0, &Parameter1) &&
2812 DAC960_ReportErrorStatus(Controller, ErrorStatus,
2813 Parameter0, Parameter1))
2814 goto Failure;
2815 udelay(10);
2816 }
2817 if (!DAC960_V2_EnableMemoryMailboxInterface(Controller))
2818 {
2819 DAC960_Error("Unable to Enable Memory Mailbox Interface "
2820 "for Controller at\n", Controller);
2821 goto Failure;
2822 }
2823 DAC960_GEM_EnableInterrupts(BaseAddress);
2824 Controller->QueueCommand = DAC960_GEM_QueueCommand;
2825 Controller->ReadControllerConfiguration =
2826 DAC960_V2_ReadControllerConfiguration;
2827 Controller->ReadDeviceConfiguration =
2828 DAC960_V2_ReadDeviceConfiguration;
2829 Controller->ReportDeviceConfiguration =
2830 DAC960_V2_ReportDeviceConfiguration;
2831 Controller->QueueReadWriteCommand =
2832 DAC960_V2_QueueReadWriteCommand;
2833 break;
1da177e4
LT		 2834 case DAC960_BA_Controller:
2835 DAC960_BA_DisableInterrupts(BaseAddress);
2836 DAC960_BA_AcknowledgeHardwareMailboxStatus(BaseAddress);
2837 udelay(1000);
2838 while (DAC960_BA_InitializationInProgressP(BaseAddress))
2839 {
2840 if (DAC960_BA_ReadErrorStatus(BaseAddress, &ErrorStatus,
2841 &Parameter0, &Parameter1) &&
2842 DAC960_ReportErrorStatus(Controller, ErrorStatus,
2843 Parameter0, Parameter1))
2844 goto Failure;
2845 udelay(10);
2846 }
2847 if (!DAC960_V2_EnableMemoryMailboxInterface(Controller))
2848 {
2849 DAC960_Error("Unable to Enable Memory Mailbox Interface "
2850 "for Controller at\n", Controller);
2851 goto Failure;
2852 }
2853 DAC960_BA_EnableInterrupts(BaseAddress);
2854 Controller->QueueCommand = DAC960_BA_QueueCommand;
2855 Controller->ReadControllerConfiguration =
2856 DAC960_V2_ReadControllerConfiguration;
2857 Controller->ReadDeviceConfiguration =
2858 DAC960_V2_ReadDeviceConfiguration;
2859 Controller->ReportDeviceConfiguration =
2860 DAC960_V2_ReportDeviceConfiguration;
2861 Controller->QueueReadWriteCommand =
2862 DAC960_V2_QueueReadWriteCommand;
2863 break;
2864 case DAC960_LP_Controller:
2865 DAC960_LP_DisableInterrupts(BaseAddress);
2866 DAC960_LP_AcknowledgeHardwareMailboxStatus(BaseAddress);
2867 udelay(1000);
2868 while (DAC960_LP_InitializationInProgressP(BaseAddress))
2869 {
2870 if (DAC960_LP_ReadErrorStatus(BaseAddress, &ErrorStatus,
2871 &Parameter0, &Parameter1) &&
2872 DAC960_ReportErrorStatus(Controller, ErrorStatus,
2873 Parameter0, Parameter1))
2874 goto Failure;
2875 udelay(10);
2876 }
2877 if (!DAC960_V2_EnableMemoryMailboxInterface(Controller))
2878 {
2879 DAC960_Error("Unable to Enable Memory Mailbox Interface "
2880 "for Controller at\n", Controller);
2881 goto Failure;
2882 }
2883 DAC960_LP_EnableInterrupts(BaseAddress);
2884 Controller->QueueCommand = DAC960_LP_QueueCommand;
2885 Controller->ReadControllerConfiguration =
2886 DAC960_V2_ReadControllerConfiguration;
2887 Controller->ReadDeviceConfiguration =
2888 DAC960_V2_ReadDeviceConfiguration;
2889 Controller->ReportDeviceConfiguration =
2890 DAC960_V2_ReportDeviceConfiguration;
2891 Controller->QueueReadWriteCommand =
2892 DAC960_V2_QueueReadWriteCommand;
2893 break;
2894 case DAC960_LA_Controller:
2895 DAC960_LA_DisableInterrupts(BaseAddress);
2896 DAC960_LA_AcknowledgeHardwareMailboxStatus(BaseAddress);
2897 udelay(1000);
2898 while (DAC960_LA_InitializationInProgressP(BaseAddress))
2899 {
2900 if (DAC960_LA_ReadErrorStatus(BaseAddress, &ErrorStatus,
2901 &Parameter0, &Parameter1) &&
2902 DAC960_ReportErrorStatus(Controller, ErrorStatus,
2903 Parameter0, Parameter1))
2904 goto Failure;
2905 udelay(10);
2906 }
2907 if (!DAC960_V1_EnableMemoryMailboxInterface(Controller))
2908 {
2909 DAC960_Error("Unable to Enable Memory Mailbox Interface "
2910 "for Controller at\n", Controller);
2911 goto Failure;
2912 }
2913 DAC960_LA_EnableInterrupts(BaseAddress);
2914 if (Controller->V1.DualModeMemoryMailboxInterface)
2915 Controller->QueueCommand = DAC960_LA_QueueCommandDualMode;
2916 else Controller->QueueCommand = DAC960_LA_QueueCommandSingleMode;
2917 Controller->ReadControllerConfiguration =
2918 DAC960_V1_ReadControllerConfiguration;
2919 Controller->ReadDeviceConfiguration =
2920 DAC960_V1_ReadDeviceConfiguration;
2921 Controller->ReportDeviceConfiguration =
2922 DAC960_V1_ReportDeviceConfiguration;
2923 Controller->QueueReadWriteCommand =
2924 DAC960_V1_QueueReadWriteCommand;
2925 break;
2926 case DAC960_PG_Controller:
2927 DAC960_PG_DisableInterrupts(BaseAddress);
2928 DAC960_PG_AcknowledgeHardwareMailboxStatus(BaseAddress);
2929 udelay(1000);
2930 while (DAC960_PG_InitializationInProgressP(BaseAddress))
2931 {
2932 if (DAC960_PG_ReadErrorStatus(BaseAddress, &ErrorStatus,
2933 &Parameter0, &Parameter1) &&
2934 DAC960_ReportErrorStatus(Controller, ErrorStatus,
2935 Parameter0, Parameter1))
2936 goto Failure;
2937 udelay(10);
2938 }
2939 if (!DAC960_V1_EnableMemoryMailboxInterface(Controller))
2940 {
2941 DAC960_Error("Unable to Enable Memory Mailbox Interface "
2942 "for Controller at\n", Controller);
2943 goto Failure;
2944 }
2945 DAC960_PG_EnableInterrupts(BaseAddress);
2946 if (Controller->V1.DualModeMemoryMailboxInterface)
2947 Controller->QueueCommand = DAC960_PG_QueueCommandDualMode;
2948 else Controller->QueueCommand = DAC960_PG_QueueCommandSingleMode;
2949 Controller->ReadControllerConfiguration =
2950 DAC960_V1_ReadControllerConfiguration;
2951 Controller->ReadDeviceConfiguration =
2952 DAC960_V1_ReadDeviceConfiguration;
2953 Controller->ReportDeviceConfiguration =
2954 DAC960_V1_ReportDeviceConfiguration;
2955 Controller->QueueReadWriteCommand =
2956 DAC960_V1_QueueReadWriteCommand;
2957 break;
2958 case DAC960_PD_Controller:
2959 if (!request_region(Controller->IO_Address, 0x80,
2960 Controller->FullModelName)) {
ee52c44d 2961 DAC960_Error("IO port 0x%lx busy for Controller at\n",
1da177e4
LT		 2962 Controller, Controller->IO_Address);
2963 goto Failure;
2964 }
2965 DAC960_PD_DisableInterrupts(BaseAddress);
2966 DAC960_PD_AcknowledgeStatus(BaseAddress);
2967 udelay(1000);
2968 while (DAC960_PD_InitializationInProgressP(BaseAddress))
2969 {
2970 if (DAC960_PD_ReadErrorStatus(BaseAddress, &ErrorStatus,
2971 &Parameter0, &Parameter1) &&
2972 DAC960_ReportErrorStatus(Controller, ErrorStatus,
2973 Parameter0, Parameter1))
2974 goto Failure;
2975 udelay(10);
2976 }
2977 if (!DAC960_V1_EnableMemoryMailboxInterface(Controller))
2978 {
2979 DAC960_Error("Unable to allocate DMA mapped memory "
2980 "for Controller at\n", Controller);
2981 goto Failure;
2982 }
2983 DAC960_PD_EnableInterrupts(BaseAddress);
2984 Controller->QueueCommand = DAC960_PD_QueueCommand;
2985 Controller->ReadControllerConfiguration =
2986 DAC960_V1_ReadControllerConfiguration;
2987 Controller->ReadDeviceConfiguration =
2988 DAC960_V1_ReadDeviceConfiguration;
2989 Controller->ReportDeviceConfiguration =
2990 DAC960_V1_ReportDeviceConfiguration;
2991 Controller->QueueReadWriteCommand =
2992 DAC960_V1_QueueReadWriteCommand;
2993 break;
2994 case DAC960_P_Controller:
2995 if (!request_region(Controller->IO_Address, 0x80,
2996 Controller->FullModelName)){
ee52c44d 2997 DAC960_Error("IO port 0x%lx busy for Controller at\n",
1da177e4
LT		 2998 Controller, Controller->IO_Address);
2999 goto Failure;
3000 }
3001 DAC960_PD_DisableInterrupts(BaseAddress);
3002 DAC960_PD_AcknowledgeStatus(BaseAddress);
3003 udelay(1000);
3004 while (DAC960_PD_InitializationInProgressP(BaseAddress))
3005 {
3006 if (DAC960_PD_ReadErrorStatus(BaseAddress, &ErrorStatus,
3007 &Parameter0, &Parameter1) &&
3008 DAC960_ReportErrorStatus(Controller, ErrorStatus,
3009 Parameter0, Parameter1))
3010 goto Failure;
3011 udelay(10);
3012 }
3013 if (!DAC960_V1_EnableMemoryMailboxInterface(Controller))
3014 {
3015 DAC960_Error("Unable to allocate DMA mapped memory"
3016 "for Controller at\n", Controller);
3017 goto Failure;
3018 }
3019 DAC960_PD_EnableInterrupts(BaseAddress);
3020 Controller->QueueCommand = DAC960_P_QueueCommand;
3021 Controller->ReadControllerConfiguration =
3022 DAC960_V1_ReadControllerConfiguration;
3023 Controller->ReadDeviceConfiguration =
3024 DAC960_V1_ReadDeviceConfiguration;
3025 Controller->ReportDeviceConfiguration =
3026 DAC960_V1_ReportDeviceConfiguration;
3027 Controller->QueueReadWriteCommand =
3028 DAC960_V1_QueueReadWriteCommand;
3029 break;
3030 }
3031 /*
3032 Acquire shared access to the IRQ Channel.
3033 */
3034 IRQ_Channel = PCI_Device->irq;
69ab3912 3035 if (request_irq(IRQ_Channel, InterruptHandler, IRQF_SHARED,
1da177e4
LT		 3036 Controller->FullModelName, Controller) < 0)
3037 {
3038 DAC960_Error("Unable to acquire IRQ Channel %d for Controller at\n",
3039 Controller, Controller->IRQ_Channel);
3040 goto Failure;
3041 }
3042 Controller->IRQ_Channel = IRQ_Channel;
3043 Controller->InitialCommand.CommandIdentifier = 1;
3044 Controller->InitialCommand.Controller = Controller;
3045 Controller->Commands[0] = &Controller->InitialCommand;
3046 Controller->FreeCommands = &Controller->InitialCommand;
3047 return Controller;
3048
3049Failure:
3050 if (Controller->IO_Address == 0)
3051 DAC960_Error("PCI Bus %d Device %d Function %d I/O Address N/A "
3052 "PCI Address 0x%X\n", Controller,
3053 Controller->Bus, Controller->Device,
3054 Controller->Function, Controller->PCI_Address);
3055 else
3056 DAC960_Error("PCI Bus %d Device %d Function %d I/O Address "
3057 "0x%X PCI Address 0x%X\n", Controller,
3058 Controller->Bus, Controller->Device,
3059 Controller->Function, Controller->IO_Address,
3060 Controller->PCI_Address);
3061 DAC960_DetectCleanup(Controller);
3062 DAC960_ControllerCount--;
3063 return NULL;
3064}
3065
3066/*
3067 DAC960_InitializeController initializes Controller.
3068*/
3069
87d156bf 3070static bool
1da177e4
LT		 3071DAC960_InitializeController(DAC960_Controller_T *Controller)
3072{
3073 if (DAC960_ReadControllerConfiguration(Controller) &&
3074 DAC960_ReportControllerConfiguration(Controller) &&
3075 DAC960_CreateAuxiliaryStructures(Controller) &&
3076 DAC960_ReadDeviceConfiguration(Controller) &&
3077 DAC960_ReportDeviceConfiguration(Controller) &&
3078 DAC960_RegisterBlockDevice(Controller))
3079 {
3080 /*
3081 Initialize the Monitoring Timer.
3082 */
e99e88a9
KC		 3083 timer_setup(&Controller->MonitoringTimer,
3084 DAC960_MonitoringTimerFunction, 0);
1da177e4
LT		 3085 Controller->MonitoringTimer.expires =
3086 jiffies + DAC960_MonitoringTimerInterval;
1da177e4
LT		 3087 add_timer(&Controller->MonitoringTimer);
3088 Controller->ControllerInitialized = true;
3089 return true;
3090 }
3091 return false;
3092}
3093
3094
3095/*
3096 DAC960_FinalizeController finalizes Controller.
3097*/
3098
3099static void DAC960_FinalizeController(DAC960_Controller_T *Controller)
3100{
3101 if (Controller->ControllerInitialized)
3102 {
3103 unsigned long flags;
3104
3105 /*
3106 * Acquiring and releasing lock here eliminates
3107 * a very low probability race.
3108 *
3109 * The code below allocates controller command structures
3110 * from the free list without holding the controller lock.
3111 * This is safe assuming there is no other activity on
3112 * the controller at the time.
3113 *
3114 * But, there might be a monitoring command still
3115 * in progress. Setting the Shutdown flag while holding
3116 * the lock ensures that there is no monitoring command
3117 * in the interrupt handler currently, and any monitoring
3118 * commands that complete from this time on will NOT return
3119 * their command structure to the free list.
3120 */
3121
3122 spin_lock_irqsave(&Controller->queue_lock, flags);
3123 Controller->ShutdownMonitoringTimer = 1;
3124 spin_unlock_irqrestore(&Controller->queue_lock, flags);
3125
3126 del_timer_sync(&Controller->MonitoringTimer);
3127 if (Controller->FirmwareType == DAC960_V1_Controller)
3128 {
3129 DAC960_Notice("Flushing Cache...", Controller);
3130 DAC960_V1_ExecuteType3(Controller, DAC960_V1_Flush, 0);
3131 DAC960_Notice("done\n", Controller);
3132
3133 if (Controller->HardwareType == DAC960_PD_Controller)
3134 release_region(Controller->IO_Address, 0x80);
3135 }
3136 else
3137 {
3138 DAC960_Notice("Flushing Cache...", Controller);
3139 DAC960_V2_DeviceOperation(Controller, DAC960_V2_PauseDevice,
3140 DAC960_V2_RAID_Controller);
3141 DAC960_Notice("done\n", Controller);
3142 }
3143 }
3144 DAC960_UnregisterBlockDevice(Controller);
3145 DAC960_DestroyAuxiliaryStructures(Controller);
3146 DAC960_DestroyProcEntries(Controller);
3147 DAC960_DetectCleanup(Controller);
3148}
3149
3150
3151/*
3152 DAC960_Probe verifies controller's existence and
3153 initializes the DAC960 Driver for that controller.
3154*/
3155
3156static int
3157DAC960_Probe(struct pci_dev *dev, const struct pci_device_id *entry)
3158{
3159 int disk;
3160 DAC960_Controller_T *Controller;
3161
3162 if (DAC960_ControllerCount == DAC960_MaxControllers)
3163 {
3164 DAC960_Error("More than %d DAC960 Controllers detected - "
3165 "ignoring from Controller at\n",
3166 NULL, DAC960_MaxControllers);
3167 return -ENODEV;
3168 }
3169
3170 Controller = DAC960_DetectController(dev, entry);
3171 if (!Controller)
3172 return -ENODEV;
3173
3174 if (!DAC960_InitializeController(Controller)) {
3175 DAC960_FinalizeController(Controller);
3176 return -ENODEV;
3177 }
3178
3179 for (disk = 0; disk < DAC960_MaxLogicalDrives; disk++) {
3180 set_capacity(Controller->disks[disk], disk_size(Controller, disk));
3181 add_disk(Controller->disks[disk]);
3182 }
3183 DAC960_CreateProcEntries(Controller);
3184 return 0;
3185}
3186
3187
3188/*
3189 DAC960_Finalize finalizes the DAC960 Driver.
3190*/
3191
3192static void DAC960_Remove(struct pci_dev *PCI_Device)
3193{
3194 int Controller_Number = (long)pci_get_drvdata(PCI_Device);
3195 DAC960_Controller_T *Controller = DAC960_Controllers[Controller_Number];
3196 if (Controller != NULL)
3197 DAC960_FinalizeController(Controller);
3198}
3199
3200
3201/*
3202 DAC960_V1_QueueReadWriteCommand prepares and queues a Read/Write Command for
3203 DAC960 V1 Firmware Controllers.
3204*/
3205
3206static void DAC960_V1_QueueReadWriteCommand(DAC960_Command_T *Command)
3207{
3208 DAC960_Controller_T *Controller = Command->Controller;
3209 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
3210 DAC960_V1_ScatterGatherSegment_T *ScatterGatherList =
3211 Command->V1.ScatterGatherList;
3212 struct scatterlist *ScatterList = Command->V1.ScatterList;
3213
3214 DAC960_V1_ClearCommand(Command);
3215
3216 if (Command->SegmentCount == 1)
3217 {
3218 if (Command->DmaDirection == PCI_DMA_FROMDEVICE)
3219 CommandMailbox->Type5.CommandOpcode = DAC960_V1_Read;
3220 else
3221 CommandMailbox->Type5.CommandOpcode = DAC960_V1_Write;
3222
3223 CommandMailbox->Type5.LD.TransferLength = Command->BlockCount;
3224 CommandMailbox->Type5.LD.LogicalDriveNumber = Command->LogicalDriveNumber;
3225 CommandMailbox->Type5.LogicalBlockAddress = Command->BlockNumber;
3226 CommandMailbox->Type5.BusAddress =
3227 (DAC960_BusAddress32_T)sg_dma_address(ScatterList);
3228 }
3229 else
3230 {
3231 int i;
3232
3233 if (Command->DmaDirection == PCI_DMA_FROMDEVICE)
3234 CommandMailbox->Type5.CommandOpcode = DAC960_V1_ReadWithScatterGather;
3235 else
3236 CommandMailbox->Type5.CommandOpcode = DAC960_V1_WriteWithScatterGather;
3237
3238 CommandMailbox->Type5.LD.TransferLength = Command->BlockCount;
3239 CommandMailbox->Type5.LD.LogicalDriveNumber = Command->LogicalDriveNumber;
3240 CommandMailbox->Type5.LogicalBlockAddress = Command->BlockNumber;
3241 CommandMailbox->Type5.BusAddress = Command->V1.ScatterGatherListDMA;
3242
3243 CommandMailbox->Type5.ScatterGatherCount = Command->SegmentCount;
3244
3245 for (i = 0; i < Command->SegmentCount; i++, ScatterList++, ScatterGatherList++) {
3246 ScatterGatherList->SegmentDataPointer =
3247 (DAC960_BusAddress32_T)sg_dma_address(ScatterList);
3248 ScatterGatherList->SegmentByteCount =
3249 (DAC960_ByteCount32_T)sg_dma_len(ScatterList);
3250 }
3251 }
3252 DAC960_QueueCommand(Command);
3253}
3254
3255
3256/*
3257 DAC960_V2_QueueReadWriteCommand prepares and queues a Read/Write Command for
3258 DAC960 V2 Firmware Controllers.
3259*/
3260
3261static void DAC960_V2_QueueReadWriteCommand(DAC960_Command_T *Command)
3262{
3263 DAC960_Controller_T *Controller = Command->Controller;
3264 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
3265 struct scatterlist *ScatterList = Command->V2.ScatterList;
3266
3267 DAC960_V2_ClearCommand(Command);
3268
3269 CommandMailbox->SCSI_10.CommandOpcode = DAC960_V2_SCSI_10;
3270 CommandMailbox->SCSI_10.CommandControlBits.DataTransferControllerToHost =
3271 (Command->DmaDirection == PCI_DMA_FROMDEVICE);
3272 CommandMailbox->SCSI_10.DataTransferSize =
3273 Command->BlockCount << DAC960_BlockSizeBits;
3274 CommandMailbox->SCSI_10.RequestSenseBusAddress = Command->V2.RequestSenseDMA;
3275 CommandMailbox->SCSI_10.PhysicalDevice =
3276 Controller->V2.LogicalDriveToVirtualDevice[Command->LogicalDriveNumber];
3277 CommandMailbox->SCSI_10.RequestSenseSize = sizeof(DAC960_SCSI_RequestSense_T);
3278 CommandMailbox->SCSI_10.CDBLength = 10;
3279 CommandMailbox->SCSI_10.SCSI_CDB[0] =
3280 (Command->DmaDirection == PCI_DMA_FROMDEVICE ? 0x28 : 0x2A);
3281 CommandMailbox->SCSI_10.SCSI_CDB[2] = Command->BlockNumber >> 24;
3282 CommandMailbox->SCSI_10.SCSI_CDB[3] = Command->BlockNumber >> 16;
3283 CommandMailbox->SCSI_10.SCSI_CDB[4] = Command->BlockNumber >> 8;
3284 CommandMailbox->SCSI_10.SCSI_CDB[5] = Command->BlockNumber;
3285 CommandMailbox->SCSI_10.SCSI_CDB[7] = Command->BlockCount >> 8;
3286 CommandMailbox->SCSI_10.SCSI_CDB[8] = Command->BlockCount;
3287
3288 if (Command->SegmentCount == 1)
3289 {
3290 CommandMailbox->SCSI_10.DataTransferMemoryAddress
3291 .ScatterGatherSegments[0]
3292 .SegmentDataPointer =
3293 (DAC960_BusAddress64_T)sg_dma_address(ScatterList);
3294 CommandMailbox->SCSI_10.DataTransferMemoryAddress
3295 .ScatterGatherSegments[0]
3296 .SegmentByteCount =
3297 CommandMailbox->SCSI_10.DataTransferSize;
3298 }
3299 else
3300 {
3301 DAC960_V2_ScatterGatherSegment_T *ScatterGatherList;
3302 int i;
3303
3304 if (Command->SegmentCount > 2)
3305 {
3306 ScatterGatherList = Command->V2.ScatterGatherList;
3307 CommandMailbox->SCSI_10.CommandControlBits
3308 .AdditionalScatterGatherListMemory = true;
3309 CommandMailbox->SCSI_10.DataTransferMemoryAddress
3310 .ExtendedScatterGather.ScatterGatherList0Length = Command->SegmentCount;
3311 CommandMailbox->SCSI_10.DataTransferMemoryAddress
3312 .ExtendedScatterGather.ScatterGatherList0Address =
3313 Command->V2.ScatterGatherListDMA;
3314 }
3315 else
3316 ScatterGatherList = CommandMailbox->SCSI_10.DataTransferMemoryAddress
3317 .ScatterGatherSegments;
3318
3319 for (i = 0; i < Command->SegmentCount; i++, ScatterList++, ScatterGatherList++) {
3320 ScatterGatherList->SegmentDataPointer =
3321 (DAC960_BusAddress64_T)sg_dma_address(ScatterList);
3322 ScatterGatherList->SegmentByteCount =
3323 (DAC960_ByteCount64_T)sg_dma_len(ScatterList);
3324 }
3325 }
3326 DAC960_QueueCommand(Command);
3327}
3328
3329
3330static int DAC960_process_queue(DAC960_Controller_T *Controller, struct request_queue *req_q)
3331{
3332 struct request *Request;
3333 DAC960_Command_T *Command;
3334
3335 while(1) {
9934c8c0 3336 Request = blk_peek_request(req_q);
1da177e4
LT		 3337 if (!Request)
3338 return 1;
3339
3340 Command = DAC960_AllocateCommand(Controller);
3341 if (Command == NULL)
3342 return 0;
3343
3344 if (rq_data_dir(Request) == READ) {
3345 Command->DmaDirection = PCI_DMA_FROMDEVICE;
3346 Command->CommandType = DAC960_ReadCommand;
3347 } else {
3348 Command->DmaDirection = PCI_DMA_TODEVICE;
3349 Command->CommandType = DAC960_WriteCommand;
3350 }
c00895ab 3351 Command->Completion = Request->end_io_data;
1da177e4 3352 Command->LogicalDriveNumber = (long)Request->rq_disk->private_data;
83096ebf
TH		 3353 Command->BlockNumber = blk_rq_pos(Request);
3354 Command->BlockCount = blk_rq_sectors(Request);
1da177e4 3355 Command->Request = Request;
9934c8c0 3356 blk_start_request(Request);
1da177e4
LT		 3357 Command->SegmentCount = blk_rq_map_sg(req_q,
3358 Command->Request, Command->cmd_sglist);
3359 /* pci_map_sg MAY change the value of SegCount */
3360 Command->SegmentCount = pci_map_sg(Controller->PCIDevice, Command->cmd_sglist,
3361 Command->SegmentCount, Command->DmaDirection);
3362
3363 DAC960_QueueReadWriteCommand(Command);
3364 }
3365}
3366
3367/*
3368 DAC960_ProcessRequest attempts to remove one I/O Request from Controller's
3369 I/O Request Queue and queues it to the Controller. WaitForCommand is true if
3370 this function should wait for a Command to become available if necessary.
3371 This function returns true if an I/O Request was queued and false otherwise.
3372*/
3373static void DAC960_ProcessRequest(DAC960_Controller_T *controller)
3374{
3375 int i;
3376
3377 if (!controller->ControllerInitialized)
3378 return;
3379
3380 /* Do this better later! */
3381 for (i = controller->req_q_index; i < DAC960_MaxLogicalDrives; i++) {
3382 struct request_queue *req_q = controller->RequestQueue[i];
3383
3384 if (req_q == NULL)
3385 continue;
3386
3387 if (!DAC960_process_queue(controller, req_q)) {
3388 controller->req_q_index = i;
3389 return;
3390 }
3391 }
3392
3393 if (controller->req_q_index == 0)
3394 return;
3395
3396 for (i = 0; i < controller->req_q_index; i++) {
3397 struct request_queue *req_q = controller->RequestQueue[i];
3398
3399 if (req_q == NULL)
3400 continue;
3401
3402 if (!DAC960_process_queue(controller, req_q)) {
3403 controller->req_q_index = i;
3404 return;
3405 }
3406 }
3407}
3408
3409
3410/*
3411 DAC960_queue_partial_rw extracts one bio from the request already
3412 associated with argument command, and construct a new command block to retry I/O
3413 only on that bio. Queue that command to the controller.
3414
3415 This function re-uses a previously-allocated Command,
3416 there is no failure mode from trying to allocate a command.
3417*/
3418
3419static void DAC960_queue_partial_rw(DAC960_Command_T *Command)
3420{
3421 DAC960_Controller_T *Controller = Command->Controller;
3422 struct request *Request = Command->Request;
3423 struct request_queue *req_q = Controller->RequestQueue[Command->LogicalDriveNumber];
3424
3425 if (Command->DmaDirection == PCI_DMA_FROMDEVICE)
3426 Command->CommandType = DAC960_ReadRetryCommand;
3427 else
3428 Command->CommandType = DAC960_WriteRetryCommand;
3429
3430 /*
3431 * We could be more efficient with these mapping requests
3432 * and map only the portions that we need. But since this
3433 * code should almost never be called, just go with a
3434 * simple coding.
3435 */
3436 (void)blk_rq_map_sg(req_q, Command->Request, Command->cmd_sglist);
3437
3438 (void)pci_map_sg(Controller->PCIDevice, Command->cmd_sglist, 1, Command->DmaDirection);
3439 /*
3440 * Resubmitting the request sector at a time is really tedious.
3441 * But, this should almost never happen. So, we're willing to pay
3442 * this price so that in the end, as much of the transfer is completed
3443 * successfully as possible.
3444 */
3445 Command->SegmentCount = 1;
83096ebf 3446 Command->BlockNumber = blk_rq_pos(Request);
1da177e4
LT		 3447 Command->BlockCount = 1;
3448 DAC960_QueueReadWriteCommand(Command);
3449 return;
3450}
3451
3452/*
3453 DAC960_RequestFunction is the I/O Request Function for DAC960 Controllers.
3454*/
3455
3456static void DAC960_RequestFunction(struct request_queue *RequestQueue)
3457{
3458 DAC960_ProcessRequest(RequestQueue->queuedata);
3459}
3460
3461/*
3462 DAC960_ProcessCompletedBuffer performs completion processing for an
3463 individual Buffer.
3464*/
3465
87d156bf
RK		 3466static inline bool DAC960_ProcessCompletedRequest(DAC960_Command_T *Command,
3467 bool SuccessfulIO)
1da177e4
LT		 3468{
3469 struct request *Request = Command->Request;
2a842aca 3470 blk_status_t Error = SuccessfulIO ? BLK_STS_OK : BLK_STS_IOERR;
1da177e4
LT		 3471
3472 pci_unmap_sg(Command->Controller->PCIDevice, Command->cmd_sglist,
3473 Command->SegmentCount, Command->DmaDirection);
3474
0156c254 3475 if (!__blk_end_request(Request, Error, Command->BlockCount << 9)) {
1da177e4
LT		 3476 if (Command->Completion) {
3477 complete(Command->Completion);
3478 Command->Completion = NULL;
3479 }
3480 return true;
3481 }
3482 return false;
3483}
3484
3485/*
3486 DAC960_V1_ReadWriteError prints an appropriate error message for Command
3487 when an error occurs on a Read or Write operation.
3488*/
3489
3490static void DAC960_V1_ReadWriteError(DAC960_Command_T *Command)
3491{
3492 DAC960_Controller_T *Controller = Command->Controller;
3493 unsigned char *CommandName = "UNKNOWN";
3494 switch (Command->CommandType)
3495 {
3496 case DAC960_ReadCommand:
3497 case DAC960_ReadRetryCommand:
3498 CommandName = "READ";
3499 break;
3500 case DAC960_WriteCommand:
3501 case DAC960_WriteRetryCommand:
3502 CommandName = "WRITE";
3503 break;
3504 case DAC960_MonitoringCommand:
3505 case DAC960_ImmediateCommand:
3506 case DAC960_QueuedCommand:
3507 break;
3508 }
3509 switch (Command->V1.CommandStatus)
3510 {
3511 case DAC960_V1_IrrecoverableDataError:
3512 DAC960_Error("Irrecoverable Data Error on %s:\n",
3513 Controller, CommandName);
3514 break;
3515 case DAC960_V1_LogicalDriveNonexistentOrOffline:
3516 DAC960_Error("Logical Drive Nonexistent or Offline on %s:\n",
3517 Controller, CommandName);
3518 break;
3519 case DAC960_V1_AccessBeyondEndOfLogicalDrive:
3520 DAC960_Error("Attempt to Access Beyond End of Logical Drive "
3521 "on %s:\n", Controller, CommandName);
3522 break;
3523 case DAC960_V1_BadDataEncountered:
3524 DAC960_Error("Bad Data Encountered on %s:\n", Controller, CommandName);
3525 break;
3526 default:
3527 DAC960_Error("Unexpected Error Status %04X on %s:\n",
3528 Controller, Command->V1.CommandStatus, CommandName);
3529 break;
3530 }
3531 DAC960_Error(" /dev/rd/c%dd%d: absolute blocks %u..%u\n",
3532 Controller, Controller->ControllerNumber,
3533 Command->LogicalDriveNumber, Command->BlockNumber,
3534 Command->BlockNumber + Command->BlockCount - 1);
3535}
3536
3537
3538/*
3539 DAC960_V1_ProcessCompletedCommand performs completion processing for Command
3540 for DAC960 V1 Firmware Controllers.
3541*/
3542
3543static void DAC960_V1_ProcessCompletedCommand(DAC960_Command_T *Command)
3544{
3545 DAC960_Controller_T *Controller = Command->Controller;
3546 DAC960_CommandType_T CommandType = Command->CommandType;
3547 DAC960_V1_CommandOpcode_T CommandOpcode =
3548 Command->V1.CommandMailbox.Common.CommandOpcode;
3549 DAC960_V1_CommandStatus_T CommandStatus = Command->V1.CommandStatus;
3550
3551 if (CommandType == DAC960_ReadCommand ||
3552 CommandType == DAC960_WriteCommand)
3553 {
3554
3555#ifdef FORCE_RETRY_DEBUG
3556 CommandStatus = DAC960_V1_IrrecoverableDataError;
3557#endif
3558
3559 if (CommandStatus == DAC960_V1_NormalCompletion) {
3560
3561 if (!DAC960_ProcessCompletedRequest(Command, true))
3562 BUG();
3563
3564 } else if (CommandStatus == DAC960_V1_IrrecoverableDataError ||
3565 CommandStatus == DAC960_V1_BadDataEncountered)
3566 {
3567 /*
3568 * break the command down into pieces and resubmit each
3569 * piece, hoping that some of them will succeed.
3570 */
3571 DAC960_queue_partial_rw(Command);
3572 return;
3573 }
3574 else
3575 {
3576 if (CommandStatus != DAC960_V1_LogicalDriveNonexistentOrOffline)
3577 DAC960_V1_ReadWriteError(Command);
3578
3579 if (!DAC960_ProcessCompletedRequest(Command, false))
3580 BUG();
3581 }
3582 }
3583 else if (CommandType == DAC960_ReadRetryCommand ||
3584 CommandType == DAC960_WriteRetryCommand)
3585 {
87d156bf 3586 bool normal_completion;
1da177e4
LT		 3587#ifdef FORCE_RETRY_FAILURE_DEBUG
3588 static int retry_count = 1;
3589#endif
3590 /*
3591 Perform completion processing for the portion that was
3592 retried, and submit the next portion, if any.
3593 */
3594 normal_completion = true;
3595 if (CommandStatus != DAC960_V1_NormalCompletion) {
3596 normal_completion = false;
3597 if (CommandStatus != DAC960_V1_LogicalDriveNonexistentOrOffline)
3598 DAC960_V1_ReadWriteError(Command);
3599 }
3600
3601#ifdef FORCE_RETRY_FAILURE_DEBUG
3602 if (!(++retry_count % 10000)) {
3603 printk("V1 error retry failure test\n");
3604 normal_completion = false;
3605 DAC960_V1_ReadWriteError(Command);
3606 }
3607#endif
3608
3609 if (!DAC960_ProcessCompletedRequest(Command, normal_completion)) {
3610 DAC960_queue_partial_rw(Command);
3611 return;
3612 }
3613 }
3614
3615 else if (CommandType == DAC960_MonitoringCommand)
3616 {
3617 if (Controller->ShutdownMonitoringTimer)
3618 return;
3619 if (CommandOpcode == DAC960_V1_Enquiry)
3620 {
3621 DAC960_V1_Enquiry_T *OldEnquiry = &Controller->V1.Enquiry;
3622 DAC960_V1_Enquiry_T *NewEnquiry = Controller->V1.NewEnquiry;
3623 unsigned int OldCriticalLogicalDriveCount =
3624 OldEnquiry->CriticalLogicalDriveCount;
3625 unsigned int NewCriticalLogicalDriveCount =
3626 NewEnquiry->CriticalLogicalDriveCount;
3627 if (NewEnquiry->NumberOfLogicalDrives > Controller->LogicalDriveCount)
3628 {
3629 int LogicalDriveNumber = Controller->LogicalDriveCount - 1;
3630 while (++LogicalDriveNumber < NewEnquiry->NumberOfLogicalDrives)
3631 DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) "
3632 "Now Exists\n", Controller,
3633 LogicalDriveNumber,
3634 Controller->ControllerNumber,
3635 LogicalDriveNumber);
3636 Controller->LogicalDriveCount = NewEnquiry->NumberOfLogicalDrives;
3637 DAC960_ComputeGenericDiskInfo(Controller);
3638 }
3639 if (NewEnquiry->NumberOfLogicalDrives < Controller->LogicalDriveCount)
3640 {
3641 int LogicalDriveNumber = NewEnquiry->NumberOfLogicalDrives - 1;
3642 while (++LogicalDriveNumber < Controller->LogicalDriveCount)
3643 DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) "
3644 "No Longer Exists\n", Controller,
3645 LogicalDriveNumber,
3646 Controller->ControllerNumber,
3647 LogicalDriveNumber);
3648 Controller->LogicalDriveCount = NewEnquiry->NumberOfLogicalDrives;
3649 DAC960_ComputeGenericDiskInfo(Controller);
3650 }
3651 if (NewEnquiry->StatusFlags.DeferredWriteError !=
3652 OldEnquiry->StatusFlags.DeferredWriteError)
3653 DAC960_Critical("Deferred Write Error Flag is now %s\n", Controller,
3654 (NewEnquiry->StatusFlags.DeferredWriteError
3655 ? "TRUE" : "FALSE"));
3656 if ((NewCriticalLogicalDriveCount > 0 ||
3657 NewCriticalLogicalDriveCount != OldCriticalLogicalDriveCount) ||
3658 (NewEnquiry->OfflineLogicalDriveCount > 0 ||
3659 NewEnquiry->OfflineLogicalDriveCount !=
3660 OldEnquiry->OfflineLogicalDriveCount) ||
3661 (NewEnquiry->DeadDriveCount > 0 ||
3662 NewEnquiry->DeadDriveCount !=
3663 OldEnquiry->DeadDriveCount) ||
3664 (NewEnquiry->EventLogSequenceNumber !=
3665 OldEnquiry->EventLogSequenceNumber) ||
3666 Controller->MonitoringTimerCount == 0 ||
50297cbf
MFP		 3667 time_after_eq(jiffies, Controller->SecondaryMonitoringTime
3668 + DAC960_SecondaryMonitoringInterval))
1da177e4
LT		 3669 {
3670 Controller->V1.NeedLogicalDriveInformation = true;
3671 Controller->V1.NewEventLogSequenceNumber =
3672 NewEnquiry->EventLogSequenceNumber;
3673 Controller->V1.NeedErrorTableInformation = true;
3674 Controller->V1.NeedDeviceStateInformation = true;
3675 Controller->V1.StartDeviceStateScan = true;
3676 Controller->V1.NeedBackgroundInitializationStatus =
3677 Controller->V1.BackgroundInitializationStatusSupported;
3678 Controller->SecondaryMonitoringTime = jiffies;
3679 }
3680 if (NewEnquiry->RebuildFlag == DAC960_V1_StandbyRebuildInProgress ||
3681 NewEnquiry->RebuildFlag
3682 == DAC960_V1_BackgroundRebuildInProgress ||
3683 OldEnquiry->RebuildFlag == DAC960_V1_StandbyRebuildInProgress ||
3684 OldEnquiry->RebuildFlag == DAC960_V1_BackgroundRebuildInProgress)
3685 {
3686 Controller->V1.NeedRebuildProgress = true;
3687 Controller->V1.RebuildProgressFirst =
3688 (NewEnquiry->CriticalLogicalDriveCount <
3689 OldEnquiry->CriticalLogicalDriveCount);
3690 }
3691 if (OldEnquiry->RebuildFlag == DAC960_V1_BackgroundCheckInProgress)
3692 switch (NewEnquiry->RebuildFlag)
3693 {
3694 case DAC960_V1_NoStandbyRebuildOrCheckInProgress:
3695 DAC960_Progress("Consistency Check Completed Successfully\n",
3696 Controller);
3697 break;
3698 case DAC960_V1_StandbyRebuildInProgress:
3699 case DAC960_V1_BackgroundRebuildInProgress:
3700 break;
3701 case DAC960_V1_BackgroundCheckInProgress:
3702 Controller->V1.NeedConsistencyCheckProgress = true;
3703 break;
3704 case DAC960_V1_StandbyRebuildCompletedWithError:
3705 DAC960_Progress("Consistency Check Completed with Error\n",
3706 Controller);
3707 break;
3708 case DAC960_V1_BackgroundRebuildOrCheckFailed_DriveFailed:
3709 DAC960_Progress("Consistency Check Failed - "
3710 "Physical Device Failed\n", Controller);
3711 break;
3712 case DAC960_V1_BackgroundRebuildOrCheckFailed_LogicalDriveFailed:
3713 DAC960_Progress("Consistency Check Failed - "
3714 "Logical Drive Failed\n", Controller);
3715 break;
3716 case DAC960_V1_BackgroundRebuildOrCheckFailed_OtherCauses:
3717 DAC960_Progress("Consistency Check Failed - Other Causes\n",
3718 Controller);
3719 break;
3720 case DAC960_V1_BackgroundRebuildOrCheckSuccessfullyTerminated:
3721 DAC960_Progress("Consistency Check Successfully Terminated\n",
3722 Controller);
3723 break;
3724 }
3725 else if (NewEnquiry->RebuildFlag
3726 == DAC960_V1_BackgroundCheckInProgress)
3727 Controller->V1.NeedConsistencyCheckProgress = true;
3728 Controller->MonitoringAlertMode =
3729 (NewEnquiry->CriticalLogicalDriveCount > 0 ||
3730 NewEnquiry->OfflineLogicalDriveCount > 0 ||
3731 NewEnquiry->DeadDriveCount > 0);
3732 if (NewEnquiry->RebuildFlag > DAC960_V1_BackgroundCheckInProgress)
3733 {
3734 Controller->V1.PendingRebuildFlag = NewEnquiry->RebuildFlag;
3735 Controller->V1.RebuildFlagPending = true;
3736 }
3737 memcpy(&Controller->V1.Enquiry, &Controller->V1.NewEnquiry,
3738 sizeof(DAC960_V1_Enquiry_T));
3739 }
3740 else if (CommandOpcode == DAC960_V1_PerformEventLogOperation)
3741 {
3742 static char
3743 *DAC960_EventMessages[] =
3744 { "killed because write recovery failed",
3745 "killed because of SCSI bus reset failure",
3746 "killed because of double check condition",
3747 "killed because it was removed",
3748 "killed because of gross error on SCSI chip",
3749 "killed because of bad tag returned from drive",
3750 "killed because of timeout on SCSI command",
3751 "killed because of reset SCSI command issued from system",
3752 "killed because busy or parity error count exceeded limit",
3753 "killed because of 'kill drive' command from system",
3754 "killed because of selection timeout",
3755 "killed due to SCSI phase sequence error",
3756 "killed due to unknown status" };
3757 DAC960_V1_EventLogEntry_T *EventLogEntry =
3758 Controller->V1.EventLogEntry;
3759 if (EventLogEntry->SequenceNumber ==
3760 Controller->V1.OldEventLogSequenceNumber)
3761 {
3762 unsigned char SenseKey = EventLogEntry->SenseKey;
3763 unsigned char AdditionalSenseCode =
3764 EventLogEntry->AdditionalSenseCode;
3765 unsigned char AdditionalSenseCodeQualifier =
3766 EventLogEntry->AdditionalSenseCodeQualifier;
3767 if (SenseKey == DAC960_SenseKey_VendorSpecific &&
3768 AdditionalSenseCode == 0x80 &&
3769 AdditionalSenseCodeQualifier <
945f390f 3770 ARRAY_SIZE(DAC960_EventMessages))
1da177e4
LT		 3771 DAC960_Critical("Physical Device %d:%d %s\n", Controller,
3772 EventLogEntry->Channel,
3773 EventLogEntry->TargetID,
3774 DAC960_EventMessages[
3775 AdditionalSenseCodeQualifier]);
3776 else if (SenseKey == DAC960_SenseKey_UnitAttention &&
3777 AdditionalSenseCode == 0x29)
3778 {
3779 if (Controller->MonitoringTimerCount > 0)
3780 Controller->V1.DeviceResetCount[EventLogEntry->Channel]
3781 [EventLogEntry->TargetID]++;
3782 }
3783 else if (!(SenseKey == DAC960_SenseKey_NoSense ||
3784 (SenseKey == DAC960_SenseKey_NotReady &&
3785 AdditionalSenseCode == 0x04 &&
3786 (AdditionalSenseCodeQualifier == 0x01 ||
3787 AdditionalSenseCodeQualifier == 0x02))))
3788 {
3789 DAC960_Critical("Physical Device %d:%d Error Log: "
3790 "Sense Key = %X, ASC = %02X, ASCQ = %02X\n",
3791 Controller,
3792 EventLogEntry->Channel,
3793 EventLogEntry->TargetID,
3794 SenseKey,
3795 AdditionalSenseCode,
3796 AdditionalSenseCodeQualifier);
3797 DAC960_Critical("Physical Device %d:%d Error Log: "
3798 "Information = %02X%02X%02X%02X "
3799 "%02X%02X%02X%02X\n",
3800 Controller,
3801 EventLogEntry->Channel,
3802 EventLogEntry->TargetID,
3803 EventLogEntry->Information[0],
3804 EventLogEntry->Information[1],
3805 EventLogEntry->Information[2],
3806 EventLogEntry->Information[3],
3807 EventLogEntry->CommandSpecificInformation[0],
3808 EventLogEntry->CommandSpecificInformation[1],
3809 EventLogEntry->CommandSpecificInformation[2],
3810 EventLogEntry->CommandSpecificInformation[3]);
3811 }
3812 }
3813 Controller->V1.OldEventLogSequenceNumber++;
3814 }
3815 else if (CommandOpcode == DAC960_V1_GetErrorTable)
3816 {
3817 DAC960_V1_ErrorTable_T *OldErrorTable = &Controller->V1.ErrorTable;
3818 DAC960_V1_ErrorTable_T *NewErrorTable = Controller->V1.NewErrorTable;
3819 int Channel, TargetID;
3820 for (Channel = 0; Channel < Controller->Channels; Channel++)
3821 for (TargetID = 0; TargetID < Controller->Targets; TargetID++)
3822 {
3823 DAC960_V1_ErrorTableEntry_T *NewErrorEntry =
3824 &NewErrorTable->ErrorTableEntries[Channel][TargetID];
3825 DAC960_V1_ErrorTableEntry_T *OldErrorEntry =
3826 &OldErrorTable->ErrorTableEntries[Channel][TargetID];
3827 if ((NewErrorEntry->ParityErrorCount !=
3828 OldErrorEntry->ParityErrorCount) ||
3829 (NewErrorEntry->SoftErrorCount !=
3830 OldErrorEntry->SoftErrorCount) ||
3831 (NewErrorEntry->HardErrorCount !=
3832 OldErrorEntry->HardErrorCount) ||
3833 (NewErrorEntry->MiscErrorCount !=
3834 OldErrorEntry->MiscErrorCount))
3835 DAC960_Critical("Physical Device %d:%d Errors: "
3836 "Parity = %d, Soft = %d, "
3837 "Hard = %d, Misc = %d\n",
3838 Controller, Channel, TargetID,
3839 NewErrorEntry->ParityErrorCount,
3840 NewErrorEntry->SoftErrorCount,
3841 NewErrorEntry->HardErrorCount,
3842 NewErrorEntry->MiscErrorCount);
3843 }
3844 memcpy(&Controller->V1.ErrorTable, Controller->V1.NewErrorTable,
3845 sizeof(DAC960_V1_ErrorTable_T));
3846 }
3847 else if (CommandOpcode == DAC960_V1_GetDeviceState)
3848 {
3849 DAC960_V1_DeviceState_T *OldDeviceState =
3850 &Controller->V1.DeviceState[Controller->V1.DeviceStateChannel]
3851 [Controller->V1.DeviceStateTargetID];
3852 DAC960_V1_DeviceState_T *NewDeviceState =
3853 Controller->V1.NewDeviceState;
3854 if (NewDeviceState->DeviceState != OldDeviceState->DeviceState)
3855 DAC960_Critical("Physical Device %d:%d is now %s\n", Controller,
3856 Controller->V1.DeviceStateChannel,
3857 Controller->V1.DeviceStateTargetID,
3858 (NewDeviceState->DeviceState
3859 == DAC960_V1_Device_Dead
3860 ? "DEAD"
3861 : NewDeviceState->DeviceState
3862 == DAC960_V1_Device_WriteOnly
3863 ? "WRITE-ONLY"
3864 : NewDeviceState->DeviceState
3865 == DAC960_V1_Device_Online
3866 ? "ONLINE" : "STANDBY"));
3867 if (OldDeviceState->DeviceState == DAC960_V1_Device_Dead &&
3868 NewDeviceState->DeviceState != DAC960_V1_Device_Dead)
3869 {
3870 Controller->V1.NeedDeviceInquiryInformation = true;
3871 Controller->V1.NeedDeviceSerialNumberInformation = true;
3872 Controller->V1.DeviceResetCount
3873 [Controller->V1.DeviceStateChannel]
3874 [Controller->V1.DeviceStateTargetID] = 0;
3875 }
3876 memcpy(OldDeviceState, NewDeviceState,
3877 sizeof(DAC960_V1_DeviceState_T));
3878 }
3879 else if (CommandOpcode == DAC960_V1_GetLogicalDriveInformation)
3880 {
3881 int LogicalDriveNumber;
3882 for (LogicalDriveNumber = 0;
3883 LogicalDriveNumber < Controller->LogicalDriveCount;
3884 LogicalDriveNumber++)
3885 {
3886 DAC960_V1_LogicalDriveInformation_T *OldLogicalDriveInformation =
3887 &Controller->V1.LogicalDriveInformation[LogicalDriveNumber];
3888 DAC960_V1_LogicalDriveInformation_T *NewLogicalDriveInformation =
3889 &(*Controller->V1.NewLogicalDriveInformation)[LogicalDriveNumber];
3890 if (NewLogicalDriveInformation->LogicalDriveState !=
3891 OldLogicalDriveInformation->LogicalDriveState)
3892 DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) "
3893 "is now %s\n", Controller,
3894 LogicalDriveNumber,
3895 Controller->ControllerNumber,
3896 LogicalDriveNumber,
3897 (NewLogicalDriveInformation->LogicalDriveState
3898 == DAC960_V1_LogicalDrive_Online
3899 ? "ONLINE"
3900 : NewLogicalDriveInformation->LogicalDriveState
3901 == DAC960_V1_LogicalDrive_Critical
3902 ? "CRITICAL" : "OFFLINE"));
3903 if (NewLogicalDriveInformation->WriteBack !=
3904 OldLogicalDriveInformation->WriteBack)
3905 DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) "
3906 "is now %s\n", Controller,
3907 LogicalDriveNumber,
3908 Controller->ControllerNumber,
3909 LogicalDriveNumber,
3910 (NewLogicalDriveInformation->WriteBack
3911 ? "WRITE BACK" : "WRITE THRU"));
3912 }
3913 memcpy(&Controller->V1.LogicalDriveInformation,
3914 Controller->V1.NewLogicalDriveInformation,
3915 sizeof(DAC960_V1_LogicalDriveInformationArray_T));
3916 }
3917 else if (CommandOpcode == DAC960_V1_GetRebuildProgress)
3918 {
3919 unsigned int LogicalDriveNumber =
3920 Controller->V1.RebuildProgress->LogicalDriveNumber;
3921 unsigned int LogicalDriveSize =
3922 Controller->V1.RebuildProgress->LogicalDriveSize;
3923 unsigned int BlocksCompleted =
3924 LogicalDriveSize - Controller->V1.RebuildProgress->RemainingBlocks;
3925 if (CommandStatus == DAC960_V1_NoRebuildOrCheckInProgress &&
3926 Controller->V1.LastRebuildStatus == DAC960_V1_NormalCompletion)
3927 CommandStatus = DAC960_V1_RebuildSuccessful;
3928 switch (CommandStatus)
3929 {
3930 case DAC960_V1_NormalCompletion:
3931 Controller->EphemeralProgressMessage = true;
3932 DAC960_Progress("Rebuild in Progress: "
3933 "Logical Drive %d (/dev/rd/c%dd%d) "
3934 "%d%% completed\n",
3935 Controller, LogicalDriveNumber,
3936 Controller->ControllerNumber,
3937 LogicalDriveNumber,
3938 (100 * (BlocksCompleted >> 7))
3939 / (LogicalDriveSize >> 7));
3940 Controller->EphemeralProgressMessage = false;
3941 break;
3942 case DAC960_V1_RebuildFailed_LogicalDriveFailure:
3943 DAC960_Progress("Rebuild Failed due to "
3944 "Logical Drive Failure\n", Controller);
3945 break;
3946 case DAC960_V1_RebuildFailed_BadBlocksOnOther:
3947 DAC960_Progress("Rebuild Failed due to "
3948 "Bad Blocks on Other Drives\n", Controller);
3949 break;
3950 case DAC960_V1_RebuildFailed_NewDriveFailed:
3951 DAC960_Progress("Rebuild Failed due to "
3952 "Failure of Drive Being Rebuilt\n", Controller);
3953 break;
3954 case DAC960_V1_NoRebuildOrCheckInProgress:
3955 break;
3956 case DAC960_V1_RebuildSuccessful:
3957 DAC960_Progress("Rebuild Completed Successfully\n", Controller);
3958 break;
3959 case DAC960_V1_RebuildSuccessfullyTerminated:
3960 DAC960_Progress("Rebuild Successfully Terminated\n", Controller);
3961 break;
3962 }
3963 Controller->V1.LastRebuildStatus = CommandStatus;
3964 if (CommandType != DAC960_MonitoringCommand &&
3965 Controller->V1.RebuildStatusPending)
3966 {
3967 Command->V1.CommandStatus = Controller->V1.PendingRebuildStatus;
3968 Controller->V1.RebuildStatusPending = false;
3969 }
3970 else if (CommandType == DAC960_MonitoringCommand &&
3971 CommandStatus != DAC960_V1_NormalCompletion &&
3972 CommandStatus != DAC960_V1_NoRebuildOrCheckInProgress)
3973 {
3974 Controller->V1.PendingRebuildStatus = CommandStatus;
3975 Controller->V1.RebuildStatusPending = true;
3976 }
3977 }
3978 else if (CommandOpcode == DAC960_V1_RebuildStat)
3979 {
3980 unsigned int LogicalDriveNumber =
3981 Controller->V1.RebuildProgress->LogicalDriveNumber;
3982 unsigned int LogicalDriveSize =
3983 Controller->V1.RebuildProgress->LogicalDriveSize;
3984 unsigned int BlocksCompleted =
3985 LogicalDriveSize - Controller->V1.RebuildProgress->RemainingBlocks;
3986 if (CommandStatus == DAC960_V1_NormalCompletion)
3987 {
3988 Controller->EphemeralProgressMessage = true;
3989 DAC960_Progress("Consistency Check in Progress: "
3990 "Logical Drive %d (/dev/rd/c%dd%d) "
3991 "%d%% completed\n",
3992 Controller, LogicalDriveNumber,
3993 Controller->ControllerNumber,
3994 LogicalDriveNumber,
3995 (100 * (BlocksCompleted >> 7))
3996 / (LogicalDriveSize >> 7));
3997 Controller->EphemeralProgressMessage = false;
3998 }
3999 }
4000 else if (CommandOpcode == DAC960_V1_BackgroundInitializationControl)
4001 {
4002 unsigned int LogicalDriveNumber =
4003 Controller->V1.BackgroundInitializationStatus->LogicalDriveNumber;
4004 unsigned int LogicalDriveSize =
4005 Controller->V1.BackgroundInitializationStatus->LogicalDriveSize;
4006 unsigned int BlocksCompleted =
4007 Controller->V1.BackgroundInitializationStatus->BlocksCompleted;
4008 switch (CommandStatus)
4009 {
4010 case DAC960_V1_NormalCompletion:
4011 switch (Controller->V1.BackgroundInitializationStatus->Status)
4012 {
4013 case DAC960_V1_BackgroundInitializationInvalid:
4014 break;
4015 case DAC960_V1_BackgroundInitializationStarted:
4016 DAC960_Progress("Background Initialization Started\n",
4017 Controller);
4018 break;
4019 case DAC960_V1_BackgroundInitializationInProgress:
4020 if (BlocksCompleted ==
4021 Controller->V1.LastBackgroundInitializationStatus.
4022 BlocksCompleted &&
4023 LogicalDriveNumber ==
4024 Controller->V1.LastBackgroundInitializationStatus.
4025 LogicalDriveNumber)
4026 break;
4027 Controller->EphemeralProgressMessage = true;
4028 DAC960_Progress("Background Initialization in Progress: "
4029 "Logical Drive %d (/dev/rd/c%dd%d) "
4030 "%d%% completed\n",
4031 Controller, LogicalDriveNumber,
4032 Controller->ControllerNumber,
4033 LogicalDriveNumber,
4034 (100 * (BlocksCompleted >> 7))
4035 / (LogicalDriveSize >> 7));
4036 Controller->EphemeralProgressMessage = false;
4037 break;
4038 case DAC960_V1_BackgroundInitializationSuspended:
4039 DAC960_Progress("Background Initialization Suspended\n",
4040 Controller);
4041 break;
4042 case DAC960_V1_BackgroundInitializationCancelled:
4043 DAC960_Progress("Background Initialization Cancelled\n",
4044 Controller);
4045 break;
4046 }
4047 memcpy(&Controller->V1.LastBackgroundInitializationStatus,
4048 Controller->V1.BackgroundInitializationStatus,
4049 sizeof(DAC960_V1_BackgroundInitializationStatus_T));
4050 break;
4051 case DAC960_V1_BackgroundInitSuccessful:
4052 if (Controller->V1.BackgroundInitializationStatus->Status ==
4053 DAC960_V1_BackgroundInitializationInProgress)
4054 DAC960_Progress("Background Initialization "
4055 "Completed Successfully\n", Controller);
4056 Controller->V1.BackgroundInitializationStatus->Status =
4057 DAC960_V1_BackgroundInitializationInvalid;
4058 break;
4059 case DAC960_V1_BackgroundInitAborted:
4060 if (Controller->V1.BackgroundInitializationStatus->Status ==
4061 DAC960_V1_BackgroundInitializationInProgress)
4062 DAC960_Progress("Background Initialization Aborted\n",
4063 Controller);
4064 Controller->V1.BackgroundInitializationStatus->Status =
4065 DAC960_V1_BackgroundInitializationInvalid;
4066 break;
4067 case DAC960_V1_NoBackgroundInitInProgress:
4068 break;
4069 }
4070 }
4071 else if (CommandOpcode == DAC960_V1_DCDB)
4072 {
4073 /*
4074 This is a bit ugly.
4075
4076 The InquiryStandardData and
4077 the InquiryUntitSerialNumber information
4078 retrieval operations BOTH use the DAC960_V1_DCDB
4079 commands. the test above can't distinguish between
4080 these two cases.
4081
4082 Instead, we rely on the order of code later in this
4083 function to ensure that DeviceInquiryInformation commands
4084 are submitted before DeviceSerialNumber commands.
4085 */
4086 if (Controller->V1.NeedDeviceInquiryInformation)
4087 {
4088 DAC960_SCSI_Inquiry_T *InquiryStandardData =
4089 &Controller->V1.InquiryStandardData
4090 [Controller->V1.DeviceStateChannel]
4091 [Controller->V1.DeviceStateTargetID];
4092 if (CommandStatus != DAC960_V1_NormalCompletion)
4093 {
4094 memset(InquiryStandardData, 0,
4095 sizeof(DAC960_SCSI_Inquiry_T));
4096 InquiryStandardData->PeripheralDeviceType = 0x1F;
4097 }
4098 else
4099 memcpy(InquiryStandardData,
4100 Controller->V1.NewInquiryStandardData,
4101 sizeof(DAC960_SCSI_Inquiry_T));
4102 Controller->V1.NeedDeviceInquiryInformation = false;
4103 }
4104 else if (Controller->V1.NeedDeviceSerialNumberInformation)
4105 {
4106 DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber =
4107 &Controller->V1.InquiryUnitSerialNumber
4108 [Controller->V1.DeviceStateChannel]
4109 [Controller->V1.DeviceStateTargetID];
4110 if (CommandStatus != DAC960_V1_NormalCompletion)
4111 {
4112 memset(InquiryUnitSerialNumber, 0,
4113 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T));
4114 InquiryUnitSerialNumber->PeripheralDeviceType = 0x1F;
4115 }
4116 else
4117 memcpy(InquiryUnitSerialNumber,
4118 Controller->V1.NewInquiryUnitSerialNumber,
4119 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T));
4120 Controller->V1.NeedDeviceSerialNumberInformation = false;
4121 }
4122 }
4123 /*
4124 Begin submitting new monitoring commands.
4125 */
4126 if (Controller->V1.NewEventLogSequenceNumber
4127 - Controller->V1.OldEventLogSequenceNumber > 0)
4128 {
4129 Command->V1.CommandMailbox.Type3E.CommandOpcode =
4130 DAC960_V1_PerformEventLogOperation;
4131 Command->V1.CommandMailbox.Type3E.OperationType =
4132 DAC960_V1_GetEventLogEntry;
4133 Command->V1.CommandMailbox.Type3E.OperationQualifier = 1;
4134 Command->V1.CommandMailbox.Type3E.SequenceNumber =
4135 Controller->V1.OldEventLogSequenceNumber;
4136 Command->V1.CommandMailbox.Type3E.BusAddress =
4137 Controller->V1.EventLogEntryDMA;
4138 DAC960_QueueCommand(Command);
4139 return;
4140 }
4141 if (Controller->V1.NeedErrorTableInformation)
4142 {
4143 Controller->V1.NeedErrorTableInformation = false;
4144 Command->V1.CommandMailbox.Type3.CommandOpcode =
4145 DAC960_V1_GetErrorTable;
4146 Command->V1.CommandMailbox.Type3.BusAddress =
4147 Controller->V1.NewErrorTableDMA;
4148 DAC960_QueueCommand(Command);
4149 return;
4150 }
4151 if (Controller->V1.NeedRebuildProgress &&
4152 Controller->V1.RebuildProgressFirst)
4153 {
4154 Controller->V1.NeedRebuildProgress = false;
4155 Command->V1.CommandMailbox.Type3.CommandOpcode =
4156 DAC960_V1_GetRebuildProgress;
4157 Command->V1.CommandMailbox.Type3.BusAddress =
4158 Controller->V1.RebuildProgressDMA;
4159 DAC960_QueueCommand(Command);
4160 return;
4161 }
4162 if (Controller->V1.NeedDeviceStateInformation)
4163 {
4164 if (Controller->V1.NeedDeviceInquiryInformation)
4165 {
4166 DAC960_V1_DCDB_T *DCDB = Controller->V1.MonitoringDCDB;
4167 dma_addr_t DCDB_DMA = Controller->V1.MonitoringDCDB_DMA;
4168
4169 dma_addr_t NewInquiryStandardDataDMA =
4170 Controller->V1.NewInquiryStandardDataDMA;
4171
4172 Command->V1.CommandMailbox.Type3.CommandOpcode = DAC960_V1_DCDB;
4173 Command->V1.CommandMailbox.Type3.BusAddress = DCDB_DMA;
4174 DCDB->Channel = Controller->V1.DeviceStateChannel;
4175 DCDB->TargetID = Controller->V1.DeviceStateTargetID;
4176 DCDB->Direction = DAC960_V1_DCDB_DataTransferDeviceToSystem;
4177 DCDB->EarlyStatus = false;
4178 DCDB->Timeout = DAC960_V1_DCDB_Timeout_10_seconds;
4179 DCDB->NoAutomaticRequestSense = false;
4180 DCDB->DisconnectPermitted = true;
4181 DCDB->TransferLength = sizeof(DAC960_SCSI_Inquiry_T);
4182 DCDB->BusAddress = NewInquiryStandardDataDMA;
4183 DCDB->CDBLength = 6;
4184 DCDB->TransferLengthHigh4 = 0;
4185 DCDB->SenseLength = sizeof(DCDB->SenseData);
4186 DCDB->CDB[0] = 0x12; /* INQUIRY */
4187 DCDB->CDB[1] = 0; /* EVPD = 0 */
4188 DCDB->CDB[2] = 0; /* Page Code */
4189 DCDB->CDB[3] = 0; /* Reserved */
4190 DCDB->CDB[4] = sizeof(DAC960_SCSI_Inquiry_T);
4191 DCDB->CDB[5] = 0; /* Control */
4192 DAC960_QueueCommand(Command);
4193 return;
4194 }
4195 if (Controller->V1.NeedDeviceSerialNumberInformation)
4196 {
4197 DAC960_V1_DCDB_T *DCDB = Controller->V1.MonitoringDCDB;
4198 dma_addr_t DCDB_DMA = Controller->V1.MonitoringDCDB_DMA;
4199 dma_addr_t NewInquiryUnitSerialNumberDMA =
4200 Controller->V1.NewInquiryUnitSerialNumberDMA;
4201
4202 Command->V1.CommandMailbox.Type3.CommandOpcode = DAC960_V1_DCDB;
4203 Command->V1.CommandMailbox.Type3.BusAddress = DCDB_DMA;
4204 DCDB->Channel = Controller->V1.DeviceStateChannel;
4205 DCDB->TargetID = Controller->V1.DeviceStateTargetID;
4206 DCDB->Direction = DAC960_V1_DCDB_DataTransferDeviceToSystem;
4207 DCDB->EarlyStatus = false;
4208 DCDB->Timeout = DAC960_V1_DCDB_Timeout_10_seconds;
4209 DCDB->NoAutomaticRequestSense = false;
4210 DCDB->DisconnectPermitted = true;
4211 DCDB->TransferLength =
4212 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T);
4213 DCDB->BusAddress = NewInquiryUnitSerialNumberDMA;
4214 DCDB->CDBLength = 6;
4215 DCDB->TransferLengthHigh4 = 0;
4216 DCDB->SenseLength = sizeof(DCDB->SenseData);
4217 DCDB->CDB[0] = 0x12; /* INQUIRY */
4218 DCDB->CDB[1] = 1; /* EVPD = 1 */
4219 DCDB->CDB[2] = 0x80; /* Page Code */
4220 DCDB->CDB[3] = 0; /* Reserved */
4221 DCDB->CDB[4] = sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T);
4222 DCDB->CDB[5] = 0; /* Control */
4223 DAC960_QueueCommand(Command);
4224 return;
4225 }
4226 if (Controller->V1.StartDeviceStateScan)
4227 {
4228 Controller->V1.DeviceStateChannel = 0;
4229 Controller->V1.DeviceStateTargetID = 0;
4230 Controller->V1.StartDeviceStateScan = false;
4231 }
4232 else if (++Controller->V1.DeviceStateTargetID == Controller->Targets)
4233 {
4234 Controller->V1.DeviceStateChannel++;
4235 Controller->V1.DeviceStateTargetID = 0;
4236 }
4237 if (Controller->V1.DeviceStateChannel < Controller->Channels)
4238 {
4239 Controller->V1.NewDeviceState->DeviceState =
4240 DAC960_V1_Device_Dead;
4241 Command->V1.CommandMailbox.Type3D.CommandOpcode =
4242 DAC960_V1_GetDeviceState;
4243 Command->V1.CommandMailbox.Type3D.Channel =
4244 Controller->V1.DeviceStateChannel;
4245 Command->V1.CommandMailbox.Type3D.TargetID =
4246 Controller->V1.DeviceStateTargetID;
4247 Command->V1.CommandMailbox.Type3D.BusAddress =
4248 Controller->V1.NewDeviceStateDMA;
4249 DAC960_QueueCommand(Command);
4250 return;
4251 }
4252 Controller->V1.NeedDeviceStateInformation = false;
4253 }
4254 if (Controller->V1.NeedLogicalDriveInformation)
4255 {
4256 Controller->V1.NeedLogicalDriveInformation = false;
4257 Command->V1.CommandMailbox.Type3.CommandOpcode =
4258 DAC960_V1_GetLogicalDriveInformation;
4259 Command->V1.CommandMailbox.Type3.BusAddress =
4260 Controller->V1.NewLogicalDriveInformationDMA;
4261 DAC960_QueueCommand(Command);
4262 return;
4263 }
4264 if (Controller->V1.NeedRebuildProgress)
4265 {
4266 Controller->V1.NeedRebuildProgress = false;
4267 Command->V1.CommandMailbox.Type3.CommandOpcode =
4268 DAC960_V1_GetRebuildProgress;
4269 Command->V1.CommandMailbox.Type3.BusAddress =
4270 Controller->V1.RebuildProgressDMA;
4271 DAC960_QueueCommand(Command);
4272 return;
4273 }
4274 if (Controller->V1.NeedConsistencyCheckProgress)
4275 {
4276 Controller->V1.NeedConsistencyCheckProgress = false;
4277 Command->V1.CommandMailbox.Type3.CommandOpcode =
4278 DAC960_V1_RebuildStat;
4279 Command->V1.CommandMailbox.Type3.BusAddress =
4280 Controller->V1.RebuildProgressDMA;
4281 DAC960_QueueCommand(Command);
4282 return;
4283 }
4284 if (Controller->V1.NeedBackgroundInitializationStatus)
4285 {
4286 Controller->V1.NeedBackgroundInitializationStatus = false;
4287 Command->V1.CommandMailbox.Type3B.CommandOpcode =
4288 DAC960_V1_BackgroundInitializationControl;
4289 Command->V1.CommandMailbox.Type3B.CommandOpcode2 = 0x20;
4290 Command->V1.CommandMailbox.Type3B.BusAddress =
4291 Controller->V1.BackgroundInitializationStatusDMA;
4292 DAC960_QueueCommand(Command);
4293 return;
4294 }
4295 Controller->MonitoringTimerCount++;
4296 Controller->MonitoringTimer.expires =
4297 jiffies + DAC960_MonitoringTimerInterval;
4298 add_timer(&Controller->MonitoringTimer);
4299 }
4300 if (CommandType == DAC960_ImmediateCommand)
4301 {
4302 complete(Command->Completion);
4303 Command->Completion = NULL;
4304 return;
4305 }
4306 if (CommandType == DAC960_QueuedCommand)
4307 {
4308 DAC960_V1_KernelCommand_T *KernelCommand = Command->V1.KernelCommand;
4309 KernelCommand->CommandStatus = Command->V1.CommandStatus;
4310 Command->V1.KernelCommand = NULL;
4311 if (CommandOpcode == DAC960_V1_DCDB)
4312 Controller->V1.DirectCommandActive[KernelCommand->DCDB->Channel]
4313 [KernelCommand->DCDB->TargetID] =
4314 false;
4315 DAC960_DeallocateCommand(Command);
4316 KernelCommand->CompletionFunction(KernelCommand);
4317 return;
4318 }
4319 /*
4320 Queue a Status Monitoring Command to the Controller using the just
4321 completed Command if one was deferred previously due to lack of a
4322 free Command when the Monitoring Timer Function was called.
4323 */
4324 if (Controller->MonitoringCommandDeferred)
4325 {
4326 Controller->MonitoringCommandDeferred = false;
4327 DAC960_V1_QueueMonitoringCommand(Command);
4328 return;
4329 }
4330 /*
4331 Deallocate the Command.
4332 */
4333 DAC960_DeallocateCommand(Command);
4334 /*
4335 Wake up any processes waiting on a free Command.
4336 */
4337 wake_up(&Controller->CommandWaitQueue);
4338}
4339
4340
4341/*
4342 DAC960_V2_ReadWriteError prints an appropriate error message for Command
4343 when an error occurs on a Read or Write operation.
4344*/
4345
4346static void DAC960_V2_ReadWriteError(DAC960_Command_T *Command)
4347{
4348 DAC960_Controller_T *Controller = Command->Controller;
4349 unsigned char *SenseErrors[] = { "NO SENSE", "RECOVERED ERROR",
4350 "NOT READY", "MEDIUM ERROR",
4351 "HARDWARE ERROR", "ILLEGAL REQUEST",
4352 "UNIT ATTENTION", "DATA PROTECT",
4353 "BLANK CHECK", "VENDOR-SPECIFIC",
4354 "COPY ABORTED", "ABORTED COMMAND",
4355 "EQUAL", "VOLUME OVERFLOW",
4356 "MISCOMPARE", "RESERVED" };
4357 unsigned char *CommandName = "UNKNOWN";
4358 switch (Command->CommandType)
4359 {
4360 case DAC960_ReadCommand:
4361 case DAC960_ReadRetryCommand:
4362 CommandName = "READ";
4363 break;
4364 case DAC960_WriteCommand:
4365 case DAC960_WriteRetryCommand:
4366 CommandName = "WRITE";
4367 break;
4368 case DAC960_MonitoringCommand:
4369 case DAC960_ImmediateCommand:
4370 case DAC960_QueuedCommand:
4371 break;
4372 }
4373 DAC960_Error("Error Condition %s on %s:\n", Controller,
4374 SenseErrors[Command->V2.RequestSense->SenseKey], CommandName);
4375 DAC960_Error(" /dev/rd/c%dd%d: absolute blocks %u..%u\n",
4376 Controller, Controller->ControllerNumber,
4377 Command->LogicalDriveNumber, Command->BlockNumber,
4378 Command->BlockNumber + Command->BlockCount - 1);
4379}
4380
4381
4382/*
4383 DAC960_V2_ReportEvent prints an appropriate message when a Controller Event
4384 occurs.
4385*/
4386
4387static void DAC960_V2_ReportEvent(DAC960_Controller_T *Controller,
4388 DAC960_V2_Event_T *Event)
4389{
4390 DAC960_SCSI_RequestSense_T *RequestSense =
4391 (DAC960_SCSI_RequestSense_T *) &Event->RequestSenseData;
4392 unsigned char MessageBuffer[DAC960_LineBufferSize];
4393 static struct { int EventCode; unsigned char *EventMessage; } EventList[] =
4394 { /* Physical Device Events (0x0000 - 0x007F) */
4395 { 0x0001, "P Online" },
4396 { 0x0002, "P Standby" },
4397 { 0x0005, "P Automatic Rebuild Started" },
4398 { 0x0006, "P Manual Rebuild Started" },
4399 { 0x0007, "P Rebuild Completed" },
4400 { 0x0008, "P Rebuild Cancelled" },
4401 { 0x0009, "P Rebuild Failed for Unknown Reasons" },
4402 { 0x000A, "P Rebuild Failed due to New Physical Device" },
4403 { 0x000B, "P Rebuild Failed due to Logical Drive Failure" },
4404 { 0x000C, "S Offline" },
4405 { 0x000D, "P Found" },
4406 { 0x000E, "P Removed" },
4407 { 0x000F, "P Unconfigured" },
4408 { 0x0010, "P Expand Capacity Started" },
4409 { 0x0011, "P Expand Capacity Completed" },
4410 { 0x0012, "P Expand Capacity Failed" },
4411 { 0x0013, "P Command Timed Out" },
4412 { 0x0014, "P Command Aborted" },
4413 { 0x0015, "P Command Retried" },
4414 { 0x0016, "P Parity Error" },
4415 { 0x0017, "P Soft Error" },
4416 { 0x0018, "P Miscellaneous Error" },
4417 { 0x0019, "P Reset" },
4418 { 0x001A, "P Active Spare Found" },
4419 { 0x001B, "P Warm Spare Found" },
4420 { 0x001C, "S Sense Data Received" },
4421 { 0x001D, "P Initialization Started" },
4422 { 0x001E, "P Initialization Completed" },
4423 { 0x001F, "P Initialization Failed" },
4424 { 0x0020, "P Initialization Cancelled" },
4425 { 0x0021, "P Failed because Write Recovery Failed" },
4426 { 0x0022, "P Failed because SCSI Bus Reset Failed" },
4427 { 0x0023, "P Failed because of Double Check Condition" },
4428 { 0x0024, "P Failed because Device Cannot Be Accessed" },
4429 { 0x0025, "P Failed because of Gross Error on SCSI Processor" },
4430 { 0x0026, "P Failed because of Bad Tag from Device" },
4431 { 0x0027, "P Failed because of Command Timeout" },
4432 { 0x0028, "P Failed because of System Reset" },
4433 { 0x0029, "P Failed because of Busy Status or Parity Error" },
4434 { 0x002A, "P Failed because Host Set Device to Failed State" },
4435 { 0x002B, "P Failed because of Selection Timeout" },
4436 { 0x002C, "P Failed because of SCSI Bus Phase Error" },
4437 { 0x002D, "P Failed because Device Returned Unknown Status" },
4438 { 0x002E, "P Failed because Device Not Ready" },
4439 { 0x002F, "P Failed because Device Not Found at Startup" },
4440 { 0x0030, "P Failed because COD Write Operation Failed" },
4441 { 0x0031, "P Failed because BDT Write Operation Failed" },
4442 { 0x0039, "P Missing at Startup" },
4443 { 0x003A, "P Start Rebuild Failed due to Physical Drive Too Small" },
4444 { 0x003C, "P Temporarily Offline Device Automatically Made Online" },
4445 { 0x003D, "P Standby Rebuild Started" },
4446 /* Logical Device Events (0x0080 - 0x00FF) */
4447 { 0x0080, "M Consistency Check Started" },
4448 { 0x0081, "M Consistency Check Completed" },
4449 { 0x0082, "M Consistency Check Cancelled" },
4450 { 0x0083, "M Consistency Check Completed With Errors" },
4451 { 0x0084, "M Consistency Check Failed due to Logical Drive Failure" },
4452 { 0x0085, "M Consistency Check Failed due to Physical Device Failure" },
4453 { 0x0086, "L Offline" },
4454 { 0x0087, "L Critical" },
4455 { 0x0088, "L Online" },
4456 { 0x0089, "M Automatic Rebuild Started" },
4457 { 0x008A, "M Manual Rebuild Started" },
4458 { 0x008B, "M Rebuild Completed" },
4459 { 0x008C, "M Rebuild Cancelled" },
4460 { 0x008D, "M Rebuild Failed for Unknown Reasons" },
4461 { 0x008E, "M Rebuild Failed due to New Physical Device" },
4462 { 0x008F, "M Rebuild Failed due to Logical Drive Failure" },
4463 { 0x0090, "M Initialization Started" },
4464 { 0x0091, "M Initialization Completed" },
4465 { 0x0092, "M Initialization Cancelled" },
4466 { 0x0093, "M Initialization Failed" },
4467 { 0x0094, "L Found" },
4468 { 0x0095, "L Deleted" },
4469 { 0x0096, "M Expand Capacity Started" },
4470 { 0x0097, "M Expand Capacity Completed" },
4471 { 0x0098, "M Expand Capacity Failed" },
4472 { 0x0099, "L Bad Block Found" },
4473 { 0x009A, "L Size Changed" },
4474 { 0x009B, "L Type Changed" },
4475 { 0x009C, "L Bad Data Block Found" },
4476 { 0x009E, "L Read of Data Block in BDT" },
4477 { 0x009F, "L Write Back Data for Disk Block Lost" },
4478 { 0x00A0, "L Temporarily Offline RAID-5/3 Drive Made Online" },
4479 { 0x00A1, "L Temporarily Offline RAID-6/1/0/7 Drive Made Online" },
4480 { 0x00A2, "L Standby Rebuild Started" },
4481 /* Fault Management Events (0x0100 - 0x017F) */
4482 { 0x0140, "E Fan %d Failed" },
4483 { 0x0141, "E Fan %d OK" },
4484 { 0x0142, "E Fan %d Not Present" },
4485 { 0x0143, "E Power Supply %d Failed" },
4486 { 0x0144, "E Power Supply %d OK" },
4487 { 0x0145, "E Power Supply %d Not Present" },
4488 { 0x0146, "E Temperature Sensor %d Temperature Exceeds Safe Limit" },
4489 { 0x0147, "E Temperature Sensor %d Temperature Exceeds Working Limit" },
4490 { 0x0148, "E Temperature Sensor %d Temperature Normal" },
4491 { 0x0149, "E Temperature Sensor %d Not Present" },
4492 { 0x014A, "E Enclosure Management Unit %d Access Critical" },
4493 { 0x014B, "E Enclosure Management Unit %d Access OK" },
4494 { 0x014C, "E Enclosure Management Unit %d Access Offline" },
4495 /* Controller Events (0x0180 - 0x01FF) */
4496 { 0x0181, "C Cache Write Back Error" },
4497 { 0x0188, "C Battery Backup Unit Found" },
4498 { 0x0189, "C Battery Backup Unit Charge Level Low" },
4499 { 0x018A, "C Battery Backup Unit Charge Level OK" },
4500 { 0x0193, "C Installation Aborted" },
4501 { 0x0195, "C Battery Backup Unit Physically Removed" },
4502 { 0x0196, "C Memory Error During Warm Boot" },
4503 { 0x019E, "C Memory Soft ECC Error Corrected" },
4504 { 0x019F, "C Memory Hard ECC Error Corrected" },
4505 { 0x01A2, "C Battery Backup Unit Failed" },
4506 { 0x01AB, "C Mirror Race Recovery Failed" },
4507 { 0x01AC, "C Mirror Race on Critical Drive" },
4508 /* Controller Internal Processor Events */
4509 { 0x0380, "C Internal Controller Hung" },
4510 { 0x0381, "C Internal Controller Firmware Breakpoint" },
4511 { 0x0390, "C Internal Controller i960 Processor Specific Error" },
4512 { 0x03A0, "C Internal Controller StrongARM Processor Specific Error" },
4513 { 0, "" } };
4514 int EventListIndex = 0, EventCode;
4515 unsigned char EventType, *EventMessage;
4516 if (Event->EventCode == 0x1C &&
4517 RequestSense->SenseKey == DAC960_SenseKey_VendorSpecific &&
4518 (RequestSense->AdditionalSenseCode == 0x80 ||
4519 RequestSense->AdditionalSenseCode == 0x81))
4520 Event->EventCode = ((RequestSense->AdditionalSenseCode - 0x80) << 8) |
4521 RequestSense->AdditionalSenseCodeQualifier;
4522 while (true)
4523 {
4524 EventCode = EventList[EventListIndex].EventCode;
4525 if (EventCode == Event->EventCode || EventCode == 0) break;
4526 EventListIndex++;
4527 }
4528 EventType = EventList[EventListIndex].EventMessage[0];
4529 EventMessage = &EventList[EventListIndex].EventMessage[2];
4530 if (EventCode == 0)
4531 {
4532 DAC960_Critical("Unknown Controller Event Code %04X\n",
4533 Controller, Event->EventCode);
4534 return;
4535 }
4536 switch (EventType)
4537 {
4538 case 'P':
4539 DAC960_Critical("Physical Device %d:%d %s\n", Controller,
4540 Event->Channel, Event->TargetID, EventMessage);
4541 break;
4542 case 'L':
4543 DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) %s\n", Controller,
4544 Event->LogicalUnit, Controller->ControllerNumber,
4545 Event->LogicalUnit, EventMessage);
4546 break;
4547 case 'M':
4548 DAC960_Progress("Logical Drive %d (/dev/rd/c%dd%d) %s\n", Controller,
4549 Event->LogicalUnit, Controller->ControllerNumber,
4550 Event->LogicalUnit, EventMessage);
4551 break;
4552 case 'S':
4553 if (RequestSense->SenseKey == DAC960_SenseKey_NoSense ||
4554 (RequestSense->SenseKey == DAC960_SenseKey_NotReady &&
4555 RequestSense->AdditionalSenseCode == 0x04 &&
4556 (RequestSense->AdditionalSenseCodeQualifier == 0x01 ||
4557 RequestSense->AdditionalSenseCodeQualifier == 0x02)))
4558 break;
4559 DAC960_Critical("Physical Device %d:%d %s\n", Controller,
4560 Event->Channel, Event->TargetID, EventMessage);
4561 DAC960_Critical("Physical Device %d:%d Request Sense: "
4562 "Sense Key = %X, ASC = %02X, ASCQ = %02X\n",
4563 Controller,
4564 Event->Channel,
4565 Event->TargetID,
4566 RequestSense->SenseKey,
4567 RequestSense->AdditionalSenseCode,
4568 RequestSense->AdditionalSenseCodeQualifier);
4569 DAC960_Critical("Physical Device %d:%d Request Sense: "
4570 "Information = %02X%02X%02X%02X "
4571 "%02X%02X%02X%02X\n",
4572 Controller,
4573 Event->Channel,
4574 Event->TargetID,
4575 RequestSense->Information[0],
4576 RequestSense->Information[1],
4577 RequestSense->Information[2],
4578 RequestSense->Information[3],
4579 RequestSense->CommandSpecificInformation[0],
4580 RequestSense->CommandSpecificInformation[1],
4581 RequestSense->CommandSpecificInformation[2],
4582 RequestSense->CommandSpecificInformation[3]);
4583 break;
4584 case 'E':
4585 if (Controller->SuppressEnclosureMessages) break;
4586 sprintf(MessageBuffer, EventMessage, Event->LogicalUnit);
4587 DAC960_Critical("Enclosure %d %s\n", Controller,
4588 Event->TargetID, MessageBuffer);
4589 break;
4590 case 'C':
4591 DAC960_Critical("Controller %s\n", Controller, EventMessage);
4592 break;
4593 default:
4594 DAC960_Critical("Unknown Controller Event Code %04X\n",
4595 Controller, Event->EventCode);
4596 break;
4597 }
4598}
4599
4600
4601/*
4602 DAC960_V2_ReportProgress prints an appropriate progress message for
4603 Logical Device Long Operations.
4604*/
4605
4606static void DAC960_V2_ReportProgress(DAC960_Controller_T *Controller,
4607 unsigned char *MessageString,
4608 unsigned int LogicalDeviceNumber,
4609 unsigned long BlocksCompleted,
4610 unsigned long LogicalDeviceSize)
4611{
4612 Controller->EphemeralProgressMessage = true;
4613 DAC960_Progress("%s in Progress: Logical Drive %d (/dev/rd/c%dd%d) "
4614 "%d%% completed\n", Controller,
4615 MessageString,
4616 LogicalDeviceNumber,
4617 Controller->ControllerNumber,
4618 LogicalDeviceNumber,
4619 (100 * (BlocksCompleted >> 7)) / (LogicalDeviceSize >> 7));
4620 Controller->EphemeralProgressMessage = false;
4621}
4622
4623
4624/*
4625 DAC960_V2_ProcessCompletedCommand performs completion processing for Command
4626 for DAC960 V2 Firmware Controllers.
4627*/
4628
4629static void DAC960_V2_ProcessCompletedCommand(DAC960_Command_T *Command)
4630{
4631 DAC960_Controller_T *Controller = Command->Controller;
4632 DAC960_CommandType_T CommandType = Command->CommandType;
4633 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
bca505f1
DK		 4634 DAC960_V2_IOCTL_Opcode_T IOCTLOpcode = CommandMailbox->Common.IOCTL_Opcode;
4635 DAC960_V2_CommandOpcode_T CommandOpcode = CommandMailbox->SCSI_10.CommandOpcode;
1da177e4
LT		 4636 DAC960_V2_CommandStatus_T CommandStatus = Command->V2.CommandStatus;
4637
4638 if (CommandType == DAC960_ReadCommand ||
4639 CommandType == DAC960_WriteCommand)
4640 {
4641
4642#ifdef FORCE_RETRY_DEBUG
4643 CommandStatus = DAC960_V2_AbormalCompletion;
4644#endif
4645 Command->V2.RequestSense->SenseKey = DAC960_SenseKey_MediumError;
4646
4647 if (CommandStatus == DAC960_V2_NormalCompletion) {
4648
4649 if (!DAC960_ProcessCompletedRequest(Command, true))
4650 BUG();
4651
4652 } else if (Command->V2.RequestSense->SenseKey == DAC960_SenseKey_MediumError)
4653 {
4654 /*
4655 * break the command down into pieces and resubmit each
4656 * piece, hoping that some of them will succeed.
4657 */
4658 DAC960_queue_partial_rw(Command);
4659 return;
4660 }
4661 else
4662 {
4663 if (Command->V2.RequestSense->SenseKey != DAC960_SenseKey_NotReady)
4664 DAC960_V2_ReadWriteError(Command);
4665 /*
4666 Perform completion processing for all buffers in this I/O Request.
4667 */
4668 (void)DAC960_ProcessCompletedRequest(Command, false);
4669 }
4670 }
4671 else if (CommandType == DAC960_ReadRetryCommand ||
4672 CommandType == DAC960_WriteRetryCommand)
4673 {
87d156bf 4674 bool normal_completion;
1da177e4
LT		 4675
4676#ifdef FORCE_RETRY_FAILURE_DEBUG
4677 static int retry_count = 1;
4678#endif
4679 /*
4680 Perform completion processing for the portion that was
4681 retried, and submit the next portion, if any.
4682 */
4683 normal_completion = true;
4684 if (CommandStatus != DAC960_V2_NormalCompletion) {
4685 normal_completion = false;
4686 if (Command->V2.RequestSense->SenseKey != DAC960_SenseKey_NotReady)
4687 DAC960_V2_ReadWriteError(Command);
4688 }
4689
4690#ifdef FORCE_RETRY_FAILURE_DEBUG
4691 if (!(++retry_count % 10000)) {
4692 printk("V2 error retry failure test\n");
4693 normal_completion = false;
4694 DAC960_V2_ReadWriteError(Command);
4695 }
4696#endif
4697
4698 if (!DAC960_ProcessCompletedRequest(Command, normal_completion)) {
4699 DAC960_queue_partial_rw(Command);
4700 return;
4701 }
4702 }
4703 else if (CommandType == DAC960_MonitoringCommand)
4704 {
4705 if (Controller->ShutdownMonitoringTimer)
4706 return;
bca505f1 4707 if (IOCTLOpcode == DAC960_V2_GetControllerInfo)
1da177e4
LT		 4708 {
4709 DAC960_V2_ControllerInfo_T *NewControllerInfo =
4710 Controller->V2.NewControllerInformation;
4711 DAC960_V2_ControllerInfo_T *ControllerInfo =
4712 &Controller->V2.ControllerInformation;
4713 Controller->LogicalDriveCount =
4714 NewControllerInfo->LogicalDevicesPresent;
4715 Controller->V2.NeedLogicalDeviceInformation = true;
4716 Controller->V2.NeedPhysicalDeviceInformation = true;
4717 Controller->V2.StartLogicalDeviceInformationScan = true;
4718 Controller->V2.StartPhysicalDeviceInformationScan = true;
4719 Controller->MonitoringAlertMode =
4720 (NewControllerInfo->LogicalDevicesCritical > 0 ||
4721 NewControllerInfo->LogicalDevicesOffline > 0 ||
4722 NewControllerInfo->PhysicalDisksCritical > 0 ||
4723 NewControllerInfo->PhysicalDisksOffline > 0);
4724 memcpy(ControllerInfo, NewControllerInfo,
4725 sizeof(DAC960_V2_ControllerInfo_T));
4726 }
bca505f1 4727 else if (IOCTLOpcode == DAC960_V2_GetEvent)
1da177e4
LT		 4728 {
4729 if (CommandStatus == DAC960_V2_NormalCompletion) {
4730 DAC960_V2_ReportEvent(Controller, Controller->V2.Event);
4731 }
4732 Controller->V2.NextEventSequenceNumber++;
4733 }
bca505f1 4734 else if (IOCTLOpcode == DAC960_V2_GetPhysicalDeviceInfoValid &&
1da177e4
LT		 4735 CommandStatus == DAC960_V2_NormalCompletion)
4736 {
4737 DAC960_V2_PhysicalDeviceInfo_T *NewPhysicalDeviceInfo =
4738 Controller->V2.NewPhysicalDeviceInformation;
4739 unsigned int PhysicalDeviceIndex = Controller->V2.PhysicalDeviceIndex;
4740 DAC960_V2_PhysicalDeviceInfo_T *PhysicalDeviceInfo =
4741 Controller->V2.PhysicalDeviceInformation[PhysicalDeviceIndex];
4742 DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber =
4743 Controller->V2.InquiryUnitSerialNumber[PhysicalDeviceIndex];
4744 unsigned int DeviceIndex;
4745 while (PhysicalDeviceInfo != NULL &&
4746 (NewPhysicalDeviceInfo->Channel >
4747 PhysicalDeviceInfo->Channel ||
4748 (NewPhysicalDeviceInfo->Channel ==
4749 PhysicalDeviceInfo->Channel &&
4750 (NewPhysicalDeviceInfo->TargetID >
4751 PhysicalDeviceInfo->TargetID ||
4752 (NewPhysicalDeviceInfo->TargetID ==
4753 PhysicalDeviceInfo->TargetID &&
4754 NewPhysicalDeviceInfo->LogicalUnit >
4755 PhysicalDeviceInfo->LogicalUnit)))))
4756 {
4757 DAC960_Critical("Physical Device %d:%d No Longer Exists\n",
4758 Controller,
4759 PhysicalDeviceInfo->Channel,
4760 PhysicalDeviceInfo->TargetID);
4761 Controller->V2.PhysicalDeviceInformation
4762 [PhysicalDeviceIndex] = NULL;
4763 Controller->V2.InquiryUnitSerialNumber
4764 [PhysicalDeviceIndex] = NULL;
4765 kfree(PhysicalDeviceInfo);
4766 kfree(InquiryUnitSerialNumber);
4767 for (DeviceIndex = PhysicalDeviceIndex;
4768 DeviceIndex < DAC960_V2_MaxPhysicalDevices - 1;
4769 DeviceIndex++)
4770 {
4771 Controller->V2.PhysicalDeviceInformation[DeviceIndex] =
4772 Controller->V2.PhysicalDeviceInformation[DeviceIndex+1];
4773 Controller->V2.InquiryUnitSerialNumber[DeviceIndex] =
4774 Controller->V2.InquiryUnitSerialNumber[DeviceIndex+1];
4775 }
4776 Controller->V2.PhysicalDeviceInformation
4777 [DAC960_V2_MaxPhysicalDevices-1] = NULL;
4778 Controller->V2.InquiryUnitSerialNumber
4779 [DAC960_V2_MaxPhysicalDevices-1] = NULL;
4780 PhysicalDeviceInfo =
4781 Controller->V2.PhysicalDeviceInformation[PhysicalDeviceIndex];
4782 InquiryUnitSerialNumber =
4783 Controller->V2.InquiryUnitSerialNumber[PhysicalDeviceIndex];
4784 }
4785 if (PhysicalDeviceInfo == NULL ||
4786 (NewPhysicalDeviceInfo->Channel !=
4787 PhysicalDeviceInfo->Channel) ||
4788 (NewPhysicalDeviceInfo->TargetID !=
4789 PhysicalDeviceInfo->TargetID) ||
4790 (NewPhysicalDeviceInfo->LogicalUnit !=
4791 PhysicalDeviceInfo->LogicalUnit))
4792 {
07fb75a5 4793 PhysicalDeviceInfo =
1da177e4
LT		 4794 kmalloc(sizeof(DAC960_V2_PhysicalDeviceInfo_T), GFP_ATOMIC);
4795 InquiryUnitSerialNumber =
1da177e4
LT		 4796 kmalloc(sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T),
4797 GFP_ATOMIC);
07fb75a5
JJ		 4798 if (InquiryUnitSerialNumber == NULL ||
4799 PhysicalDeviceInfo == NULL)
1da177e4 4800 {
07fb75a5
JJ		 4801 kfree(InquiryUnitSerialNumber);
4802 InquiryUnitSerialNumber = NULL;
1da177e4
LT		 4803 kfree(PhysicalDeviceInfo);
4804 PhysicalDeviceInfo = NULL;
4805 }
4806 DAC960_Critical("Physical Device %d:%d Now Exists%s\n",
4807 Controller,
4808 NewPhysicalDeviceInfo->Channel,
4809 NewPhysicalDeviceInfo->TargetID,
4810 (PhysicalDeviceInfo != NULL
4811 ? "" : " - Allocation Failed"));
4812 if (PhysicalDeviceInfo != NULL)
4813 {
4814 memset(PhysicalDeviceInfo, 0,
4815 sizeof(DAC960_V2_PhysicalDeviceInfo_T));
4816 PhysicalDeviceInfo->PhysicalDeviceState =
4817 DAC960_V2_Device_InvalidState;
4818 memset(InquiryUnitSerialNumber, 0,
4819 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T));
4820 InquiryUnitSerialNumber->PeripheralDeviceType = 0x1F;
4821 for (DeviceIndex = DAC960_V2_MaxPhysicalDevices - 1;
4822 DeviceIndex > PhysicalDeviceIndex;
4823 DeviceIndex--)
4824 {
4825 Controller->V2.PhysicalDeviceInformation[DeviceIndex] =
4826 Controller->V2.PhysicalDeviceInformation[DeviceIndex-1];
4827 Controller->V2.InquiryUnitSerialNumber[DeviceIndex] =
4828 Controller->V2.InquiryUnitSerialNumber[DeviceIndex-1];
4829 }
4830 Controller->V2.PhysicalDeviceInformation
4831 [PhysicalDeviceIndex] =
4832 PhysicalDeviceInfo;
4833 Controller->V2.InquiryUnitSerialNumber
4834 [PhysicalDeviceIndex] =
4835 InquiryUnitSerialNumber;
4836 Controller->V2.NeedDeviceSerialNumberInformation = true;
4837 }
4838 }
4839 if (PhysicalDeviceInfo != NULL)
4840 {
4841 if (NewPhysicalDeviceInfo->PhysicalDeviceState !=
4842 PhysicalDeviceInfo->PhysicalDeviceState)
4843 DAC960_Critical(
4844 "Physical Device %d:%d is now %s\n", Controller,
4845 NewPhysicalDeviceInfo->Channel,
4846 NewPhysicalDeviceInfo->TargetID,
4847 (NewPhysicalDeviceInfo->PhysicalDeviceState
4848 == DAC960_V2_Device_Online
4849 ? "ONLINE"
4850 : NewPhysicalDeviceInfo->PhysicalDeviceState
4851 == DAC960_V2_Device_Rebuild
4852 ? "REBUILD"
4853 : NewPhysicalDeviceInfo->PhysicalDeviceState
4854 == DAC960_V2_Device_Missing
4855 ? "MISSING"
4856 : NewPhysicalDeviceInfo->PhysicalDeviceState
4857 == DAC960_V2_Device_Critical
4858 ? "CRITICAL"
4859 : NewPhysicalDeviceInfo->PhysicalDeviceState
4860 == DAC960_V2_Device_Dead
4861 ? "DEAD"
4862 : NewPhysicalDeviceInfo->PhysicalDeviceState
4863 == DAC960_V2_Device_SuspectedDead
4864 ? "SUSPECTED-DEAD"
4865 : NewPhysicalDeviceInfo->PhysicalDeviceState
4866 == DAC960_V2_Device_CommandedOffline
4867 ? "COMMANDED-OFFLINE"
4868 : NewPhysicalDeviceInfo->PhysicalDeviceState
4869 == DAC960_V2_Device_Standby
4870 ? "STANDBY" : "UNKNOWN"));
4871 if ((NewPhysicalDeviceInfo->ParityErrors !=
4872 PhysicalDeviceInfo->ParityErrors) ||
4873 (NewPhysicalDeviceInfo->SoftErrors !=
4874 PhysicalDeviceInfo->SoftErrors) ||
4875 (NewPhysicalDeviceInfo->HardErrors !=
4876 PhysicalDeviceInfo->HardErrors) ||
4877 (NewPhysicalDeviceInfo->MiscellaneousErrors !=
4878 PhysicalDeviceInfo->MiscellaneousErrors) ||
4879 (NewPhysicalDeviceInfo->CommandTimeouts !=
4880 PhysicalDeviceInfo->CommandTimeouts) ||
4881 (NewPhysicalDeviceInfo->Retries !=
4882 PhysicalDeviceInfo->Retries) ||
4883 (NewPhysicalDeviceInfo->Aborts !=
4884 PhysicalDeviceInfo->Aborts) ||
4885 (NewPhysicalDeviceInfo->PredictedFailuresDetected !=
4886 PhysicalDeviceInfo->PredictedFailuresDetected))
4887 {
4888 DAC960_Critical("Physical Device %d:%d Errors: "
4889 "Parity = %d, Soft = %d, "
4890 "Hard = %d, Misc = %d\n",
4891 Controller,
4892 NewPhysicalDeviceInfo->Channel,
4893 NewPhysicalDeviceInfo->TargetID,
4894 NewPhysicalDeviceInfo->ParityErrors,
4895 NewPhysicalDeviceInfo->SoftErrors,
4896 NewPhysicalDeviceInfo->HardErrors,
4897 NewPhysicalDeviceInfo->MiscellaneousErrors);
4898 DAC960_Critical("Physical Device %d:%d Errors: "
4899 "Timeouts = %d, Retries = %d, "
4900 "Aborts = %d, Predicted = %d\n",
4901 Controller,
4902 NewPhysicalDeviceInfo->Channel,
4903 NewPhysicalDeviceInfo->TargetID,
4904 NewPhysicalDeviceInfo->CommandTimeouts,
4905 NewPhysicalDeviceInfo->Retries,
4906 NewPhysicalDeviceInfo->Aborts,
4907 NewPhysicalDeviceInfo
4908 ->PredictedFailuresDetected);
4909 }
4910 if ((PhysicalDeviceInfo->PhysicalDeviceState
4911 == DAC960_V2_Device_Dead ||
4912 PhysicalDeviceInfo->PhysicalDeviceState
4913 == DAC960_V2_Device_InvalidState) &&
4914 NewPhysicalDeviceInfo->PhysicalDeviceState
4915 != DAC960_V2_Device_Dead)
4916 Controller->V2.NeedDeviceSerialNumberInformation = true;
4917 memcpy(PhysicalDeviceInfo, NewPhysicalDeviceInfo,
4918 sizeof(DAC960_V2_PhysicalDeviceInfo_T));
4919 }
4920 NewPhysicalDeviceInfo->LogicalUnit++;
4921 Controller->V2.PhysicalDeviceIndex++;
4922 }
bca505f1 4923 else if (IOCTLOpcode == DAC960_V2_GetPhysicalDeviceInfoValid)
1da177e4
LT		 4924 {
4925 unsigned int DeviceIndex;
4926 for (DeviceIndex = Controller->V2.PhysicalDeviceIndex;
4927 DeviceIndex < DAC960_V2_MaxPhysicalDevices;
4928 DeviceIndex++)
4929 {
4930 DAC960_V2_PhysicalDeviceInfo_T *PhysicalDeviceInfo =
4931 Controller->V2.PhysicalDeviceInformation[DeviceIndex];
4932 DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber =
4933 Controller->V2.InquiryUnitSerialNumber[DeviceIndex];
4934 if (PhysicalDeviceInfo == NULL) break;
4935 DAC960_Critical("Physical Device %d:%d No Longer Exists\n",
4936 Controller,
4937 PhysicalDeviceInfo->Channel,
4938 PhysicalDeviceInfo->TargetID);
4939 Controller->V2.PhysicalDeviceInformation[DeviceIndex] = NULL;
4940 Controller->V2.InquiryUnitSerialNumber[DeviceIndex] = NULL;
4941 kfree(PhysicalDeviceInfo);
4942 kfree(InquiryUnitSerialNumber);
4943 }
4944 Controller->V2.NeedPhysicalDeviceInformation = false;
4945 }
bca505f1 4946 else if (IOCTLOpcode == DAC960_V2_GetLogicalDeviceInfoValid &&
1da177e4
LT		 4947 CommandStatus == DAC960_V2_NormalCompletion)
4948 {
4949 DAC960_V2_LogicalDeviceInfo_T *NewLogicalDeviceInfo =
4950 Controller->V2.NewLogicalDeviceInformation;
4951 unsigned short LogicalDeviceNumber =
4952 NewLogicalDeviceInfo->LogicalDeviceNumber;
4953 DAC960_V2_LogicalDeviceInfo_T *LogicalDeviceInfo =
4954 Controller->V2.LogicalDeviceInformation[LogicalDeviceNumber];
4955 if (LogicalDeviceInfo == NULL)
4956 {
4957 DAC960_V2_PhysicalDevice_T PhysicalDevice;
4958 PhysicalDevice.Controller = 0;
4959 PhysicalDevice.Channel = NewLogicalDeviceInfo->Channel;
4960 PhysicalDevice.TargetID = NewLogicalDeviceInfo->TargetID;
4961 PhysicalDevice.LogicalUnit = NewLogicalDeviceInfo->LogicalUnit;
4962 Controller->V2.LogicalDriveToVirtualDevice[LogicalDeviceNumber] =
4963 PhysicalDevice;
0a361e31
AD		 4964 LogicalDeviceInfo = kmalloc(sizeof(DAC960_V2_LogicalDeviceInfo_T),
4965 GFP_ATOMIC);
1da177e4
LT		 4966 Controller->V2.LogicalDeviceInformation[LogicalDeviceNumber] =
4967 LogicalDeviceInfo;
4968 DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) "
4969 "Now Exists%s\n", Controller,
4970 LogicalDeviceNumber,
4971 Controller->ControllerNumber,
4972 LogicalDeviceNumber,
4973 (LogicalDeviceInfo != NULL
4974 ? "" : " - Allocation Failed"));
4975 if (LogicalDeviceInfo != NULL)
4976 {
4977 memset(LogicalDeviceInfo, 0,
4978 sizeof(DAC960_V2_LogicalDeviceInfo_T));
4979 DAC960_ComputeGenericDiskInfo(Controller);
4980 }
4981 }
4982 if (LogicalDeviceInfo != NULL)
4983 {
4984 unsigned long LogicalDeviceSize =
4985 NewLogicalDeviceInfo->ConfigurableDeviceSize;
4986 if (NewLogicalDeviceInfo->LogicalDeviceState !=
4987 LogicalDeviceInfo->LogicalDeviceState)
4988 DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) "
4989 "is now %s\n", Controller,
4990 LogicalDeviceNumber,
4991 Controller->ControllerNumber,
4992 LogicalDeviceNumber,
4993 (NewLogicalDeviceInfo->LogicalDeviceState
4994 == DAC960_V2_LogicalDevice_Online
4995 ? "ONLINE"
4996 : NewLogicalDeviceInfo->LogicalDeviceState
4997 == DAC960_V2_LogicalDevice_Critical
4998 ? "CRITICAL" : "OFFLINE"));
4999 if ((NewLogicalDeviceInfo->SoftErrors !=
5000 LogicalDeviceInfo->SoftErrors) ||
5001 (NewLogicalDeviceInfo->CommandsFailed !=
5002 LogicalDeviceInfo->CommandsFailed) ||
5003 (NewLogicalDeviceInfo->DeferredWriteErrors !=
5004 LogicalDeviceInfo->DeferredWriteErrors))
5005 DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) Errors: "
5006 "Soft = %d, Failed = %d, Deferred Write = %d\n",
5007 Controller, LogicalDeviceNumber,
5008 Controller->ControllerNumber,
5009 LogicalDeviceNumber,
5010 NewLogicalDeviceInfo->SoftErrors,
5011 NewLogicalDeviceInfo->CommandsFailed,
5012 NewLogicalDeviceInfo->DeferredWriteErrors);
5013 if (NewLogicalDeviceInfo->ConsistencyCheckInProgress)
5014 DAC960_V2_ReportProgress(Controller,
5015 "Consistency Check",
5016 LogicalDeviceNumber,
5017 NewLogicalDeviceInfo
5018 ->ConsistencyCheckBlockNumber,
5019 LogicalDeviceSize);
5020 else if (NewLogicalDeviceInfo->RebuildInProgress)
5021 DAC960_V2_ReportProgress(Controller,
5022 "Rebuild",
5023 LogicalDeviceNumber,
5024 NewLogicalDeviceInfo
5025 ->RebuildBlockNumber,
5026 LogicalDeviceSize);
5027 else if (NewLogicalDeviceInfo->BackgroundInitializationInProgress)
5028 DAC960_V2_ReportProgress(Controller,
5029 "Background Initialization",
5030 LogicalDeviceNumber,
5031 NewLogicalDeviceInfo
5032 ->BackgroundInitializationBlockNumber,
5033 LogicalDeviceSize);
5034 else if (NewLogicalDeviceInfo->ForegroundInitializationInProgress)
5035 DAC960_V2_ReportProgress(Controller,
5036 "Foreground Initialization",
5037 LogicalDeviceNumber,
5038 NewLogicalDeviceInfo
5039 ->ForegroundInitializationBlockNumber,
5040 LogicalDeviceSize);
5041 else if (NewLogicalDeviceInfo->DataMigrationInProgress)
5042 DAC960_V2_ReportProgress(Controller,
5043 "Data Migration",
5044 LogicalDeviceNumber,
5045 NewLogicalDeviceInfo
5046 ->DataMigrationBlockNumber,
5047 LogicalDeviceSize);
5048 else if (NewLogicalDeviceInfo->PatrolOperationInProgress)
5049 DAC960_V2_ReportProgress(Controller,
5050 "Patrol Operation",
5051 LogicalDeviceNumber,
5052 NewLogicalDeviceInfo
5053 ->PatrolOperationBlockNumber,
5054 LogicalDeviceSize);
5055 if (LogicalDeviceInfo->BackgroundInitializationInProgress &&
5056 !NewLogicalDeviceInfo->BackgroundInitializationInProgress)
5057 DAC960_Progress("Logical Drive %d (/dev/rd/c%dd%d) "
5058 "Background Initialization %s\n",
5059 Controller,
5060 LogicalDeviceNumber,
5061 Controller->ControllerNumber,
5062 LogicalDeviceNumber,
5063 (NewLogicalDeviceInfo->LogicalDeviceControl
5064 .LogicalDeviceInitialized
5065 ? "Completed" : "Failed"));
5066 memcpy(LogicalDeviceInfo, NewLogicalDeviceInfo,
5067 sizeof(DAC960_V2_LogicalDeviceInfo_T));
5068 }
5069 Controller->V2.LogicalDriveFoundDuringScan
5070 [LogicalDeviceNumber] = true;
5071 NewLogicalDeviceInfo->LogicalDeviceNumber++;
5072 }
bca505f1 5073 else if (IOCTLOpcode == DAC960_V2_GetLogicalDeviceInfoValid)
1da177e4
LT		 5074 {
5075 int LogicalDriveNumber;
5076 for (LogicalDriveNumber = 0;
5077 LogicalDriveNumber < DAC960_MaxLogicalDrives;
5078 LogicalDriveNumber++)
5079 {
5080 DAC960_V2_LogicalDeviceInfo_T *LogicalDeviceInfo =
5081 Controller->V2.LogicalDeviceInformation[LogicalDriveNumber];
5082 if (LogicalDeviceInfo == NULL ||
5083 Controller->V2.LogicalDriveFoundDuringScan
5084 [LogicalDriveNumber])
5085 continue;
5086 DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) "
5087 "No Longer Exists\n", Controller,
5088 LogicalDriveNumber,
5089 Controller->ControllerNumber,
5090 LogicalDriveNumber);
5091 Controller->V2.LogicalDeviceInformation
5092 [LogicalDriveNumber] = NULL;
5093 kfree(LogicalDeviceInfo);
5094 Controller->LogicalDriveInitiallyAccessible
5095 [LogicalDriveNumber] = false;
5096 DAC960_ComputeGenericDiskInfo(Controller);
5097 }
5098 Controller->V2.NeedLogicalDeviceInformation = false;
5099 }
5100 else if (CommandOpcode == DAC960_V2_SCSI_10_Passthru)
5101 {
5102 DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber =
5103 Controller->V2.InquiryUnitSerialNumber[Controller->V2.PhysicalDeviceIndex - 1];
5104
5105 if (CommandStatus != DAC960_V2_NormalCompletion) {
5106 memset(InquiryUnitSerialNumber,
5107 0, sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T));
5108 InquiryUnitSerialNumber->PeripheralDeviceType = 0x1F;
5109 } else
5110 memcpy(InquiryUnitSerialNumber,
5111 Controller->V2.NewInquiryUnitSerialNumber,
5112 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T));
5113
5114 Controller->V2.NeedDeviceSerialNumberInformation = false;
5115 }
5116
5117 if (Controller->V2.HealthStatusBuffer->NextEventSequenceNumber
5118 - Controller->V2.NextEventSequenceNumber > 0)
5119 {
5120 CommandMailbox->GetEvent.CommandOpcode = DAC960_V2_IOCTL;
5121 CommandMailbox->GetEvent.DataTransferSize = sizeof(DAC960_V2_Event_T);
5122 CommandMailbox->GetEvent.EventSequenceNumberHigh16 =
5123 Controller->V2.NextEventSequenceNumber >> 16;
5124 CommandMailbox->GetEvent.ControllerNumber = 0;
5125 CommandMailbox->GetEvent.IOCTL_Opcode =
5126 DAC960_V2_GetEvent;
5127 CommandMailbox->GetEvent.EventSequenceNumberLow16 =
5128 Controller->V2.NextEventSequenceNumber & 0xFFFF;
5129 CommandMailbox->GetEvent.DataTransferMemoryAddress
5130 .ScatterGatherSegments[0]
5131 .SegmentDataPointer =
5132 Controller->V2.EventDMA;
5133 CommandMailbox->GetEvent.DataTransferMemoryAddress
5134 .ScatterGatherSegments[0]
5135 .SegmentByteCount =
5136 CommandMailbox->GetEvent.DataTransferSize;
5137 DAC960_QueueCommand(Command);
5138 return;
5139 }
5140 if (Controller->V2.NeedPhysicalDeviceInformation)
5141 {
5142 if (Controller->V2.NeedDeviceSerialNumberInformation)
5143 {
5144 DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber =
5145 Controller->V2.NewInquiryUnitSerialNumber;
5146 InquiryUnitSerialNumber->PeripheralDeviceType = 0x1F;
5147
5148 DAC960_V2_ConstructNewUnitSerialNumber(Controller, CommandMailbox,
5149 Controller->V2.NewPhysicalDeviceInformation->Channel,
5150 Controller->V2.NewPhysicalDeviceInformation->TargetID,
5151 Controller->V2.NewPhysicalDeviceInformation->LogicalUnit - 1);
5152
5153
5154 DAC960_QueueCommand(Command);
5155 return;
5156 }
5157 if (Controller->V2.StartPhysicalDeviceInformationScan)
5158 {
5159 Controller->V2.PhysicalDeviceIndex = 0;
5160 Controller->V2.NewPhysicalDeviceInformation->Channel = 0;
5161 Controller->V2.NewPhysicalDeviceInformation->TargetID = 0;
5162 Controller->V2.NewPhysicalDeviceInformation->LogicalUnit = 0;
5163 Controller->V2.StartPhysicalDeviceInformationScan = false;
5164 }
5165 CommandMailbox->PhysicalDeviceInfo.CommandOpcode = DAC960_V2_IOCTL;
5166 CommandMailbox->PhysicalDeviceInfo.DataTransferSize =
5167 sizeof(DAC960_V2_PhysicalDeviceInfo_T);
5168 CommandMailbox->PhysicalDeviceInfo.PhysicalDevice.LogicalUnit =
5169 Controller->V2.NewPhysicalDeviceInformation->LogicalUnit;
5170 CommandMailbox->PhysicalDeviceInfo.PhysicalDevice.TargetID =
5171 Controller->V2.NewPhysicalDeviceInformation->TargetID;
5172 CommandMailbox->PhysicalDeviceInfo.PhysicalDevice.Channel =
5173 Controller->V2.NewPhysicalDeviceInformation->Channel;
5174 CommandMailbox->PhysicalDeviceInfo.IOCTL_Opcode =
5175 DAC960_V2_GetPhysicalDeviceInfoValid;
5176 CommandMailbox->PhysicalDeviceInfo.DataTransferMemoryAddress
5177 .ScatterGatherSegments[0]
5178 .SegmentDataPointer =
5179 Controller->V2.NewPhysicalDeviceInformationDMA;
5180 CommandMailbox->PhysicalDeviceInfo.DataTransferMemoryAddress
5181 .ScatterGatherSegments[0]
5182 .SegmentByteCount =
5183 CommandMailbox->PhysicalDeviceInfo.DataTransferSize;
5184 DAC960_QueueCommand(Command);
5185 return;
5186 }
5187 if (Controller->V2.NeedLogicalDeviceInformation)
5188 {
5189 if (Controller->V2.StartLogicalDeviceInformationScan)
5190 {
5191 int LogicalDriveNumber;
5192 for (LogicalDriveNumber = 0;
5193 LogicalDriveNumber < DAC960_MaxLogicalDrives;
5194 LogicalDriveNumber++)
5195 Controller->V2.LogicalDriveFoundDuringScan
5196 [LogicalDriveNumber] = false;
5197 Controller->V2.NewLogicalDeviceInformation->LogicalDeviceNumber = 0;
5198 Controller->V2.StartLogicalDeviceInformationScan = false;
5199 }
5200 CommandMailbox->LogicalDeviceInfo.CommandOpcode = DAC960_V2_IOCTL;
5201 CommandMailbox->LogicalDeviceInfo.DataTransferSize =
5202 sizeof(DAC960_V2_LogicalDeviceInfo_T);
5203 CommandMailbox->LogicalDeviceInfo.LogicalDevice.LogicalDeviceNumber =
5204 Controller->V2.NewLogicalDeviceInformation->LogicalDeviceNumber;
5205 CommandMailbox->LogicalDeviceInfo.IOCTL_Opcode =
5206 DAC960_V2_GetLogicalDeviceInfoValid;
5207 CommandMailbox->LogicalDeviceInfo.DataTransferMemoryAddress
5208 .ScatterGatherSegments[0]
5209 .SegmentDataPointer =
5210 Controller->V2.NewLogicalDeviceInformationDMA;
5211 CommandMailbox->LogicalDeviceInfo.DataTransferMemoryAddress
5212 .ScatterGatherSegments[0]
5213 .SegmentByteCount =
5214 CommandMailbox->LogicalDeviceInfo.DataTransferSize;
5215 DAC960_QueueCommand(Command);
5216 return;
5217 }
5218 Controller->MonitoringTimerCount++;
5219 Controller->MonitoringTimer.expires =
5220 jiffies + DAC960_HealthStatusMonitoringInterval;
5221 add_timer(&Controller->MonitoringTimer);
5222 }
5223 if (CommandType == DAC960_ImmediateCommand)
5224 {
5225 complete(Command->Completion);
5226 Command->Completion = NULL;
5227 return;
5228 }
5229 if (CommandType == DAC960_QueuedCommand)
5230 {
5231 DAC960_V2_KernelCommand_T *KernelCommand = Command->V2.KernelCommand;
5232 KernelCommand->CommandStatus = CommandStatus;
5233 KernelCommand->RequestSenseLength = Command->V2.RequestSenseLength;
5234 KernelCommand->DataTransferLength = Command->V2.DataTransferResidue;
5235 Command->V2.KernelCommand = NULL;
5236 DAC960_DeallocateCommand(Command);
5237 KernelCommand->CompletionFunction(KernelCommand);
5238 return;
5239 }
5240 /*
5241 Queue a Status Monitoring Command to the Controller using the just
5242 completed Command if one was deferred previously due to lack of a
5243 free Command when the Monitoring Timer Function was called.
5244 */
5245 if (Controller->MonitoringCommandDeferred)
5246 {
5247 Controller->MonitoringCommandDeferred = false;
5248 DAC960_V2_QueueMonitoringCommand(Command);
5249 return;
5250 }
5251 /*
5252 Deallocate the Command.
5253 */
5254 DAC960_DeallocateCommand(Command);
5255 /*
5256 Wake up any processes waiting on a free Command.
5257 */
5258 wake_up(&Controller->CommandWaitQueue);
5259}
5260
5b76ffd5
CH		 5261/*
5262 DAC960_GEM_InterruptHandler handles hardware interrupts from DAC960 GEM Series
5263 Controllers.
5264*/
5265
5266static irqreturn_t DAC960_GEM_InterruptHandler(int IRQ_Channel,
7d12e780 5267 void *DeviceIdentifier)
5b76ffd5 5268{
c7bec5ab 5269 DAC960_Controller_T *Controller = DeviceIdentifier;
5b76ffd5
CH		 5270 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
5271 DAC960_V2_StatusMailbox_T *NextStatusMailbox;
5272 unsigned long flags;
5273
5274 spin_lock_irqsave(&Controller->queue_lock, flags);
5275 DAC960_GEM_AcknowledgeInterrupt(ControllerBaseAddress);
5276 NextStatusMailbox = Controller->V2.NextStatusMailbox;
5277 while (NextStatusMailbox->Fields.CommandIdentifier > 0)
5278 {
5279 DAC960_V2_CommandIdentifier_T CommandIdentifier =
5280 NextStatusMailbox->Fields.CommandIdentifier;
5281 DAC960_Command_T *Command = Controller->Commands[CommandIdentifier-1];
5282 Command->V2.CommandStatus = NextStatusMailbox->Fields.CommandStatus;
5283 Command->V2.RequestSenseLength =
5284 NextStatusMailbox->Fields.RequestSenseLength;
5285 Command->V2.DataTransferResidue =
5286 NextStatusMailbox->Fields.DataTransferResidue;
5287 NextStatusMailbox->Words[0] = 0;
5288 if (++NextStatusMailbox > Controller->V2.LastStatusMailbox)
5289 NextStatusMailbox = Controller->V2.FirstStatusMailbox;
5290 DAC960_V2_ProcessCompletedCommand(Command);
5291 }
5292 Controller->V2.NextStatusMailbox = NextStatusMailbox;
5293 /*
5294 Attempt to remove additional I/O Requests from the Controller's
5295 I/O Request Queue and queue them to the Controller.
5296 */
5297 DAC960_ProcessRequest(Controller);
5298 spin_unlock_irqrestore(&Controller->queue_lock, flags);
5299 return IRQ_HANDLED;
5300}
1da177e4
LT		 5301
5302/*
5303 DAC960_BA_InterruptHandler handles hardware interrupts from DAC960 BA Series
5304 Controllers.
5305*/
5306
5307static irqreturn_t DAC960_BA_InterruptHandler(int IRQ_Channel,
7d12e780 5308 void *DeviceIdentifier)
1da177e4 5309{
c7bec5ab 5310 DAC960_Controller_T *Controller = DeviceIdentifier;
1da177e4
LT		 5311 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
5312 DAC960_V2_StatusMailbox_T *NextStatusMailbox;
5313 unsigned long flags;
5314
5315 spin_lock_irqsave(&Controller->queue_lock, flags);
5316 DAC960_BA_AcknowledgeInterrupt(ControllerBaseAddress);
5317 NextStatusMailbox = Controller->V2.NextStatusMailbox;
5318 while (NextStatusMailbox->Fields.CommandIdentifier > 0)
5319 {
5320 DAC960_V2_CommandIdentifier_T CommandIdentifier =
5321 NextStatusMailbox->Fields.CommandIdentifier;
5322 DAC960_Command_T *Command = Controller->Commands[CommandIdentifier-1];
5323 Command->V2.CommandStatus = NextStatusMailbox->Fields.CommandStatus;
5324 Command->V2.RequestSenseLength =
5325 NextStatusMailbox->Fields.RequestSenseLength;
5326 Command->V2.DataTransferResidue =
5327 NextStatusMailbox->Fields.DataTransferResidue;
5328 NextStatusMailbox->Words[0] = 0;
5329 if (++NextStatusMailbox > Controller->V2.LastStatusMailbox)
5330 NextStatusMailbox = Controller->V2.FirstStatusMailbox;
5331 DAC960_V2_ProcessCompletedCommand(Command);
5332 }
5333 Controller->V2.NextStatusMailbox = NextStatusMailbox;
5334 /*
5335 Attempt to remove additional I/O Requests from the Controller's
5336 I/O Request Queue and queue them to the Controller.
5337 */
5338 DAC960_ProcessRequest(Controller);
5339 spin_unlock_irqrestore(&Controller->queue_lock, flags);
5340 return IRQ_HANDLED;
5341}
5342
5343
5344/*
5345 DAC960_LP_InterruptHandler handles hardware interrupts from DAC960 LP Series
5346 Controllers.
5347*/
5348
5349static irqreturn_t DAC960_LP_InterruptHandler(int IRQ_Channel,
7d12e780 5350 void *DeviceIdentifier)
1da177e4 5351{
c7bec5ab 5352 DAC960_Controller_T *Controller = DeviceIdentifier;
1da177e4
LT		 5353 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
5354 DAC960_V2_StatusMailbox_T *NextStatusMailbox;
5355 unsigned long flags;
5356
5357 spin_lock_irqsave(&Controller->queue_lock, flags);
5358 DAC960_LP_AcknowledgeInterrupt(ControllerBaseAddress);
5359 NextStatusMailbox = Controller->V2.NextStatusMailbox;
5360 while (NextStatusMailbox->Fields.CommandIdentifier > 0)
5361 {
5362 DAC960_V2_CommandIdentifier_T CommandIdentifier =
5363 NextStatusMailbox->Fields.CommandIdentifier;
5364 DAC960_Command_T *Command = Controller->Commands[CommandIdentifier-1];
5365 Command->V2.CommandStatus = NextStatusMailbox->Fields.CommandStatus;
5366 Command->V2.RequestSenseLength =
5367 NextStatusMailbox->Fields.RequestSenseLength;
5368 Command->V2.DataTransferResidue =
5369 NextStatusMailbox->Fields.DataTransferResidue;
5370 NextStatusMailbox->Words[0] = 0;
5371 if (++NextStatusMailbox > Controller->V2.LastStatusMailbox)
5372 NextStatusMailbox = Controller->V2.FirstStatusMailbox;
5373 DAC960_V2_ProcessCompletedCommand(Command);
5374 }
5375 Controller->V2.NextStatusMailbox = NextStatusMailbox;
5376 /*
5377 Attempt to remove additional I/O Requests from the Controller's
5378 I/O Request Queue and queue them to the Controller.
5379 */
5380 DAC960_ProcessRequest(Controller);
5381 spin_unlock_irqrestore(&Controller->queue_lock, flags);
5382 return IRQ_HANDLED;
5383}
5384
5385
5386/*
5387 DAC960_LA_InterruptHandler handles hardware interrupts from DAC960 LA Series
5388 Controllers.
5389*/
5390
5391static irqreturn_t DAC960_LA_InterruptHandler(int IRQ_Channel,
7d12e780 5392 void *DeviceIdentifier)
1da177e4 5393{
c7bec5ab 5394 DAC960_Controller_T *Controller = DeviceIdentifier;
1da177e4
LT		 5395 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
5396 DAC960_V1_StatusMailbox_T *NextStatusMailbox;
5397 unsigned long flags;
5398
5399 spin_lock_irqsave(&Controller->queue_lock, flags);
5400 DAC960_LA_AcknowledgeInterrupt(ControllerBaseAddress);
5401 NextStatusMailbox = Controller->V1.NextStatusMailbox;
5402 while (NextStatusMailbox->Fields.Valid)
5403 {
5404 DAC960_V1_CommandIdentifier_T CommandIdentifier =
5405 NextStatusMailbox->Fields.CommandIdentifier;
5406 DAC960_Command_T *Command = Controller->Commands[CommandIdentifier-1];
5407 Command->V1.CommandStatus = NextStatusMailbox->Fields.CommandStatus;
5408 NextStatusMailbox->Word = 0;
5409 if (++NextStatusMailbox > Controller->V1.LastStatusMailbox)
5410 NextStatusMailbox = Controller->V1.FirstStatusMailbox;
5411 DAC960_V1_ProcessCompletedCommand(Command);
5412 }
5413 Controller->V1.NextStatusMailbox = NextStatusMailbox;
5414 /*
5415 Attempt to remove additional I/O Requests from the Controller's
5416 I/O Request Queue and queue them to the Controller.
5417 */
5418 DAC960_ProcessRequest(Controller);
5419 spin_unlock_irqrestore(&Controller->queue_lock, flags);
5420 return IRQ_HANDLED;
5421}
5422
5423
5424/*
5425 DAC960_PG_InterruptHandler handles hardware interrupts from DAC960 PG Series
5426 Controllers.
5427*/
5428
5429static irqreturn_t DAC960_PG_InterruptHandler(int IRQ_Channel,
7d12e780 5430 void *DeviceIdentifier)
1da177e4 5431{
c7bec5ab 5432 DAC960_Controller_T *Controller = DeviceIdentifier;
1da177e4
LT		 5433 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
5434 DAC960_V1_StatusMailbox_T *NextStatusMailbox;
5435 unsigned long flags;
5436
5437 spin_lock_irqsave(&Controller->queue_lock, flags);
5438 DAC960_PG_AcknowledgeInterrupt(ControllerBaseAddress);
5439 NextStatusMailbox = Controller->V1.NextStatusMailbox;
5440 while (NextStatusMailbox->Fields.Valid)
5441 {
5442 DAC960_V1_CommandIdentifier_T CommandIdentifier =
5443 NextStatusMailbox->Fields.CommandIdentifier;
5444 DAC960_Command_T *Command = Controller->Commands[CommandIdentifier-1];
5445 Command->V1.CommandStatus = NextStatusMailbox->Fields.CommandStatus;
5446 NextStatusMailbox->Word = 0;
5447 if (++NextStatusMailbox > Controller->V1.LastStatusMailbox)
5448 NextStatusMailbox = Controller->V1.FirstStatusMailbox;
5449 DAC960_V1_ProcessCompletedCommand(Command);
5450 }
5451 Controller->V1.NextStatusMailbox = NextStatusMailbox;
5452 /*
5453 Attempt to remove additional I/O Requests from the Controller's
5454 I/O Request Queue and queue them to the Controller.
5455 */
5456 DAC960_ProcessRequest(Controller);
5457 spin_unlock_irqrestore(&Controller->queue_lock, flags);
5458 return IRQ_HANDLED;
5459}
5460
5461
5462/*
5463 DAC960_PD_InterruptHandler handles hardware interrupts from DAC960 PD Series
5464 Controllers.
5465*/
5466
5467static irqreturn_t DAC960_PD_InterruptHandler(int IRQ_Channel,
7d12e780 5468 void *DeviceIdentifier)
1da177e4 5469{
c7bec5ab 5470 DAC960_Controller_T *Controller = DeviceIdentifier;
1da177e4
LT		 5471 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
5472 unsigned long flags;
5473
5474 spin_lock_irqsave(&Controller->queue_lock, flags);
5475 while (DAC960_PD_StatusAvailableP(ControllerBaseAddress))
5476 {
5477 DAC960_V1_CommandIdentifier_T CommandIdentifier =
5478 DAC960_PD_ReadStatusCommandIdentifier(ControllerBaseAddress);
5479 DAC960_Command_T *Command = Controller->Commands[CommandIdentifier-1];
5480 Command->V1.CommandStatus =
5481 DAC960_PD_ReadStatusRegister(ControllerBaseAddress);
5482 DAC960_PD_AcknowledgeInterrupt(ControllerBaseAddress);
5483 DAC960_PD_AcknowledgeStatus(ControllerBaseAddress);
5484 DAC960_V1_ProcessCompletedCommand(Command);
5485 }
5486 /*
5487 Attempt to remove additional I/O Requests from the Controller's
5488 I/O Request Queue and queue them to the Controller.
5489 */
5490 DAC960_ProcessRequest(Controller);
5491 spin_unlock_irqrestore(&Controller->queue_lock, flags);
5492 return IRQ_HANDLED;
5493}
5494
5495
5496/*
5497 DAC960_P_InterruptHandler handles hardware interrupts from DAC960 P Series
5498 Controllers.
5499
5500 Translations of DAC960_V1_Enquiry and DAC960_V1_GetDeviceState rely
5501 on the data having been placed into DAC960_Controller_T, rather than
5502 an arbitrary buffer.
5503*/
5504
5505static irqreturn_t DAC960_P_InterruptHandler(int IRQ_Channel,
7d12e780 5506 void *DeviceIdentifier)
1da177e4 5507{
c7bec5ab 5508 DAC960_Controller_T *Controller = DeviceIdentifier;
1da177e4
LT		 5509 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
5510 unsigned long flags;
5511
5512 spin_lock_irqsave(&Controller->queue_lock, flags);
5513 while (DAC960_PD_StatusAvailableP(ControllerBaseAddress))
5514 {
5515 DAC960_V1_CommandIdentifier_T CommandIdentifier =
5516 DAC960_PD_ReadStatusCommandIdentifier(ControllerBaseAddress);
5517 DAC960_Command_T *Command = Controller->Commands[CommandIdentifier-1];
5518 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
5519 DAC960_V1_CommandOpcode_T CommandOpcode =
5520 CommandMailbox->Common.CommandOpcode;
5521 Command->V1.CommandStatus =
5522 DAC960_PD_ReadStatusRegister(ControllerBaseAddress);
5523 DAC960_PD_AcknowledgeInterrupt(ControllerBaseAddress);
5524 DAC960_PD_AcknowledgeStatus(ControllerBaseAddress);
5525 switch (CommandOpcode)
5526 {
5527 case DAC960_V1_Enquiry_Old:
5528 Command->V1.CommandMailbox.Common.CommandOpcode = DAC960_V1_Enquiry;
5529 DAC960_P_To_PD_TranslateEnquiry(Controller->V1.NewEnquiry);
5530 break;
5531 case DAC960_V1_GetDeviceState_Old:
5532 Command->V1.CommandMailbox.Common.CommandOpcode =
5533 DAC960_V1_GetDeviceState;
5534 DAC960_P_To_PD_TranslateDeviceState(Controller->V1.NewDeviceState);
5535 break;
5536 case DAC960_V1_Read_Old:
5537 Command->V1.CommandMailbox.Common.CommandOpcode = DAC960_V1_Read;
5538 DAC960_P_To_PD_TranslateReadWriteCommand(CommandMailbox);
5539 break;
5540 case DAC960_V1_Write_Old:
5541 Command->V1.CommandMailbox.Common.CommandOpcode = DAC960_V1_Write;
5542 DAC960_P_To_PD_TranslateReadWriteCommand(CommandMailbox);
5543 break;
5544 case DAC960_V1_ReadWithScatterGather_Old:
5545 Command->V1.CommandMailbox.Common.CommandOpcode =
5546 DAC960_V1_ReadWithScatterGather;
5547 DAC960_P_To_PD_TranslateReadWriteCommand(CommandMailbox);
5548 break;
5549 case DAC960_V1_WriteWithScatterGather_Old:
5550 Command->V1.CommandMailbox.Common.CommandOpcode =
5551 DAC960_V1_WriteWithScatterGather;
5552 DAC960_P_To_PD_TranslateReadWriteCommand(CommandMailbox);
5553 break;
5554 default:
5555 break;
5556 }
5557 DAC960_V1_ProcessCompletedCommand(Command);
5558 }
5559 /*
5560 Attempt to remove additional I/O Requests from the Controller's
5561 I/O Request Queue and queue them to the Controller.
5562 */
5563 DAC960_ProcessRequest(Controller);
5564 spin_unlock_irqrestore(&Controller->queue_lock, flags);
5565 return IRQ_HANDLED;
5566}
5567
5568
5569/*
5570 DAC960_V1_QueueMonitoringCommand queues a Monitoring Command to DAC960 V1
5571 Firmware Controllers.
5572*/
5573
5574static void DAC960_V1_QueueMonitoringCommand(DAC960_Command_T *Command)
5575{
5576 DAC960_Controller_T *Controller = Command->Controller;
5577 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
5578 DAC960_V1_ClearCommand(Command);
5579 Command->CommandType = DAC960_MonitoringCommand;
5580 CommandMailbox->Type3.CommandOpcode = DAC960_V1_Enquiry;
5581 CommandMailbox->Type3.BusAddress = Controller->V1.NewEnquiryDMA;
5582 DAC960_QueueCommand(Command);
5583}
5584
5585
5586/*
5587 DAC960_V2_QueueMonitoringCommand queues a Monitoring Command to DAC960 V2
5588 Firmware Controllers.
5589*/
5590
5591static void DAC960_V2_QueueMonitoringCommand(DAC960_Command_T *Command)
5592{
5593 DAC960_Controller_T *Controller = Command->Controller;
5594 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
5595 DAC960_V2_ClearCommand(Command);
5596 Command->CommandType = DAC960_MonitoringCommand;
5597 CommandMailbox->ControllerInfo.CommandOpcode = DAC960_V2_IOCTL;
5598 CommandMailbox->ControllerInfo.CommandControlBits
5599 .DataTransferControllerToHost = true;
5600 CommandMailbox->ControllerInfo.CommandControlBits
5601 .NoAutoRequestSense = true;
5602 CommandMailbox->ControllerInfo.DataTransferSize =
5603 sizeof(DAC960_V2_ControllerInfo_T);
5604 CommandMailbox->ControllerInfo.ControllerNumber = 0;
5605 CommandMailbox->ControllerInfo.IOCTL_Opcode = DAC960_V2_GetControllerInfo;
5606 CommandMailbox->ControllerInfo.DataTransferMemoryAddress
5607 .ScatterGatherSegments[0]
5608 .SegmentDataPointer =
5609 Controller->V2.NewControllerInformationDMA;
5610 CommandMailbox->ControllerInfo.DataTransferMemoryAddress
5611 .ScatterGatherSegments[0]
5612 .SegmentByteCount =
5613 CommandMailbox->ControllerInfo.DataTransferSize;
5614 DAC960_QueueCommand(Command);
5615}
5616
5617
5618/*
5619 DAC960_MonitoringTimerFunction is the timer function for monitoring
5620 the status of DAC960 Controllers.
5621*/
5622
e99e88a9 5623static void DAC960_MonitoringTimerFunction(struct timer_list *t)
1da177e4 5624{
e99e88a9 5625 DAC960_Controller_T *Controller = from_timer(Controller, t, MonitoringTimer);
1da177e4
LT		 5626 DAC960_Command_T *Command;
5627 unsigned long flags;
5628
5629 if (Controller->FirmwareType == DAC960_V1_Controller)
5630 {
5631 spin_lock_irqsave(&Controller->queue_lock, flags);
5632 /*
5633 Queue a Status Monitoring Command to Controller.
5634 */
5635 Command = DAC960_AllocateCommand(Controller);
5636 if (Command != NULL)
5637 DAC960_V1_QueueMonitoringCommand(Command);
5638 else Controller->MonitoringCommandDeferred = true;
5639 spin_unlock_irqrestore(&Controller->queue_lock, flags);
5640 }
5641 else
5642 {
5643 DAC960_V2_ControllerInfo_T *ControllerInfo =
5644 &Controller->V2.ControllerInformation;
5645 unsigned int StatusChangeCounter =
5646 Controller->V2.HealthStatusBuffer->StatusChangeCounter;
87d156bf 5647 bool ForceMonitoringCommand = false;
50297cbf
MFP		 5648 if (time_after(jiffies, Controller->SecondaryMonitoringTime
5649 + DAC960_SecondaryMonitoringInterval))
1da177e4
LT		 5650 {
5651 int LogicalDriveNumber;
5652 for (LogicalDriveNumber = 0;
5653 LogicalDriveNumber < DAC960_MaxLogicalDrives;
5654 LogicalDriveNumber++)
5655 {
5656 DAC960_V2_LogicalDeviceInfo_T *LogicalDeviceInfo =
5657 Controller->V2.LogicalDeviceInformation[LogicalDriveNumber];
5658 if (LogicalDeviceInfo == NULL) continue;
5659 if (!LogicalDeviceInfo->LogicalDeviceControl
5660 .LogicalDeviceInitialized)
5661 {
5662 ForceMonitoringCommand = true;
5663 break;
5664 }
5665 }
5666 Controller->SecondaryMonitoringTime = jiffies;
5667 }
5668 if (StatusChangeCounter == Controller->V2.StatusChangeCounter &&
5669 Controller->V2.HealthStatusBuffer->NextEventSequenceNumber
5670 == Controller->V2.NextEventSequenceNumber &&
5671 (ControllerInfo->BackgroundInitializationsActive +
5672 ControllerInfo->LogicalDeviceInitializationsActive +
5673 ControllerInfo->PhysicalDeviceInitializationsActive +
5674 ControllerInfo->ConsistencyChecksActive +
5675 ControllerInfo->RebuildsActive +
5676 ControllerInfo->OnlineExpansionsActive == 0 ||
50297cbf
MFP		 5677 time_before(jiffies, Controller->PrimaryMonitoringTime
5678 + DAC960_MonitoringTimerInterval)) &&
1da177e4
LT		 5679 !ForceMonitoringCommand)
5680 {
5681 Controller->MonitoringTimer.expires =
5682 jiffies + DAC960_HealthStatusMonitoringInterval;
5683 add_timer(&Controller->MonitoringTimer);
5684 return;
5685 }
5686 Controller->V2.StatusChangeCounter = StatusChangeCounter;
5687 Controller->PrimaryMonitoringTime = jiffies;
5688
5689 spin_lock_irqsave(&Controller->queue_lock, flags);
5690 /*
5691 Queue a Status Monitoring Command to Controller.
5692 */
5693 Command = DAC960_AllocateCommand(Controller);
5694 if (Command != NULL)
5695 DAC960_V2_QueueMonitoringCommand(Command);
5696 else Controller->MonitoringCommandDeferred = true;
5697 spin_unlock_irqrestore(&Controller->queue_lock, flags);
5698 /*
5699 Wake up any processes waiting on a Health Status Buffer change.
5700 */
5701 wake_up(&Controller->HealthStatusWaitQueue);
5702 }
5703}
5704
5705/*
5706 DAC960_CheckStatusBuffer verifies that there is room to hold ByteCount
5707 additional bytes in the Combined Status Buffer and grows the buffer if
5708 necessary. It returns true if there is enough room and false otherwise.
5709*/
5710
87d156bf 5711static bool DAC960_CheckStatusBuffer(DAC960_Controller_T *Controller,
1da177e4
LT		 5712 unsigned int ByteCount)
5713{
5714 unsigned char *NewStatusBuffer;
5715 if (Controller->InitialStatusLength + 1 +
5716 Controller->CurrentStatusLength + ByteCount + 1 <=
5717 Controller->CombinedStatusBufferLength)
5718 return true;
5719 if (Controller->CombinedStatusBufferLength == 0)
5720 {
5721 unsigned int NewStatusBufferLength = DAC960_InitialStatusBufferSize;
5722 while (NewStatusBufferLength < ByteCount)
5723 NewStatusBufferLength *= 2;
0a361e31
AD		 5724 Controller->CombinedStatusBuffer = kmalloc(NewStatusBufferLength,
5725 GFP_ATOMIC);
1da177e4
LT		 5726 if (Controller->CombinedStatusBuffer == NULL) return false;
5727 Controller->CombinedStatusBufferLength = NewStatusBufferLength;
5728 return true;
5729 }
0a361e31
AD		 5730 NewStatusBuffer = kmalloc(2 * Controller->CombinedStatusBufferLength,
5731 GFP_ATOMIC);
1da177e4
LT		 5732 if (NewStatusBuffer == NULL)
5733 {
5734 DAC960_Warning("Unable to expand Combined Status Buffer - Truncating\n",
5735 Controller);
5736 return false;
5737 }
5738 memcpy(NewStatusBuffer, Controller->CombinedStatusBuffer,
5739 Controller->CombinedStatusBufferLength);
5740 kfree(Controller->CombinedStatusBuffer);
5741 Controller->CombinedStatusBuffer = NewStatusBuffer;
5742 Controller->CombinedStatusBufferLength *= 2;
5743 Controller->CurrentStatusBuffer =
5744 &NewStatusBuffer[Controller->InitialStatusLength + 1];
5745 return true;
5746}
5747
5748
5749/*
5750 DAC960_Message prints Driver Messages.
5751*/
5752
5753static void DAC960_Message(DAC960_MessageLevel_T MessageLevel,
5754 unsigned char *Format,
5755 DAC960_Controller_T *Controller,
5756 ...)
5757{
5758 static unsigned char Buffer[DAC960_LineBufferSize];
87d156bf 5759 static bool BeginningOfLine = true;
1da177e4
LT		 5760 va_list Arguments;
5761 int Length = 0;
5762 va_start(Arguments, Controller);
5763 Length = vsprintf(Buffer, Format, Arguments);
5764 va_end(Arguments);
5765 if (Controller == NULL)
5766 printk("%sDAC960#%d: %s", DAC960_MessageLevelMap[MessageLevel],
5767 DAC960_ControllerCount, Buffer);
5768 else if (MessageLevel == DAC960_AnnounceLevel ||
5769 MessageLevel == DAC960_InfoLevel)
5770 {
5771 if (!Controller->ControllerInitialized)
5772 {
5773 if (DAC960_CheckStatusBuffer(Controller, Length))
5774 {
5775 strcpy(&Controller->CombinedStatusBuffer
5776 [Controller->InitialStatusLength],
5777 Buffer);
5778 Controller->InitialStatusLength += Length;
5779 Controller->CurrentStatusBuffer =
5780 &Controller->CombinedStatusBuffer
5781 [Controller->InitialStatusLength + 1];
5782 }
5783 if (MessageLevel == DAC960_AnnounceLevel)
5784 {
5785 static int AnnouncementLines = 0;
5786 if (++AnnouncementLines <= 2)
5787 printk("%sDAC960: %s", DAC960_MessageLevelMap[MessageLevel],
5788 Buffer);
5789 }
5790 else
5791 {
5792 if (BeginningOfLine)
5793 {
5794 if (Buffer[0] != '\n' || Length > 1)
5795 printk("%sDAC960#%d: %s",
5796 DAC960_MessageLevelMap[MessageLevel],
5797 Controller->ControllerNumber, Buffer);
5798 }
5799 else printk("%s", Buffer);
5800 }
5801 }
5802 else if (DAC960_CheckStatusBuffer(Controller, Length))
5803 {
5804 strcpy(&Controller->CurrentStatusBuffer[
5805 Controller->CurrentStatusLength], Buffer);
5806 Controller->CurrentStatusLength += Length;
5807 }
5808 }
5809 else if (MessageLevel == DAC960_ProgressLevel)
5810 {
5811 strcpy(Controller->ProgressBuffer, Buffer);
5812 Controller->ProgressBufferLength = Length;
5813 if (Controller->EphemeralProgressMessage)
5814 {
50297cbf
MFP		 5815 if (time_after_eq(jiffies, Controller->LastProgressReportTime
5816 + DAC960_ProgressReportingInterval))
1da177e4
LT		 5817 {
5818 printk("%sDAC960#%d: %s", DAC960_MessageLevelMap[MessageLevel],
5819 Controller->ControllerNumber, Buffer);
5820 Controller->LastProgressReportTime = jiffies;
5821 }
5822 }
5823 else printk("%sDAC960#%d: %s", DAC960_MessageLevelMap[MessageLevel],
5824 Controller->ControllerNumber, Buffer);
5825 }
5826 else if (MessageLevel == DAC960_UserCriticalLevel)
5827 {
5828 strcpy(&Controller->UserStatusBuffer[Controller->UserStatusLength],
5829 Buffer);
5830 Controller->UserStatusLength += Length;
5831 if (Buffer[0] != '\n' || Length > 1)
5832 printk("%sDAC960#%d: %s", DAC960_MessageLevelMap[MessageLevel],
5833 Controller->ControllerNumber, Buffer);
5834 }
5835 else
5836 {
5837 if (BeginningOfLine)
5838 printk("%sDAC960#%d: %s", DAC960_MessageLevelMap[MessageLevel],
5839 Controller->ControllerNumber, Buffer);
5840 else printk("%s", Buffer);
5841 }
5842 BeginningOfLine = (Buffer[Length-1] == '\n');
5843}
5844
5845
5846/*
5847 DAC960_ParsePhysicalDevice parses spaces followed by a Physical Device
5848 Channel:TargetID specification from a User Command string. It updates
5849 Channel and TargetID and returns true on success and false on failure.
5850*/
5851
87d156bf 5852static bool DAC960_ParsePhysicalDevice(DAC960_Controller_T *Controller,
1da177e4
LT		 5853 char *UserCommandString,
5854 unsigned char *Channel,
5855 unsigned char *TargetID)
5856{
5857 char *NewUserCommandString = UserCommandString;
5858 unsigned long XChannel, XTargetID;
5859 while (*UserCommandString == ' ') UserCommandString++;
5860 if (UserCommandString == NewUserCommandString)
5861 return false;
5862 XChannel = simple_strtoul(UserCommandString, &NewUserCommandString, 10);
5863 if (NewUserCommandString == UserCommandString ||
5864 *NewUserCommandString != ':' ||
5865 XChannel >= Controller->Channels)
5866 return false;
5867 UserCommandString = ++NewUserCommandString;
5868 XTargetID = simple_strtoul(UserCommandString, &NewUserCommandString, 10);
5869 if (NewUserCommandString == UserCommandString ||
5870 *NewUserCommandString != '\0' ||
5871 XTargetID >= Controller->Targets)
5872 return false;
5873 *Channel = XChannel;
5874 *TargetID = XTargetID;
5875 return true;
5876}
5877
5878
5879/*
5880 DAC960_ParseLogicalDrive parses spaces followed by a Logical Drive Number
5881 specification from a User Command string. It updates LogicalDriveNumber and
5882 returns true on success and false on failure.
5883*/
5884
87d156bf 5885static bool DAC960_ParseLogicalDrive(DAC960_Controller_T *Controller,
1da177e4
LT		 5886 char *UserCommandString,
5887 unsigned char *LogicalDriveNumber)
5888{
5889 char *NewUserCommandString = UserCommandString;
5890 unsigned long XLogicalDriveNumber;
5891 while (*UserCommandString == ' ') UserCommandString++;
5892 if (UserCommandString == NewUserCommandString)
5893 return false;
5894 XLogicalDriveNumber =
5895 simple_strtoul(UserCommandString, &NewUserCommandString, 10);
5896 if (NewUserCommandString == UserCommandString ||
5897 *NewUserCommandString != '\0' ||
5898 XLogicalDriveNumber > DAC960_MaxLogicalDrives - 1)
5899 return false;
5900 *LogicalDriveNumber = XLogicalDriveNumber;
5901 return true;
5902}
5903
5904
5905/*
5906 DAC960_V1_SetDeviceState sets the Device State for a Physical Device for
5907 DAC960 V1 Firmware Controllers.
5908*/
5909
5910static void DAC960_V1_SetDeviceState(DAC960_Controller_T *Controller,
5911 DAC960_Command_T *Command,
5912 unsigned char Channel,
5913 unsigned char TargetID,
5914 DAC960_V1_PhysicalDeviceState_T
5915 DeviceState,
5916 const unsigned char *DeviceStateString)
5917{
5918 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
5919 CommandMailbox->Type3D.CommandOpcode = DAC960_V1_StartDevice;
5920 CommandMailbox->Type3D.Channel = Channel;
5921 CommandMailbox->Type3D.TargetID = TargetID;
5922 CommandMailbox->Type3D.DeviceState = DeviceState;
5923 CommandMailbox->Type3D.Modifier = 0;
5924 DAC960_ExecuteCommand(Command);
5925 switch (Command->V1.CommandStatus)
5926 {
5927 case DAC960_V1_NormalCompletion:
5928 DAC960_UserCritical("%s of Physical Device %d:%d Succeeded\n", Controller,
5929 DeviceStateString, Channel, TargetID);
5930 break;
5931 case DAC960_V1_UnableToStartDevice:
5932 DAC960_UserCritical("%s of Physical Device %d:%d Failed - "
5933 "Unable to Start Device\n", Controller,
5934 DeviceStateString, Channel, TargetID);
5935 break;
5936 case DAC960_V1_NoDeviceAtAddress:
5937 DAC960_UserCritical("%s of Physical Device %d:%d Failed - "
5938 "No Device at Address\n", Controller,
5939 DeviceStateString, Channel, TargetID);
5940 break;
5941 case DAC960_V1_InvalidChannelOrTargetOrModifier:
5942 DAC960_UserCritical("%s of Physical Device %d:%d Failed - "
5943 "Invalid Channel or Target or Modifier\n",
5944 Controller, DeviceStateString, Channel, TargetID);
5945 break;
5946 case DAC960_V1_ChannelBusy:
5947 DAC960_UserCritical("%s of Physical Device %d:%d Failed - "
5948 "Channel Busy\n", Controller,
5949 DeviceStateString, Channel, TargetID);
5950 break;
5951 default:
5952 DAC960_UserCritical("%s of Physical Device %d:%d Failed - "
5953 "Unexpected Status %04X\n", Controller,
5954 DeviceStateString, Channel, TargetID,
5955 Command->V1.CommandStatus);
5956 break;
5957 }
5958}
5959
5960
5961/*
5962 DAC960_V1_ExecuteUserCommand executes a User Command for DAC960 V1 Firmware
5963 Controllers.
5964*/
5965
87d156bf 5966static bool DAC960_V1_ExecuteUserCommand(DAC960_Controller_T *Controller,
1da177e4
LT		 5967 unsigned char *UserCommand)
5968{
5969 DAC960_Command_T *Command;
5970 DAC960_V1_CommandMailbox_T *CommandMailbox;
5971 unsigned long flags;
5972 unsigned char Channel, TargetID, LogicalDriveNumber;
5973
5974 spin_lock_irqsave(&Controller->queue_lock, flags);
5975 while ((Command = DAC960_AllocateCommand(Controller)) == NULL)
5976 DAC960_WaitForCommand(Controller);
5977 spin_unlock_irqrestore(&Controller->queue_lock, flags);
5978 Controller->UserStatusLength = 0;
5979 DAC960_V1_ClearCommand(Command);
5980 Command->CommandType = DAC960_ImmediateCommand;
5981 CommandMailbox = &Command->V1.CommandMailbox;
5982 if (strcmp(UserCommand, "flush-cache") == 0)
5983 {
5984 CommandMailbox->Type3.CommandOpcode = DAC960_V1_Flush;
5985 DAC960_ExecuteCommand(Command);
5986 DAC960_UserCritical("Cache Flush Completed\n", Controller);
5987 }
5988 else if (strncmp(UserCommand, "kill", 4) == 0 &&
5989 DAC960_ParsePhysicalDevice(Controller, &UserCommand[4],
5990 &Channel, &TargetID))
5991 {
5992 DAC960_V1_DeviceState_T *DeviceState =
5993 &Controller->V1.DeviceState[Channel][TargetID];
5994 if (DeviceState->Present &&
5995 DeviceState->DeviceType == DAC960_V1_DiskType &&
5996 DeviceState->DeviceState != DAC960_V1_Device_Dead)
5997 DAC960_V1_SetDeviceState(Controller, Command, Channel, TargetID,
5998 DAC960_V1_Device_Dead, "Kill");
5999 else DAC960_UserCritical("Kill of Physical Device %d:%d Illegal\n",
6000 Controller, Channel, TargetID);
6001 }
6002 else if (strncmp(UserCommand, "make-online", 11) == 0 &&
6003 DAC960_ParsePhysicalDevice(Controller, &UserCommand[11],
6004 &Channel, &TargetID))
6005 {
6006 DAC960_V1_DeviceState_T *DeviceState =
6007 &Controller->V1.DeviceState[Channel][TargetID];
6008 if (DeviceState->Present &&
6009 DeviceState->DeviceType == DAC960_V1_DiskType &&
6010 DeviceState->DeviceState == DAC960_V1_Device_Dead)
6011 DAC960_V1_SetDeviceState(Controller, Command, Channel, TargetID,
6012 DAC960_V1_Device_Online, "Make Online");
6013 else DAC960_UserCritical("Make Online of Physical Device %d:%d Illegal\n",
6014 Controller, Channel, TargetID);
6015
6016 }
6017 else if (strncmp(UserCommand, "make-standby", 12) == 0 &&
6018 DAC960_ParsePhysicalDevice(Controller, &UserCommand[12],
6019 &Channel, &TargetID))
6020 {
6021 DAC960_V1_DeviceState_T *DeviceState =
6022 &Controller->V1.DeviceState[Channel][TargetID];
6023 if (DeviceState->Present &&
6024 DeviceState->DeviceType == DAC960_V1_DiskType &&
6025 DeviceState->DeviceState == DAC960_V1_Device_Dead)
6026 DAC960_V1_SetDeviceState(Controller, Command, Channel, TargetID,
6027 DAC960_V1_Device_Standby, "Make Standby");
6028 else DAC960_UserCritical("Make Standby of Physical "
6029 "Device %d:%d Illegal\n",
6030 Controller, Channel, TargetID);
6031 }
6032 else if (strncmp(UserCommand, "rebuild", 7) == 0 &&
6033 DAC960_ParsePhysicalDevice(Controller, &UserCommand[7],
6034 &Channel, &TargetID))
6035 {
6036 CommandMailbox->Type3D.CommandOpcode = DAC960_V1_RebuildAsync;
6037 CommandMailbox->Type3D.Channel = Channel;
6038 CommandMailbox->Type3D.TargetID = TargetID;
6039 DAC960_ExecuteCommand(Command);
6040 switch (Command->V1.CommandStatus)
6041 {
6042 case DAC960_V1_NormalCompletion:
6043 DAC960_UserCritical("Rebuild of Physical Device %d:%d Initiated\n",
6044 Controller, Channel, TargetID);
6045 break;
6046 case DAC960_V1_AttemptToRebuildOnlineDrive:
6047 DAC960_UserCritical("Rebuild of Physical Device %d:%d Failed - "
6048 "Attempt to Rebuild Online or "
6049 "Unresponsive Drive\n",
6050 Controller, Channel, TargetID);
6051 break;
6052 case DAC960_V1_NewDiskFailedDuringRebuild:
6053 DAC960_UserCritical("Rebuild of Physical Device %d:%d Failed - "
6054 "New Disk Failed During Rebuild\n",
6055 Controller, Channel, TargetID);
6056 break;
6057 case DAC960_V1_InvalidDeviceAddress:
6058 DAC960_UserCritical("Rebuild of Physical Device %d:%d Failed - "
6059 "Invalid Device Address\n",
6060 Controller, Channel, TargetID);
6061 break;
6062 case DAC960_V1_RebuildOrCheckAlreadyInProgress:
6063 DAC960_UserCritical("Rebuild of Physical Device %d:%d Failed - "
6064 "Rebuild or Consistency Check Already "
6065 "in Progress\n", Controller, Channel, TargetID);
6066 break;
6067 default:
6068 DAC960_UserCritical("Rebuild of Physical Device %d:%d Failed - "
6069 "Unexpected Status %04X\n", Controller,
6070 Channel, TargetID, Command->V1.CommandStatus);
6071 break;
6072 }
6073 }
6074 else if (strncmp(UserCommand, "check-consistency", 17) == 0 &&
6075 DAC960_ParseLogicalDrive(Controller, &UserCommand[17],
6076 &LogicalDriveNumber))
6077 {
6078 CommandMailbox->Type3C.CommandOpcode = DAC960_V1_CheckConsistencyAsync;
6079 CommandMailbox->Type3C.LogicalDriveNumber = LogicalDriveNumber;
6080 CommandMailbox->Type3C.AutoRestore = true;
6081 DAC960_ExecuteCommand(Command);
6082 switch (Command->V1.CommandStatus)
6083 {
6084 case DAC960_V1_NormalCompletion:
6085 DAC960_UserCritical("Consistency Check of Logical Drive %d "
6086 "(/dev/rd/c%dd%d) Initiated\n",
6087 Controller, LogicalDriveNumber,
6088 Controller->ControllerNumber,
6089 LogicalDriveNumber);
6090 break;
6091 case DAC960_V1_DependentDiskIsDead:
6092 DAC960_UserCritical("Consistency Check of Logical Drive %d "
6093 "(/dev/rd/c%dd%d) Failed - "
6094 "Dependent Physical Device is DEAD\n",
6095 Controller, LogicalDriveNumber,
6096 Controller->ControllerNumber,
6097 LogicalDriveNumber);
6098 break;
6099 case DAC960_V1_InvalidOrNonredundantLogicalDrive:
6100 DAC960_UserCritical("Consistency Check of Logical Drive %d "
6101 "(/dev/rd/c%dd%d) Failed - "
6102 "Invalid or Nonredundant Logical Drive\n",
6103 Controller, LogicalDriveNumber,
6104 Controller->ControllerNumber,
6105 LogicalDriveNumber);
6106 break;
6107 case DAC960_V1_RebuildOrCheckAlreadyInProgress:
6108 DAC960_UserCritical("Consistency Check of Logical Drive %d "
6109 "(/dev/rd/c%dd%d) Failed - Rebuild or "
6110 "Consistency Check Already in Progress\n",
6111 Controller, LogicalDriveNumber,
6112 Controller->ControllerNumber,
6113 LogicalDriveNumber);
6114 break;
6115 default:
6116 DAC960_UserCritical("Consistency Check of Logical Drive %d "
6117 "(/dev/rd/c%dd%d) Failed - "
6118 "Unexpected Status %04X\n",
6119 Controller, LogicalDriveNumber,
6120 Controller->ControllerNumber,
6121 LogicalDriveNumber, Command->V1.CommandStatus);
6122 break;
6123 }
6124 }
6125 else if (strcmp(UserCommand, "cancel-rebuild") == 0 ||
6126 strcmp(UserCommand, "cancel-consistency-check") == 0)
6127 {
6128 /*
6129 the OldRebuildRateConstant is never actually used
6130 once its value is retrieved from the controller.
6131 */
6132 unsigned char *OldRebuildRateConstant;
6133 dma_addr_t OldRebuildRateConstantDMA;
6134
6135 OldRebuildRateConstant = pci_alloc_consistent( Controller->PCIDevice,
6136 sizeof(char), &OldRebuildRateConstantDMA);
6137 if (OldRebuildRateConstant == NULL) {
6138 DAC960_UserCritical("Cancellation of Rebuild or "
6139 "Consistency Check Failed - "
6140 "Out of Memory",
6141 Controller);
6142 goto failure;
6143 }
6144 CommandMailbox->Type3R.CommandOpcode = DAC960_V1_RebuildControl;
6145 CommandMailbox->Type3R.RebuildRateConstant = 0xFF;
6146 CommandMailbox->Type3R.BusAddress = OldRebuildRateConstantDMA;
6147 DAC960_ExecuteCommand(Command);
6148 switch (Command->V1.CommandStatus)
6149 {
6150 case DAC960_V1_NormalCompletion:
6151 DAC960_UserCritical("Rebuild or Consistency Check Cancelled\n",
6152 Controller);
6153 break;
6154 default:
6155 DAC960_UserCritical("Cancellation of Rebuild or "
6156 "Consistency Check Failed - "
6157 "Unexpected Status %04X\n",
6158 Controller, Command->V1.CommandStatus);
6159 break;
6160 }
6161failure:
6162 pci_free_consistent(Controller->PCIDevice, sizeof(char),
6163 OldRebuildRateConstant, OldRebuildRateConstantDMA);
6164 }
6165 else DAC960_UserCritical("Illegal User Command: '%s'\n",
6166 Controller, UserCommand);
6167
6168 spin_lock_irqsave(&Controller->queue_lock, flags);
6169 DAC960_DeallocateCommand(Command);
6170 spin_unlock_irqrestore(&Controller->queue_lock, flags);
6171 return true;
6172}
6173
6174
6175/*
6176 DAC960_V2_TranslatePhysicalDevice translates a Physical Device Channel and
6177 TargetID into a Logical Device. It returns true on success and false
6178 on failure.
6179*/
6180
87d156bf 6181static bool DAC960_V2_TranslatePhysicalDevice(DAC960_Command_T *Command,
1da177e4
LT		 6182 unsigned char Channel,
6183 unsigned char TargetID,
6184 unsigned short
6185 *LogicalDeviceNumber)
6186{
6187 DAC960_V2_CommandMailbox_T SavedCommandMailbox, *CommandMailbox;
6188 DAC960_Controller_T *Controller = Command->Controller;
6189
6190 CommandMailbox = &Command->V2.CommandMailbox;
6191 memcpy(&SavedCommandMailbox, CommandMailbox,
6192 sizeof(DAC960_V2_CommandMailbox_T));
6193
6194 CommandMailbox->PhysicalDeviceInfo.CommandOpcode = DAC960_V2_IOCTL;
6195 CommandMailbox->PhysicalDeviceInfo.CommandControlBits
6196 .DataTransferControllerToHost = true;
6197 CommandMailbox->PhysicalDeviceInfo.CommandControlBits
6198 .NoAutoRequestSense = true;
6199 CommandMailbox->PhysicalDeviceInfo.DataTransferSize =
6200 sizeof(DAC960_V2_PhysicalToLogicalDevice_T);
6201 CommandMailbox->PhysicalDeviceInfo.PhysicalDevice.TargetID = TargetID;
6202 CommandMailbox->PhysicalDeviceInfo.PhysicalDevice.Channel = Channel;
6203 CommandMailbox->PhysicalDeviceInfo.IOCTL_Opcode =
6204 DAC960_V2_TranslatePhysicalToLogicalDevice;
6205 CommandMailbox->Common.DataTransferMemoryAddress
6206 .ScatterGatherSegments[0]
6207 .SegmentDataPointer =
6208 Controller->V2.PhysicalToLogicalDeviceDMA;
6209 CommandMailbox->Common.DataTransferMemoryAddress
6210 .ScatterGatherSegments[0]
6211 .SegmentByteCount =
6212 CommandMailbox->Common.DataTransferSize;
6213
6214 DAC960_ExecuteCommand(Command);
6215 *LogicalDeviceNumber = Controller->V2.PhysicalToLogicalDevice->LogicalDeviceNumber;
6216
6217 memcpy(CommandMailbox, &SavedCommandMailbox,
6218 sizeof(DAC960_V2_CommandMailbox_T));
6219 return (Command->V2.CommandStatus == DAC960_V2_NormalCompletion);
6220}
6221
6222
6223/*
6224 DAC960_V2_ExecuteUserCommand executes a User Command for DAC960 V2 Firmware
6225 Controllers.
6226*/
6227
87d156bf 6228static bool DAC960_V2_ExecuteUserCommand(DAC960_Controller_T *Controller,
1da177e4
LT		 6229 unsigned char *UserCommand)
6230{
6231 DAC960_Command_T *Command;
6232 DAC960_V2_CommandMailbox_T *CommandMailbox;
6233 unsigned long flags;
6234 unsigned char Channel, TargetID, LogicalDriveNumber;
6235 unsigned short LogicalDeviceNumber;
6236
6237 spin_lock_irqsave(&Controller->queue_lock, flags);
6238 while ((Command = DAC960_AllocateCommand(Controller)) == NULL)
6239 DAC960_WaitForCommand(Controller);
6240 spin_unlock_irqrestore(&Controller->queue_lock, flags);
6241 Controller->UserStatusLength = 0;
6242 DAC960_V2_ClearCommand(Command);
6243 Command->CommandType = DAC960_ImmediateCommand;
6244 CommandMailbox = &Command->V2.CommandMailbox;
6245 CommandMailbox->Common.CommandOpcode = DAC960_V2_IOCTL;
6246 CommandMailbox->Common.CommandControlBits.DataTransferControllerToHost = true;
6247 CommandMailbox->Common.CommandControlBits.NoAutoRequestSense = true;
6248 if (strcmp(UserCommand, "flush-cache") == 0)
6249 {
6250 CommandMailbox->DeviceOperation.IOCTL_Opcode = DAC960_V2_PauseDevice;
6251 CommandMailbox->DeviceOperation.OperationDevice =
6252 DAC960_V2_RAID_Controller;
6253 DAC960_ExecuteCommand(Command);
6254 DAC960_UserCritical("Cache Flush Completed\n", Controller);
6255 }
6256 else if (strncmp(UserCommand, "kill", 4) == 0 &&
6257 DAC960_ParsePhysicalDevice(Controller, &UserCommand[4],
6258 &Channel, &TargetID) &&
6259 DAC960_V2_TranslatePhysicalDevice(Command, Channel, TargetID,
6260 &LogicalDeviceNumber))
6261 {
6262 CommandMailbox->SetDeviceState.LogicalDevice.LogicalDeviceNumber =
6263 LogicalDeviceNumber;
6264 CommandMailbox->SetDeviceState.IOCTL_Opcode =
6265 DAC960_V2_SetDeviceState;
6266 CommandMailbox->SetDeviceState.DeviceState.PhysicalDeviceState =
6267 DAC960_V2_Device_Dead;
6268 DAC960_ExecuteCommand(Command);
6269 DAC960_UserCritical("Kill of Physical Device %d:%d %s\n",
6270 Controller, Channel, TargetID,
6271 (Command->V2.CommandStatus
6272 == DAC960_V2_NormalCompletion
6273 ? "Succeeded" : "Failed"));
6274 }
6275 else if (strncmp(UserCommand, "make-online", 11) == 0 &&
6276 DAC960_ParsePhysicalDevice(Controller, &UserCommand[11],
6277 &Channel, &TargetID) &&
6278 DAC960_V2_TranslatePhysicalDevice(Command, Channel, TargetID,
6279 &LogicalDeviceNumber))
6280 {
6281 CommandMailbox->SetDeviceState.LogicalDevice.LogicalDeviceNumber =
6282 LogicalDeviceNumber;
6283 CommandMailbox->SetDeviceState.IOCTL_Opcode =
6284 DAC960_V2_SetDeviceState;
6285 CommandMailbox->SetDeviceState.DeviceState.PhysicalDeviceState =
6286 DAC960_V2_Device_Online;
6287 DAC960_ExecuteCommand(Command);
6288 DAC960_UserCritical("Make Online of Physical Device %d:%d %s\n",
6289 Controller, Channel, TargetID,
6290 (Command->V2.CommandStatus
6291 == DAC960_V2_NormalCompletion
6292 ? "Succeeded" : "Failed"));
6293 }
6294 else if (strncmp(UserCommand, "make-standby", 12) == 0 &&
6295 DAC960_ParsePhysicalDevice(Controller, &UserCommand[12],
6296 &Channel, &TargetID) &&
6297 DAC960_V2_TranslatePhysicalDevice(Command, Channel, TargetID,
6298 &LogicalDeviceNumber))
6299 {
6300 CommandMailbox->SetDeviceState.LogicalDevice.LogicalDeviceNumber =
6301 LogicalDeviceNumber;
6302 CommandMailbox->SetDeviceState.IOCTL_Opcode =
6303 DAC960_V2_SetDeviceState;
6304 CommandMailbox->SetDeviceState.DeviceState.PhysicalDeviceState =
6305 DAC960_V2_Device_Standby;
6306 DAC960_ExecuteCommand(Command);
6307 DAC960_UserCritical("Make Standby of Physical Device %d:%d %s\n",
6308 Controller, Channel, TargetID,
6309 (Command->V2.CommandStatus
6310 == DAC960_V2_NormalCompletion
6311 ? "Succeeded" : "Failed"));
6312 }
6313 else if (strncmp(UserCommand, "rebuild", 7) == 0 &&
6314 DAC960_ParsePhysicalDevice(Controller, &UserCommand[7],
6315 &Channel, &TargetID) &&
6316 DAC960_V2_TranslatePhysicalDevice(Command, Channel, TargetID,
6317 &LogicalDeviceNumber))
6318 {
6319 CommandMailbox->LogicalDeviceInfo.LogicalDevice.LogicalDeviceNumber =
6320 LogicalDeviceNumber;
6321 CommandMailbox->LogicalDeviceInfo.IOCTL_Opcode =
6322 DAC960_V2_RebuildDeviceStart;
6323 DAC960_ExecuteCommand(Command);
6324 DAC960_UserCritical("Rebuild of Physical Device %d:%d %s\n",
6325 Controller, Channel, TargetID,
6326 (Command->V2.CommandStatus
6327 == DAC960_V2_NormalCompletion
6328 ? "Initiated" : "Not Initiated"));
6329 }
6330 else if (strncmp(UserCommand, "cancel-rebuild", 14) == 0 &&
6331 DAC960_ParsePhysicalDevice(Controller, &UserCommand[14],
6332 &Channel, &TargetID) &&
6333 DAC960_V2_TranslatePhysicalDevice(Command, Channel, TargetID,
6334 &LogicalDeviceNumber))
6335 {
6336 CommandMailbox->LogicalDeviceInfo.LogicalDevice.LogicalDeviceNumber =
6337 LogicalDeviceNumber;
6338 CommandMailbox->LogicalDeviceInfo.IOCTL_Opcode =
6339 DAC960_V2_RebuildDeviceStop;
6340 DAC960_ExecuteCommand(Command);
6341 DAC960_UserCritical("Rebuild of Physical Device %d:%d %s\n",
6342 Controller, Channel, TargetID,
6343 (Command->V2.CommandStatus
6344 == DAC960_V2_NormalCompletion
6345 ? "Cancelled" : "Not Cancelled"));
6346 }
6347 else if (strncmp(UserCommand, "check-consistency", 17) == 0 &&
6348 DAC960_ParseLogicalDrive(Controller, &UserCommand[17],
6349 &LogicalDriveNumber))
6350 {
6351 CommandMailbox->ConsistencyCheck.LogicalDevice.LogicalDeviceNumber =
6352 LogicalDriveNumber;
6353 CommandMailbox->ConsistencyCheck.IOCTL_Opcode =
6354 DAC960_V2_ConsistencyCheckStart;
6355 CommandMailbox->ConsistencyCheck.RestoreConsistency = true;
6356 CommandMailbox->ConsistencyCheck.InitializedAreaOnly = false;
6357 DAC960_ExecuteCommand(Command);
6358 DAC960_UserCritical("Consistency Check of Logical Drive %d "
6359 "(/dev/rd/c%dd%d) %s\n",
6360 Controller, LogicalDriveNumber,
6361 Controller->ControllerNumber,
6362 LogicalDriveNumber,
6363 (Command->V2.CommandStatus
6364 == DAC960_V2_NormalCompletion
6365 ? "Initiated" : "Not Initiated"));
6366 }
6367 else if (strncmp(UserCommand, "cancel-consistency-check", 24) == 0 &&
6368 DAC960_ParseLogicalDrive(Controller, &UserCommand[24],
6369 &LogicalDriveNumber))
6370 {
6371 CommandMailbox->ConsistencyCheck.LogicalDevice.LogicalDeviceNumber =
6372 LogicalDriveNumber;
6373 CommandMailbox->ConsistencyCheck.IOCTL_Opcode =
6374 DAC960_V2_ConsistencyCheckStop;
6375 DAC960_ExecuteCommand(Command);
6376 DAC960_UserCritical("Consistency Check of Logical Drive %d "
6377 "(/dev/rd/c%dd%d) %s\n",
6378 Controller, LogicalDriveNumber,
6379 Controller->ControllerNumber,
6380 LogicalDriveNumber,
6381 (Command->V2.CommandStatus
6382 == DAC960_V2_NormalCompletion
6383 ? "Cancelled" : "Not Cancelled"));
6384 }
6385 else if (strcmp(UserCommand, "perform-discovery") == 0)
6386 {
6387 CommandMailbox->Common.IOCTL_Opcode = DAC960_V2_StartDiscovery;
6388 DAC960_ExecuteCommand(Command);
6389 DAC960_UserCritical("Discovery %s\n", Controller,
6390 (Command->V2.CommandStatus
6391 == DAC960_V2_NormalCompletion
6392 ? "Initiated" : "Not Initiated"));
6393 if (Command->V2.CommandStatus == DAC960_V2_NormalCompletion)
6394 {
6395 CommandMailbox->ControllerInfo.CommandOpcode = DAC960_V2_IOCTL;
6396 CommandMailbox->ControllerInfo.CommandControlBits
6397 .DataTransferControllerToHost = true;
6398 CommandMailbox->ControllerInfo.CommandControlBits
6399 .NoAutoRequestSense = true;
6400 CommandMailbox->ControllerInfo.DataTransferSize =
6401 sizeof(DAC960_V2_ControllerInfo_T);
6402 CommandMailbox->ControllerInfo.ControllerNumber = 0;
6403 CommandMailbox->ControllerInfo.IOCTL_Opcode =
6404 DAC960_V2_GetControllerInfo;
6405 /*
6406 * How does this NOT race with the queued Monitoring
6407 * usage of this structure?
6408 */
6409 CommandMailbox->ControllerInfo.DataTransferMemoryAddress
6410 .ScatterGatherSegments[0]
6411 .SegmentDataPointer =
6412 Controller->V2.NewControllerInformationDMA;
6413 CommandMailbox->ControllerInfo.DataTransferMemoryAddress
6414 .ScatterGatherSegments[0]
6415 .SegmentByteCount =
6416 CommandMailbox->ControllerInfo.DataTransferSize;
9c552e1d
AB		 6417 while (1) {
6418 DAC960_ExecuteCommand(Command);
6419 if (!Controller->V2.NewControllerInformation->PhysicalScanActive)
6420 break;
6421 msleep(1000);
6422 }
1da177e4
LT		 6423 DAC960_UserCritical("Discovery Completed\n", Controller);
6424 }
6425 }
6426 else if (strcmp(UserCommand, "suppress-enclosure-messages") == 0)
6427 Controller->SuppressEnclosureMessages = true;
6428 else DAC960_UserCritical("Illegal User Command: '%s'\n",
6429 Controller, UserCommand);
6430
6431 spin_lock_irqsave(&Controller->queue_lock, flags);
6432 DAC960_DeallocateCommand(Command);
6433 spin_unlock_irqrestore(&Controller->queue_lock, flags);
6434 return true;
6435}
6436
a138d3cb 6437static int __maybe_unused dac960_proc_show(struct seq_file *m, void *v)
1da177e4
LT		 6438{
6439 unsigned char *StatusMessage = "OK\n";
d5d03eec 6440 int ControllerNumber;
1da177e4
LT		 6441 for (ControllerNumber = 0;
6442 ControllerNumber < DAC960_ControllerCount;
6443 ControllerNumber++)
6444 {
6445 DAC960_Controller_T *Controller = DAC960_Controllers[ControllerNumber];
6446 if (Controller == NULL) continue;
6447 if (Controller->MonitoringAlertMode)
6448 {
6449 StatusMessage = "ALERT\n";
6450 break;
6451 }
6452 }
d5d03eec
AD		 6453 seq_puts(m, StatusMessage);
6454 return 0;
1da177e4
LT		 6455}
6456
d5d03eec
AD		 6457static int dac960_proc_open(struct inode *inode, struct file *file)
6458{
6459 return single_open(file, dac960_proc_show, NULL);
6460}
1da177e4 6461
d5d03eec
AD		 6462static const struct file_operations dac960_proc_fops = {
6463 .owner = THIS_MODULE,
6464 .open = dac960_proc_open,
6465 .read = seq_read,
6466 .llseek = seq_lseek,
6467 .release = single_release,
6468};
1da177e4 6469
a138d3cb
RD		 6470static int __maybe_unused dac960_initial_status_proc_show(struct seq_file *m,
6471 void *v)
1da177e4 6472{
d5d03eec
AD		 6473 DAC960_Controller_T *Controller = (DAC960_Controller_T *)m->private;
6474 seq_printf(m, "%.*s", Controller->InitialStatusLength, Controller->CombinedStatusBuffer);
6475 return 0;
1da177e4
LT		 6476}
6477
d5d03eec
AD		 6478static int dac960_initial_status_proc_open(struct inode *inode, struct file *file)
6479{
d9dda78b 6480 return single_open(file, dac960_initial_status_proc_show, PDE_DATA(inode));
d5d03eec 6481}
1da177e4 6482
d5d03eec
AD		 6483static const struct file_operations dac960_initial_status_proc_fops = {
6484 .owner = THIS_MODULE,
6485 .open = dac960_initial_status_proc_open,
6486 .read = seq_read,
6487 .llseek = seq_lseek,
6488 .release = single_release,
6489};
1da177e4 6490
a138d3cb
RD		 6491static int __maybe_unused dac960_current_status_proc_show(struct seq_file *m,
6492 void *v)
1da177e4 6493{
d5d03eec 6494 DAC960_Controller_T *Controller = (DAC960_Controller_T *) m->private;
1da177e4
LT		 6495 unsigned char *StatusMessage =
6496 "No Rebuild or Consistency Check in Progress\n";
6497 int ProgressMessageLength = strlen(StatusMessage);
1da177e4
LT		 6498 if (jiffies != Controller->LastCurrentStatusTime)
6499 {
6500 Controller->CurrentStatusLength = 0;
6501 DAC960_AnnounceDriver(Controller);
6502 DAC960_ReportControllerConfiguration(Controller);
6503 DAC960_ReportDeviceConfiguration(Controller);
6504 if (Controller->ProgressBufferLength > 0)
6505 ProgressMessageLength = Controller->ProgressBufferLength;
6506 if (DAC960_CheckStatusBuffer(Controller, 2 + ProgressMessageLength))
6507 {
6508 unsigned char *CurrentStatusBuffer = Controller->CurrentStatusBuffer;
6509 CurrentStatusBuffer[Controller->CurrentStatusLength++] = ' ';
6510 CurrentStatusBuffer[Controller->CurrentStatusLength++] = ' ';
6511 if (Controller->ProgressBufferLength > 0)
6512 strcpy(&CurrentStatusBuffer[Controller->CurrentStatusLength],
6513 Controller->ProgressBuffer);
6514 else
6515 strcpy(&CurrentStatusBuffer[Controller->CurrentStatusLength],
6516 StatusMessage);
6517 Controller->CurrentStatusLength += ProgressMessageLength;
6518 }
6519 Controller->LastCurrentStatusTime = jiffies;
6520 }
d5d03eec
AD		 6521 seq_printf(m, "%.*s", Controller->CurrentStatusLength, Controller->CurrentStatusBuffer);
6522 return 0;
1da177e4
LT		 6523}
6524
d5d03eec
AD		 6525static int dac960_current_status_proc_open(struct inode *inode, struct file *file)
6526{
d9dda78b 6527 return single_open(file, dac960_current_status_proc_show, PDE_DATA(inode));
d5d03eec 6528}
1da177e4 6529
d5d03eec
AD		 6530static const struct file_operations dac960_current_status_proc_fops = {
6531 .owner = THIS_MODULE,
6532 .open = dac960_current_status_proc_open,
6533 .read = seq_read,
6534 .llseek = seq_lseek,
6535 .release = single_release,
6536};
1da177e4 6537
d5d03eec 6538static int dac960_user_command_proc_show(struct seq_file *m, void *v)
1da177e4 6539{
d5d03eec 6540 DAC960_Controller_T *Controller = (DAC960_Controller_T *)m->private;
1da177e4 6541
d5d03eec
AD		 6542 seq_printf(m, "%.*s", Controller->UserStatusLength, Controller->UserStatusBuffer);
6543 return 0;
6544}
1da177e4 6545
d5d03eec
AD		 6546static int dac960_user_command_proc_open(struct inode *inode, struct file *file)
6547{
d9dda78b 6548 return single_open(file, dac960_user_command_proc_show, PDE_DATA(inode));
d5d03eec 6549}
1da177e4 6550
d5d03eec 6551static ssize_t dac960_user_command_proc_write(struct file *file,
1da177e4 6552 const char __user *Buffer,
d5d03eec 6553 size_t Count, loff_t *pos)
1da177e4 6554{
d9dda78b 6555 DAC960_Controller_T *Controller = PDE_DATA(file_inode(file));
1da177e4
LT		 6556 unsigned char CommandBuffer[80];
6557 int Length;
6558 if (Count > sizeof(CommandBuffer)-1) return -EINVAL;
6559 if (copy_from_user(CommandBuffer, Buffer, Count)) return -EFAULT;
6560 CommandBuffer[Count] = '\0';
6561 Length = strlen(CommandBuffer);
e8988933 6562 if (Length > 0 && CommandBuffer[Length-1] == '\n')
1da177e4
LT		 6563 CommandBuffer[--Length] = '\0';
6564 if (Controller->FirmwareType == DAC960_V1_Controller)
6565 return (DAC960_V1_ExecuteUserCommand(Controller, CommandBuffer)
6566 ? Count : -EBUSY);
6567 else
6568 return (DAC960_V2_ExecuteUserCommand(Controller, CommandBuffer)
6569 ? Count : -EBUSY);
6570}
6571
d5d03eec
AD		 6572static const struct file_operations dac960_user_command_proc_fops = {
6573 .owner = THIS_MODULE,
6574 .open = dac960_user_command_proc_open,
6575 .read = seq_read,
6576 .llseek = seq_lseek,
6577 .release = single_release,
6578 .write = dac960_user_command_proc_write,
6579};
1da177e4
LT		 6580
6581/*
6582 DAC960_CreateProcEntries creates the /proc/rd/... entries for the
6583 DAC960 Driver.
6584*/
6585
6586static void DAC960_CreateProcEntries(DAC960_Controller_T *Controller)
6587{
1da177e4 6588 struct proc_dir_entry *ControllerProcEntry;
1da177e4
LT		 6589
6590 if (DAC960_ProcDirectoryEntry == NULL) {
d88a440e
JJ		 6591 DAC960_ProcDirectoryEntry = proc_mkdir("rd", NULL);
6592 proc_create("status", 0, DAC960_ProcDirectoryEntry,
6593 &dac960_proc_fops);
1da177e4
LT		 6594 }
6595
33027c2b
AB		 6596 snprintf(Controller->ControllerName, sizeof(Controller->ControllerName),
6597 "c%d", Controller->ControllerNumber);
d88a440e
JJ		 6598 ControllerProcEntry = proc_mkdir(Controller->ControllerName,
6599 DAC960_ProcDirectoryEntry);
6600 proc_create_data("initial_status", 0, ControllerProcEntry, &dac960_initial_status_proc_fops, Controller);
6601 proc_create_data("current_status", 0, ControllerProcEntry, &dac960_current_status_proc_fops, Controller);
6602 proc_create_data("user_command", S_IWUSR | S_IRUSR, ControllerProcEntry, &dac960_user_command_proc_fops, Controller);
6603 Controller->ControllerProcEntry = ControllerProcEntry;
1da177e4
LT		 6604}
6605
6606
6607/*
6608 DAC960_DestroyProcEntries destroys the /proc/rd/... entries for the
6609 DAC960 Driver.
6610*/
6611
6612static void DAC960_DestroyProcEntries(DAC960_Controller_T *Controller)
6613{
6614 if (Controller->ControllerProcEntry == NULL)
6615 return;
6616 remove_proc_entry("initial_status", Controller->ControllerProcEntry);
6617 remove_proc_entry("current_status", Controller->ControllerProcEntry);
6618 remove_proc_entry("user_command", Controller->ControllerProcEntry);
6619 remove_proc_entry(Controller->ControllerName, DAC960_ProcDirectoryEntry);
6620 Controller->ControllerProcEntry = NULL;
6621}
6622
6623#ifdef DAC960_GAM_MINOR
6624
6625/*
6626 * DAC960_gam_ioctl is the ioctl function for performing RAID operations.
6627*/
6628
2610324f
AC		 6629static long DAC960_gam_ioctl(struct file *file, unsigned int Request,
6630 unsigned long Argument)
1da177e4 6631{
2610324f 6632 long ErrorCode = 0;
1da177e4 6633 if (!capable(CAP_SYS_ADMIN)) return -EACCES;
2610324f 6634
2a48fc0a 6635 mutex_lock(&DAC960_mutex);
1da177e4
LT		 6636 switch (Request)
6637 {
6638 case DAC960_IOCTL_GET_CONTROLLER_COUNT:
2610324f
AC		 6639 ErrorCode = DAC960_ControllerCount;
6640 break;
1da177e4
LT		 6641 case DAC960_IOCTL_GET_CONTROLLER_INFO:
6642 {
6643 DAC960_ControllerInfo_T __user *UserSpaceControllerInfo =
6644 (DAC960_ControllerInfo_T __user *) Argument;
6645 DAC960_ControllerInfo_T ControllerInfo;
6646 DAC960_Controller_T *Controller;
6647 int ControllerNumber;
2610324f
AC		 6648 if (UserSpaceControllerInfo == NULL)
6649 ErrorCode = -EINVAL;
6650 else ErrorCode = get_user(ControllerNumber,
1da177e4 6651 &UserSpaceControllerInfo->ControllerNumber);
2610324f 6652 if (ErrorCode != 0)
a419aef8 6653 break;
2610324f 6654 ErrorCode = -ENXIO;
1da177e4 6655 if (ControllerNumber < 0 ||
2610324f
AC		 6656 ControllerNumber > DAC960_ControllerCount - 1) {
6657 break;
6658 }
1da177e4 6659 Controller = DAC960_Controllers[ControllerNumber];
2610324f 6660 if (Controller == NULL)
a419aef8 6661 break;
1da177e4
LT		 6662 memset(&ControllerInfo, 0, sizeof(DAC960_ControllerInfo_T));
6663 ControllerInfo.ControllerNumber = ControllerNumber;
6664 ControllerInfo.FirmwareType = Controller->FirmwareType;
6665 ControllerInfo.Channels = Controller->Channels;
6666 ControllerInfo.Targets = Controller->Targets;
6667 ControllerInfo.PCI_Bus = Controller->Bus;
6668 ControllerInfo.PCI_Device = Controller->Device;
6669 ControllerInfo.PCI_Function = Controller->Function;
6670 ControllerInfo.IRQ_Channel = Controller->IRQ_Channel;
6671 ControllerInfo.PCI_Address = Controller->PCI_Address;
6672 strcpy(ControllerInfo.ModelName, Controller->ModelName);
6673 strcpy(ControllerInfo.FirmwareVersion, Controller->FirmwareVersion);
2610324f 6674 ErrorCode = (copy_to_user(UserSpaceControllerInfo, &ControllerInfo,
1da177e4 6675 sizeof(DAC960_ControllerInfo_T)) ? -EFAULT : 0);
2610324f 6676 break;
1da177e4
LT		 6677 }
6678 case DAC960_IOCTL_V1_EXECUTE_COMMAND:
6679 {
6680 DAC960_V1_UserCommand_T __user *UserSpaceUserCommand =
6681 (DAC960_V1_UserCommand_T __user *) Argument;
6682 DAC960_V1_UserCommand_T UserCommand;
6683 DAC960_Controller_T *Controller;
6684 DAC960_Command_T *Command = NULL;
6685 DAC960_V1_CommandOpcode_T CommandOpcode;
6686 DAC960_V1_CommandStatus_T CommandStatus;
6687 DAC960_V1_DCDB_T DCDB;
6688 DAC960_V1_DCDB_T *DCDB_IOBUF = NULL;
6689 dma_addr_t DCDB_IOBUFDMA;
6690 unsigned long flags;
6691 int ControllerNumber, DataTransferLength;
6692 unsigned char *DataTransferBuffer = NULL;
6693 dma_addr_t DataTransferBufferDMA;
2610324f
AC		 6694 if (UserSpaceUserCommand == NULL) {
6695 ErrorCode = -EINVAL;
6696 break;
6697 }
1da177e4
LT		 6698 if (copy_from_user(&UserCommand, UserSpaceUserCommand,
6699 sizeof(DAC960_V1_UserCommand_T))) {
6700 ErrorCode = -EFAULT;
2610324f 6701 break;
1da177e4
LT		 6702 }
6703 ControllerNumber = UserCommand.ControllerNumber;
2610324f 6704 ErrorCode = -ENXIO;
1da177e4
LT		 6705 if (ControllerNumber < 0 ||
6706 ControllerNumber > DAC960_ControllerCount - 1)
2610324f 6707 break;
1da177e4 6708 Controller = DAC960_Controllers[ControllerNumber];
2610324f
AC		 6709 if (Controller == NULL)
6710 break;
6711 ErrorCode = -EINVAL;
6712 if (Controller->FirmwareType != DAC960_V1_Controller)
6713 break;
1da177e4
LT		 6714 CommandOpcode = UserCommand.CommandMailbox.Common.CommandOpcode;
6715 DataTransferLength = UserCommand.DataTransferLength;
2610324f
AC		 6716 if (CommandOpcode & 0x80)
6717 break;
1da177e4
LT		 6718 if (CommandOpcode == DAC960_V1_DCDB)
6719 {
6720 if (copy_from_user(&DCDB, UserCommand.DCDB,
6721 sizeof(DAC960_V1_DCDB_T))) {
6722 ErrorCode = -EFAULT;
2610324f 6723 break;
1da177e4 6724 }
2610324f
AC		 6725 if (DCDB.Channel >= DAC960_V1_MaxChannels)
6726 break;
1da177e4
LT		 6727 if (!((DataTransferLength == 0 &&
6728 DCDB.Direction
6729 == DAC960_V1_DCDB_NoDataTransfer) ||
6730 (DataTransferLength > 0 &&
6731 DCDB.Direction
6732 == DAC960_V1_DCDB_DataTransferDeviceToSystem) ||
6733 (DataTransferLength < 0 &&
6734 DCDB.Direction
6735 == DAC960_V1_DCDB_DataTransferSystemToDevice)))
2610324f 6736 break;
1da177e4
LT		 6737 if (((DCDB.TransferLengthHigh4 << 16) | DCDB.TransferLength)
6738 != abs(DataTransferLength))
2610324f 6739 break;
1da177e4
LT		 6740 DCDB_IOBUF = pci_alloc_consistent(Controller->PCIDevice,
6741 sizeof(DAC960_V1_DCDB_T), &DCDB_IOBUFDMA);
2610324f
AC		 6742 if (DCDB_IOBUF == NULL) {
6743 ErrorCode = -ENOMEM;
6744 break;
6745 }
1da177e4 6746 }
2610324f 6747 ErrorCode = -ENOMEM;
1da177e4
LT		 6748 if (DataTransferLength > 0)
6749 {
a5bbf616
JP		 6750 DataTransferBuffer = pci_zalloc_consistent(Controller->PCIDevice,
6751 DataTransferLength,
6752 &DataTransferBufferDMA);
2610324f
AC		 6753 if (DataTransferBuffer == NULL)
6754 break;
1da177e4
LT		 6755 }
6756 else if (DataTransferLength < 0)
6757 {
6758 DataTransferBuffer = pci_alloc_consistent(Controller->PCIDevice,
6759 -DataTransferLength, &DataTransferBufferDMA);
2610324f
AC		 6760 if (DataTransferBuffer == NULL)
6761 break;
1da177e4
LT		 6762 if (copy_from_user(DataTransferBuffer,
6763 UserCommand.DataTransferBuffer,
6764 -DataTransferLength)) {
6765 ErrorCode = -EFAULT;
2610324f 6766 break;
1da177e4
LT		 6767 }
6768 }
6769 if (CommandOpcode == DAC960_V1_DCDB)
6770 {
6771 spin_lock_irqsave(&Controller->queue_lock, flags);
6772 while ((Command = DAC960_AllocateCommand(Controller)) == NULL)
6773 DAC960_WaitForCommand(Controller);
6774 while (Controller->V1.DirectCommandActive[DCDB.Channel]
6775 [DCDB.TargetID])
6776 {
6777 spin_unlock_irq(&Controller->queue_lock);
6778 __wait_event(Controller->CommandWaitQueue,
6779 !Controller->V1.DirectCommandActive
6780 [DCDB.Channel][DCDB.TargetID]);
6781 spin_lock_irq(&Controller->queue_lock);
6782 }
6783 Controller->V1.DirectCommandActive[DCDB.Channel]
6784 [DCDB.TargetID] = true;
6785 spin_unlock_irqrestore(&Controller->queue_lock, flags);
6786 DAC960_V1_ClearCommand(Command);
6787 Command->CommandType = DAC960_ImmediateCommand;
6788 memcpy(&Command->V1.CommandMailbox, &UserCommand.CommandMailbox,
6789 sizeof(DAC960_V1_CommandMailbox_T));
6790 Command->V1.CommandMailbox.Type3.BusAddress = DCDB_IOBUFDMA;
6791 DCDB.BusAddress = DataTransferBufferDMA;
6792 memcpy(DCDB_IOBUF, &DCDB, sizeof(DAC960_V1_DCDB_T));
6793 }
6794 else
6795 {
6796 spin_lock_irqsave(&Controller->queue_lock, flags);
6797 while ((Command = DAC960_AllocateCommand(Controller)) == NULL)
6798 DAC960_WaitForCommand(Controller);
6799 spin_unlock_irqrestore(&Controller->queue_lock, flags);
6800 DAC960_V1_ClearCommand(Command);
6801 Command->CommandType = DAC960_ImmediateCommand;
6802 memcpy(&Command->V1.CommandMailbox, &UserCommand.CommandMailbox,
6803 sizeof(DAC960_V1_CommandMailbox_T));
6804 if (DataTransferBuffer != NULL)
6805 Command->V1.CommandMailbox.Type3.BusAddress =
6806 DataTransferBufferDMA;
6807 }
6808 DAC960_ExecuteCommand(Command);
6809 CommandStatus = Command->V1.CommandStatus;
6810 spin_lock_irqsave(&Controller->queue_lock, flags);
6811 DAC960_DeallocateCommand(Command);
6812 spin_unlock_irqrestore(&Controller->queue_lock, flags);
6813 if (DataTransferLength > 0)
6814 {
6815 if (copy_to_user(UserCommand.DataTransferBuffer,
6816 DataTransferBuffer, DataTransferLength)) {
6817 ErrorCode = -EFAULT;
6818 goto Failure1;
6819 }
6820 }
6821 if (CommandOpcode == DAC960_V1_DCDB)
6822 {
6823 /*
6824 I don't believe Target or Channel in the DCDB_IOBUF
6825 should be any different from the contents of DCDB.
6826 */
6827 Controller->V1.DirectCommandActive[DCDB.Channel]
6828 [DCDB.TargetID] = false;
6829 if (copy_to_user(UserCommand.DCDB, DCDB_IOBUF,
6830 sizeof(DAC960_V1_DCDB_T))) {
6831 ErrorCode = -EFAULT;
6832 goto Failure1;
6833 }
6834 }
6835 ErrorCode = CommandStatus;
6836 Failure1:
6837 if (DataTransferBuffer != NULL)
6838 pci_free_consistent(Controller->PCIDevice, abs(DataTransferLength),
6839 DataTransferBuffer, DataTransferBufferDMA);
6840 if (DCDB_IOBUF != NULL)
6841 pci_free_consistent(Controller->PCIDevice, sizeof(DAC960_V1_DCDB_T),
6842 DCDB_IOBUF, DCDB_IOBUFDMA);
2610324f 6843 break;
1da177e4
LT		 6844 }
6845 case DAC960_IOCTL_V2_EXECUTE_COMMAND:
6846 {
6847 DAC960_V2_UserCommand_T __user *UserSpaceUserCommand =
6848 (DAC960_V2_UserCommand_T __user *) Argument;
6849 DAC960_V2_UserCommand_T UserCommand;
6850 DAC960_Controller_T *Controller;
6851 DAC960_Command_T *Command = NULL;
6852 DAC960_V2_CommandMailbox_T *CommandMailbox;
6853 DAC960_V2_CommandStatus_T CommandStatus;
6854 unsigned long flags;
6855 int ControllerNumber, DataTransferLength;
6856 int DataTransferResidue, RequestSenseLength;
6857 unsigned char *DataTransferBuffer = NULL;
6858 dma_addr_t DataTransferBufferDMA;
6859 unsigned char *RequestSenseBuffer = NULL;
6860 dma_addr_t RequestSenseBufferDMA;
2610324f
AC		 6861
6862 ErrorCode = -EINVAL;
6863 if (UserSpaceUserCommand == NULL)
6864 break;
1da177e4
LT		 6865 if (copy_from_user(&UserCommand, UserSpaceUserCommand,
6866 sizeof(DAC960_V2_UserCommand_T))) {
6867 ErrorCode = -EFAULT;
2610324f 6868 break;
1da177e4 6869 }
2610324f 6870 ErrorCode = -ENXIO;
1da177e4
LT		 6871 ControllerNumber = UserCommand.ControllerNumber;
6872 if (ControllerNumber < 0 ||
6873 ControllerNumber > DAC960_ControllerCount - 1)
2610324f 6874 break;
1da177e4 6875 Controller = DAC960_Controllers[ControllerNumber];
2610324f
AC		 6876 if (Controller == NULL)
6877 break;
6878 if (Controller->FirmwareType != DAC960_V2_Controller){
6879 ErrorCode = -EINVAL;
6880 break;
6881 }
1da177e4 6882 DataTransferLength = UserCommand.DataTransferLength;
2610324f 6883 ErrorCode = -ENOMEM;
1da177e4
LT		 6884 if (DataTransferLength > 0)
6885 {
a5bbf616
JP		 6886 DataTransferBuffer = pci_zalloc_consistent(Controller->PCIDevice,
6887 DataTransferLength,
6888 &DataTransferBufferDMA);
2610324f
AC		 6889 if (DataTransferBuffer == NULL)
6890 break;
1da177e4
LT		 6891 }
6892 else if (DataTransferLength < 0)
6893 {
6894 DataTransferBuffer = pci_alloc_consistent(Controller->PCIDevice,
6895 -DataTransferLength, &DataTransferBufferDMA);
2610324f
AC		 6896 if (DataTransferBuffer == NULL)
6897 break;
1da177e4
LT		 6898 if (copy_from_user(DataTransferBuffer,
6899 UserCommand.DataTransferBuffer,
6900 -DataTransferLength)) {
6901 ErrorCode = -EFAULT;
6902 goto Failure2;
6903 }
6904 }
6905 RequestSenseLength = UserCommand.RequestSenseLength;
6906 if (RequestSenseLength > 0)
6907 {
a5bbf616
JP		 6908 RequestSenseBuffer = pci_zalloc_consistent(Controller->PCIDevice,
6909 RequestSenseLength,
6910 &RequestSenseBufferDMA);
1da177e4
LT		 6911 if (RequestSenseBuffer == NULL)
6912 {
6913 ErrorCode = -ENOMEM;
6914 goto Failure2;
6915 }
1da177e4
LT		 6916 }
6917 spin_lock_irqsave(&Controller->queue_lock, flags);
6918 while ((Command = DAC960_AllocateCommand(Controller)) == NULL)
6919 DAC960_WaitForCommand(Controller);
6920 spin_unlock_irqrestore(&Controller->queue_lock, flags);
6921 DAC960_V2_ClearCommand(Command);
6922 Command->CommandType = DAC960_ImmediateCommand;
6923 CommandMailbox = &Command->V2.CommandMailbox;
6924 memcpy(CommandMailbox, &UserCommand.CommandMailbox,
6925 sizeof(DAC960_V2_CommandMailbox_T));
6926 CommandMailbox->Common.CommandControlBits
6927 .AdditionalScatterGatherListMemory = false;
6928 CommandMailbox->Common.CommandControlBits
6929 .NoAutoRequestSense = true;
6930 CommandMailbox->Common.DataTransferSize = 0;
6931 CommandMailbox->Common.DataTransferPageNumber = 0;
6932 memset(&CommandMailbox->Common.DataTransferMemoryAddress, 0,
6933 sizeof(DAC960_V2_DataTransferMemoryAddress_T));
6934 if (DataTransferLength != 0)
6935 {
6936 if (DataTransferLength > 0)
6937 {
6938 CommandMailbox->Common.CommandControlBits
6939 .DataTransferControllerToHost = true;
6940 CommandMailbox->Common.DataTransferSize = DataTransferLength;
6941 }
6942 else
6943 {
6944 CommandMailbox->Common.CommandControlBits
6945 .DataTransferControllerToHost = false;
6946 CommandMailbox->Common.DataTransferSize = -DataTransferLength;
6947 }
6948 CommandMailbox->Common.DataTransferMemoryAddress
6949 .ScatterGatherSegments[0]
6950 .SegmentDataPointer = DataTransferBufferDMA;
6951 CommandMailbox->Common.DataTransferMemoryAddress
6952 .ScatterGatherSegments[0]
6953 .SegmentByteCount =
6954 CommandMailbox->Common.DataTransferSize;
6955 }
6956 if (RequestSenseLength > 0)
6957 {
6958 CommandMailbox->Common.CommandControlBits
6959 .NoAutoRequestSense = false;
6960 CommandMailbox->Common.RequestSenseSize = RequestSenseLength;
6961 CommandMailbox->Common.RequestSenseBusAddress =
6962 RequestSenseBufferDMA;
6963 }
6964 DAC960_ExecuteCommand(Command);
6965 CommandStatus = Command->V2.CommandStatus;
6966 RequestSenseLength = Command->V2.RequestSenseLength;
6967 DataTransferResidue = Command->V2.DataTransferResidue;
6968 spin_lock_irqsave(&Controller->queue_lock, flags);
6969 DAC960_DeallocateCommand(Command);
6970 spin_unlock_irqrestore(&Controller->queue_lock, flags);
6971 if (RequestSenseLength > UserCommand.RequestSenseLength)
6972 RequestSenseLength = UserCommand.RequestSenseLength;
6973 if (copy_to_user(&UserSpaceUserCommand->DataTransferLength,
6974 &DataTransferResidue,
6975 sizeof(DataTransferResidue))) {
6976 ErrorCode = -EFAULT;
6977 goto Failure2;
6978 }
6979 if (copy_to_user(&UserSpaceUserCommand->RequestSenseLength,
6980 &RequestSenseLength, sizeof(RequestSenseLength))) {
6981 ErrorCode = -EFAULT;
6982 goto Failure2;
6983 }
6984 if (DataTransferLength > 0)
6985 {
6986 if (copy_to_user(UserCommand.DataTransferBuffer,
6987 DataTransferBuffer, DataTransferLength)) {
6988 ErrorCode = -EFAULT;
6989 goto Failure2;
6990 }
6991 }
6992 if (RequestSenseLength > 0)
6993 {
6994 if (copy_to_user(UserCommand.RequestSenseBuffer,
6995 RequestSenseBuffer, RequestSenseLength)) {
6996 ErrorCode = -EFAULT;
6997 goto Failure2;
6998 }
6999 }
7000 ErrorCode = CommandStatus;
7001 Failure2:
7002 pci_free_consistent(Controller->PCIDevice, abs(DataTransferLength),
7003 DataTransferBuffer, DataTransferBufferDMA);
7004 if (RequestSenseBuffer != NULL)
7005 pci_free_consistent(Controller->PCIDevice, RequestSenseLength,
7006 RequestSenseBuffer, RequestSenseBufferDMA);
2610324f 7007 break;
1da177e4
LT		 7008 }
7009 case DAC960_IOCTL_V2_GET_HEALTH_STATUS:
7010 {
7011 DAC960_V2_GetHealthStatus_T __user *UserSpaceGetHealthStatus =
7012 (DAC960_V2_GetHealthStatus_T __user *) Argument;
7013 DAC960_V2_GetHealthStatus_T GetHealthStatus;
7014 DAC960_V2_HealthStatusBuffer_T HealthStatusBuffer;
7015 DAC960_Controller_T *Controller;
7016 int ControllerNumber;
2610324f
AC		 7017 if (UserSpaceGetHealthStatus == NULL) {
7018 ErrorCode = -EINVAL;
7019 break;
7020 }
1da177e4 7021 if (copy_from_user(&GetHealthStatus, UserSpaceGetHealthStatus,
2610324f
AC		 7022 sizeof(DAC960_V2_GetHealthStatus_T))) {
7023 ErrorCode = -EFAULT;
7024 break;
7025 }
7026 ErrorCode = -ENXIO;
1da177e4
LT		 7027 ControllerNumber = GetHealthStatus.ControllerNumber;
7028 if (ControllerNumber < 0 ||
7029 ControllerNumber > DAC960_ControllerCount - 1)
2610324f 7030 break;
1da177e4 7031 Controller = DAC960_Controllers[ControllerNumber];
2610324f
AC		 7032 if (Controller == NULL)
7033 break;
7034 if (Controller->FirmwareType != DAC960_V2_Controller) {
7035 ErrorCode = -EINVAL;
7036 break;
7037 }
1da177e4
LT		 7038 if (copy_from_user(&HealthStatusBuffer,
7039 GetHealthStatus.HealthStatusBuffer,
2610324f
AC		 7040 sizeof(DAC960_V2_HealthStatusBuffer_T))) {
7041 ErrorCode = -EFAULT;
7042 break;
7043 }
9c552e1d
AB		 7044 ErrorCode = wait_event_interruptible_timeout(Controller->HealthStatusWaitQueue,
7045 !(Controller->V2.HealthStatusBuffer->StatusChangeCounter
7046 == HealthStatusBuffer.StatusChangeCounter &&
7047 Controller->V2.HealthStatusBuffer->NextEventSequenceNumber
7048 == HealthStatusBuffer.NextEventSequenceNumber),
7049 DAC960_MonitoringTimerInterval);
7050 if (ErrorCode == -ERESTARTSYS) {
7051 ErrorCode = -EINTR;
7052 break;
7053 }
1da177e4
LT		 7054 if (copy_to_user(GetHealthStatus.HealthStatusBuffer,
7055 Controller->V2.HealthStatusBuffer,
7056 sizeof(DAC960_V2_HealthStatusBuffer_T)))
2610324f
AC		 7057 ErrorCode = -EFAULT;
7058 else
7059 ErrorCode = 0;
1da177e4 7060 }
3d6a8743 7061 break;
2610324f
AC		 7062 default:
7063 ErrorCode = -ENOTTY;
1da177e4 7064 }
2a48fc0a 7065 mutex_unlock(&DAC960_mutex);
2610324f 7066 return ErrorCode;
1da177e4
LT		 7067}
7068
2b8693c0 7069static const struct file_operations DAC960_gam_fops = {
1da177e4 7070 .owner = THIS_MODULE,
6038f373
AB		 7071 .unlocked_ioctl = DAC960_gam_ioctl,
7072 .llseek = noop_llseek,
1da177e4
LT		 7073};
7074
7075static struct miscdevice DAC960_gam_dev = {
7076 DAC960_GAM_MINOR,
7077 "dac960_gam",
7078 &DAC960_gam_fops
7079};
7080
7081static int DAC960_gam_init(void)
7082{
7083 int ret;
7084
7085 ret = misc_register(&DAC960_gam_dev);
7086 if (ret)
7087 printk(KERN_ERR "DAC960_gam: can't misc_register on minor %d\n", DAC960_GAM_MINOR);
7088 return ret;
7089}
7090
7091static void DAC960_gam_cleanup(void)
7092{
7093 misc_deregister(&DAC960_gam_dev);
7094}
7095
7096#endif /* DAC960_GAM_MINOR */
7097
5b76ffd5
CH		 7098static struct DAC960_privdata DAC960_GEM_privdata = {
7099 .HardwareType = DAC960_GEM_Controller,
7100 .FirmwareType = DAC960_V2_Controller,
7101 .InterruptHandler = DAC960_GEM_InterruptHandler,
7102 .MemoryWindowSize = DAC960_GEM_RegisterWindowSize,
7103};
7104
7105
1da177e4
LT		 7106static struct DAC960_privdata DAC960_BA_privdata = {
7107 .HardwareType = DAC960_BA_Controller,
7108 .FirmwareType = DAC960_V2_Controller,
7109 .InterruptHandler = DAC960_BA_InterruptHandler,
7110 .MemoryWindowSize = DAC960_BA_RegisterWindowSize,
7111};
7112
7113static struct DAC960_privdata DAC960_LP_privdata = {
7114 .HardwareType = DAC960_LP_Controller,
df9dc83d 7115 .FirmwareType = DAC960_V2_Controller,
1da177e4
LT		 7116 .InterruptHandler = DAC960_LP_InterruptHandler,
7117 .MemoryWindowSize = DAC960_LP_RegisterWindowSize,
7118};
7119
7120static struct DAC960_privdata DAC960_LA_privdata = {
7121 .HardwareType = DAC960_LA_Controller,
7122 .FirmwareType = DAC960_V1_Controller,
7123 .InterruptHandler = DAC960_LA_InterruptHandler,
7124 .MemoryWindowSize = DAC960_LA_RegisterWindowSize,
7125};
7126
7127static struct DAC960_privdata DAC960_PG_privdata = {
7128 .HardwareType = DAC960_PG_Controller,
7129 .FirmwareType = DAC960_V1_Controller,
7130 .InterruptHandler = DAC960_PG_InterruptHandler,
7131 .MemoryWindowSize = DAC960_PG_RegisterWindowSize,
7132};
7133
7134static struct DAC960_privdata DAC960_PD_privdata = {
7135 .HardwareType = DAC960_PD_Controller,
7136 .FirmwareType = DAC960_V1_Controller,
7137 .InterruptHandler = DAC960_PD_InterruptHandler,
7138 .MemoryWindowSize = DAC960_PD_RegisterWindowSize,
7139};
7140
7141static struct DAC960_privdata DAC960_P_privdata = {
7142 .HardwareType = DAC960_P_Controller,
7143 .FirmwareType = DAC960_V1_Controller,
7144 .InterruptHandler = DAC960_P_InterruptHandler,
7145 .MemoryWindowSize = DAC960_PD_RegisterWindowSize,
7146};
7147
3d447ec0 7148static const struct pci_device_id DAC960_id_table[] = {
5b76ffd5
CH		 7149 {
7150 .vendor = PCI_VENDOR_ID_MYLEX,
7151 .device = PCI_DEVICE_ID_MYLEX_DAC960_GEM,
fddafd3d 7152 .subvendor = PCI_VENDOR_ID_MYLEX,
5b76ffd5
CH		 7153 .subdevice = PCI_ANY_ID,
7154 .driver_data = (unsigned long) &DAC960_GEM_privdata,
7155 },
1da177e4
LT		 7156 {
7157 .vendor = PCI_VENDOR_ID_MYLEX,
7158 .device = PCI_DEVICE_ID_MYLEX_DAC960_BA,
7159 .subvendor = PCI_ANY_ID,
7160 .subdevice = PCI_ANY_ID,
7161 .driver_data = (unsigned long) &DAC960_BA_privdata,
7162 },
7163 {
7164 .vendor = PCI_VENDOR_ID_MYLEX,
7165 .device = PCI_DEVICE_ID_MYLEX_DAC960_LP,
7166 .subvendor = PCI_ANY_ID,
7167 .subdevice = PCI_ANY_ID,
7168 .driver_data = (unsigned long) &DAC960_LP_privdata,
7169 },
7170 {
7171 .vendor = PCI_VENDOR_ID_DEC,
7172 .device = PCI_DEVICE_ID_DEC_21285,
7173 .subvendor = PCI_VENDOR_ID_MYLEX,
7174 .subdevice = PCI_DEVICE_ID_MYLEX_DAC960_LA,
7175 .driver_data = (unsigned long) &DAC960_LA_privdata,
7176 },
7177 {
7178 .vendor = PCI_VENDOR_ID_MYLEX,
7179 .device = PCI_DEVICE_ID_MYLEX_DAC960_PG,
7180 .subvendor = PCI_ANY_ID,
7181 .subdevice = PCI_ANY_ID,
7182 .driver_data = (unsigned long) &DAC960_PG_privdata,
7183 },
7184 {
7185 .vendor = PCI_VENDOR_ID_MYLEX,
7186 .device = PCI_DEVICE_ID_MYLEX_DAC960_PD,
7187 .subvendor = PCI_ANY_ID,
7188 .subdevice = PCI_ANY_ID,
7189 .driver_data = (unsigned long) &DAC960_PD_privdata,
7190 },
7191 {
7192 .vendor = PCI_VENDOR_ID_MYLEX,
7193 .device = PCI_DEVICE_ID_MYLEX_DAC960_P,
7194 .subvendor = PCI_ANY_ID,
7195 .subdevice = PCI_ANY_ID,
7196 .driver_data = (unsigned long) &DAC960_P_privdata,
7197 },
7198 {0, },
7199};
7200
7201MODULE_DEVICE_TABLE(pci, DAC960_id_table);
7202
7203static struct pci_driver DAC960_pci_driver = {
7204 .name = "DAC960",
7205 .id_table = DAC960_id_table,
7206 .probe = DAC960_Probe,
7207 .remove = DAC960_Remove,
7208};
7209
3c36543a 7210static int __init DAC960_init_module(void)
1da177e4
LT		 7211{
7212 int ret;
7213
9bfab8ce 7214 ret = pci_register_driver(&DAC960_pci_driver);
1da177e4
LT		 7215#ifdef DAC960_GAM_MINOR
7216 if (!ret)
7217 DAC960_gam_init();
7218#endif
7219 return ret;
7220}
7221
3c36543a 7222static void __exit DAC960_cleanup_module(void)
1da177e4
LT		 7223{
7224 int i;
7225
7226#ifdef DAC960_GAM_MINOR
7227 DAC960_gam_cleanup();
7228#endif
7229
7230 for (i = 0; i < DAC960_ControllerCount; i++) {
7231 DAC960_Controller_T *Controller = DAC960_Controllers[i];
7232 if (Controller == NULL)
7233 continue;
7234 DAC960_FinalizeController(Controller);
7235 }
7236 if (DAC960_ProcDirectoryEntry != NULL) {
7237 remove_proc_entry("rd/status", NULL);
7238 remove_proc_entry("rd", NULL);
7239 }
7240 DAC960_ControllerCount = 0;
7241 pci_unregister_driver(&DAC960_pci_driver);
7242}
7243
7244module_init(DAC960_init_module);
7245module_exit(DAC960_cleanup_module);
7246
7247MODULE_LICENSE("GPL");
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