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1da177e4 LT |
1 | /* |
2 | ||
3 | Linux Driver for Mylex DAC960/AcceleRAID/eXtremeRAID PCI RAID Controllers | |
4 | ||
5 | Copyright 1998-2001 by Leonard N. Zubkoff <lnz@dandelion.com> | |
6 | ||
7 | This program is free software; you may redistribute and/or modify it under | |
8 | the terms of the GNU General Public License Version 2 as published by the | |
9 | Free Software Foundation. | |
10 | ||
11 | This program is distributed in the hope that it will be useful, but | |
12 | WITHOUT ANY WARRANTY, without even the implied warranty of MERCHANTABILITY | |
13 | or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
14 | for complete details. | |
15 | ||
16 | */ | |
17 | ||
18 | ||
19 | #define DAC960_DriverVersion "2.5.47" | |
20 | #define DAC960_DriverDate "14 November 2002" | |
21 | ||
22 | ||
23 | #include <linux/module.h> | |
24 | #include <linux/types.h> | |
25 | #include <linux/miscdevice.h> | |
26 | #include <linux/blkdev.h> | |
27 | #include <linux/bio.h> | |
28 | #include <linux/completion.h> | |
29 | #include <linux/delay.h> | |
30 | #include <linux/genhd.h> | |
31 | #include <linux/hdreg.h> | |
32 | #include <linux/blkpg.h> | |
33 | #include <linux/interrupt.h> | |
34 | #include <linux/ioport.h> | |
35 | #include <linux/mm.h> | |
36 | #include <linux/slab.h> | |
37 | #include <linux/proc_fs.h> | |
38 | #include <linux/reboot.h> | |
39 | #include <linux/spinlock.h> | |
40 | #include <linux/timer.h> | |
41 | #include <linux/pci.h> | |
42 | #include <linux/init.h> | |
43 | #include <asm/io.h> | |
44 | #include <asm/uaccess.h> | |
45 | #include "DAC960.h" | |
46 | ||
47 | #define DAC960_GAM_MINOR 252 | |
48 | ||
49 | ||
50 | static DAC960_Controller_T *DAC960_Controllers[DAC960_MaxControllers]; | |
51 | static int DAC960_ControllerCount; | |
52 | static struct proc_dir_entry *DAC960_ProcDirectoryEntry; | |
53 | ||
54 | static long disk_size(DAC960_Controller_T *p, int drive_nr) | |
55 | { | |
56 | if (p->FirmwareType == DAC960_V1_Controller) { | |
57 | if (drive_nr >= p->LogicalDriveCount) | |
58 | return 0; | |
59 | return p->V1.LogicalDriveInformation[drive_nr]. | |
60 | LogicalDriveSize; | |
61 | } else { | |
62 | DAC960_V2_LogicalDeviceInfo_T *i = | |
63 | p->V2.LogicalDeviceInformation[drive_nr]; | |
64 | if (i == NULL) | |
65 | return 0; | |
66 | return i->ConfigurableDeviceSize; | |
67 | } | |
68 | } | |
69 | ||
70 | static int DAC960_open(struct inode *inode, struct file *file) | |
71 | { | |
72 | struct gendisk *disk = inode->i_bdev->bd_disk; | |
73 | DAC960_Controller_T *p = disk->queue->queuedata; | |
74 | int drive_nr = (long)disk->private_data; | |
75 | ||
76 | if (p->FirmwareType == DAC960_V1_Controller) { | |
77 | if (p->V1.LogicalDriveInformation[drive_nr]. | |
78 | LogicalDriveState == DAC960_V1_LogicalDrive_Offline) | |
79 | return -ENXIO; | |
80 | } else { | |
81 | DAC960_V2_LogicalDeviceInfo_T *i = | |
82 | p->V2.LogicalDeviceInformation[drive_nr]; | |
83 | if (!i || i->LogicalDeviceState == DAC960_V2_LogicalDevice_Offline) | |
84 | return -ENXIO; | |
85 | } | |
86 | ||
87 | check_disk_change(inode->i_bdev); | |
88 | ||
89 | if (!get_capacity(p->disks[drive_nr])) | |
90 | return -ENXIO; | |
91 | return 0; | |
92 | } | |
93 | ||
94 | static int DAC960_ioctl(struct inode *inode, struct file *file, | |
95 | unsigned int cmd, unsigned long arg) | |
96 | { | |
97 | struct gendisk *disk = inode->i_bdev->bd_disk; | |
98 | DAC960_Controller_T *p = disk->queue->queuedata; | |
99 | int drive_nr = (long)disk->private_data; | |
100 | struct hd_geometry g; | |
101 | struct hd_geometry __user *loc = (struct hd_geometry __user *)arg; | |
102 | ||
103 | if (cmd != HDIO_GETGEO || !loc) | |
104 | return -EINVAL; | |
105 | ||
106 | if (p->FirmwareType == DAC960_V1_Controller) { | |
107 | g.heads = p->V1.GeometryTranslationHeads; | |
108 | g.sectors = p->V1.GeometryTranslationSectors; | |
109 | g.cylinders = p->V1.LogicalDriveInformation[drive_nr]. | |
110 | LogicalDriveSize / (g.heads * g.sectors); | |
111 | } else { | |
112 | DAC960_V2_LogicalDeviceInfo_T *i = | |
113 | p->V2.LogicalDeviceInformation[drive_nr]; | |
114 | switch (i->DriveGeometry) { | |
115 | case DAC960_V2_Geometry_128_32: | |
116 | g.heads = 128; | |
117 | g.sectors = 32; | |
118 | break; | |
119 | case DAC960_V2_Geometry_255_63: | |
120 | g.heads = 255; | |
121 | g.sectors = 63; | |
122 | break; | |
123 | default: | |
124 | DAC960_Error("Illegal Logical Device Geometry %d\n", | |
125 | p, i->DriveGeometry); | |
126 | return -EINVAL; | |
127 | } | |
128 | ||
129 | g.cylinders = i->ConfigurableDeviceSize / (g.heads * g.sectors); | |
130 | } | |
131 | ||
132 | g.start = get_start_sect(inode->i_bdev); | |
133 | ||
134 | return copy_to_user(loc, &g, sizeof g) ? -EFAULT : 0; | |
135 | } | |
136 | ||
137 | static int DAC960_media_changed(struct gendisk *disk) | |
138 | { | |
139 | DAC960_Controller_T *p = disk->queue->queuedata; | |
140 | int drive_nr = (long)disk->private_data; | |
141 | ||
142 | if (!p->LogicalDriveInitiallyAccessible[drive_nr]) | |
143 | return 1; | |
144 | return 0; | |
145 | } | |
146 | ||
147 | static int DAC960_revalidate_disk(struct gendisk *disk) | |
148 | { | |
149 | DAC960_Controller_T *p = disk->queue->queuedata; | |
150 | int unit = (long)disk->private_data; | |
151 | ||
152 | set_capacity(disk, disk_size(p, unit)); | |
153 | return 0; | |
154 | } | |
155 | ||
156 | static struct block_device_operations DAC960_BlockDeviceOperations = { | |
157 | .owner = THIS_MODULE, | |
158 | .open = DAC960_open, | |
159 | .ioctl = DAC960_ioctl, | |
160 | .media_changed = DAC960_media_changed, | |
161 | .revalidate_disk = DAC960_revalidate_disk, | |
162 | }; | |
163 | ||
164 | ||
165 | /* | |
166 | DAC960_AnnounceDriver announces the Driver Version and Date, Author's Name, | |
167 | Copyright Notice, and Electronic Mail Address. | |
168 | */ | |
169 | ||
170 | static void DAC960_AnnounceDriver(DAC960_Controller_T *Controller) | |
171 | { | |
172 | DAC960_Announce("***** DAC960 RAID Driver Version " | |
173 | DAC960_DriverVersion " of " | |
174 | DAC960_DriverDate " *****\n", Controller); | |
175 | DAC960_Announce("Copyright 1998-2001 by Leonard N. Zubkoff " | |
176 | "<lnz@dandelion.com>\n", Controller); | |
177 | } | |
178 | ||
179 | ||
180 | /* | |
181 | DAC960_Failure prints a standardized error message, and then returns false. | |
182 | */ | |
183 | ||
184 | static boolean DAC960_Failure(DAC960_Controller_T *Controller, | |
185 | unsigned char *ErrorMessage) | |
186 | { | |
187 | DAC960_Error("While configuring DAC960 PCI RAID Controller at\n", | |
188 | Controller); | |
189 | if (Controller->IO_Address == 0) | |
190 | DAC960_Error("PCI Bus %d Device %d Function %d I/O Address N/A " | |
191 | "PCI Address 0x%X\n", Controller, | |
192 | Controller->Bus, Controller->Device, | |
193 | Controller->Function, Controller->PCI_Address); | |
194 | else DAC960_Error("PCI Bus %d Device %d Function %d I/O Address " | |
195 | "0x%X PCI Address 0x%X\n", Controller, | |
196 | Controller->Bus, Controller->Device, | |
197 | Controller->Function, Controller->IO_Address, | |
198 | Controller->PCI_Address); | |
199 | DAC960_Error("%s FAILED - DETACHING\n", Controller, ErrorMessage); | |
200 | return false; | |
201 | } | |
202 | ||
203 | /* | |
204 | init_dma_loaf() and slice_dma_loaf() are helper functions for | |
205 | aggregating the dma-mapped memory for a well-known collection of | |
206 | data structures that are of different lengths. | |
207 | ||
208 | These routines don't guarantee any alignment. The caller must | |
209 | include any space needed for alignment in the sizes of the structures | |
210 | that are passed in. | |
211 | */ | |
212 | ||
213 | static boolean init_dma_loaf(struct pci_dev *dev, struct dma_loaf *loaf, | |
214 | size_t len) | |
215 | { | |
216 | void *cpu_addr; | |
217 | dma_addr_t dma_handle; | |
218 | ||
219 | cpu_addr = pci_alloc_consistent(dev, len, &dma_handle); | |
220 | if (cpu_addr == NULL) | |
221 | return false; | |
222 | ||
223 | loaf->cpu_free = loaf->cpu_base = cpu_addr; | |
224 | loaf->dma_free =loaf->dma_base = dma_handle; | |
225 | loaf->length = len; | |
226 | memset(cpu_addr, 0, len); | |
227 | return true; | |
228 | } | |
229 | ||
230 | static void *slice_dma_loaf(struct dma_loaf *loaf, size_t len, | |
231 | dma_addr_t *dma_handle) | |
232 | { | |
233 | void *cpu_end = loaf->cpu_free + len; | |
234 | void *cpu_addr = loaf->cpu_free; | |
235 | ||
236 | if (cpu_end > loaf->cpu_base + loaf->length) | |
237 | BUG(); | |
238 | *dma_handle = loaf->dma_free; | |
239 | loaf->cpu_free = cpu_end; | |
240 | loaf->dma_free += len; | |
241 | return cpu_addr; | |
242 | } | |
243 | ||
244 | static void free_dma_loaf(struct pci_dev *dev, struct dma_loaf *loaf_handle) | |
245 | { | |
246 | if (loaf_handle->cpu_base != NULL) | |
247 | pci_free_consistent(dev, loaf_handle->length, | |
248 | loaf_handle->cpu_base, loaf_handle->dma_base); | |
249 | } | |
250 | ||
251 | ||
252 | /* | |
253 | DAC960_CreateAuxiliaryStructures allocates and initializes the auxiliary | |
254 | data structures for Controller. It returns true on success and false on | |
255 | failure. | |
256 | */ | |
257 | ||
258 | static boolean DAC960_CreateAuxiliaryStructures(DAC960_Controller_T *Controller) | |
259 | { | |
260 | int CommandAllocationLength, CommandAllocationGroupSize; | |
261 | int CommandsRemaining = 0, CommandIdentifier, CommandGroupByteCount; | |
262 | void *AllocationPointer = NULL; | |
263 | void *ScatterGatherCPU = NULL; | |
264 | dma_addr_t ScatterGatherDMA; | |
265 | struct pci_pool *ScatterGatherPool; | |
266 | void *RequestSenseCPU = NULL; | |
267 | dma_addr_t RequestSenseDMA; | |
268 | struct pci_pool *RequestSensePool = NULL; | |
269 | ||
270 | if (Controller->FirmwareType == DAC960_V1_Controller) | |
271 | { | |
272 | CommandAllocationLength = offsetof(DAC960_Command_T, V1.EndMarker); | |
273 | CommandAllocationGroupSize = DAC960_V1_CommandAllocationGroupSize; | |
274 | ScatterGatherPool = pci_pool_create("DAC960_V1_ScatterGather", | |
275 | Controller->PCIDevice, | |
276 | DAC960_V1_ScatterGatherLimit * sizeof(DAC960_V1_ScatterGatherSegment_T), | |
277 | sizeof(DAC960_V1_ScatterGatherSegment_T), 0); | |
278 | if (ScatterGatherPool == NULL) | |
279 | return DAC960_Failure(Controller, | |
280 | "AUXILIARY STRUCTURE CREATION (SG)"); | |
281 | Controller->ScatterGatherPool = ScatterGatherPool; | |
282 | } | |
283 | else | |
284 | { | |
285 | CommandAllocationLength = offsetof(DAC960_Command_T, V2.EndMarker); | |
286 | CommandAllocationGroupSize = DAC960_V2_CommandAllocationGroupSize; | |
287 | ScatterGatherPool = pci_pool_create("DAC960_V2_ScatterGather", | |
288 | Controller->PCIDevice, | |
289 | DAC960_V2_ScatterGatherLimit * sizeof(DAC960_V2_ScatterGatherSegment_T), | |
290 | sizeof(DAC960_V2_ScatterGatherSegment_T), 0); | |
291 | if (ScatterGatherPool == NULL) | |
292 | return DAC960_Failure(Controller, | |
293 | "AUXILIARY STRUCTURE CREATION (SG)"); | |
294 | RequestSensePool = pci_pool_create("DAC960_V2_RequestSense", | |
295 | Controller->PCIDevice, sizeof(DAC960_SCSI_RequestSense_T), | |
296 | sizeof(int), 0); | |
297 | if (RequestSensePool == NULL) { | |
298 | pci_pool_destroy(ScatterGatherPool); | |
299 | return DAC960_Failure(Controller, | |
300 | "AUXILIARY STRUCTURE CREATION (SG)"); | |
301 | } | |
302 | Controller->ScatterGatherPool = ScatterGatherPool; | |
303 | Controller->V2.RequestSensePool = RequestSensePool; | |
304 | } | |
305 | Controller->CommandAllocationGroupSize = CommandAllocationGroupSize; | |
306 | Controller->FreeCommands = NULL; | |
307 | for (CommandIdentifier = 1; | |
308 | CommandIdentifier <= Controller->DriverQueueDepth; | |
309 | CommandIdentifier++) | |
310 | { | |
311 | DAC960_Command_T *Command; | |
312 | if (--CommandsRemaining <= 0) | |
313 | { | |
314 | CommandsRemaining = | |
315 | Controller->DriverQueueDepth - CommandIdentifier + 1; | |
316 | if (CommandsRemaining > CommandAllocationGroupSize) | |
317 | CommandsRemaining = CommandAllocationGroupSize; | |
318 | CommandGroupByteCount = | |
319 | CommandsRemaining * CommandAllocationLength; | |
320 | AllocationPointer = kmalloc(CommandGroupByteCount, GFP_ATOMIC); | |
321 | if (AllocationPointer == NULL) | |
322 | return DAC960_Failure(Controller, | |
323 | "AUXILIARY STRUCTURE CREATION"); | |
324 | memset(AllocationPointer, 0, CommandGroupByteCount); | |
325 | } | |
326 | Command = (DAC960_Command_T *) AllocationPointer; | |
327 | AllocationPointer += CommandAllocationLength; | |
328 | Command->CommandIdentifier = CommandIdentifier; | |
329 | Command->Controller = Controller; | |
330 | Command->Next = Controller->FreeCommands; | |
331 | Controller->FreeCommands = Command; | |
332 | Controller->Commands[CommandIdentifier-1] = Command; | |
333 | ScatterGatherCPU = pci_pool_alloc(ScatterGatherPool, SLAB_ATOMIC, | |
334 | &ScatterGatherDMA); | |
335 | if (ScatterGatherCPU == NULL) | |
336 | return DAC960_Failure(Controller, "AUXILIARY STRUCTURE CREATION"); | |
337 | ||
338 | if (RequestSensePool != NULL) { | |
339 | RequestSenseCPU = pci_pool_alloc(RequestSensePool, SLAB_ATOMIC, | |
340 | &RequestSenseDMA); | |
341 | if (RequestSenseCPU == NULL) { | |
342 | pci_pool_free(ScatterGatherPool, ScatterGatherCPU, | |
343 | ScatterGatherDMA); | |
344 | return DAC960_Failure(Controller, | |
345 | "AUXILIARY STRUCTURE CREATION"); | |
346 | } | |
347 | } | |
348 | if (Controller->FirmwareType == DAC960_V1_Controller) { | |
349 | Command->cmd_sglist = Command->V1.ScatterList; | |
350 | Command->V1.ScatterGatherList = | |
351 | (DAC960_V1_ScatterGatherSegment_T *)ScatterGatherCPU; | |
352 | Command->V1.ScatterGatherListDMA = ScatterGatherDMA; | |
353 | } else { | |
354 | Command->cmd_sglist = Command->V2.ScatterList; | |
355 | Command->V2.ScatterGatherList = | |
356 | (DAC960_V2_ScatterGatherSegment_T *)ScatterGatherCPU; | |
357 | Command->V2.ScatterGatherListDMA = ScatterGatherDMA; | |
358 | Command->V2.RequestSense = | |
359 | (DAC960_SCSI_RequestSense_T *)RequestSenseCPU; | |
360 | Command->V2.RequestSenseDMA = RequestSenseDMA; | |
361 | } | |
362 | } | |
363 | return true; | |
364 | } | |
365 | ||
366 | ||
367 | /* | |
368 | DAC960_DestroyAuxiliaryStructures deallocates the auxiliary data | |
369 | structures for Controller. | |
370 | */ | |
371 | ||
372 | static void DAC960_DestroyAuxiliaryStructures(DAC960_Controller_T *Controller) | |
373 | { | |
374 | int i; | |
375 | struct pci_pool *ScatterGatherPool = Controller->ScatterGatherPool; | |
376 | struct pci_pool *RequestSensePool = NULL; | |
377 | void *ScatterGatherCPU; | |
378 | dma_addr_t ScatterGatherDMA; | |
379 | void *RequestSenseCPU; | |
380 | dma_addr_t RequestSenseDMA; | |
381 | DAC960_Command_T *CommandGroup = NULL; | |
382 | ||
383 | ||
384 | if (Controller->FirmwareType == DAC960_V2_Controller) | |
385 | RequestSensePool = Controller->V2.RequestSensePool; | |
386 | ||
387 | Controller->FreeCommands = NULL; | |
388 | for (i = 0; i < Controller->DriverQueueDepth; i++) | |
389 | { | |
390 | DAC960_Command_T *Command = Controller->Commands[i]; | |
391 | ||
392 | if (Command == NULL) | |
393 | continue; | |
394 | ||
395 | if (Controller->FirmwareType == DAC960_V1_Controller) { | |
396 | ScatterGatherCPU = (void *)Command->V1.ScatterGatherList; | |
397 | ScatterGatherDMA = Command->V1.ScatterGatherListDMA; | |
398 | RequestSenseCPU = NULL; | |
399 | RequestSenseDMA = (dma_addr_t)0; | |
400 | } else { | |
401 | ScatterGatherCPU = (void *)Command->V2.ScatterGatherList; | |
402 | ScatterGatherDMA = Command->V2.ScatterGatherListDMA; | |
403 | RequestSenseCPU = (void *)Command->V2.RequestSense; | |
404 | RequestSenseDMA = Command->V2.RequestSenseDMA; | |
405 | } | |
406 | if (ScatterGatherCPU != NULL) | |
407 | pci_pool_free(ScatterGatherPool, ScatterGatherCPU, ScatterGatherDMA); | |
408 | if (RequestSenseCPU != NULL) | |
409 | pci_pool_free(RequestSensePool, RequestSenseCPU, RequestSenseDMA); | |
410 | ||
411 | if ((Command->CommandIdentifier | |
412 | % Controller->CommandAllocationGroupSize) == 1) { | |
413 | /* | |
414 | * We can't free the group of commands until all of the | |
415 | * request sense and scatter gather dma structures are free. | |
416 | * Remember the beginning of the group, but don't free it | |
417 | * until we've reached the beginning of the next group. | |
418 | */ | |
419 | if (CommandGroup != NULL) | |
420 | kfree(CommandGroup); | |
421 | CommandGroup = Command; | |
422 | } | |
423 | Controller->Commands[i] = NULL; | |
424 | } | |
425 | if (CommandGroup != NULL) | |
426 | kfree(CommandGroup); | |
427 | ||
428 | if (Controller->CombinedStatusBuffer != NULL) | |
429 | { | |
430 | kfree(Controller->CombinedStatusBuffer); | |
431 | Controller->CombinedStatusBuffer = NULL; | |
432 | Controller->CurrentStatusBuffer = NULL; | |
433 | } | |
434 | ||
435 | if (ScatterGatherPool != NULL) | |
436 | pci_pool_destroy(ScatterGatherPool); | |
437 | if (Controller->FirmwareType == DAC960_V1_Controller) return; | |
438 | ||
439 | if (RequestSensePool != NULL) | |
440 | pci_pool_destroy(RequestSensePool); | |
441 | ||
442 | for (i = 0; i < DAC960_MaxLogicalDrives; i++) | |
443 | if (Controller->V2.LogicalDeviceInformation[i] != NULL) | |
444 | { | |
445 | kfree(Controller->V2.LogicalDeviceInformation[i]); | |
446 | Controller->V2.LogicalDeviceInformation[i] = NULL; | |
447 | } | |
448 | ||
449 | for (i = 0; i < DAC960_V2_MaxPhysicalDevices; i++) | |
450 | { | |
451 | if (Controller->V2.PhysicalDeviceInformation[i] != NULL) | |
452 | { | |
453 | kfree(Controller->V2.PhysicalDeviceInformation[i]); | |
454 | Controller->V2.PhysicalDeviceInformation[i] = NULL; | |
455 | } | |
456 | if (Controller->V2.InquiryUnitSerialNumber[i] != NULL) | |
457 | { | |
458 | kfree(Controller->V2.InquiryUnitSerialNumber[i]); | |
459 | Controller->V2.InquiryUnitSerialNumber[i] = NULL; | |
460 | } | |
461 | } | |
462 | } | |
463 | ||
464 | ||
465 | /* | |
466 | DAC960_V1_ClearCommand clears critical fields of Command for DAC960 V1 | |
467 | Firmware Controllers. | |
468 | */ | |
469 | ||
470 | static inline void DAC960_V1_ClearCommand(DAC960_Command_T *Command) | |
471 | { | |
472 | DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox; | |
473 | memset(CommandMailbox, 0, sizeof(DAC960_V1_CommandMailbox_T)); | |
474 | Command->V1.CommandStatus = 0; | |
475 | } | |
476 | ||
477 | ||
478 | /* | |
479 | DAC960_V2_ClearCommand clears critical fields of Command for DAC960 V2 | |
480 | Firmware Controllers. | |
481 | */ | |
482 | ||
483 | static inline void DAC960_V2_ClearCommand(DAC960_Command_T *Command) | |
484 | { | |
485 | DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox; | |
486 | memset(CommandMailbox, 0, sizeof(DAC960_V2_CommandMailbox_T)); | |
487 | Command->V2.CommandStatus = 0; | |
488 | } | |
489 | ||
490 | ||
491 | /* | |
492 | DAC960_AllocateCommand allocates a Command structure from Controller's | |
493 | free list. During driver initialization, a special initialization command | |
494 | has been placed on the free list to guarantee that command allocation can | |
495 | never fail. | |
496 | */ | |
497 | ||
498 | static inline DAC960_Command_T *DAC960_AllocateCommand(DAC960_Controller_T | |
499 | *Controller) | |
500 | { | |
501 | DAC960_Command_T *Command = Controller->FreeCommands; | |
502 | if (Command == NULL) return NULL; | |
503 | Controller->FreeCommands = Command->Next; | |
504 | Command->Next = NULL; | |
505 | return Command; | |
506 | } | |
507 | ||
508 | ||
509 | /* | |
510 | DAC960_DeallocateCommand deallocates Command, returning it to Controller's | |
511 | free list. | |
512 | */ | |
513 | ||
514 | static inline void DAC960_DeallocateCommand(DAC960_Command_T *Command) | |
515 | { | |
516 | DAC960_Controller_T *Controller = Command->Controller; | |
517 | ||
518 | Command->Request = NULL; | |
519 | Command->Next = Controller->FreeCommands; | |
520 | Controller->FreeCommands = Command; | |
521 | } | |
522 | ||
523 | ||
524 | /* | |
525 | DAC960_WaitForCommand waits for a wake_up on Controller's Command Wait Queue. | |
526 | */ | |
527 | ||
528 | static void DAC960_WaitForCommand(DAC960_Controller_T *Controller) | |
529 | { | |
530 | spin_unlock_irq(&Controller->queue_lock); | |
531 | __wait_event(Controller->CommandWaitQueue, Controller->FreeCommands); | |
532 | spin_lock_irq(&Controller->queue_lock); | |
533 | } | |
534 | ||
535 | ||
536 | /* | |
537 | DAC960_BA_QueueCommand queues Command for DAC960 BA Series Controllers. | |
538 | */ | |
539 | ||
540 | static void DAC960_BA_QueueCommand(DAC960_Command_T *Command) | |
541 | { | |
542 | DAC960_Controller_T *Controller = Command->Controller; | |
543 | void __iomem *ControllerBaseAddress = Controller->BaseAddress; | |
544 | DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox; | |
545 | DAC960_V2_CommandMailbox_T *NextCommandMailbox = | |
546 | Controller->V2.NextCommandMailbox; | |
547 | CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier; | |
548 | DAC960_BA_WriteCommandMailbox(NextCommandMailbox, CommandMailbox); | |
549 | if (Controller->V2.PreviousCommandMailbox1->Words[0] == 0 || | |
550 | Controller->V2.PreviousCommandMailbox2->Words[0] == 0) | |
551 | DAC960_BA_MemoryMailboxNewCommand(ControllerBaseAddress); | |
552 | Controller->V2.PreviousCommandMailbox2 = | |
553 | Controller->V2.PreviousCommandMailbox1; | |
554 | Controller->V2.PreviousCommandMailbox1 = NextCommandMailbox; | |
555 | if (++NextCommandMailbox > Controller->V2.LastCommandMailbox) | |
556 | NextCommandMailbox = Controller->V2.FirstCommandMailbox; | |
557 | Controller->V2.NextCommandMailbox = NextCommandMailbox; | |
558 | } | |
559 | ||
560 | ||
561 | /* | |
562 | DAC960_LP_QueueCommand queues Command for DAC960 LP Series Controllers. | |
563 | */ | |
564 | ||
565 | static void DAC960_LP_QueueCommand(DAC960_Command_T *Command) | |
566 | { | |
567 | DAC960_Controller_T *Controller = Command->Controller; | |
568 | void __iomem *ControllerBaseAddress = Controller->BaseAddress; | |
569 | DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox; | |
570 | DAC960_V2_CommandMailbox_T *NextCommandMailbox = | |
571 | Controller->V2.NextCommandMailbox; | |
572 | CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier; | |
573 | DAC960_LP_WriteCommandMailbox(NextCommandMailbox, CommandMailbox); | |
574 | if (Controller->V2.PreviousCommandMailbox1->Words[0] == 0 || | |
575 | Controller->V2.PreviousCommandMailbox2->Words[0] == 0) | |
576 | DAC960_LP_MemoryMailboxNewCommand(ControllerBaseAddress); | |
577 | Controller->V2.PreviousCommandMailbox2 = | |
578 | Controller->V2.PreviousCommandMailbox1; | |
579 | Controller->V2.PreviousCommandMailbox1 = NextCommandMailbox; | |
580 | if (++NextCommandMailbox > Controller->V2.LastCommandMailbox) | |
581 | NextCommandMailbox = Controller->V2.FirstCommandMailbox; | |
582 | Controller->V2.NextCommandMailbox = NextCommandMailbox; | |
583 | } | |
584 | ||
585 | ||
586 | /* | |
587 | DAC960_LA_QueueCommandDualMode queues Command for DAC960 LA Series | |
588 | Controllers with Dual Mode Firmware. | |
589 | */ | |
590 | ||
591 | static void DAC960_LA_QueueCommandDualMode(DAC960_Command_T *Command) | |
592 | { | |
593 | DAC960_Controller_T *Controller = Command->Controller; | |
594 | void __iomem *ControllerBaseAddress = Controller->BaseAddress; | |
595 | DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox; | |
596 | DAC960_V1_CommandMailbox_T *NextCommandMailbox = | |
597 | Controller->V1.NextCommandMailbox; | |
598 | CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier; | |
599 | DAC960_LA_WriteCommandMailbox(NextCommandMailbox, CommandMailbox); | |
600 | if (Controller->V1.PreviousCommandMailbox1->Words[0] == 0 || | |
601 | Controller->V1.PreviousCommandMailbox2->Words[0] == 0) | |
602 | DAC960_LA_MemoryMailboxNewCommand(ControllerBaseAddress); | |
603 | Controller->V1.PreviousCommandMailbox2 = | |
604 | Controller->V1.PreviousCommandMailbox1; | |
605 | Controller->V1.PreviousCommandMailbox1 = NextCommandMailbox; | |
606 | if (++NextCommandMailbox > Controller->V1.LastCommandMailbox) | |
607 | NextCommandMailbox = Controller->V1.FirstCommandMailbox; | |
608 | Controller->V1.NextCommandMailbox = NextCommandMailbox; | |
609 | } | |
610 | ||
611 | ||
612 | /* | |
613 | DAC960_LA_QueueCommandSingleMode queues Command for DAC960 LA Series | |
614 | Controllers with Single Mode Firmware. | |
615 | */ | |
616 | ||
617 | static void DAC960_LA_QueueCommandSingleMode(DAC960_Command_T *Command) | |
618 | { | |
619 | DAC960_Controller_T *Controller = Command->Controller; | |
620 | void __iomem *ControllerBaseAddress = Controller->BaseAddress; | |
621 | DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox; | |
622 | DAC960_V1_CommandMailbox_T *NextCommandMailbox = | |
623 | Controller->V1.NextCommandMailbox; | |
624 | CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier; | |
625 | DAC960_LA_WriteCommandMailbox(NextCommandMailbox, CommandMailbox); | |
626 | if (Controller->V1.PreviousCommandMailbox1->Words[0] == 0 || | |
627 | Controller->V1.PreviousCommandMailbox2->Words[0] == 0) | |
628 | DAC960_LA_HardwareMailboxNewCommand(ControllerBaseAddress); | |
629 | Controller->V1.PreviousCommandMailbox2 = | |
630 | Controller->V1.PreviousCommandMailbox1; | |
631 | Controller->V1.PreviousCommandMailbox1 = NextCommandMailbox; | |
632 | if (++NextCommandMailbox > Controller->V1.LastCommandMailbox) | |
633 | NextCommandMailbox = Controller->V1.FirstCommandMailbox; | |
634 | Controller->V1.NextCommandMailbox = NextCommandMailbox; | |
635 | } | |
636 | ||
637 | ||
638 | /* | |
639 | DAC960_PG_QueueCommandDualMode queues Command for DAC960 PG Series | |
640 | Controllers with Dual Mode Firmware. | |
641 | */ | |
642 | ||
643 | static void DAC960_PG_QueueCommandDualMode(DAC960_Command_T *Command) | |
644 | { | |
645 | DAC960_Controller_T *Controller = Command->Controller; | |
646 | void __iomem *ControllerBaseAddress = Controller->BaseAddress; | |
647 | DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox; | |
648 | DAC960_V1_CommandMailbox_T *NextCommandMailbox = | |
649 | Controller->V1.NextCommandMailbox; | |
650 | CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier; | |
651 | DAC960_PG_WriteCommandMailbox(NextCommandMailbox, CommandMailbox); | |
652 | if (Controller->V1.PreviousCommandMailbox1->Words[0] == 0 || | |
653 | Controller->V1.PreviousCommandMailbox2->Words[0] == 0) | |
654 | DAC960_PG_MemoryMailboxNewCommand(ControllerBaseAddress); | |
655 | Controller->V1.PreviousCommandMailbox2 = | |
656 | Controller->V1.PreviousCommandMailbox1; | |
657 | Controller->V1.PreviousCommandMailbox1 = NextCommandMailbox; | |
658 | if (++NextCommandMailbox > Controller->V1.LastCommandMailbox) | |
659 | NextCommandMailbox = Controller->V1.FirstCommandMailbox; | |
660 | Controller->V1.NextCommandMailbox = NextCommandMailbox; | |
661 | } | |
662 | ||
663 | ||
664 | /* | |
665 | DAC960_PG_QueueCommandSingleMode queues Command for DAC960 PG Series | |
666 | Controllers with Single Mode Firmware. | |
667 | */ | |
668 | ||
669 | static void DAC960_PG_QueueCommandSingleMode(DAC960_Command_T *Command) | |
670 | { | |
671 | DAC960_Controller_T *Controller = Command->Controller; | |
672 | void __iomem *ControllerBaseAddress = Controller->BaseAddress; | |
673 | DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox; | |
674 | DAC960_V1_CommandMailbox_T *NextCommandMailbox = | |
675 | Controller->V1.NextCommandMailbox; | |
676 | CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier; | |
677 | DAC960_PG_WriteCommandMailbox(NextCommandMailbox, CommandMailbox); | |
678 | if (Controller->V1.PreviousCommandMailbox1->Words[0] == 0 || | |
679 | Controller->V1.PreviousCommandMailbox2->Words[0] == 0) | |
680 | DAC960_PG_HardwareMailboxNewCommand(ControllerBaseAddress); | |
681 | Controller->V1.PreviousCommandMailbox2 = | |
682 | Controller->V1.PreviousCommandMailbox1; | |
683 | Controller->V1.PreviousCommandMailbox1 = NextCommandMailbox; | |
684 | if (++NextCommandMailbox > Controller->V1.LastCommandMailbox) | |
685 | NextCommandMailbox = Controller->V1.FirstCommandMailbox; | |
686 | Controller->V1.NextCommandMailbox = NextCommandMailbox; | |
687 | } | |
688 | ||
689 | ||
690 | /* | |
691 | DAC960_PD_QueueCommand queues Command for DAC960 PD Series Controllers. | |
692 | */ | |
693 | ||
694 | static void DAC960_PD_QueueCommand(DAC960_Command_T *Command) | |
695 | { | |
696 | DAC960_Controller_T *Controller = Command->Controller; | |
697 | void __iomem *ControllerBaseAddress = Controller->BaseAddress; | |
698 | DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox; | |
699 | CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier; | |
700 | while (DAC960_PD_MailboxFullP(ControllerBaseAddress)) | |
701 | udelay(1); | |
702 | DAC960_PD_WriteCommandMailbox(ControllerBaseAddress, CommandMailbox); | |
703 | DAC960_PD_NewCommand(ControllerBaseAddress); | |
704 | } | |
705 | ||
706 | ||
707 | /* | |
708 | DAC960_P_QueueCommand queues Command for DAC960 P Series Controllers. | |
709 | */ | |
710 | ||
711 | static void DAC960_P_QueueCommand(DAC960_Command_T *Command) | |
712 | { | |
713 | DAC960_Controller_T *Controller = Command->Controller; | |
714 | void __iomem *ControllerBaseAddress = Controller->BaseAddress; | |
715 | DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox; | |
716 | CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier; | |
717 | switch (CommandMailbox->Common.CommandOpcode) | |
718 | { | |
719 | case DAC960_V1_Enquiry: | |
720 | CommandMailbox->Common.CommandOpcode = DAC960_V1_Enquiry_Old; | |
721 | break; | |
722 | case DAC960_V1_GetDeviceState: | |
723 | CommandMailbox->Common.CommandOpcode = DAC960_V1_GetDeviceState_Old; | |
724 | break; | |
725 | case DAC960_V1_Read: | |
726 | CommandMailbox->Common.CommandOpcode = DAC960_V1_Read_Old; | |
727 | DAC960_PD_To_P_TranslateReadWriteCommand(CommandMailbox); | |
728 | break; | |
729 | case DAC960_V1_Write: | |
730 | CommandMailbox->Common.CommandOpcode = DAC960_V1_Write_Old; | |
731 | DAC960_PD_To_P_TranslateReadWriteCommand(CommandMailbox); | |
732 | break; | |
733 | case DAC960_V1_ReadWithScatterGather: | |
734 | CommandMailbox->Common.CommandOpcode = | |
735 | DAC960_V1_ReadWithScatterGather_Old; | |
736 | DAC960_PD_To_P_TranslateReadWriteCommand(CommandMailbox); | |
737 | break; | |
738 | case DAC960_V1_WriteWithScatterGather: | |
739 | CommandMailbox->Common.CommandOpcode = | |
740 | DAC960_V1_WriteWithScatterGather_Old; | |
741 | DAC960_PD_To_P_TranslateReadWriteCommand(CommandMailbox); | |
742 | break; | |
743 | default: | |
744 | break; | |
745 | } | |
746 | while (DAC960_PD_MailboxFullP(ControllerBaseAddress)) | |
747 | udelay(1); | |
748 | DAC960_PD_WriteCommandMailbox(ControllerBaseAddress, CommandMailbox); | |
749 | DAC960_PD_NewCommand(ControllerBaseAddress); | |
750 | } | |
751 | ||
752 | ||
753 | /* | |
754 | DAC960_ExecuteCommand executes Command and waits for completion. | |
755 | */ | |
756 | ||
757 | static void DAC960_ExecuteCommand(DAC960_Command_T *Command) | |
758 | { | |
759 | DAC960_Controller_T *Controller = Command->Controller; | |
760 | DECLARE_COMPLETION(Completion); | |
761 | unsigned long flags; | |
762 | Command->Completion = &Completion; | |
763 | ||
764 | spin_lock_irqsave(&Controller->queue_lock, flags); | |
765 | DAC960_QueueCommand(Command); | |
766 | spin_unlock_irqrestore(&Controller->queue_lock, flags); | |
767 | ||
768 | if (in_interrupt()) | |
769 | return; | |
770 | wait_for_completion(&Completion); | |
771 | } | |
772 | ||
773 | ||
774 | /* | |
775 | DAC960_V1_ExecuteType3 executes a DAC960 V1 Firmware Controller Type 3 | |
776 | Command and waits for completion. It returns true on success and false | |
777 | on failure. | |
778 | */ | |
779 | ||
780 | static boolean DAC960_V1_ExecuteType3(DAC960_Controller_T *Controller, | |
781 | DAC960_V1_CommandOpcode_T CommandOpcode, | |
782 | dma_addr_t DataDMA) | |
783 | { | |
784 | DAC960_Command_T *Command = DAC960_AllocateCommand(Controller); | |
785 | DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox; | |
786 | DAC960_V1_CommandStatus_T CommandStatus; | |
787 | DAC960_V1_ClearCommand(Command); | |
788 | Command->CommandType = DAC960_ImmediateCommand; | |
789 | CommandMailbox->Type3.CommandOpcode = CommandOpcode; | |
790 | CommandMailbox->Type3.BusAddress = DataDMA; | |
791 | DAC960_ExecuteCommand(Command); | |
792 | CommandStatus = Command->V1.CommandStatus; | |
793 | DAC960_DeallocateCommand(Command); | |
794 | return (CommandStatus == DAC960_V1_NormalCompletion); | |
795 | } | |
796 | ||
797 | ||
798 | /* | |
799 | DAC960_V1_ExecuteTypeB executes a DAC960 V1 Firmware Controller Type 3B | |
800 | Command and waits for completion. It returns true on success and false | |
801 | on failure. | |
802 | */ | |
803 | ||
804 | static boolean DAC960_V1_ExecuteType3B(DAC960_Controller_T *Controller, | |
805 | DAC960_V1_CommandOpcode_T CommandOpcode, | |
806 | unsigned char CommandOpcode2, | |
807 | dma_addr_t DataDMA) | |
808 | { | |
809 | DAC960_Command_T *Command = DAC960_AllocateCommand(Controller); | |
810 | DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox; | |
811 | DAC960_V1_CommandStatus_T CommandStatus; | |
812 | DAC960_V1_ClearCommand(Command); | |
813 | Command->CommandType = DAC960_ImmediateCommand; | |
814 | CommandMailbox->Type3B.CommandOpcode = CommandOpcode; | |
815 | CommandMailbox->Type3B.CommandOpcode2 = CommandOpcode2; | |
816 | CommandMailbox->Type3B.BusAddress = DataDMA; | |
817 | DAC960_ExecuteCommand(Command); | |
818 | CommandStatus = Command->V1.CommandStatus; | |
819 | DAC960_DeallocateCommand(Command); | |
820 | return (CommandStatus == DAC960_V1_NormalCompletion); | |
821 | } | |
822 | ||
823 | ||
824 | /* | |
825 | DAC960_V1_ExecuteType3D executes a DAC960 V1 Firmware Controller Type 3D | |
826 | Command and waits for completion. It returns true on success and false | |
827 | on failure. | |
828 | */ | |
829 | ||
830 | static boolean DAC960_V1_ExecuteType3D(DAC960_Controller_T *Controller, | |
831 | DAC960_V1_CommandOpcode_T CommandOpcode, | |
832 | unsigned char Channel, | |
833 | unsigned char TargetID, | |
834 | dma_addr_t DataDMA) | |
835 | { | |
836 | DAC960_Command_T *Command = DAC960_AllocateCommand(Controller); | |
837 | DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox; | |
838 | DAC960_V1_CommandStatus_T CommandStatus; | |
839 | DAC960_V1_ClearCommand(Command); | |
840 | Command->CommandType = DAC960_ImmediateCommand; | |
841 | CommandMailbox->Type3D.CommandOpcode = CommandOpcode; | |
842 | CommandMailbox->Type3D.Channel = Channel; | |
843 | CommandMailbox->Type3D.TargetID = TargetID; | |
844 | CommandMailbox->Type3D.BusAddress = DataDMA; | |
845 | DAC960_ExecuteCommand(Command); | |
846 | CommandStatus = Command->V1.CommandStatus; | |
847 | DAC960_DeallocateCommand(Command); | |
848 | return (CommandStatus == DAC960_V1_NormalCompletion); | |
849 | } | |
850 | ||
851 | ||
852 | /* | |
853 | DAC960_V2_GeneralInfo executes a DAC960 V2 Firmware General Information | |
854 | Reading IOCTL Command and waits for completion. It returns true on success | |
855 | and false on failure. | |
856 | ||
857 | Return data in The controller's HealthStatusBuffer, which is dma-able memory | |
858 | */ | |
859 | ||
860 | static boolean DAC960_V2_GeneralInfo(DAC960_Controller_T *Controller) | |
861 | { | |
862 | DAC960_Command_T *Command = DAC960_AllocateCommand(Controller); | |
863 | DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox; | |
864 | DAC960_V2_CommandStatus_T CommandStatus; | |
865 | DAC960_V2_ClearCommand(Command); | |
866 | Command->CommandType = DAC960_ImmediateCommand; | |
867 | CommandMailbox->Common.CommandOpcode = DAC960_V2_IOCTL; | |
868 | CommandMailbox->Common.CommandControlBits | |
869 | .DataTransferControllerToHost = true; | |
870 | CommandMailbox->Common.CommandControlBits | |
871 | .NoAutoRequestSense = true; | |
872 | CommandMailbox->Common.DataTransferSize = sizeof(DAC960_V2_HealthStatusBuffer_T); | |
873 | CommandMailbox->Common.IOCTL_Opcode = DAC960_V2_GetHealthStatus; | |
874 | CommandMailbox->Common.DataTransferMemoryAddress | |
875 | .ScatterGatherSegments[0] | |
876 | .SegmentDataPointer = | |
877 | Controller->V2.HealthStatusBufferDMA; | |
878 | CommandMailbox->Common.DataTransferMemoryAddress | |
879 | .ScatterGatherSegments[0] | |
880 | .SegmentByteCount = | |
881 | CommandMailbox->Common.DataTransferSize; | |
882 | DAC960_ExecuteCommand(Command); | |
883 | CommandStatus = Command->V2.CommandStatus; | |
884 | DAC960_DeallocateCommand(Command); | |
885 | return (CommandStatus == DAC960_V2_NormalCompletion); | |
886 | } | |
887 | ||
888 | ||
889 | /* | |
890 | DAC960_V2_ControllerInfo executes a DAC960 V2 Firmware Controller | |
891 | Information Reading IOCTL Command and waits for completion. It returns | |
892 | true on success and false on failure. | |
893 | ||
894 | Data is returned in the controller's V2.NewControllerInformation dma-able | |
895 | memory buffer. | |
896 | */ | |
897 | ||
898 | static boolean DAC960_V2_NewControllerInfo(DAC960_Controller_T *Controller) | |
899 | { | |
900 | DAC960_Command_T *Command = DAC960_AllocateCommand(Controller); | |
901 | DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox; | |
902 | DAC960_V2_CommandStatus_T CommandStatus; | |
903 | DAC960_V2_ClearCommand(Command); | |
904 | Command->CommandType = DAC960_ImmediateCommand; | |
905 | CommandMailbox->ControllerInfo.CommandOpcode = DAC960_V2_IOCTL; | |
906 | CommandMailbox->ControllerInfo.CommandControlBits | |
907 | .DataTransferControllerToHost = true; | |
908 | CommandMailbox->ControllerInfo.CommandControlBits | |
909 | .NoAutoRequestSense = true; | |
910 | CommandMailbox->ControllerInfo.DataTransferSize = sizeof(DAC960_V2_ControllerInfo_T); | |
911 | CommandMailbox->ControllerInfo.ControllerNumber = 0; | |
912 | CommandMailbox->ControllerInfo.IOCTL_Opcode = DAC960_V2_GetControllerInfo; | |
913 | CommandMailbox->ControllerInfo.DataTransferMemoryAddress | |
914 | .ScatterGatherSegments[0] | |
915 | .SegmentDataPointer = | |
916 | Controller->V2.NewControllerInformationDMA; | |
917 | CommandMailbox->ControllerInfo.DataTransferMemoryAddress | |
918 | .ScatterGatherSegments[0] | |
919 | .SegmentByteCount = | |
920 | CommandMailbox->ControllerInfo.DataTransferSize; | |
921 | DAC960_ExecuteCommand(Command); | |
922 | CommandStatus = Command->V2.CommandStatus; | |
923 | DAC960_DeallocateCommand(Command); | |
924 | return (CommandStatus == DAC960_V2_NormalCompletion); | |
925 | } | |
926 | ||
927 | ||
928 | /* | |
929 | DAC960_V2_LogicalDeviceInfo executes a DAC960 V2 Firmware Controller Logical | |
930 | Device Information Reading IOCTL Command and waits for completion. It | |
931 | returns true on success and false on failure. | |
932 | ||
933 | Data is returned in the controller's V2.NewLogicalDeviceInformation | |
934 | */ | |
935 | ||
936 | static boolean DAC960_V2_NewLogicalDeviceInfo(DAC960_Controller_T *Controller, | |
937 | unsigned short LogicalDeviceNumber) | |
938 | { | |
939 | DAC960_Command_T *Command = DAC960_AllocateCommand(Controller); | |
940 | DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox; | |
941 | DAC960_V2_CommandStatus_T CommandStatus; | |
942 | ||
943 | DAC960_V2_ClearCommand(Command); | |
944 | Command->CommandType = DAC960_ImmediateCommand; | |
945 | CommandMailbox->LogicalDeviceInfo.CommandOpcode = | |
946 | DAC960_V2_IOCTL; | |
947 | CommandMailbox->LogicalDeviceInfo.CommandControlBits | |
948 | .DataTransferControllerToHost = true; | |
949 | CommandMailbox->LogicalDeviceInfo.CommandControlBits | |
950 | .NoAutoRequestSense = true; | |
951 | CommandMailbox->LogicalDeviceInfo.DataTransferSize = | |
952 | sizeof(DAC960_V2_LogicalDeviceInfo_T); | |
953 | CommandMailbox->LogicalDeviceInfo.LogicalDevice.LogicalDeviceNumber = | |
954 | LogicalDeviceNumber; | |
955 | CommandMailbox->LogicalDeviceInfo.IOCTL_Opcode = DAC960_V2_GetLogicalDeviceInfoValid; | |
956 | CommandMailbox->LogicalDeviceInfo.DataTransferMemoryAddress | |
957 | .ScatterGatherSegments[0] | |
958 | .SegmentDataPointer = | |
959 | Controller->V2.NewLogicalDeviceInformationDMA; | |
960 | CommandMailbox->LogicalDeviceInfo.DataTransferMemoryAddress | |
961 | .ScatterGatherSegments[0] | |
962 | .SegmentByteCount = | |
963 | CommandMailbox->LogicalDeviceInfo.DataTransferSize; | |
964 | DAC960_ExecuteCommand(Command); | |
965 | CommandStatus = Command->V2.CommandStatus; | |
966 | DAC960_DeallocateCommand(Command); | |
967 | return (CommandStatus == DAC960_V2_NormalCompletion); | |
968 | } | |
969 | ||
970 | ||
971 | /* | |
972 | DAC960_V2_PhysicalDeviceInfo executes a DAC960 V2 Firmware Controller "Read | |
973 | Physical Device Information" IOCTL Command and waits for completion. It | |
974 | returns true on success and false on failure. | |
975 | ||
976 | The Channel, TargetID, LogicalUnit arguments should be 0 the first time | |
977 | this function is called for a given controller. This will return data | |
978 | for the "first" device on that controller. The returned data includes a | |
979 | Channel, TargetID, LogicalUnit that can be passed in to this routine to | |
980 | get data for the NEXT device on that controller. | |
981 | ||
982 | Data is stored in the controller's V2.NewPhysicalDeviceInfo dma-able | |
983 | memory buffer. | |
984 | ||
985 | */ | |
986 | ||
987 | static boolean DAC960_V2_NewPhysicalDeviceInfo(DAC960_Controller_T *Controller, | |
988 | unsigned char Channel, | |
989 | unsigned char TargetID, | |
990 | unsigned char LogicalUnit) | |
991 | { | |
992 | DAC960_Command_T *Command = DAC960_AllocateCommand(Controller); | |
993 | DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox; | |
994 | DAC960_V2_CommandStatus_T CommandStatus; | |
995 | ||
996 | DAC960_V2_ClearCommand(Command); | |
997 | Command->CommandType = DAC960_ImmediateCommand; | |
998 | CommandMailbox->PhysicalDeviceInfo.CommandOpcode = DAC960_V2_IOCTL; | |
999 | CommandMailbox->PhysicalDeviceInfo.CommandControlBits | |
1000 | .DataTransferControllerToHost = true; | |
1001 | CommandMailbox->PhysicalDeviceInfo.CommandControlBits | |
1002 | .NoAutoRequestSense = true; | |
1003 | CommandMailbox->PhysicalDeviceInfo.DataTransferSize = | |
1004 | sizeof(DAC960_V2_PhysicalDeviceInfo_T); | |
1005 | CommandMailbox->PhysicalDeviceInfo.PhysicalDevice.LogicalUnit = LogicalUnit; | |
1006 | CommandMailbox->PhysicalDeviceInfo.PhysicalDevice.TargetID = TargetID; | |
1007 | CommandMailbox->PhysicalDeviceInfo.PhysicalDevice.Channel = Channel; | |
1008 | CommandMailbox->PhysicalDeviceInfo.IOCTL_Opcode = | |
1009 | DAC960_V2_GetPhysicalDeviceInfoValid; | |
1010 | CommandMailbox->PhysicalDeviceInfo.DataTransferMemoryAddress | |
1011 | .ScatterGatherSegments[0] | |
1012 | .SegmentDataPointer = | |
1013 | Controller->V2.NewPhysicalDeviceInformationDMA; | |
1014 | CommandMailbox->PhysicalDeviceInfo.DataTransferMemoryAddress | |
1015 | .ScatterGatherSegments[0] | |
1016 | .SegmentByteCount = | |
1017 | CommandMailbox->PhysicalDeviceInfo.DataTransferSize; | |
1018 | DAC960_ExecuteCommand(Command); | |
1019 | CommandStatus = Command->V2.CommandStatus; | |
1020 | DAC960_DeallocateCommand(Command); | |
1021 | return (CommandStatus == DAC960_V2_NormalCompletion); | |
1022 | } | |
1023 | ||
1024 | ||
1025 | static void DAC960_V2_ConstructNewUnitSerialNumber( | |
1026 | DAC960_Controller_T *Controller, | |
1027 | DAC960_V2_CommandMailbox_T *CommandMailbox, int Channel, int TargetID, | |
1028 | int LogicalUnit) | |
1029 | { | |
1030 | CommandMailbox->SCSI_10.CommandOpcode = DAC960_V2_SCSI_10_Passthru; | |
1031 | CommandMailbox->SCSI_10.CommandControlBits | |
1032 | .DataTransferControllerToHost = true; | |
1033 | CommandMailbox->SCSI_10.CommandControlBits | |
1034 | .NoAutoRequestSense = true; | |
1035 | CommandMailbox->SCSI_10.DataTransferSize = | |
1036 | sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T); | |
1037 | CommandMailbox->SCSI_10.PhysicalDevice.LogicalUnit = LogicalUnit; | |
1038 | CommandMailbox->SCSI_10.PhysicalDevice.TargetID = TargetID; | |
1039 | CommandMailbox->SCSI_10.PhysicalDevice.Channel = Channel; | |
1040 | CommandMailbox->SCSI_10.CDBLength = 6; | |
1041 | CommandMailbox->SCSI_10.SCSI_CDB[0] = 0x12; /* INQUIRY */ | |
1042 | CommandMailbox->SCSI_10.SCSI_CDB[1] = 1; /* EVPD = 1 */ | |
1043 | CommandMailbox->SCSI_10.SCSI_CDB[2] = 0x80; /* Page Code */ | |
1044 | CommandMailbox->SCSI_10.SCSI_CDB[3] = 0; /* Reserved */ | |
1045 | CommandMailbox->SCSI_10.SCSI_CDB[4] = | |
1046 | sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T); | |
1047 | CommandMailbox->SCSI_10.SCSI_CDB[5] = 0; /* Control */ | |
1048 | CommandMailbox->SCSI_10.DataTransferMemoryAddress | |
1049 | .ScatterGatherSegments[0] | |
1050 | .SegmentDataPointer = | |
1051 | Controller->V2.NewInquiryUnitSerialNumberDMA; | |
1052 | CommandMailbox->SCSI_10.DataTransferMemoryAddress | |
1053 | .ScatterGatherSegments[0] | |
1054 | .SegmentByteCount = | |
1055 | CommandMailbox->SCSI_10.DataTransferSize; | |
1056 | } | |
1057 | ||
1058 | ||
1059 | /* | |
1060 | DAC960_V2_NewUnitSerialNumber executes an SCSI pass-through | |
1061 | Inquiry command to a SCSI device identified by Channel number, | |
1062 | Target id, Logical Unit Number. This function Waits for completion | |
1063 | of the command. | |
1064 | ||
1065 | The return data includes Unit Serial Number information for the | |
1066 | specified device. | |
1067 | ||
1068 | Data is stored in the controller's V2.NewPhysicalDeviceInfo dma-able | |
1069 | memory buffer. | |
1070 | */ | |
1071 | ||
1072 | static boolean DAC960_V2_NewInquiryUnitSerialNumber(DAC960_Controller_T *Controller, | |
1073 | int Channel, int TargetID, int LogicalUnit) | |
1074 | { | |
1075 | DAC960_Command_T *Command; | |
1076 | DAC960_V2_CommandMailbox_T *CommandMailbox; | |
1077 | DAC960_V2_CommandStatus_T CommandStatus; | |
1078 | ||
1079 | Command = DAC960_AllocateCommand(Controller); | |
1080 | CommandMailbox = &Command->V2.CommandMailbox; | |
1081 | DAC960_V2_ClearCommand(Command); | |
1082 | Command->CommandType = DAC960_ImmediateCommand; | |
1083 | ||
1084 | DAC960_V2_ConstructNewUnitSerialNumber(Controller, CommandMailbox, | |
1085 | Channel, TargetID, LogicalUnit); | |
1086 | ||
1087 | DAC960_ExecuteCommand(Command); | |
1088 | CommandStatus = Command->V2.CommandStatus; | |
1089 | DAC960_DeallocateCommand(Command); | |
1090 | return (CommandStatus == DAC960_V2_NormalCompletion); | |
1091 | } | |
1092 | ||
1093 | ||
1094 | /* | |
1095 | DAC960_V2_DeviceOperation executes a DAC960 V2 Firmware Controller Device | |
1096 | Operation IOCTL Command and waits for completion. It returns true on | |
1097 | success and false on failure. | |
1098 | */ | |
1099 | ||
1100 | static boolean DAC960_V2_DeviceOperation(DAC960_Controller_T *Controller, | |
1101 | DAC960_V2_IOCTL_Opcode_T IOCTL_Opcode, | |
1102 | DAC960_V2_OperationDevice_T | |
1103 | OperationDevice) | |
1104 | { | |
1105 | DAC960_Command_T *Command = DAC960_AllocateCommand(Controller); | |
1106 | DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox; | |
1107 | DAC960_V2_CommandStatus_T CommandStatus; | |
1108 | DAC960_V2_ClearCommand(Command); | |
1109 | Command->CommandType = DAC960_ImmediateCommand; | |
1110 | CommandMailbox->DeviceOperation.CommandOpcode = DAC960_V2_IOCTL; | |
1111 | CommandMailbox->DeviceOperation.CommandControlBits | |
1112 | .DataTransferControllerToHost = true; | |
1113 | CommandMailbox->DeviceOperation.CommandControlBits | |
1114 | .NoAutoRequestSense = true; | |
1115 | CommandMailbox->DeviceOperation.IOCTL_Opcode = IOCTL_Opcode; | |
1116 | CommandMailbox->DeviceOperation.OperationDevice = OperationDevice; | |
1117 | DAC960_ExecuteCommand(Command); | |
1118 | CommandStatus = Command->V2.CommandStatus; | |
1119 | DAC960_DeallocateCommand(Command); | |
1120 | return (CommandStatus == DAC960_V2_NormalCompletion); | |
1121 | } | |
1122 | ||
1123 | ||
1124 | /* | |
1125 | DAC960_V1_EnableMemoryMailboxInterface enables the Memory Mailbox Interface | |
1126 | for DAC960 V1 Firmware Controllers. | |
1127 | ||
1128 | PD and P controller types have no memory mailbox, but still need the | |
1129 | other dma mapped memory. | |
1130 | */ | |
1131 | ||
1132 | static boolean DAC960_V1_EnableMemoryMailboxInterface(DAC960_Controller_T | |
1133 | *Controller) | |
1134 | { | |
1135 | void __iomem *ControllerBaseAddress = Controller->BaseAddress; | |
1136 | DAC960_HardwareType_T hw_type = Controller->HardwareType; | |
1137 | struct pci_dev *PCI_Device = Controller->PCIDevice; | |
1138 | struct dma_loaf *DmaPages = &Controller->DmaPages; | |
1139 | size_t DmaPagesSize; | |
1140 | size_t CommandMailboxesSize; | |
1141 | size_t StatusMailboxesSize; | |
1142 | ||
1143 | DAC960_V1_CommandMailbox_T *CommandMailboxesMemory; | |
1144 | dma_addr_t CommandMailboxesMemoryDMA; | |
1145 | ||
1146 | DAC960_V1_StatusMailbox_T *StatusMailboxesMemory; | |
1147 | dma_addr_t StatusMailboxesMemoryDMA; | |
1148 | ||
1149 | DAC960_V1_CommandMailbox_T CommandMailbox; | |
1150 | DAC960_V1_CommandStatus_T CommandStatus; | |
1151 | int TimeoutCounter; | |
1152 | int i; | |
1153 | ||
1154 | ||
1155 | if (pci_set_dma_mask(Controller->PCIDevice, DAC690_V1_PciDmaMask)) | |
1156 | return DAC960_Failure(Controller, "DMA mask out of range"); | |
1157 | Controller->BounceBufferLimit = DAC690_V1_PciDmaMask; | |
1158 | ||
1159 | if ((hw_type == DAC960_PD_Controller) || (hw_type == DAC960_P_Controller)) { | |
1160 | CommandMailboxesSize = 0; | |
1161 | StatusMailboxesSize = 0; | |
1162 | } else { | |
1163 | CommandMailboxesSize = DAC960_V1_CommandMailboxCount * sizeof(DAC960_V1_CommandMailbox_T); | |
1164 | StatusMailboxesSize = DAC960_V1_StatusMailboxCount * sizeof(DAC960_V1_StatusMailbox_T); | |
1165 | } | |
1166 | DmaPagesSize = CommandMailboxesSize + StatusMailboxesSize + | |
1167 | sizeof(DAC960_V1_DCDB_T) + sizeof(DAC960_V1_Enquiry_T) + | |
1168 | sizeof(DAC960_V1_ErrorTable_T) + sizeof(DAC960_V1_EventLogEntry_T) + | |
1169 | sizeof(DAC960_V1_RebuildProgress_T) + | |
1170 | sizeof(DAC960_V1_LogicalDriveInformationArray_T) + | |
1171 | sizeof(DAC960_V1_BackgroundInitializationStatus_T) + | |
1172 | sizeof(DAC960_V1_DeviceState_T) + sizeof(DAC960_SCSI_Inquiry_T) + | |
1173 | sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T); | |
1174 | ||
1175 | if (!init_dma_loaf(PCI_Device, DmaPages, DmaPagesSize)) | |
1176 | return false; | |
1177 | ||
1178 | ||
1179 | if ((hw_type == DAC960_PD_Controller) || (hw_type == DAC960_P_Controller)) | |
1180 | goto skip_mailboxes; | |
1181 | ||
1182 | CommandMailboxesMemory = slice_dma_loaf(DmaPages, | |
1183 | CommandMailboxesSize, &CommandMailboxesMemoryDMA); | |
1184 | ||
1185 | /* These are the base addresses for the command memory mailbox array */ | |
1186 | Controller->V1.FirstCommandMailbox = CommandMailboxesMemory; | |
1187 | Controller->V1.FirstCommandMailboxDMA = CommandMailboxesMemoryDMA; | |
1188 | ||
1189 | CommandMailboxesMemory += DAC960_V1_CommandMailboxCount - 1; | |
1190 | Controller->V1.LastCommandMailbox = CommandMailboxesMemory; | |
1191 | Controller->V1.NextCommandMailbox = Controller->V1.FirstCommandMailbox; | |
1192 | Controller->V1.PreviousCommandMailbox1 = Controller->V1.LastCommandMailbox; | |
1193 | Controller->V1.PreviousCommandMailbox2 = | |
1194 | Controller->V1.LastCommandMailbox - 1; | |
1195 | ||
1196 | /* These are the base addresses for the status memory mailbox array */ | |
1197 | StatusMailboxesMemory = slice_dma_loaf(DmaPages, | |
1198 | StatusMailboxesSize, &StatusMailboxesMemoryDMA); | |
1199 | ||
1200 | Controller->V1.FirstStatusMailbox = StatusMailboxesMemory; | |
1201 | Controller->V1.FirstStatusMailboxDMA = StatusMailboxesMemoryDMA; | |
1202 | StatusMailboxesMemory += DAC960_V1_StatusMailboxCount - 1; | |
1203 | Controller->V1.LastStatusMailbox = StatusMailboxesMemory; | |
1204 | Controller->V1.NextStatusMailbox = Controller->V1.FirstStatusMailbox; | |
1205 | ||
1206 | skip_mailboxes: | |
1207 | Controller->V1.MonitoringDCDB = slice_dma_loaf(DmaPages, | |
1208 | sizeof(DAC960_V1_DCDB_T), | |
1209 | &Controller->V1.MonitoringDCDB_DMA); | |
1210 | ||
1211 | Controller->V1.NewEnquiry = slice_dma_loaf(DmaPages, | |
1212 | sizeof(DAC960_V1_Enquiry_T), | |
1213 | &Controller->V1.NewEnquiryDMA); | |
1214 | ||
1215 | Controller->V1.NewErrorTable = slice_dma_loaf(DmaPages, | |
1216 | sizeof(DAC960_V1_ErrorTable_T), | |
1217 | &Controller->V1.NewErrorTableDMA); | |
1218 | ||
1219 | Controller->V1.EventLogEntry = slice_dma_loaf(DmaPages, | |
1220 | sizeof(DAC960_V1_EventLogEntry_T), | |
1221 | &Controller->V1.EventLogEntryDMA); | |
1222 | ||
1223 | Controller->V1.RebuildProgress = slice_dma_loaf(DmaPages, | |
1224 | sizeof(DAC960_V1_RebuildProgress_T), | |
1225 | &Controller->V1.RebuildProgressDMA); | |
1226 | ||
1227 | Controller->V1.NewLogicalDriveInformation = slice_dma_loaf(DmaPages, | |
1228 | sizeof(DAC960_V1_LogicalDriveInformationArray_T), | |
1229 | &Controller->V1.NewLogicalDriveInformationDMA); | |
1230 | ||
1231 | Controller->V1.BackgroundInitializationStatus = slice_dma_loaf(DmaPages, | |
1232 | sizeof(DAC960_V1_BackgroundInitializationStatus_T), | |
1233 | &Controller->V1.BackgroundInitializationStatusDMA); | |
1234 | ||
1235 | Controller->V1.NewDeviceState = slice_dma_loaf(DmaPages, | |
1236 | sizeof(DAC960_V1_DeviceState_T), | |
1237 | &Controller->V1.NewDeviceStateDMA); | |
1238 | ||
1239 | Controller->V1.NewInquiryStandardData = slice_dma_loaf(DmaPages, | |
1240 | sizeof(DAC960_SCSI_Inquiry_T), | |
1241 | &Controller->V1.NewInquiryStandardDataDMA); | |
1242 | ||
1243 | Controller->V1.NewInquiryUnitSerialNumber = slice_dma_loaf(DmaPages, | |
1244 | sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T), | |
1245 | &Controller->V1.NewInquiryUnitSerialNumberDMA); | |
1246 | ||
1247 | if ((hw_type == DAC960_PD_Controller) || (hw_type == DAC960_P_Controller)) | |
1248 | return true; | |
1249 | ||
1250 | /* Enable the Memory Mailbox Interface. */ | |
1251 | Controller->V1.DualModeMemoryMailboxInterface = true; | |
1252 | CommandMailbox.TypeX.CommandOpcode = 0x2B; | |
1253 | CommandMailbox.TypeX.CommandIdentifier = 0; | |
1254 | CommandMailbox.TypeX.CommandOpcode2 = 0x14; | |
1255 | CommandMailbox.TypeX.CommandMailboxesBusAddress = | |
1256 | Controller->V1.FirstCommandMailboxDMA; | |
1257 | CommandMailbox.TypeX.StatusMailboxesBusAddress = | |
1258 | Controller->V1.FirstStatusMailboxDMA; | |
1259 | #define TIMEOUT_COUNT 1000000 | |
1260 | ||
1261 | for (i = 0; i < 2; i++) | |
1262 | switch (Controller->HardwareType) | |
1263 | { | |
1264 | case DAC960_LA_Controller: | |
1265 | TimeoutCounter = TIMEOUT_COUNT; | |
1266 | while (--TimeoutCounter >= 0) | |
1267 | { | |
1268 | if (!DAC960_LA_HardwareMailboxFullP(ControllerBaseAddress)) | |
1269 | break; | |
1270 | udelay(10); | |
1271 | } | |
1272 | if (TimeoutCounter < 0) return false; | |
1273 | DAC960_LA_WriteHardwareMailbox(ControllerBaseAddress, &CommandMailbox); | |
1274 | DAC960_LA_HardwareMailboxNewCommand(ControllerBaseAddress); | |
1275 | TimeoutCounter = TIMEOUT_COUNT; | |
1276 | while (--TimeoutCounter >= 0) | |
1277 | { | |
1278 | if (DAC960_LA_HardwareMailboxStatusAvailableP( | |
1279 | ControllerBaseAddress)) | |
1280 | break; | |
1281 | udelay(10); | |
1282 | } | |
1283 | if (TimeoutCounter < 0) return false; | |
1284 | CommandStatus = DAC960_LA_ReadStatusRegister(ControllerBaseAddress); | |
1285 | DAC960_LA_AcknowledgeHardwareMailboxInterrupt(ControllerBaseAddress); | |
1286 | DAC960_LA_AcknowledgeHardwareMailboxStatus(ControllerBaseAddress); | |
1287 | if (CommandStatus == DAC960_V1_NormalCompletion) return true; | |
1288 | Controller->V1.DualModeMemoryMailboxInterface = false; | |
1289 | CommandMailbox.TypeX.CommandOpcode2 = 0x10; | |
1290 | break; | |
1291 | case DAC960_PG_Controller: | |
1292 | TimeoutCounter = TIMEOUT_COUNT; | |
1293 | while (--TimeoutCounter >= 0) | |
1294 | { | |
1295 | if (!DAC960_PG_HardwareMailboxFullP(ControllerBaseAddress)) | |
1296 | break; | |
1297 | udelay(10); | |
1298 | } | |
1299 | if (TimeoutCounter < 0) return false; | |
1300 | DAC960_PG_WriteHardwareMailbox(ControllerBaseAddress, &CommandMailbox); | |
1301 | DAC960_PG_HardwareMailboxNewCommand(ControllerBaseAddress); | |
1302 | ||
1303 | TimeoutCounter = TIMEOUT_COUNT; | |
1304 | while (--TimeoutCounter >= 0) | |
1305 | { | |
1306 | if (DAC960_PG_HardwareMailboxStatusAvailableP( | |
1307 | ControllerBaseAddress)) | |
1308 | break; | |
1309 | udelay(10); | |
1310 | } | |
1311 | if (TimeoutCounter < 0) return false; | |
1312 | CommandStatus = DAC960_PG_ReadStatusRegister(ControllerBaseAddress); | |
1313 | DAC960_PG_AcknowledgeHardwareMailboxInterrupt(ControllerBaseAddress); | |
1314 | DAC960_PG_AcknowledgeHardwareMailboxStatus(ControllerBaseAddress); | |
1315 | if (CommandStatus == DAC960_V1_NormalCompletion) return true; | |
1316 | Controller->V1.DualModeMemoryMailboxInterface = false; | |
1317 | CommandMailbox.TypeX.CommandOpcode2 = 0x10; | |
1318 | break; | |
1319 | default: | |
1320 | DAC960_Failure(Controller, "Unknown Controller Type\n"); | |
1321 | break; | |
1322 | } | |
1323 | return false; | |
1324 | } | |
1325 | ||
1326 | ||
1327 | /* | |
1328 | DAC960_V2_EnableMemoryMailboxInterface enables the Memory Mailbox Interface | |
1329 | for DAC960 V2 Firmware Controllers. | |
1330 | ||
1331 | Aggregate the space needed for the controller's memory mailbox and | |
1332 | the other data structures that will be targets of dma transfers with | |
1333 | the controller. Allocate a dma-mapped region of memory to hold these | |
1334 | structures. Then, save CPU pointers and dma_addr_t values to reference | |
1335 | the structures that are contained in that region. | |
1336 | */ | |
1337 | ||
1338 | static boolean DAC960_V2_EnableMemoryMailboxInterface(DAC960_Controller_T | |
1339 | *Controller) | |
1340 | { | |
1341 | void __iomem *ControllerBaseAddress = Controller->BaseAddress; | |
1342 | struct pci_dev *PCI_Device = Controller->PCIDevice; | |
1343 | struct dma_loaf *DmaPages = &Controller->DmaPages; | |
1344 | size_t DmaPagesSize; | |
1345 | size_t CommandMailboxesSize; | |
1346 | size_t StatusMailboxesSize; | |
1347 | ||
1348 | DAC960_V2_CommandMailbox_T *CommandMailboxesMemory; | |
1349 | dma_addr_t CommandMailboxesMemoryDMA; | |
1350 | ||
1351 | DAC960_V2_StatusMailbox_T *StatusMailboxesMemory; | |
1352 | dma_addr_t StatusMailboxesMemoryDMA; | |
1353 | ||
1354 | DAC960_V2_CommandMailbox_T *CommandMailbox; | |
1355 | dma_addr_t CommandMailboxDMA; | |
1356 | DAC960_V2_CommandStatus_T CommandStatus; | |
1357 | ||
1358 | if (pci_set_dma_mask(Controller->PCIDevice, DAC690_V2_PciDmaMask)) | |
1359 | return DAC960_Failure(Controller, "DMA mask out of range"); | |
1360 | Controller->BounceBufferLimit = DAC690_V2_PciDmaMask; | |
1361 | ||
1362 | /* This is a temporary dma mapping, used only in the scope of this function */ | |
1363 | CommandMailbox = | |
1364 | (DAC960_V2_CommandMailbox_T *)pci_alloc_consistent( PCI_Device, | |
1365 | sizeof(DAC960_V2_CommandMailbox_T), &CommandMailboxDMA); | |
1366 | if (CommandMailbox == NULL) | |
1367 | return false; | |
1368 | ||
1369 | CommandMailboxesSize = DAC960_V2_CommandMailboxCount * sizeof(DAC960_V2_CommandMailbox_T); | |
1370 | StatusMailboxesSize = DAC960_V2_StatusMailboxCount * sizeof(DAC960_V2_StatusMailbox_T); | |
1371 | DmaPagesSize = | |
1372 | CommandMailboxesSize + StatusMailboxesSize + | |
1373 | sizeof(DAC960_V2_HealthStatusBuffer_T) + | |
1374 | sizeof(DAC960_V2_ControllerInfo_T) + | |
1375 | sizeof(DAC960_V2_LogicalDeviceInfo_T) + | |
1376 | sizeof(DAC960_V2_PhysicalDeviceInfo_T) + | |
1377 | sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T) + | |
1378 | sizeof(DAC960_V2_Event_T) + | |
1379 | sizeof(DAC960_V2_PhysicalToLogicalDevice_T); | |
1380 | ||
1381 | if (!init_dma_loaf(PCI_Device, DmaPages, DmaPagesSize)) { | |
1382 | pci_free_consistent(PCI_Device, sizeof(DAC960_V2_CommandMailbox_T), | |
1383 | CommandMailbox, CommandMailboxDMA); | |
1384 | return false; | |
1385 | } | |
1386 | ||
1387 | CommandMailboxesMemory = slice_dma_loaf(DmaPages, | |
1388 | CommandMailboxesSize, &CommandMailboxesMemoryDMA); | |
1389 | ||
1390 | /* These are the base addresses for the command memory mailbox array */ | |
1391 | Controller->V2.FirstCommandMailbox = CommandMailboxesMemory; | |
1392 | Controller->V2.FirstCommandMailboxDMA = CommandMailboxesMemoryDMA; | |
1393 | ||
1394 | CommandMailboxesMemory += DAC960_V2_CommandMailboxCount - 1; | |
1395 | Controller->V2.LastCommandMailbox = CommandMailboxesMemory; | |
1396 | Controller->V2.NextCommandMailbox = Controller->V2.FirstCommandMailbox; | |
1397 | Controller->V2.PreviousCommandMailbox1 = Controller->V2.LastCommandMailbox; | |
1398 | Controller->V2.PreviousCommandMailbox2 = | |
1399 | Controller->V2.LastCommandMailbox - 1; | |
1400 | ||
1401 | /* These are the base addresses for the status memory mailbox array */ | |
1402 | StatusMailboxesMemory = slice_dma_loaf(DmaPages, | |
1403 | StatusMailboxesSize, &StatusMailboxesMemoryDMA); | |
1404 | ||
1405 | Controller->V2.FirstStatusMailbox = StatusMailboxesMemory; | |
1406 | Controller->V2.FirstStatusMailboxDMA = StatusMailboxesMemoryDMA; | |
1407 | StatusMailboxesMemory += DAC960_V2_StatusMailboxCount - 1; | |
1408 | Controller->V2.LastStatusMailbox = StatusMailboxesMemory; | |
1409 | Controller->V2.NextStatusMailbox = Controller->V2.FirstStatusMailbox; | |
1410 | ||
1411 | Controller->V2.HealthStatusBuffer = slice_dma_loaf(DmaPages, | |
1412 | sizeof(DAC960_V2_HealthStatusBuffer_T), | |
1413 | &Controller->V2.HealthStatusBufferDMA); | |
1414 | ||
1415 | Controller->V2.NewControllerInformation = slice_dma_loaf(DmaPages, | |
1416 | sizeof(DAC960_V2_ControllerInfo_T), | |
1417 | &Controller->V2.NewControllerInformationDMA); | |
1418 | ||
1419 | Controller->V2.NewLogicalDeviceInformation = slice_dma_loaf(DmaPages, | |
1420 | sizeof(DAC960_V2_LogicalDeviceInfo_T), | |
1421 | &Controller->V2.NewLogicalDeviceInformationDMA); | |
1422 | ||
1423 | Controller->V2.NewPhysicalDeviceInformation = slice_dma_loaf(DmaPages, | |
1424 | sizeof(DAC960_V2_PhysicalDeviceInfo_T), | |
1425 | &Controller->V2.NewPhysicalDeviceInformationDMA); | |
1426 | ||
1427 | Controller->V2.NewInquiryUnitSerialNumber = slice_dma_loaf(DmaPages, | |
1428 | sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T), | |
1429 | &Controller->V2.NewInquiryUnitSerialNumberDMA); | |
1430 | ||
1431 | Controller->V2.Event = slice_dma_loaf(DmaPages, | |
1432 | sizeof(DAC960_V2_Event_T), | |
1433 | &Controller->V2.EventDMA); | |
1434 | ||
1435 | Controller->V2.PhysicalToLogicalDevice = slice_dma_loaf(DmaPages, | |
1436 | sizeof(DAC960_V2_PhysicalToLogicalDevice_T), | |
1437 | &Controller->V2.PhysicalToLogicalDeviceDMA); | |
1438 | ||
1439 | /* | |
1440 | Enable the Memory Mailbox Interface. | |
1441 | ||
1442 | I don't know why we can't just use one of the memory mailboxes | |
1443 | we just allocated to do this, instead of using this temporary one. | |
1444 | Try this change later. | |
1445 | */ | |
1446 | memset(CommandMailbox, 0, sizeof(DAC960_V2_CommandMailbox_T)); | |
1447 | CommandMailbox->SetMemoryMailbox.CommandIdentifier = 1; | |
1448 | CommandMailbox->SetMemoryMailbox.CommandOpcode = DAC960_V2_IOCTL; | |
1449 | CommandMailbox->SetMemoryMailbox.CommandControlBits.NoAutoRequestSense = true; | |
1450 | CommandMailbox->SetMemoryMailbox.FirstCommandMailboxSizeKB = | |
1451 | (DAC960_V2_CommandMailboxCount * sizeof(DAC960_V2_CommandMailbox_T)) >> 10; | |
1452 | CommandMailbox->SetMemoryMailbox.FirstStatusMailboxSizeKB = | |
1453 | (DAC960_V2_StatusMailboxCount * sizeof(DAC960_V2_StatusMailbox_T)) >> 10; | |
1454 | CommandMailbox->SetMemoryMailbox.SecondCommandMailboxSizeKB = 0; | |
1455 | CommandMailbox->SetMemoryMailbox.SecondStatusMailboxSizeKB = 0; | |
1456 | CommandMailbox->SetMemoryMailbox.RequestSenseSize = 0; | |
1457 | CommandMailbox->SetMemoryMailbox.IOCTL_Opcode = DAC960_V2_SetMemoryMailbox; | |
1458 | CommandMailbox->SetMemoryMailbox.HealthStatusBufferSizeKB = 1; | |
1459 | CommandMailbox->SetMemoryMailbox.HealthStatusBufferBusAddress = | |
1460 | Controller->V2.HealthStatusBufferDMA; | |
1461 | CommandMailbox->SetMemoryMailbox.FirstCommandMailboxBusAddress = | |
1462 | Controller->V2.FirstCommandMailboxDMA; | |
1463 | CommandMailbox->SetMemoryMailbox.FirstStatusMailboxBusAddress = | |
1464 | Controller->V2.FirstStatusMailboxDMA; | |
1465 | switch (Controller->HardwareType) | |
1466 | { | |
1467 | case DAC960_BA_Controller: | |
1468 | while (DAC960_BA_HardwareMailboxFullP(ControllerBaseAddress)) | |
1469 | udelay(1); | |
1470 | DAC960_BA_WriteHardwareMailbox(ControllerBaseAddress, CommandMailboxDMA); | |
1471 | DAC960_BA_HardwareMailboxNewCommand(ControllerBaseAddress); | |
1472 | while (!DAC960_BA_HardwareMailboxStatusAvailableP(ControllerBaseAddress)) | |
1473 | udelay(1); | |
1474 | CommandStatus = DAC960_BA_ReadCommandStatus(ControllerBaseAddress); | |
1475 | DAC960_BA_AcknowledgeHardwareMailboxInterrupt(ControllerBaseAddress); | |
1476 | DAC960_BA_AcknowledgeHardwareMailboxStatus(ControllerBaseAddress); | |
1477 | break; | |
1478 | case DAC960_LP_Controller: | |
1479 | while (DAC960_LP_HardwareMailboxFullP(ControllerBaseAddress)) | |
1480 | udelay(1); | |
1481 | DAC960_LP_WriteHardwareMailbox(ControllerBaseAddress, CommandMailboxDMA); | |
1482 | DAC960_LP_HardwareMailboxNewCommand(ControllerBaseAddress); | |
1483 | while (!DAC960_LP_HardwareMailboxStatusAvailableP(ControllerBaseAddress)) | |
1484 | udelay(1); | |
1485 | CommandStatus = DAC960_LP_ReadCommandStatus(ControllerBaseAddress); | |
1486 | DAC960_LP_AcknowledgeHardwareMailboxInterrupt(ControllerBaseAddress); | |
1487 | DAC960_LP_AcknowledgeHardwareMailboxStatus(ControllerBaseAddress); | |
1488 | break; | |
1489 | default: | |
1490 | DAC960_Failure(Controller, "Unknown Controller Type\n"); | |
1491 | CommandStatus = DAC960_V2_AbormalCompletion; | |
1492 | break; | |
1493 | } | |
1494 | pci_free_consistent(PCI_Device, sizeof(DAC960_V2_CommandMailbox_T), | |
1495 | CommandMailbox, CommandMailboxDMA); | |
1496 | return (CommandStatus == DAC960_V2_NormalCompletion); | |
1497 | } | |
1498 | ||
1499 | ||
1500 | /* | |
1501 | DAC960_V1_ReadControllerConfiguration reads the Configuration Information | |
1502 | from DAC960 V1 Firmware Controllers and initializes the Controller structure. | |
1503 | */ | |
1504 | ||
1505 | static boolean DAC960_V1_ReadControllerConfiguration(DAC960_Controller_T | |
1506 | *Controller) | |
1507 | { | |
1508 | DAC960_V1_Enquiry2_T *Enquiry2; | |
1509 | dma_addr_t Enquiry2DMA; | |
1510 | DAC960_V1_Config2_T *Config2; | |
1511 | dma_addr_t Config2DMA; | |
1512 | int LogicalDriveNumber, Channel, TargetID; | |
1513 | struct dma_loaf local_dma; | |
1514 | ||
1515 | if (!init_dma_loaf(Controller->PCIDevice, &local_dma, | |
1516 | sizeof(DAC960_V1_Enquiry2_T) + sizeof(DAC960_V1_Config2_T))) | |
1517 | return DAC960_Failure(Controller, "LOGICAL DEVICE ALLOCATION"); | |
1518 | ||
1519 | Enquiry2 = slice_dma_loaf(&local_dma, sizeof(DAC960_V1_Enquiry2_T), &Enquiry2DMA); | |
1520 | Config2 = slice_dma_loaf(&local_dma, sizeof(DAC960_V1_Config2_T), &Config2DMA); | |
1521 | ||
1522 | if (!DAC960_V1_ExecuteType3(Controller, DAC960_V1_Enquiry, | |
1523 | Controller->V1.NewEnquiryDMA)) { | |
1524 | free_dma_loaf(Controller->PCIDevice, &local_dma); | |
1525 | return DAC960_Failure(Controller, "ENQUIRY"); | |
1526 | } | |
1527 | memcpy(&Controller->V1.Enquiry, Controller->V1.NewEnquiry, | |
1528 | sizeof(DAC960_V1_Enquiry_T)); | |
1529 | ||
1530 | if (!DAC960_V1_ExecuteType3(Controller, DAC960_V1_Enquiry2, Enquiry2DMA)) { | |
1531 | free_dma_loaf(Controller->PCIDevice, &local_dma); | |
1532 | return DAC960_Failure(Controller, "ENQUIRY2"); | |
1533 | } | |
1534 | ||
1535 | if (!DAC960_V1_ExecuteType3(Controller, DAC960_V1_ReadConfig2, Config2DMA)) { | |
1536 | free_dma_loaf(Controller->PCIDevice, &local_dma); | |
1537 | return DAC960_Failure(Controller, "READ CONFIG2"); | |
1538 | } | |
1539 | ||
1540 | if (!DAC960_V1_ExecuteType3(Controller, DAC960_V1_GetLogicalDriveInformation, | |
1541 | Controller->V1.NewLogicalDriveInformationDMA)) { | |
1542 | free_dma_loaf(Controller->PCIDevice, &local_dma); | |
1543 | return DAC960_Failure(Controller, "GET LOGICAL DRIVE INFORMATION"); | |
1544 | } | |
1545 | memcpy(&Controller->V1.LogicalDriveInformation, | |
1546 | Controller->V1.NewLogicalDriveInformation, | |
1547 | sizeof(DAC960_V1_LogicalDriveInformationArray_T)); | |
1548 | ||
1549 | for (Channel = 0; Channel < Enquiry2->ActualChannels; Channel++) | |
1550 | for (TargetID = 0; TargetID < Enquiry2->MaxTargets; TargetID++) { | |
1551 | if (!DAC960_V1_ExecuteType3D(Controller, DAC960_V1_GetDeviceState, | |
1552 | Channel, TargetID, | |
1553 | Controller->V1.NewDeviceStateDMA)) { | |
1554 | free_dma_loaf(Controller->PCIDevice, &local_dma); | |
1555 | return DAC960_Failure(Controller, "GET DEVICE STATE"); | |
1556 | } | |
1557 | memcpy(&Controller->V1.DeviceState[Channel][TargetID], | |
1558 | Controller->V1.NewDeviceState, sizeof(DAC960_V1_DeviceState_T)); | |
1559 | } | |
1560 | /* | |
1561 | Initialize the Controller Model Name and Full Model Name fields. | |
1562 | */ | |
1563 | switch (Enquiry2->HardwareID.SubModel) | |
1564 | { | |
1565 | case DAC960_V1_P_PD_PU: | |
1566 | if (Enquiry2->SCSICapability.BusSpeed == DAC960_V1_Ultra) | |
1567 | strcpy(Controller->ModelName, "DAC960PU"); | |
1568 | else strcpy(Controller->ModelName, "DAC960PD"); | |
1569 | break; | |
1570 | case DAC960_V1_PL: | |
1571 | strcpy(Controller->ModelName, "DAC960PL"); | |
1572 | break; | |
1573 | case DAC960_V1_PG: | |
1574 | strcpy(Controller->ModelName, "DAC960PG"); | |
1575 | break; | |
1576 | case DAC960_V1_PJ: | |
1577 | strcpy(Controller->ModelName, "DAC960PJ"); | |
1578 | break; | |
1579 | case DAC960_V1_PR: | |
1580 | strcpy(Controller->ModelName, "DAC960PR"); | |
1581 | break; | |
1582 | case DAC960_V1_PT: | |
1583 | strcpy(Controller->ModelName, "DAC960PT"); | |
1584 | break; | |
1585 | case DAC960_V1_PTL0: | |
1586 | strcpy(Controller->ModelName, "DAC960PTL0"); | |
1587 | break; | |
1588 | case DAC960_V1_PRL: | |
1589 | strcpy(Controller->ModelName, "DAC960PRL"); | |
1590 | break; | |
1591 | case DAC960_V1_PTL1: | |
1592 | strcpy(Controller->ModelName, "DAC960PTL1"); | |
1593 | break; | |
1594 | case DAC960_V1_1164P: | |
1595 | strcpy(Controller->ModelName, "DAC1164P"); | |
1596 | break; | |
1597 | default: | |
1598 | free_dma_loaf(Controller->PCIDevice, &local_dma); | |
1599 | return DAC960_Failure(Controller, "MODEL VERIFICATION"); | |
1600 | } | |
1601 | strcpy(Controller->FullModelName, "Mylex "); | |
1602 | strcat(Controller->FullModelName, Controller->ModelName); | |
1603 | /* | |
1604 | Initialize the Controller Firmware Version field and verify that it | |
1605 | is a supported firmware version. The supported firmware versions are: | |
1606 | ||
1607 | DAC1164P 5.06 and above | |
1608 | DAC960PTL/PRL/PJ/PG 4.06 and above | |
1609 | DAC960PU/PD/PL 3.51 and above | |
1610 | DAC960PU/PD/PL/P 2.73 and above | |
1611 | */ | |
1612 | #if defined(CONFIG_ALPHA) | |
1613 | /* | |
1614 | DEC Alpha machines were often equipped with DAC960 cards that were | |
1615 | OEMed from Mylex, and had their own custom firmware. Version 2.70, | |
1616 | the last custom FW revision to be released by DEC for these older | |
1617 | controllers, appears to work quite well with this driver. | |
1618 | ||
1619 | Cards tested successfully were several versions each of the PD and | |
1620 | PU, called by DEC the KZPSC and KZPAC, respectively, and having | |
1621 | the Manufacturer Numbers (from Mylex), usually on a sticker on the | |
1622 | back of the board, of: | |
1623 | ||
1624 | KZPSC: D040347 (1-channel) or D040348 (2-channel) or D040349 (3-channel) | |
1625 | KZPAC: D040395 (1-channel) or D040396 (2-channel) or D040397 (3-channel) | |
1626 | */ | |
1627 | # define FIRMWARE_27X "2.70" | |
1628 | #else | |
1629 | # define FIRMWARE_27X "2.73" | |
1630 | #endif | |
1631 | ||
1632 | if (Enquiry2->FirmwareID.MajorVersion == 0) | |
1633 | { | |
1634 | Enquiry2->FirmwareID.MajorVersion = | |
1635 | Controller->V1.Enquiry.MajorFirmwareVersion; | |
1636 | Enquiry2->FirmwareID.MinorVersion = | |
1637 | Controller->V1.Enquiry.MinorFirmwareVersion; | |
1638 | Enquiry2->FirmwareID.FirmwareType = '0'; | |
1639 | Enquiry2->FirmwareID.TurnID = 0; | |
1640 | } | |
1641 | sprintf(Controller->FirmwareVersion, "%d.%02d-%c-%02d", | |
1642 | Enquiry2->FirmwareID.MajorVersion, Enquiry2->FirmwareID.MinorVersion, | |
1643 | Enquiry2->FirmwareID.FirmwareType, Enquiry2->FirmwareID.TurnID); | |
1644 | if (!((Controller->FirmwareVersion[0] == '5' && | |
1645 | strcmp(Controller->FirmwareVersion, "5.06") >= 0) || | |
1646 | (Controller->FirmwareVersion[0] == '4' && | |
1647 | strcmp(Controller->FirmwareVersion, "4.06") >= 0) || | |
1648 | (Controller->FirmwareVersion[0] == '3' && | |
1649 | strcmp(Controller->FirmwareVersion, "3.51") >= 0) || | |
1650 | (Controller->FirmwareVersion[0] == '2' && | |
1651 | strcmp(Controller->FirmwareVersion, FIRMWARE_27X) >= 0))) | |
1652 | { | |
1653 | DAC960_Failure(Controller, "FIRMWARE VERSION VERIFICATION"); | |
1654 | DAC960_Error("Firmware Version = '%s'\n", Controller, | |
1655 | Controller->FirmwareVersion); | |
1656 | free_dma_loaf(Controller->PCIDevice, &local_dma); | |
1657 | return false; | |
1658 | } | |
1659 | /* | |
1660 | Initialize the Controller Channels, Targets, Memory Size, and SAF-TE | |
1661 | Enclosure Management Enabled fields. | |
1662 | */ | |
1663 | Controller->Channels = Enquiry2->ActualChannels; | |
1664 | Controller->Targets = Enquiry2->MaxTargets; | |
1665 | Controller->MemorySize = Enquiry2->MemorySize >> 20; | |
1666 | Controller->V1.SAFTE_EnclosureManagementEnabled = | |
1667 | (Enquiry2->FaultManagementType == DAC960_V1_SAFTE); | |
1668 | /* | |
1669 | Initialize the Controller Queue Depth, Driver Queue Depth, Logical Drive | |
1670 | Count, Maximum Blocks per Command, Controller Scatter/Gather Limit, and | |
1671 | Driver Scatter/Gather Limit. The Driver Queue Depth must be at most one | |
1672 | less than the Controller Queue Depth to allow for an automatic drive | |
1673 | rebuild operation. | |
1674 | */ | |
1675 | Controller->ControllerQueueDepth = Controller->V1.Enquiry.MaxCommands; | |
1676 | Controller->DriverQueueDepth = Controller->ControllerQueueDepth - 1; | |
1677 | if (Controller->DriverQueueDepth > DAC960_MaxDriverQueueDepth) | |
1678 | Controller->DriverQueueDepth = DAC960_MaxDriverQueueDepth; | |
1679 | Controller->LogicalDriveCount = | |
1680 | Controller->V1.Enquiry.NumberOfLogicalDrives; | |
1681 | Controller->MaxBlocksPerCommand = Enquiry2->MaxBlocksPerCommand; | |
1682 | Controller->ControllerScatterGatherLimit = Enquiry2->MaxScatterGatherEntries; | |
1683 | Controller->DriverScatterGatherLimit = | |
1684 | Controller->ControllerScatterGatherLimit; | |
1685 | if (Controller->DriverScatterGatherLimit > DAC960_V1_ScatterGatherLimit) | |
1686 | Controller->DriverScatterGatherLimit = DAC960_V1_ScatterGatherLimit; | |
1687 | /* | |
1688 | Initialize the Stripe Size, Segment Size, and Geometry Translation. | |
1689 | */ | |
1690 | Controller->V1.StripeSize = Config2->BlocksPerStripe * Config2->BlockFactor | |
1691 | >> (10 - DAC960_BlockSizeBits); | |
1692 | Controller->V1.SegmentSize = Config2->BlocksPerCacheLine * Config2->BlockFactor | |
1693 | >> (10 - DAC960_BlockSizeBits); | |
1694 | switch (Config2->DriveGeometry) | |
1695 | { | |
1696 | case DAC960_V1_Geometry_128_32: | |
1697 | Controller->V1.GeometryTranslationHeads = 128; | |
1698 | Controller->V1.GeometryTranslationSectors = 32; | |
1699 | break; | |
1700 | case DAC960_V1_Geometry_255_63: | |
1701 | Controller->V1.GeometryTranslationHeads = 255; | |
1702 | Controller->V1.GeometryTranslationSectors = 63; | |
1703 | break; | |
1704 | default: | |
1705 | free_dma_loaf(Controller->PCIDevice, &local_dma); | |
1706 | return DAC960_Failure(Controller, "CONFIG2 DRIVE GEOMETRY"); | |
1707 | } | |
1708 | /* | |
1709 | Initialize the Background Initialization Status. | |
1710 | */ | |
1711 | if ((Controller->FirmwareVersion[0] == '4' && | |
1712 | strcmp(Controller->FirmwareVersion, "4.08") >= 0) || | |
1713 | (Controller->FirmwareVersion[0] == '5' && | |
1714 | strcmp(Controller->FirmwareVersion, "5.08") >= 0)) | |
1715 | { | |
1716 | Controller->V1.BackgroundInitializationStatusSupported = true; | |
1717 | DAC960_V1_ExecuteType3B(Controller, | |
1718 | DAC960_V1_BackgroundInitializationControl, 0x20, | |
1719 | Controller-> | |
1720 | V1.BackgroundInitializationStatusDMA); | |
1721 | memcpy(&Controller->V1.LastBackgroundInitializationStatus, | |
1722 | Controller->V1.BackgroundInitializationStatus, | |
1723 | sizeof(DAC960_V1_BackgroundInitializationStatus_T)); | |
1724 | } | |
1725 | /* | |
1726 | Initialize the Logical Drive Initially Accessible flag. | |
1727 | */ | |
1728 | for (LogicalDriveNumber = 0; | |
1729 | LogicalDriveNumber < Controller->LogicalDriveCount; | |
1730 | LogicalDriveNumber++) | |
1731 | if (Controller->V1.LogicalDriveInformation | |
1732 | [LogicalDriveNumber].LogicalDriveState != | |
1733 | DAC960_V1_LogicalDrive_Offline) | |
1734 | Controller->LogicalDriveInitiallyAccessible[LogicalDriveNumber] = true; | |
1735 | Controller->V1.LastRebuildStatus = DAC960_V1_NoRebuildOrCheckInProgress; | |
1736 | free_dma_loaf(Controller->PCIDevice, &local_dma); | |
1737 | return true; | |
1738 | } | |
1739 | ||
1740 | ||
1741 | /* | |
1742 | DAC960_V2_ReadControllerConfiguration reads the Configuration Information | |
1743 | from DAC960 V2 Firmware Controllers and initializes the Controller structure. | |
1744 | */ | |
1745 | ||
1746 | static boolean DAC960_V2_ReadControllerConfiguration(DAC960_Controller_T | |
1747 | *Controller) | |
1748 | { | |
1749 | DAC960_V2_ControllerInfo_T *ControllerInfo = | |
1750 | &Controller->V2.ControllerInformation; | |
1751 | unsigned short LogicalDeviceNumber = 0; | |
1752 | int ModelNameLength; | |
1753 | ||
1754 | /* Get data into dma-able area, then copy into permanant location */ | |
1755 | if (!DAC960_V2_NewControllerInfo(Controller)) | |
1756 | return DAC960_Failure(Controller, "GET CONTROLLER INFO"); | |
1757 | memcpy(ControllerInfo, Controller->V2.NewControllerInformation, | |
1758 | sizeof(DAC960_V2_ControllerInfo_T)); | |
1759 | ||
1760 | ||
1761 | if (!DAC960_V2_GeneralInfo(Controller)) | |
1762 | return DAC960_Failure(Controller, "GET HEALTH STATUS"); | |
1763 | ||
1764 | /* | |
1765 | Initialize the Controller Model Name and Full Model Name fields. | |
1766 | */ | |
1767 | ModelNameLength = sizeof(ControllerInfo->ControllerName); | |
1768 | if (ModelNameLength > sizeof(Controller->ModelName)-1) | |
1769 | ModelNameLength = sizeof(Controller->ModelName)-1; | |
1770 | memcpy(Controller->ModelName, ControllerInfo->ControllerName, | |
1771 | ModelNameLength); | |
1772 | ModelNameLength--; | |
1773 | while (Controller->ModelName[ModelNameLength] == ' ' || | |
1774 | Controller->ModelName[ModelNameLength] == '\0') | |
1775 | ModelNameLength--; | |
1776 | Controller->ModelName[++ModelNameLength] = '\0'; | |
1777 | strcpy(Controller->FullModelName, "Mylex "); | |
1778 | strcat(Controller->FullModelName, Controller->ModelName); | |
1779 | /* | |
1780 | Initialize the Controller Firmware Version field. | |
1781 | */ | |
1782 | sprintf(Controller->FirmwareVersion, "%d.%02d-%02d", | |
1783 | ControllerInfo->FirmwareMajorVersion, | |
1784 | ControllerInfo->FirmwareMinorVersion, | |
1785 | ControllerInfo->FirmwareTurnNumber); | |
1786 | if (ControllerInfo->FirmwareMajorVersion == 6 && | |
1787 | ControllerInfo->FirmwareMinorVersion == 0 && | |
1788 | ControllerInfo->FirmwareTurnNumber < 1) | |
1789 | { | |
1790 | DAC960_Info("FIRMWARE VERSION %s DOES NOT PROVIDE THE CONTROLLER\n", | |
1791 | Controller, Controller->FirmwareVersion); | |
1792 | DAC960_Info("STATUS MONITORING FUNCTIONALITY NEEDED BY THIS DRIVER.\n", | |
1793 | Controller); | |
1794 | DAC960_Info("PLEASE UPGRADE TO VERSION 6.00-01 OR ABOVE.\n", | |
1795 | Controller); | |
1796 | } | |
1797 | /* | |
1798 | Initialize the Controller Channels, Targets, and Memory Size. | |
1799 | */ | |
1800 | Controller->Channels = ControllerInfo->NumberOfPhysicalChannelsPresent; | |
1801 | Controller->Targets = | |
1802 | ControllerInfo->MaximumTargetsPerChannel | |
1803 | [ControllerInfo->NumberOfPhysicalChannelsPresent-1]; | |
1804 | Controller->MemorySize = ControllerInfo->MemorySizeMB; | |
1805 | /* | |
1806 | Initialize the Controller Queue Depth, Driver Queue Depth, Logical Drive | |
1807 | Count, Maximum Blocks per Command, Controller Scatter/Gather Limit, and | |
1808 | Driver Scatter/Gather Limit. The Driver Queue Depth must be at most one | |
1809 | less than the Controller Queue Depth to allow for an automatic drive | |
1810 | rebuild operation. | |
1811 | */ | |
1812 | Controller->ControllerQueueDepth = ControllerInfo->MaximumParallelCommands; | |
1813 | Controller->DriverQueueDepth = Controller->ControllerQueueDepth - 1; | |
1814 | if (Controller->DriverQueueDepth > DAC960_MaxDriverQueueDepth) | |
1815 | Controller->DriverQueueDepth = DAC960_MaxDriverQueueDepth; | |
1816 | Controller->LogicalDriveCount = ControllerInfo->LogicalDevicesPresent; | |
1817 | Controller->MaxBlocksPerCommand = | |
1818 | ControllerInfo->MaximumDataTransferSizeInBlocks; | |
1819 | Controller->ControllerScatterGatherLimit = | |
1820 | ControllerInfo->MaximumScatterGatherEntries; | |
1821 | Controller->DriverScatterGatherLimit = | |
1822 | Controller->ControllerScatterGatherLimit; | |
1823 | if (Controller->DriverScatterGatherLimit > DAC960_V2_ScatterGatherLimit) | |
1824 | Controller->DriverScatterGatherLimit = DAC960_V2_ScatterGatherLimit; | |
1825 | /* | |
1826 | Initialize the Logical Device Information. | |
1827 | */ | |
1828 | while (true) | |
1829 | { | |
1830 | DAC960_V2_LogicalDeviceInfo_T *NewLogicalDeviceInfo = | |
1831 | Controller->V2.NewLogicalDeviceInformation; | |
1832 | DAC960_V2_LogicalDeviceInfo_T *LogicalDeviceInfo; | |
1833 | DAC960_V2_PhysicalDevice_T PhysicalDevice; | |
1834 | ||
1835 | if (!DAC960_V2_NewLogicalDeviceInfo(Controller, LogicalDeviceNumber)) | |
1836 | break; | |
1837 | LogicalDeviceNumber = NewLogicalDeviceInfo->LogicalDeviceNumber; | |
1838 | if (LogicalDeviceNumber >= DAC960_MaxLogicalDrives) { | |
1839 | DAC960_Error("DAC960: Logical Drive Number %d not supported\n", | |
1840 | Controller, LogicalDeviceNumber); | |
1841 | break; | |
1842 | } | |
1843 | if (NewLogicalDeviceInfo->DeviceBlockSizeInBytes != DAC960_BlockSize) { | |
1844 | DAC960_Error("DAC960: Logical Drive Block Size %d not supported\n", | |
1845 | Controller, NewLogicalDeviceInfo->DeviceBlockSizeInBytes); | |
1846 | LogicalDeviceNumber++; | |
1847 | continue; | |
1848 | } | |
1849 | PhysicalDevice.Controller = 0; | |
1850 | PhysicalDevice.Channel = NewLogicalDeviceInfo->Channel; | |
1851 | PhysicalDevice.TargetID = NewLogicalDeviceInfo->TargetID; | |
1852 | PhysicalDevice.LogicalUnit = NewLogicalDeviceInfo->LogicalUnit; | |
1853 | Controller->V2.LogicalDriveToVirtualDevice[LogicalDeviceNumber] = | |
1854 | PhysicalDevice; | |
1855 | if (NewLogicalDeviceInfo->LogicalDeviceState != | |
1856 | DAC960_V2_LogicalDevice_Offline) | |
1857 | Controller->LogicalDriveInitiallyAccessible[LogicalDeviceNumber] = true; | |
1858 | LogicalDeviceInfo = (DAC960_V2_LogicalDeviceInfo_T *) | |
1859 | kmalloc(sizeof(DAC960_V2_LogicalDeviceInfo_T), GFP_ATOMIC); | |
1860 | if (LogicalDeviceInfo == NULL) | |
1861 | return DAC960_Failure(Controller, "LOGICAL DEVICE ALLOCATION"); | |
1862 | Controller->V2.LogicalDeviceInformation[LogicalDeviceNumber] = | |
1863 | LogicalDeviceInfo; | |
1864 | memcpy(LogicalDeviceInfo, NewLogicalDeviceInfo, | |
1865 | sizeof(DAC960_V2_LogicalDeviceInfo_T)); | |
1866 | LogicalDeviceNumber++; | |
1867 | } | |
1868 | return true; | |
1869 | } | |
1870 | ||
1871 | ||
1872 | /* | |
1873 | DAC960_ReportControllerConfiguration reports the Configuration Information | |
1874 | for Controller. | |
1875 | */ | |
1876 | ||
1877 | static boolean DAC960_ReportControllerConfiguration(DAC960_Controller_T | |
1878 | *Controller) | |
1879 | { | |
1880 | DAC960_Info("Configuring Mylex %s PCI RAID Controller\n", | |
1881 | Controller, Controller->ModelName); | |
1882 | DAC960_Info(" Firmware Version: %s, Channels: %d, Memory Size: %dMB\n", | |
1883 | Controller, Controller->FirmwareVersion, | |
1884 | Controller->Channels, Controller->MemorySize); | |
1885 | DAC960_Info(" PCI Bus: %d, Device: %d, Function: %d, I/O Address: ", | |
1886 | Controller, Controller->Bus, | |
1887 | Controller->Device, Controller->Function); | |
1888 | if (Controller->IO_Address == 0) | |
1889 | DAC960_Info("Unassigned\n", Controller); | |
1890 | else DAC960_Info("0x%X\n", Controller, Controller->IO_Address); | |
1891 | DAC960_Info(" PCI Address: 0x%X mapped at 0x%lX, IRQ Channel: %d\n", | |
1892 | Controller, Controller->PCI_Address, | |
1893 | (unsigned long) Controller->BaseAddress, | |
1894 | Controller->IRQ_Channel); | |
1895 | DAC960_Info(" Controller Queue Depth: %d, " | |
1896 | "Maximum Blocks per Command: %d\n", | |
1897 | Controller, Controller->ControllerQueueDepth, | |
1898 | Controller->MaxBlocksPerCommand); | |
1899 | DAC960_Info(" Driver Queue Depth: %d, " | |
1900 | "Scatter/Gather Limit: %d of %d Segments\n", | |
1901 | Controller, Controller->DriverQueueDepth, | |
1902 | Controller->DriverScatterGatherLimit, | |
1903 | Controller->ControllerScatterGatherLimit); | |
1904 | if (Controller->FirmwareType == DAC960_V1_Controller) | |
1905 | { | |
1906 | DAC960_Info(" Stripe Size: %dKB, Segment Size: %dKB, " | |
1907 | "BIOS Geometry: %d/%d\n", Controller, | |
1908 | Controller->V1.StripeSize, | |
1909 | Controller->V1.SegmentSize, | |
1910 | Controller->V1.GeometryTranslationHeads, | |
1911 | Controller->V1.GeometryTranslationSectors); | |
1912 | if (Controller->V1.SAFTE_EnclosureManagementEnabled) | |
1913 | DAC960_Info(" SAF-TE Enclosure Management Enabled\n", Controller); | |
1914 | } | |
1915 | return true; | |
1916 | } | |
1917 | ||
1918 | ||
1919 | /* | |
1920 | DAC960_V1_ReadDeviceConfiguration reads the Device Configuration Information | |
1921 | for DAC960 V1 Firmware Controllers by requesting the SCSI Inquiry and SCSI | |
1922 | Inquiry Unit Serial Number information for each device connected to | |
1923 | Controller. | |
1924 | */ | |
1925 | ||
1926 | static boolean DAC960_V1_ReadDeviceConfiguration(DAC960_Controller_T | |
1927 | *Controller) | |
1928 | { | |
1929 | struct dma_loaf local_dma; | |
1930 | ||
1931 | dma_addr_t DCDBs_dma[DAC960_V1_MaxChannels]; | |
1932 | DAC960_V1_DCDB_T *DCDBs_cpu[DAC960_V1_MaxChannels]; | |
1933 | ||
1934 | dma_addr_t SCSI_Inquiry_dma[DAC960_V1_MaxChannels]; | |
1935 | DAC960_SCSI_Inquiry_T *SCSI_Inquiry_cpu[DAC960_V1_MaxChannels]; | |
1936 | ||
1937 | dma_addr_t SCSI_NewInquiryUnitSerialNumberDMA[DAC960_V1_MaxChannels]; | |
1938 | DAC960_SCSI_Inquiry_UnitSerialNumber_T *SCSI_NewInquiryUnitSerialNumberCPU[DAC960_V1_MaxChannels]; | |
1939 | ||
1940 | struct completion Completions[DAC960_V1_MaxChannels]; | |
1941 | unsigned long flags; | |
1942 | int Channel, TargetID; | |
1943 | ||
1944 | if (!init_dma_loaf(Controller->PCIDevice, &local_dma, | |
1945 | DAC960_V1_MaxChannels*(sizeof(DAC960_V1_DCDB_T) + | |
1946 | sizeof(DAC960_SCSI_Inquiry_T) + | |
1947 | sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T)))) | |
1948 | return DAC960_Failure(Controller, | |
1949 | "DMA ALLOCATION FAILED IN ReadDeviceConfiguration"); | |
1950 | ||
1951 | for (Channel = 0; Channel < Controller->Channels; Channel++) { | |
1952 | DCDBs_cpu[Channel] = slice_dma_loaf(&local_dma, | |
1953 | sizeof(DAC960_V1_DCDB_T), DCDBs_dma + Channel); | |
1954 | SCSI_Inquiry_cpu[Channel] = slice_dma_loaf(&local_dma, | |
1955 | sizeof(DAC960_SCSI_Inquiry_T), | |
1956 | SCSI_Inquiry_dma + Channel); | |
1957 | SCSI_NewInquiryUnitSerialNumberCPU[Channel] = slice_dma_loaf(&local_dma, | |
1958 | sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T), | |
1959 | SCSI_NewInquiryUnitSerialNumberDMA + Channel); | |
1960 | } | |
1961 | ||
1962 | for (TargetID = 0; TargetID < Controller->Targets; TargetID++) | |
1963 | { | |
1964 | /* | |
1965 | * For each channel, submit a probe for a device on that channel. | |
1966 | * The timeout interval for a device that is present is 10 seconds. | |
1967 | * With this approach, the timeout periods can elapse in parallel | |
1968 | * on each channel. | |
1969 | */ | |
1970 | for (Channel = 0; Channel < Controller->Channels; Channel++) | |
1971 | { | |
1972 | dma_addr_t NewInquiryStandardDataDMA = SCSI_Inquiry_dma[Channel]; | |
1973 | DAC960_V1_DCDB_T *DCDB = DCDBs_cpu[Channel]; | |
1974 | dma_addr_t DCDB_dma = DCDBs_dma[Channel]; | |
1975 | DAC960_Command_T *Command = Controller->Commands[Channel]; | |
1976 | struct completion *Completion = &Completions[Channel]; | |
1977 | ||
1978 | init_completion(Completion); | |
1979 | DAC960_V1_ClearCommand(Command); | |
1980 | Command->CommandType = DAC960_ImmediateCommand; | |
1981 | Command->Completion = Completion; | |
1982 | Command->V1.CommandMailbox.Type3.CommandOpcode = DAC960_V1_DCDB; | |
1983 | Command->V1.CommandMailbox.Type3.BusAddress = DCDB_dma; | |
1984 | DCDB->Channel = Channel; | |
1985 | DCDB->TargetID = TargetID; | |
1986 | DCDB->Direction = DAC960_V1_DCDB_DataTransferDeviceToSystem; | |
1987 | DCDB->EarlyStatus = false; | |
1988 | DCDB->Timeout = DAC960_V1_DCDB_Timeout_10_seconds; | |
1989 | DCDB->NoAutomaticRequestSense = false; | |
1990 | DCDB->DisconnectPermitted = true; | |
1991 | DCDB->TransferLength = sizeof(DAC960_SCSI_Inquiry_T); | |
1992 | DCDB->BusAddress = NewInquiryStandardDataDMA; | |
1993 | DCDB->CDBLength = 6; | |
1994 | DCDB->TransferLengthHigh4 = 0; | |
1995 | DCDB->SenseLength = sizeof(DCDB->SenseData); | |
1996 | DCDB->CDB[0] = 0x12; /* INQUIRY */ | |
1997 | DCDB->CDB[1] = 0; /* EVPD = 0 */ | |
1998 | DCDB->CDB[2] = 0; /* Page Code */ | |
1999 | DCDB->CDB[3] = 0; /* Reserved */ | |
2000 | DCDB->CDB[4] = sizeof(DAC960_SCSI_Inquiry_T); | |
2001 | DCDB->CDB[5] = 0; /* Control */ | |
2002 | ||
2003 | spin_lock_irqsave(&Controller->queue_lock, flags); | |
2004 | DAC960_QueueCommand(Command); | |
2005 | spin_unlock_irqrestore(&Controller->queue_lock, flags); | |
2006 | } | |
2007 | /* | |
2008 | * Wait for the problems submitted in the previous loop | |
2009 | * to complete. On the probes that are successful, | |
2010 | * get the serial number of the device that was found. | |
2011 | */ | |
2012 | for (Channel = 0; Channel < Controller->Channels; Channel++) | |
2013 | { | |
2014 | DAC960_SCSI_Inquiry_T *InquiryStandardData = | |
2015 | &Controller->V1.InquiryStandardData[Channel][TargetID]; | |
2016 | DAC960_SCSI_Inquiry_T *NewInquiryStandardData = SCSI_Inquiry_cpu[Channel]; | |
2017 | dma_addr_t NewInquiryUnitSerialNumberDMA = | |
2018 | SCSI_NewInquiryUnitSerialNumberDMA[Channel]; | |
2019 | DAC960_SCSI_Inquiry_UnitSerialNumber_T *NewInquiryUnitSerialNumber = | |
2020 | SCSI_NewInquiryUnitSerialNumberCPU[Channel]; | |
2021 | DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber = | |
2022 | &Controller->V1.InquiryUnitSerialNumber[Channel][TargetID]; | |
2023 | DAC960_Command_T *Command = Controller->Commands[Channel]; | |
2024 | DAC960_V1_DCDB_T *DCDB = DCDBs_cpu[Channel]; | |
2025 | struct completion *Completion = &Completions[Channel]; | |
2026 | ||
2027 | wait_for_completion(Completion); | |
2028 | ||
2029 | if (Command->V1.CommandStatus != DAC960_V1_NormalCompletion) { | |
2030 | memset(InquiryStandardData, 0, sizeof(DAC960_SCSI_Inquiry_T)); | |
2031 | InquiryStandardData->PeripheralDeviceType = 0x1F; | |
2032 | continue; | |
2033 | } else | |
2034 | memcpy(InquiryStandardData, NewInquiryStandardData, sizeof(DAC960_SCSI_Inquiry_T)); | |
2035 | ||
2036 | /* Preserve Channel and TargetID values from the previous loop */ | |
2037 | Command->Completion = Completion; | |
2038 | DCDB->TransferLength = sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T); | |
2039 | DCDB->BusAddress = NewInquiryUnitSerialNumberDMA; | |
2040 | DCDB->SenseLength = sizeof(DCDB->SenseData); | |
2041 | DCDB->CDB[0] = 0x12; /* INQUIRY */ | |
2042 | DCDB->CDB[1] = 1; /* EVPD = 1 */ | |
2043 | DCDB->CDB[2] = 0x80; /* Page Code */ | |
2044 | DCDB->CDB[3] = 0; /* Reserved */ | |
2045 | DCDB->CDB[4] = sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T); | |
2046 | DCDB->CDB[5] = 0; /* Control */ | |
2047 | ||
2048 | spin_lock_irqsave(&Controller->queue_lock, flags); | |
2049 | DAC960_QueueCommand(Command); | |
2050 | spin_unlock_irqrestore(&Controller->queue_lock, flags); | |
2051 | wait_for_completion(Completion); | |
2052 | ||
2053 | if (Command->V1.CommandStatus != DAC960_V1_NormalCompletion) { | |
2054 | memset(InquiryUnitSerialNumber, 0, | |
2055 | sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T)); | |
2056 | InquiryUnitSerialNumber->PeripheralDeviceType = 0x1F; | |
2057 | } else | |
2058 | memcpy(InquiryUnitSerialNumber, NewInquiryUnitSerialNumber, | |
2059 | sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T)); | |
2060 | } | |
2061 | } | |
2062 | free_dma_loaf(Controller->PCIDevice, &local_dma); | |
2063 | return true; | |
2064 | } | |
2065 | ||
2066 | ||
2067 | /* | |
2068 | DAC960_V2_ReadDeviceConfiguration reads the Device Configuration Information | |
2069 | for DAC960 V2 Firmware Controllers by requesting the Physical Device | |
2070 | Information and SCSI Inquiry Unit Serial Number information for each | |
2071 | device connected to Controller. | |
2072 | */ | |
2073 | ||
2074 | static boolean DAC960_V2_ReadDeviceConfiguration(DAC960_Controller_T | |
2075 | *Controller) | |
2076 | { | |
2077 | unsigned char Channel = 0, TargetID = 0, LogicalUnit = 0; | |
2078 | unsigned short PhysicalDeviceIndex = 0; | |
2079 | ||
2080 | while (true) | |
2081 | { | |
2082 | DAC960_V2_PhysicalDeviceInfo_T *NewPhysicalDeviceInfo = | |
2083 | Controller->V2.NewPhysicalDeviceInformation; | |
2084 | DAC960_V2_PhysicalDeviceInfo_T *PhysicalDeviceInfo; | |
2085 | DAC960_SCSI_Inquiry_UnitSerialNumber_T *NewInquiryUnitSerialNumber = | |
2086 | Controller->V2.NewInquiryUnitSerialNumber; | |
2087 | DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber; | |
2088 | ||
2089 | if (!DAC960_V2_NewPhysicalDeviceInfo(Controller, Channel, TargetID, LogicalUnit)) | |
2090 | break; | |
2091 | ||
2092 | PhysicalDeviceInfo = (DAC960_V2_PhysicalDeviceInfo_T *) | |
2093 | kmalloc(sizeof(DAC960_V2_PhysicalDeviceInfo_T), GFP_ATOMIC); | |
2094 | if (PhysicalDeviceInfo == NULL) | |
2095 | return DAC960_Failure(Controller, "PHYSICAL DEVICE ALLOCATION"); | |
2096 | Controller->V2.PhysicalDeviceInformation[PhysicalDeviceIndex] = | |
2097 | PhysicalDeviceInfo; | |
2098 | memcpy(PhysicalDeviceInfo, NewPhysicalDeviceInfo, | |
2099 | sizeof(DAC960_V2_PhysicalDeviceInfo_T)); | |
2100 | ||
2101 | InquiryUnitSerialNumber = (DAC960_SCSI_Inquiry_UnitSerialNumber_T *) | |
2102 | kmalloc(sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T), GFP_ATOMIC); | |
2103 | if (InquiryUnitSerialNumber == NULL) { | |
2104 | kfree(PhysicalDeviceInfo); | |
2105 | return DAC960_Failure(Controller, "SERIAL NUMBER ALLOCATION"); | |
2106 | } | |
2107 | Controller->V2.InquiryUnitSerialNumber[PhysicalDeviceIndex] = | |
2108 | InquiryUnitSerialNumber; | |
2109 | ||
2110 | Channel = NewPhysicalDeviceInfo->Channel; | |
2111 | TargetID = NewPhysicalDeviceInfo->TargetID; | |
2112 | LogicalUnit = NewPhysicalDeviceInfo->LogicalUnit; | |
2113 | ||
2114 | /* | |
2115 | Some devices do NOT have Unit Serial Numbers. | |
2116 | This command fails for them. But, we still want to | |
2117 | remember those devices are there. Construct a | |
2118 | UnitSerialNumber structure for the failure case. | |
2119 | */ | |
2120 | if (!DAC960_V2_NewInquiryUnitSerialNumber(Controller, Channel, TargetID, LogicalUnit)) { | |
2121 | memset(InquiryUnitSerialNumber, 0, | |
2122 | sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T)); | |
2123 | InquiryUnitSerialNumber->PeripheralDeviceType = 0x1F; | |
2124 | } else | |
2125 | memcpy(InquiryUnitSerialNumber, NewInquiryUnitSerialNumber, | |
2126 | sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T)); | |
2127 | ||
2128 | PhysicalDeviceIndex++; | |
2129 | LogicalUnit++; | |
2130 | } | |
2131 | return true; | |
2132 | } | |
2133 | ||
2134 | ||
2135 | /* | |
2136 | DAC960_SanitizeInquiryData sanitizes the Vendor, Model, Revision, and | |
2137 | Product Serial Number fields of the Inquiry Standard Data and Inquiry | |
2138 | Unit Serial Number structures. | |
2139 | */ | |
2140 | ||
2141 | static void DAC960_SanitizeInquiryData(DAC960_SCSI_Inquiry_T | |
2142 | *InquiryStandardData, | |
2143 | DAC960_SCSI_Inquiry_UnitSerialNumber_T | |
2144 | *InquiryUnitSerialNumber, | |
2145 | unsigned char *Vendor, | |
2146 | unsigned char *Model, | |
2147 | unsigned char *Revision, | |
2148 | unsigned char *SerialNumber) | |
2149 | { | |
2150 | int SerialNumberLength, i; | |
2151 | if (InquiryStandardData->PeripheralDeviceType == 0x1F) return; | |
2152 | for (i = 0; i < sizeof(InquiryStandardData->VendorIdentification); i++) | |
2153 | { | |
2154 | unsigned char VendorCharacter = | |
2155 | InquiryStandardData->VendorIdentification[i]; | |
2156 | Vendor[i] = (VendorCharacter >= ' ' && VendorCharacter <= '~' | |
2157 | ? VendorCharacter : ' '); | |
2158 | } | |
2159 | Vendor[sizeof(InquiryStandardData->VendorIdentification)] = '\0'; | |
2160 | for (i = 0; i < sizeof(InquiryStandardData->ProductIdentification); i++) | |
2161 | { | |
2162 | unsigned char ModelCharacter = | |
2163 | InquiryStandardData->ProductIdentification[i]; | |
2164 | Model[i] = (ModelCharacter >= ' ' && ModelCharacter <= '~' | |
2165 | ? ModelCharacter : ' '); | |
2166 | } | |
2167 | Model[sizeof(InquiryStandardData->ProductIdentification)] = '\0'; | |
2168 | for (i = 0; i < sizeof(InquiryStandardData->ProductRevisionLevel); i++) | |
2169 | { | |
2170 | unsigned char RevisionCharacter = | |
2171 | InquiryStandardData->ProductRevisionLevel[i]; | |
2172 | Revision[i] = (RevisionCharacter >= ' ' && RevisionCharacter <= '~' | |
2173 | ? RevisionCharacter : ' '); | |
2174 | } | |
2175 | Revision[sizeof(InquiryStandardData->ProductRevisionLevel)] = '\0'; | |
2176 | if (InquiryUnitSerialNumber->PeripheralDeviceType == 0x1F) return; | |
2177 | SerialNumberLength = InquiryUnitSerialNumber->PageLength; | |
2178 | if (SerialNumberLength > | |
2179 | sizeof(InquiryUnitSerialNumber->ProductSerialNumber)) | |
2180 | SerialNumberLength = sizeof(InquiryUnitSerialNumber->ProductSerialNumber); | |
2181 | for (i = 0; i < SerialNumberLength; i++) | |
2182 | { | |
2183 | unsigned char SerialNumberCharacter = | |
2184 | InquiryUnitSerialNumber->ProductSerialNumber[i]; | |
2185 | SerialNumber[i] = | |
2186 | (SerialNumberCharacter >= ' ' && SerialNumberCharacter <= '~' | |
2187 | ? SerialNumberCharacter : ' '); | |
2188 | } | |
2189 | SerialNumber[SerialNumberLength] = '\0'; | |
2190 | } | |
2191 | ||
2192 | ||
2193 | /* | |
2194 | DAC960_V1_ReportDeviceConfiguration reports the Device Configuration | |
2195 | Information for DAC960 V1 Firmware Controllers. | |
2196 | */ | |
2197 | ||
2198 | static boolean DAC960_V1_ReportDeviceConfiguration(DAC960_Controller_T | |
2199 | *Controller) | |
2200 | { | |
2201 | int LogicalDriveNumber, Channel, TargetID; | |
2202 | DAC960_Info(" Physical Devices:\n", Controller); | |
2203 | for (Channel = 0; Channel < Controller->Channels; Channel++) | |
2204 | for (TargetID = 0; TargetID < Controller->Targets; TargetID++) | |
2205 | { | |
2206 | DAC960_SCSI_Inquiry_T *InquiryStandardData = | |
2207 | &Controller->V1.InquiryStandardData[Channel][TargetID]; | |
2208 | DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber = | |
2209 | &Controller->V1.InquiryUnitSerialNumber[Channel][TargetID]; | |
2210 | DAC960_V1_DeviceState_T *DeviceState = | |
2211 | &Controller->V1.DeviceState[Channel][TargetID]; | |
2212 | DAC960_V1_ErrorTableEntry_T *ErrorEntry = | |
2213 | &Controller->V1.ErrorTable.ErrorTableEntries[Channel][TargetID]; | |
2214 | char Vendor[1+sizeof(InquiryStandardData->VendorIdentification)]; | |
2215 | char Model[1+sizeof(InquiryStandardData->ProductIdentification)]; | |
2216 | char Revision[1+sizeof(InquiryStandardData->ProductRevisionLevel)]; | |
2217 | char SerialNumber[1+sizeof(InquiryUnitSerialNumber | |
2218 | ->ProductSerialNumber)]; | |
2219 | if (InquiryStandardData->PeripheralDeviceType == 0x1F) continue; | |
2220 | DAC960_SanitizeInquiryData(InquiryStandardData, InquiryUnitSerialNumber, | |
2221 | Vendor, Model, Revision, SerialNumber); | |
2222 | DAC960_Info(" %d:%d%s Vendor: %s Model: %s Revision: %s\n", | |
2223 | Controller, Channel, TargetID, (TargetID < 10 ? " " : ""), | |
2224 | Vendor, Model, Revision); | |
2225 | if (InquiryUnitSerialNumber->PeripheralDeviceType != 0x1F) | |
2226 | DAC960_Info(" Serial Number: %s\n", Controller, SerialNumber); | |
2227 | if (DeviceState->Present && | |
2228 | DeviceState->DeviceType == DAC960_V1_DiskType) | |
2229 | { | |
2230 | if (Controller->V1.DeviceResetCount[Channel][TargetID] > 0) | |
2231 | DAC960_Info(" Disk Status: %s, %u blocks, %d resets\n", | |
2232 | Controller, | |
2233 | (DeviceState->DeviceState == DAC960_V1_Device_Dead | |
2234 | ? "Dead" | |
2235 | : DeviceState->DeviceState | |
2236 | == DAC960_V1_Device_WriteOnly | |
2237 | ? "Write-Only" | |
2238 | : DeviceState->DeviceState | |
2239 | == DAC960_V1_Device_Online | |
2240 | ? "Online" : "Standby"), | |
2241 | DeviceState->DiskSize, | |
2242 | Controller->V1.DeviceResetCount[Channel][TargetID]); | |
2243 | else | |
2244 | DAC960_Info(" Disk Status: %s, %u blocks\n", Controller, | |
2245 | (DeviceState->DeviceState == DAC960_V1_Device_Dead | |
2246 | ? "Dead" | |
2247 | : DeviceState->DeviceState | |
2248 | == DAC960_V1_Device_WriteOnly | |
2249 | ? "Write-Only" | |
2250 | : DeviceState->DeviceState | |
2251 | == DAC960_V1_Device_Online | |
2252 | ? "Online" : "Standby"), | |
2253 | DeviceState->DiskSize); | |
2254 | } | |
2255 | if (ErrorEntry->ParityErrorCount > 0 || | |
2256 | ErrorEntry->SoftErrorCount > 0 || | |
2257 | ErrorEntry->HardErrorCount > 0 || | |
2258 | ErrorEntry->MiscErrorCount > 0) | |
2259 | DAC960_Info(" Errors - Parity: %d, Soft: %d, " | |
2260 | "Hard: %d, Misc: %d\n", Controller, | |
2261 | ErrorEntry->ParityErrorCount, | |
2262 | ErrorEntry->SoftErrorCount, | |
2263 | ErrorEntry->HardErrorCount, | |
2264 | ErrorEntry->MiscErrorCount); | |
2265 | } | |
2266 | DAC960_Info(" Logical Drives:\n", Controller); | |
2267 | for (LogicalDriveNumber = 0; | |
2268 | LogicalDriveNumber < Controller->LogicalDriveCount; | |
2269 | LogicalDriveNumber++) | |
2270 | { | |
2271 | DAC960_V1_LogicalDriveInformation_T *LogicalDriveInformation = | |
2272 | &Controller->V1.LogicalDriveInformation[LogicalDriveNumber]; | |
2273 | DAC960_Info(" /dev/rd/c%dd%d: RAID-%d, %s, %u blocks, %s\n", | |
2274 | Controller, Controller->ControllerNumber, LogicalDriveNumber, | |
2275 | LogicalDriveInformation->RAIDLevel, | |
2276 | (LogicalDriveInformation->LogicalDriveState | |
2277 | == DAC960_V1_LogicalDrive_Online | |
2278 | ? "Online" | |
2279 | : LogicalDriveInformation->LogicalDriveState | |
2280 | == DAC960_V1_LogicalDrive_Critical | |
2281 | ? "Critical" : "Offline"), | |
2282 | LogicalDriveInformation->LogicalDriveSize, | |
2283 | (LogicalDriveInformation->WriteBack | |
2284 | ? "Write Back" : "Write Thru")); | |
2285 | } | |
2286 | return true; | |
2287 | } | |
2288 | ||
2289 | ||
2290 | /* | |
2291 | DAC960_V2_ReportDeviceConfiguration reports the Device Configuration | |
2292 | Information for DAC960 V2 Firmware Controllers. | |
2293 | */ | |
2294 | ||
2295 | static boolean DAC960_V2_ReportDeviceConfiguration(DAC960_Controller_T | |
2296 | *Controller) | |
2297 | { | |
2298 | int PhysicalDeviceIndex, LogicalDriveNumber; | |
2299 | DAC960_Info(" Physical Devices:\n", Controller); | |
2300 | for (PhysicalDeviceIndex = 0; | |
2301 | PhysicalDeviceIndex < DAC960_V2_MaxPhysicalDevices; | |
2302 | PhysicalDeviceIndex++) | |
2303 | { | |
2304 | DAC960_V2_PhysicalDeviceInfo_T *PhysicalDeviceInfo = | |
2305 | Controller->V2.PhysicalDeviceInformation[PhysicalDeviceIndex]; | |
2306 | DAC960_SCSI_Inquiry_T *InquiryStandardData = | |
2307 | (DAC960_SCSI_Inquiry_T *) &PhysicalDeviceInfo->SCSI_InquiryData; | |
2308 | DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber = | |
2309 | Controller->V2.InquiryUnitSerialNumber[PhysicalDeviceIndex]; | |
2310 | char Vendor[1+sizeof(InquiryStandardData->VendorIdentification)]; | |
2311 | char Model[1+sizeof(InquiryStandardData->ProductIdentification)]; | |
2312 | char Revision[1+sizeof(InquiryStandardData->ProductRevisionLevel)]; | |
2313 | char SerialNumber[1+sizeof(InquiryUnitSerialNumber->ProductSerialNumber)]; | |
2314 | if (PhysicalDeviceInfo == NULL) break; | |
2315 | DAC960_SanitizeInquiryData(InquiryStandardData, InquiryUnitSerialNumber, | |
2316 | Vendor, Model, Revision, SerialNumber); | |
2317 | DAC960_Info(" %d:%d%s Vendor: %s Model: %s Revision: %s\n", | |
2318 | Controller, | |
2319 | PhysicalDeviceInfo->Channel, | |
2320 | PhysicalDeviceInfo->TargetID, | |
2321 | (PhysicalDeviceInfo->TargetID < 10 ? " " : ""), | |
2322 | Vendor, Model, Revision); | |
2323 | if (PhysicalDeviceInfo->NegotiatedSynchronousMegaTransfers == 0) | |
2324 | DAC960_Info(" %sAsynchronous\n", Controller, | |
2325 | (PhysicalDeviceInfo->NegotiatedDataWidthBits == 16 | |
2326 | ? "Wide " :"")); | |
2327 | else | |
2328 | DAC960_Info(" %sSynchronous at %d MB/sec\n", Controller, | |
2329 | (PhysicalDeviceInfo->NegotiatedDataWidthBits == 16 | |
2330 | ? "Wide " :""), | |
2331 | (PhysicalDeviceInfo->NegotiatedSynchronousMegaTransfers | |
2332 | * PhysicalDeviceInfo->NegotiatedDataWidthBits/8)); | |
2333 | if (InquiryUnitSerialNumber->PeripheralDeviceType != 0x1F) | |
2334 | DAC960_Info(" Serial Number: %s\n", Controller, SerialNumber); | |
2335 | if (PhysicalDeviceInfo->PhysicalDeviceState == | |
2336 | DAC960_V2_Device_Unconfigured) | |
2337 | continue; | |
2338 | DAC960_Info(" Disk Status: %s, %u blocks\n", Controller, | |
2339 | (PhysicalDeviceInfo->PhysicalDeviceState | |
2340 | == DAC960_V2_Device_Online | |
2341 | ? "Online" | |
2342 | : PhysicalDeviceInfo->PhysicalDeviceState | |
2343 | == DAC960_V2_Device_Rebuild | |
2344 | ? "Rebuild" | |
2345 | : PhysicalDeviceInfo->PhysicalDeviceState | |
2346 | == DAC960_V2_Device_Missing | |
2347 | ? "Missing" | |
2348 | : PhysicalDeviceInfo->PhysicalDeviceState | |
2349 | == DAC960_V2_Device_Critical | |
2350 | ? "Critical" | |
2351 | : PhysicalDeviceInfo->PhysicalDeviceState | |
2352 | == DAC960_V2_Device_Dead | |
2353 | ? "Dead" | |
2354 | : PhysicalDeviceInfo->PhysicalDeviceState | |
2355 | == DAC960_V2_Device_SuspectedDead | |
2356 | ? "Suspected-Dead" | |
2357 | : PhysicalDeviceInfo->PhysicalDeviceState | |
2358 | == DAC960_V2_Device_CommandedOffline | |
2359 | ? "Commanded-Offline" | |
2360 | : PhysicalDeviceInfo->PhysicalDeviceState | |
2361 | == DAC960_V2_Device_Standby | |
2362 | ? "Standby" : "Unknown"), | |
2363 | PhysicalDeviceInfo->ConfigurableDeviceSize); | |
2364 | if (PhysicalDeviceInfo->ParityErrors == 0 && | |
2365 | PhysicalDeviceInfo->SoftErrors == 0 && | |
2366 | PhysicalDeviceInfo->HardErrors == 0 && | |
2367 | PhysicalDeviceInfo->MiscellaneousErrors == 0 && | |
2368 | PhysicalDeviceInfo->CommandTimeouts == 0 && | |
2369 | PhysicalDeviceInfo->Retries == 0 && | |
2370 | PhysicalDeviceInfo->Aborts == 0 && | |
2371 | PhysicalDeviceInfo->PredictedFailuresDetected == 0) | |
2372 | continue; | |
2373 | DAC960_Info(" Errors - Parity: %d, Soft: %d, " | |
2374 | "Hard: %d, Misc: %d\n", Controller, | |
2375 | PhysicalDeviceInfo->ParityErrors, | |
2376 | PhysicalDeviceInfo->SoftErrors, | |
2377 | PhysicalDeviceInfo->HardErrors, | |
2378 | PhysicalDeviceInfo->MiscellaneousErrors); | |
2379 | DAC960_Info(" Timeouts: %d, Retries: %d, " | |
2380 | "Aborts: %d, Predicted: %d\n", Controller, | |
2381 | PhysicalDeviceInfo->CommandTimeouts, | |
2382 | PhysicalDeviceInfo->Retries, | |
2383 | PhysicalDeviceInfo->Aborts, | |
2384 | PhysicalDeviceInfo->PredictedFailuresDetected); | |
2385 | } | |
2386 | DAC960_Info(" Logical Drives:\n", Controller); | |
2387 | for (LogicalDriveNumber = 0; | |
2388 | LogicalDriveNumber < DAC960_MaxLogicalDrives; | |
2389 | LogicalDriveNumber++) | |
2390 | { | |
2391 | DAC960_V2_LogicalDeviceInfo_T *LogicalDeviceInfo = | |
2392 | Controller->V2.LogicalDeviceInformation[LogicalDriveNumber]; | |
2393 | unsigned char *ReadCacheStatus[] = { "Read Cache Disabled", | |
2394 | "Read Cache Enabled", | |
2395 | "Read Ahead Enabled", | |
2396 | "Intelligent Read Ahead Enabled", | |
2397 | "-", "-", "-", "-" }; | |
2398 | unsigned char *WriteCacheStatus[] = { "Write Cache Disabled", | |
2399 | "Logical Device Read Only", | |
2400 | "Write Cache Enabled", | |
2401 | "Intelligent Write Cache Enabled", | |
2402 | "-", "-", "-", "-" }; | |
2403 | unsigned char *GeometryTranslation; | |
2404 | if (LogicalDeviceInfo == NULL) continue; | |
2405 | switch (LogicalDeviceInfo->DriveGeometry) | |
2406 | { | |
2407 | case DAC960_V2_Geometry_128_32: | |
2408 | GeometryTranslation = "128/32"; | |
2409 | break; | |
2410 | case DAC960_V2_Geometry_255_63: | |
2411 | GeometryTranslation = "255/63"; | |
2412 | break; | |
2413 | default: | |
2414 | GeometryTranslation = "Invalid"; | |
2415 | DAC960_Error("Illegal Logical Device Geometry %d\n", | |
2416 | Controller, LogicalDeviceInfo->DriveGeometry); | |
2417 | break; | |
2418 | } | |
2419 | DAC960_Info(" /dev/rd/c%dd%d: RAID-%d, %s, %u blocks\n", | |
2420 | Controller, Controller->ControllerNumber, LogicalDriveNumber, | |
2421 | LogicalDeviceInfo->RAIDLevel, | |
2422 | (LogicalDeviceInfo->LogicalDeviceState | |
2423 | == DAC960_V2_LogicalDevice_Online | |
2424 | ? "Online" | |
2425 | : LogicalDeviceInfo->LogicalDeviceState | |
2426 | == DAC960_V2_LogicalDevice_Critical | |
2427 | ? "Critical" : "Offline"), | |
2428 | LogicalDeviceInfo->ConfigurableDeviceSize); | |
2429 | DAC960_Info(" Logical Device %s, BIOS Geometry: %s\n", | |
2430 | Controller, | |
2431 | (LogicalDeviceInfo->LogicalDeviceControl | |
2432 | .LogicalDeviceInitialized | |
2433 | ? "Initialized" : "Uninitialized"), | |
2434 | GeometryTranslation); | |
2435 | if (LogicalDeviceInfo->StripeSize == 0) | |
2436 | { | |
2437 | if (LogicalDeviceInfo->CacheLineSize == 0) | |
2438 | DAC960_Info(" Stripe Size: N/A, " | |
2439 | "Segment Size: N/A\n", Controller); | |
2440 | else | |
2441 | DAC960_Info(" Stripe Size: N/A, " | |
2442 | "Segment Size: %dKB\n", Controller, | |
2443 | 1 << (LogicalDeviceInfo->CacheLineSize - 2)); | |
2444 | } | |
2445 | else | |
2446 | { | |
2447 | if (LogicalDeviceInfo->CacheLineSize == 0) | |
2448 | DAC960_Info(" Stripe Size: %dKB, " | |
2449 | "Segment Size: N/A\n", Controller, | |
2450 | 1 << (LogicalDeviceInfo->StripeSize - 2)); | |
2451 | else | |
2452 | DAC960_Info(" Stripe Size: %dKB, " | |
2453 | "Segment Size: %dKB\n", Controller, | |
2454 | 1 << (LogicalDeviceInfo->StripeSize - 2), | |
2455 | 1 << (LogicalDeviceInfo->CacheLineSize - 2)); | |
2456 | } | |
2457 | DAC960_Info(" %s, %s\n", Controller, | |
2458 | ReadCacheStatus[ | |
2459 | LogicalDeviceInfo->LogicalDeviceControl.ReadCache], | |
2460 | WriteCacheStatus[ | |
2461 | LogicalDeviceInfo->LogicalDeviceControl.WriteCache]); | |
2462 | if (LogicalDeviceInfo->SoftErrors > 0 || | |
2463 | LogicalDeviceInfo->CommandsFailed > 0 || | |
2464 | LogicalDeviceInfo->DeferredWriteErrors) | |
2465 | DAC960_Info(" Errors - Soft: %d, Failed: %d, " | |
2466 | "Deferred Write: %d\n", Controller, | |
2467 | LogicalDeviceInfo->SoftErrors, | |
2468 | LogicalDeviceInfo->CommandsFailed, | |
2469 | LogicalDeviceInfo->DeferredWriteErrors); | |
2470 | ||
2471 | } | |
2472 | return true; | |
2473 | } | |
2474 | ||
2475 | /* | |
2476 | DAC960_RegisterBlockDevice registers the Block Device structures | |
2477 | associated with Controller. | |
2478 | */ | |
2479 | ||
2480 | static boolean DAC960_RegisterBlockDevice(DAC960_Controller_T *Controller) | |
2481 | { | |
2482 | int MajorNumber = DAC960_MAJOR + Controller->ControllerNumber; | |
2483 | int n; | |
2484 | ||
2485 | /* | |
2486 | Register the Block Device Major Number for this DAC960 Controller. | |
2487 | */ | |
2488 | if (register_blkdev(MajorNumber, "dac960") < 0) | |
2489 | return false; | |
2490 | ||
2491 | for (n = 0; n < DAC960_MaxLogicalDrives; n++) { | |
2492 | struct gendisk *disk = Controller->disks[n]; | |
2493 | struct request_queue *RequestQueue; | |
2494 | ||
2495 | /* for now, let all request queues share controller's lock */ | |
2496 | RequestQueue = blk_init_queue(DAC960_RequestFunction,&Controller->queue_lock); | |
2497 | if (!RequestQueue) { | |
2498 | printk("DAC960: failure to allocate request queue\n"); | |
2499 | continue; | |
2500 | } | |
2501 | Controller->RequestQueue[n] = RequestQueue; | |
2502 | blk_queue_bounce_limit(RequestQueue, Controller->BounceBufferLimit); | |
2503 | RequestQueue->queuedata = Controller; | |
2504 | blk_queue_max_hw_segments(RequestQueue, Controller->DriverScatterGatherLimit); | |
2505 | blk_queue_max_phys_segments(RequestQueue, Controller->DriverScatterGatherLimit); | |
2506 | blk_queue_max_sectors(RequestQueue, Controller->MaxBlocksPerCommand); | |
2507 | disk->queue = RequestQueue; | |
2508 | sprintf(disk->disk_name, "rd/c%dd%d", Controller->ControllerNumber, n); | |
2509 | sprintf(disk->devfs_name, "rd/host%d/target%d", Controller->ControllerNumber, n); | |
2510 | disk->major = MajorNumber; | |
2511 | disk->first_minor = n << DAC960_MaxPartitionsBits; | |
2512 | disk->fops = &DAC960_BlockDeviceOperations; | |
2513 | } | |
2514 | /* | |
2515 | Indicate the Block Device Registration completed successfully, | |
2516 | */ | |
2517 | return true; | |
2518 | } | |
2519 | ||
2520 | ||
2521 | /* | |
2522 | DAC960_UnregisterBlockDevice unregisters the Block Device structures | |
2523 | associated with Controller. | |
2524 | */ | |
2525 | ||
2526 | static void DAC960_UnregisterBlockDevice(DAC960_Controller_T *Controller) | |
2527 | { | |
2528 | int MajorNumber = DAC960_MAJOR + Controller->ControllerNumber; | |
2529 | int disk; | |
2530 | ||
2531 | /* does order matter when deleting gendisk and cleanup in request queue? */ | |
2532 | for (disk = 0; disk < DAC960_MaxLogicalDrives; disk++) { | |
2533 | del_gendisk(Controller->disks[disk]); | |
2534 | blk_cleanup_queue(Controller->RequestQueue[disk]); | |
2535 | Controller->RequestQueue[disk] = NULL; | |
2536 | } | |
2537 | ||
2538 | /* | |
2539 | Unregister the Block Device Major Number for this DAC960 Controller. | |
2540 | */ | |
2541 | unregister_blkdev(MajorNumber, "dac960"); | |
2542 | } | |
2543 | ||
2544 | /* | |
2545 | DAC960_ComputeGenericDiskInfo computes the values for the Generic Disk | |
2546 | Information Partition Sector Counts and Block Sizes. | |
2547 | */ | |
2548 | ||
2549 | static void DAC960_ComputeGenericDiskInfo(DAC960_Controller_T *Controller) | |
2550 | { | |
2551 | int disk; | |
2552 | for (disk = 0; disk < DAC960_MaxLogicalDrives; disk++) | |
2553 | set_capacity(Controller->disks[disk], disk_size(Controller, disk)); | |
2554 | } | |
2555 | ||
2556 | /* | |
2557 | DAC960_ReportErrorStatus reports Controller BIOS Messages passed through | |
2558 | the Error Status Register when the driver performs the BIOS handshaking. | |
2559 | It returns true for fatal errors and false otherwise. | |
2560 | */ | |
2561 | ||
2562 | static boolean DAC960_ReportErrorStatus(DAC960_Controller_T *Controller, | |
2563 | unsigned char ErrorStatus, | |
2564 | unsigned char Parameter0, | |
2565 | unsigned char Parameter1) | |
2566 | { | |
2567 | switch (ErrorStatus) | |
2568 | { | |
2569 | case 0x00: | |
2570 | DAC960_Notice("Physical Device %d:%d Not Responding\n", | |
2571 | Controller, Parameter1, Parameter0); | |
2572 | break; | |
2573 | case 0x08: | |
2574 | if (Controller->DriveSpinUpMessageDisplayed) break; | |
2575 | DAC960_Notice("Spinning Up Drives\n", Controller); | |
2576 | Controller->DriveSpinUpMessageDisplayed = true; | |
2577 | break; | |
2578 | case 0x30: | |
2579 | DAC960_Notice("Configuration Checksum Error\n", Controller); | |
2580 | break; | |
2581 | case 0x60: | |
2582 | DAC960_Notice("Mirror Race Recovery Failed\n", Controller); | |
2583 | break; | |
2584 | case 0x70: | |
2585 | DAC960_Notice("Mirror Race Recovery In Progress\n", Controller); | |
2586 | break; | |
2587 | case 0x90: | |
2588 | DAC960_Notice("Physical Device %d:%d COD Mismatch\n", | |
2589 | Controller, Parameter1, Parameter0); | |
2590 | break; | |
2591 | case 0xA0: | |
2592 | DAC960_Notice("Logical Drive Installation Aborted\n", Controller); | |
2593 | break; | |
2594 | case 0xB0: | |
2595 | DAC960_Notice("Mirror Race On A Critical Logical Drive\n", Controller); | |
2596 | break; | |
2597 | case 0xD0: | |
2598 | DAC960_Notice("New Controller Configuration Found\n", Controller); | |
2599 | break; | |
2600 | case 0xF0: | |
2601 | DAC960_Error("Fatal Memory Parity Error for Controller at\n", Controller); | |
2602 | return true; | |
2603 | default: | |
2604 | DAC960_Error("Unknown Initialization Error %02X for Controller at\n", | |
2605 | Controller, ErrorStatus); | |
2606 | return true; | |
2607 | } | |
2608 | return false; | |
2609 | } | |
2610 | ||
2611 | ||
2612 | /* | |
2613 | * DAC960_DetectCleanup releases the resources that were allocated | |
2614 | * during DAC960_DetectController(). DAC960_DetectController can | |
2615 | * has several internal failure points, so not ALL resources may | |
2616 | * have been allocated. It's important to free only | |
2617 | * resources that HAVE been allocated. The code below always | |
2618 | * tests that the resource has been allocated before attempting to | |
2619 | * free it. | |
2620 | */ | |
2621 | static void DAC960_DetectCleanup(DAC960_Controller_T *Controller) | |
2622 | { | |
2623 | int i; | |
2624 | ||
2625 | /* Free the memory mailbox, status, and related structures */ | |
2626 | free_dma_loaf(Controller->PCIDevice, &Controller->DmaPages); | |
2627 | if (Controller->MemoryMappedAddress) { | |
2628 | switch(Controller->HardwareType) | |
2629 | { | |
2630 | case DAC960_BA_Controller: | |
2631 | DAC960_BA_DisableInterrupts(Controller->BaseAddress); | |
2632 | break; | |
2633 | case DAC960_LP_Controller: | |
2634 | DAC960_LP_DisableInterrupts(Controller->BaseAddress); | |
2635 | break; | |
2636 | case DAC960_LA_Controller: | |
2637 | DAC960_LA_DisableInterrupts(Controller->BaseAddress); | |
2638 | break; | |
2639 | case DAC960_PG_Controller: | |
2640 | DAC960_PG_DisableInterrupts(Controller->BaseAddress); | |
2641 | break; | |
2642 | case DAC960_PD_Controller: | |
2643 | DAC960_PD_DisableInterrupts(Controller->BaseAddress); | |
2644 | break; | |
2645 | case DAC960_P_Controller: | |
2646 | DAC960_PD_DisableInterrupts(Controller->BaseAddress); | |
2647 | break; | |
2648 | } | |
2649 | iounmap(Controller->MemoryMappedAddress); | |
2650 | } | |
2651 | if (Controller->IRQ_Channel) | |
2652 | free_irq(Controller->IRQ_Channel, Controller); | |
2653 | if (Controller->IO_Address) | |
2654 | release_region(Controller->IO_Address, 0x80); | |
2655 | pci_disable_device(Controller->PCIDevice); | |
2656 | for (i = 0; (i < DAC960_MaxLogicalDrives) && Controller->disks[i]; i++) | |
2657 | put_disk(Controller->disks[i]); | |
2658 | DAC960_Controllers[Controller->ControllerNumber] = NULL; | |
2659 | kfree(Controller); | |
2660 | } | |
2661 | ||
2662 | ||
2663 | /* | |
2664 | DAC960_DetectController detects Mylex DAC960/AcceleRAID/eXtremeRAID | |
2665 | PCI RAID Controllers by interrogating the PCI Configuration Space for | |
2666 | Controller Type. | |
2667 | */ | |
2668 | ||
2669 | static DAC960_Controller_T * | |
2670 | DAC960_DetectController(struct pci_dev *PCI_Device, | |
2671 | const struct pci_device_id *entry) | |
2672 | { | |
2673 | struct DAC960_privdata *privdata = | |
2674 | (struct DAC960_privdata *)entry->driver_data; | |
2675 | irqreturn_t (*InterruptHandler)(int, void *, struct pt_regs *) = | |
2676 | privdata->InterruptHandler; | |
2677 | unsigned int MemoryWindowSize = privdata->MemoryWindowSize; | |
2678 | DAC960_Controller_T *Controller = NULL; | |
2679 | unsigned char DeviceFunction = PCI_Device->devfn; | |
2680 | unsigned char ErrorStatus, Parameter0, Parameter1; | |
2681 | unsigned int IRQ_Channel; | |
2682 | void __iomem *BaseAddress; | |
2683 | int i; | |
2684 | ||
2685 | Controller = (DAC960_Controller_T *) | |
2686 | kmalloc(sizeof(DAC960_Controller_T), GFP_ATOMIC); | |
2687 | if (Controller == NULL) { | |
2688 | DAC960_Error("Unable to allocate Controller structure for " | |
2689 | "Controller at\n", NULL); | |
2690 | return NULL; | |
2691 | } | |
2692 | memset(Controller, 0, sizeof(DAC960_Controller_T)); | |
2693 | Controller->ControllerNumber = DAC960_ControllerCount; | |
2694 | DAC960_Controllers[DAC960_ControllerCount++] = Controller; | |
2695 | Controller->Bus = PCI_Device->bus->number; | |
2696 | Controller->FirmwareType = privdata->FirmwareType; | |
2697 | Controller->HardwareType = privdata->HardwareType; | |
2698 | Controller->Device = DeviceFunction >> 3; | |
2699 | Controller->Function = DeviceFunction & 0x7; | |
2700 | Controller->PCIDevice = PCI_Device; | |
2701 | strcpy(Controller->FullModelName, "DAC960"); | |
2702 | ||
2703 | if (pci_enable_device(PCI_Device)) | |
2704 | goto Failure; | |
2705 | ||
2706 | switch (Controller->HardwareType) | |
2707 | { | |
2708 | case DAC960_BA_Controller: | |
2709 | Controller->PCI_Address = pci_resource_start(PCI_Device, 0); | |
2710 | break; | |
2711 | case DAC960_LP_Controller: | |
2712 | Controller->PCI_Address = pci_resource_start(PCI_Device, 0); | |
2713 | break; | |
2714 | case DAC960_LA_Controller: | |
2715 | Controller->PCI_Address = pci_resource_start(PCI_Device, 0); | |
2716 | break; | |
2717 | case DAC960_PG_Controller: | |
2718 | Controller->PCI_Address = pci_resource_start(PCI_Device, 0); | |
2719 | break; | |
2720 | case DAC960_PD_Controller: | |
2721 | Controller->IO_Address = pci_resource_start(PCI_Device, 0); | |
2722 | Controller->PCI_Address = pci_resource_start(PCI_Device, 1); | |
2723 | break; | |
2724 | case DAC960_P_Controller: | |
2725 | Controller->IO_Address = pci_resource_start(PCI_Device, 0); | |
2726 | Controller->PCI_Address = pci_resource_start(PCI_Device, 1); | |
2727 | break; | |
2728 | } | |
2729 | ||
2730 | pci_set_drvdata(PCI_Device, (void *)((long)Controller->ControllerNumber)); | |
2731 | for (i = 0; i < DAC960_MaxLogicalDrives; i++) { | |
2732 | Controller->disks[i] = alloc_disk(1<<DAC960_MaxPartitionsBits); | |
2733 | if (!Controller->disks[i]) | |
2734 | goto Failure; | |
2735 | Controller->disks[i]->private_data = (void *)((long)i); | |
2736 | } | |
2737 | init_waitqueue_head(&Controller->CommandWaitQueue); | |
2738 | init_waitqueue_head(&Controller->HealthStatusWaitQueue); | |
2739 | spin_lock_init(&Controller->queue_lock); | |
2740 | DAC960_AnnounceDriver(Controller); | |
2741 | /* | |
2742 | Map the Controller Register Window. | |
2743 | */ | |
2744 | if (MemoryWindowSize < PAGE_SIZE) | |
2745 | MemoryWindowSize = PAGE_SIZE; | |
2746 | Controller->MemoryMappedAddress = | |
2747 | ioremap_nocache(Controller->PCI_Address & PAGE_MASK, MemoryWindowSize); | |
2748 | Controller->BaseAddress = | |
2749 | Controller->MemoryMappedAddress + (Controller->PCI_Address & ~PAGE_MASK); | |
2750 | if (Controller->MemoryMappedAddress == NULL) | |
2751 | { | |
2752 | DAC960_Error("Unable to map Controller Register Window for " | |
2753 | "Controller at\n", Controller); | |
2754 | goto Failure; | |
2755 | } | |
2756 | BaseAddress = Controller->BaseAddress; | |
2757 | switch (Controller->HardwareType) | |
2758 | { | |
2759 | case DAC960_BA_Controller: | |
2760 | DAC960_BA_DisableInterrupts(BaseAddress); | |
2761 | DAC960_BA_AcknowledgeHardwareMailboxStatus(BaseAddress); | |
2762 | udelay(1000); | |
2763 | while (DAC960_BA_InitializationInProgressP(BaseAddress)) | |
2764 | { | |
2765 | if (DAC960_BA_ReadErrorStatus(BaseAddress, &ErrorStatus, | |
2766 | &Parameter0, &Parameter1) && | |
2767 | DAC960_ReportErrorStatus(Controller, ErrorStatus, | |
2768 | Parameter0, Parameter1)) | |
2769 | goto Failure; | |
2770 | udelay(10); | |
2771 | } | |
2772 | if (!DAC960_V2_EnableMemoryMailboxInterface(Controller)) | |
2773 | { | |
2774 | DAC960_Error("Unable to Enable Memory Mailbox Interface " | |
2775 | "for Controller at\n", Controller); | |
2776 | goto Failure; | |
2777 | } | |
2778 | DAC960_BA_EnableInterrupts(BaseAddress); | |
2779 | Controller->QueueCommand = DAC960_BA_QueueCommand; | |
2780 | Controller->ReadControllerConfiguration = | |
2781 | DAC960_V2_ReadControllerConfiguration; | |
2782 | Controller->ReadDeviceConfiguration = | |
2783 | DAC960_V2_ReadDeviceConfiguration; | |
2784 | Controller->ReportDeviceConfiguration = | |
2785 | DAC960_V2_ReportDeviceConfiguration; | |
2786 | Controller->QueueReadWriteCommand = | |
2787 | DAC960_V2_QueueReadWriteCommand; | |
2788 | break; | |
2789 | case DAC960_LP_Controller: | |
2790 | DAC960_LP_DisableInterrupts(BaseAddress); | |
2791 | DAC960_LP_AcknowledgeHardwareMailboxStatus(BaseAddress); | |
2792 | udelay(1000); | |
2793 | while (DAC960_LP_InitializationInProgressP(BaseAddress)) | |
2794 | { | |
2795 | if (DAC960_LP_ReadErrorStatus(BaseAddress, &ErrorStatus, | |
2796 | &Parameter0, &Parameter1) && | |
2797 | DAC960_ReportErrorStatus(Controller, ErrorStatus, | |
2798 | Parameter0, Parameter1)) | |
2799 | goto Failure; | |
2800 | udelay(10); | |
2801 | } | |
2802 | if (!DAC960_V2_EnableMemoryMailboxInterface(Controller)) | |
2803 | { | |
2804 | DAC960_Error("Unable to Enable Memory Mailbox Interface " | |
2805 | "for Controller at\n", Controller); | |
2806 | goto Failure; | |
2807 | } | |
2808 | DAC960_LP_EnableInterrupts(BaseAddress); | |
2809 | Controller->QueueCommand = DAC960_LP_QueueCommand; | |
2810 | Controller->ReadControllerConfiguration = | |
2811 | DAC960_V2_ReadControllerConfiguration; | |
2812 | Controller->ReadDeviceConfiguration = | |
2813 | DAC960_V2_ReadDeviceConfiguration; | |
2814 | Controller->ReportDeviceConfiguration = | |
2815 | DAC960_V2_ReportDeviceConfiguration; | |
2816 | Controller->QueueReadWriteCommand = | |
2817 | DAC960_V2_QueueReadWriteCommand; | |
2818 | break; | |
2819 | case DAC960_LA_Controller: | |
2820 | DAC960_LA_DisableInterrupts(BaseAddress); | |
2821 | DAC960_LA_AcknowledgeHardwareMailboxStatus(BaseAddress); | |
2822 | udelay(1000); | |
2823 | while (DAC960_LA_InitializationInProgressP(BaseAddress)) | |
2824 | { | |
2825 | if (DAC960_LA_ReadErrorStatus(BaseAddress, &ErrorStatus, | |
2826 | &Parameter0, &Parameter1) && | |
2827 | DAC960_ReportErrorStatus(Controller, ErrorStatus, | |
2828 | Parameter0, Parameter1)) | |
2829 | goto Failure; | |
2830 | udelay(10); | |
2831 | } | |
2832 | if (!DAC960_V1_EnableMemoryMailboxInterface(Controller)) | |
2833 | { | |
2834 | DAC960_Error("Unable to Enable Memory Mailbox Interface " | |
2835 | "for Controller at\n", Controller); | |
2836 | goto Failure; | |
2837 | } | |
2838 | DAC960_LA_EnableInterrupts(BaseAddress); | |
2839 | if (Controller->V1.DualModeMemoryMailboxInterface) | |
2840 | Controller->QueueCommand = DAC960_LA_QueueCommandDualMode; | |
2841 | else Controller->QueueCommand = DAC960_LA_QueueCommandSingleMode; | |
2842 | Controller->ReadControllerConfiguration = | |
2843 | DAC960_V1_ReadControllerConfiguration; | |
2844 | Controller->ReadDeviceConfiguration = | |
2845 | DAC960_V1_ReadDeviceConfiguration; | |
2846 | Controller->ReportDeviceConfiguration = | |
2847 | DAC960_V1_ReportDeviceConfiguration; | |
2848 | Controller->QueueReadWriteCommand = | |
2849 | DAC960_V1_QueueReadWriteCommand; | |
2850 | break; | |
2851 | case DAC960_PG_Controller: | |
2852 | DAC960_PG_DisableInterrupts(BaseAddress); | |
2853 | DAC960_PG_AcknowledgeHardwareMailboxStatus(BaseAddress); | |
2854 | udelay(1000); | |
2855 | while (DAC960_PG_InitializationInProgressP(BaseAddress)) | |
2856 | { | |
2857 | if (DAC960_PG_ReadErrorStatus(BaseAddress, &ErrorStatus, | |
2858 | &Parameter0, &Parameter1) && | |
2859 | DAC960_ReportErrorStatus(Controller, ErrorStatus, | |
2860 | Parameter0, Parameter1)) | |
2861 | goto Failure; | |
2862 | udelay(10); | |
2863 | } | |
2864 | if (!DAC960_V1_EnableMemoryMailboxInterface(Controller)) | |
2865 | { | |
2866 | DAC960_Error("Unable to Enable Memory Mailbox Interface " | |
2867 | "for Controller at\n", Controller); | |
2868 | goto Failure; | |
2869 | } | |
2870 | DAC960_PG_EnableInterrupts(BaseAddress); | |
2871 | if (Controller->V1.DualModeMemoryMailboxInterface) | |
2872 | Controller->QueueCommand = DAC960_PG_QueueCommandDualMode; | |
2873 | else Controller->QueueCommand = DAC960_PG_QueueCommandSingleMode; | |
2874 | Controller->ReadControllerConfiguration = | |
2875 | DAC960_V1_ReadControllerConfiguration; | |
2876 | Controller->ReadDeviceConfiguration = | |
2877 | DAC960_V1_ReadDeviceConfiguration; | |
2878 | Controller->ReportDeviceConfiguration = | |
2879 | DAC960_V1_ReportDeviceConfiguration; | |
2880 | Controller->QueueReadWriteCommand = | |
2881 | DAC960_V1_QueueReadWriteCommand; | |
2882 | break; | |
2883 | case DAC960_PD_Controller: | |
2884 | if (!request_region(Controller->IO_Address, 0x80, | |
2885 | Controller->FullModelName)) { | |
2886 | DAC960_Error("IO port 0x%d busy for Controller at\n", | |
2887 | Controller, Controller->IO_Address); | |
2888 | goto Failure; | |
2889 | } | |
2890 | DAC960_PD_DisableInterrupts(BaseAddress); | |
2891 | DAC960_PD_AcknowledgeStatus(BaseAddress); | |
2892 | udelay(1000); | |
2893 | while (DAC960_PD_InitializationInProgressP(BaseAddress)) | |
2894 | { | |
2895 | if (DAC960_PD_ReadErrorStatus(BaseAddress, &ErrorStatus, | |
2896 | &Parameter0, &Parameter1) && | |
2897 | DAC960_ReportErrorStatus(Controller, ErrorStatus, | |
2898 | Parameter0, Parameter1)) | |
2899 | goto Failure; | |
2900 | udelay(10); | |
2901 | } | |
2902 | if (!DAC960_V1_EnableMemoryMailboxInterface(Controller)) | |
2903 | { | |
2904 | DAC960_Error("Unable to allocate DMA mapped memory " | |
2905 | "for Controller at\n", Controller); | |
2906 | goto Failure; | |
2907 | } | |
2908 | DAC960_PD_EnableInterrupts(BaseAddress); | |
2909 | Controller->QueueCommand = DAC960_PD_QueueCommand; | |
2910 | Controller->ReadControllerConfiguration = | |
2911 | DAC960_V1_ReadControllerConfiguration; | |
2912 | Controller->ReadDeviceConfiguration = | |
2913 | DAC960_V1_ReadDeviceConfiguration; | |
2914 | Controller->ReportDeviceConfiguration = | |
2915 | DAC960_V1_ReportDeviceConfiguration; | |
2916 | Controller->QueueReadWriteCommand = | |
2917 | DAC960_V1_QueueReadWriteCommand; | |
2918 | break; | |
2919 | case DAC960_P_Controller: | |
2920 | if (!request_region(Controller->IO_Address, 0x80, | |
2921 | Controller->FullModelName)){ | |
2922 | DAC960_Error("IO port 0x%d busy for Controller at\n", | |
2923 | Controller, Controller->IO_Address); | |
2924 | goto Failure; | |
2925 | } | |
2926 | DAC960_PD_DisableInterrupts(BaseAddress); | |
2927 | DAC960_PD_AcknowledgeStatus(BaseAddress); | |
2928 | udelay(1000); | |
2929 | while (DAC960_PD_InitializationInProgressP(BaseAddress)) | |
2930 | { | |
2931 | if (DAC960_PD_ReadErrorStatus(BaseAddress, &ErrorStatus, | |
2932 | &Parameter0, &Parameter1) && | |
2933 | DAC960_ReportErrorStatus(Controller, ErrorStatus, | |
2934 | Parameter0, Parameter1)) | |
2935 | goto Failure; | |
2936 | udelay(10); | |
2937 | } | |
2938 | if (!DAC960_V1_EnableMemoryMailboxInterface(Controller)) | |
2939 | { | |
2940 | DAC960_Error("Unable to allocate DMA mapped memory" | |
2941 | "for Controller at\n", Controller); | |
2942 | goto Failure; | |
2943 | } | |
2944 | DAC960_PD_EnableInterrupts(BaseAddress); | |
2945 | Controller->QueueCommand = DAC960_P_QueueCommand; | |
2946 | Controller->ReadControllerConfiguration = | |
2947 | DAC960_V1_ReadControllerConfiguration; | |
2948 | Controller->ReadDeviceConfiguration = | |
2949 | DAC960_V1_ReadDeviceConfiguration; | |
2950 | Controller->ReportDeviceConfiguration = | |
2951 | DAC960_V1_ReportDeviceConfiguration; | |
2952 | Controller->QueueReadWriteCommand = | |
2953 | DAC960_V1_QueueReadWriteCommand; | |
2954 | break; | |
2955 | } | |
2956 | /* | |
2957 | Acquire shared access to the IRQ Channel. | |
2958 | */ | |
2959 | IRQ_Channel = PCI_Device->irq; | |
2960 | if (request_irq(IRQ_Channel, InterruptHandler, SA_SHIRQ, | |
2961 | Controller->FullModelName, Controller) < 0) | |
2962 | { | |
2963 | DAC960_Error("Unable to acquire IRQ Channel %d for Controller at\n", | |
2964 | Controller, Controller->IRQ_Channel); | |
2965 | goto Failure; | |
2966 | } | |
2967 | Controller->IRQ_Channel = IRQ_Channel; | |
2968 | Controller->InitialCommand.CommandIdentifier = 1; | |
2969 | Controller->InitialCommand.Controller = Controller; | |
2970 | Controller->Commands[0] = &Controller->InitialCommand; | |
2971 | Controller->FreeCommands = &Controller->InitialCommand; | |
2972 | return Controller; | |
2973 | ||
2974 | Failure: | |
2975 | if (Controller->IO_Address == 0) | |
2976 | DAC960_Error("PCI Bus %d Device %d Function %d I/O Address N/A " | |
2977 | "PCI Address 0x%X\n", Controller, | |
2978 | Controller->Bus, Controller->Device, | |
2979 | Controller->Function, Controller->PCI_Address); | |
2980 | else | |
2981 | DAC960_Error("PCI Bus %d Device %d Function %d I/O Address " | |
2982 | "0x%X PCI Address 0x%X\n", Controller, | |
2983 | Controller->Bus, Controller->Device, | |
2984 | Controller->Function, Controller->IO_Address, | |
2985 | Controller->PCI_Address); | |
2986 | DAC960_DetectCleanup(Controller); | |
2987 | DAC960_ControllerCount--; | |
2988 | return NULL; | |
2989 | } | |
2990 | ||
2991 | /* | |
2992 | DAC960_InitializeController initializes Controller. | |
2993 | */ | |
2994 | ||
2995 | static boolean | |
2996 | DAC960_InitializeController(DAC960_Controller_T *Controller) | |
2997 | { | |
2998 | if (DAC960_ReadControllerConfiguration(Controller) && | |
2999 | DAC960_ReportControllerConfiguration(Controller) && | |
3000 | DAC960_CreateAuxiliaryStructures(Controller) && | |
3001 | DAC960_ReadDeviceConfiguration(Controller) && | |
3002 | DAC960_ReportDeviceConfiguration(Controller) && | |
3003 | DAC960_RegisterBlockDevice(Controller)) | |
3004 | { | |
3005 | /* | |
3006 | Initialize the Monitoring Timer. | |
3007 | */ | |
3008 | init_timer(&Controller->MonitoringTimer); | |
3009 | Controller->MonitoringTimer.expires = | |
3010 | jiffies + DAC960_MonitoringTimerInterval; | |
3011 | Controller->MonitoringTimer.data = (unsigned long) Controller; | |
3012 | Controller->MonitoringTimer.function = DAC960_MonitoringTimerFunction; | |
3013 | add_timer(&Controller->MonitoringTimer); | |
3014 | Controller->ControllerInitialized = true; | |
3015 | return true; | |
3016 | } | |
3017 | return false; | |
3018 | } | |
3019 | ||
3020 | ||
3021 | /* | |
3022 | DAC960_FinalizeController finalizes Controller. | |
3023 | */ | |
3024 | ||
3025 | static void DAC960_FinalizeController(DAC960_Controller_T *Controller) | |
3026 | { | |
3027 | if (Controller->ControllerInitialized) | |
3028 | { | |
3029 | unsigned long flags; | |
3030 | ||
3031 | /* | |
3032 | * Acquiring and releasing lock here eliminates | |
3033 | * a very low probability race. | |
3034 | * | |
3035 | * The code below allocates controller command structures | |
3036 | * from the free list without holding the controller lock. | |
3037 | * This is safe assuming there is no other activity on | |
3038 | * the controller at the time. | |
3039 | * | |
3040 | * But, there might be a monitoring command still | |
3041 | * in progress. Setting the Shutdown flag while holding | |
3042 | * the lock ensures that there is no monitoring command | |
3043 | * in the interrupt handler currently, and any monitoring | |
3044 | * commands that complete from this time on will NOT return | |
3045 | * their command structure to the free list. | |
3046 | */ | |
3047 | ||
3048 | spin_lock_irqsave(&Controller->queue_lock, flags); | |
3049 | Controller->ShutdownMonitoringTimer = 1; | |
3050 | spin_unlock_irqrestore(&Controller->queue_lock, flags); | |
3051 | ||
3052 | del_timer_sync(&Controller->MonitoringTimer); | |
3053 | if (Controller->FirmwareType == DAC960_V1_Controller) | |
3054 | { | |
3055 | DAC960_Notice("Flushing Cache...", Controller); | |
3056 | DAC960_V1_ExecuteType3(Controller, DAC960_V1_Flush, 0); | |
3057 | DAC960_Notice("done\n", Controller); | |
3058 | ||
3059 | if (Controller->HardwareType == DAC960_PD_Controller) | |
3060 | release_region(Controller->IO_Address, 0x80); | |
3061 | } | |
3062 | else | |
3063 | { | |
3064 | DAC960_Notice("Flushing Cache...", Controller); | |
3065 | DAC960_V2_DeviceOperation(Controller, DAC960_V2_PauseDevice, | |
3066 | DAC960_V2_RAID_Controller); | |
3067 | DAC960_Notice("done\n", Controller); | |
3068 | } | |
3069 | } | |
3070 | DAC960_UnregisterBlockDevice(Controller); | |
3071 | DAC960_DestroyAuxiliaryStructures(Controller); | |
3072 | DAC960_DestroyProcEntries(Controller); | |
3073 | DAC960_DetectCleanup(Controller); | |
3074 | } | |
3075 | ||
3076 | ||
3077 | /* | |
3078 | DAC960_Probe verifies controller's existence and | |
3079 | initializes the DAC960 Driver for that controller. | |
3080 | */ | |
3081 | ||
3082 | static int | |
3083 | DAC960_Probe(struct pci_dev *dev, const struct pci_device_id *entry) | |
3084 | { | |
3085 | int disk; | |
3086 | DAC960_Controller_T *Controller; | |
3087 | ||
3088 | if (DAC960_ControllerCount == DAC960_MaxControllers) | |
3089 | { | |
3090 | DAC960_Error("More than %d DAC960 Controllers detected - " | |
3091 | "ignoring from Controller at\n", | |
3092 | NULL, DAC960_MaxControllers); | |
3093 | return -ENODEV; | |
3094 | } | |
3095 | ||
3096 | Controller = DAC960_DetectController(dev, entry); | |
3097 | if (!Controller) | |
3098 | return -ENODEV; | |
3099 | ||
3100 | if (!DAC960_InitializeController(Controller)) { | |
3101 | DAC960_FinalizeController(Controller); | |
3102 | return -ENODEV; | |
3103 | } | |
3104 | ||
3105 | for (disk = 0; disk < DAC960_MaxLogicalDrives; disk++) { | |
3106 | set_capacity(Controller->disks[disk], disk_size(Controller, disk)); | |
3107 | add_disk(Controller->disks[disk]); | |
3108 | } | |
3109 | DAC960_CreateProcEntries(Controller); | |
3110 | return 0; | |
3111 | } | |
3112 | ||
3113 | ||
3114 | /* | |
3115 | DAC960_Finalize finalizes the DAC960 Driver. | |
3116 | */ | |
3117 | ||
3118 | static void DAC960_Remove(struct pci_dev *PCI_Device) | |
3119 | { | |
3120 | int Controller_Number = (long)pci_get_drvdata(PCI_Device); | |
3121 | DAC960_Controller_T *Controller = DAC960_Controllers[Controller_Number]; | |
3122 | if (Controller != NULL) | |
3123 | DAC960_FinalizeController(Controller); | |
3124 | } | |
3125 | ||
3126 | ||
3127 | /* | |
3128 | DAC960_V1_QueueReadWriteCommand prepares and queues a Read/Write Command for | |
3129 | DAC960 V1 Firmware Controllers. | |
3130 | */ | |
3131 | ||
3132 | static void DAC960_V1_QueueReadWriteCommand(DAC960_Command_T *Command) | |
3133 | { | |
3134 | DAC960_Controller_T *Controller = Command->Controller; | |
3135 | DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox; | |
3136 | DAC960_V1_ScatterGatherSegment_T *ScatterGatherList = | |
3137 | Command->V1.ScatterGatherList; | |
3138 | struct scatterlist *ScatterList = Command->V1.ScatterList; | |
3139 | ||
3140 | DAC960_V1_ClearCommand(Command); | |
3141 | ||
3142 | if (Command->SegmentCount == 1) | |
3143 | { | |
3144 | if (Command->DmaDirection == PCI_DMA_FROMDEVICE) | |
3145 | CommandMailbox->Type5.CommandOpcode = DAC960_V1_Read; | |
3146 | else | |
3147 | CommandMailbox->Type5.CommandOpcode = DAC960_V1_Write; | |
3148 | ||
3149 | CommandMailbox->Type5.LD.TransferLength = Command->BlockCount; | |
3150 | CommandMailbox->Type5.LD.LogicalDriveNumber = Command->LogicalDriveNumber; | |
3151 | CommandMailbox->Type5.LogicalBlockAddress = Command->BlockNumber; | |
3152 | CommandMailbox->Type5.BusAddress = | |
3153 | (DAC960_BusAddress32_T)sg_dma_address(ScatterList); | |
3154 | } | |
3155 | else | |
3156 | { | |
3157 | int i; | |
3158 | ||
3159 | if (Command->DmaDirection == PCI_DMA_FROMDEVICE) | |
3160 | CommandMailbox->Type5.CommandOpcode = DAC960_V1_ReadWithScatterGather; | |
3161 | else | |
3162 | CommandMailbox->Type5.CommandOpcode = DAC960_V1_WriteWithScatterGather; | |
3163 | ||
3164 | CommandMailbox->Type5.LD.TransferLength = Command->BlockCount; | |
3165 | CommandMailbox->Type5.LD.LogicalDriveNumber = Command->LogicalDriveNumber; | |
3166 | CommandMailbox->Type5.LogicalBlockAddress = Command->BlockNumber; | |
3167 | CommandMailbox->Type5.BusAddress = Command->V1.ScatterGatherListDMA; | |
3168 | ||
3169 | CommandMailbox->Type5.ScatterGatherCount = Command->SegmentCount; | |
3170 | ||
3171 | for (i = 0; i < Command->SegmentCount; i++, ScatterList++, ScatterGatherList++) { | |
3172 | ScatterGatherList->SegmentDataPointer = | |
3173 | (DAC960_BusAddress32_T)sg_dma_address(ScatterList); | |
3174 | ScatterGatherList->SegmentByteCount = | |
3175 | (DAC960_ByteCount32_T)sg_dma_len(ScatterList); | |
3176 | } | |
3177 | } | |
3178 | DAC960_QueueCommand(Command); | |
3179 | } | |
3180 | ||
3181 | ||
3182 | /* | |
3183 | DAC960_V2_QueueReadWriteCommand prepares and queues a Read/Write Command for | |
3184 | DAC960 V2 Firmware Controllers. | |
3185 | */ | |
3186 | ||
3187 | static void DAC960_V2_QueueReadWriteCommand(DAC960_Command_T *Command) | |
3188 | { | |
3189 | DAC960_Controller_T *Controller = Command->Controller; | |
3190 | DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox; | |
3191 | struct scatterlist *ScatterList = Command->V2.ScatterList; | |
3192 | ||
3193 | DAC960_V2_ClearCommand(Command); | |
3194 | ||
3195 | CommandMailbox->SCSI_10.CommandOpcode = DAC960_V2_SCSI_10; | |
3196 | CommandMailbox->SCSI_10.CommandControlBits.DataTransferControllerToHost = | |
3197 | (Command->DmaDirection == PCI_DMA_FROMDEVICE); | |
3198 | CommandMailbox->SCSI_10.DataTransferSize = | |
3199 | Command->BlockCount << DAC960_BlockSizeBits; | |
3200 | CommandMailbox->SCSI_10.RequestSenseBusAddress = Command->V2.RequestSenseDMA; | |
3201 | CommandMailbox->SCSI_10.PhysicalDevice = | |
3202 | Controller->V2.LogicalDriveToVirtualDevice[Command->LogicalDriveNumber]; | |
3203 | CommandMailbox->SCSI_10.RequestSenseSize = sizeof(DAC960_SCSI_RequestSense_T); | |
3204 | CommandMailbox->SCSI_10.CDBLength = 10; | |
3205 | CommandMailbox->SCSI_10.SCSI_CDB[0] = | |
3206 | (Command->DmaDirection == PCI_DMA_FROMDEVICE ? 0x28 : 0x2A); | |
3207 | CommandMailbox->SCSI_10.SCSI_CDB[2] = Command->BlockNumber >> 24; | |
3208 | CommandMailbox->SCSI_10.SCSI_CDB[3] = Command->BlockNumber >> 16; | |
3209 | CommandMailbox->SCSI_10.SCSI_CDB[4] = Command->BlockNumber >> 8; | |
3210 | CommandMailbox->SCSI_10.SCSI_CDB[5] = Command->BlockNumber; | |
3211 | CommandMailbox->SCSI_10.SCSI_CDB[7] = Command->BlockCount >> 8; | |
3212 | CommandMailbox->SCSI_10.SCSI_CDB[8] = Command->BlockCount; | |
3213 | ||
3214 | if (Command->SegmentCount == 1) | |
3215 | { | |
3216 | CommandMailbox->SCSI_10.DataTransferMemoryAddress | |
3217 | .ScatterGatherSegments[0] | |
3218 | .SegmentDataPointer = | |
3219 | (DAC960_BusAddress64_T)sg_dma_address(ScatterList); | |
3220 | CommandMailbox->SCSI_10.DataTransferMemoryAddress | |
3221 | .ScatterGatherSegments[0] | |
3222 | .SegmentByteCount = | |
3223 | CommandMailbox->SCSI_10.DataTransferSize; | |
3224 | } | |
3225 | else | |
3226 | { | |
3227 | DAC960_V2_ScatterGatherSegment_T *ScatterGatherList; | |
3228 | int i; | |
3229 | ||
3230 | if (Command->SegmentCount > 2) | |
3231 | { | |
3232 | ScatterGatherList = Command->V2.ScatterGatherList; | |
3233 | CommandMailbox->SCSI_10.CommandControlBits | |
3234 | .AdditionalScatterGatherListMemory = true; | |
3235 | CommandMailbox->SCSI_10.DataTransferMemoryAddress | |
3236 | .ExtendedScatterGather.ScatterGatherList0Length = Command->SegmentCount; | |
3237 | CommandMailbox->SCSI_10.DataTransferMemoryAddress | |
3238 | .ExtendedScatterGather.ScatterGatherList0Address = | |
3239 | Command->V2.ScatterGatherListDMA; | |
3240 | } | |
3241 | else | |
3242 | ScatterGatherList = CommandMailbox->SCSI_10.DataTransferMemoryAddress | |
3243 | .ScatterGatherSegments; | |
3244 | ||
3245 | for (i = 0; i < Command->SegmentCount; i++, ScatterList++, ScatterGatherList++) { | |
3246 | ScatterGatherList->SegmentDataPointer = | |
3247 | (DAC960_BusAddress64_T)sg_dma_address(ScatterList); | |
3248 | ScatterGatherList->SegmentByteCount = | |
3249 | (DAC960_ByteCount64_T)sg_dma_len(ScatterList); | |
3250 | } | |
3251 | } | |
3252 | DAC960_QueueCommand(Command); | |
3253 | } | |
3254 | ||
3255 | ||
3256 | static int DAC960_process_queue(DAC960_Controller_T *Controller, struct request_queue *req_q) | |
3257 | { | |
3258 | struct request *Request; | |
3259 | DAC960_Command_T *Command; | |
3260 | ||
3261 | while(1) { | |
3262 | Request = elv_next_request(req_q); | |
3263 | if (!Request) | |
3264 | return 1; | |
3265 | ||
3266 | Command = DAC960_AllocateCommand(Controller); | |
3267 | if (Command == NULL) | |
3268 | return 0; | |
3269 | ||
3270 | if (rq_data_dir(Request) == READ) { | |
3271 | Command->DmaDirection = PCI_DMA_FROMDEVICE; | |
3272 | Command->CommandType = DAC960_ReadCommand; | |
3273 | } else { | |
3274 | Command->DmaDirection = PCI_DMA_TODEVICE; | |
3275 | Command->CommandType = DAC960_WriteCommand; | |
3276 | } | |
3277 | Command->Completion = Request->waiting; | |
3278 | Command->LogicalDriveNumber = (long)Request->rq_disk->private_data; | |
3279 | Command->BlockNumber = Request->sector; | |
3280 | Command->BlockCount = Request->nr_sectors; | |
3281 | Command->Request = Request; | |
3282 | blkdev_dequeue_request(Request); | |
3283 | Command->SegmentCount = blk_rq_map_sg(req_q, | |
3284 | Command->Request, Command->cmd_sglist); | |
3285 | /* pci_map_sg MAY change the value of SegCount */ | |
3286 | Command->SegmentCount = pci_map_sg(Controller->PCIDevice, Command->cmd_sglist, | |
3287 | Command->SegmentCount, Command->DmaDirection); | |
3288 | ||
3289 | DAC960_QueueReadWriteCommand(Command); | |
3290 | } | |
3291 | } | |
3292 | ||
3293 | /* | |
3294 | DAC960_ProcessRequest attempts to remove one I/O Request from Controller's | |
3295 | I/O Request Queue and queues it to the Controller. WaitForCommand is true if | |
3296 | this function should wait for a Command to become available if necessary. | |
3297 | This function returns true if an I/O Request was queued and false otherwise. | |
3298 | */ | |
3299 | static void DAC960_ProcessRequest(DAC960_Controller_T *controller) | |
3300 | { | |
3301 | int i; | |
3302 | ||
3303 | if (!controller->ControllerInitialized) | |
3304 | return; | |
3305 | ||
3306 | /* Do this better later! */ | |
3307 | for (i = controller->req_q_index; i < DAC960_MaxLogicalDrives; i++) { | |
3308 | struct request_queue *req_q = controller->RequestQueue[i]; | |
3309 | ||
3310 | if (req_q == NULL) | |
3311 | continue; | |
3312 | ||
3313 | if (!DAC960_process_queue(controller, req_q)) { | |
3314 | controller->req_q_index = i; | |
3315 | return; | |
3316 | } | |
3317 | } | |
3318 | ||
3319 | if (controller->req_q_index == 0) | |
3320 | return; | |
3321 | ||
3322 | for (i = 0; i < controller->req_q_index; i++) { | |
3323 | struct request_queue *req_q = controller->RequestQueue[i]; | |
3324 | ||
3325 | if (req_q == NULL) | |
3326 | continue; | |
3327 | ||
3328 | if (!DAC960_process_queue(controller, req_q)) { | |
3329 | controller->req_q_index = i; | |
3330 | return; | |
3331 | } | |
3332 | } | |
3333 | } | |
3334 | ||
3335 | ||
3336 | /* | |
3337 | DAC960_queue_partial_rw extracts one bio from the request already | |
3338 | associated with argument command, and construct a new command block to retry I/O | |
3339 | only on that bio. Queue that command to the controller. | |
3340 | ||
3341 | This function re-uses a previously-allocated Command, | |
3342 | there is no failure mode from trying to allocate a command. | |
3343 | */ | |
3344 | ||
3345 | static void DAC960_queue_partial_rw(DAC960_Command_T *Command) | |
3346 | { | |
3347 | DAC960_Controller_T *Controller = Command->Controller; | |
3348 | struct request *Request = Command->Request; | |
3349 | struct request_queue *req_q = Controller->RequestQueue[Command->LogicalDriveNumber]; | |
3350 | ||
3351 | if (Command->DmaDirection == PCI_DMA_FROMDEVICE) | |
3352 | Command->CommandType = DAC960_ReadRetryCommand; | |
3353 | else | |
3354 | Command->CommandType = DAC960_WriteRetryCommand; | |
3355 | ||
3356 | /* | |
3357 | * We could be more efficient with these mapping requests | |
3358 | * and map only the portions that we need. But since this | |
3359 | * code should almost never be called, just go with a | |
3360 | * simple coding. | |
3361 | */ | |
3362 | (void)blk_rq_map_sg(req_q, Command->Request, Command->cmd_sglist); | |
3363 | ||
3364 | (void)pci_map_sg(Controller->PCIDevice, Command->cmd_sglist, 1, Command->DmaDirection); | |
3365 | /* | |
3366 | * Resubmitting the request sector at a time is really tedious. | |
3367 | * But, this should almost never happen. So, we're willing to pay | |
3368 | * this price so that in the end, as much of the transfer is completed | |
3369 | * successfully as possible. | |
3370 | */ | |
3371 | Command->SegmentCount = 1; | |
3372 | Command->BlockNumber = Request->sector; | |
3373 | Command->BlockCount = 1; | |
3374 | DAC960_QueueReadWriteCommand(Command); | |
3375 | return; | |
3376 | } | |
3377 | ||
3378 | /* | |
3379 | DAC960_RequestFunction is the I/O Request Function for DAC960 Controllers. | |
3380 | */ | |
3381 | ||
3382 | static void DAC960_RequestFunction(struct request_queue *RequestQueue) | |
3383 | { | |
3384 | DAC960_ProcessRequest(RequestQueue->queuedata); | |
3385 | } | |
3386 | ||
3387 | /* | |
3388 | DAC960_ProcessCompletedBuffer performs completion processing for an | |
3389 | individual Buffer. | |
3390 | */ | |
3391 | ||
3392 | static inline boolean DAC960_ProcessCompletedRequest(DAC960_Command_T *Command, | |
3393 | boolean SuccessfulIO) | |
3394 | { | |
3395 | struct request *Request = Command->Request; | |
3396 | int UpToDate; | |
3397 | ||
3398 | UpToDate = 0; | |
3399 | if (SuccessfulIO) | |
3400 | UpToDate = 1; | |
3401 | ||
3402 | pci_unmap_sg(Command->Controller->PCIDevice, Command->cmd_sglist, | |
3403 | Command->SegmentCount, Command->DmaDirection); | |
3404 | ||
3405 | if (!end_that_request_first(Request, UpToDate, Command->BlockCount)) { | |
3406 | ||
3407 | end_that_request_last(Request); | |
3408 | ||
3409 | if (Command->Completion) { | |
3410 | complete(Command->Completion); | |
3411 | Command->Completion = NULL; | |
3412 | } | |
3413 | return true; | |
3414 | } | |
3415 | return false; | |
3416 | } | |
3417 | ||
3418 | /* | |
3419 | DAC960_V1_ReadWriteError prints an appropriate error message for Command | |
3420 | when an error occurs on a Read or Write operation. | |
3421 | */ | |
3422 | ||
3423 | static void DAC960_V1_ReadWriteError(DAC960_Command_T *Command) | |
3424 | { | |
3425 | DAC960_Controller_T *Controller = Command->Controller; | |
3426 | unsigned char *CommandName = "UNKNOWN"; | |
3427 | switch (Command->CommandType) | |
3428 | { | |
3429 | case DAC960_ReadCommand: | |
3430 | case DAC960_ReadRetryCommand: | |
3431 | CommandName = "READ"; | |
3432 | break; | |
3433 | case DAC960_WriteCommand: | |
3434 | case DAC960_WriteRetryCommand: | |
3435 | CommandName = "WRITE"; | |
3436 | break; | |
3437 | case DAC960_MonitoringCommand: | |
3438 | case DAC960_ImmediateCommand: | |
3439 | case DAC960_QueuedCommand: | |
3440 | break; | |
3441 | } | |
3442 | switch (Command->V1.CommandStatus) | |
3443 | { | |
3444 | case DAC960_V1_IrrecoverableDataError: | |
3445 | DAC960_Error("Irrecoverable Data Error on %s:\n", | |
3446 | Controller, CommandName); | |
3447 | break; | |
3448 | case DAC960_V1_LogicalDriveNonexistentOrOffline: | |
3449 | DAC960_Error("Logical Drive Nonexistent or Offline on %s:\n", | |
3450 | Controller, CommandName); | |
3451 | break; | |
3452 | case DAC960_V1_AccessBeyondEndOfLogicalDrive: | |
3453 | DAC960_Error("Attempt to Access Beyond End of Logical Drive " | |
3454 | "on %s:\n", Controller, CommandName); | |
3455 | break; | |
3456 | case DAC960_V1_BadDataEncountered: | |
3457 | DAC960_Error("Bad Data Encountered on %s:\n", Controller, CommandName); | |
3458 | break; | |
3459 | default: | |
3460 | DAC960_Error("Unexpected Error Status %04X on %s:\n", | |
3461 | Controller, Command->V1.CommandStatus, CommandName); | |
3462 | break; | |
3463 | } | |
3464 | DAC960_Error(" /dev/rd/c%dd%d: absolute blocks %u..%u\n", | |
3465 | Controller, Controller->ControllerNumber, | |
3466 | Command->LogicalDriveNumber, Command->BlockNumber, | |
3467 | Command->BlockNumber + Command->BlockCount - 1); | |
3468 | } | |
3469 | ||
3470 | ||
3471 | /* | |
3472 | DAC960_V1_ProcessCompletedCommand performs completion processing for Command | |
3473 | for DAC960 V1 Firmware Controllers. | |
3474 | */ | |
3475 | ||
3476 | static void DAC960_V1_ProcessCompletedCommand(DAC960_Command_T *Command) | |
3477 | { | |
3478 | DAC960_Controller_T *Controller = Command->Controller; | |
3479 | DAC960_CommandType_T CommandType = Command->CommandType; | |
3480 | DAC960_V1_CommandOpcode_T CommandOpcode = | |
3481 | Command->V1.CommandMailbox.Common.CommandOpcode; | |
3482 | DAC960_V1_CommandStatus_T CommandStatus = Command->V1.CommandStatus; | |
3483 | ||
3484 | if (CommandType == DAC960_ReadCommand || | |
3485 | CommandType == DAC960_WriteCommand) | |
3486 | { | |
3487 | ||
3488 | #ifdef FORCE_RETRY_DEBUG | |
3489 | CommandStatus = DAC960_V1_IrrecoverableDataError; | |
3490 | #endif | |
3491 | ||
3492 | if (CommandStatus == DAC960_V1_NormalCompletion) { | |
3493 | ||
3494 | if (!DAC960_ProcessCompletedRequest(Command, true)) | |
3495 | BUG(); | |
3496 | ||
3497 | } else if (CommandStatus == DAC960_V1_IrrecoverableDataError || | |
3498 | CommandStatus == DAC960_V1_BadDataEncountered) | |
3499 | { | |
3500 | /* | |
3501 | * break the command down into pieces and resubmit each | |
3502 | * piece, hoping that some of them will succeed. | |
3503 | */ | |
3504 | DAC960_queue_partial_rw(Command); | |
3505 | return; | |
3506 | } | |
3507 | else | |
3508 | { | |
3509 | if (CommandStatus != DAC960_V1_LogicalDriveNonexistentOrOffline) | |
3510 | DAC960_V1_ReadWriteError(Command); | |
3511 | ||
3512 | if (!DAC960_ProcessCompletedRequest(Command, false)) | |
3513 | BUG(); | |
3514 | } | |
3515 | } | |
3516 | else if (CommandType == DAC960_ReadRetryCommand || | |
3517 | CommandType == DAC960_WriteRetryCommand) | |
3518 | { | |
3519 | boolean normal_completion; | |
3520 | #ifdef FORCE_RETRY_FAILURE_DEBUG | |
3521 | static int retry_count = 1; | |
3522 | #endif | |
3523 | /* | |
3524 | Perform completion processing for the portion that was | |
3525 | retried, and submit the next portion, if any. | |
3526 | */ | |
3527 | normal_completion = true; | |
3528 | if (CommandStatus != DAC960_V1_NormalCompletion) { | |
3529 | normal_completion = false; | |
3530 | if (CommandStatus != DAC960_V1_LogicalDriveNonexistentOrOffline) | |
3531 | DAC960_V1_ReadWriteError(Command); | |
3532 | } | |
3533 | ||
3534 | #ifdef FORCE_RETRY_FAILURE_DEBUG | |
3535 | if (!(++retry_count % 10000)) { | |
3536 | printk("V1 error retry failure test\n"); | |
3537 | normal_completion = false; | |
3538 | DAC960_V1_ReadWriteError(Command); | |
3539 | } | |
3540 | #endif | |
3541 | ||
3542 | if (!DAC960_ProcessCompletedRequest(Command, normal_completion)) { | |
3543 | DAC960_queue_partial_rw(Command); | |
3544 | return; | |
3545 | } | |
3546 | } | |
3547 | ||
3548 | else if (CommandType == DAC960_MonitoringCommand) | |
3549 | { | |
3550 | if (Controller->ShutdownMonitoringTimer) | |
3551 | return; | |
3552 | if (CommandOpcode == DAC960_V1_Enquiry) | |
3553 | { | |
3554 | DAC960_V1_Enquiry_T *OldEnquiry = &Controller->V1.Enquiry; | |
3555 | DAC960_V1_Enquiry_T *NewEnquiry = Controller->V1.NewEnquiry; | |
3556 | unsigned int OldCriticalLogicalDriveCount = | |
3557 | OldEnquiry->CriticalLogicalDriveCount; | |
3558 | unsigned int NewCriticalLogicalDriveCount = | |
3559 | NewEnquiry->CriticalLogicalDriveCount; | |
3560 | if (NewEnquiry->NumberOfLogicalDrives > Controller->LogicalDriveCount) | |
3561 | { | |
3562 | int LogicalDriveNumber = Controller->LogicalDriveCount - 1; | |
3563 | while (++LogicalDriveNumber < NewEnquiry->NumberOfLogicalDrives) | |
3564 | DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) " | |
3565 | "Now Exists\n", Controller, | |
3566 | LogicalDriveNumber, | |
3567 | Controller->ControllerNumber, | |
3568 | LogicalDriveNumber); | |
3569 | Controller->LogicalDriveCount = NewEnquiry->NumberOfLogicalDrives; | |
3570 | DAC960_ComputeGenericDiskInfo(Controller); | |
3571 | } | |
3572 | if (NewEnquiry->NumberOfLogicalDrives < Controller->LogicalDriveCount) | |
3573 | { | |
3574 | int LogicalDriveNumber = NewEnquiry->NumberOfLogicalDrives - 1; | |
3575 | while (++LogicalDriveNumber < Controller->LogicalDriveCount) | |
3576 | DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) " | |
3577 | "No Longer Exists\n", Controller, | |
3578 | LogicalDriveNumber, | |
3579 | Controller->ControllerNumber, | |
3580 | LogicalDriveNumber); | |
3581 | Controller->LogicalDriveCount = NewEnquiry->NumberOfLogicalDrives; | |
3582 | DAC960_ComputeGenericDiskInfo(Controller); | |
3583 | } | |
3584 | if (NewEnquiry->StatusFlags.DeferredWriteError != | |
3585 | OldEnquiry->StatusFlags.DeferredWriteError) | |
3586 | DAC960_Critical("Deferred Write Error Flag is now %s\n", Controller, | |
3587 | (NewEnquiry->StatusFlags.DeferredWriteError | |
3588 | ? "TRUE" : "FALSE")); | |
3589 | if ((NewCriticalLogicalDriveCount > 0 || | |
3590 | NewCriticalLogicalDriveCount != OldCriticalLogicalDriveCount) || | |
3591 | (NewEnquiry->OfflineLogicalDriveCount > 0 || | |
3592 | NewEnquiry->OfflineLogicalDriveCount != | |
3593 | OldEnquiry->OfflineLogicalDriveCount) || | |
3594 | (NewEnquiry->DeadDriveCount > 0 || | |
3595 | NewEnquiry->DeadDriveCount != | |
3596 | OldEnquiry->DeadDriveCount) || | |
3597 | (NewEnquiry->EventLogSequenceNumber != | |
3598 | OldEnquiry->EventLogSequenceNumber) || | |
3599 | Controller->MonitoringTimerCount == 0 || | |
3600 | (jiffies - Controller->SecondaryMonitoringTime | |
3601 | >= DAC960_SecondaryMonitoringInterval)) | |
3602 | { | |
3603 | Controller->V1.NeedLogicalDriveInformation = true; | |
3604 | Controller->V1.NewEventLogSequenceNumber = | |
3605 | NewEnquiry->EventLogSequenceNumber; | |
3606 | Controller->V1.NeedErrorTableInformation = true; | |
3607 | Controller->V1.NeedDeviceStateInformation = true; | |
3608 | Controller->V1.StartDeviceStateScan = true; | |
3609 | Controller->V1.NeedBackgroundInitializationStatus = | |
3610 | Controller->V1.BackgroundInitializationStatusSupported; | |
3611 | Controller->SecondaryMonitoringTime = jiffies; | |
3612 | } | |
3613 | if (NewEnquiry->RebuildFlag == DAC960_V1_StandbyRebuildInProgress || | |
3614 | NewEnquiry->RebuildFlag | |
3615 | == DAC960_V1_BackgroundRebuildInProgress || | |
3616 | OldEnquiry->RebuildFlag == DAC960_V1_StandbyRebuildInProgress || | |
3617 | OldEnquiry->RebuildFlag == DAC960_V1_BackgroundRebuildInProgress) | |
3618 | { | |
3619 | Controller->V1.NeedRebuildProgress = true; | |
3620 | Controller->V1.RebuildProgressFirst = | |
3621 | (NewEnquiry->CriticalLogicalDriveCount < | |
3622 | OldEnquiry->CriticalLogicalDriveCount); | |
3623 | } | |
3624 | if (OldEnquiry->RebuildFlag == DAC960_V1_BackgroundCheckInProgress) | |
3625 | switch (NewEnquiry->RebuildFlag) | |
3626 | { | |
3627 | case DAC960_V1_NoStandbyRebuildOrCheckInProgress: | |
3628 | DAC960_Progress("Consistency Check Completed Successfully\n", | |
3629 | Controller); | |
3630 | break; | |
3631 | case DAC960_V1_StandbyRebuildInProgress: | |
3632 | case DAC960_V1_BackgroundRebuildInProgress: | |
3633 | break; | |
3634 | case DAC960_V1_BackgroundCheckInProgress: | |
3635 | Controller->V1.NeedConsistencyCheckProgress = true; | |
3636 | break; | |
3637 | case DAC960_V1_StandbyRebuildCompletedWithError: | |
3638 | DAC960_Progress("Consistency Check Completed with Error\n", | |
3639 | Controller); | |
3640 | break; | |
3641 | case DAC960_V1_BackgroundRebuildOrCheckFailed_DriveFailed: | |
3642 | DAC960_Progress("Consistency Check Failed - " | |
3643 | "Physical Device Failed\n", Controller); | |
3644 | break; | |
3645 | case DAC960_V1_BackgroundRebuildOrCheckFailed_LogicalDriveFailed: | |
3646 | DAC960_Progress("Consistency Check Failed - " | |
3647 | "Logical Drive Failed\n", Controller); | |
3648 | break; | |
3649 | case DAC960_V1_BackgroundRebuildOrCheckFailed_OtherCauses: | |
3650 | DAC960_Progress("Consistency Check Failed - Other Causes\n", | |
3651 | Controller); | |
3652 | break; | |
3653 | case DAC960_V1_BackgroundRebuildOrCheckSuccessfullyTerminated: | |
3654 | DAC960_Progress("Consistency Check Successfully Terminated\n", | |
3655 | Controller); | |
3656 | break; | |
3657 | } | |
3658 | else if (NewEnquiry->RebuildFlag | |
3659 | == DAC960_V1_BackgroundCheckInProgress) | |
3660 | Controller->V1.NeedConsistencyCheckProgress = true; | |
3661 | Controller->MonitoringAlertMode = | |
3662 | (NewEnquiry->CriticalLogicalDriveCount > 0 || | |
3663 | NewEnquiry->OfflineLogicalDriveCount > 0 || | |
3664 | NewEnquiry->DeadDriveCount > 0); | |
3665 | if (NewEnquiry->RebuildFlag > DAC960_V1_BackgroundCheckInProgress) | |
3666 | { | |
3667 | Controller->V1.PendingRebuildFlag = NewEnquiry->RebuildFlag; | |
3668 | Controller->V1.RebuildFlagPending = true; | |
3669 | } | |
3670 | memcpy(&Controller->V1.Enquiry, &Controller->V1.NewEnquiry, | |
3671 | sizeof(DAC960_V1_Enquiry_T)); | |
3672 | } | |
3673 | else if (CommandOpcode == DAC960_V1_PerformEventLogOperation) | |
3674 | { | |
3675 | static char | |
3676 | *DAC960_EventMessages[] = | |
3677 | { "killed because write recovery failed", | |
3678 | "killed because of SCSI bus reset failure", | |
3679 | "killed because of double check condition", | |
3680 | "killed because it was removed", | |
3681 | "killed because of gross error on SCSI chip", | |
3682 | "killed because of bad tag returned from drive", | |
3683 | "killed because of timeout on SCSI command", | |
3684 | "killed because of reset SCSI command issued from system", | |
3685 | "killed because busy or parity error count exceeded limit", | |
3686 | "killed because of 'kill drive' command from system", | |
3687 | "killed because of selection timeout", | |
3688 | "killed due to SCSI phase sequence error", | |
3689 | "killed due to unknown status" }; | |
3690 | DAC960_V1_EventLogEntry_T *EventLogEntry = | |
3691 | Controller->V1.EventLogEntry; | |
3692 | if (EventLogEntry->SequenceNumber == | |
3693 | Controller->V1.OldEventLogSequenceNumber) | |
3694 | { | |
3695 | unsigned char SenseKey = EventLogEntry->SenseKey; | |
3696 | unsigned char AdditionalSenseCode = | |
3697 | EventLogEntry->AdditionalSenseCode; | |
3698 | unsigned char AdditionalSenseCodeQualifier = | |
3699 | EventLogEntry->AdditionalSenseCodeQualifier; | |
3700 | if (SenseKey == DAC960_SenseKey_VendorSpecific && | |
3701 | AdditionalSenseCode == 0x80 && | |
3702 | AdditionalSenseCodeQualifier < | |
3703 | sizeof(DAC960_EventMessages) / sizeof(char *)) | |
3704 | DAC960_Critical("Physical Device %d:%d %s\n", Controller, | |
3705 | EventLogEntry->Channel, | |
3706 | EventLogEntry->TargetID, | |
3707 | DAC960_EventMessages[ | |
3708 | AdditionalSenseCodeQualifier]); | |
3709 | else if (SenseKey == DAC960_SenseKey_UnitAttention && | |
3710 | AdditionalSenseCode == 0x29) | |
3711 | { | |
3712 | if (Controller->MonitoringTimerCount > 0) | |
3713 | Controller->V1.DeviceResetCount[EventLogEntry->Channel] | |
3714 | [EventLogEntry->TargetID]++; | |
3715 | } | |
3716 | else if (!(SenseKey == DAC960_SenseKey_NoSense || | |
3717 | (SenseKey == DAC960_SenseKey_NotReady && | |
3718 | AdditionalSenseCode == 0x04 && | |
3719 | (AdditionalSenseCodeQualifier == 0x01 || | |
3720 | AdditionalSenseCodeQualifier == 0x02)))) | |
3721 | { | |
3722 | DAC960_Critical("Physical Device %d:%d Error Log: " | |
3723 | "Sense Key = %X, ASC = %02X, ASCQ = %02X\n", | |
3724 | Controller, | |
3725 | EventLogEntry->Channel, | |
3726 | EventLogEntry->TargetID, | |
3727 | SenseKey, | |
3728 | AdditionalSenseCode, | |
3729 | AdditionalSenseCodeQualifier); | |
3730 | DAC960_Critical("Physical Device %d:%d Error Log: " | |
3731 | "Information = %02X%02X%02X%02X " | |
3732 | "%02X%02X%02X%02X\n", | |
3733 | Controller, | |
3734 | EventLogEntry->Channel, | |
3735 | EventLogEntry->TargetID, | |
3736 | EventLogEntry->Information[0], | |
3737 | EventLogEntry->Information[1], | |
3738 | EventLogEntry->Information[2], | |
3739 | EventLogEntry->Information[3], | |
3740 | EventLogEntry->CommandSpecificInformation[0], | |
3741 | EventLogEntry->CommandSpecificInformation[1], | |
3742 | EventLogEntry->CommandSpecificInformation[2], | |
3743 | EventLogEntry->CommandSpecificInformation[3]); | |
3744 | } | |
3745 | } | |
3746 | Controller->V1.OldEventLogSequenceNumber++; | |
3747 | } | |
3748 | else if (CommandOpcode == DAC960_V1_GetErrorTable) | |
3749 | { | |
3750 | DAC960_V1_ErrorTable_T *OldErrorTable = &Controller->V1.ErrorTable; | |
3751 | DAC960_V1_ErrorTable_T *NewErrorTable = Controller->V1.NewErrorTable; | |
3752 | int Channel, TargetID; | |
3753 | for (Channel = 0; Channel < Controller->Channels; Channel++) | |
3754 | for (TargetID = 0; TargetID < Controller->Targets; TargetID++) | |
3755 | { | |
3756 | DAC960_V1_ErrorTableEntry_T *NewErrorEntry = | |
3757 | &NewErrorTable->ErrorTableEntries[Channel][TargetID]; | |
3758 | DAC960_V1_ErrorTableEntry_T *OldErrorEntry = | |
3759 | &OldErrorTable->ErrorTableEntries[Channel][TargetID]; | |
3760 | if ((NewErrorEntry->ParityErrorCount != | |
3761 | OldErrorEntry->ParityErrorCount) || | |
3762 | (NewErrorEntry->SoftErrorCount != | |
3763 | OldErrorEntry->SoftErrorCount) || | |
3764 | (NewErrorEntry->HardErrorCount != | |
3765 | OldErrorEntry->HardErrorCount) || | |
3766 | (NewErrorEntry->MiscErrorCount != | |
3767 | OldErrorEntry->MiscErrorCount)) | |
3768 | DAC960_Critical("Physical Device %d:%d Errors: " | |
3769 | "Parity = %d, Soft = %d, " | |
3770 | "Hard = %d, Misc = %d\n", | |
3771 | Controller, Channel, TargetID, | |
3772 | NewErrorEntry->ParityErrorCount, | |
3773 | NewErrorEntry->SoftErrorCount, | |
3774 | NewErrorEntry->HardErrorCount, | |
3775 | NewErrorEntry->MiscErrorCount); | |
3776 | } | |
3777 | memcpy(&Controller->V1.ErrorTable, Controller->V1.NewErrorTable, | |
3778 | sizeof(DAC960_V1_ErrorTable_T)); | |
3779 | } | |
3780 | else if (CommandOpcode == DAC960_V1_GetDeviceState) | |
3781 | { | |
3782 | DAC960_V1_DeviceState_T *OldDeviceState = | |
3783 | &Controller->V1.DeviceState[Controller->V1.DeviceStateChannel] | |
3784 | [Controller->V1.DeviceStateTargetID]; | |
3785 | DAC960_V1_DeviceState_T *NewDeviceState = | |
3786 | Controller->V1.NewDeviceState; | |
3787 | if (NewDeviceState->DeviceState != OldDeviceState->DeviceState) | |
3788 | DAC960_Critical("Physical Device %d:%d is now %s\n", Controller, | |
3789 | Controller->V1.DeviceStateChannel, | |
3790 | Controller->V1.DeviceStateTargetID, | |
3791 | (NewDeviceState->DeviceState | |
3792 | == DAC960_V1_Device_Dead | |
3793 | ? "DEAD" | |
3794 | : NewDeviceState->DeviceState | |
3795 | == DAC960_V1_Device_WriteOnly | |
3796 | ? "WRITE-ONLY" | |
3797 | : NewDeviceState->DeviceState | |
3798 | == DAC960_V1_Device_Online | |
3799 | ? "ONLINE" : "STANDBY")); | |
3800 | if (OldDeviceState->DeviceState == DAC960_V1_Device_Dead && | |
3801 | NewDeviceState->DeviceState != DAC960_V1_Device_Dead) | |
3802 | { | |
3803 | Controller->V1.NeedDeviceInquiryInformation = true; | |
3804 | Controller->V1.NeedDeviceSerialNumberInformation = true; | |
3805 | Controller->V1.DeviceResetCount | |
3806 | [Controller->V1.DeviceStateChannel] | |
3807 | [Controller->V1.DeviceStateTargetID] = 0; | |
3808 | } | |
3809 | memcpy(OldDeviceState, NewDeviceState, | |
3810 | sizeof(DAC960_V1_DeviceState_T)); | |
3811 | } | |
3812 | else if (CommandOpcode == DAC960_V1_GetLogicalDriveInformation) | |
3813 | { | |
3814 | int LogicalDriveNumber; | |
3815 | for (LogicalDriveNumber = 0; | |
3816 | LogicalDriveNumber < Controller->LogicalDriveCount; | |
3817 | LogicalDriveNumber++) | |
3818 | { | |
3819 | DAC960_V1_LogicalDriveInformation_T *OldLogicalDriveInformation = | |
3820 | &Controller->V1.LogicalDriveInformation[LogicalDriveNumber]; | |
3821 | DAC960_V1_LogicalDriveInformation_T *NewLogicalDriveInformation = | |
3822 | &(*Controller->V1.NewLogicalDriveInformation)[LogicalDriveNumber]; | |
3823 | if (NewLogicalDriveInformation->LogicalDriveState != | |
3824 | OldLogicalDriveInformation->LogicalDriveState) | |
3825 | DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) " | |
3826 | "is now %s\n", Controller, | |
3827 | LogicalDriveNumber, | |
3828 | Controller->ControllerNumber, | |
3829 | LogicalDriveNumber, | |
3830 | (NewLogicalDriveInformation->LogicalDriveState | |
3831 | == DAC960_V1_LogicalDrive_Online | |
3832 | ? "ONLINE" | |
3833 | : NewLogicalDriveInformation->LogicalDriveState | |
3834 | == DAC960_V1_LogicalDrive_Critical | |
3835 | ? "CRITICAL" : "OFFLINE")); | |
3836 | if (NewLogicalDriveInformation->WriteBack != | |
3837 | OldLogicalDriveInformation->WriteBack) | |
3838 | DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) " | |
3839 | "is now %s\n", Controller, | |
3840 | LogicalDriveNumber, | |
3841 | Controller->ControllerNumber, | |
3842 | LogicalDriveNumber, | |
3843 | (NewLogicalDriveInformation->WriteBack | |
3844 | ? "WRITE BACK" : "WRITE THRU")); | |
3845 | } | |
3846 | memcpy(&Controller->V1.LogicalDriveInformation, | |
3847 | Controller->V1.NewLogicalDriveInformation, | |
3848 | sizeof(DAC960_V1_LogicalDriveInformationArray_T)); | |
3849 | } | |
3850 | else if (CommandOpcode == DAC960_V1_GetRebuildProgress) | |
3851 | { | |
3852 | unsigned int LogicalDriveNumber = | |
3853 | Controller->V1.RebuildProgress->LogicalDriveNumber; | |
3854 | unsigned int LogicalDriveSize = | |
3855 | Controller->V1.RebuildProgress->LogicalDriveSize; | |
3856 | unsigned int BlocksCompleted = | |
3857 | LogicalDriveSize - Controller->V1.RebuildProgress->RemainingBlocks; | |
3858 | if (CommandStatus == DAC960_V1_NoRebuildOrCheckInProgress && | |
3859 | Controller->V1.LastRebuildStatus == DAC960_V1_NormalCompletion) | |
3860 | CommandStatus = DAC960_V1_RebuildSuccessful; | |
3861 | switch (CommandStatus) | |
3862 | { | |
3863 | case DAC960_V1_NormalCompletion: | |
3864 | Controller->EphemeralProgressMessage = true; | |
3865 | DAC960_Progress("Rebuild in Progress: " | |
3866 | "Logical Drive %d (/dev/rd/c%dd%d) " | |
3867 | "%d%% completed\n", | |
3868 | Controller, LogicalDriveNumber, | |
3869 | Controller->ControllerNumber, | |
3870 | LogicalDriveNumber, | |
3871 | (100 * (BlocksCompleted >> 7)) | |
3872 | / (LogicalDriveSize >> 7)); | |
3873 | Controller->EphemeralProgressMessage = false; | |
3874 | break; | |
3875 | case DAC960_V1_RebuildFailed_LogicalDriveFailure: | |
3876 | DAC960_Progress("Rebuild Failed due to " | |
3877 | "Logical Drive Failure\n", Controller); | |
3878 | break; | |
3879 | case DAC960_V1_RebuildFailed_BadBlocksOnOther: | |
3880 | DAC960_Progress("Rebuild Failed due to " | |
3881 | "Bad Blocks on Other Drives\n", Controller); | |
3882 | break; | |
3883 | case DAC960_V1_RebuildFailed_NewDriveFailed: | |
3884 | DAC960_Progress("Rebuild Failed due to " | |
3885 | "Failure of Drive Being Rebuilt\n", Controller); | |
3886 | break; | |
3887 | case DAC960_V1_NoRebuildOrCheckInProgress: | |
3888 | break; | |
3889 | case DAC960_V1_RebuildSuccessful: | |
3890 | DAC960_Progress("Rebuild Completed Successfully\n", Controller); | |
3891 | break; | |
3892 | case DAC960_V1_RebuildSuccessfullyTerminated: | |
3893 | DAC960_Progress("Rebuild Successfully Terminated\n", Controller); | |
3894 | break; | |
3895 | } | |
3896 | Controller->V1.LastRebuildStatus = CommandStatus; | |
3897 | if (CommandType != DAC960_MonitoringCommand && | |
3898 | Controller->V1.RebuildStatusPending) | |
3899 | { | |
3900 | Command->V1.CommandStatus = Controller->V1.PendingRebuildStatus; | |
3901 | Controller->V1.RebuildStatusPending = false; | |
3902 | } | |
3903 | else if (CommandType == DAC960_MonitoringCommand && | |
3904 | CommandStatus != DAC960_V1_NormalCompletion && | |
3905 | CommandStatus != DAC960_V1_NoRebuildOrCheckInProgress) | |
3906 | { | |
3907 | Controller->V1.PendingRebuildStatus = CommandStatus; | |
3908 | Controller->V1.RebuildStatusPending = true; | |
3909 | } | |
3910 | } | |
3911 | else if (CommandOpcode == DAC960_V1_RebuildStat) | |
3912 | { | |
3913 | unsigned int LogicalDriveNumber = | |
3914 | Controller->V1.RebuildProgress->LogicalDriveNumber; | |
3915 | unsigned int LogicalDriveSize = | |
3916 | Controller->V1.RebuildProgress->LogicalDriveSize; | |
3917 | unsigned int BlocksCompleted = | |
3918 | LogicalDriveSize - Controller->V1.RebuildProgress->RemainingBlocks; | |
3919 | if (CommandStatus == DAC960_V1_NormalCompletion) | |
3920 | { | |
3921 | Controller->EphemeralProgressMessage = true; | |
3922 | DAC960_Progress("Consistency Check in Progress: " | |
3923 | "Logical Drive %d (/dev/rd/c%dd%d) " | |
3924 | "%d%% completed\n", | |
3925 | Controller, LogicalDriveNumber, | |
3926 | Controller->ControllerNumber, | |
3927 | LogicalDriveNumber, | |
3928 | (100 * (BlocksCompleted >> 7)) | |
3929 | / (LogicalDriveSize >> 7)); | |
3930 | Controller->EphemeralProgressMessage = false; | |
3931 | } | |
3932 | } | |
3933 | else if (CommandOpcode == DAC960_V1_BackgroundInitializationControl) | |
3934 | { | |
3935 | unsigned int LogicalDriveNumber = | |
3936 | Controller->V1.BackgroundInitializationStatus->LogicalDriveNumber; | |
3937 | unsigned int LogicalDriveSize = | |
3938 | Controller->V1.BackgroundInitializationStatus->LogicalDriveSize; | |
3939 | unsigned int BlocksCompleted = | |
3940 | Controller->V1.BackgroundInitializationStatus->BlocksCompleted; | |
3941 | switch (CommandStatus) | |
3942 | { | |
3943 | case DAC960_V1_NormalCompletion: | |
3944 | switch (Controller->V1.BackgroundInitializationStatus->Status) | |
3945 | { | |
3946 | case DAC960_V1_BackgroundInitializationInvalid: | |
3947 | break; | |
3948 | case DAC960_V1_BackgroundInitializationStarted: | |
3949 | DAC960_Progress("Background Initialization Started\n", | |
3950 | Controller); | |
3951 | break; | |
3952 | case DAC960_V1_BackgroundInitializationInProgress: | |
3953 | if (BlocksCompleted == | |
3954 | Controller->V1.LastBackgroundInitializationStatus. | |
3955 | BlocksCompleted && | |
3956 | LogicalDriveNumber == | |
3957 | Controller->V1.LastBackgroundInitializationStatus. | |
3958 | LogicalDriveNumber) | |
3959 | break; | |
3960 | Controller->EphemeralProgressMessage = true; | |
3961 | DAC960_Progress("Background Initialization in Progress: " | |
3962 | "Logical Drive %d (/dev/rd/c%dd%d) " | |
3963 | "%d%% completed\n", | |
3964 | Controller, LogicalDriveNumber, | |
3965 | Controller->ControllerNumber, | |
3966 | LogicalDriveNumber, | |
3967 | (100 * (BlocksCompleted >> 7)) | |
3968 | / (LogicalDriveSize >> 7)); | |
3969 | Controller->EphemeralProgressMessage = false; | |
3970 | break; | |
3971 | case DAC960_V1_BackgroundInitializationSuspended: | |
3972 | DAC960_Progress("Background Initialization Suspended\n", | |
3973 | Controller); | |
3974 | break; | |
3975 | case DAC960_V1_BackgroundInitializationCancelled: | |
3976 | DAC960_Progress("Background Initialization Cancelled\n", | |
3977 | Controller); | |
3978 | break; | |
3979 | } | |
3980 | memcpy(&Controller->V1.LastBackgroundInitializationStatus, | |
3981 | Controller->V1.BackgroundInitializationStatus, | |
3982 | sizeof(DAC960_V1_BackgroundInitializationStatus_T)); | |
3983 | break; | |
3984 | case DAC960_V1_BackgroundInitSuccessful: | |
3985 | if (Controller->V1.BackgroundInitializationStatus->Status == | |
3986 | DAC960_V1_BackgroundInitializationInProgress) | |
3987 | DAC960_Progress("Background Initialization " | |
3988 | "Completed Successfully\n", Controller); | |
3989 | Controller->V1.BackgroundInitializationStatus->Status = | |
3990 | DAC960_V1_BackgroundInitializationInvalid; | |
3991 | break; | |
3992 | case DAC960_V1_BackgroundInitAborted: | |
3993 | if (Controller->V1.BackgroundInitializationStatus->Status == | |
3994 | DAC960_V1_BackgroundInitializationInProgress) | |
3995 | DAC960_Progress("Background Initialization Aborted\n", | |
3996 | Controller); | |
3997 | Controller->V1.BackgroundInitializationStatus->Status = | |
3998 | DAC960_V1_BackgroundInitializationInvalid; | |
3999 | break; | |
4000 | case DAC960_V1_NoBackgroundInitInProgress: | |
4001 | break; | |
4002 | } | |
4003 | } | |
4004 | else if (CommandOpcode == DAC960_V1_DCDB) | |
4005 | { | |
4006 | /* | |
4007 | This is a bit ugly. | |
4008 | ||
4009 | The InquiryStandardData and | |
4010 | the InquiryUntitSerialNumber information | |
4011 | retrieval operations BOTH use the DAC960_V1_DCDB | |
4012 | commands. the test above can't distinguish between | |
4013 | these two cases. | |
4014 | ||
4015 | Instead, we rely on the order of code later in this | |
4016 | function to ensure that DeviceInquiryInformation commands | |
4017 | are submitted before DeviceSerialNumber commands. | |
4018 | */ | |
4019 | if (Controller->V1.NeedDeviceInquiryInformation) | |
4020 | { | |
4021 | DAC960_SCSI_Inquiry_T *InquiryStandardData = | |
4022 | &Controller->V1.InquiryStandardData | |
4023 | [Controller->V1.DeviceStateChannel] | |
4024 | [Controller->V1.DeviceStateTargetID]; | |
4025 | if (CommandStatus != DAC960_V1_NormalCompletion) | |
4026 | { | |
4027 | memset(InquiryStandardData, 0, | |
4028 | sizeof(DAC960_SCSI_Inquiry_T)); | |
4029 | InquiryStandardData->PeripheralDeviceType = 0x1F; | |
4030 | } | |
4031 | else | |
4032 | memcpy(InquiryStandardData, | |
4033 | Controller->V1.NewInquiryStandardData, | |
4034 | sizeof(DAC960_SCSI_Inquiry_T)); | |
4035 | Controller->V1.NeedDeviceInquiryInformation = false; | |
4036 | } | |
4037 | else if (Controller->V1.NeedDeviceSerialNumberInformation) | |
4038 | { | |
4039 | DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber = | |
4040 | &Controller->V1.InquiryUnitSerialNumber | |
4041 | [Controller->V1.DeviceStateChannel] | |
4042 | [Controller->V1.DeviceStateTargetID]; | |
4043 | if (CommandStatus != DAC960_V1_NormalCompletion) | |
4044 | { | |
4045 | memset(InquiryUnitSerialNumber, 0, | |
4046 | sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T)); | |
4047 | InquiryUnitSerialNumber->PeripheralDeviceType = 0x1F; | |
4048 | } | |
4049 | else | |
4050 | memcpy(InquiryUnitSerialNumber, | |
4051 | Controller->V1.NewInquiryUnitSerialNumber, | |
4052 | sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T)); | |
4053 | Controller->V1.NeedDeviceSerialNumberInformation = false; | |
4054 | } | |
4055 | } | |
4056 | /* | |
4057 | Begin submitting new monitoring commands. | |
4058 | */ | |
4059 | if (Controller->V1.NewEventLogSequenceNumber | |
4060 | - Controller->V1.OldEventLogSequenceNumber > 0) | |
4061 | { | |
4062 | Command->V1.CommandMailbox.Type3E.CommandOpcode = | |
4063 | DAC960_V1_PerformEventLogOperation; | |
4064 | Command->V1.CommandMailbox.Type3E.OperationType = | |
4065 | DAC960_V1_GetEventLogEntry; | |
4066 | Command->V1.CommandMailbox.Type3E.OperationQualifier = 1; | |
4067 | Command->V1.CommandMailbox.Type3E.SequenceNumber = | |
4068 | Controller->V1.OldEventLogSequenceNumber; | |
4069 | Command->V1.CommandMailbox.Type3E.BusAddress = | |
4070 | Controller->V1.EventLogEntryDMA; | |
4071 | DAC960_QueueCommand(Command); | |
4072 | return; | |
4073 | } | |
4074 | if (Controller->V1.NeedErrorTableInformation) | |
4075 | { | |
4076 | Controller->V1.NeedErrorTableInformation = false; | |
4077 | Command->V1.CommandMailbox.Type3.CommandOpcode = | |
4078 | DAC960_V1_GetErrorTable; | |
4079 | Command->V1.CommandMailbox.Type3.BusAddress = | |
4080 | Controller->V1.NewErrorTableDMA; | |
4081 | DAC960_QueueCommand(Command); | |
4082 | return; | |
4083 | } | |
4084 | if (Controller->V1.NeedRebuildProgress && | |
4085 | Controller->V1.RebuildProgressFirst) | |
4086 | { | |
4087 | Controller->V1.NeedRebuildProgress = false; | |
4088 | Command->V1.CommandMailbox.Type3.CommandOpcode = | |
4089 | DAC960_V1_GetRebuildProgress; | |
4090 | Command->V1.CommandMailbox.Type3.BusAddress = | |
4091 | Controller->V1.RebuildProgressDMA; | |
4092 | DAC960_QueueCommand(Command); | |
4093 | return; | |
4094 | } | |
4095 | if (Controller->V1.NeedDeviceStateInformation) | |
4096 | { | |
4097 | if (Controller->V1.NeedDeviceInquiryInformation) | |
4098 | { | |
4099 | DAC960_V1_DCDB_T *DCDB = Controller->V1.MonitoringDCDB; | |
4100 | dma_addr_t DCDB_DMA = Controller->V1.MonitoringDCDB_DMA; | |
4101 | ||
4102 | dma_addr_t NewInquiryStandardDataDMA = | |
4103 | Controller->V1.NewInquiryStandardDataDMA; | |
4104 | ||
4105 | Command->V1.CommandMailbox.Type3.CommandOpcode = DAC960_V1_DCDB; | |
4106 | Command->V1.CommandMailbox.Type3.BusAddress = DCDB_DMA; | |
4107 | DCDB->Channel = Controller->V1.DeviceStateChannel; | |
4108 | DCDB->TargetID = Controller->V1.DeviceStateTargetID; | |
4109 | DCDB->Direction = DAC960_V1_DCDB_DataTransferDeviceToSystem; | |
4110 | DCDB->EarlyStatus = false; | |
4111 | DCDB->Timeout = DAC960_V1_DCDB_Timeout_10_seconds; | |
4112 | DCDB->NoAutomaticRequestSense = false; | |
4113 | DCDB->DisconnectPermitted = true; | |
4114 | DCDB->TransferLength = sizeof(DAC960_SCSI_Inquiry_T); | |
4115 | DCDB->BusAddress = NewInquiryStandardDataDMA; | |
4116 | DCDB->CDBLength = 6; | |
4117 | DCDB->TransferLengthHigh4 = 0; | |
4118 | DCDB->SenseLength = sizeof(DCDB->SenseData); | |
4119 | DCDB->CDB[0] = 0x12; /* INQUIRY */ | |
4120 | DCDB->CDB[1] = 0; /* EVPD = 0 */ | |
4121 | DCDB->CDB[2] = 0; /* Page Code */ | |
4122 | DCDB->CDB[3] = 0; /* Reserved */ | |
4123 | DCDB->CDB[4] = sizeof(DAC960_SCSI_Inquiry_T); | |
4124 | DCDB->CDB[5] = 0; /* Control */ | |
4125 | DAC960_QueueCommand(Command); | |
4126 | return; | |
4127 | } | |
4128 | if (Controller->V1.NeedDeviceSerialNumberInformation) | |
4129 | { | |
4130 | DAC960_V1_DCDB_T *DCDB = Controller->V1.MonitoringDCDB; | |
4131 | dma_addr_t DCDB_DMA = Controller->V1.MonitoringDCDB_DMA; | |
4132 | dma_addr_t NewInquiryUnitSerialNumberDMA = | |
4133 | Controller->V1.NewInquiryUnitSerialNumberDMA; | |
4134 | ||
4135 | Command->V1.CommandMailbox.Type3.CommandOpcode = DAC960_V1_DCDB; | |
4136 | Command->V1.CommandMailbox.Type3.BusAddress = DCDB_DMA; | |
4137 | DCDB->Channel = Controller->V1.DeviceStateChannel; | |
4138 | DCDB->TargetID = Controller->V1.DeviceStateTargetID; | |
4139 | DCDB->Direction = DAC960_V1_DCDB_DataTransferDeviceToSystem; | |
4140 | DCDB->EarlyStatus = false; | |
4141 | DCDB->Timeout = DAC960_V1_DCDB_Timeout_10_seconds; | |
4142 | DCDB->NoAutomaticRequestSense = false; | |
4143 | DCDB->DisconnectPermitted = true; | |
4144 | DCDB->TransferLength = | |
4145 | sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T); | |
4146 | DCDB->BusAddress = NewInquiryUnitSerialNumberDMA; | |
4147 | DCDB->CDBLength = 6; | |
4148 | DCDB->TransferLengthHigh4 = 0; | |
4149 | DCDB->SenseLength = sizeof(DCDB->SenseData); | |
4150 | DCDB->CDB[0] = 0x12; /* INQUIRY */ | |
4151 | DCDB->CDB[1] = 1; /* EVPD = 1 */ | |
4152 | DCDB->CDB[2] = 0x80; /* Page Code */ | |
4153 | DCDB->CDB[3] = 0; /* Reserved */ | |
4154 | DCDB->CDB[4] = sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T); | |
4155 | DCDB->CDB[5] = 0; /* Control */ | |
4156 | DAC960_QueueCommand(Command); | |
4157 | return; | |
4158 | } | |
4159 | if (Controller->V1.StartDeviceStateScan) | |
4160 | { | |
4161 | Controller->V1.DeviceStateChannel = 0; | |
4162 | Controller->V1.DeviceStateTargetID = 0; | |
4163 | Controller->V1.StartDeviceStateScan = false; | |
4164 | } | |
4165 | else if (++Controller->V1.DeviceStateTargetID == Controller->Targets) | |
4166 | { | |
4167 | Controller->V1.DeviceStateChannel++; | |
4168 | Controller->V1.DeviceStateTargetID = 0; | |
4169 | } | |
4170 | if (Controller->V1.DeviceStateChannel < Controller->Channels) | |
4171 | { | |
4172 | Controller->V1.NewDeviceState->DeviceState = | |
4173 | DAC960_V1_Device_Dead; | |
4174 | Command->V1.CommandMailbox.Type3D.CommandOpcode = | |
4175 | DAC960_V1_GetDeviceState; | |
4176 | Command->V1.CommandMailbox.Type3D.Channel = | |
4177 | Controller->V1.DeviceStateChannel; | |
4178 | Command->V1.CommandMailbox.Type3D.TargetID = | |
4179 | Controller->V1.DeviceStateTargetID; | |
4180 | Command->V1.CommandMailbox.Type3D.BusAddress = | |
4181 | Controller->V1.NewDeviceStateDMA; | |
4182 | DAC960_QueueCommand(Command); | |
4183 | return; | |
4184 | } | |
4185 | Controller->V1.NeedDeviceStateInformation = false; | |
4186 | } | |
4187 | if (Controller->V1.NeedLogicalDriveInformation) | |
4188 | { | |
4189 | Controller->V1.NeedLogicalDriveInformation = false; | |
4190 | Command->V1.CommandMailbox.Type3.CommandOpcode = | |
4191 | DAC960_V1_GetLogicalDriveInformation; | |
4192 | Command->V1.CommandMailbox.Type3.BusAddress = | |
4193 | Controller->V1.NewLogicalDriveInformationDMA; | |
4194 | DAC960_QueueCommand(Command); | |
4195 | return; | |
4196 | } | |
4197 | if (Controller->V1.NeedRebuildProgress) | |
4198 | { | |
4199 | Controller->V1.NeedRebuildProgress = false; | |
4200 | Command->V1.CommandMailbox.Type3.CommandOpcode = | |
4201 | DAC960_V1_GetRebuildProgress; | |
4202 | Command->V1.CommandMailbox.Type3.BusAddress = | |
4203 | Controller->V1.RebuildProgressDMA; | |
4204 | DAC960_QueueCommand(Command); | |
4205 | return; | |
4206 | } | |
4207 | if (Controller->V1.NeedConsistencyCheckProgress) | |
4208 | { | |
4209 | Controller->V1.NeedConsistencyCheckProgress = false; | |
4210 | Command->V1.CommandMailbox.Type3.CommandOpcode = | |
4211 | DAC960_V1_RebuildStat; | |
4212 | Command->V1.CommandMailbox.Type3.BusAddress = | |
4213 | Controller->V1.RebuildProgressDMA; | |
4214 | DAC960_QueueCommand(Command); | |
4215 | return; | |
4216 | } | |
4217 | if (Controller->V1.NeedBackgroundInitializationStatus) | |
4218 | { | |
4219 | Controller->V1.NeedBackgroundInitializationStatus = false; | |
4220 | Command->V1.CommandMailbox.Type3B.CommandOpcode = | |
4221 | DAC960_V1_BackgroundInitializationControl; | |
4222 | Command->V1.CommandMailbox.Type3B.CommandOpcode2 = 0x20; | |
4223 | Command->V1.CommandMailbox.Type3B.BusAddress = | |
4224 | Controller->V1.BackgroundInitializationStatusDMA; | |
4225 | DAC960_QueueCommand(Command); | |
4226 | return; | |
4227 | } | |
4228 | Controller->MonitoringTimerCount++; | |
4229 | Controller->MonitoringTimer.expires = | |
4230 | jiffies + DAC960_MonitoringTimerInterval; | |
4231 | add_timer(&Controller->MonitoringTimer); | |
4232 | } | |
4233 | if (CommandType == DAC960_ImmediateCommand) | |
4234 | { | |
4235 | complete(Command->Completion); | |
4236 | Command->Completion = NULL; | |
4237 | return; | |
4238 | } | |
4239 | if (CommandType == DAC960_QueuedCommand) | |
4240 | { | |
4241 | DAC960_V1_KernelCommand_T *KernelCommand = Command->V1.KernelCommand; | |
4242 | KernelCommand->CommandStatus = Command->V1.CommandStatus; | |
4243 | Command->V1.KernelCommand = NULL; | |
4244 | if (CommandOpcode == DAC960_V1_DCDB) | |
4245 | Controller->V1.DirectCommandActive[KernelCommand->DCDB->Channel] | |
4246 | [KernelCommand->DCDB->TargetID] = | |
4247 | false; | |
4248 | DAC960_DeallocateCommand(Command); | |
4249 | KernelCommand->CompletionFunction(KernelCommand); | |
4250 | return; | |
4251 | } | |
4252 | /* | |
4253 | Queue a Status Monitoring Command to the Controller using the just | |
4254 | completed Command if one was deferred previously due to lack of a | |
4255 | free Command when the Monitoring Timer Function was called. | |
4256 | */ | |
4257 | if (Controller->MonitoringCommandDeferred) | |
4258 | { | |
4259 | Controller->MonitoringCommandDeferred = false; | |
4260 | DAC960_V1_QueueMonitoringCommand(Command); | |
4261 | return; | |
4262 | } | |
4263 | /* | |
4264 | Deallocate the Command. | |
4265 | */ | |
4266 | DAC960_DeallocateCommand(Command); | |
4267 | /* | |
4268 | Wake up any processes waiting on a free Command. | |
4269 | */ | |
4270 | wake_up(&Controller->CommandWaitQueue); | |
4271 | } | |
4272 | ||
4273 | ||
4274 | /* | |
4275 | DAC960_V2_ReadWriteError prints an appropriate error message for Command | |
4276 | when an error occurs on a Read or Write operation. | |
4277 | */ | |
4278 | ||
4279 | static void DAC960_V2_ReadWriteError(DAC960_Command_T *Command) | |
4280 | { | |
4281 | DAC960_Controller_T *Controller = Command->Controller; | |
4282 | unsigned char *SenseErrors[] = { "NO SENSE", "RECOVERED ERROR", | |
4283 | "NOT READY", "MEDIUM ERROR", | |
4284 | "HARDWARE ERROR", "ILLEGAL REQUEST", | |
4285 | "UNIT ATTENTION", "DATA PROTECT", | |
4286 | "BLANK CHECK", "VENDOR-SPECIFIC", | |
4287 | "COPY ABORTED", "ABORTED COMMAND", | |
4288 | "EQUAL", "VOLUME OVERFLOW", | |
4289 | "MISCOMPARE", "RESERVED" }; | |
4290 | unsigned char *CommandName = "UNKNOWN"; | |
4291 | switch (Command->CommandType) | |
4292 | { | |
4293 | case DAC960_ReadCommand: | |
4294 | case DAC960_ReadRetryCommand: | |
4295 | CommandName = "READ"; | |
4296 | break; | |
4297 | case DAC960_WriteCommand: | |
4298 | case DAC960_WriteRetryCommand: | |
4299 | CommandName = "WRITE"; | |
4300 | break; | |
4301 | case DAC960_MonitoringCommand: | |
4302 | case DAC960_ImmediateCommand: | |
4303 | case DAC960_QueuedCommand: | |
4304 | break; | |
4305 | } | |
4306 | DAC960_Error("Error Condition %s on %s:\n", Controller, | |
4307 | SenseErrors[Command->V2.RequestSense->SenseKey], CommandName); | |
4308 | DAC960_Error(" /dev/rd/c%dd%d: absolute blocks %u..%u\n", | |
4309 | Controller, Controller->ControllerNumber, | |
4310 | Command->LogicalDriveNumber, Command->BlockNumber, | |
4311 | Command->BlockNumber + Command->BlockCount - 1); | |
4312 | } | |
4313 | ||
4314 | ||
4315 | /* | |
4316 | DAC960_V2_ReportEvent prints an appropriate message when a Controller Event | |
4317 | occurs. | |
4318 | */ | |
4319 | ||
4320 | static void DAC960_V2_ReportEvent(DAC960_Controller_T *Controller, | |
4321 | DAC960_V2_Event_T *Event) | |
4322 | { | |
4323 | DAC960_SCSI_RequestSense_T *RequestSense = | |
4324 | (DAC960_SCSI_RequestSense_T *) &Event->RequestSenseData; | |
4325 | unsigned char MessageBuffer[DAC960_LineBufferSize]; | |
4326 | static struct { int EventCode; unsigned char *EventMessage; } EventList[] = | |
4327 | { /* Physical Device Events (0x0000 - 0x007F) */ | |
4328 | { 0x0001, "P Online" }, | |
4329 | { 0x0002, "P Standby" }, | |
4330 | { 0x0005, "P Automatic Rebuild Started" }, | |
4331 | { 0x0006, "P Manual Rebuild Started" }, | |
4332 | { 0x0007, "P Rebuild Completed" }, | |
4333 | { 0x0008, "P Rebuild Cancelled" }, | |
4334 | { 0x0009, "P Rebuild Failed for Unknown Reasons" }, | |
4335 | { 0x000A, "P Rebuild Failed due to New Physical Device" }, | |
4336 | { 0x000B, "P Rebuild Failed due to Logical Drive Failure" }, | |
4337 | { 0x000C, "S Offline" }, | |
4338 | { 0x000D, "P Found" }, | |
4339 | { 0x000E, "P Removed" }, | |
4340 | { 0x000F, "P Unconfigured" }, | |
4341 | { 0x0010, "P Expand Capacity Started" }, | |
4342 | { 0x0011, "P Expand Capacity Completed" }, | |
4343 | { 0x0012, "P Expand Capacity Failed" }, | |
4344 | { 0x0013, "P Command Timed Out" }, | |
4345 | { 0x0014, "P Command Aborted" }, | |
4346 | { 0x0015, "P Command Retried" }, | |
4347 | { 0x0016, "P Parity Error" }, | |
4348 | { 0x0017, "P Soft Error" }, | |
4349 | { 0x0018, "P Miscellaneous Error" }, | |
4350 | { 0x0019, "P Reset" }, | |
4351 | { 0x001A, "P Active Spare Found" }, | |
4352 | { 0x001B, "P Warm Spare Found" }, | |
4353 | { 0x001C, "S Sense Data Received" }, | |
4354 | { 0x001D, "P Initialization Started" }, | |
4355 | { 0x001E, "P Initialization Completed" }, | |
4356 | { 0x001F, "P Initialization Failed" }, | |
4357 | { 0x0020, "P Initialization Cancelled" }, | |
4358 | { 0x0021, "P Failed because Write Recovery Failed" }, | |
4359 | { 0x0022, "P Failed because SCSI Bus Reset Failed" }, | |
4360 | { 0x0023, "P Failed because of Double Check Condition" }, | |
4361 | { 0x0024, "P Failed because Device Cannot Be Accessed" }, | |
4362 | { 0x0025, "P Failed because of Gross Error on SCSI Processor" }, | |
4363 | { 0x0026, "P Failed because of Bad Tag from Device" }, | |
4364 | { 0x0027, "P Failed because of Command Timeout" }, | |
4365 | { 0x0028, "P Failed because of System Reset" }, | |
4366 | { 0x0029, "P Failed because of Busy Status or Parity Error" }, | |
4367 | { 0x002A, "P Failed because Host Set Device to Failed State" }, | |
4368 | { 0x002B, "P Failed because of Selection Timeout" }, | |
4369 | { 0x002C, "P Failed because of SCSI Bus Phase Error" }, | |
4370 | { 0x002D, "P Failed because Device Returned Unknown Status" }, | |
4371 | { 0x002E, "P Failed because Device Not Ready" }, | |
4372 | { 0x002F, "P Failed because Device Not Found at Startup" }, | |
4373 | { 0x0030, "P Failed because COD Write Operation Failed" }, | |
4374 | { 0x0031, "P Failed because BDT Write Operation Failed" }, | |
4375 | { 0x0039, "P Missing at Startup" }, | |
4376 | { 0x003A, "P Start Rebuild Failed due to Physical Drive Too Small" }, | |
4377 | { 0x003C, "P Temporarily Offline Device Automatically Made Online" }, | |
4378 | { 0x003D, "P Standby Rebuild Started" }, | |
4379 | /* Logical Device Events (0x0080 - 0x00FF) */ | |
4380 | { 0x0080, "M Consistency Check Started" }, | |
4381 | { 0x0081, "M Consistency Check Completed" }, | |
4382 | { 0x0082, "M Consistency Check Cancelled" }, | |
4383 | { 0x0083, "M Consistency Check Completed With Errors" }, | |
4384 | { 0x0084, "M Consistency Check Failed due to Logical Drive Failure" }, | |
4385 | { 0x0085, "M Consistency Check Failed due to Physical Device Failure" }, | |
4386 | { 0x0086, "L Offline" }, | |
4387 | { 0x0087, "L Critical" }, | |
4388 | { 0x0088, "L Online" }, | |
4389 | { 0x0089, "M Automatic Rebuild Started" }, | |
4390 | { 0x008A, "M Manual Rebuild Started" }, | |
4391 | { 0x008B, "M Rebuild Completed" }, | |
4392 | { 0x008C, "M Rebuild Cancelled" }, | |
4393 | { 0x008D, "M Rebuild Failed for Unknown Reasons" }, | |
4394 | { 0x008E, "M Rebuild Failed due to New Physical Device" }, | |
4395 | { 0x008F, "M Rebuild Failed due to Logical Drive Failure" }, | |
4396 | { 0x0090, "M Initialization Started" }, | |
4397 | { 0x0091, "M Initialization Completed" }, | |
4398 | { 0x0092, "M Initialization Cancelled" }, | |
4399 | { 0x0093, "M Initialization Failed" }, | |
4400 | { 0x0094, "L Found" }, | |
4401 | { 0x0095, "L Deleted" }, | |
4402 | { 0x0096, "M Expand Capacity Started" }, | |
4403 | { 0x0097, "M Expand Capacity Completed" }, | |
4404 | { 0x0098, "M Expand Capacity Failed" }, | |
4405 | { 0x0099, "L Bad Block Found" }, | |
4406 | { 0x009A, "L Size Changed" }, | |
4407 | { 0x009B, "L Type Changed" }, | |
4408 | { 0x009C, "L Bad Data Block Found" }, | |
4409 | { 0x009E, "L Read of Data Block in BDT" }, | |
4410 | { 0x009F, "L Write Back Data for Disk Block Lost" }, | |
4411 | { 0x00A0, "L Temporarily Offline RAID-5/3 Drive Made Online" }, | |
4412 | { 0x00A1, "L Temporarily Offline RAID-6/1/0/7 Drive Made Online" }, | |
4413 | { 0x00A2, "L Standby Rebuild Started" }, | |
4414 | /* Fault Management Events (0x0100 - 0x017F) */ | |
4415 | { 0x0140, "E Fan %d Failed" }, | |
4416 | { 0x0141, "E Fan %d OK" }, | |
4417 | { 0x0142, "E Fan %d Not Present" }, | |
4418 | { 0x0143, "E Power Supply %d Failed" }, | |
4419 | { 0x0144, "E Power Supply %d OK" }, | |
4420 | { 0x0145, "E Power Supply %d Not Present" }, | |
4421 | { 0x0146, "E Temperature Sensor %d Temperature Exceeds Safe Limit" }, | |
4422 | { 0x0147, "E Temperature Sensor %d Temperature Exceeds Working Limit" }, | |
4423 | { 0x0148, "E Temperature Sensor %d Temperature Normal" }, | |
4424 | { 0x0149, "E Temperature Sensor %d Not Present" }, | |
4425 | { 0x014A, "E Enclosure Management Unit %d Access Critical" }, | |
4426 | { 0x014B, "E Enclosure Management Unit %d Access OK" }, | |
4427 | { 0x014C, "E Enclosure Management Unit %d Access Offline" }, | |
4428 | /* Controller Events (0x0180 - 0x01FF) */ | |
4429 | { 0x0181, "C Cache Write Back Error" }, | |
4430 | { 0x0188, "C Battery Backup Unit Found" }, | |
4431 | { 0x0189, "C Battery Backup Unit Charge Level Low" }, | |
4432 | { 0x018A, "C Battery Backup Unit Charge Level OK" }, | |
4433 | { 0x0193, "C Installation Aborted" }, | |
4434 | { 0x0195, "C Battery Backup Unit Physically Removed" }, | |
4435 | { 0x0196, "C Memory Error During Warm Boot" }, | |
4436 | { 0x019E, "C Memory Soft ECC Error Corrected" }, | |
4437 | { 0x019F, "C Memory Hard ECC Error Corrected" }, | |
4438 | { 0x01A2, "C Battery Backup Unit Failed" }, | |
4439 | { 0x01AB, "C Mirror Race Recovery Failed" }, | |
4440 | { 0x01AC, "C Mirror Race on Critical Drive" }, | |
4441 | /* Controller Internal Processor Events */ | |
4442 | { 0x0380, "C Internal Controller Hung" }, | |
4443 | { 0x0381, "C Internal Controller Firmware Breakpoint" }, | |
4444 | { 0x0390, "C Internal Controller i960 Processor Specific Error" }, | |
4445 | { 0x03A0, "C Internal Controller StrongARM Processor Specific Error" }, | |
4446 | { 0, "" } }; | |
4447 | int EventListIndex = 0, EventCode; | |
4448 | unsigned char EventType, *EventMessage; | |
4449 | if (Event->EventCode == 0x1C && | |
4450 | RequestSense->SenseKey == DAC960_SenseKey_VendorSpecific && | |
4451 | (RequestSense->AdditionalSenseCode == 0x80 || | |
4452 | RequestSense->AdditionalSenseCode == 0x81)) | |
4453 | Event->EventCode = ((RequestSense->AdditionalSenseCode - 0x80) << 8) | | |
4454 | RequestSense->AdditionalSenseCodeQualifier; | |
4455 | while (true) | |
4456 | { | |
4457 | EventCode = EventList[EventListIndex].EventCode; | |
4458 | if (EventCode == Event->EventCode || EventCode == 0) break; | |
4459 | EventListIndex++; | |
4460 | } | |
4461 | EventType = EventList[EventListIndex].EventMessage[0]; | |
4462 | EventMessage = &EventList[EventListIndex].EventMessage[2]; | |
4463 | if (EventCode == 0) | |
4464 | { | |
4465 | DAC960_Critical("Unknown Controller Event Code %04X\n", | |
4466 | Controller, Event->EventCode); | |
4467 | return; | |
4468 | } | |
4469 | switch (EventType) | |
4470 | { | |
4471 | case 'P': | |
4472 | DAC960_Critical("Physical Device %d:%d %s\n", Controller, | |
4473 | Event->Channel, Event->TargetID, EventMessage); | |
4474 | break; | |
4475 | case 'L': | |
4476 | DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) %s\n", Controller, | |
4477 | Event->LogicalUnit, Controller->ControllerNumber, | |
4478 | Event->LogicalUnit, EventMessage); | |
4479 | break; | |
4480 | case 'M': | |
4481 | DAC960_Progress("Logical Drive %d (/dev/rd/c%dd%d) %s\n", Controller, | |
4482 | Event->LogicalUnit, Controller->ControllerNumber, | |
4483 | Event->LogicalUnit, EventMessage); | |
4484 | break; | |
4485 | case 'S': | |
4486 | if (RequestSense->SenseKey == DAC960_SenseKey_NoSense || | |
4487 | (RequestSense->SenseKey == DAC960_SenseKey_NotReady && | |
4488 | RequestSense->AdditionalSenseCode == 0x04 && | |
4489 | (RequestSense->AdditionalSenseCodeQualifier == 0x01 || | |
4490 | RequestSense->AdditionalSenseCodeQualifier == 0x02))) | |
4491 | break; | |
4492 | DAC960_Critical("Physical Device %d:%d %s\n", Controller, | |
4493 | Event->Channel, Event->TargetID, EventMessage); | |
4494 | DAC960_Critical("Physical Device %d:%d Request Sense: " | |
4495 | "Sense Key = %X, ASC = %02X, ASCQ = %02X\n", | |
4496 | Controller, | |
4497 | Event->Channel, | |
4498 | Event->TargetID, | |
4499 | RequestSense->SenseKey, | |
4500 | RequestSense->AdditionalSenseCode, | |
4501 | RequestSense->AdditionalSenseCodeQualifier); | |
4502 | DAC960_Critical("Physical Device %d:%d Request Sense: " | |
4503 | "Information = %02X%02X%02X%02X " | |
4504 | "%02X%02X%02X%02X\n", | |
4505 | Controller, | |
4506 | Event->Channel, | |
4507 | Event->TargetID, | |
4508 | RequestSense->Information[0], | |
4509 | RequestSense->Information[1], | |
4510 | RequestSense->Information[2], | |
4511 | RequestSense->Information[3], | |
4512 | RequestSense->CommandSpecificInformation[0], | |
4513 | RequestSense->CommandSpecificInformation[1], | |
4514 | RequestSense->CommandSpecificInformation[2], | |
4515 | RequestSense->CommandSpecificInformation[3]); | |
4516 | break; | |
4517 | case 'E': | |
4518 | if (Controller->SuppressEnclosureMessages) break; | |
4519 | sprintf(MessageBuffer, EventMessage, Event->LogicalUnit); | |
4520 | DAC960_Critical("Enclosure %d %s\n", Controller, | |
4521 | Event->TargetID, MessageBuffer); | |
4522 | break; | |
4523 | case 'C': | |
4524 | DAC960_Critical("Controller %s\n", Controller, EventMessage); | |
4525 | break; | |
4526 | default: | |
4527 | DAC960_Critical("Unknown Controller Event Code %04X\n", | |
4528 | Controller, Event->EventCode); | |
4529 | break; | |
4530 | } | |
4531 | } | |
4532 | ||
4533 | ||
4534 | /* | |
4535 | DAC960_V2_ReportProgress prints an appropriate progress message for | |
4536 | Logical Device Long Operations. | |
4537 | */ | |
4538 | ||
4539 | static void DAC960_V2_ReportProgress(DAC960_Controller_T *Controller, | |
4540 | unsigned char *MessageString, | |
4541 | unsigned int LogicalDeviceNumber, | |
4542 | unsigned long BlocksCompleted, | |
4543 | unsigned long LogicalDeviceSize) | |
4544 | { | |
4545 | Controller->EphemeralProgressMessage = true; | |
4546 | DAC960_Progress("%s in Progress: Logical Drive %d (/dev/rd/c%dd%d) " | |
4547 | "%d%% completed\n", Controller, | |
4548 | MessageString, | |
4549 | LogicalDeviceNumber, | |
4550 | Controller->ControllerNumber, | |
4551 | LogicalDeviceNumber, | |
4552 | (100 * (BlocksCompleted >> 7)) / (LogicalDeviceSize >> 7)); | |
4553 | Controller->EphemeralProgressMessage = false; | |
4554 | } | |
4555 | ||
4556 | ||
4557 | /* | |
4558 | DAC960_V2_ProcessCompletedCommand performs completion processing for Command | |
4559 | for DAC960 V2 Firmware Controllers. | |
4560 | */ | |
4561 | ||
4562 | static void DAC960_V2_ProcessCompletedCommand(DAC960_Command_T *Command) | |
4563 | { | |
4564 | DAC960_Controller_T *Controller = Command->Controller; | |
4565 | DAC960_CommandType_T CommandType = Command->CommandType; | |
4566 | DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox; | |
4567 | DAC960_V2_IOCTL_Opcode_T CommandOpcode = CommandMailbox->Common.IOCTL_Opcode; | |
4568 | DAC960_V2_CommandStatus_T CommandStatus = Command->V2.CommandStatus; | |
4569 | ||
4570 | if (CommandType == DAC960_ReadCommand || | |
4571 | CommandType == DAC960_WriteCommand) | |
4572 | { | |
4573 | ||
4574 | #ifdef FORCE_RETRY_DEBUG | |
4575 | CommandStatus = DAC960_V2_AbormalCompletion; | |
4576 | #endif | |
4577 | Command->V2.RequestSense->SenseKey = DAC960_SenseKey_MediumError; | |
4578 | ||
4579 | if (CommandStatus == DAC960_V2_NormalCompletion) { | |
4580 | ||
4581 | if (!DAC960_ProcessCompletedRequest(Command, true)) | |
4582 | BUG(); | |
4583 | ||
4584 | } else if (Command->V2.RequestSense->SenseKey == DAC960_SenseKey_MediumError) | |
4585 | { | |
4586 | /* | |
4587 | * break the command down into pieces and resubmit each | |
4588 | * piece, hoping that some of them will succeed. | |
4589 | */ | |
4590 | DAC960_queue_partial_rw(Command); | |
4591 | return; | |
4592 | } | |
4593 | else | |
4594 | { | |
4595 | if (Command->V2.RequestSense->SenseKey != DAC960_SenseKey_NotReady) | |
4596 | DAC960_V2_ReadWriteError(Command); | |
4597 | /* | |
4598 | Perform completion processing for all buffers in this I/O Request. | |
4599 | */ | |
4600 | (void)DAC960_ProcessCompletedRequest(Command, false); | |
4601 | } | |
4602 | } | |
4603 | else if (CommandType == DAC960_ReadRetryCommand || | |
4604 | CommandType == DAC960_WriteRetryCommand) | |
4605 | { | |
4606 | boolean normal_completion; | |
4607 | ||
4608 | #ifdef FORCE_RETRY_FAILURE_DEBUG | |
4609 | static int retry_count = 1; | |
4610 | #endif | |
4611 | /* | |
4612 | Perform completion processing for the portion that was | |
4613 | retried, and submit the next portion, if any. | |
4614 | */ | |
4615 | normal_completion = true; | |
4616 | if (CommandStatus != DAC960_V2_NormalCompletion) { | |
4617 | normal_completion = false; | |
4618 | if (Command->V2.RequestSense->SenseKey != DAC960_SenseKey_NotReady) | |
4619 | DAC960_V2_ReadWriteError(Command); | |
4620 | } | |
4621 | ||
4622 | #ifdef FORCE_RETRY_FAILURE_DEBUG | |
4623 | if (!(++retry_count % 10000)) { | |
4624 | printk("V2 error retry failure test\n"); | |
4625 | normal_completion = false; | |
4626 | DAC960_V2_ReadWriteError(Command); | |
4627 | } | |
4628 | #endif | |
4629 | ||
4630 | if (!DAC960_ProcessCompletedRequest(Command, normal_completion)) { | |
4631 | DAC960_queue_partial_rw(Command); | |
4632 | return; | |
4633 | } | |
4634 | } | |
4635 | else if (CommandType == DAC960_MonitoringCommand) | |
4636 | { | |
4637 | if (Controller->ShutdownMonitoringTimer) | |
4638 | return; | |
4639 | if (CommandOpcode == DAC960_V2_GetControllerInfo) | |
4640 | { | |
4641 | DAC960_V2_ControllerInfo_T *NewControllerInfo = | |
4642 | Controller->V2.NewControllerInformation; | |
4643 | DAC960_V2_ControllerInfo_T *ControllerInfo = | |
4644 | &Controller->V2.ControllerInformation; | |
4645 | Controller->LogicalDriveCount = | |
4646 | NewControllerInfo->LogicalDevicesPresent; | |
4647 | Controller->V2.NeedLogicalDeviceInformation = true; | |
4648 | Controller->V2.NeedPhysicalDeviceInformation = true; | |
4649 | Controller->V2.StartLogicalDeviceInformationScan = true; | |
4650 | Controller->V2.StartPhysicalDeviceInformationScan = true; | |
4651 | Controller->MonitoringAlertMode = | |
4652 | (NewControllerInfo->LogicalDevicesCritical > 0 || | |
4653 | NewControllerInfo->LogicalDevicesOffline > 0 || | |
4654 | NewControllerInfo->PhysicalDisksCritical > 0 || | |
4655 | NewControllerInfo->PhysicalDisksOffline > 0); | |
4656 | memcpy(ControllerInfo, NewControllerInfo, | |
4657 | sizeof(DAC960_V2_ControllerInfo_T)); | |
4658 | } | |
4659 | else if (CommandOpcode == DAC960_V2_GetEvent) | |
4660 | { | |
4661 | if (CommandStatus == DAC960_V2_NormalCompletion) { | |
4662 | DAC960_V2_ReportEvent(Controller, Controller->V2.Event); | |
4663 | } | |
4664 | Controller->V2.NextEventSequenceNumber++; | |
4665 | } | |
4666 | else if (CommandOpcode == DAC960_V2_GetPhysicalDeviceInfoValid && | |
4667 | CommandStatus == DAC960_V2_NormalCompletion) | |
4668 | { | |
4669 | DAC960_V2_PhysicalDeviceInfo_T *NewPhysicalDeviceInfo = | |
4670 | Controller->V2.NewPhysicalDeviceInformation; | |
4671 | unsigned int PhysicalDeviceIndex = Controller->V2.PhysicalDeviceIndex; | |
4672 | DAC960_V2_PhysicalDeviceInfo_T *PhysicalDeviceInfo = | |
4673 | Controller->V2.PhysicalDeviceInformation[PhysicalDeviceIndex]; | |
4674 | DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber = | |
4675 | Controller->V2.InquiryUnitSerialNumber[PhysicalDeviceIndex]; | |
4676 | unsigned int DeviceIndex; | |
4677 | while (PhysicalDeviceInfo != NULL && | |
4678 | (NewPhysicalDeviceInfo->Channel > | |
4679 | PhysicalDeviceInfo->Channel || | |
4680 | (NewPhysicalDeviceInfo->Channel == | |
4681 | PhysicalDeviceInfo->Channel && | |
4682 | (NewPhysicalDeviceInfo->TargetID > | |
4683 | PhysicalDeviceInfo->TargetID || | |
4684 | (NewPhysicalDeviceInfo->TargetID == | |
4685 | PhysicalDeviceInfo->TargetID && | |
4686 | NewPhysicalDeviceInfo->LogicalUnit > | |
4687 | PhysicalDeviceInfo->LogicalUnit))))) | |
4688 | { | |
4689 | DAC960_Critical("Physical Device %d:%d No Longer Exists\n", | |
4690 | Controller, | |
4691 | PhysicalDeviceInfo->Channel, | |
4692 | PhysicalDeviceInfo->TargetID); | |
4693 | Controller->V2.PhysicalDeviceInformation | |
4694 | [PhysicalDeviceIndex] = NULL; | |
4695 | Controller->V2.InquiryUnitSerialNumber | |
4696 | [PhysicalDeviceIndex] = NULL; | |
4697 | kfree(PhysicalDeviceInfo); | |
4698 | kfree(InquiryUnitSerialNumber); | |
4699 | for (DeviceIndex = PhysicalDeviceIndex; | |
4700 | DeviceIndex < DAC960_V2_MaxPhysicalDevices - 1; | |
4701 | DeviceIndex++) | |
4702 | { | |
4703 | Controller->V2.PhysicalDeviceInformation[DeviceIndex] = | |
4704 | Controller->V2.PhysicalDeviceInformation[DeviceIndex+1]; | |
4705 | Controller->V2.InquiryUnitSerialNumber[DeviceIndex] = | |
4706 | Controller->V2.InquiryUnitSerialNumber[DeviceIndex+1]; | |
4707 | } | |
4708 | Controller->V2.PhysicalDeviceInformation | |
4709 | [DAC960_V2_MaxPhysicalDevices-1] = NULL; | |
4710 | Controller->V2.InquiryUnitSerialNumber | |
4711 | [DAC960_V2_MaxPhysicalDevices-1] = NULL; | |
4712 | PhysicalDeviceInfo = | |
4713 | Controller->V2.PhysicalDeviceInformation[PhysicalDeviceIndex]; | |
4714 | InquiryUnitSerialNumber = | |
4715 | Controller->V2.InquiryUnitSerialNumber[PhysicalDeviceIndex]; | |
4716 | } | |
4717 | if (PhysicalDeviceInfo == NULL || | |
4718 | (NewPhysicalDeviceInfo->Channel != | |
4719 | PhysicalDeviceInfo->Channel) || | |
4720 | (NewPhysicalDeviceInfo->TargetID != | |
4721 | PhysicalDeviceInfo->TargetID) || | |
4722 | (NewPhysicalDeviceInfo->LogicalUnit != | |
4723 | PhysicalDeviceInfo->LogicalUnit)) | |
4724 | { | |
4725 | PhysicalDeviceInfo = (DAC960_V2_PhysicalDeviceInfo_T *) | |
4726 | kmalloc(sizeof(DAC960_V2_PhysicalDeviceInfo_T), GFP_ATOMIC); | |
4727 | InquiryUnitSerialNumber = | |
4728 | (DAC960_SCSI_Inquiry_UnitSerialNumber_T *) | |
4729 | kmalloc(sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T), | |
4730 | GFP_ATOMIC); | |
4731 | if (InquiryUnitSerialNumber == NULL && | |
4732 | PhysicalDeviceInfo != NULL) | |
4733 | { | |
4734 | kfree(PhysicalDeviceInfo); | |
4735 | PhysicalDeviceInfo = NULL; | |
4736 | } | |
4737 | DAC960_Critical("Physical Device %d:%d Now Exists%s\n", | |
4738 | Controller, | |
4739 | NewPhysicalDeviceInfo->Channel, | |
4740 | NewPhysicalDeviceInfo->TargetID, | |
4741 | (PhysicalDeviceInfo != NULL | |
4742 | ? "" : " - Allocation Failed")); | |
4743 | if (PhysicalDeviceInfo != NULL) | |
4744 | { | |
4745 | memset(PhysicalDeviceInfo, 0, | |
4746 | sizeof(DAC960_V2_PhysicalDeviceInfo_T)); | |
4747 | PhysicalDeviceInfo->PhysicalDeviceState = | |
4748 | DAC960_V2_Device_InvalidState; | |
4749 | memset(InquiryUnitSerialNumber, 0, | |
4750 | sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T)); | |
4751 | InquiryUnitSerialNumber->PeripheralDeviceType = 0x1F; | |
4752 | for (DeviceIndex = DAC960_V2_MaxPhysicalDevices - 1; | |
4753 | DeviceIndex > PhysicalDeviceIndex; | |
4754 | DeviceIndex--) | |
4755 | { | |
4756 | Controller->V2.PhysicalDeviceInformation[DeviceIndex] = | |
4757 | Controller->V2.PhysicalDeviceInformation[DeviceIndex-1]; | |
4758 | Controller->V2.InquiryUnitSerialNumber[DeviceIndex] = | |
4759 | Controller->V2.InquiryUnitSerialNumber[DeviceIndex-1]; | |
4760 | } | |
4761 | Controller->V2.PhysicalDeviceInformation | |
4762 | [PhysicalDeviceIndex] = | |
4763 | PhysicalDeviceInfo; | |
4764 | Controller->V2.InquiryUnitSerialNumber | |
4765 | [PhysicalDeviceIndex] = | |
4766 | InquiryUnitSerialNumber; | |
4767 | Controller->V2.NeedDeviceSerialNumberInformation = true; | |
4768 | } | |
4769 | } | |
4770 | if (PhysicalDeviceInfo != NULL) | |
4771 | { | |
4772 | if (NewPhysicalDeviceInfo->PhysicalDeviceState != | |
4773 | PhysicalDeviceInfo->PhysicalDeviceState) | |
4774 | DAC960_Critical( | |
4775 | "Physical Device %d:%d is now %s\n", Controller, | |
4776 | NewPhysicalDeviceInfo->Channel, | |
4777 | NewPhysicalDeviceInfo->TargetID, | |
4778 | (NewPhysicalDeviceInfo->PhysicalDeviceState | |
4779 | == DAC960_V2_Device_Online | |
4780 | ? "ONLINE" | |
4781 | : NewPhysicalDeviceInfo->PhysicalDeviceState | |
4782 | == DAC960_V2_Device_Rebuild | |
4783 | ? "REBUILD" | |
4784 | : NewPhysicalDeviceInfo->PhysicalDeviceState | |
4785 | == DAC960_V2_Device_Missing | |
4786 | ? "MISSING" | |
4787 | : NewPhysicalDeviceInfo->PhysicalDeviceState | |
4788 | == DAC960_V2_Device_Critical | |
4789 | ? "CRITICAL" | |
4790 | : NewPhysicalDeviceInfo->PhysicalDeviceState | |
4791 | == DAC960_V2_Device_Dead | |
4792 | ? "DEAD" | |
4793 | : NewPhysicalDeviceInfo->PhysicalDeviceState | |
4794 | == DAC960_V2_Device_SuspectedDead | |
4795 | ? "SUSPECTED-DEAD" | |
4796 | : NewPhysicalDeviceInfo->PhysicalDeviceState | |
4797 | == DAC960_V2_Device_CommandedOffline | |
4798 | ? "COMMANDED-OFFLINE" | |
4799 | : NewPhysicalDeviceInfo->PhysicalDeviceState | |
4800 | == DAC960_V2_Device_Standby | |
4801 | ? "STANDBY" : "UNKNOWN")); | |
4802 | if ((NewPhysicalDeviceInfo->ParityErrors != | |
4803 | PhysicalDeviceInfo->ParityErrors) || | |
4804 | (NewPhysicalDeviceInfo->SoftErrors != | |
4805 | PhysicalDeviceInfo->SoftErrors) || | |
4806 | (NewPhysicalDeviceInfo->HardErrors != | |
4807 | PhysicalDeviceInfo->HardErrors) || | |
4808 | (NewPhysicalDeviceInfo->MiscellaneousErrors != | |
4809 | PhysicalDeviceInfo->MiscellaneousErrors) || | |
4810 | (NewPhysicalDeviceInfo->CommandTimeouts != | |
4811 | PhysicalDeviceInfo->CommandTimeouts) || | |
4812 | (NewPhysicalDeviceInfo->Retries != | |
4813 | PhysicalDeviceInfo->Retries) || | |
4814 | (NewPhysicalDeviceInfo->Aborts != | |
4815 | PhysicalDeviceInfo->Aborts) || | |
4816 | (NewPhysicalDeviceInfo->PredictedFailuresDetected != | |
4817 | PhysicalDeviceInfo->PredictedFailuresDetected)) | |
4818 | { | |
4819 | DAC960_Critical("Physical Device %d:%d Errors: " | |
4820 | "Parity = %d, Soft = %d, " | |
4821 | "Hard = %d, Misc = %d\n", | |
4822 | Controller, | |
4823 | NewPhysicalDeviceInfo->Channel, | |
4824 | NewPhysicalDeviceInfo->TargetID, | |
4825 | NewPhysicalDeviceInfo->ParityErrors, | |
4826 | NewPhysicalDeviceInfo->SoftErrors, | |
4827 | NewPhysicalDeviceInfo->HardErrors, | |
4828 | NewPhysicalDeviceInfo->MiscellaneousErrors); | |
4829 | DAC960_Critical("Physical Device %d:%d Errors: " | |
4830 | "Timeouts = %d, Retries = %d, " | |
4831 | "Aborts = %d, Predicted = %d\n", | |
4832 | Controller, | |
4833 | NewPhysicalDeviceInfo->Channel, | |
4834 | NewPhysicalDeviceInfo->TargetID, | |
4835 | NewPhysicalDeviceInfo->CommandTimeouts, | |
4836 | NewPhysicalDeviceInfo->Retries, | |
4837 | NewPhysicalDeviceInfo->Aborts, | |
4838 | NewPhysicalDeviceInfo | |
4839 | ->PredictedFailuresDetected); | |
4840 | } | |
4841 | if ((PhysicalDeviceInfo->PhysicalDeviceState | |
4842 | == DAC960_V2_Device_Dead || | |
4843 | PhysicalDeviceInfo->PhysicalDeviceState | |
4844 | == DAC960_V2_Device_InvalidState) && | |
4845 | NewPhysicalDeviceInfo->PhysicalDeviceState | |
4846 | != DAC960_V2_Device_Dead) | |
4847 | Controller->V2.NeedDeviceSerialNumberInformation = true; | |
4848 | memcpy(PhysicalDeviceInfo, NewPhysicalDeviceInfo, | |
4849 | sizeof(DAC960_V2_PhysicalDeviceInfo_T)); | |
4850 | } | |
4851 | NewPhysicalDeviceInfo->LogicalUnit++; | |
4852 | Controller->V2.PhysicalDeviceIndex++; | |
4853 | } | |
4854 | else if (CommandOpcode == DAC960_V2_GetPhysicalDeviceInfoValid) | |
4855 | { | |
4856 | unsigned int DeviceIndex; | |
4857 | for (DeviceIndex = Controller->V2.PhysicalDeviceIndex; | |
4858 | DeviceIndex < DAC960_V2_MaxPhysicalDevices; | |
4859 | DeviceIndex++) | |
4860 | { | |
4861 | DAC960_V2_PhysicalDeviceInfo_T *PhysicalDeviceInfo = | |
4862 | Controller->V2.PhysicalDeviceInformation[DeviceIndex]; | |
4863 | DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber = | |
4864 | Controller->V2.InquiryUnitSerialNumber[DeviceIndex]; | |
4865 | if (PhysicalDeviceInfo == NULL) break; | |
4866 | DAC960_Critical("Physical Device %d:%d No Longer Exists\n", | |
4867 | Controller, | |
4868 | PhysicalDeviceInfo->Channel, | |
4869 | PhysicalDeviceInfo->TargetID); | |
4870 | Controller->V2.PhysicalDeviceInformation[DeviceIndex] = NULL; | |
4871 | Controller->V2.InquiryUnitSerialNumber[DeviceIndex] = NULL; | |
4872 | kfree(PhysicalDeviceInfo); | |
4873 | kfree(InquiryUnitSerialNumber); | |
4874 | } | |
4875 | Controller->V2.NeedPhysicalDeviceInformation = false; | |
4876 | } | |
4877 | else if (CommandOpcode == DAC960_V2_GetLogicalDeviceInfoValid && | |
4878 | CommandStatus == DAC960_V2_NormalCompletion) | |
4879 | { | |
4880 | DAC960_V2_LogicalDeviceInfo_T *NewLogicalDeviceInfo = | |
4881 | Controller->V2.NewLogicalDeviceInformation; | |
4882 | unsigned short LogicalDeviceNumber = | |
4883 | NewLogicalDeviceInfo->LogicalDeviceNumber; | |
4884 | DAC960_V2_LogicalDeviceInfo_T *LogicalDeviceInfo = | |
4885 | Controller->V2.LogicalDeviceInformation[LogicalDeviceNumber]; | |
4886 | if (LogicalDeviceInfo == NULL) | |
4887 | { | |
4888 | DAC960_V2_PhysicalDevice_T PhysicalDevice; | |
4889 | PhysicalDevice.Controller = 0; | |
4890 | PhysicalDevice.Channel = NewLogicalDeviceInfo->Channel; | |
4891 | PhysicalDevice.TargetID = NewLogicalDeviceInfo->TargetID; | |
4892 | PhysicalDevice.LogicalUnit = NewLogicalDeviceInfo->LogicalUnit; | |
4893 | Controller->V2.LogicalDriveToVirtualDevice[LogicalDeviceNumber] = | |
4894 | PhysicalDevice; | |
4895 | LogicalDeviceInfo = (DAC960_V2_LogicalDeviceInfo_T *) | |
4896 | kmalloc(sizeof(DAC960_V2_LogicalDeviceInfo_T), GFP_ATOMIC); | |
4897 | Controller->V2.LogicalDeviceInformation[LogicalDeviceNumber] = | |
4898 | LogicalDeviceInfo; | |
4899 | DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) " | |
4900 | "Now Exists%s\n", Controller, | |
4901 | LogicalDeviceNumber, | |
4902 | Controller->ControllerNumber, | |
4903 | LogicalDeviceNumber, | |
4904 | (LogicalDeviceInfo != NULL | |
4905 | ? "" : " - Allocation Failed")); | |
4906 | if (LogicalDeviceInfo != NULL) | |
4907 | { | |
4908 | memset(LogicalDeviceInfo, 0, | |
4909 | sizeof(DAC960_V2_LogicalDeviceInfo_T)); | |
4910 | DAC960_ComputeGenericDiskInfo(Controller); | |
4911 | } | |
4912 | } | |
4913 | if (LogicalDeviceInfo != NULL) | |
4914 | { | |
4915 | unsigned long LogicalDeviceSize = | |
4916 | NewLogicalDeviceInfo->ConfigurableDeviceSize; | |
4917 | if (NewLogicalDeviceInfo->LogicalDeviceState != | |
4918 | LogicalDeviceInfo->LogicalDeviceState) | |
4919 | DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) " | |
4920 | "is now %s\n", Controller, | |
4921 | LogicalDeviceNumber, | |
4922 | Controller->ControllerNumber, | |
4923 | LogicalDeviceNumber, | |
4924 | (NewLogicalDeviceInfo->LogicalDeviceState | |
4925 | == DAC960_V2_LogicalDevice_Online | |
4926 | ? "ONLINE" | |
4927 | : NewLogicalDeviceInfo->LogicalDeviceState | |
4928 | == DAC960_V2_LogicalDevice_Critical | |
4929 | ? "CRITICAL" : "OFFLINE")); | |
4930 | if ((NewLogicalDeviceInfo->SoftErrors != | |
4931 | LogicalDeviceInfo->SoftErrors) || | |
4932 | (NewLogicalDeviceInfo->CommandsFailed != | |
4933 | LogicalDeviceInfo->CommandsFailed) || | |
4934 | (NewLogicalDeviceInfo->DeferredWriteErrors != | |
4935 | LogicalDeviceInfo->DeferredWriteErrors)) | |
4936 | DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) Errors: " | |
4937 | "Soft = %d, Failed = %d, Deferred Write = %d\n", | |
4938 | Controller, LogicalDeviceNumber, | |
4939 | Controller->ControllerNumber, | |
4940 | LogicalDeviceNumber, | |
4941 | NewLogicalDeviceInfo->SoftErrors, | |
4942 | NewLogicalDeviceInfo->CommandsFailed, | |
4943 | NewLogicalDeviceInfo->DeferredWriteErrors); | |
4944 | if (NewLogicalDeviceInfo->ConsistencyCheckInProgress) | |
4945 | DAC960_V2_ReportProgress(Controller, | |
4946 | "Consistency Check", | |
4947 | LogicalDeviceNumber, | |
4948 | NewLogicalDeviceInfo | |
4949 | ->ConsistencyCheckBlockNumber, | |
4950 | LogicalDeviceSize); | |
4951 | else if (NewLogicalDeviceInfo->RebuildInProgress) | |
4952 | DAC960_V2_ReportProgress(Controller, | |
4953 | "Rebuild", | |
4954 | LogicalDeviceNumber, | |
4955 | NewLogicalDeviceInfo | |
4956 | ->RebuildBlockNumber, | |
4957 | LogicalDeviceSize); | |
4958 | else if (NewLogicalDeviceInfo->BackgroundInitializationInProgress) | |
4959 | DAC960_V2_ReportProgress(Controller, | |
4960 | "Background Initialization", | |
4961 | LogicalDeviceNumber, | |
4962 | NewLogicalDeviceInfo | |
4963 | ->BackgroundInitializationBlockNumber, | |
4964 | LogicalDeviceSize); | |
4965 | else if (NewLogicalDeviceInfo->ForegroundInitializationInProgress) | |
4966 | DAC960_V2_ReportProgress(Controller, | |
4967 | "Foreground Initialization", | |
4968 | LogicalDeviceNumber, | |
4969 | NewLogicalDeviceInfo | |
4970 | ->ForegroundInitializationBlockNumber, | |
4971 | LogicalDeviceSize); | |
4972 | else if (NewLogicalDeviceInfo->DataMigrationInProgress) | |
4973 | DAC960_V2_ReportProgress(Controller, | |
4974 | "Data Migration", | |
4975 | LogicalDeviceNumber, | |
4976 | NewLogicalDeviceInfo | |
4977 | ->DataMigrationBlockNumber, | |
4978 | LogicalDeviceSize); | |
4979 | else if (NewLogicalDeviceInfo->PatrolOperationInProgress) | |
4980 | DAC960_V2_ReportProgress(Controller, | |
4981 | "Patrol Operation", | |
4982 | LogicalDeviceNumber, | |
4983 | NewLogicalDeviceInfo | |
4984 | ->PatrolOperationBlockNumber, | |
4985 | LogicalDeviceSize); | |
4986 | if (LogicalDeviceInfo->BackgroundInitializationInProgress && | |
4987 | !NewLogicalDeviceInfo->BackgroundInitializationInProgress) | |
4988 | DAC960_Progress("Logical Drive %d (/dev/rd/c%dd%d) " | |
4989 | "Background Initialization %s\n", | |
4990 | Controller, | |
4991 | LogicalDeviceNumber, | |
4992 | Controller->ControllerNumber, | |
4993 | LogicalDeviceNumber, | |
4994 | (NewLogicalDeviceInfo->LogicalDeviceControl | |
4995 | .LogicalDeviceInitialized | |
4996 | ? "Completed" : "Failed")); | |
4997 | memcpy(LogicalDeviceInfo, NewLogicalDeviceInfo, | |
4998 | sizeof(DAC960_V2_LogicalDeviceInfo_T)); | |
4999 | } | |
5000 | Controller->V2.LogicalDriveFoundDuringScan | |
5001 | [LogicalDeviceNumber] = true; | |
5002 | NewLogicalDeviceInfo->LogicalDeviceNumber++; | |
5003 | } | |
5004 | else if (CommandOpcode == DAC960_V2_GetLogicalDeviceInfoValid) | |
5005 | { | |
5006 | int LogicalDriveNumber; | |
5007 | for (LogicalDriveNumber = 0; | |
5008 | LogicalDriveNumber < DAC960_MaxLogicalDrives; | |
5009 | LogicalDriveNumber++) | |
5010 | { | |
5011 | DAC960_V2_LogicalDeviceInfo_T *LogicalDeviceInfo = | |
5012 | Controller->V2.LogicalDeviceInformation[LogicalDriveNumber]; | |
5013 | if (LogicalDeviceInfo == NULL || | |
5014 | Controller->V2.LogicalDriveFoundDuringScan | |
5015 | [LogicalDriveNumber]) | |
5016 | continue; | |
5017 | DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) " | |
5018 | "No Longer Exists\n", Controller, | |
5019 | LogicalDriveNumber, | |
5020 | Controller->ControllerNumber, | |
5021 | LogicalDriveNumber); | |
5022 | Controller->V2.LogicalDeviceInformation | |
5023 | [LogicalDriveNumber] = NULL; | |
5024 | kfree(LogicalDeviceInfo); | |
5025 | Controller->LogicalDriveInitiallyAccessible | |
5026 | [LogicalDriveNumber] = false; | |
5027 | DAC960_ComputeGenericDiskInfo(Controller); | |
5028 | } | |
5029 | Controller->V2.NeedLogicalDeviceInformation = false; | |
5030 | } | |
5031 | else if (CommandOpcode == DAC960_V2_SCSI_10_Passthru) | |
5032 | { | |
5033 | DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber = | |
5034 | Controller->V2.InquiryUnitSerialNumber[Controller->V2.PhysicalDeviceIndex - 1]; | |
5035 | ||
5036 | if (CommandStatus != DAC960_V2_NormalCompletion) { | |
5037 | memset(InquiryUnitSerialNumber, | |
5038 | 0, sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T)); | |
5039 | InquiryUnitSerialNumber->PeripheralDeviceType = 0x1F; | |
5040 | } else | |
5041 | memcpy(InquiryUnitSerialNumber, | |
5042 | Controller->V2.NewInquiryUnitSerialNumber, | |
5043 | sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T)); | |
5044 | ||
5045 | Controller->V2.NeedDeviceSerialNumberInformation = false; | |
5046 | } | |
5047 | ||
5048 | if (Controller->V2.HealthStatusBuffer->NextEventSequenceNumber | |
5049 | - Controller->V2.NextEventSequenceNumber > 0) | |
5050 | { | |
5051 | CommandMailbox->GetEvent.CommandOpcode = DAC960_V2_IOCTL; | |
5052 | CommandMailbox->GetEvent.DataTransferSize = sizeof(DAC960_V2_Event_T); | |
5053 | CommandMailbox->GetEvent.EventSequenceNumberHigh16 = | |
5054 | Controller->V2.NextEventSequenceNumber >> 16; | |
5055 | CommandMailbox->GetEvent.ControllerNumber = 0; | |
5056 | CommandMailbox->GetEvent.IOCTL_Opcode = | |
5057 | DAC960_V2_GetEvent; | |
5058 | CommandMailbox->GetEvent.EventSequenceNumberLow16 = | |
5059 | Controller->V2.NextEventSequenceNumber & 0xFFFF; | |
5060 | CommandMailbox->GetEvent.DataTransferMemoryAddress | |
5061 | .ScatterGatherSegments[0] | |
5062 | .SegmentDataPointer = | |
5063 | Controller->V2.EventDMA; | |
5064 | CommandMailbox->GetEvent.DataTransferMemoryAddress | |
5065 | .ScatterGatherSegments[0] | |
5066 | .SegmentByteCount = | |
5067 | CommandMailbox->GetEvent.DataTransferSize; | |
5068 | DAC960_QueueCommand(Command); | |
5069 | return; | |
5070 | } | |
5071 | if (Controller->V2.NeedPhysicalDeviceInformation) | |
5072 | { | |
5073 | if (Controller->V2.NeedDeviceSerialNumberInformation) | |
5074 | { | |
5075 | DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber = | |
5076 | Controller->V2.NewInquiryUnitSerialNumber; | |
5077 | InquiryUnitSerialNumber->PeripheralDeviceType = 0x1F; | |
5078 | ||
5079 | DAC960_V2_ConstructNewUnitSerialNumber(Controller, CommandMailbox, | |
5080 | Controller->V2.NewPhysicalDeviceInformation->Channel, | |
5081 | Controller->V2.NewPhysicalDeviceInformation->TargetID, | |
5082 | Controller->V2.NewPhysicalDeviceInformation->LogicalUnit - 1); | |
5083 | ||
5084 | ||
5085 | DAC960_QueueCommand(Command); | |
5086 | return; | |
5087 | } | |
5088 | if (Controller->V2.StartPhysicalDeviceInformationScan) | |
5089 | { | |
5090 | Controller->V2.PhysicalDeviceIndex = 0; | |
5091 | Controller->V2.NewPhysicalDeviceInformation->Channel = 0; | |
5092 | Controller->V2.NewPhysicalDeviceInformation->TargetID = 0; | |
5093 | Controller->V2.NewPhysicalDeviceInformation->LogicalUnit = 0; | |
5094 | Controller->V2.StartPhysicalDeviceInformationScan = false; | |
5095 | } | |
5096 | CommandMailbox->PhysicalDeviceInfo.CommandOpcode = DAC960_V2_IOCTL; | |
5097 | CommandMailbox->PhysicalDeviceInfo.DataTransferSize = | |
5098 | sizeof(DAC960_V2_PhysicalDeviceInfo_T); | |
5099 | CommandMailbox->PhysicalDeviceInfo.PhysicalDevice.LogicalUnit = | |
5100 | Controller->V2.NewPhysicalDeviceInformation->LogicalUnit; | |
5101 | CommandMailbox->PhysicalDeviceInfo.PhysicalDevice.TargetID = | |
5102 | Controller->V2.NewPhysicalDeviceInformation->TargetID; | |
5103 | CommandMailbox->PhysicalDeviceInfo.PhysicalDevice.Channel = | |
5104 | Controller->V2.NewPhysicalDeviceInformation->Channel; | |
5105 | CommandMailbox->PhysicalDeviceInfo.IOCTL_Opcode = | |
5106 | DAC960_V2_GetPhysicalDeviceInfoValid; | |
5107 | CommandMailbox->PhysicalDeviceInfo.DataTransferMemoryAddress | |
5108 | .ScatterGatherSegments[0] | |
5109 | .SegmentDataPointer = | |
5110 | Controller->V2.NewPhysicalDeviceInformationDMA; | |
5111 | CommandMailbox->PhysicalDeviceInfo.DataTransferMemoryAddress | |
5112 | .ScatterGatherSegments[0] | |
5113 | .SegmentByteCount = | |
5114 | CommandMailbox->PhysicalDeviceInfo.DataTransferSize; | |
5115 | DAC960_QueueCommand(Command); | |
5116 | return; | |
5117 | } | |
5118 | if (Controller->V2.NeedLogicalDeviceInformation) | |
5119 | { | |
5120 | if (Controller->V2.StartLogicalDeviceInformationScan) | |
5121 | { | |
5122 | int LogicalDriveNumber; | |
5123 | for (LogicalDriveNumber = 0; | |
5124 | LogicalDriveNumber < DAC960_MaxLogicalDrives; | |
5125 | LogicalDriveNumber++) | |
5126 | Controller->V2.LogicalDriveFoundDuringScan | |
5127 | [LogicalDriveNumber] = false; | |
5128 | Controller->V2.NewLogicalDeviceInformation->LogicalDeviceNumber = 0; | |
5129 | Controller->V2.StartLogicalDeviceInformationScan = false; | |
5130 | } | |
5131 | CommandMailbox->LogicalDeviceInfo.CommandOpcode = DAC960_V2_IOCTL; | |
5132 | CommandMailbox->LogicalDeviceInfo.DataTransferSize = | |
5133 | sizeof(DAC960_V2_LogicalDeviceInfo_T); | |
5134 | CommandMailbox->LogicalDeviceInfo.LogicalDevice.LogicalDeviceNumber = | |
5135 | Controller->V2.NewLogicalDeviceInformation->LogicalDeviceNumber; | |
5136 | CommandMailbox->LogicalDeviceInfo.IOCTL_Opcode = | |
5137 | DAC960_V2_GetLogicalDeviceInfoValid; | |
5138 | CommandMailbox->LogicalDeviceInfo.DataTransferMemoryAddress | |
5139 | .ScatterGatherSegments[0] | |
5140 | .SegmentDataPointer = | |
5141 | Controller->V2.NewLogicalDeviceInformationDMA; | |
5142 | CommandMailbox->LogicalDeviceInfo.DataTransferMemoryAddress | |
5143 | .ScatterGatherSegments[0] | |
5144 | .SegmentByteCount = | |
5145 | CommandMailbox->LogicalDeviceInfo.DataTransferSize; | |
5146 | DAC960_QueueCommand(Command); | |
5147 | return; | |
5148 | } | |
5149 | Controller->MonitoringTimerCount++; | |
5150 | Controller->MonitoringTimer.expires = | |
5151 | jiffies + DAC960_HealthStatusMonitoringInterval; | |
5152 | add_timer(&Controller->MonitoringTimer); | |
5153 | } | |
5154 | if (CommandType == DAC960_ImmediateCommand) | |
5155 | { | |
5156 | complete(Command->Completion); | |
5157 | Command->Completion = NULL; | |
5158 | return; | |
5159 | } | |
5160 | if (CommandType == DAC960_QueuedCommand) | |
5161 | { | |
5162 | DAC960_V2_KernelCommand_T *KernelCommand = Command->V2.KernelCommand; | |
5163 | KernelCommand->CommandStatus = CommandStatus; | |
5164 | KernelCommand->RequestSenseLength = Command->V2.RequestSenseLength; | |
5165 | KernelCommand->DataTransferLength = Command->V2.DataTransferResidue; | |
5166 | Command->V2.KernelCommand = NULL; | |
5167 | DAC960_DeallocateCommand(Command); | |
5168 | KernelCommand->CompletionFunction(KernelCommand); | |
5169 | return; | |
5170 | } | |
5171 | /* | |
5172 | Queue a Status Monitoring Command to the Controller using the just | |
5173 | completed Command if one was deferred previously due to lack of a | |
5174 | free Command when the Monitoring Timer Function was called. | |
5175 | */ | |
5176 | if (Controller->MonitoringCommandDeferred) | |
5177 | { | |
5178 | Controller->MonitoringCommandDeferred = false; | |
5179 | DAC960_V2_QueueMonitoringCommand(Command); | |
5180 | return; | |
5181 | } | |
5182 | /* | |
5183 | Deallocate the Command. | |
5184 | */ | |
5185 | DAC960_DeallocateCommand(Command); | |
5186 | /* | |
5187 | Wake up any processes waiting on a free Command. | |
5188 | */ | |
5189 | wake_up(&Controller->CommandWaitQueue); | |
5190 | } | |
5191 | ||
5192 | ||
5193 | /* | |
5194 | DAC960_BA_InterruptHandler handles hardware interrupts from DAC960 BA Series | |
5195 | Controllers. | |
5196 | */ | |
5197 | ||
5198 | static irqreturn_t DAC960_BA_InterruptHandler(int IRQ_Channel, | |
5199 | void *DeviceIdentifier, | |
5200 | struct pt_regs *InterruptRegisters) | |
5201 | { | |
5202 | DAC960_Controller_T *Controller = (DAC960_Controller_T *) DeviceIdentifier; | |
5203 | void __iomem *ControllerBaseAddress = Controller->BaseAddress; | |
5204 | DAC960_V2_StatusMailbox_T *NextStatusMailbox; | |
5205 | unsigned long flags; | |
5206 | ||
5207 | spin_lock_irqsave(&Controller->queue_lock, flags); | |
5208 | DAC960_BA_AcknowledgeInterrupt(ControllerBaseAddress); | |
5209 | NextStatusMailbox = Controller->V2.NextStatusMailbox; | |
5210 | while (NextStatusMailbox->Fields.CommandIdentifier > 0) | |
5211 | { | |
5212 | DAC960_V2_CommandIdentifier_T CommandIdentifier = | |
5213 | NextStatusMailbox->Fields.CommandIdentifier; | |
5214 | DAC960_Command_T *Command = Controller->Commands[CommandIdentifier-1]; | |
5215 | Command->V2.CommandStatus = NextStatusMailbox->Fields.CommandStatus; | |
5216 | Command->V2.RequestSenseLength = | |
5217 | NextStatusMailbox->Fields.RequestSenseLength; | |
5218 | Command->V2.DataTransferResidue = | |
5219 | NextStatusMailbox->Fields.DataTransferResidue; | |
5220 | NextStatusMailbox->Words[0] = 0; | |
5221 | if (++NextStatusMailbox > Controller->V2.LastStatusMailbox) | |
5222 | NextStatusMailbox = Controller->V2.FirstStatusMailbox; | |
5223 | DAC960_V2_ProcessCompletedCommand(Command); | |
5224 | } | |
5225 | Controller->V2.NextStatusMailbox = NextStatusMailbox; | |
5226 | /* | |
5227 | Attempt to remove additional I/O Requests from the Controller's | |
5228 | I/O Request Queue and queue them to the Controller. | |
5229 | */ | |
5230 | DAC960_ProcessRequest(Controller); | |
5231 | spin_unlock_irqrestore(&Controller->queue_lock, flags); | |
5232 | return IRQ_HANDLED; | |
5233 | } | |
5234 | ||
5235 | ||
5236 | /* | |
5237 | DAC960_LP_InterruptHandler handles hardware interrupts from DAC960 LP Series | |
5238 | Controllers. | |
5239 | */ | |
5240 | ||
5241 | static irqreturn_t DAC960_LP_InterruptHandler(int IRQ_Channel, | |
5242 | void *DeviceIdentifier, | |
5243 | struct pt_regs *InterruptRegisters) | |
5244 | { | |
5245 | DAC960_Controller_T *Controller = (DAC960_Controller_T *) DeviceIdentifier; | |
5246 | void __iomem *ControllerBaseAddress = Controller->BaseAddress; | |
5247 | DAC960_V2_StatusMailbox_T *NextStatusMailbox; | |
5248 | unsigned long flags; | |
5249 | ||
5250 | spin_lock_irqsave(&Controller->queue_lock, flags); | |
5251 | DAC960_LP_AcknowledgeInterrupt(ControllerBaseAddress); | |
5252 | NextStatusMailbox = Controller->V2.NextStatusMailbox; | |
5253 | while (NextStatusMailbox->Fields.CommandIdentifier > 0) | |
5254 | { | |
5255 | DAC960_V2_CommandIdentifier_T CommandIdentifier = | |
5256 | NextStatusMailbox->Fields.CommandIdentifier; | |
5257 | DAC960_Command_T *Command = Controller->Commands[CommandIdentifier-1]; | |
5258 | Command->V2.CommandStatus = NextStatusMailbox->Fields.CommandStatus; | |
5259 | Command->V2.RequestSenseLength = | |
5260 | NextStatusMailbox->Fields.RequestSenseLength; | |
5261 | Command->V2.DataTransferResidue = | |
5262 | NextStatusMailbox->Fields.DataTransferResidue; | |
5263 | NextStatusMailbox->Words[0] = 0; | |
5264 | if (++NextStatusMailbox > Controller->V2.LastStatusMailbox) | |
5265 | NextStatusMailbox = Controller->V2.FirstStatusMailbox; | |
5266 | DAC960_V2_ProcessCompletedCommand(Command); | |
5267 | } | |
5268 | Controller->V2.NextStatusMailbox = NextStatusMailbox; | |
5269 | /* | |
5270 | Attempt to remove additional I/O Requests from the Controller's | |
5271 | I/O Request Queue and queue them to the Controller. | |
5272 | */ | |
5273 | DAC960_ProcessRequest(Controller); | |
5274 | spin_unlock_irqrestore(&Controller->queue_lock, flags); | |
5275 | return IRQ_HANDLED; | |
5276 | } | |
5277 | ||
5278 | ||
5279 | /* | |
5280 | DAC960_LA_InterruptHandler handles hardware interrupts from DAC960 LA Series | |
5281 | Controllers. | |
5282 | */ | |
5283 | ||
5284 | static irqreturn_t DAC960_LA_InterruptHandler(int IRQ_Channel, | |
5285 | void *DeviceIdentifier, | |
5286 | struct pt_regs *InterruptRegisters) | |
5287 | { | |
5288 | DAC960_Controller_T *Controller = (DAC960_Controller_T *) DeviceIdentifier; | |
5289 | void __iomem *ControllerBaseAddress = Controller->BaseAddress; | |
5290 | DAC960_V1_StatusMailbox_T *NextStatusMailbox; | |
5291 | unsigned long flags; | |
5292 | ||
5293 | spin_lock_irqsave(&Controller->queue_lock, flags); | |
5294 | DAC960_LA_AcknowledgeInterrupt(ControllerBaseAddress); | |
5295 | NextStatusMailbox = Controller->V1.NextStatusMailbox; | |
5296 | while (NextStatusMailbox->Fields.Valid) | |
5297 | { | |
5298 | DAC960_V1_CommandIdentifier_T CommandIdentifier = | |
5299 | NextStatusMailbox->Fields.CommandIdentifier; | |
5300 | DAC960_Command_T *Command = Controller->Commands[CommandIdentifier-1]; | |
5301 | Command->V1.CommandStatus = NextStatusMailbox->Fields.CommandStatus; | |
5302 | NextStatusMailbox->Word = 0; | |
5303 | if (++NextStatusMailbox > Controller->V1.LastStatusMailbox) | |
5304 | NextStatusMailbox = Controller->V1.FirstStatusMailbox; | |
5305 | DAC960_V1_ProcessCompletedCommand(Command); | |
5306 | } | |
5307 | Controller->V1.NextStatusMailbox = NextStatusMailbox; | |
5308 | /* | |
5309 | Attempt to remove additional I/O Requests from the Controller's | |
5310 | I/O Request Queue and queue them to the Controller. | |
5311 | */ | |
5312 | DAC960_ProcessRequest(Controller); | |
5313 | spin_unlock_irqrestore(&Controller->queue_lock, flags); | |
5314 | return IRQ_HANDLED; | |
5315 | } | |
5316 | ||
5317 | ||
5318 | /* | |
5319 | DAC960_PG_InterruptHandler handles hardware interrupts from DAC960 PG Series | |
5320 | Controllers. | |
5321 | */ | |
5322 | ||
5323 | static irqreturn_t DAC960_PG_InterruptHandler(int IRQ_Channel, | |
5324 | void *DeviceIdentifier, | |
5325 | struct pt_regs *InterruptRegisters) | |
5326 | { | |
5327 | DAC960_Controller_T *Controller = (DAC960_Controller_T *) DeviceIdentifier; | |
5328 | void __iomem *ControllerBaseAddress = Controller->BaseAddress; | |
5329 | DAC960_V1_StatusMailbox_T *NextStatusMailbox; | |
5330 | unsigned long flags; | |
5331 | ||
5332 | spin_lock_irqsave(&Controller->queue_lock, flags); | |
5333 | DAC960_PG_AcknowledgeInterrupt(ControllerBaseAddress); | |
5334 | NextStatusMailbox = Controller->V1.NextStatusMailbox; | |
5335 | while (NextStatusMailbox->Fields.Valid) | |
5336 | { | |
5337 | DAC960_V1_CommandIdentifier_T CommandIdentifier = | |
5338 | NextStatusMailbox->Fields.CommandIdentifier; | |
5339 | DAC960_Command_T *Command = Controller->Commands[CommandIdentifier-1]; | |
5340 | Command->V1.CommandStatus = NextStatusMailbox->Fields.CommandStatus; | |
5341 | NextStatusMailbox->Word = 0; | |
5342 | if (++NextStatusMailbox > Controller->V1.LastStatusMailbox) | |
5343 | NextStatusMailbox = Controller->V1.FirstStatusMailbox; | |
5344 | DAC960_V1_ProcessCompletedCommand(Command); | |
5345 | } | |
5346 | Controller->V1.NextStatusMailbox = NextStatusMailbox; | |
5347 | /* | |
5348 | Attempt to remove additional I/O Requests from the Controller's | |
5349 | I/O Request Queue and queue them to the Controller. | |
5350 | */ | |
5351 | DAC960_ProcessRequest(Controller); | |
5352 | spin_unlock_irqrestore(&Controller->queue_lock, flags); | |
5353 | return IRQ_HANDLED; | |
5354 | } | |
5355 | ||
5356 | ||
5357 | /* | |
5358 | DAC960_PD_InterruptHandler handles hardware interrupts from DAC960 PD Series | |
5359 | Controllers. | |
5360 | */ | |
5361 | ||
5362 | static irqreturn_t DAC960_PD_InterruptHandler(int IRQ_Channel, | |
5363 | void *DeviceIdentifier, | |
5364 | struct pt_regs *InterruptRegisters) | |
5365 | { | |
5366 | DAC960_Controller_T *Controller = (DAC960_Controller_T *) DeviceIdentifier; | |
5367 | void __iomem *ControllerBaseAddress = Controller->BaseAddress; | |
5368 | unsigned long flags; | |
5369 | ||
5370 | spin_lock_irqsave(&Controller->queue_lock, flags); | |
5371 | while (DAC960_PD_StatusAvailableP(ControllerBaseAddress)) | |
5372 | { | |
5373 | DAC960_V1_CommandIdentifier_T CommandIdentifier = | |
5374 | DAC960_PD_ReadStatusCommandIdentifier(ControllerBaseAddress); | |
5375 | DAC960_Command_T *Command = Controller->Commands[CommandIdentifier-1]; | |
5376 | Command->V1.CommandStatus = | |
5377 | DAC960_PD_ReadStatusRegister(ControllerBaseAddress); | |
5378 | DAC960_PD_AcknowledgeInterrupt(ControllerBaseAddress); | |
5379 | DAC960_PD_AcknowledgeStatus(ControllerBaseAddress); | |
5380 | DAC960_V1_ProcessCompletedCommand(Command); | |
5381 | } | |
5382 | /* | |
5383 | Attempt to remove additional I/O Requests from the Controller's | |
5384 | I/O Request Queue and queue them to the Controller. | |
5385 | */ | |
5386 | DAC960_ProcessRequest(Controller); | |
5387 | spin_unlock_irqrestore(&Controller->queue_lock, flags); | |
5388 | return IRQ_HANDLED; | |
5389 | } | |
5390 | ||
5391 | ||
5392 | /* | |
5393 | DAC960_P_InterruptHandler handles hardware interrupts from DAC960 P Series | |
5394 | Controllers. | |
5395 | ||
5396 | Translations of DAC960_V1_Enquiry and DAC960_V1_GetDeviceState rely | |
5397 | on the data having been placed into DAC960_Controller_T, rather than | |
5398 | an arbitrary buffer. | |
5399 | */ | |
5400 | ||
5401 | static irqreturn_t DAC960_P_InterruptHandler(int IRQ_Channel, | |
5402 | void *DeviceIdentifier, | |
5403 | struct pt_regs *InterruptRegisters) | |
5404 | { | |
5405 | DAC960_Controller_T *Controller = (DAC960_Controller_T *) DeviceIdentifier; | |
5406 | void __iomem *ControllerBaseAddress = Controller->BaseAddress; | |
5407 | unsigned long flags; | |
5408 | ||
5409 | spin_lock_irqsave(&Controller->queue_lock, flags); | |
5410 | while (DAC960_PD_StatusAvailableP(ControllerBaseAddress)) | |
5411 | { | |
5412 | DAC960_V1_CommandIdentifier_T CommandIdentifier = | |
5413 | DAC960_PD_ReadStatusCommandIdentifier(ControllerBaseAddress); | |
5414 | DAC960_Command_T *Command = Controller->Commands[CommandIdentifier-1]; | |
5415 | DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox; | |
5416 | DAC960_V1_CommandOpcode_T CommandOpcode = | |
5417 | CommandMailbox->Common.CommandOpcode; | |
5418 | Command->V1.CommandStatus = | |
5419 | DAC960_PD_ReadStatusRegister(ControllerBaseAddress); | |
5420 | DAC960_PD_AcknowledgeInterrupt(ControllerBaseAddress); | |
5421 | DAC960_PD_AcknowledgeStatus(ControllerBaseAddress); | |
5422 | switch (CommandOpcode) | |
5423 | { | |
5424 | case DAC960_V1_Enquiry_Old: | |
5425 | Command->V1.CommandMailbox.Common.CommandOpcode = DAC960_V1_Enquiry; | |
5426 | DAC960_P_To_PD_TranslateEnquiry(Controller->V1.NewEnquiry); | |
5427 | break; | |
5428 | case DAC960_V1_GetDeviceState_Old: | |
5429 | Command->V1.CommandMailbox.Common.CommandOpcode = | |
5430 | DAC960_V1_GetDeviceState; | |
5431 | DAC960_P_To_PD_TranslateDeviceState(Controller->V1.NewDeviceState); | |
5432 | break; | |
5433 | case DAC960_V1_Read_Old: | |
5434 | Command->V1.CommandMailbox.Common.CommandOpcode = DAC960_V1_Read; | |
5435 | DAC960_P_To_PD_TranslateReadWriteCommand(CommandMailbox); | |
5436 | break; | |
5437 | case DAC960_V1_Write_Old: | |
5438 | Command->V1.CommandMailbox.Common.CommandOpcode = DAC960_V1_Write; | |
5439 | DAC960_P_To_PD_TranslateReadWriteCommand(CommandMailbox); | |
5440 | break; | |
5441 | case DAC960_V1_ReadWithScatterGather_Old: | |
5442 | Command->V1.CommandMailbox.Common.CommandOpcode = | |
5443 | DAC960_V1_ReadWithScatterGather; | |
5444 | DAC960_P_To_PD_TranslateReadWriteCommand(CommandMailbox); | |
5445 | break; | |
5446 | case DAC960_V1_WriteWithScatterGather_Old: | |
5447 | Command->V1.CommandMailbox.Common.CommandOpcode = | |
5448 | DAC960_V1_WriteWithScatterGather; | |
5449 | DAC960_P_To_PD_TranslateReadWriteCommand(CommandMailbox); | |
5450 | break; | |
5451 | default: | |
5452 | break; | |
5453 | } | |
5454 | DAC960_V1_ProcessCompletedCommand(Command); | |
5455 | } | |
5456 | /* | |
5457 | Attempt to remove additional I/O Requests from the Controller's | |
5458 | I/O Request Queue and queue them to the Controller. | |
5459 | */ | |
5460 | DAC960_ProcessRequest(Controller); | |
5461 | spin_unlock_irqrestore(&Controller->queue_lock, flags); | |
5462 | return IRQ_HANDLED; | |
5463 | } | |
5464 | ||
5465 | ||
5466 | /* | |
5467 | DAC960_V1_QueueMonitoringCommand queues a Monitoring Command to DAC960 V1 | |
5468 | Firmware Controllers. | |
5469 | */ | |
5470 | ||
5471 | static void DAC960_V1_QueueMonitoringCommand(DAC960_Command_T *Command) | |
5472 | { | |
5473 | DAC960_Controller_T *Controller = Command->Controller; | |
5474 | DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox; | |
5475 | DAC960_V1_ClearCommand(Command); | |
5476 | Command->CommandType = DAC960_MonitoringCommand; | |
5477 | CommandMailbox->Type3.CommandOpcode = DAC960_V1_Enquiry; | |
5478 | CommandMailbox->Type3.BusAddress = Controller->V1.NewEnquiryDMA; | |
5479 | DAC960_QueueCommand(Command); | |
5480 | } | |
5481 | ||
5482 | ||
5483 | /* | |
5484 | DAC960_V2_QueueMonitoringCommand queues a Monitoring Command to DAC960 V2 | |
5485 | Firmware Controllers. | |
5486 | */ | |
5487 | ||
5488 | static void DAC960_V2_QueueMonitoringCommand(DAC960_Command_T *Command) | |
5489 | { | |
5490 | DAC960_Controller_T *Controller = Command->Controller; | |
5491 | DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox; | |
5492 | DAC960_V2_ClearCommand(Command); | |
5493 | Command->CommandType = DAC960_MonitoringCommand; | |
5494 | CommandMailbox->ControllerInfo.CommandOpcode = DAC960_V2_IOCTL; | |
5495 | CommandMailbox->ControllerInfo.CommandControlBits | |
5496 | .DataTransferControllerToHost = true; | |
5497 | CommandMailbox->ControllerInfo.CommandControlBits | |
5498 | .NoAutoRequestSense = true; | |
5499 | CommandMailbox->ControllerInfo.DataTransferSize = | |
5500 | sizeof(DAC960_V2_ControllerInfo_T); | |
5501 | CommandMailbox->ControllerInfo.ControllerNumber = 0; | |
5502 | CommandMailbox->ControllerInfo.IOCTL_Opcode = DAC960_V2_GetControllerInfo; | |
5503 | CommandMailbox->ControllerInfo.DataTransferMemoryAddress | |
5504 | .ScatterGatherSegments[0] | |
5505 | .SegmentDataPointer = | |
5506 | Controller->V2.NewControllerInformationDMA; | |
5507 | CommandMailbox->ControllerInfo.DataTransferMemoryAddress | |
5508 | .ScatterGatherSegments[0] | |
5509 | .SegmentByteCount = | |
5510 | CommandMailbox->ControllerInfo.DataTransferSize; | |
5511 | DAC960_QueueCommand(Command); | |
5512 | } | |
5513 | ||
5514 | ||
5515 | /* | |
5516 | DAC960_MonitoringTimerFunction is the timer function for monitoring | |
5517 | the status of DAC960 Controllers. | |
5518 | */ | |
5519 | ||
5520 | static void DAC960_MonitoringTimerFunction(unsigned long TimerData) | |
5521 | { | |
5522 | DAC960_Controller_T *Controller = (DAC960_Controller_T *) TimerData; | |
5523 | DAC960_Command_T *Command; | |
5524 | unsigned long flags; | |
5525 | ||
5526 | if (Controller->FirmwareType == DAC960_V1_Controller) | |
5527 | { | |
5528 | spin_lock_irqsave(&Controller->queue_lock, flags); | |
5529 | /* | |
5530 | Queue a Status Monitoring Command to Controller. | |
5531 | */ | |
5532 | Command = DAC960_AllocateCommand(Controller); | |
5533 | if (Command != NULL) | |
5534 | DAC960_V1_QueueMonitoringCommand(Command); | |
5535 | else Controller->MonitoringCommandDeferred = true; | |
5536 | spin_unlock_irqrestore(&Controller->queue_lock, flags); | |
5537 | } | |
5538 | else | |
5539 | { | |
5540 | DAC960_V2_ControllerInfo_T *ControllerInfo = | |
5541 | &Controller->V2.ControllerInformation; | |
5542 | unsigned int StatusChangeCounter = | |
5543 | Controller->V2.HealthStatusBuffer->StatusChangeCounter; | |
5544 | boolean ForceMonitoringCommand = false; | |
5545 | if (jiffies - Controller->SecondaryMonitoringTime | |
5546 | > DAC960_SecondaryMonitoringInterval) | |
5547 | { | |
5548 | int LogicalDriveNumber; | |
5549 | for (LogicalDriveNumber = 0; | |
5550 | LogicalDriveNumber < DAC960_MaxLogicalDrives; | |
5551 | LogicalDriveNumber++) | |
5552 | { | |
5553 | DAC960_V2_LogicalDeviceInfo_T *LogicalDeviceInfo = | |
5554 | Controller->V2.LogicalDeviceInformation[LogicalDriveNumber]; | |
5555 | if (LogicalDeviceInfo == NULL) continue; | |
5556 | if (!LogicalDeviceInfo->LogicalDeviceControl | |
5557 | .LogicalDeviceInitialized) | |
5558 | { | |
5559 | ForceMonitoringCommand = true; | |
5560 | break; | |
5561 | } | |
5562 | } | |
5563 | Controller->SecondaryMonitoringTime = jiffies; | |
5564 | } | |
5565 | if (StatusChangeCounter == Controller->V2.StatusChangeCounter && | |
5566 | Controller->V2.HealthStatusBuffer->NextEventSequenceNumber | |
5567 | == Controller->V2.NextEventSequenceNumber && | |
5568 | (ControllerInfo->BackgroundInitializationsActive + | |
5569 | ControllerInfo->LogicalDeviceInitializationsActive + | |
5570 | ControllerInfo->PhysicalDeviceInitializationsActive + | |
5571 | ControllerInfo->ConsistencyChecksActive + | |
5572 | ControllerInfo->RebuildsActive + | |
5573 | ControllerInfo->OnlineExpansionsActive == 0 || | |
5574 | jiffies - Controller->PrimaryMonitoringTime | |
5575 | < DAC960_MonitoringTimerInterval) && | |
5576 | !ForceMonitoringCommand) | |
5577 | { | |
5578 | Controller->MonitoringTimer.expires = | |
5579 | jiffies + DAC960_HealthStatusMonitoringInterval; | |
5580 | add_timer(&Controller->MonitoringTimer); | |
5581 | return; | |
5582 | } | |
5583 | Controller->V2.StatusChangeCounter = StatusChangeCounter; | |
5584 | Controller->PrimaryMonitoringTime = jiffies; | |
5585 | ||
5586 | spin_lock_irqsave(&Controller->queue_lock, flags); | |
5587 | /* | |
5588 | Queue a Status Monitoring Command to Controller. | |
5589 | */ | |
5590 | Command = DAC960_AllocateCommand(Controller); | |
5591 | if (Command != NULL) | |
5592 | DAC960_V2_QueueMonitoringCommand(Command); | |
5593 | else Controller->MonitoringCommandDeferred = true; | |
5594 | spin_unlock_irqrestore(&Controller->queue_lock, flags); | |
5595 | /* | |
5596 | Wake up any processes waiting on a Health Status Buffer change. | |
5597 | */ | |
5598 | wake_up(&Controller->HealthStatusWaitQueue); | |
5599 | } | |
5600 | } | |
5601 | ||
5602 | /* | |
5603 | DAC960_CheckStatusBuffer verifies that there is room to hold ByteCount | |
5604 | additional bytes in the Combined Status Buffer and grows the buffer if | |
5605 | necessary. It returns true if there is enough room and false otherwise. | |
5606 | */ | |
5607 | ||
5608 | static boolean DAC960_CheckStatusBuffer(DAC960_Controller_T *Controller, | |
5609 | unsigned int ByteCount) | |
5610 | { | |
5611 | unsigned char *NewStatusBuffer; | |
5612 | if (Controller->InitialStatusLength + 1 + | |
5613 | Controller->CurrentStatusLength + ByteCount + 1 <= | |
5614 | Controller->CombinedStatusBufferLength) | |
5615 | return true; | |
5616 | if (Controller->CombinedStatusBufferLength == 0) | |
5617 | { | |
5618 | unsigned int NewStatusBufferLength = DAC960_InitialStatusBufferSize; | |
5619 | while (NewStatusBufferLength < ByteCount) | |
5620 | NewStatusBufferLength *= 2; | |
5621 | Controller->CombinedStatusBuffer = | |
5622 | (unsigned char *) kmalloc(NewStatusBufferLength, GFP_ATOMIC); | |
5623 | if (Controller->CombinedStatusBuffer == NULL) return false; | |
5624 | Controller->CombinedStatusBufferLength = NewStatusBufferLength; | |
5625 | return true; | |
5626 | } | |
5627 | NewStatusBuffer = (unsigned char *) | |
5628 | kmalloc(2 * Controller->CombinedStatusBufferLength, GFP_ATOMIC); | |
5629 | if (NewStatusBuffer == NULL) | |
5630 | { | |
5631 | DAC960_Warning("Unable to expand Combined Status Buffer - Truncating\n", | |
5632 | Controller); | |
5633 | return false; | |
5634 | } | |
5635 | memcpy(NewStatusBuffer, Controller->CombinedStatusBuffer, | |
5636 | Controller->CombinedStatusBufferLength); | |
5637 | kfree(Controller->CombinedStatusBuffer); | |
5638 | Controller->CombinedStatusBuffer = NewStatusBuffer; | |
5639 | Controller->CombinedStatusBufferLength *= 2; | |
5640 | Controller->CurrentStatusBuffer = | |
5641 | &NewStatusBuffer[Controller->InitialStatusLength + 1]; | |
5642 | return true; | |
5643 | } | |
5644 | ||
5645 | ||
5646 | /* | |
5647 | DAC960_Message prints Driver Messages. | |
5648 | */ | |
5649 | ||
5650 | static void DAC960_Message(DAC960_MessageLevel_T MessageLevel, | |
5651 | unsigned char *Format, | |
5652 | DAC960_Controller_T *Controller, | |
5653 | ...) | |
5654 | { | |
5655 | static unsigned char Buffer[DAC960_LineBufferSize]; | |
5656 | static boolean BeginningOfLine = true; | |
5657 | va_list Arguments; | |
5658 | int Length = 0; | |
5659 | va_start(Arguments, Controller); | |
5660 | Length = vsprintf(Buffer, Format, Arguments); | |
5661 | va_end(Arguments); | |
5662 | if (Controller == NULL) | |
5663 | printk("%sDAC960#%d: %s", DAC960_MessageLevelMap[MessageLevel], | |
5664 | DAC960_ControllerCount, Buffer); | |
5665 | else if (MessageLevel == DAC960_AnnounceLevel || | |
5666 | MessageLevel == DAC960_InfoLevel) | |
5667 | { | |
5668 | if (!Controller->ControllerInitialized) | |
5669 | { | |
5670 | if (DAC960_CheckStatusBuffer(Controller, Length)) | |
5671 | { | |
5672 | strcpy(&Controller->CombinedStatusBuffer | |
5673 | [Controller->InitialStatusLength], | |
5674 | Buffer); | |
5675 | Controller->InitialStatusLength += Length; | |
5676 | Controller->CurrentStatusBuffer = | |
5677 | &Controller->CombinedStatusBuffer | |
5678 | [Controller->InitialStatusLength + 1]; | |
5679 | } | |
5680 | if (MessageLevel == DAC960_AnnounceLevel) | |
5681 | { | |
5682 | static int AnnouncementLines = 0; | |
5683 | if (++AnnouncementLines <= 2) | |
5684 | printk("%sDAC960: %s", DAC960_MessageLevelMap[MessageLevel], | |
5685 | Buffer); | |
5686 | } | |
5687 | else | |
5688 | { | |
5689 | if (BeginningOfLine) | |
5690 | { | |
5691 | if (Buffer[0] != '\n' || Length > 1) | |
5692 | printk("%sDAC960#%d: %s", | |
5693 | DAC960_MessageLevelMap[MessageLevel], | |
5694 | Controller->ControllerNumber, Buffer); | |
5695 | } | |
5696 | else printk("%s", Buffer); | |
5697 | } | |
5698 | } | |
5699 | else if (DAC960_CheckStatusBuffer(Controller, Length)) | |
5700 | { | |
5701 | strcpy(&Controller->CurrentStatusBuffer[ | |
5702 | Controller->CurrentStatusLength], Buffer); | |
5703 | Controller->CurrentStatusLength += Length; | |
5704 | } | |
5705 | } | |
5706 | else if (MessageLevel == DAC960_ProgressLevel) | |
5707 | { | |
5708 | strcpy(Controller->ProgressBuffer, Buffer); | |
5709 | Controller->ProgressBufferLength = Length; | |
5710 | if (Controller->EphemeralProgressMessage) | |
5711 | { | |
5712 | if (jiffies - Controller->LastProgressReportTime | |
5713 | >= DAC960_ProgressReportingInterval) | |
5714 | { | |
5715 | printk("%sDAC960#%d: %s", DAC960_MessageLevelMap[MessageLevel], | |
5716 | Controller->ControllerNumber, Buffer); | |
5717 | Controller->LastProgressReportTime = jiffies; | |
5718 | } | |
5719 | } | |
5720 | else printk("%sDAC960#%d: %s", DAC960_MessageLevelMap[MessageLevel], | |
5721 | Controller->ControllerNumber, Buffer); | |
5722 | } | |
5723 | else if (MessageLevel == DAC960_UserCriticalLevel) | |
5724 | { | |
5725 | strcpy(&Controller->UserStatusBuffer[Controller->UserStatusLength], | |
5726 | Buffer); | |
5727 | Controller->UserStatusLength += Length; | |
5728 | if (Buffer[0] != '\n' || Length > 1) | |
5729 | printk("%sDAC960#%d: %s", DAC960_MessageLevelMap[MessageLevel], | |
5730 | Controller->ControllerNumber, Buffer); | |
5731 | } | |
5732 | else | |
5733 | { | |
5734 | if (BeginningOfLine) | |
5735 | printk("%sDAC960#%d: %s", DAC960_MessageLevelMap[MessageLevel], | |
5736 | Controller->ControllerNumber, Buffer); | |
5737 | else printk("%s", Buffer); | |
5738 | } | |
5739 | BeginningOfLine = (Buffer[Length-1] == '\n'); | |
5740 | } | |
5741 | ||
5742 | ||
5743 | /* | |
5744 | DAC960_ParsePhysicalDevice parses spaces followed by a Physical Device | |
5745 | Channel:TargetID specification from a User Command string. It updates | |
5746 | Channel and TargetID and returns true on success and false on failure. | |
5747 | */ | |
5748 | ||
5749 | static boolean DAC960_ParsePhysicalDevice(DAC960_Controller_T *Controller, | |
5750 | char *UserCommandString, | |
5751 | unsigned char *Channel, | |
5752 | unsigned char *TargetID) | |
5753 | { | |
5754 | char *NewUserCommandString = UserCommandString; | |
5755 | unsigned long XChannel, XTargetID; | |
5756 | while (*UserCommandString == ' ') UserCommandString++; | |
5757 | if (UserCommandString == NewUserCommandString) | |
5758 | return false; | |
5759 | XChannel = simple_strtoul(UserCommandString, &NewUserCommandString, 10); | |
5760 | if (NewUserCommandString == UserCommandString || | |
5761 | *NewUserCommandString != ':' || | |
5762 | XChannel >= Controller->Channels) | |
5763 | return false; | |
5764 | UserCommandString = ++NewUserCommandString; | |
5765 | XTargetID = simple_strtoul(UserCommandString, &NewUserCommandString, 10); | |
5766 | if (NewUserCommandString == UserCommandString || | |
5767 | *NewUserCommandString != '\0' || | |
5768 | XTargetID >= Controller->Targets) | |
5769 | return false; | |
5770 | *Channel = XChannel; | |
5771 | *TargetID = XTargetID; | |
5772 | return true; | |
5773 | } | |
5774 | ||
5775 | ||
5776 | /* | |
5777 | DAC960_ParseLogicalDrive parses spaces followed by a Logical Drive Number | |
5778 | specification from a User Command string. It updates LogicalDriveNumber and | |
5779 | returns true on success and false on failure. | |
5780 | */ | |
5781 | ||
5782 | static boolean DAC960_ParseLogicalDrive(DAC960_Controller_T *Controller, | |
5783 | char *UserCommandString, | |
5784 | unsigned char *LogicalDriveNumber) | |
5785 | { | |
5786 | char *NewUserCommandString = UserCommandString; | |
5787 | unsigned long XLogicalDriveNumber; | |
5788 | while (*UserCommandString == ' ') UserCommandString++; | |
5789 | if (UserCommandString == NewUserCommandString) | |
5790 | return false; | |
5791 | XLogicalDriveNumber = | |
5792 | simple_strtoul(UserCommandString, &NewUserCommandString, 10); | |
5793 | if (NewUserCommandString == UserCommandString || | |
5794 | *NewUserCommandString != '\0' || | |
5795 | XLogicalDriveNumber > DAC960_MaxLogicalDrives - 1) | |
5796 | return false; | |
5797 | *LogicalDriveNumber = XLogicalDriveNumber; | |
5798 | return true; | |
5799 | } | |
5800 | ||
5801 | ||
5802 | /* | |
5803 | DAC960_V1_SetDeviceState sets the Device State for a Physical Device for | |
5804 | DAC960 V1 Firmware Controllers. | |
5805 | */ | |
5806 | ||
5807 | static void DAC960_V1_SetDeviceState(DAC960_Controller_T *Controller, | |
5808 | DAC960_Command_T *Command, | |
5809 | unsigned char Channel, | |
5810 | unsigned char TargetID, | |
5811 | DAC960_V1_PhysicalDeviceState_T | |
5812 | DeviceState, | |
5813 | const unsigned char *DeviceStateString) | |
5814 | { | |
5815 | DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox; | |
5816 | CommandMailbox->Type3D.CommandOpcode = DAC960_V1_StartDevice; | |
5817 | CommandMailbox->Type3D.Channel = Channel; | |
5818 | CommandMailbox->Type3D.TargetID = TargetID; | |
5819 | CommandMailbox->Type3D.DeviceState = DeviceState; | |
5820 | CommandMailbox->Type3D.Modifier = 0; | |
5821 | DAC960_ExecuteCommand(Command); | |
5822 | switch (Command->V1.CommandStatus) | |
5823 | { | |
5824 | case DAC960_V1_NormalCompletion: | |
5825 | DAC960_UserCritical("%s of Physical Device %d:%d Succeeded\n", Controller, | |
5826 | DeviceStateString, Channel, TargetID); | |
5827 | break; | |
5828 | case DAC960_V1_UnableToStartDevice: | |
5829 | DAC960_UserCritical("%s of Physical Device %d:%d Failed - " | |
5830 | "Unable to Start Device\n", Controller, | |
5831 | DeviceStateString, Channel, TargetID); | |
5832 | break; | |
5833 | case DAC960_V1_NoDeviceAtAddress: | |
5834 | DAC960_UserCritical("%s of Physical Device %d:%d Failed - " | |
5835 | "No Device at Address\n", Controller, | |
5836 | DeviceStateString, Channel, TargetID); | |
5837 | break; | |
5838 | case DAC960_V1_InvalidChannelOrTargetOrModifier: | |
5839 | DAC960_UserCritical("%s of Physical Device %d:%d Failed - " | |
5840 | "Invalid Channel or Target or Modifier\n", | |
5841 | Controller, DeviceStateString, Channel, TargetID); | |
5842 | break; | |
5843 | case DAC960_V1_ChannelBusy: | |
5844 | DAC960_UserCritical("%s of Physical Device %d:%d Failed - " | |
5845 | "Channel Busy\n", Controller, | |
5846 | DeviceStateString, Channel, TargetID); | |
5847 | break; | |
5848 | default: | |
5849 | DAC960_UserCritical("%s of Physical Device %d:%d Failed - " | |
5850 | "Unexpected Status %04X\n", Controller, | |
5851 | DeviceStateString, Channel, TargetID, | |
5852 | Command->V1.CommandStatus); | |
5853 | break; | |
5854 | } | |
5855 | } | |
5856 | ||
5857 | ||
5858 | /* | |
5859 | DAC960_V1_ExecuteUserCommand executes a User Command for DAC960 V1 Firmware | |
5860 | Controllers. | |
5861 | */ | |
5862 | ||
5863 | static boolean DAC960_V1_ExecuteUserCommand(DAC960_Controller_T *Controller, | |
5864 | unsigned char *UserCommand) | |
5865 | { | |
5866 | DAC960_Command_T *Command; | |
5867 | DAC960_V1_CommandMailbox_T *CommandMailbox; | |
5868 | unsigned long flags; | |
5869 | unsigned char Channel, TargetID, LogicalDriveNumber; | |
5870 | ||
5871 | spin_lock_irqsave(&Controller->queue_lock, flags); | |
5872 | while ((Command = DAC960_AllocateCommand(Controller)) == NULL) | |
5873 | DAC960_WaitForCommand(Controller); | |
5874 | spin_unlock_irqrestore(&Controller->queue_lock, flags); | |
5875 | Controller->UserStatusLength = 0; | |
5876 | DAC960_V1_ClearCommand(Command); | |
5877 | Command->CommandType = DAC960_ImmediateCommand; | |
5878 | CommandMailbox = &Command->V1.CommandMailbox; | |
5879 | if (strcmp(UserCommand, "flush-cache") == 0) | |
5880 | { | |
5881 | CommandMailbox->Type3.CommandOpcode = DAC960_V1_Flush; | |
5882 | DAC960_ExecuteCommand(Command); | |
5883 | DAC960_UserCritical("Cache Flush Completed\n", Controller); | |
5884 | } | |
5885 | else if (strncmp(UserCommand, "kill", 4) == 0 && | |
5886 | DAC960_ParsePhysicalDevice(Controller, &UserCommand[4], | |
5887 | &Channel, &TargetID)) | |
5888 | { | |
5889 | DAC960_V1_DeviceState_T *DeviceState = | |
5890 | &Controller->V1.DeviceState[Channel][TargetID]; | |
5891 | if (DeviceState->Present && | |
5892 | DeviceState->DeviceType == DAC960_V1_DiskType && | |
5893 | DeviceState->DeviceState != DAC960_V1_Device_Dead) | |
5894 | DAC960_V1_SetDeviceState(Controller, Command, Channel, TargetID, | |
5895 | DAC960_V1_Device_Dead, "Kill"); | |
5896 | else DAC960_UserCritical("Kill of Physical Device %d:%d Illegal\n", | |
5897 | Controller, Channel, TargetID); | |
5898 | } | |
5899 | else if (strncmp(UserCommand, "make-online", 11) == 0 && | |
5900 | DAC960_ParsePhysicalDevice(Controller, &UserCommand[11], | |
5901 | &Channel, &TargetID)) | |
5902 | { | |
5903 | DAC960_V1_DeviceState_T *DeviceState = | |
5904 | &Controller->V1.DeviceState[Channel][TargetID]; | |
5905 | if (DeviceState->Present && | |
5906 | DeviceState->DeviceType == DAC960_V1_DiskType && | |
5907 | DeviceState->DeviceState == DAC960_V1_Device_Dead) | |
5908 | DAC960_V1_SetDeviceState(Controller, Command, Channel, TargetID, | |
5909 | DAC960_V1_Device_Online, "Make Online"); | |
5910 | else DAC960_UserCritical("Make Online of Physical Device %d:%d Illegal\n", | |
5911 | Controller, Channel, TargetID); | |
5912 | ||
5913 | } | |
5914 | else if (strncmp(UserCommand, "make-standby", 12) == 0 && | |
5915 | DAC960_ParsePhysicalDevice(Controller, &UserCommand[12], | |
5916 | &Channel, &TargetID)) | |
5917 | { | |
5918 | DAC960_V1_DeviceState_T *DeviceState = | |
5919 | &Controller->V1.DeviceState[Channel][TargetID]; | |
5920 | if (DeviceState->Present && | |
5921 | DeviceState->DeviceType == DAC960_V1_DiskType && | |
5922 | DeviceState->DeviceState == DAC960_V1_Device_Dead) | |
5923 | DAC960_V1_SetDeviceState(Controller, Command, Channel, TargetID, | |
5924 | DAC960_V1_Device_Standby, "Make Standby"); | |
5925 | else DAC960_UserCritical("Make Standby of Physical " | |
5926 | "Device %d:%d Illegal\n", | |
5927 | Controller, Channel, TargetID); | |
5928 | } | |
5929 | else if (strncmp(UserCommand, "rebuild", 7) == 0 && | |
5930 | DAC960_ParsePhysicalDevice(Controller, &UserCommand[7], | |
5931 | &Channel, &TargetID)) | |
5932 | { | |
5933 | CommandMailbox->Type3D.CommandOpcode = DAC960_V1_RebuildAsync; | |
5934 | CommandMailbox->Type3D.Channel = Channel; | |
5935 | CommandMailbox->Type3D.TargetID = TargetID; | |
5936 | DAC960_ExecuteCommand(Command); | |
5937 | switch (Command->V1.CommandStatus) | |
5938 | { | |
5939 | case DAC960_V1_NormalCompletion: | |
5940 | DAC960_UserCritical("Rebuild of Physical Device %d:%d Initiated\n", | |
5941 | Controller, Channel, TargetID); | |
5942 | break; | |
5943 | case DAC960_V1_AttemptToRebuildOnlineDrive: | |
5944 | DAC960_UserCritical("Rebuild of Physical Device %d:%d Failed - " | |
5945 | "Attempt to Rebuild Online or " | |
5946 | "Unresponsive Drive\n", | |
5947 | Controller, Channel, TargetID); | |
5948 | break; | |
5949 | case DAC960_V1_NewDiskFailedDuringRebuild: | |
5950 | DAC960_UserCritical("Rebuild of Physical Device %d:%d Failed - " | |
5951 | "New Disk Failed During Rebuild\n", | |
5952 | Controller, Channel, TargetID); | |
5953 | break; | |
5954 | case DAC960_V1_InvalidDeviceAddress: | |
5955 | DAC960_UserCritical("Rebuild of Physical Device %d:%d Failed - " | |
5956 | "Invalid Device Address\n", | |
5957 | Controller, Channel, TargetID); | |
5958 | break; | |
5959 | case DAC960_V1_RebuildOrCheckAlreadyInProgress: | |
5960 | DAC960_UserCritical("Rebuild of Physical Device %d:%d Failed - " | |
5961 | "Rebuild or Consistency Check Already " | |
5962 | "in Progress\n", Controller, Channel, TargetID); | |
5963 | break; | |
5964 | default: | |
5965 | DAC960_UserCritical("Rebuild of Physical Device %d:%d Failed - " | |
5966 | "Unexpected Status %04X\n", Controller, | |
5967 | Channel, TargetID, Command->V1.CommandStatus); | |
5968 | break; | |
5969 | } | |
5970 | } | |
5971 | else if (strncmp(UserCommand, "check-consistency", 17) == 0 && | |
5972 | DAC960_ParseLogicalDrive(Controller, &UserCommand[17], | |
5973 | &LogicalDriveNumber)) | |
5974 | { | |
5975 | CommandMailbox->Type3C.CommandOpcode = DAC960_V1_CheckConsistencyAsync; | |
5976 | CommandMailbox->Type3C.LogicalDriveNumber = LogicalDriveNumber; | |
5977 | CommandMailbox->Type3C.AutoRestore = true; | |
5978 | DAC960_ExecuteCommand(Command); | |
5979 | switch (Command->V1.CommandStatus) | |
5980 | { | |
5981 | case DAC960_V1_NormalCompletion: | |
5982 | DAC960_UserCritical("Consistency Check of Logical Drive %d " | |
5983 | "(/dev/rd/c%dd%d) Initiated\n", | |
5984 | Controller, LogicalDriveNumber, | |
5985 | Controller->ControllerNumber, | |
5986 | LogicalDriveNumber); | |
5987 | break; | |
5988 | case DAC960_V1_DependentDiskIsDead: | |
5989 | DAC960_UserCritical("Consistency Check of Logical Drive %d " | |
5990 | "(/dev/rd/c%dd%d) Failed - " | |
5991 | "Dependent Physical Device is DEAD\n", | |
5992 | Controller, LogicalDriveNumber, | |
5993 | Controller->ControllerNumber, | |
5994 | LogicalDriveNumber); | |
5995 | break; | |
5996 | case DAC960_V1_InvalidOrNonredundantLogicalDrive: | |
5997 | DAC960_UserCritical("Consistency Check of Logical Drive %d " | |
5998 | "(/dev/rd/c%dd%d) Failed - " | |
5999 | "Invalid or Nonredundant Logical Drive\n", | |
6000 | Controller, LogicalDriveNumber, | |
6001 | Controller->ControllerNumber, | |
6002 | LogicalDriveNumber); | |
6003 | break; | |
6004 | case DAC960_V1_RebuildOrCheckAlreadyInProgress: | |
6005 | DAC960_UserCritical("Consistency Check of Logical Drive %d " | |
6006 | "(/dev/rd/c%dd%d) Failed - Rebuild or " | |
6007 | "Consistency Check Already in Progress\n", | |
6008 | Controller, LogicalDriveNumber, | |
6009 | Controller->ControllerNumber, | |
6010 | LogicalDriveNumber); | |
6011 | break; | |
6012 | default: | |
6013 | DAC960_UserCritical("Consistency Check of Logical Drive %d " | |
6014 | "(/dev/rd/c%dd%d) Failed - " | |
6015 | "Unexpected Status %04X\n", | |
6016 | Controller, LogicalDriveNumber, | |
6017 | Controller->ControllerNumber, | |
6018 | LogicalDriveNumber, Command->V1.CommandStatus); | |
6019 | break; | |
6020 | } | |
6021 | } | |
6022 | else if (strcmp(UserCommand, "cancel-rebuild") == 0 || | |
6023 | strcmp(UserCommand, "cancel-consistency-check") == 0) | |
6024 | { | |
6025 | /* | |
6026 | the OldRebuildRateConstant is never actually used | |
6027 | once its value is retrieved from the controller. | |
6028 | */ | |
6029 | unsigned char *OldRebuildRateConstant; | |
6030 | dma_addr_t OldRebuildRateConstantDMA; | |
6031 | ||
6032 | OldRebuildRateConstant = pci_alloc_consistent( Controller->PCIDevice, | |
6033 | sizeof(char), &OldRebuildRateConstantDMA); | |
6034 | if (OldRebuildRateConstant == NULL) { | |
6035 | DAC960_UserCritical("Cancellation of Rebuild or " | |
6036 | "Consistency Check Failed - " | |
6037 | "Out of Memory", | |
6038 | Controller); | |
6039 | goto failure; | |
6040 | } | |
6041 | CommandMailbox->Type3R.CommandOpcode = DAC960_V1_RebuildControl; | |
6042 | CommandMailbox->Type3R.RebuildRateConstant = 0xFF; | |
6043 | CommandMailbox->Type3R.BusAddress = OldRebuildRateConstantDMA; | |
6044 | DAC960_ExecuteCommand(Command); | |
6045 | switch (Command->V1.CommandStatus) | |
6046 | { | |
6047 | case DAC960_V1_NormalCompletion: | |
6048 | DAC960_UserCritical("Rebuild or Consistency Check Cancelled\n", | |
6049 | Controller); | |
6050 | break; | |
6051 | default: | |
6052 | DAC960_UserCritical("Cancellation of Rebuild or " | |
6053 | "Consistency Check Failed - " | |
6054 | "Unexpected Status %04X\n", | |
6055 | Controller, Command->V1.CommandStatus); | |
6056 | break; | |
6057 | } | |
6058 | failure: | |
6059 | pci_free_consistent(Controller->PCIDevice, sizeof(char), | |
6060 | OldRebuildRateConstant, OldRebuildRateConstantDMA); | |
6061 | } | |
6062 | else DAC960_UserCritical("Illegal User Command: '%s'\n", | |
6063 | Controller, UserCommand); | |
6064 | ||
6065 | spin_lock_irqsave(&Controller->queue_lock, flags); | |
6066 | DAC960_DeallocateCommand(Command); | |
6067 | spin_unlock_irqrestore(&Controller->queue_lock, flags); | |
6068 | return true; | |
6069 | } | |
6070 | ||
6071 | ||
6072 | /* | |
6073 | DAC960_V2_TranslatePhysicalDevice translates a Physical Device Channel and | |
6074 | TargetID into a Logical Device. It returns true on success and false | |
6075 | on failure. | |
6076 | */ | |
6077 | ||
6078 | static boolean DAC960_V2_TranslatePhysicalDevice(DAC960_Command_T *Command, | |
6079 | unsigned char Channel, | |
6080 | unsigned char TargetID, | |
6081 | unsigned short | |
6082 | *LogicalDeviceNumber) | |
6083 | { | |
6084 | DAC960_V2_CommandMailbox_T SavedCommandMailbox, *CommandMailbox; | |
6085 | DAC960_Controller_T *Controller = Command->Controller; | |
6086 | ||
6087 | CommandMailbox = &Command->V2.CommandMailbox; | |
6088 | memcpy(&SavedCommandMailbox, CommandMailbox, | |
6089 | sizeof(DAC960_V2_CommandMailbox_T)); | |
6090 | ||
6091 | CommandMailbox->PhysicalDeviceInfo.CommandOpcode = DAC960_V2_IOCTL; | |
6092 | CommandMailbox->PhysicalDeviceInfo.CommandControlBits | |
6093 | .DataTransferControllerToHost = true; | |
6094 | CommandMailbox->PhysicalDeviceInfo.CommandControlBits | |
6095 | .NoAutoRequestSense = true; | |
6096 | CommandMailbox->PhysicalDeviceInfo.DataTransferSize = | |
6097 | sizeof(DAC960_V2_PhysicalToLogicalDevice_T); | |
6098 | CommandMailbox->PhysicalDeviceInfo.PhysicalDevice.TargetID = TargetID; | |
6099 | CommandMailbox->PhysicalDeviceInfo.PhysicalDevice.Channel = Channel; | |
6100 | CommandMailbox->PhysicalDeviceInfo.IOCTL_Opcode = | |
6101 | DAC960_V2_TranslatePhysicalToLogicalDevice; | |
6102 | CommandMailbox->Common.DataTransferMemoryAddress | |
6103 | .ScatterGatherSegments[0] | |
6104 | .SegmentDataPointer = | |
6105 | Controller->V2.PhysicalToLogicalDeviceDMA; | |
6106 | CommandMailbox->Common.DataTransferMemoryAddress | |
6107 | .ScatterGatherSegments[0] | |
6108 | .SegmentByteCount = | |
6109 | CommandMailbox->Common.DataTransferSize; | |
6110 | ||
6111 | DAC960_ExecuteCommand(Command); | |
6112 | *LogicalDeviceNumber = Controller->V2.PhysicalToLogicalDevice->LogicalDeviceNumber; | |
6113 | ||
6114 | memcpy(CommandMailbox, &SavedCommandMailbox, | |
6115 | sizeof(DAC960_V2_CommandMailbox_T)); | |
6116 | return (Command->V2.CommandStatus == DAC960_V2_NormalCompletion); | |
6117 | } | |
6118 | ||
6119 | ||
6120 | /* | |
6121 | DAC960_V2_ExecuteUserCommand executes a User Command for DAC960 V2 Firmware | |
6122 | Controllers. | |
6123 | */ | |
6124 | ||
6125 | static boolean DAC960_V2_ExecuteUserCommand(DAC960_Controller_T *Controller, | |
6126 | unsigned char *UserCommand) | |
6127 | { | |
6128 | DAC960_Command_T *Command; | |
6129 | DAC960_V2_CommandMailbox_T *CommandMailbox; | |
6130 | unsigned long flags; | |
6131 | unsigned char Channel, TargetID, LogicalDriveNumber; | |
6132 | unsigned short LogicalDeviceNumber; | |
6133 | ||
6134 | spin_lock_irqsave(&Controller->queue_lock, flags); | |
6135 | while ((Command = DAC960_AllocateCommand(Controller)) == NULL) | |
6136 | DAC960_WaitForCommand(Controller); | |
6137 | spin_unlock_irqrestore(&Controller->queue_lock, flags); | |
6138 | Controller->UserStatusLength = 0; | |
6139 | DAC960_V2_ClearCommand(Command); | |
6140 | Command->CommandType = DAC960_ImmediateCommand; | |
6141 | CommandMailbox = &Command->V2.CommandMailbox; | |
6142 | CommandMailbox->Common.CommandOpcode = DAC960_V2_IOCTL; | |
6143 | CommandMailbox->Common.CommandControlBits.DataTransferControllerToHost = true; | |
6144 | CommandMailbox->Common.CommandControlBits.NoAutoRequestSense = true; | |
6145 | if (strcmp(UserCommand, "flush-cache") == 0) | |
6146 | { | |
6147 | CommandMailbox->DeviceOperation.IOCTL_Opcode = DAC960_V2_PauseDevice; | |
6148 | CommandMailbox->DeviceOperation.OperationDevice = | |
6149 | DAC960_V2_RAID_Controller; | |
6150 | DAC960_ExecuteCommand(Command); | |
6151 | DAC960_UserCritical("Cache Flush Completed\n", Controller); | |
6152 | } | |
6153 | else if (strncmp(UserCommand, "kill", 4) == 0 && | |
6154 | DAC960_ParsePhysicalDevice(Controller, &UserCommand[4], | |
6155 | &Channel, &TargetID) && | |
6156 | DAC960_V2_TranslatePhysicalDevice(Command, Channel, TargetID, | |
6157 | &LogicalDeviceNumber)) | |
6158 | { | |
6159 | CommandMailbox->SetDeviceState.LogicalDevice.LogicalDeviceNumber = | |
6160 | LogicalDeviceNumber; | |
6161 | CommandMailbox->SetDeviceState.IOCTL_Opcode = | |
6162 | DAC960_V2_SetDeviceState; | |
6163 | CommandMailbox->SetDeviceState.DeviceState.PhysicalDeviceState = | |
6164 | DAC960_V2_Device_Dead; | |
6165 | DAC960_ExecuteCommand(Command); | |
6166 | DAC960_UserCritical("Kill of Physical Device %d:%d %s\n", | |
6167 | Controller, Channel, TargetID, | |
6168 | (Command->V2.CommandStatus | |
6169 | == DAC960_V2_NormalCompletion | |
6170 | ? "Succeeded" : "Failed")); | |
6171 | } | |
6172 | else if (strncmp(UserCommand, "make-online", 11) == 0 && | |
6173 | DAC960_ParsePhysicalDevice(Controller, &UserCommand[11], | |
6174 | &Channel, &TargetID) && | |
6175 | DAC960_V2_TranslatePhysicalDevice(Command, Channel, TargetID, | |
6176 | &LogicalDeviceNumber)) | |
6177 | { | |
6178 | CommandMailbox->SetDeviceState.LogicalDevice.LogicalDeviceNumber = | |
6179 | LogicalDeviceNumber; | |
6180 | CommandMailbox->SetDeviceState.IOCTL_Opcode = | |
6181 | DAC960_V2_SetDeviceState; | |
6182 | CommandMailbox->SetDeviceState.DeviceState.PhysicalDeviceState = | |
6183 | DAC960_V2_Device_Online; | |
6184 | DAC960_ExecuteCommand(Command); | |
6185 | DAC960_UserCritical("Make Online of Physical Device %d:%d %s\n", | |
6186 | Controller, Channel, TargetID, | |
6187 | (Command->V2.CommandStatus | |
6188 | == DAC960_V2_NormalCompletion | |
6189 | ? "Succeeded" : "Failed")); | |
6190 | } | |
6191 | else if (strncmp(UserCommand, "make-standby", 12) == 0 && | |
6192 | DAC960_ParsePhysicalDevice(Controller, &UserCommand[12], | |
6193 | &Channel, &TargetID) && | |
6194 | DAC960_V2_TranslatePhysicalDevice(Command, Channel, TargetID, | |
6195 | &LogicalDeviceNumber)) | |
6196 | { | |
6197 | CommandMailbox->SetDeviceState.LogicalDevice.LogicalDeviceNumber = | |
6198 | LogicalDeviceNumber; | |
6199 | CommandMailbox->SetDeviceState.IOCTL_Opcode = | |
6200 | DAC960_V2_SetDeviceState; | |
6201 | CommandMailbox->SetDeviceState.DeviceState.PhysicalDeviceState = | |
6202 | DAC960_V2_Device_Standby; | |
6203 | DAC960_ExecuteCommand(Command); | |
6204 | DAC960_UserCritical("Make Standby of Physical Device %d:%d %s\n", | |
6205 | Controller, Channel, TargetID, | |
6206 | (Command->V2.CommandStatus | |
6207 | == DAC960_V2_NormalCompletion | |
6208 | ? "Succeeded" : "Failed")); | |
6209 | } | |
6210 | else if (strncmp(UserCommand, "rebuild", 7) == 0 && | |
6211 | DAC960_ParsePhysicalDevice(Controller, &UserCommand[7], | |
6212 | &Channel, &TargetID) && | |
6213 | DAC960_V2_TranslatePhysicalDevice(Command, Channel, TargetID, | |
6214 | &LogicalDeviceNumber)) | |
6215 | { | |
6216 | CommandMailbox->LogicalDeviceInfo.LogicalDevice.LogicalDeviceNumber = | |
6217 | LogicalDeviceNumber; | |
6218 | CommandMailbox->LogicalDeviceInfo.IOCTL_Opcode = | |
6219 | DAC960_V2_RebuildDeviceStart; | |
6220 | DAC960_ExecuteCommand(Command); | |
6221 | DAC960_UserCritical("Rebuild of Physical Device %d:%d %s\n", | |
6222 | Controller, Channel, TargetID, | |
6223 | (Command->V2.CommandStatus | |
6224 | == DAC960_V2_NormalCompletion | |
6225 | ? "Initiated" : "Not Initiated")); | |
6226 | } | |
6227 | else if (strncmp(UserCommand, "cancel-rebuild", 14) == 0 && | |
6228 | DAC960_ParsePhysicalDevice(Controller, &UserCommand[14], | |
6229 | &Channel, &TargetID) && | |
6230 | DAC960_V2_TranslatePhysicalDevice(Command, Channel, TargetID, | |
6231 | &LogicalDeviceNumber)) | |
6232 | { | |
6233 | CommandMailbox->LogicalDeviceInfo.LogicalDevice.LogicalDeviceNumber = | |
6234 | LogicalDeviceNumber; | |
6235 | CommandMailbox->LogicalDeviceInfo.IOCTL_Opcode = | |
6236 | DAC960_V2_RebuildDeviceStop; | |
6237 | DAC960_ExecuteCommand(Command); | |
6238 | DAC960_UserCritical("Rebuild of Physical Device %d:%d %s\n", | |
6239 | Controller, Channel, TargetID, | |
6240 | (Command->V2.CommandStatus | |
6241 | == DAC960_V2_NormalCompletion | |
6242 | ? "Cancelled" : "Not Cancelled")); | |
6243 | } | |
6244 | else if (strncmp(UserCommand, "check-consistency", 17) == 0 && | |
6245 | DAC960_ParseLogicalDrive(Controller, &UserCommand[17], | |
6246 | &LogicalDriveNumber)) | |
6247 | { | |
6248 | CommandMailbox->ConsistencyCheck.LogicalDevice.LogicalDeviceNumber = | |
6249 | LogicalDriveNumber; | |
6250 | CommandMailbox->ConsistencyCheck.IOCTL_Opcode = | |
6251 | DAC960_V2_ConsistencyCheckStart; | |
6252 | CommandMailbox->ConsistencyCheck.RestoreConsistency = true; | |
6253 | CommandMailbox->ConsistencyCheck.InitializedAreaOnly = false; | |
6254 | DAC960_ExecuteCommand(Command); | |
6255 | DAC960_UserCritical("Consistency Check of Logical Drive %d " | |
6256 | "(/dev/rd/c%dd%d) %s\n", | |
6257 | Controller, LogicalDriveNumber, | |
6258 | Controller->ControllerNumber, | |
6259 | LogicalDriveNumber, | |
6260 | (Command->V2.CommandStatus | |
6261 | == DAC960_V2_NormalCompletion | |
6262 | ? "Initiated" : "Not Initiated")); | |
6263 | } | |
6264 | else if (strncmp(UserCommand, "cancel-consistency-check", 24) == 0 && | |
6265 | DAC960_ParseLogicalDrive(Controller, &UserCommand[24], | |
6266 | &LogicalDriveNumber)) | |
6267 | { | |
6268 | CommandMailbox->ConsistencyCheck.LogicalDevice.LogicalDeviceNumber = | |
6269 | LogicalDriveNumber; | |
6270 | CommandMailbox->ConsistencyCheck.IOCTL_Opcode = | |
6271 | DAC960_V2_ConsistencyCheckStop; | |
6272 | DAC960_ExecuteCommand(Command); | |
6273 | DAC960_UserCritical("Consistency Check of Logical Drive %d " | |
6274 | "(/dev/rd/c%dd%d) %s\n", | |
6275 | Controller, LogicalDriveNumber, | |
6276 | Controller->ControllerNumber, | |
6277 | LogicalDriveNumber, | |
6278 | (Command->V2.CommandStatus | |
6279 | == DAC960_V2_NormalCompletion | |
6280 | ? "Cancelled" : "Not Cancelled")); | |
6281 | } | |
6282 | else if (strcmp(UserCommand, "perform-discovery") == 0) | |
6283 | { | |
6284 | CommandMailbox->Common.IOCTL_Opcode = DAC960_V2_StartDiscovery; | |
6285 | DAC960_ExecuteCommand(Command); | |
6286 | DAC960_UserCritical("Discovery %s\n", Controller, | |
6287 | (Command->V2.CommandStatus | |
6288 | == DAC960_V2_NormalCompletion | |
6289 | ? "Initiated" : "Not Initiated")); | |
6290 | if (Command->V2.CommandStatus == DAC960_V2_NormalCompletion) | |
6291 | { | |
6292 | CommandMailbox->ControllerInfo.CommandOpcode = DAC960_V2_IOCTL; | |
6293 | CommandMailbox->ControllerInfo.CommandControlBits | |
6294 | .DataTransferControllerToHost = true; | |
6295 | CommandMailbox->ControllerInfo.CommandControlBits | |
6296 | .NoAutoRequestSense = true; | |
6297 | CommandMailbox->ControllerInfo.DataTransferSize = | |
6298 | sizeof(DAC960_V2_ControllerInfo_T); | |
6299 | CommandMailbox->ControllerInfo.ControllerNumber = 0; | |
6300 | CommandMailbox->ControllerInfo.IOCTL_Opcode = | |
6301 | DAC960_V2_GetControllerInfo; | |
6302 | /* | |
6303 | * How does this NOT race with the queued Monitoring | |
6304 | * usage of this structure? | |
6305 | */ | |
6306 | CommandMailbox->ControllerInfo.DataTransferMemoryAddress | |
6307 | .ScatterGatherSegments[0] | |
6308 | .SegmentDataPointer = | |
6309 | Controller->V2.NewControllerInformationDMA; | |
6310 | CommandMailbox->ControllerInfo.DataTransferMemoryAddress | |
6311 | .ScatterGatherSegments[0] | |
6312 | .SegmentByteCount = | |
6313 | CommandMailbox->ControllerInfo.DataTransferSize; | |
6314 | DAC960_ExecuteCommand(Command); | |
6315 | while (Controller->V2.NewControllerInformation->PhysicalScanActive) | |
6316 | { | |
6317 | DAC960_ExecuteCommand(Command); | |
6318 | sleep_on_timeout(&Controller->CommandWaitQueue, HZ); | |
6319 | } | |
6320 | DAC960_UserCritical("Discovery Completed\n", Controller); | |
6321 | } | |
6322 | } | |
6323 | else if (strcmp(UserCommand, "suppress-enclosure-messages") == 0) | |
6324 | Controller->SuppressEnclosureMessages = true; | |
6325 | else DAC960_UserCritical("Illegal User Command: '%s'\n", | |
6326 | Controller, UserCommand); | |
6327 | ||
6328 | spin_lock_irqsave(&Controller->queue_lock, flags); | |
6329 | DAC960_DeallocateCommand(Command); | |
6330 | spin_unlock_irqrestore(&Controller->queue_lock, flags); | |
6331 | return true; | |
6332 | } | |
6333 | ||
6334 | ||
6335 | /* | |
6336 | DAC960_ProcReadStatus implements reading /proc/rd/status. | |
6337 | */ | |
6338 | ||
6339 | static int DAC960_ProcReadStatus(char *Page, char **Start, off_t Offset, | |
6340 | int Count, int *EOF, void *Data) | |
6341 | { | |
6342 | unsigned char *StatusMessage = "OK\n"; | |
6343 | int ControllerNumber, BytesAvailable; | |
6344 | for (ControllerNumber = 0; | |
6345 | ControllerNumber < DAC960_ControllerCount; | |
6346 | ControllerNumber++) | |
6347 | { | |
6348 | DAC960_Controller_T *Controller = DAC960_Controllers[ControllerNumber]; | |
6349 | if (Controller == NULL) continue; | |
6350 | if (Controller->MonitoringAlertMode) | |
6351 | { | |
6352 | StatusMessage = "ALERT\n"; | |
6353 | break; | |
6354 | } | |
6355 | } | |
6356 | BytesAvailable = strlen(StatusMessage) - Offset; | |
6357 | if (Count >= BytesAvailable) | |
6358 | { | |
6359 | Count = BytesAvailable; | |
6360 | *EOF = true; | |
6361 | } | |
6362 | if (Count <= 0) return 0; | |
6363 | *Start = Page; | |
6364 | memcpy(Page, &StatusMessage[Offset], Count); | |
6365 | return Count; | |
6366 | } | |
6367 | ||
6368 | ||
6369 | /* | |
6370 | DAC960_ProcReadInitialStatus implements reading /proc/rd/cN/initial_status. | |
6371 | */ | |
6372 | ||
6373 | static int DAC960_ProcReadInitialStatus(char *Page, char **Start, off_t Offset, | |
6374 | int Count, int *EOF, void *Data) | |
6375 | { | |
6376 | DAC960_Controller_T *Controller = (DAC960_Controller_T *) Data; | |
6377 | int BytesAvailable = Controller->InitialStatusLength - Offset; | |
6378 | if (Count >= BytesAvailable) | |
6379 | { | |
6380 | Count = BytesAvailable; | |
6381 | *EOF = true; | |
6382 | } | |
6383 | if (Count <= 0) return 0; | |
6384 | *Start = Page; | |
6385 | memcpy(Page, &Controller->CombinedStatusBuffer[Offset], Count); | |
6386 | return Count; | |
6387 | } | |
6388 | ||
6389 | ||
6390 | /* | |
6391 | DAC960_ProcReadCurrentStatus implements reading /proc/rd/cN/current_status. | |
6392 | */ | |
6393 | ||
6394 | static int DAC960_ProcReadCurrentStatus(char *Page, char **Start, off_t Offset, | |
6395 | int Count, int *EOF, void *Data) | |
6396 | { | |
6397 | DAC960_Controller_T *Controller = (DAC960_Controller_T *) Data; | |
6398 | unsigned char *StatusMessage = | |
6399 | "No Rebuild or Consistency Check in Progress\n"; | |
6400 | int ProgressMessageLength = strlen(StatusMessage); | |
6401 | int BytesAvailable; | |
6402 | if (jiffies != Controller->LastCurrentStatusTime) | |
6403 | { | |
6404 | Controller->CurrentStatusLength = 0; | |
6405 | DAC960_AnnounceDriver(Controller); | |
6406 | DAC960_ReportControllerConfiguration(Controller); | |
6407 | DAC960_ReportDeviceConfiguration(Controller); | |
6408 | if (Controller->ProgressBufferLength > 0) | |
6409 | ProgressMessageLength = Controller->ProgressBufferLength; | |
6410 | if (DAC960_CheckStatusBuffer(Controller, 2 + ProgressMessageLength)) | |
6411 | { | |
6412 | unsigned char *CurrentStatusBuffer = Controller->CurrentStatusBuffer; | |
6413 | CurrentStatusBuffer[Controller->CurrentStatusLength++] = ' '; | |
6414 | CurrentStatusBuffer[Controller->CurrentStatusLength++] = ' '; | |
6415 | if (Controller->ProgressBufferLength > 0) | |
6416 | strcpy(&CurrentStatusBuffer[Controller->CurrentStatusLength], | |
6417 | Controller->ProgressBuffer); | |
6418 | else | |
6419 | strcpy(&CurrentStatusBuffer[Controller->CurrentStatusLength], | |
6420 | StatusMessage); | |
6421 | Controller->CurrentStatusLength += ProgressMessageLength; | |
6422 | } | |
6423 | Controller->LastCurrentStatusTime = jiffies; | |
6424 | } | |
6425 | BytesAvailable = Controller->CurrentStatusLength - Offset; | |
6426 | if (Count >= BytesAvailable) | |
6427 | { | |
6428 | Count = BytesAvailable; | |
6429 | *EOF = true; | |
6430 | } | |
6431 | if (Count <= 0) return 0; | |
6432 | *Start = Page; | |
6433 | memcpy(Page, &Controller->CurrentStatusBuffer[Offset], Count); | |
6434 | return Count; | |
6435 | } | |
6436 | ||
6437 | ||
6438 | /* | |
6439 | DAC960_ProcReadUserCommand implements reading /proc/rd/cN/user_command. | |
6440 | */ | |
6441 | ||
6442 | static int DAC960_ProcReadUserCommand(char *Page, char **Start, off_t Offset, | |
6443 | int Count, int *EOF, void *Data) | |
6444 | { | |
6445 | DAC960_Controller_T *Controller = (DAC960_Controller_T *) Data; | |
6446 | int BytesAvailable = Controller->UserStatusLength - Offset; | |
6447 | if (Count >= BytesAvailable) | |
6448 | { | |
6449 | Count = BytesAvailable; | |
6450 | *EOF = true; | |
6451 | } | |
6452 | if (Count <= 0) return 0; | |
6453 | *Start = Page; | |
6454 | memcpy(Page, &Controller->UserStatusBuffer[Offset], Count); | |
6455 | return Count; | |
6456 | } | |
6457 | ||
6458 | ||
6459 | /* | |
6460 | DAC960_ProcWriteUserCommand implements writing /proc/rd/cN/user_command. | |
6461 | */ | |
6462 | ||
6463 | static int DAC960_ProcWriteUserCommand(struct file *file, | |
6464 | const char __user *Buffer, | |
6465 | unsigned long Count, void *Data) | |
6466 | { | |
6467 | DAC960_Controller_T *Controller = (DAC960_Controller_T *) Data; | |
6468 | unsigned char CommandBuffer[80]; | |
6469 | int Length; | |
6470 | if (Count > sizeof(CommandBuffer)-1) return -EINVAL; | |
6471 | if (copy_from_user(CommandBuffer, Buffer, Count)) return -EFAULT; | |
6472 | CommandBuffer[Count] = '\0'; | |
6473 | Length = strlen(CommandBuffer); | |
6474 | if (CommandBuffer[Length-1] == '\n') | |
6475 | CommandBuffer[--Length] = '\0'; | |
6476 | if (Controller->FirmwareType == DAC960_V1_Controller) | |
6477 | return (DAC960_V1_ExecuteUserCommand(Controller, CommandBuffer) | |
6478 | ? Count : -EBUSY); | |
6479 | else | |
6480 | return (DAC960_V2_ExecuteUserCommand(Controller, CommandBuffer) | |
6481 | ? Count : -EBUSY); | |
6482 | } | |
6483 | ||
6484 | ||
6485 | /* | |
6486 | DAC960_CreateProcEntries creates the /proc/rd/... entries for the | |
6487 | DAC960 Driver. | |
6488 | */ | |
6489 | ||
6490 | static void DAC960_CreateProcEntries(DAC960_Controller_T *Controller) | |
6491 | { | |
6492 | struct proc_dir_entry *StatusProcEntry; | |
6493 | struct proc_dir_entry *ControllerProcEntry; | |
6494 | struct proc_dir_entry *UserCommandProcEntry; | |
6495 | ||
6496 | if (DAC960_ProcDirectoryEntry == NULL) { | |
6497 | DAC960_ProcDirectoryEntry = proc_mkdir("rd", NULL); | |
6498 | StatusProcEntry = create_proc_read_entry("status", 0, | |
6499 | DAC960_ProcDirectoryEntry, | |
6500 | DAC960_ProcReadStatus, NULL); | |
6501 | } | |
6502 | ||
6503 | sprintf(Controller->ControllerName, "c%d", Controller->ControllerNumber); | |
6504 | ControllerProcEntry = proc_mkdir(Controller->ControllerName, | |
6505 | DAC960_ProcDirectoryEntry); | |
6506 | create_proc_read_entry("initial_status", 0, ControllerProcEntry, | |
6507 | DAC960_ProcReadInitialStatus, Controller); | |
6508 | create_proc_read_entry("current_status", 0, ControllerProcEntry, | |
6509 | DAC960_ProcReadCurrentStatus, Controller); | |
6510 | UserCommandProcEntry = | |
6511 | create_proc_read_entry("user_command", S_IWUSR | S_IRUSR, | |
6512 | ControllerProcEntry, DAC960_ProcReadUserCommand, | |
6513 | Controller); | |
6514 | UserCommandProcEntry->write_proc = DAC960_ProcWriteUserCommand; | |
6515 | Controller->ControllerProcEntry = ControllerProcEntry; | |
6516 | } | |
6517 | ||
6518 | ||
6519 | /* | |
6520 | DAC960_DestroyProcEntries destroys the /proc/rd/... entries for the | |
6521 | DAC960 Driver. | |
6522 | */ | |
6523 | ||
6524 | static void DAC960_DestroyProcEntries(DAC960_Controller_T *Controller) | |
6525 | { | |
6526 | if (Controller->ControllerProcEntry == NULL) | |
6527 | return; | |
6528 | remove_proc_entry("initial_status", Controller->ControllerProcEntry); | |
6529 | remove_proc_entry("current_status", Controller->ControllerProcEntry); | |
6530 | remove_proc_entry("user_command", Controller->ControllerProcEntry); | |
6531 | remove_proc_entry(Controller->ControllerName, DAC960_ProcDirectoryEntry); | |
6532 | Controller->ControllerProcEntry = NULL; | |
6533 | } | |
6534 | ||
6535 | #ifdef DAC960_GAM_MINOR | |
6536 | ||
6537 | /* | |
6538 | * DAC960_gam_ioctl is the ioctl function for performing RAID operations. | |
6539 | */ | |
6540 | ||
6541 | static int DAC960_gam_ioctl(struct inode *inode, struct file *file, | |
6542 | unsigned int Request, unsigned long Argument) | |
6543 | { | |
6544 | int ErrorCode = 0; | |
6545 | if (!capable(CAP_SYS_ADMIN)) return -EACCES; | |
6546 | switch (Request) | |
6547 | { | |
6548 | case DAC960_IOCTL_GET_CONTROLLER_COUNT: | |
6549 | return DAC960_ControllerCount; | |
6550 | case DAC960_IOCTL_GET_CONTROLLER_INFO: | |
6551 | { | |
6552 | DAC960_ControllerInfo_T __user *UserSpaceControllerInfo = | |
6553 | (DAC960_ControllerInfo_T __user *) Argument; | |
6554 | DAC960_ControllerInfo_T ControllerInfo; | |
6555 | DAC960_Controller_T *Controller; | |
6556 | int ControllerNumber; | |
6557 | if (UserSpaceControllerInfo == NULL) return -EINVAL; | |
6558 | ErrorCode = get_user(ControllerNumber, | |
6559 | &UserSpaceControllerInfo->ControllerNumber); | |
6560 | if (ErrorCode != 0) return ErrorCode; | |
6561 | if (ControllerNumber < 0 || | |
6562 | ControllerNumber > DAC960_ControllerCount - 1) | |
6563 | return -ENXIO; | |
6564 | Controller = DAC960_Controllers[ControllerNumber]; | |
6565 | if (Controller == NULL) return -ENXIO; | |
6566 | memset(&ControllerInfo, 0, sizeof(DAC960_ControllerInfo_T)); | |
6567 | ControllerInfo.ControllerNumber = ControllerNumber; | |
6568 | ControllerInfo.FirmwareType = Controller->FirmwareType; | |
6569 | ControllerInfo.Channels = Controller->Channels; | |
6570 | ControllerInfo.Targets = Controller->Targets; | |
6571 | ControllerInfo.PCI_Bus = Controller->Bus; | |
6572 | ControllerInfo.PCI_Device = Controller->Device; | |
6573 | ControllerInfo.PCI_Function = Controller->Function; | |
6574 | ControllerInfo.IRQ_Channel = Controller->IRQ_Channel; | |
6575 | ControllerInfo.PCI_Address = Controller->PCI_Address; | |
6576 | strcpy(ControllerInfo.ModelName, Controller->ModelName); | |
6577 | strcpy(ControllerInfo.FirmwareVersion, Controller->FirmwareVersion); | |
6578 | return (copy_to_user(UserSpaceControllerInfo, &ControllerInfo, | |
6579 | sizeof(DAC960_ControllerInfo_T)) ? -EFAULT : 0); | |
6580 | } | |
6581 | case DAC960_IOCTL_V1_EXECUTE_COMMAND: | |
6582 | { | |
6583 | DAC960_V1_UserCommand_T __user *UserSpaceUserCommand = | |
6584 | (DAC960_V1_UserCommand_T __user *) Argument; | |
6585 | DAC960_V1_UserCommand_T UserCommand; | |
6586 | DAC960_Controller_T *Controller; | |
6587 | DAC960_Command_T *Command = NULL; | |
6588 | DAC960_V1_CommandOpcode_T CommandOpcode; | |
6589 | DAC960_V1_CommandStatus_T CommandStatus; | |
6590 | DAC960_V1_DCDB_T DCDB; | |
6591 | DAC960_V1_DCDB_T *DCDB_IOBUF = NULL; | |
6592 | dma_addr_t DCDB_IOBUFDMA; | |
6593 | unsigned long flags; | |
6594 | int ControllerNumber, DataTransferLength; | |
6595 | unsigned char *DataTransferBuffer = NULL; | |
6596 | dma_addr_t DataTransferBufferDMA; | |
6597 | if (UserSpaceUserCommand == NULL) return -EINVAL; | |
6598 | if (copy_from_user(&UserCommand, UserSpaceUserCommand, | |
6599 | sizeof(DAC960_V1_UserCommand_T))) { | |
6600 | ErrorCode = -EFAULT; | |
6601 | goto Failure1a; | |
6602 | } | |
6603 | ControllerNumber = UserCommand.ControllerNumber; | |
6604 | if (ControllerNumber < 0 || | |
6605 | ControllerNumber > DAC960_ControllerCount - 1) | |
6606 | return -ENXIO; | |
6607 | Controller = DAC960_Controllers[ControllerNumber]; | |
6608 | if (Controller == NULL) return -ENXIO; | |
6609 | if (Controller->FirmwareType != DAC960_V1_Controller) return -EINVAL; | |
6610 | CommandOpcode = UserCommand.CommandMailbox.Common.CommandOpcode; | |
6611 | DataTransferLength = UserCommand.DataTransferLength; | |
6612 | if (CommandOpcode & 0x80) return -EINVAL; | |
6613 | if (CommandOpcode == DAC960_V1_DCDB) | |
6614 | { | |
6615 | if (copy_from_user(&DCDB, UserCommand.DCDB, | |
6616 | sizeof(DAC960_V1_DCDB_T))) { | |
6617 | ErrorCode = -EFAULT; | |
6618 | goto Failure1a; | |
6619 | } | |
6620 | if (DCDB.Channel >= DAC960_V1_MaxChannels) return -EINVAL; | |
6621 | if (!((DataTransferLength == 0 && | |
6622 | DCDB.Direction | |
6623 | == DAC960_V1_DCDB_NoDataTransfer) || | |
6624 | (DataTransferLength > 0 && | |
6625 | DCDB.Direction | |
6626 | == DAC960_V1_DCDB_DataTransferDeviceToSystem) || | |
6627 | (DataTransferLength < 0 && | |
6628 | DCDB.Direction | |
6629 | == DAC960_V1_DCDB_DataTransferSystemToDevice))) | |
6630 | return -EINVAL; | |
6631 | if (((DCDB.TransferLengthHigh4 << 16) | DCDB.TransferLength) | |
6632 | != abs(DataTransferLength)) | |
6633 | return -EINVAL; | |
6634 | DCDB_IOBUF = pci_alloc_consistent(Controller->PCIDevice, | |
6635 | sizeof(DAC960_V1_DCDB_T), &DCDB_IOBUFDMA); | |
6636 | if (DCDB_IOBUF == NULL) | |
6637 | return -ENOMEM; | |
6638 | } | |
6639 | if (DataTransferLength > 0) | |
6640 | { | |
6641 | DataTransferBuffer = pci_alloc_consistent(Controller->PCIDevice, | |
6642 | DataTransferLength, &DataTransferBufferDMA); | |
6643 | if (DataTransferBuffer == NULL) { | |
6644 | ErrorCode = -ENOMEM; | |
6645 | goto Failure1; | |
6646 | } | |
6647 | memset(DataTransferBuffer, 0, DataTransferLength); | |
6648 | } | |
6649 | else if (DataTransferLength < 0) | |
6650 | { | |
6651 | DataTransferBuffer = pci_alloc_consistent(Controller->PCIDevice, | |
6652 | -DataTransferLength, &DataTransferBufferDMA); | |
6653 | if (DataTransferBuffer == NULL) { | |
6654 | ErrorCode = -ENOMEM; | |
6655 | goto Failure1; | |
6656 | } | |
6657 | if (copy_from_user(DataTransferBuffer, | |
6658 | UserCommand.DataTransferBuffer, | |
6659 | -DataTransferLength)) { | |
6660 | ErrorCode = -EFAULT; | |
6661 | goto Failure1; | |
6662 | } | |
6663 | } | |
6664 | if (CommandOpcode == DAC960_V1_DCDB) | |
6665 | { | |
6666 | spin_lock_irqsave(&Controller->queue_lock, flags); | |
6667 | while ((Command = DAC960_AllocateCommand(Controller)) == NULL) | |
6668 | DAC960_WaitForCommand(Controller); | |
6669 | while (Controller->V1.DirectCommandActive[DCDB.Channel] | |
6670 | [DCDB.TargetID]) | |
6671 | { | |
6672 | spin_unlock_irq(&Controller->queue_lock); | |
6673 | __wait_event(Controller->CommandWaitQueue, | |
6674 | !Controller->V1.DirectCommandActive | |
6675 | [DCDB.Channel][DCDB.TargetID]); | |
6676 | spin_lock_irq(&Controller->queue_lock); | |
6677 | } | |
6678 | Controller->V1.DirectCommandActive[DCDB.Channel] | |
6679 | [DCDB.TargetID] = true; | |
6680 | spin_unlock_irqrestore(&Controller->queue_lock, flags); | |
6681 | DAC960_V1_ClearCommand(Command); | |
6682 | Command->CommandType = DAC960_ImmediateCommand; | |
6683 | memcpy(&Command->V1.CommandMailbox, &UserCommand.CommandMailbox, | |
6684 | sizeof(DAC960_V1_CommandMailbox_T)); | |
6685 | Command->V1.CommandMailbox.Type3.BusAddress = DCDB_IOBUFDMA; | |
6686 | DCDB.BusAddress = DataTransferBufferDMA; | |
6687 | memcpy(DCDB_IOBUF, &DCDB, sizeof(DAC960_V1_DCDB_T)); | |
6688 | } | |
6689 | else | |
6690 | { | |
6691 | spin_lock_irqsave(&Controller->queue_lock, flags); | |
6692 | while ((Command = DAC960_AllocateCommand(Controller)) == NULL) | |
6693 | DAC960_WaitForCommand(Controller); | |
6694 | spin_unlock_irqrestore(&Controller->queue_lock, flags); | |
6695 | DAC960_V1_ClearCommand(Command); | |
6696 | Command->CommandType = DAC960_ImmediateCommand; | |
6697 | memcpy(&Command->V1.CommandMailbox, &UserCommand.CommandMailbox, | |
6698 | sizeof(DAC960_V1_CommandMailbox_T)); | |
6699 | if (DataTransferBuffer != NULL) | |
6700 | Command->V1.CommandMailbox.Type3.BusAddress = | |
6701 | DataTransferBufferDMA; | |
6702 | } | |
6703 | DAC960_ExecuteCommand(Command); | |
6704 | CommandStatus = Command->V1.CommandStatus; | |
6705 | spin_lock_irqsave(&Controller->queue_lock, flags); | |
6706 | DAC960_DeallocateCommand(Command); | |
6707 | spin_unlock_irqrestore(&Controller->queue_lock, flags); | |
6708 | if (DataTransferLength > 0) | |
6709 | { | |
6710 | if (copy_to_user(UserCommand.DataTransferBuffer, | |
6711 | DataTransferBuffer, DataTransferLength)) { | |
6712 | ErrorCode = -EFAULT; | |
6713 | goto Failure1; | |
6714 | } | |
6715 | } | |
6716 | if (CommandOpcode == DAC960_V1_DCDB) | |
6717 | { | |
6718 | /* | |
6719 | I don't believe Target or Channel in the DCDB_IOBUF | |
6720 | should be any different from the contents of DCDB. | |
6721 | */ | |
6722 | Controller->V1.DirectCommandActive[DCDB.Channel] | |
6723 | [DCDB.TargetID] = false; | |
6724 | if (copy_to_user(UserCommand.DCDB, DCDB_IOBUF, | |
6725 | sizeof(DAC960_V1_DCDB_T))) { | |
6726 | ErrorCode = -EFAULT; | |
6727 | goto Failure1; | |
6728 | } | |
6729 | } | |
6730 | ErrorCode = CommandStatus; | |
6731 | Failure1: | |
6732 | if (DataTransferBuffer != NULL) | |
6733 | pci_free_consistent(Controller->PCIDevice, abs(DataTransferLength), | |
6734 | DataTransferBuffer, DataTransferBufferDMA); | |
6735 | if (DCDB_IOBUF != NULL) | |
6736 | pci_free_consistent(Controller->PCIDevice, sizeof(DAC960_V1_DCDB_T), | |
6737 | DCDB_IOBUF, DCDB_IOBUFDMA); | |
6738 | Failure1a: | |
6739 | return ErrorCode; | |
6740 | } | |
6741 | case DAC960_IOCTL_V2_EXECUTE_COMMAND: | |
6742 | { | |
6743 | DAC960_V2_UserCommand_T __user *UserSpaceUserCommand = | |
6744 | (DAC960_V2_UserCommand_T __user *) Argument; | |
6745 | DAC960_V2_UserCommand_T UserCommand; | |
6746 | DAC960_Controller_T *Controller; | |
6747 | DAC960_Command_T *Command = NULL; | |
6748 | DAC960_V2_CommandMailbox_T *CommandMailbox; | |
6749 | DAC960_V2_CommandStatus_T CommandStatus; | |
6750 | unsigned long flags; | |
6751 | int ControllerNumber, DataTransferLength; | |
6752 | int DataTransferResidue, RequestSenseLength; | |
6753 | unsigned char *DataTransferBuffer = NULL; | |
6754 | dma_addr_t DataTransferBufferDMA; | |
6755 | unsigned char *RequestSenseBuffer = NULL; | |
6756 | dma_addr_t RequestSenseBufferDMA; | |
6757 | if (UserSpaceUserCommand == NULL) return -EINVAL; | |
6758 | if (copy_from_user(&UserCommand, UserSpaceUserCommand, | |
6759 | sizeof(DAC960_V2_UserCommand_T))) { | |
6760 | ErrorCode = -EFAULT; | |
6761 | goto Failure2a; | |
6762 | } | |
6763 | ControllerNumber = UserCommand.ControllerNumber; | |
6764 | if (ControllerNumber < 0 || | |
6765 | ControllerNumber > DAC960_ControllerCount - 1) | |
6766 | return -ENXIO; | |
6767 | Controller = DAC960_Controllers[ControllerNumber]; | |
6768 | if (Controller == NULL) return -ENXIO; | |
6769 | if (Controller->FirmwareType != DAC960_V2_Controller) return -EINVAL; | |
6770 | DataTransferLength = UserCommand.DataTransferLength; | |
6771 | if (DataTransferLength > 0) | |
6772 | { | |
6773 | DataTransferBuffer = pci_alloc_consistent(Controller->PCIDevice, | |
6774 | DataTransferLength, &DataTransferBufferDMA); | |
6775 | if (DataTransferBuffer == NULL) return -ENOMEM; | |
6776 | memset(DataTransferBuffer, 0, DataTransferLength); | |
6777 | } | |
6778 | else if (DataTransferLength < 0) | |
6779 | { | |
6780 | DataTransferBuffer = pci_alloc_consistent(Controller->PCIDevice, | |
6781 | -DataTransferLength, &DataTransferBufferDMA); | |
6782 | if (DataTransferBuffer == NULL) return -ENOMEM; | |
6783 | if (copy_from_user(DataTransferBuffer, | |
6784 | UserCommand.DataTransferBuffer, | |
6785 | -DataTransferLength)) { | |
6786 | ErrorCode = -EFAULT; | |
6787 | goto Failure2; | |
6788 | } | |
6789 | } | |
6790 | RequestSenseLength = UserCommand.RequestSenseLength; | |
6791 | if (RequestSenseLength > 0) | |
6792 | { | |
6793 | RequestSenseBuffer = pci_alloc_consistent(Controller->PCIDevice, | |
6794 | RequestSenseLength, &RequestSenseBufferDMA); | |
6795 | if (RequestSenseBuffer == NULL) | |
6796 | { | |
6797 | ErrorCode = -ENOMEM; | |
6798 | goto Failure2; | |
6799 | } | |
6800 | memset(RequestSenseBuffer, 0, RequestSenseLength); | |
6801 | } | |
6802 | spin_lock_irqsave(&Controller->queue_lock, flags); | |
6803 | while ((Command = DAC960_AllocateCommand(Controller)) == NULL) | |
6804 | DAC960_WaitForCommand(Controller); | |
6805 | spin_unlock_irqrestore(&Controller->queue_lock, flags); | |
6806 | DAC960_V2_ClearCommand(Command); | |
6807 | Command->CommandType = DAC960_ImmediateCommand; | |
6808 | CommandMailbox = &Command->V2.CommandMailbox; | |
6809 | memcpy(CommandMailbox, &UserCommand.CommandMailbox, | |
6810 | sizeof(DAC960_V2_CommandMailbox_T)); | |
6811 | CommandMailbox->Common.CommandControlBits | |
6812 | .AdditionalScatterGatherListMemory = false; | |
6813 | CommandMailbox->Common.CommandControlBits | |
6814 | .NoAutoRequestSense = true; | |
6815 | CommandMailbox->Common.DataTransferSize = 0; | |
6816 | CommandMailbox->Common.DataTransferPageNumber = 0; | |
6817 | memset(&CommandMailbox->Common.DataTransferMemoryAddress, 0, | |
6818 | sizeof(DAC960_V2_DataTransferMemoryAddress_T)); | |
6819 | if (DataTransferLength != 0) | |
6820 | { | |
6821 | if (DataTransferLength > 0) | |
6822 | { | |
6823 | CommandMailbox->Common.CommandControlBits | |
6824 | .DataTransferControllerToHost = true; | |
6825 | CommandMailbox->Common.DataTransferSize = DataTransferLength; | |
6826 | } | |
6827 | else | |
6828 | { | |
6829 | CommandMailbox->Common.CommandControlBits | |
6830 | .DataTransferControllerToHost = false; | |
6831 | CommandMailbox->Common.DataTransferSize = -DataTransferLength; | |
6832 | } | |
6833 | CommandMailbox->Common.DataTransferMemoryAddress | |
6834 | .ScatterGatherSegments[0] | |
6835 | .SegmentDataPointer = DataTransferBufferDMA; | |
6836 | CommandMailbox->Common.DataTransferMemoryAddress | |
6837 | .ScatterGatherSegments[0] | |
6838 | .SegmentByteCount = | |
6839 | CommandMailbox->Common.DataTransferSize; | |
6840 | } | |
6841 | if (RequestSenseLength > 0) | |
6842 | { | |
6843 | CommandMailbox->Common.CommandControlBits | |
6844 | .NoAutoRequestSense = false; | |
6845 | CommandMailbox->Common.RequestSenseSize = RequestSenseLength; | |
6846 | CommandMailbox->Common.RequestSenseBusAddress = | |
6847 | RequestSenseBufferDMA; | |
6848 | } | |
6849 | DAC960_ExecuteCommand(Command); | |
6850 | CommandStatus = Command->V2.CommandStatus; | |
6851 | RequestSenseLength = Command->V2.RequestSenseLength; | |
6852 | DataTransferResidue = Command->V2.DataTransferResidue; | |
6853 | spin_lock_irqsave(&Controller->queue_lock, flags); | |
6854 | DAC960_DeallocateCommand(Command); | |
6855 | spin_unlock_irqrestore(&Controller->queue_lock, flags); | |
6856 | if (RequestSenseLength > UserCommand.RequestSenseLength) | |
6857 | RequestSenseLength = UserCommand.RequestSenseLength; | |
6858 | if (copy_to_user(&UserSpaceUserCommand->DataTransferLength, | |
6859 | &DataTransferResidue, | |
6860 | sizeof(DataTransferResidue))) { | |
6861 | ErrorCode = -EFAULT; | |
6862 | goto Failure2; | |
6863 | } | |
6864 | if (copy_to_user(&UserSpaceUserCommand->RequestSenseLength, | |
6865 | &RequestSenseLength, sizeof(RequestSenseLength))) { | |
6866 | ErrorCode = -EFAULT; | |
6867 | goto Failure2; | |
6868 | } | |
6869 | if (DataTransferLength > 0) | |
6870 | { | |
6871 | if (copy_to_user(UserCommand.DataTransferBuffer, | |
6872 | DataTransferBuffer, DataTransferLength)) { | |
6873 | ErrorCode = -EFAULT; | |
6874 | goto Failure2; | |
6875 | } | |
6876 | } | |
6877 | if (RequestSenseLength > 0) | |
6878 | { | |
6879 | if (copy_to_user(UserCommand.RequestSenseBuffer, | |
6880 | RequestSenseBuffer, RequestSenseLength)) { | |
6881 | ErrorCode = -EFAULT; | |
6882 | goto Failure2; | |
6883 | } | |
6884 | } | |
6885 | ErrorCode = CommandStatus; | |
6886 | Failure2: | |
6887 | pci_free_consistent(Controller->PCIDevice, abs(DataTransferLength), | |
6888 | DataTransferBuffer, DataTransferBufferDMA); | |
6889 | if (RequestSenseBuffer != NULL) | |
6890 | pci_free_consistent(Controller->PCIDevice, RequestSenseLength, | |
6891 | RequestSenseBuffer, RequestSenseBufferDMA); | |
6892 | Failure2a: | |
6893 | return ErrorCode; | |
6894 | } | |
6895 | case DAC960_IOCTL_V2_GET_HEALTH_STATUS: | |
6896 | { | |
6897 | DAC960_V2_GetHealthStatus_T __user *UserSpaceGetHealthStatus = | |
6898 | (DAC960_V2_GetHealthStatus_T __user *) Argument; | |
6899 | DAC960_V2_GetHealthStatus_T GetHealthStatus; | |
6900 | DAC960_V2_HealthStatusBuffer_T HealthStatusBuffer; | |
6901 | DAC960_Controller_T *Controller; | |
6902 | int ControllerNumber; | |
6903 | if (UserSpaceGetHealthStatus == NULL) return -EINVAL; | |
6904 | if (copy_from_user(&GetHealthStatus, UserSpaceGetHealthStatus, | |
6905 | sizeof(DAC960_V2_GetHealthStatus_T))) | |
6906 | return -EFAULT; | |
6907 | ControllerNumber = GetHealthStatus.ControllerNumber; | |
6908 | if (ControllerNumber < 0 || | |
6909 | ControllerNumber > DAC960_ControllerCount - 1) | |
6910 | return -ENXIO; | |
6911 | Controller = DAC960_Controllers[ControllerNumber]; | |
6912 | if (Controller == NULL) return -ENXIO; | |
6913 | if (Controller->FirmwareType != DAC960_V2_Controller) return -EINVAL; | |
6914 | if (copy_from_user(&HealthStatusBuffer, | |
6915 | GetHealthStatus.HealthStatusBuffer, | |
6916 | sizeof(DAC960_V2_HealthStatusBuffer_T))) | |
6917 | return -EFAULT; | |
6918 | while (Controller->V2.HealthStatusBuffer->StatusChangeCounter | |
6919 | == HealthStatusBuffer.StatusChangeCounter && | |
6920 | Controller->V2.HealthStatusBuffer->NextEventSequenceNumber | |
6921 | == HealthStatusBuffer.NextEventSequenceNumber) | |
6922 | { | |
6923 | interruptible_sleep_on_timeout(&Controller->HealthStatusWaitQueue, | |
6924 | DAC960_MonitoringTimerInterval); | |
6925 | if (signal_pending(current)) return -EINTR; | |
6926 | } | |
6927 | if (copy_to_user(GetHealthStatus.HealthStatusBuffer, | |
6928 | Controller->V2.HealthStatusBuffer, | |
6929 | sizeof(DAC960_V2_HealthStatusBuffer_T))) | |
6930 | return -EFAULT; | |
6931 | return 0; | |
6932 | } | |
6933 | } | |
6934 | return -EINVAL; | |
6935 | } | |
6936 | ||
6937 | static struct file_operations DAC960_gam_fops = { | |
6938 | .owner = THIS_MODULE, | |
6939 | .ioctl = DAC960_gam_ioctl | |
6940 | }; | |
6941 | ||
6942 | static struct miscdevice DAC960_gam_dev = { | |
6943 | DAC960_GAM_MINOR, | |
6944 | "dac960_gam", | |
6945 | &DAC960_gam_fops | |
6946 | }; | |
6947 | ||
6948 | static int DAC960_gam_init(void) | |
6949 | { | |
6950 | int ret; | |
6951 | ||
6952 | ret = misc_register(&DAC960_gam_dev); | |
6953 | if (ret) | |
6954 | printk(KERN_ERR "DAC960_gam: can't misc_register on minor %d\n", DAC960_GAM_MINOR); | |
6955 | return ret; | |
6956 | } | |
6957 | ||
6958 | static void DAC960_gam_cleanup(void) | |
6959 | { | |
6960 | misc_deregister(&DAC960_gam_dev); | |
6961 | } | |
6962 | ||
6963 | #endif /* DAC960_GAM_MINOR */ | |
6964 | ||
6965 | static struct DAC960_privdata DAC960_BA_privdata = { | |
6966 | .HardwareType = DAC960_BA_Controller, | |
6967 | .FirmwareType = DAC960_V2_Controller, | |
6968 | .InterruptHandler = DAC960_BA_InterruptHandler, | |
6969 | .MemoryWindowSize = DAC960_BA_RegisterWindowSize, | |
6970 | }; | |
6971 | ||
6972 | static struct DAC960_privdata DAC960_LP_privdata = { | |
6973 | .HardwareType = DAC960_LP_Controller, | |
6974 | .FirmwareType = DAC960_LP_Controller, | |
6975 | .InterruptHandler = DAC960_LP_InterruptHandler, | |
6976 | .MemoryWindowSize = DAC960_LP_RegisterWindowSize, | |
6977 | }; | |
6978 | ||
6979 | static struct DAC960_privdata DAC960_LA_privdata = { | |
6980 | .HardwareType = DAC960_LA_Controller, | |
6981 | .FirmwareType = DAC960_V1_Controller, | |
6982 | .InterruptHandler = DAC960_LA_InterruptHandler, | |
6983 | .MemoryWindowSize = DAC960_LA_RegisterWindowSize, | |
6984 | }; | |
6985 | ||
6986 | static struct DAC960_privdata DAC960_PG_privdata = { | |
6987 | .HardwareType = DAC960_PG_Controller, | |
6988 | .FirmwareType = DAC960_V1_Controller, | |
6989 | .InterruptHandler = DAC960_PG_InterruptHandler, | |
6990 | .MemoryWindowSize = DAC960_PG_RegisterWindowSize, | |
6991 | }; | |
6992 | ||
6993 | static struct DAC960_privdata DAC960_PD_privdata = { | |
6994 | .HardwareType = DAC960_PD_Controller, | |
6995 | .FirmwareType = DAC960_V1_Controller, | |
6996 | .InterruptHandler = DAC960_PD_InterruptHandler, | |
6997 | .MemoryWindowSize = DAC960_PD_RegisterWindowSize, | |
6998 | }; | |
6999 | ||
7000 | static struct DAC960_privdata DAC960_P_privdata = { | |
7001 | .HardwareType = DAC960_P_Controller, | |
7002 | .FirmwareType = DAC960_V1_Controller, | |
7003 | .InterruptHandler = DAC960_P_InterruptHandler, | |
7004 | .MemoryWindowSize = DAC960_PD_RegisterWindowSize, | |
7005 | }; | |
7006 | ||
7007 | static struct pci_device_id DAC960_id_table[] = { | |
7008 | { | |
7009 | .vendor = PCI_VENDOR_ID_MYLEX, | |
7010 | .device = PCI_DEVICE_ID_MYLEX_DAC960_BA, | |
7011 | .subvendor = PCI_ANY_ID, | |
7012 | .subdevice = PCI_ANY_ID, | |
7013 | .driver_data = (unsigned long) &DAC960_BA_privdata, | |
7014 | }, | |
7015 | { | |
7016 | .vendor = PCI_VENDOR_ID_MYLEX, | |
7017 | .device = PCI_DEVICE_ID_MYLEX_DAC960_LP, | |
7018 | .subvendor = PCI_ANY_ID, | |
7019 | .subdevice = PCI_ANY_ID, | |
7020 | .driver_data = (unsigned long) &DAC960_LP_privdata, | |
7021 | }, | |
7022 | { | |
7023 | .vendor = PCI_VENDOR_ID_DEC, | |
7024 | .device = PCI_DEVICE_ID_DEC_21285, | |
7025 | .subvendor = PCI_VENDOR_ID_MYLEX, | |
7026 | .subdevice = PCI_DEVICE_ID_MYLEX_DAC960_LA, | |
7027 | .driver_data = (unsigned long) &DAC960_LA_privdata, | |
7028 | }, | |
7029 | { | |
7030 | .vendor = PCI_VENDOR_ID_MYLEX, | |
7031 | .device = PCI_DEVICE_ID_MYLEX_DAC960_PG, | |
7032 | .subvendor = PCI_ANY_ID, | |
7033 | .subdevice = PCI_ANY_ID, | |
7034 | .driver_data = (unsigned long) &DAC960_PG_privdata, | |
7035 | }, | |
7036 | { | |
7037 | .vendor = PCI_VENDOR_ID_MYLEX, | |
7038 | .device = PCI_DEVICE_ID_MYLEX_DAC960_PD, | |
7039 | .subvendor = PCI_ANY_ID, | |
7040 | .subdevice = PCI_ANY_ID, | |
7041 | .driver_data = (unsigned long) &DAC960_PD_privdata, | |
7042 | }, | |
7043 | { | |
7044 | .vendor = PCI_VENDOR_ID_MYLEX, | |
7045 | .device = PCI_DEVICE_ID_MYLEX_DAC960_P, | |
7046 | .subvendor = PCI_ANY_ID, | |
7047 | .subdevice = PCI_ANY_ID, | |
7048 | .driver_data = (unsigned long) &DAC960_P_privdata, | |
7049 | }, | |
7050 | {0, }, | |
7051 | }; | |
7052 | ||
7053 | MODULE_DEVICE_TABLE(pci, DAC960_id_table); | |
7054 | ||
7055 | static struct pci_driver DAC960_pci_driver = { | |
7056 | .name = "DAC960", | |
7057 | .id_table = DAC960_id_table, | |
7058 | .probe = DAC960_Probe, | |
7059 | .remove = DAC960_Remove, | |
7060 | }; | |
7061 | ||
7062 | static int DAC960_init_module(void) | |
7063 | { | |
7064 | int ret; | |
7065 | ||
7066 | ret = pci_module_init(&DAC960_pci_driver); | |
7067 | #ifdef DAC960_GAM_MINOR | |
7068 | if (!ret) | |
7069 | DAC960_gam_init(); | |
7070 | #endif | |
7071 | return ret; | |
7072 | } | |
7073 | ||
7074 | static void DAC960_cleanup_module(void) | |
7075 | { | |
7076 | int i; | |
7077 | ||
7078 | #ifdef DAC960_GAM_MINOR | |
7079 | DAC960_gam_cleanup(); | |
7080 | #endif | |
7081 | ||
7082 | for (i = 0; i < DAC960_ControllerCount; i++) { | |
7083 | DAC960_Controller_T *Controller = DAC960_Controllers[i]; | |
7084 | if (Controller == NULL) | |
7085 | continue; | |
7086 | DAC960_FinalizeController(Controller); | |
7087 | } | |
7088 | if (DAC960_ProcDirectoryEntry != NULL) { | |
7089 | remove_proc_entry("rd/status", NULL); | |
7090 | remove_proc_entry("rd", NULL); | |
7091 | } | |
7092 | DAC960_ControllerCount = 0; | |
7093 | pci_unregister_driver(&DAC960_pci_driver); | |
7094 | } | |
7095 | ||
7096 | module_init(DAC960_init_module); | |
7097 | module_exit(DAC960_cleanup_module); | |
7098 | ||
7099 | MODULE_LICENSE("GPL"); |