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i40e: amortize wait time when disabling lots of VFs
[mirror_ubuntu-artful-kernel.git] / drivers / block / cciss.c
CommitLineData
1da177e4 1/*
bd4f36d6
MM		 2 * Disk Array driver for HP Smart Array controllers.
3 * (C) Copyright 2000, 2007 Hewlett-Packard Development Company, L.P.
1da177e4
LT		 4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
bd4f36d6 7 * the Free Software Foundation; version 2 of the License.
1da177e4
LT		 8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
bd4f36d6
MM		 11 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. See the GNU
12 * General Public License for more details.
1da177e4
LT		 13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
bd4f36d6
MM		 16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
17 * 02111-1307, USA.
1da177e4
LT		 18 *
19 * Questions/Comments/Bugfixes to iss_storagedev@hp.com
20 *
21 */
22
1da177e4
LT		 23#include <linux/module.h>
24#include <linux/interrupt.h>
25#include <linux/types.h>
26#include <linux/pci.h>
19373358 27#include <linux/pci-aspm.h>
1da177e4
LT		 28#include <linux/kernel.h>
29#include <linux/slab.h>
30#include <linux/delay.h>
31#include <linux/major.h>
32#include <linux/fs.h>
33#include <linux/bio.h>
34#include <linux/blkpg.h>
35#include <linux/timer.h>
36#include <linux/proc_fs.h>
89b6e743 37#include <linux/seq_file.h>
7c832835 38#include <linux/init.h>
4d761609 39#include <linux/jiffies.h>
1da177e4
LT		 40#include <linux/hdreg.h>
41#include <linux/spinlock.h>
42#include <linux/compat.h>
b368c9dd 43#include <linux/mutex.h>
1f118bc4 44#include <linux/bitmap.h>
d48c152a 45#include <linux/io.h>
7c0f6ba6 46#include <linux/uaccess.h>
1da177e4 47
eb0df996 48#include <linux/dma-mapping.h>
1da177e4
LT		 49#include <linux/blkdev.h>
50#include <linux/genhd.h>
51#include <linux/completion.h>
d5d3b736 52#include <scsi/scsi.h>
03bbfee5
MMOD		 53#include <scsi/sg.h>
54#include <scsi/scsi_ioctl.h>
82ed4db4 55#include <scsi/scsi_request.h>
03bbfee5 56#include <linux/cdrom.h>
231bc2a2 57#include <linux/scatterlist.h>
0a9279cc 58#include <linux/kthread.h>
1da177e4
LT		 59
60#define CCISS_DRIVER_VERSION(maj,min,submin) ((maj<<16)|(min<<8)|(submin))
841fdffd
MM		 61#define DRIVER_NAME "HP CISS Driver (v 3.6.26)"
62#define DRIVER_VERSION CCISS_DRIVER_VERSION(3, 6, 26)
1da177e4
LT		 63
64/* Embedded module documentation macros - see modules.h */
65MODULE_AUTHOR("Hewlett-Packard Company");
24aac480 66MODULE_DESCRIPTION("Driver for HP Smart Array Controllers");
841fdffd
MM		 67MODULE_SUPPORTED_DEVICE("HP Smart Array Controllers");
68MODULE_VERSION("3.6.26");
1da177e4 69MODULE_LICENSE("GPL");
8a4ec67b
SC		 70static int cciss_tape_cmds = 6;
71module_param(cciss_tape_cmds, int, 0644);
72MODULE_PARM_DESC(cciss_tape_cmds,
73 "number of commands to allocate for tape devices (default: 6)");
13049537
JH		 74static int cciss_simple_mode;
75module_param(cciss_simple_mode, int, S_IRUGO|S_IWUSR);
76MODULE_PARM_DESC(cciss_simple_mode,
77 "Use 'simple mode' rather than 'performant mode'");
1da177e4 78
e4292e05
MM		 79static int cciss_allow_hpsa;
80module_param(cciss_allow_hpsa, int, S_IRUGO|S_IWUSR);
81MODULE_PARM_DESC(cciss_allow_hpsa,
82 "Prevent cciss driver from accessing hardware known to be "
83 " supported by the hpsa driver");
84
2a48fc0a 85static DEFINE_MUTEX(cciss_mutex);
bbe425cd 86static struct proc_dir_entry *proc_cciss;
2ec24ff1 87
1da177e4
LT		 88#include "cciss_cmd.h"
89#include "cciss.h"
90#include <linux/cciss_ioctl.h>
91
92/* define the PCI info for the cards we can control */
93static const struct pci_device_id cciss_pci_device_id[] = {
f82ccdb9
BH		 94 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISS, 0x0E11, 0x4070},
95 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSB, 0x0E11, 0x4080},
96 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSB, 0x0E11, 0x4082},
97 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSB, 0x0E11, 0x4083},
98 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x4091},
99 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x409A},
100 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x409B},
101 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x409C},
102 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x409D},
103 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSA, 0x103C, 0x3225},
104 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x3223},
105 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x3234},
106 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x3235},
107 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3211},
108 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3212},
109 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3213},
110 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3214},
111 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3215},
de923916 112 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x3237},
9cff3b38 113 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x323D},
1da177e4
LT		 114 {0,}
115};
7c832835 116
1da177e4
LT		 117MODULE_DEVICE_TABLE(pci, cciss_pci_device_id);
118
1da177e4
LT		 119/* board_id = Subsystem Device ID & Vendor ID
120 * product = Marketing Name for the board
7c832835 121 * access = Address of the struct of function pointers
1da177e4
LT		 122 */
123static struct board_type products[] = {
49153998
MM		 124 {0x40700E11, "Smart Array 5300", &SA5_access},
125 {0x40800E11, "Smart Array 5i", &SA5B_access},
126 {0x40820E11, "Smart Array 532", &SA5B_access},
127 {0x40830E11, "Smart Array 5312", &SA5B_access},
128 {0x409A0E11, "Smart Array 641", &SA5_access},
129 {0x409B0E11, "Smart Array 642", &SA5_access},
130 {0x409C0E11, "Smart Array 6400", &SA5_access},
131 {0x409D0E11, "Smart Array 6400 EM", &SA5_access},
132 {0x40910E11, "Smart Array 6i", &SA5_access},
133 {0x3225103C, "Smart Array P600", &SA5_access},
4205df34
SC		 134 {0x3223103C, "Smart Array P800", &SA5_access},
135 {0x3234103C, "Smart Array P400", &SA5_access},
49153998
MM		 136 {0x3235103C, "Smart Array P400i", &SA5_access},
137 {0x3211103C, "Smart Array E200i", &SA5_access},
138 {0x3212103C, "Smart Array E200", &SA5_access},
139 {0x3213103C, "Smart Array E200i", &SA5_access},
140 {0x3214103C, "Smart Array E200i", &SA5_access},
141 {0x3215103C, "Smart Array E200i", &SA5_access},
142 {0x3237103C, "Smart Array E500", &SA5_access},
143 {0x323D103C, "Smart Array P700m", &SA5_access},
1da177e4
LT		 144};
145
d14c4ab5 146/* How long to wait (in milliseconds) for board to go into simple mode */
7c832835 147#define MAX_CONFIG_WAIT 30000
1da177e4
LT		 148#define MAX_IOCTL_CONFIG_WAIT 1000
149
150/*define how many times we will try a command because of bus resets */
151#define MAX_CMD_RETRIES 3
152
1da177e4
LT		 153#define MAX_CTLR 32
154
155/* Originally cciss driver only supports 8 major numbers */
156#define MAX_CTLR_ORIG 8
157
1da177e4
LT		 158static ctlr_info_t *hba[MAX_CTLR];
159
b368c9dd
AP		 160static struct task_struct *cciss_scan_thread;
161static DEFINE_MUTEX(scan_mutex);
162static LIST_HEAD(scan_q);
163
165125e1 164static void do_cciss_request(struct request_queue *q);
0c2b3908
MM		 165static irqreturn_t do_cciss_intx(int irq, void *dev_id);
166static irqreturn_t do_cciss_msix_intr(int irq, void *dev_id);
ef7822c2 167static int cciss_open(struct block_device *bdev, fmode_t mode);
6e9624b8 168static int cciss_unlocked_open(struct block_device *bdev, fmode_t mode);
db2a144b 169static void cciss_release(struct gendisk *disk, fmode_t mode);
ef7822c2 170static int cciss_ioctl(struct block_device *bdev, fmode_t mode,
7c832835 171 unsigned int cmd, unsigned long arg);
a885c8c4 172static int cciss_getgeo(struct block_device *bdev, struct hd_geometry *geo);
1da177e4 173
1da177e4 174static int cciss_revalidate(struct gendisk *disk);
2d11d993 175static int rebuild_lun_table(ctlr_info_t *h, int first_time, int via_ioctl);
a0ea8622 176static int deregister_disk(ctlr_info_t *h, int drv_index,
2d11d993 177 int clear_all, int via_ioctl);
1da177e4 178
f70dba83 179static void cciss_read_capacity(ctlr_info_t *h, int logvol,
00988a35 180 sector_t *total_size, unsigned int *block_size);
f70dba83 181static void cciss_read_capacity_16(ctlr_info_t *h, int logvol,
00988a35 182 sector_t *total_size, unsigned int *block_size);
f70dba83 183static void cciss_geometry_inquiry(ctlr_info_t *h, int logvol,
7b838bde 184 sector_t total_size,
00988a35 185 unsigned int block_size, InquiryData_struct *inq_buff,
7c832835 186 drive_info_struct *drv);
8d85fce7
GKH		 187static void cciss_interrupt_mode(ctlr_info_t *);
188static int cciss_enter_simple_mode(struct ctlr_info *h);
7c832835 189static void start_io(ctlr_info_t *h);
f70dba83 190static int sendcmd_withirq(ctlr_info_t *h, __u8 cmd, void *buff, size_t size,
b57695fe 191 __u8 page_code, unsigned char scsi3addr[],
192 int cmd_type);
85cc61ae 193static int sendcmd_withirq_core(ctlr_info_t *h, CommandList_struct *c,
194 int attempt_retry);
195static int process_sendcmd_error(ctlr_info_t *h, CommandList_struct *c);
1da177e4 196
d6f4965d 197static int add_to_scan_list(struct ctlr_info *h);
0a9279cc
MM		 198static int scan_thread(void *data);
199static int check_for_unit_attention(ctlr_info_t *h, CommandList_struct *c);
617e1344
SC		 200static void cciss_hba_release(struct device *dev);
201static void cciss_device_release(struct device *dev);
361e9b07 202static void cciss_free_gendisk(ctlr_info_t *h, int drv_index);
9cef0d2f 203static void cciss_free_drive_info(ctlr_info_t *h, int drv_index);
29979a71 204static inline u32 next_command(ctlr_info_t *h);
8d85fce7
GKH		 205static int cciss_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr,
206 u32 *cfg_base_addr, u64 *cfg_base_addr_index,
207 u64 *cfg_offset);
208static int cciss_pci_find_memory_BAR(struct pci_dev *pdev,
209 unsigned long *memory_bar);
16011131 210static inline u32 cciss_tag_discard_error_bits(ctlr_info_t *h, u32 tag);
8d85fce7 211static int write_driver_ver_to_cfgtable(CfgTable_struct __iomem *cfgtable);
33079b21 212
5e216153
MM		 213/* performant mode helper functions */
214static void calc_bucket_map(int *bucket, int num_buckets, int nsgs,
215 int *bucket_map);
216static void cciss_put_controller_into_performant_mode(ctlr_info_t *h);
33079b21 217
1da177e4 218#ifdef CONFIG_PROC_FS
f70dba83 219static void cciss_procinit(ctlr_info_t *h);
1da177e4 220#else
f70dba83 221static void cciss_procinit(ctlr_info_t *h)
7c832835
BH		 222{
223}
224#endif /* CONFIG_PROC_FS */
1da177e4
LT		 225
226#ifdef CONFIG_COMPAT
ef7822c2
AV		 227static int cciss_compat_ioctl(struct block_device *, fmode_t,
228 unsigned, unsigned long);
1da177e4
LT		 229#endif
230
83d5cde4 231static const struct block_device_operations cciss_fops = {
7c832835 232 .owner = THIS_MODULE,
6e9624b8 233 .open = cciss_unlocked_open,
ef7822c2 234 .release = cciss_release,
03f47e88 235 .ioctl = cciss_ioctl,
7c832835 236 .getgeo = cciss_getgeo,
1da177e4 237#ifdef CONFIG_COMPAT
ef7822c2 238 .compat_ioctl = cciss_compat_ioctl,
1da177e4 239#endif
7c832835 240 .revalidate_disk = cciss_revalidate,
1da177e4
LT		 241};
242
5e216153
MM		 243/* set_performant_mode: Modify the tag for cciss performant
244 * set bit 0 for pull model, bits 3-1 for block fetch
245 * register number
246 */
247static void set_performant_mode(ctlr_info_t *h, CommandList_struct *c)
248{
0498cc2a 249 if (likely(h->transMethod & CFGTBL_Trans_Performant))
5e216153
MM		 250 c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1);
251}
252
1da177e4
LT		 253/*
254 * Enqueuing and dequeuing functions for cmdlists.
255 */
e6e1ee93 256static inline void addQ(struct list_head *list, CommandList_struct *c)
1da177e4 257{
e6e1ee93 258 list_add_tail(&c->list, list);
1da177e4
LT		 259}
260
8a3173de 261static inline void removeQ(CommandList_struct *c)
1da177e4 262{
b59e64d0
HR		 263 /*
264 * After kexec/dump some commands might still
265 * be in flight, which the firmware will try
266 * to complete. Resetting the firmware doesn't work
267 * with old fw revisions, so we have to mark
268 * them off as 'stale' to prevent the driver from
269 * falling over.
270 */
e6e1ee93 271 if (WARN_ON(list_empty(&c->list))) {
b59e64d0 272 c->cmd_type = CMD_MSG_STALE;
8a3173de 273 return;
b59e64d0 274 }
8a3173de 275
e6e1ee93 276 list_del_init(&c->list);
1da177e4
LT		 277}
278
664a717d
MM		 279static void enqueue_cmd_and_start_io(ctlr_info_t *h,
280 CommandList_struct *c)
281{
282 unsigned long flags;
5e216153 283 set_performant_mode(h, c);
664a717d
MM		 284 spin_lock_irqsave(&h->lock, flags);
285 addQ(&h->reqQ, c);
286 h->Qdepth++;
2a643ec6
SC		 287 if (h->Qdepth > h->maxQsinceinit)
288 h->maxQsinceinit = h->Qdepth;
664a717d
MM		 289 start_io(h);
290 spin_unlock_irqrestore(&h->lock, flags);
291}
292
dccc9b56 293static void cciss_free_sg_chain_blocks(SGDescriptor_struct **cmd_sg_list,
49fc5601
SC		 294 int nr_cmds)
295{
296 int i;
297
298 if (!cmd_sg_list)
299 return;
300 for (i = 0; i < nr_cmds; i++) {
dccc9b56
SC		 301 kfree(cmd_sg_list[i]);
302 cmd_sg_list[i] = NULL;
49fc5601
SC		 303 }
304 kfree(cmd_sg_list);
305}
306
dccc9b56
SC		 307static SGDescriptor_struct **cciss_allocate_sg_chain_blocks(
308 ctlr_info_t *h, int chainsize, int nr_cmds)
49fc5601
SC		 309{
310 int j;
dccc9b56 311 SGDescriptor_struct **cmd_sg_list;
49fc5601
SC		 312
313 if (chainsize <= 0)
314 return NULL;
315
316 cmd_sg_list = kmalloc(sizeof(*cmd_sg_list) * nr_cmds, GFP_KERNEL);
317 if (!cmd_sg_list)
318 return NULL;
319
320 /* Build up chain blocks for each command */
321 for (j = 0; j < nr_cmds; j++) {
49fc5601 322 /* Need a block of chainsized s/g elements. */
dccc9b56
SC		 323 cmd_sg_list[j] = kmalloc((chainsize *
324 sizeof(*cmd_sg_list[j])), GFP_KERNEL);
325 if (!cmd_sg_list[j]) {
49fc5601
SC		 326 dev_err(&h->pdev->dev, "Cannot get memory "
327 "for s/g chains.\n");
328 goto clean;
329 }
330 }
331 return cmd_sg_list;
332clean:
333 cciss_free_sg_chain_blocks(cmd_sg_list, nr_cmds);
334 return NULL;
335}
336
d45033ef
SC		 337static void cciss_unmap_sg_chain_block(ctlr_info_t *h, CommandList_struct *c)
338{
339 SGDescriptor_struct *chain_sg;
340 u64bit temp64;
341
342 if (c->Header.SGTotal <= h->max_cmd_sgentries)
343 return;
344
345 chain_sg = &c->SG[h->max_cmd_sgentries - 1];
346 temp64.val32.lower = chain_sg->Addr.lower;
347 temp64.val32.upper = chain_sg->Addr.upper;
348 pci_unmap_single(h->pdev, temp64.val, chain_sg->Len, PCI_DMA_TODEVICE);
349}
350
ebe73647 351static int cciss_map_sg_chain_block(ctlr_info_t *h, CommandList_struct *c,
d45033ef
SC		 352 SGDescriptor_struct *chain_block, int len)
353{
354 SGDescriptor_struct *chain_sg;
355 u64bit temp64;
356
357 chain_sg = &c->SG[h->max_cmd_sgentries - 1];
358 chain_sg->Ext = CCISS_SG_CHAIN;
359 chain_sg->Len = len;
360 temp64.val = pci_map_single(h->pdev, chain_block, len,
361 PCI_DMA_TODEVICE);
ebe73647
DB		 362 if (dma_mapping_error(&h->pdev->dev, temp64.val)) {
363 dev_warn(&h->pdev->dev,
364 "%s: error mapping chain block for DMA\n",
365 __func__);
366 return -1;
367 }
d45033ef
SC		 368 chain_sg->Addr.lower = temp64.val32.lower;
369 chain_sg->Addr.upper = temp64.val32.upper;
ebe73647
DB		 370
371 return 0;
d45033ef
SC		 372}
373
1da177e4
LT		 374#include "cciss_scsi.c" /* For SCSI tape support */
375
1e6f2dc1
AB		 376static const char *raid_label[] = { "0", "4", "1(1+0)", "5", "5+1", "ADG",
377 "UNKNOWN"
378};
0e4a9d03 379#define RAID_UNKNOWN (ARRAY_SIZE(raid_label)-1)
0f5486ec 380
1da177e4
LT		 381#ifdef CONFIG_PROC_FS
382
383/*
384 * Report information about this controller.
385 */
386#define ENG_GIG 1000000000
387#define ENG_GIG_FACTOR (ENG_GIG/512)
89b6e743 388#define ENGAGE_SCSI "engage scsi"
1da177e4 389
89b6e743 390static void cciss_seq_show_header(struct seq_file *seq)
1da177e4 391{
89b6e743
MM		 392 ctlr_info_t *h = seq->private;
393
394 seq_printf(seq, "%s: HP %s Controller\n"
395 "Board ID: 0x%08lx\n"
396 "Firmware Version: %c%c%c%c\n"
397 "IRQ: %d\n"
398 "Logical drives: %d\n"
399 "Current Q depth: %d\n"
400 "Current # commands on controller: %d\n"
401 "Max Q depth since init: %d\n"
402 "Max # commands on controller since init: %d\n"
403 "Max SG entries since init: %d\n",
404 h->devname,
405 h->product_name,
406 (unsigned long)h->board_id,
407 h->firm_ver[0], h->firm_ver[1], h->firm_ver[2],
13049537 408 h->firm_ver[3], (unsigned int)h->intr[h->intr_mode],
89b6e743
MM		 409 h->num_luns,
410 h->Qdepth, h->commands_outstanding,
411 h->maxQsinceinit, h->max_outstanding, h->maxSG);
412
413#ifdef CONFIG_CISS_SCSI_TAPE
f70dba83 414 cciss_seq_tape_report(seq, h);
89b6e743
MM		 415#endif /* CONFIG_CISS_SCSI_TAPE */
416}
1da177e4 417
89b6e743
MM		 418static void *cciss_seq_start(struct seq_file *seq, loff_t *pos)
419{
420 ctlr_info_t *h = seq->private;
89b6e743 421 unsigned long flags;
1da177e4
LT		 422
423 /* prevent displaying bogus info during configuration
424 * or deconfiguration of a logical volume
425 */
f70dba83 426 spin_lock_irqsave(&h->lock, flags);
1da177e4 427 if (h->busy_configuring) {
f70dba83 428 spin_unlock_irqrestore(&h->lock, flags);
89b6e743 429 return ERR_PTR(-EBUSY);
1da177e4
LT		 430 }
431 h->busy_configuring = 1;
f70dba83 432 spin_unlock_irqrestore(&h->lock, flags);
1da177e4 433
89b6e743
MM		 434 if (*pos == 0)
435 cciss_seq_show_header(seq);
436
437 return pos;
438}
439
440static int cciss_seq_show(struct seq_file *seq, void *v)
441{
442 sector_t vol_sz, vol_sz_frac;
443 ctlr_info_t *h = seq->private;
444 unsigned ctlr = h->ctlr;
445 loff_t *pos = v;
9cef0d2f 446 drive_info_struct *drv = h->drv[*pos];
89b6e743
MM		 447
448 if (*pos > h->highest_lun)
449 return 0;
450
531c2dc7
SC		 451 if (drv == NULL) /* it's possible for h->drv[] to have holes. */
452 return 0;
453
89b6e743
MM		 454 if (drv->heads == 0)
455 return 0;
456
457 vol_sz = drv->nr_blocks;
458 vol_sz_frac = sector_div(vol_sz, ENG_GIG_FACTOR);
459 vol_sz_frac *= 100;
460 sector_div(vol_sz_frac, ENG_GIG_FACTOR);
461
fa52bec9 462 if (drv->raid_level < 0 || drv->raid_level > RAID_UNKNOWN)
89b6e743
MM		 463 drv->raid_level = RAID_UNKNOWN;
464 seq_printf(seq, "cciss/c%dd%d:"
465 "\t%4u.%02uGB\tRAID %s\n",
466 ctlr, (int) *pos, (int)vol_sz, (int)vol_sz_frac,
467 raid_label[drv->raid_level]);
468 return 0;
469}
470
471static void *cciss_seq_next(struct seq_file *seq, void *v, loff_t *pos)
472{
473 ctlr_info_t *h = seq->private;
474
475 if (*pos > h->highest_lun)
476 return NULL;
477 *pos += 1;
478
479 return pos;
480}
481
482static void cciss_seq_stop(struct seq_file *seq, void *v)
483{
484 ctlr_info_t *h = seq->private;
485
486 /* Only reset h->busy_configuring if we succeeded in setting
487 * it during cciss_seq_start. */
488 if (v == ERR_PTR(-EBUSY))
489 return;
7c832835 490
1da177e4 491 h->busy_configuring = 0;
1da177e4
LT		 492}
493
88e9d34c 494static const struct seq_operations cciss_seq_ops = {
89b6e743
MM		 495 .start = cciss_seq_start,
496 .show = cciss_seq_show,
497 .next = cciss_seq_next,
498 .stop = cciss_seq_stop,
499};
500
501static int cciss_seq_open(struct inode *inode, struct file *file)
502{
503 int ret = seq_open(file, &cciss_seq_ops);
504 struct seq_file *seq = file->private_data;
505
506 if (!ret)
d9dda78b 507 seq->private = PDE_DATA(inode);
89b6e743
MM		 508
509 return ret;
510}
511
512static ssize_t
513cciss_proc_write(struct file *file, const char __user *buf,
514 size_t length, loff_t *ppos)
1da177e4 515{
89b6e743
MM		 516 int err;
517 char *buffer;
518
519#ifndef CONFIG_CISS_SCSI_TAPE
520 return -EINVAL;
1da177e4
LT		 521#endif
522
89b6e743 523 if (!buf || length > PAGE_SIZE - 1)
7c832835 524 return -EINVAL;
89b6e743 525
e4e85bb0
AV		 526 buffer = memdup_user_nul(buf, length);
527 if (IS_ERR(buffer))
528 return PTR_ERR(buffer);
89b6e743
MM		 529
530#ifdef CONFIG_CISS_SCSI_TAPE
531 if (strncmp(ENGAGE_SCSI, buffer, sizeof ENGAGE_SCSI - 1) == 0) {
532 struct seq_file *seq = file->private_data;
533 ctlr_info_t *h = seq->private;
89b6e743 534
f70dba83 535 err = cciss_engage_scsi(h);
8721c81f 536 if (err == 0)
89b6e743
MM		 537 err = length;
538 } else
539#endif /* CONFIG_CISS_SCSI_TAPE */
540 err = -EINVAL;
7c832835
BH		 541 /* might be nice to have "disengage" too, but it's not
542 safely possible. (only 1 module use count, lock issues.) */
89b6e743 543
e4e85bb0 544 kfree(buffer);
89b6e743 545 return err;
1da177e4
LT		 546}
547
828c0950 548static const struct file_operations cciss_proc_fops = {
89b6e743
MM		 549 .owner = THIS_MODULE,
550 .open = cciss_seq_open,
551 .read = seq_read,
552 .llseek = seq_lseek,
553 .release = seq_release,
554 .write = cciss_proc_write,
555};
556
8d85fce7 557static void cciss_procinit(ctlr_info_t *h)
1da177e4
LT		 558{
559 struct proc_dir_entry *pde;
560
89b6e743 561 if (proc_cciss == NULL)
928b4d8c 562 proc_cciss = proc_mkdir("driver/cciss", NULL);
89b6e743
MM		 563 if (!proc_cciss)
564 return;
f70dba83 565 pde = proc_create_data(h->devname, S_IWUSR | S_IRUSR | S_IRGRP |
89b6e743 566 S_IROTH, proc_cciss,
f70dba83 567 &cciss_proc_fops, h);
1da177e4 568}
7c832835 569#endif /* CONFIG_PROC_FS */
1da177e4 570
7fe06326
AP		 571#define MAX_PRODUCT_NAME_LEN 19
572
573#define to_hba(n) container_of(n, struct ctlr_info, dev)
574#define to_drv(n) container_of(n, drive_info_struct, dev)
575
ec52d5f1 576/* List of controllers which cannot be hard reset on kexec with reset_devices */
957c2ec5 577static u32 unresettable_controller[] = {
957c2ec5
SC		 578 0x3223103C, /* Smart Array P800 */
579 0x3234103C, /* Smart Array P400 */
580 0x3235103C, /* Smart Array P400i */
581 0x3211103C, /* Smart Array E200i */
582 0x3212103C, /* Smart Array E200 */
583 0x3213103C, /* Smart Array E200i */
584 0x3214103C, /* Smart Array E200i */
585 0x3215103C, /* Smart Array E200i */
586 0x3237103C, /* Smart Array E500 */
587 0x323D103C, /* Smart Array P700m */
b9ea9dcd 588 0x40800E11, /* Smart Array 5i */
957c2ec5
SC		 589 0x409C0E11, /* Smart Array 6400 */
590 0x409D0E11, /* Smart Array 6400 EM */
b9ea9dcd
TH		 591 0x40700E11, /* Smart Array 5300 */
592 0x40820E11, /* Smart Array 532 */
593 0x40830E11, /* Smart Array 5312 */
594 0x409A0E11, /* Smart Array 641 */
595 0x409B0E11, /* Smart Array 642 */
596 0x40910E11, /* Smart Array 6i */
957c2ec5
SC		 597};
598
ec52d5f1
SC		 599/* List of controllers which cannot even be soft reset */
600static u32 soft_unresettable_controller[] = {
b9ea9dcd
TH		 601 0x40800E11, /* Smart Array 5i */
602 0x40700E11, /* Smart Array 5300 */
603 0x40820E11, /* Smart Array 532 */
604 0x40830E11, /* Smart Array 5312 */
605 0x409A0E11, /* Smart Array 641 */
606 0x409B0E11, /* Smart Array 642 */
607 0x40910E11, /* Smart Array 6i */
608 /* Exclude 640x boards. These are two pci devices in one slot
609 * which share a battery backed cache module. One controls the
610 * cache, the other accesses the cache through the one that controls
611 * it. If we reset the one controlling the cache, the other will
612 * likely not be happy. Just forbid resetting this conjoined mess.
613 */
ec52d5f1
SC		 614 0x409C0E11, /* Smart Array 6400 */
615 0x409D0E11, /* Smart Array 6400 EM */
616};
617
618static int ctlr_is_hard_resettable(u32 board_id)
957c2ec5
SC		 619{
620 int i;
621
622 for (i = 0; i < ARRAY_SIZE(unresettable_controller); i++)
ec52d5f1 623 if (unresettable_controller[i] == board_id)
957c2ec5
SC		 624 return 0;
625 return 1;
626}
627
ec52d5f1
SC		 628static int ctlr_is_soft_resettable(u32 board_id)
629{
630 int i;
631
632 for (i = 0; i < ARRAY_SIZE(soft_unresettable_controller); i++)
633 if (soft_unresettable_controller[i] == board_id)
634 return 0;
635 return 1;
636}
637
638static int ctlr_is_resettable(u32 board_id)
639{
640 return ctlr_is_hard_resettable(board_id) ||
641 ctlr_is_soft_resettable(board_id);
642}
643
957c2ec5
SC		 644static ssize_t host_show_resettable(struct device *dev,
645 struct device_attribute *attr,
646 char *buf)
647{
648 struct ctlr_info *h = to_hba(dev);
649
ec52d5f1 650 return snprintf(buf, 20, "%d\n", ctlr_is_resettable(h->board_id));
957c2ec5
SC		 651}
652static DEVICE_ATTR(resettable, S_IRUGO, host_show_resettable, NULL);
653
d6f4965d
AP		 654static ssize_t host_store_rescan(struct device *dev,
655 struct device_attribute *attr,
656 const char *buf, size_t count)
657{
658 struct ctlr_info *h = to_hba(dev);
659
660 add_to_scan_list(h);
661 wake_up_process(cciss_scan_thread);
662 wait_for_completion_interruptible(&h->scan_wait);
663
664 return count;
665}
8ba95c69 666static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan);
7fe06326 667
f963d270
JH		 668static ssize_t host_show_transport_mode(struct device *dev,
669 struct device_attribute *attr,
670 char *buf)
671{
672 struct ctlr_info *h = to_hba(dev);
673
674 return snprintf(buf, 20, "%s\n",
675 h->transMethod & CFGTBL_Trans_Performant ?
676 "performant" : "simple");
677}
678static DEVICE_ATTR(transport_mode, S_IRUGO, host_show_transport_mode, NULL);
679
7fe06326
AP		 680static ssize_t dev_show_unique_id(struct device *dev,
681 struct device_attribute *attr,
682 char *buf)
683{
684 drive_info_struct *drv = to_drv(dev);
685 struct ctlr_info *h = to_hba(drv->dev.parent);
686 __u8 sn[16];
687 unsigned long flags;
688 int ret = 0;
689
f70dba83 690 spin_lock_irqsave(&h->lock, flags);
7fe06326
AP		 691 if (h->busy_configuring)
692 ret = -EBUSY;
693 else
694 memcpy(sn, drv->serial_no, sizeof(sn));
f70dba83 695 spin_unlock_irqrestore(&h->lock, flags);
7fe06326
AP		 696
697 if (ret)
698 return ret;
699 else
700 return snprintf(buf, 16 * 2 + 2,
701 "%02X%02X%02X%02X%02X%02X%02X%02X"
702 "%02X%02X%02X%02X%02X%02X%02X%02X\n",
703 sn[0], sn[1], sn[2], sn[3],
704 sn[4], sn[5], sn[6], sn[7],
705 sn[8], sn[9], sn[10], sn[11],
706 sn[12], sn[13], sn[14], sn[15]);
707}
8ba95c69 708static DEVICE_ATTR(unique_id, S_IRUGO, dev_show_unique_id, NULL);
7fe06326
AP		 709
710static ssize_t dev_show_vendor(struct device *dev,
711 struct device_attribute *attr,
712 char *buf)
713{
714 drive_info_struct *drv = to_drv(dev);
715 struct ctlr_info *h = to_hba(drv->dev.parent);
716 char vendor[VENDOR_LEN + 1];
717 unsigned long flags;
718 int ret = 0;
719
f70dba83 720 spin_lock_irqsave(&h->lock, flags);
7fe06326
AP		 721 if (h->busy_configuring)
722 ret = -EBUSY;
723 else
724 memcpy(vendor, drv->vendor, VENDOR_LEN + 1);
f70dba83 725 spin_unlock_irqrestore(&h->lock, flags);
7fe06326
AP		 726
727 if (ret)
728 return ret;
729 else
730 return snprintf(buf, sizeof(vendor) + 1, "%s\n", drv->vendor);
731}
8ba95c69 732static DEVICE_ATTR(vendor, S_IRUGO, dev_show_vendor, NULL);
7fe06326
AP		 733
734static ssize_t dev_show_model(struct device *dev,
735 struct device_attribute *attr,
736 char *buf)
737{
738 drive_info_struct *drv = to_drv(dev);
739 struct ctlr_info *h = to_hba(drv->dev.parent);
740 char model[MODEL_LEN + 1];
741 unsigned long flags;
742 int ret = 0;
743
f70dba83 744 spin_lock_irqsave(&h->lock, flags);
7fe06326
AP		 745 if (h->busy_configuring)
746 ret = -EBUSY;
747 else
748 memcpy(model, drv->model, MODEL_LEN + 1);
f70dba83 749 spin_unlock_irqrestore(&h->lock, flags);
7fe06326
AP		 750
751 if (ret)
752 return ret;
753 else
754 return snprintf(buf, sizeof(model) + 1, "%s\n", drv->model);
755}
8ba95c69 756static DEVICE_ATTR(model, S_IRUGO, dev_show_model, NULL);
7fe06326
AP		 757
758static ssize_t dev_show_rev(struct device *dev,
759 struct device_attribute *attr,
760 char *buf)
761{
762 drive_info_struct *drv = to_drv(dev);
763 struct ctlr_info *h = to_hba(drv->dev.parent);
764 char rev[REV_LEN + 1];
765 unsigned long flags;
766 int ret = 0;
767
f70dba83 768 spin_lock_irqsave(&h->lock, flags);
7fe06326
AP		 769 if (h->busy_configuring)
770 ret = -EBUSY;
771 else
772 memcpy(rev, drv->rev, REV_LEN + 1);
f70dba83 773 spin_unlock_irqrestore(&h->lock, flags);
7fe06326
AP		 774
775 if (ret)
776 return ret;
777 else
778 return snprintf(buf, sizeof(rev) + 1, "%s\n", drv->rev);
779}
8ba95c69 780static DEVICE_ATTR(rev, S_IRUGO, dev_show_rev, NULL);
7fe06326 781
ce84a8ae
SC		 782static ssize_t cciss_show_lunid(struct device *dev,
783 struct device_attribute *attr, char *buf)
784{
9cef0d2f
SC		 785 drive_info_struct *drv = to_drv(dev);
786 struct ctlr_info *h = to_hba(drv->dev.parent);
ce84a8ae
SC		 787 unsigned long flags;
788 unsigned char lunid[8];
789
f70dba83 790 spin_lock_irqsave(&h->lock, flags);
ce84a8ae 791 if (h->busy_configuring) {
f70dba83 792 spin_unlock_irqrestore(&h->lock, flags);
ce84a8ae
SC		 793 return -EBUSY;
794 }
795 if (!drv->heads) {
f70dba83 796 spin_unlock_irqrestore(&h->lock, flags);
ce84a8ae
SC		 797 return -ENOTTY;
798 }
799 memcpy(lunid, drv->LunID, sizeof(lunid));
f70dba83 800 spin_unlock_irqrestore(&h->lock, flags);
ce84a8ae
SC		 801 return snprintf(buf, 20, "0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
802 lunid[0], lunid[1], lunid[2], lunid[3],
803 lunid[4], lunid[5], lunid[6], lunid[7]);
804}
8ba95c69 805static DEVICE_ATTR(lunid, S_IRUGO, cciss_show_lunid, NULL);
ce84a8ae 806
3ff1111d
SC		 807static ssize_t cciss_show_raid_level(struct device *dev,
808 struct device_attribute *attr, char *buf)
809{
9cef0d2f
SC		 810 drive_info_struct *drv = to_drv(dev);
811 struct ctlr_info *h = to_hba(drv->dev.parent);
3ff1111d
SC		 812 int raid;
813 unsigned long flags;
814
f70dba83 815 spin_lock_irqsave(&h->lock, flags);
3ff1111d 816 if (h->busy_configuring) {
f70dba83 817 spin_unlock_irqrestore(&h->lock, flags);
3ff1111d
SC		 818 return -EBUSY;
819 }
820 raid = drv->raid_level;
f70dba83 821 spin_unlock_irqrestore(&h->lock, flags);
3ff1111d
SC		 822 if (raid < 0 || raid > RAID_UNKNOWN)
823 raid = RAID_UNKNOWN;
824
825 return snprintf(buf, strlen(raid_label[raid]) + 7, "RAID %s\n",
826 raid_label[raid]);
827}
8ba95c69 828static DEVICE_ATTR(raid_level, S_IRUGO, cciss_show_raid_level, NULL);
3ff1111d 829
e272afec
SC		 830static ssize_t cciss_show_usage_count(struct device *dev,
831 struct device_attribute *attr, char *buf)
832{
9cef0d2f
SC		 833 drive_info_struct *drv = to_drv(dev);
834 struct ctlr_info *h = to_hba(drv->dev.parent);
e272afec
SC		 835 unsigned long flags;
836 int count;
837
f70dba83 838 spin_lock_irqsave(&h->lock, flags);
e272afec 839 if (h->busy_configuring) {
f70dba83 840 spin_unlock_irqrestore(&h->lock, flags);
e272afec
SC		 841 return -EBUSY;
842 }
843 count = drv->usage_count;
f70dba83 844 spin_unlock_irqrestore(&h->lock, flags);
e272afec
SC		 845 return snprintf(buf, 20, "%d\n", count);
846}
8ba95c69 847static DEVICE_ATTR(usage_count, S_IRUGO, cciss_show_usage_count, NULL);
e272afec 848
d6f4965d
AP		 849static struct attribute *cciss_host_attrs[] = {
850 &dev_attr_rescan.attr,
957c2ec5 851 &dev_attr_resettable.attr,
f963d270 852 &dev_attr_transport_mode.attr,
d6f4965d
AP		 853 NULL
854};
855
856static struct attribute_group cciss_host_attr_group = {
857 .attrs = cciss_host_attrs,
858};
859
9f792d9f 860static const struct attribute_group *cciss_host_attr_groups[] = {
d6f4965d
AP		 861 &cciss_host_attr_group,
862 NULL
863};
864
865static struct device_type cciss_host_type = {
866 .name = "cciss_host",
867 .groups = cciss_host_attr_groups,
617e1344 868 .release = cciss_hba_release,
d6f4965d
AP		 869};
870
7fe06326
AP		 871static struct attribute *cciss_dev_attrs[] = {
872 &dev_attr_unique_id.attr,
873 &dev_attr_model.attr,
874 &dev_attr_vendor.attr,
875 &dev_attr_rev.attr,
ce84a8ae 876 &dev_attr_lunid.attr,
3ff1111d 877 &dev_attr_raid_level.attr,
e272afec 878 &dev_attr_usage_count.attr,
7fe06326
AP		 879 NULL
880};
881
882static struct attribute_group cciss_dev_attr_group = {
883 .attrs = cciss_dev_attrs,
884};
885
a4dbd674 886static const struct attribute_group *cciss_dev_attr_groups[] = {
7fe06326
AP		 887 &cciss_dev_attr_group,
888 NULL
889};
890
891static struct device_type cciss_dev_type = {
892 .name = "cciss_device",
893 .groups = cciss_dev_attr_groups,
617e1344 894 .release = cciss_device_release,
7fe06326
AP		 895};
896
897static struct bus_type cciss_bus_type = {
898 .name = "cciss",
899};
900
617e1344
SC		 901/*
902 * cciss_hba_release is called when the reference count
903 * of h->dev goes to zero.
904 */
905static void cciss_hba_release(struct device *dev)
906{
907 /*
908 * nothing to do, but need this to avoid a warning
909 * about not having a release handler from lib/kref.c.
910 */
911}
7fe06326
AP		 912
913/*
914 * Initialize sysfs entry for each controller. This sets up and registers
915 * the 'cciss#' directory for each individual controller under
916 * /sys/bus/pci/devices/<dev>/.
917 */
918static int cciss_create_hba_sysfs_entry(struct ctlr_info *h)
919{
920 device_initialize(&h->dev);
921 h->dev.type = &cciss_host_type;
922 h->dev.bus = &cciss_bus_type;
923 dev_set_name(&h->dev, "%s", h->devname);
924 h->dev.parent = &h->pdev->dev;
925
926 return device_add(&h->dev);
927}
928
929/*
930 * Remove sysfs entries for an hba.
931 */
932static void cciss_destroy_hba_sysfs_entry(struct ctlr_info *h)
933{
934 device_del(&h->dev);
617e1344
SC		 935 put_device(&h->dev); /* final put. */
936}
937
938/* cciss_device_release is called when the reference count
9cef0d2f 939 * of h->drv[x]dev goes to zero.
617e1344
SC		 940 */
941static void cciss_device_release(struct device *dev)
942{
9cef0d2f
SC		 943 drive_info_struct *drv = to_drv(dev);
944 kfree(drv);
7fe06326
AP		 945}
946
947/*
948 * Initialize sysfs for each logical drive. This sets up and registers
949 * the 'c#d#' directory for each individual logical drive under
950 * /sys/bus/pci/devices/<dev/ccis#/. We also create a link from
951 * /sys/block/cciss!c#d# to this entry.
952 */
617e1344 953static long cciss_create_ld_sysfs_entry(struct ctlr_info *h,
7fe06326
AP		 954 int drv_index)
955{
617e1344
SC		 956 struct device *dev;
957
9cef0d2f 958 if (h->drv[drv_index]->device_initialized)
8ce51966
SC		 959 return 0;
960
9cef0d2f 961 dev = &h->drv[drv_index]->dev;
617e1344
SC		 962 device_initialize(dev);
963 dev->type = &cciss_dev_type;
964 dev->bus = &cciss_bus_type;
965 dev_set_name(dev, "c%dd%d", h->ctlr, drv_index);
966 dev->parent = &h->dev;
9cef0d2f 967 h->drv[drv_index]->device_initialized = 1;
617e1344 968 return device_add(dev);
7fe06326
AP		 969}
970
971/*
972 * Remove sysfs entries for a logical drive.
973 */
8ce51966
SC		 974static void cciss_destroy_ld_sysfs_entry(struct ctlr_info *h, int drv_index,
975 int ctlr_exiting)
7fe06326 976{
9cef0d2f 977 struct device *dev = &h->drv[drv_index]->dev;
8ce51966
SC		 978
979 /* special case for c*d0, we only destroy it on controller exit */
980 if (drv_index == 0 && !ctlr_exiting)
981 return;
982
617e1344
SC		 983 device_del(dev);
984 put_device(dev); /* the "final" put. */
9cef0d2f 985 h->drv[drv_index] = NULL;
7fe06326
AP		 986}
987
7c832835
BH		 988/*
989 * For operations that cannot sleep, a command block is allocated at init,
1da177e4 990 * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track
6b4d96b8 991 * which ones are free or in use.
7c832835 992 */
6b4d96b8 993static CommandList_struct *cmd_alloc(ctlr_info_t *h)
1da177e4
LT		 994{
995 CommandList_struct *c;
7c832835 996 int i;
1da177e4
LT		 997 u64bit temp64;
998 dma_addr_t cmd_dma_handle, err_dma_handle;
999
6b4d96b8
SC		 1000 do {
1001 i = find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds);
1002 if (i == h->nr_cmds)
7c832835 1003 return NULL;
1f118bc4 1004 } while (test_and_set_bit(i, h->cmd_pool_bits) != 0);
6b4d96b8
SC		 1005 c = h->cmd_pool + i;
1006 memset(c, 0, sizeof(CommandList_struct));
1007 cmd_dma_handle = h->cmd_pool_dhandle + i * sizeof(CommandList_struct);
1008 c->err_info = h->errinfo_pool + i;
1009 memset(c->err_info, 0, sizeof(ErrorInfo_struct));
1010 err_dma_handle = h->errinfo_pool_dhandle
1011 + i * sizeof(ErrorInfo_struct);
1012 h->nr_allocs++;
1da177e4 1013
6b4d96b8 1014 c->cmdindex = i;
33079b21 1015
e6e1ee93 1016 INIT_LIST_HEAD(&c->list);
6b4d96b8
SC		 1017 c->busaddr = (__u32) cmd_dma_handle;
1018 temp64.val = (__u64) err_dma_handle;
1019 c->ErrDesc.Addr.lower = temp64.val32.lower;
1020 c->ErrDesc.Addr.upper = temp64.val32.upper;
1021 c->ErrDesc.Len = sizeof(ErrorInfo_struct);
7c832835 1022
6b4d96b8
SC		 1023 c->ctlr = h->ctlr;
1024 return c;
1025}
33079b21 1026
6b4d96b8
SC		 1027/* allocate a command using pci_alloc_consistent, used for ioctls,
1028 * etc., not for the main i/o path.
1029 */
1030static CommandList_struct *cmd_special_alloc(ctlr_info_t *h)
1031{
1032 CommandList_struct *c;
1033 u64bit temp64;
1034 dma_addr_t cmd_dma_handle, err_dma_handle;
1035
a5bbf616
JP		 1036 c = pci_zalloc_consistent(h->pdev, sizeof(CommandList_struct),
1037 &cmd_dma_handle);
6b4d96b8
SC		 1038 if (c == NULL)
1039 return NULL;
6b4d96b8
SC		 1040
1041 c->cmdindex = -1;
1042
a5bbf616
JP		 1043 c->err_info = pci_zalloc_consistent(h->pdev, sizeof(ErrorInfo_struct),
1044 &err_dma_handle);
6b4d96b8
SC		 1045
1046 if (c->err_info == NULL) {
1047 pci_free_consistent(h->pdev,
1048 sizeof(CommandList_struct), c, cmd_dma_handle);
1049 return NULL;
7c832835 1050 }
1da177e4 1051
e6e1ee93 1052 INIT_LIST_HEAD(&c->list);
1da177e4 1053 c->busaddr = (__u32) cmd_dma_handle;
7c832835 1054 temp64.val = (__u64) err_dma_handle;
1da177e4
LT		 1055 c->ErrDesc.Addr.lower = temp64.val32.lower;
1056 c->ErrDesc.Addr.upper = temp64.val32.upper;
1057 c->ErrDesc.Len = sizeof(ErrorInfo_struct);
1da177e4 1058
7c832835
BH		 1059 c->ctlr = h->ctlr;
1060 return c;
1da177e4
LT		 1061}
1062
6b4d96b8 1063static void cmd_free(ctlr_info_t *h, CommandList_struct *c)
1da177e4
LT		 1064{
1065 int i;
6b4d96b8
SC		 1066
1067 i = c - h->cmd_pool;
1f118bc4 1068 clear_bit(i, h->cmd_pool_bits);
6b4d96b8
SC		 1069 h->nr_frees++;
1070}
1071
1072static void cmd_special_free(ctlr_info_t *h, CommandList_struct *c)
1073{
1da177e4
LT		 1074 u64bit temp64;
1075
6b4d96b8
SC		 1076 temp64.val32.lower = c->ErrDesc.Addr.lower;
1077 temp64.val32.upper = c->ErrDesc.Addr.upper;
1078 pci_free_consistent(h->pdev, sizeof(ErrorInfo_struct),
1079 c->err_info, (dma_addr_t) temp64.val);
16011131
SC		 1080 pci_free_consistent(h->pdev, sizeof(CommandList_struct), c,
1081 (dma_addr_t) cciss_tag_discard_error_bits(h, (u32) c->busaddr));
1da177e4
LT		 1082}
1083
1084static inline ctlr_info_t *get_host(struct gendisk *disk)
1085{
7c832835 1086 return disk->queue->queuedata;
1da177e4
LT		 1087}
1088
1089static inline drive_info_struct *get_drv(struct gendisk *disk)
1090{
1091 return disk->private_data;
1092}
1093
1094/*
1095 * Open. Make sure the device is really there.
1096 */
ef7822c2 1097static int cciss_open(struct block_device *bdev, fmode_t mode)
1da177e4 1098{
f70dba83 1099 ctlr_info_t *h = get_host(bdev->bd_disk);
ef7822c2 1100 drive_info_struct *drv = get_drv(bdev->bd_disk);
1da177e4 1101
b2a4a43d 1102 dev_dbg(&h->pdev->dev, "cciss_open %s\n", bdev->bd_disk->disk_name);
2e043986 1103 if (drv->busy_configuring)
ddd47442 1104 return -EBUSY;
1da177e4
LT		 1105 /*
1106 * Root is allowed to open raw volume zero even if it's not configured
1107 * so array config can still work. Root is also allowed to open any
1108 * volume that has a LUN ID, so it can issue IOCTL to reread the
1109 * disk information. I don't think I really like this
1110 * but I'm already using way to many device nodes to claim another one
1111 * for "raw controller".
1112 */
7a06f789 1113 if (drv->heads == 0) {
ef7822c2 1114 if (MINOR(bdev->bd_dev) != 0) { /* not node 0? */
1da177e4 1115 /* if not node 0 make sure it is a partition = 0 */
ef7822c2 1116 if (MINOR(bdev->bd_dev) & 0x0f) {
7c832835 1117 return -ENXIO;
1da177e4 1118 /* if it is, make sure we have a LUN ID */
39ccf9a6
SC		 1119 } else if (memcmp(drv->LunID, CTLR_LUNID,
1120 sizeof(drv->LunID))) {
1da177e4
LT		 1121 return -ENXIO;
1122 }
1123 }
1124 if (!capable(CAP_SYS_ADMIN))
1125 return -EPERM;
1126 }
1127 drv->usage_count++;
f70dba83 1128 h->usage_count++;
1da177e4
LT		 1129 return 0;
1130}
7c832835 1131
6e9624b8
AB		 1132static int cciss_unlocked_open(struct block_device *bdev, fmode_t mode)
1133{
1134 int ret;
1135
2a48fc0a 1136 mutex_lock(&cciss_mutex);
6e9624b8 1137 ret = cciss_open(bdev, mode);
2a48fc0a 1138 mutex_unlock(&cciss_mutex);
6e9624b8
AB		 1139
1140 return ret;
1141}
1142
1da177e4
LT		 1143/*
1144 * Close. Sync first.
1145 */
db2a144b 1146static void cciss_release(struct gendisk *disk, fmode_t mode)
1da177e4 1147{
f70dba83 1148 ctlr_info_t *h;
6e9624b8 1149 drive_info_struct *drv;
1da177e4 1150
2a48fc0a 1151 mutex_lock(&cciss_mutex);
f70dba83 1152 h = get_host(disk);
6e9624b8 1153 drv = get_drv(disk);
b2a4a43d 1154 dev_dbg(&h->pdev->dev, "cciss_release %s\n", disk->disk_name);
1da177e4 1155 drv->usage_count--;
f70dba83 1156 h->usage_count--;
2a48fc0a 1157 mutex_unlock(&cciss_mutex);
1da177e4
LT		 1158}
1159
8a6cfeb6
AB		 1160#ifdef CONFIG_COMPAT
1161
ef7822c2
AV		 1162static int cciss_ioctl32_passthru(struct block_device *bdev, fmode_t mode,
1163 unsigned cmd, unsigned long arg);
1164static int cciss_ioctl32_big_passthru(struct block_device *bdev, fmode_t mode,
1165 unsigned cmd, unsigned long arg);
1da177e4 1166
ef7822c2
AV		 1167static int cciss_compat_ioctl(struct block_device *bdev, fmode_t mode,
1168 unsigned cmd, unsigned long arg)
1da177e4
LT		 1169{
1170 switch (cmd) {
1171 case CCISS_GETPCIINFO:
1172 case CCISS_GETINTINFO:
1173 case CCISS_SETINTINFO:
1174 case CCISS_GETNODENAME:
1175 case CCISS_SETNODENAME:
1176 case CCISS_GETHEARTBEAT:
1177 case CCISS_GETBUSTYPES:
1178 case CCISS_GETFIRMVER:
1179 case CCISS_GETDRIVVER:
1180 case CCISS_REVALIDVOLS:
1181 case CCISS_DEREGDISK:
1182 case CCISS_REGNEWDISK:
1183 case CCISS_REGNEWD:
1184 case CCISS_RESCANDISK:
1185 case CCISS_GETLUNINFO:
03f47e88 1186 return cciss_ioctl(bdev, mode, cmd, arg);
1da177e4
LT		 1187
1188 case CCISS_PASSTHRU32:
ef7822c2 1189 return cciss_ioctl32_passthru(bdev, mode, cmd, arg);
1da177e4 1190 case CCISS_BIG_PASSTHRU32:
ef7822c2 1191 return cciss_ioctl32_big_passthru(bdev, mode, cmd, arg);
1da177e4
LT		 1192
1193 default:
1194 return -ENOIOCTLCMD;
1195 }
1196}
1197
ef7822c2
AV		 1198static int cciss_ioctl32_passthru(struct block_device *bdev, fmode_t mode,
1199 unsigned cmd, unsigned long arg)
1da177e4
LT		 1200{
1201 IOCTL32_Command_struct __user *arg32 =
7c832835 1202 (IOCTL32_Command_struct __user *) arg;
1da177e4
LT		 1203 IOCTL_Command_struct arg64;
1204 IOCTL_Command_struct __user *p = compat_alloc_user_space(sizeof(arg64));
1205 int err;
1206 u32 cp;
1207
58f09e00 1208 memset(&arg64, 0, sizeof(arg64));
1da177e4 1209 err = 0;
7c832835
BH		 1210 err |=
1211 copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
1212 sizeof(arg64.LUN_info));
1213 err |=
1214 copy_from_user(&arg64.Request, &arg32->Request,
1215 sizeof(arg64.Request));
1216 err |=
1217 copy_from_user(&arg64.error_info, &arg32->error_info,
1218 sizeof(arg64.error_info));
1da177e4
LT		 1219 err |= get_user(arg64.buf_size, &arg32->buf_size);
1220 err |= get_user(cp, &arg32->buf);
1221 arg64.buf = compat_ptr(cp);
1222 err |= copy_to_user(p, &arg64, sizeof(arg64));
1223
1224 if (err)
1225 return -EFAULT;
1226
03f47e88 1227 err = cciss_ioctl(bdev, mode, CCISS_PASSTHRU, (unsigned long)p);
1da177e4
LT		 1228 if (err)
1229 return err;
7c832835
BH		 1230 err |=
1231 copy_in_user(&arg32->error_info, &p->error_info,
1232 sizeof(arg32->error_info));
1da177e4
LT		 1233 if (err)
1234 return -EFAULT;
1235 return err;
1236}
1237
ef7822c2
AV		 1238static int cciss_ioctl32_big_passthru(struct block_device *bdev, fmode_t mode,
1239 unsigned cmd, unsigned long arg)
1da177e4
LT		 1240{
1241 BIG_IOCTL32_Command_struct __user *arg32 =
7c832835 1242 (BIG_IOCTL32_Command_struct __user *) arg;
1da177e4 1243 BIG_IOCTL_Command_struct arg64;
7c832835
BH		 1244 BIG_IOCTL_Command_struct __user *p =
1245 compat_alloc_user_space(sizeof(arg64));
1da177e4
LT		 1246 int err;
1247 u32 cp;
1248
7ab5118d 1249 memset(&arg64, 0, sizeof(arg64));
1da177e4 1250 err = 0;
7c832835
BH		 1251 err |=
1252 copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
1253 sizeof(arg64.LUN_info));
1254 err |=
1255 copy_from_user(&arg64.Request, &arg32->Request,
1256 sizeof(arg64.Request));
1257 err |=
1258 copy_from_user(&arg64.error_info, &arg32->error_info,
1259 sizeof(arg64.error_info));
1da177e4
LT		 1260 err |= get_user(arg64.buf_size, &arg32->buf_size);
1261 err |= get_user(arg64.malloc_size, &arg32->malloc_size);
1262 err |= get_user(cp, &arg32->buf);
1263 arg64.buf = compat_ptr(cp);
1264 err |= copy_to_user(p, &arg64, sizeof(arg64));
1265
1266 if (err)
7c832835 1267 return -EFAULT;
1da177e4 1268
03f47e88 1269 err = cciss_ioctl(bdev, mode, CCISS_BIG_PASSTHRU, (unsigned long)p);
1da177e4
LT		 1270 if (err)
1271 return err;
7c832835
BH		 1272 err |=
1273 copy_in_user(&arg32->error_info, &p->error_info,
1274 sizeof(arg32->error_info));
1da177e4
LT		 1275 if (err)
1276 return -EFAULT;
1277 return err;
1278}
1279#endif
a885c8c4
CH		 1280
1281static int cciss_getgeo(struct block_device *bdev, struct hd_geometry *geo)
1282{
1283 drive_info_struct *drv = get_drv(bdev->bd_disk);
1284
1285 if (!drv->cylinders)
1286 return -ENXIO;
1287
1288 geo->heads = drv->heads;
1289 geo->sectors = drv->sectors;
1290 geo->cylinders = drv->cylinders;
1291 return 0;
1292}
1293
f70dba83 1294static void check_ioctl_unit_attention(ctlr_info_t *h, CommandList_struct *c)
0a9279cc
MM		 1295{
1296 if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
1297 c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION)
f70dba83 1298 (void)check_for_unit_attention(h, c);
0a9279cc 1299}
0a25a5ae
SC		 1300
1301static int cciss_getpciinfo(ctlr_info_t *h, void __user *argp)
1da177e4 1302{
0a25a5ae 1303 cciss_pci_info_struct pciinfo;
1da177e4 1304
0a25a5ae
SC		 1305 if (!argp)
1306 return -EINVAL;
1307 pciinfo.domain = pci_domain_nr(h->pdev->bus);
1308 pciinfo.bus = h->pdev->bus->number;
1309 pciinfo.dev_fn = h->pdev->devfn;
1310 pciinfo.board_id = h->board_id;
1311 if (copy_to_user(argp, &pciinfo, sizeof(cciss_pci_info_struct)))
1312 return -EFAULT;
1313 return 0;
1314}
1da177e4 1315
576e661c
SC		 1316static int cciss_getintinfo(ctlr_info_t *h, void __user *argp)
1317{
1318 cciss_coalint_struct intinfo;
03f47e88 1319 unsigned long flags;
1da177e4 1320
576e661c
SC		 1321 if (!argp)
1322 return -EINVAL;
03f47e88 1323 spin_lock_irqsave(&h->lock, flags);
576e661c
SC		 1324 intinfo.delay = readl(&h->cfgtable->HostWrite.CoalIntDelay);
1325 intinfo.count = readl(&h->cfgtable->HostWrite.CoalIntCount);
03f47e88 1326 spin_unlock_irqrestore(&h->lock, flags);
576e661c
SC		 1327 if (copy_to_user
1328 (argp, &intinfo, sizeof(cciss_coalint_struct)))
1329 return -EFAULT;
1330 return 0;
1331}
1da177e4 1332
4c800eed
SC		 1333static int cciss_setintinfo(ctlr_info_t *h, void __user *argp)
1334{
1335 cciss_coalint_struct intinfo;
1336 unsigned long flags;
1337 int i;
1da177e4 1338
4c800eed
SC		 1339 if (!argp)
1340 return -EINVAL;
1341 if (!capable(CAP_SYS_ADMIN))
1342 return -EPERM;
1343 if (copy_from_user(&intinfo, argp, sizeof(intinfo)))
1344 return -EFAULT;
1345 if ((intinfo.delay == 0) && (intinfo.count == 0))
1346 return -EINVAL;
1347 spin_lock_irqsave(&h->lock, flags);
1348 /* Update the field, and then ring the doorbell */
1349 writel(intinfo.delay, &(h->cfgtable->HostWrite.CoalIntDelay));
1350 writel(intinfo.count, &(h->cfgtable->HostWrite.CoalIntCount));
1351 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
1352
1353 for (i = 0; i < MAX_IOCTL_CONFIG_WAIT; i++) {
1354 if (!(readl(h->vaddr + SA5_DOORBELL) & CFGTBL_ChangeReq))
1355 break;
1356 udelay(1000); /* delay and try again */
1357 }
1358 spin_unlock_irqrestore(&h->lock, flags);
1359 if (i >= MAX_IOCTL_CONFIG_WAIT)
1360 return -EAGAIN;
1361 return 0;
1362}
1da177e4 1363
25216109
SC		 1364static int cciss_getnodename(ctlr_info_t *h, void __user *argp)
1365{
1366 NodeName_type NodeName;
03f47e88 1367 unsigned long flags;
25216109 1368 int i;
1da177e4 1369
25216109
SC		 1370 if (!argp)
1371 return -EINVAL;
03f47e88 1372 spin_lock_irqsave(&h->lock, flags);
25216109
SC		 1373 for (i = 0; i < 16; i++)
1374 NodeName[i] = readb(&h->cfgtable->ServerName[i]);
03f47e88 1375 spin_unlock_irqrestore(&h->lock, flags);
25216109
SC		 1376 if (copy_to_user(argp, NodeName, sizeof(NodeName_type)))
1377 return -EFAULT;
1378 return 0;
1379}
7c832835 1380
4f43f32c
SC		 1381static int cciss_setnodename(ctlr_info_t *h, void __user *argp)
1382{
1383 NodeName_type NodeName;
1384 unsigned long flags;
1385 int i;
7c832835 1386
4f43f32c
SC		 1387 if (!argp)
1388 return -EINVAL;
1389 if (!capable(CAP_SYS_ADMIN))
1390 return -EPERM;
1391 if (copy_from_user(NodeName, argp, sizeof(NodeName_type)))
1392 return -EFAULT;
1393 spin_lock_irqsave(&h->lock, flags);
1394 /* Update the field, and then ring the doorbell */
1395 for (i = 0; i < 16; i++)
1396 writeb(NodeName[i], &h->cfgtable->ServerName[i]);
1397 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
1398 for (i = 0; i < MAX_IOCTL_CONFIG_WAIT; i++) {
1399 if (!(readl(h->vaddr + SA5_DOORBELL) & CFGTBL_ChangeReq))
1400 break;
1401 udelay(1000); /* delay and try again */
1402 }
1403 spin_unlock_irqrestore(&h->lock, flags);
1404 if (i >= MAX_IOCTL_CONFIG_WAIT)
1405 return -EAGAIN;
1406 return 0;
1407}
7c832835 1408
93c74931
SC		 1409static int cciss_getheartbeat(ctlr_info_t *h, void __user *argp)
1410{
1411 Heartbeat_type heartbeat;
03f47e88 1412 unsigned long flags;
7c832835 1413
93c74931
SC		 1414 if (!argp)
1415 return -EINVAL;
03f47e88 1416 spin_lock_irqsave(&h->lock, flags);
93c74931 1417 heartbeat = readl(&h->cfgtable->HeartBeat);
03f47e88 1418 spin_unlock_irqrestore(&h->lock, flags);
93c74931
SC		 1419 if (copy_to_user(argp, &heartbeat, sizeof(Heartbeat_type)))
1420 return -EFAULT;
1421 return 0;
1422}
0a9279cc 1423
d18dfad4
SC		 1424static int cciss_getbustypes(ctlr_info_t *h, void __user *argp)
1425{
1426 BusTypes_type BusTypes;
03f47e88 1427 unsigned long flags;
7c832835 1428
d18dfad4
SC		 1429 if (!argp)
1430 return -EINVAL;
03f47e88 1431 spin_lock_irqsave(&h->lock, flags);
d18dfad4 1432 BusTypes = readl(&h->cfgtable->BusTypes);
03f47e88 1433 spin_unlock_irqrestore(&h->lock, flags);
d18dfad4
SC		 1434 if (copy_to_user(argp, &BusTypes, sizeof(BusTypes_type)))
1435 return -EFAULT;
1436 return 0;
1437}
1438
8a4f7fbf
SC		 1439static int cciss_getfirmver(ctlr_info_t *h, void __user *argp)
1440{
1441 FirmwareVer_type firmware;
1442
1443 if (!argp)
1444 return -EINVAL;
1445 memcpy(firmware, h->firm_ver, 4);
1446
1447 if (copy_to_user
1448 (argp, firmware, sizeof(FirmwareVer_type)))
1449 return -EFAULT;
1450 return 0;
1451}
1452
c525919d
SC		 1453static int cciss_getdrivver(ctlr_info_t *h, void __user *argp)
1454{
1455 DriverVer_type DriverVer = DRIVER_VERSION;
1456
1457 if (!argp)
1458 return -EINVAL;
1459 if (copy_to_user(argp, &DriverVer, sizeof(DriverVer_type)))
1460 return -EFAULT;
1461 return 0;
1462}
1463
0894b32c
SC		 1464static int cciss_getluninfo(ctlr_info_t *h,
1465 struct gendisk *disk, void __user *argp)
1466{
1467 LogvolInfo_struct luninfo;
1468 drive_info_struct *drv = get_drv(disk);
1469
1470 if (!argp)
1471 return -EINVAL;
1472 memcpy(&luninfo.LunID, drv->LunID, sizeof(luninfo.LunID));
1473 luninfo.num_opens = drv->usage_count;
1474 luninfo.num_parts = 0;
1475 if (copy_to_user(argp, &luninfo, sizeof(LogvolInfo_struct)))
1476 return -EFAULT;
1477 return 0;
1478}
1479
f32f125b
SC		 1480static int cciss_passthru(ctlr_info_t *h, void __user *argp)
1481{
1482 IOCTL_Command_struct iocommand;
1483 CommandList_struct *c;
1484 char *buff = NULL;
1485 u64bit temp64;
1486 DECLARE_COMPLETION_ONSTACK(wait);
1487
1488 if (!argp)
1489 return -EINVAL;
1490
1491 if (!capable(CAP_SYS_RAWIO))
1492 return -EPERM;
1493
1494 if (copy_from_user
1495 (&iocommand, argp, sizeof(IOCTL_Command_struct)))
1496 return -EFAULT;
1497 if ((iocommand.buf_size < 1) &&
1498 (iocommand.Request.Type.Direction != XFER_NONE)) {
1499 return -EINVAL;
1500 }
1501 if (iocommand.buf_size > 0) {
1502 buff = kmalloc(iocommand.buf_size, GFP_KERNEL);
1503 if (buff == NULL)
1504 return -EFAULT;
1505 }
1506 if (iocommand.Request.Type.Direction == XFER_WRITE) {
1507 /* Copy the data into the buffer we created */
1508 if (copy_from_user(buff, iocommand.buf, iocommand.buf_size)) {
1509 kfree(buff);
1510 return -EFAULT;
1511 }
1512 } else {
1513 memset(buff, 0, iocommand.buf_size);
1514 }
1515 c = cmd_special_alloc(h);
1516 if (!c) {
1517 kfree(buff);
1518 return -ENOMEM;
1519 }
1520 /* Fill in the command type */
1521 c->cmd_type = CMD_IOCTL_PEND;
1522 /* Fill in Command Header */
1523 c->Header.ReplyQueue = 0; /* unused in simple mode */
1524 if (iocommand.buf_size > 0) { /* buffer to fill */
1525 c->Header.SGList = 1;
1526 c->Header.SGTotal = 1;
1527 } else { /* no buffers to fill */
1528 c->Header.SGList = 0;
1529 c->Header.SGTotal = 0;
1530 }
1531 c->Header.LUN = iocommand.LUN_info;
1532 /* use the kernel address the cmd block for tag */
1533 c->Header.Tag.lower = c->busaddr;
1534
1535 /* Fill in Request block */
1536 c->Request = iocommand.Request;
1537
1538 /* Fill in the scatter gather information */
1539 if (iocommand.buf_size > 0) {
1540 temp64.val = pci_map_single(h->pdev, buff,
1541 iocommand.buf_size, PCI_DMA_BIDIRECTIONAL);
1542 c->SG[0].Addr.lower = temp64.val32.lower;
1543 c->SG[0].Addr.upper = temp64.val32.upper;
1544 c->SG[0].Len = iocommand.buf_size;
1545 c->SG[0].Ext = 0; /* we are not chaining */
1546 }
1547 c->waiting = &wait;
1548
1549 enqueue_cmd_and_start_io(h, c);
1550 wait_for_completion(&wait);
1551
1552 /* unlock the buffers from DMA */
1553 temp64.val32.lower = c->SG[0].Addr.lower;
1554 temp64.val32.upper = c->SG[0].Addr.upper;
1555 pci_unmap_single(h->pdev, (dma_addr_t) temp64.val, iocommand.buf_size,
1556 PCI_DMA_BIDIRECTIONAL);
1557 check_ioctl_unit_attention(h, c);
1558
1559 /* Copy the error information out */
1560 iocommand.error_info = *(c->err_info);
1561 if (copy_to_user(argp, &iocommand, sizeof(IOCTL_Command_struct))) {
1562 kfree(buff);
1563 cmd_special_free(h, c);
1564 return -EFAULT;
1565 }
1566
1567 if (iocommand.Request.Type.Direction == XFER_READ) {
1568 /* Copy the data out of the buffer we created */
1569 if (copy_to_user(iocommand.buf, buff, iocommand.buf_size)) {
7c832835 1570 kfree(buff);
6b4d96b8 1571 cmd_special_free(h, c);
f32f125b 1572 return -EFAULT;
1da177e4 1573 }
f32f125b
SC		 1574 }
1575 kfree(buff);
1576 cmd_special_free(h, c);
1577 return 0;
1578}
1579
0c9f5ba7
SC		 1580static int cciss_bigpassthru(ctlr_info_t *h, void __user *argp)
1581{
1582 BIG_IOCTL_Command_struct *ioc;
1583 CommandList_struct *c;
1584 unsigned char **buff = NULL;
1585 int *buff_size = NULL;
1586 u64bit temp64;
1587 BYTE sg_used = 0;
1588 int status = 0;
1589 int i;
1590 DECLARE_COMPLETION_ONSTACK(wait);
1591 __u32 left;
1592 __u32 sz;
1593 BYTE __user *data_ptr;
1594
1595 if (!argp)
1596 return -EINVAL;
1597 if (!capable(CAP_SYS_RAWIO))
1598 return -EPERM;
fcab1c11 1599 ioc = kmalloc(sizeof(*ioc), GFP_KERNEL);
0c9f5ba7
SC		 1600 if (!ioc) {
1601 status = -ENOMEM;
1602 goto cleanup1;
1603 }
1604 if (copy_from_user(ioc, argp, sizeof(*ioc))) {
1605 status = -EFAULT;
1606 goto cleanup1;
1607 }
1608 if ((ioc->buf_size < 1) &&
1609 (ioc->Request.Type.Direction != XFER_NONE)) {
1610 status = -EINVAL;
1611 goto cleanup1;
1612 }
1613 /* Check kmalloc limits using all SGs */
1614 if (ioc->malloc_size > MAX_KMALLOC_SIZE) {
1615 status = -EINVAL;
1616 goto cleanup1;
1617 }
1618 if (ioc->buf_size > ioc->malloc_size * MAXSGENTRIES) {
1619 status = -EINVAL;
1620 goto cleanup1;
1621 }
1622 buff = kzalloc(MAXSGENTRIES * sizeof(char *), GFP_KERNEL);
1623 if (!buff) {
1624 status = -ENOMEM;
1625 goto cleanup1;
1626 }
1627 buff_size = kmalloc(MAXSGENTRIES * sizeof(int), GFP_KERNEL);
1628 if (!buff_size) {
1629 status = -ENOMEM;
1630 goto cleanup1;
1631 }
1632 left = ioc->buf_size;
1633 data_ptr = ioc->buf;
1634 while (left) {
1635 sz = (left > ioc->malloc_size) ? ioc->malloc_size : left;
1636 buff_size[sg_used] = sz;
1637 buff[sg_used] = kmalloc(sz, GFP_KERNEL);
1638 if (buff[sg_used] == NULL) {
1639 status = -ENOMEM;
1640 goto cleanup1;
1641 }
1642 if (ioc->Request.Type.Direction == XFER_WRITE) {
1643 if (copy_from_user(buff[sg_used], data_ptr, sz)) {
7c832835
BH		 1644 status = -EFAULT;
1645 goto cleanup1;
1646 }
0c9f5ba7
SC		 1647 } else {
1648 memset(buff[sg_used], 0, sz);
1649 }
1650 left -= sz;
1651 data_ptr += sz;
1652 sg_used++;
1653 }
1654 c = cmd_special_alloc(h);
1655 if (!c) {
1656 status = -ENOMEM;
1657 goto cleanup1;
1658 }
1659 c->cmd_type = CMD_IOCTL_PEND;
1660 c->Header.ReplyQueue = 0;
fcfb5c0c
SC		 1661 c->Header.SGList = sg_used;
1662 c->Header.SGTotal = sg_used;
0c9f5ba7
SC		 1663 c->Header.LUN = ioc->LUN_info;
1664 c->Header.Tag.lower = c->busaddr;
1665
1666 c->Request = ioc->Request;
fcfb5c0c
SC		 1667 for (i = 0; i < sg_used; i++) {
1668 temp64.val = pci_map_single(h->pdev, buff[i], buff_size[i],
0c9f5ba7 1669 PCI_DMA_BIDIRECTIONAL);
fcfb5c0c
SC		 1670 c->SG[i].Addr.lower = temp64.val32.lower;
1671 c->SG[i].Addr.upper = temp64.val32.upper;
1672 c->SG[i].Len = buff_size[i];
1673 c->SG[i].Ext = 0; /* we are not chaining */
0c9f5ba7
SC		 1674 }
1675 c->waiting = &wait;
1676 enqueue_cmd_and_start_io(h, c);
1677 wait_for_completion(&wait);
1678 /* unlock the buffers from DMA */
1679 for (i = 0; i < sg_used; i++) {
1680 temp64.val32.lower = c->SG[i].Addr.lower;
1681 temp64.val32.upper = c->SG[i].Addr.upper;
1682 pci_unmap_single(h->pdev,
1683 (dma_addr_t) temp64.val, buff_size[i],
1684 PCI_DMA_BIDIRECTIONAL);
1685 }
1686 check_ioctl_unit_attention(h, c);
1687 /* Copy the error information out */
1688 ioc->error_info = *(c->err_info);
1689 if (copy_to_user(argp, ioc, sizeof(*ioc))) {
1690 cmd_special_free(h, c);
1691 status = -EFAULT;
1692 goto cleanup1;
1693 }
1694 if (ioc->Request.Type.Direction == XFER_READ) {
1695 /* Copy the data out of the buffer we created */
1696 BYTE __user *ptr = ioc->buf;
1697 for (i = 0; i < sg_used; i++) {
1698 if (copy_to_user(ptr, buff[i], buff_size[i])) {
6b4d96b8 1699 cmd_special_free(h, c);
7c832835
BH		 1700 status = -EFAULT;
1701 goto cleanup1;
1702 }
0c9f5ba7 1703 ptr += buff_size[i];
1da177e4 1704 }
0c9f5ba7
SC		 1705 }
1706 cmd_special_free(h, c);
1707 status = 0;
1708cleanup1:
1709 if (buff) {
1710 for (i = 0; i < sg_used; i++)
1711 kfree(buff[i]);
1712 kfree(buff);
1713 }
1714 kfree(buff_size);
1715 kfree(ioc);
1716 return status;
1717}
1718
ef7822c2 1719static int cciss_ioctl(struct block_device *bdev, fmode_t mode,
c525919d 1720 unsigned int cmd, unsigned long arg)
1da177e4 1721{
1da177e4 1722 struct gendisk *disk = bdev->bd_disk;
f70dba83 1723 ctlr_info_t *h = get_host(disk);
1da177e4
LT		 1724 void __user *argp = (void __user *)arg;
1725
b2a4a43d
SC		 1726 dev_dbg(&h->pdev->dev, "cciss_ioctl: Called with cmd=%x %lx\n",
1727 cmd, arg);
7c832835 1728 switch (cmd) {
1da177e4 1729 case CCISS_GETPCIINFO:
0a25a5ae 1730 return cciss_getpciinfo(h, argp);
1da177e4 1731 case CCISS_GETINTINFO:
576e661c 1732 return cciss_getintinfo(h, argp);
1da177e4 1733 case CCISS_SETINTINFO:
4c800eed 1734 return cciss_setintinfo(h, argp);
1da177e4 1735 case CCISS_GETNODENAME:
25216109 1736 return cciss_getnodename(h, argp);
1da177e4 1737 case CCISS_SETNODENAME:
4f43f32c 1738 return cciss_setnodename(h, argp);
1da177e4 1739 case CCISS_GETHEARTBEAT:
93c74931 1740 return cciss_getheartbeat(h, argp);
1da177e4 1741 case CCISS_GETBUSTYPES:
d18dfad4 1742 return cciss_getbustypes(h, argp);
1da177e4 1743 case CCISS_GETFIRMVER:
8a4f7fbf 1744 return cciss_getfirmver(h, argp);
7c832835 1745 case CCISS_GETDRIVVER:
c525919d 1746 return cciss_getdrivver(h, argp);
6ae5ce8e
MM		 1747 case CCISS_DEREGDISK:
1748 case CCISS_REGNEWD:
1da177e4 1749 case CCISS_REVALIDVOLS:
f70dba83 1750 return rebuild_lun_table(h, 0, 1);
0894b32c
SC		 1751 case CCISS_GETLUNINFO:
1752 return cciss_getluninfo(h, disk, argp);
1da177e4 1753 case CCISS_PASSTHRU:
f32f125b 1754 return cciss_passthru(h, argp);
0c9f5ba7
SC		 1755 case CCISS_BIG_PASSTHRU:
1756 return cciss_bigpassthru(h, argp);
03bbfee5 1757
577ebb37 1758 /* scsi_cmd_blk_ioctl handles these, below, though some are not */
03bbfee5
MMOD		 1759 /* very meaningful for cciss. SG_IO is the main one people want. */
1760
1761 case SG_GET_VERSION_NUM:
1762 case SG_SET_TIMEOUT:
1763 case SG_GET_TIMEOUT:
1764 case SG_GET_RESERVED_SIZE:
1765 case SG_SET_RESERVED_SIZE:
1766 case SG_EMULATED_HOST:
1767 case SG_IO:
1768 case SCSI_IOCTL_SEND_COMMAND:
577ebb37 1769 return scsi_cmd_blk_ioctl(bdev, mode, cmd, argp);
03bbfee5 1770
577ebb37 1771 /* scsi_cmd_blk_ioctl would normally handle these, below, but */
03bbfee5
MMOD		 1772 /* they aren't a good fit for cciss, as CD-ROMs are */
1773 /* not supported, and we don't have any bus/target/lun */
1774 /* which we present to the kernel. */
1775
1776 case CDROM_SEND_PACKET:
1777 case CDROMCLOSETRAY:
1778 case CDROMEJECT:
1779 case SCSI_IOCTL_GET_IDLUN:
1780 case SCSI_IOCTL_GET_BUS_NUMBER:
1da177e4
LT		 1781 default:
1782 return -ENOTTY;
1783 }
1da177e4
LT		 1784}
1785
7b30f092
JA		 1786static void cciss_check_queues(ctlr_info_t *h)
1787{
1788 int start_queue = h->next_to_run;
1789 int i;
1790
1791 /* check to see if we have maxed out the number of commands that can
1792 * be placed on the queue. If so then exit. We do this check here
1793 * in case the interrupt we serviced was from an ioctl and did not
1794 * free any new commands.
1795 */
f880632f 1796 if ((find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds)) == h->nr_cmds)
7b30f092
JA		 1797 return;
1798
1799 /* We have room on the queue for more commands. Now we need to queue
1800 * them up. We will also keep track of the next queue to run so
1801 * that every queue gets a chance to be started first.
1802 */
1803 for (i = 0; i < h->highest_lun + 1; i++) {
1804 int curr_queue = (start_queue + i) % (h->highest_lun + 1);
1805 /* make sure the disk has been added and the drive is real
1806 * because this can be called from the middle of init_one.
1807 */
9cef0d2f
SC		 1808 if (!h->drv[curr_queue])
1809 continue;
1810 if (!(h->drv[curr_queue]->queue) ||
1811 !(h->drv[curr_queue]->heads))
7b30f092
JA		 1812 continue;
1813 blk_start_queue(h->gendisk[curr_queue]->queue);
1814
1815 /* check to see if we have maxed out the number of commands
1816 * that can be placed on the queue.
1817 */
f880632f 1818 if ((find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds)) == h->nr_cmds) {
7b30f092
JA		 1819 if (curr_queue == start_queue) {
1820 h->next_to_run =
1821 (start_queue + 1) % (h->highest_lun + 1);
1822 break;
1823 } else {
1824 h->next_to_run = curr_queue;
1825 break;
1826 }
7b30f092
JA		 1827 }
1828 }
1829}
1830
ca1e0484
MM		 1831static void cciss_softirq_done(struct request *rq)
1832{
f70dba83
SC		 1833 CommandList_struct *c = rq->completion_data;
1834 ctlr_info_t *h = hba[c->ctlr];
1835 SGDescriptor_struct *curr_sg = c->SG;
ca1e0484 1836 u64bit temp64;
664a717d 1837 unsigned long flags;
ca1e0484 1838 int i, ddir;
5c07a311 1839 int sg_index = 0;
ca1e0484 1840
f70dba83 1841 if (c->Request.Type.Direction == XFER_READ)
ca1e0484
MM		 1842 ddir = PCI_DMA_FROMDEVICE;
1843 else
1844 ddir = PCI_DMA_TODEVICE;
1845
1846 /* command did not need to be retried */
1847 /* unmap the DMA mapping for all the scatter gather elements */
f70dba83 1848 for (i = 0; i < c->Header.SGList; i++) {
5c07a311 1849 if (curr_sg[sg_index].Ext == CCISS_SG_CHAIN) {
f70dba83 1850 cciss_unmap_sg_chain_block(h, c);
5c07a311 1851 /* Point to the next block */
f70dba83 1852 curr_sg = h->cmd_sg_list[c->cmdindex];
5c07a311
DB		 1853 sg_index = 0;
1854 }
1855 temp64.val32.lower = curr_sg[sg_index].Addr.lower;
1856 temp64.val32.upper = curr_sg[sg_index].Addr.upper;
1857 pci_unmap_page(h->pdev, temp64.val, curr_sg[sg_index].Len,
1858 ddir);
1859 ++sg_index;
ca1e0484
MM		 1860 }
1861
b2a4a43d 1862 dev_dbg(&h->pdev->dev, "Done with %p\n", rq);
ca1e0484 1863
c3a4d78c 1864 /* set the residual count for pc requests */
57292b58 1865 if (blk_rq_is_passthrough(rq))
82ed4db4 1866 scsi_req(rq)->resid_len = c->err_info->ResidualCnt;
ac44e5b2 1867
c3a4d78c 1868 blk_end_request_all(rq, (rq->errors == 0) ? 0 : -EIO);
3daeea29 1869
ca1e0484 1870 spin_lock_irqsave(&h->lock, flags);
6b4d96b8 1871 cmd_free(h, c);
7b30f092 1872 cciss_check_queues(h);
ca1e0484
MM		 1873 spin_unlock_irqrestore(&h->lock, flags);
1874}
1875
39ccf9a6
SC		 1876static inline void log_unit_to_scsi3addr(ctlr_info_t *h,
1877 unsigned char scsi3addr[], uint32_t log_unit)
b57695fe 1878{
9cef0d2f
SC		 1879 memcpy(scsi3addr, h->drv[log_unit]->LunID,
1880 sizeof(h->drv[log_unit]->LunID));
b57695fe 1881}
1882
7fe06326
AP		 1883/* This function gets the SCSI vendor, model, and revision of a logical drive
1884 * via the inquiry page 0. Model, vendor, and rev are set to empty strings if
1885 * they cannot be read.
1886 */
f70dba83 1887static void cciss_get_device_descr(ctlr_info_t *h, int logvol,
7fe06326
AP		 1888 char *vendor, char *model, char *rev)
1889{
1890 int rc;
1891 InquiryData_struct *inq_buf;
b57695fe 1892 unsigned char scsi3addr[8];
7fe06326
AP		 1893
1894 *vendor = '\0';
1895 *model = '\0';
1896 *rev = '\0';
1897
1898 inq_buf = kzalloc(sizeof(InquiryData_struct), GFP_KERNEL);
1899 if (!inq_buf)
1900 return;
1901
f70dba83
SC		 1902 log_unit_to_scsi3addr(h, scsi3addr, logvol);
1903 rc = sendcmd_withirq(h, CISS_INQUIRY, inq_buf, sizeof(*inq_buf), 0,
7b838bde 1904 scsi3addr, TYPE_CMD);
7fe06326
AP		 1905 if (rc == IO_OK) {
1906 memcpy(vendor, &inq_buf->data_byte[8], VENDOR_LEN);
1907 vendor[VENDOR_LEN] = '\0';
1908 memcpy(model, &inq_buf->data_byte[16], MODEL_LEN);
1909 model[MODEL_LEN] = '\0';
1910 memcpy(rev, &inq_buf->data_byte[32], REV_LEN);
1911 rev[REV_LEN] = '\0';
1912 }
1913
1914 kfree(inq_buf);
1915 return;
1916}
1917
a72da29b
MM		 1918/* This function gets the serial number of a logical drive via
1919 * inquiry page 0x83. Serial no. is 16 bytes. If the serial
1920 * number cannot be had, for whatever reason, 16 bytes of 0xff
1921 * are returned instead.
1922 */
f70dba83 1923static void cciss_get_serial_no(ctlr_info_t *h, int logvol,
a72da29b
MM		 1924 unsigned char *serial_no, int buflen)
1925{
1926#define PAGE_83_INQ_BYTES 64
1927 int rc;
1928 unsigned char *buf;
b57695fe 1929 unsigned char scsi3addr[8];
a72da29b
MM		 1930
1931 if (buflen > 16)
1932 buflen = 16;
1933 memset(serial_no, 0xff, buflen);
1934 buf = kzalloc(PAGE_83_INQ_BYTES, GFP_KERNEL);
1935 if (!buf)
1936 return;
1937 memset(serial_no, 0, buflen);
f70dba83
SC		 1938 log_unit_to_scsi3addr(h, scsi3addr, logvol);
1939 rc = sendcmd_withirq(h, CISS_INQUIRY, buf,
7b838bde 1940 PAGE_83_INQ_BYTES, 0x83, scsi3addr, TYPE_CMD);
a72da29b
MM		 1941 if (rc == IO_OK)
1942 memcpy(serial_no, &buf[8], buflen);
1943 kfree(buf);
1944 return;
1945}
1946
617e1344
SC		 1947/*
1948 * cciss_add_disk sets up the block device queue for a logical drive
1949 */
1950static int cciss_add_disk(ctlr_info_t *h, struct gendisk *disk,
6ae5ce8e
MM		 1951 int drv_index)
1952{
82ed4db4 1953 disk->queue = blk_alloc_queue(GFP_KERNEL);
e8074f79
SC		 1954 if (!disk->queue)
1955 goto init_queue_failure;
82ed4db4
CH		 1956
1957 disk->queue->cmd_size = sizeof(struct scsi_request);
1958 disk->queue->request_fn = do_cciss_request;
1959 disk->queue->queue_lock = &h->lock;
1960 if (blk_init_allocated_queue(disk->queue) < 0)
1961 goto cleanup_queue;
1962
6ae5ce8e
MM		 1963 sprintf(disk->disk_name, "cciss/c%dd%d", h->ctlr, drv_index);
1964 disk->major = h->major;
1965 disk->first_minor = drv_index << NWD_SHIFT;
1966 disk->fops = &cciss_fops;
9cef0d2f
SC		 1967 if (cciss_create_ld_sysfs_entry(h, drv_index))
1968 goto cleanup_queue;
1969 disk->private_data = h->drv[drv_index];
6ae5ce8e
MM		 1970
1971 /* Set up queue information */
1972 blk_queue_bounce_limit(disk->queue, h->pdev->dma_mask);
1973
1974 /* This is a hardware imposed limit. */
8a78362c 1975 blk_queue_max_segments(disk->queue, h->maxsgentries);
6ae5ce8e 1976
086fa5ff 1977 blk_queue_max_hw_sectors(disk->queue, h->cciss_max_sectors);
6ae5ce8e
MM		 1978
1979 blk_queue_softirq_done(disk->queue, cciss_softirq_done);
1980
1981 disk->queue->queuedata = h;
1982
e1defc4f 1983 blk_queue_logical_block_size(disk->queue,
9cef0d2f 1984 h->drv[drv_index]->block_size);
6ae5ce8e
MM		 1985
1986 /* Make sure all queue data is written out before */
9cef0d2f 1987 /* setting h->drv[drv_index]->queue, as setting this */
6ae5ce8e
MM		 1988 /* allows the interrupt handler to start the queue */
1989 wmb();
9cef0d2f 1990 h->drv[drv_index]->queue = disk->queue;
0d52c756 1991 device_add_disk(&h->drv[drv_index]->dev, disk);
617e1344
SC		 1992 return 0;
1993
1994cleanup_queue:
1995 blk_cleanup_queue(disk->queue);
1996 disk->queue = NULL;
e8074f79 1997init_queue_failure:
617e1344 1998 return -1;
6ae5ce8e
MM		 1999}
2000
ddd47442 2001/* This function will check the usage_count of the drive to be updated/added.
a72da29b
MM		 2002 * If the usage_count is zero and it is a heretofore unknown drive, or,
2003 * the drive's capacity, geometry, or serial number has changed,
2004 * then the drive information will be updated and the disk will be
2005 * re-registered with the kernel. If these conditions don't hold,
2006 * then it will be left alone for the next reboot. The exception to this
2007 * is disk 0 which will always be left registered with the kernel since it
2008 * is also the controller node. Any changes to disk 0 will show up on
2009 * the next reboot.
7c832835 2010 */
f70dba83
SC		 2011static void cciss_update_drive_info(ctlr_info_t *h, int drv_index,
2012 int first_time, int via_ioctl)
7c832835 2013{
ddd47442 2014 struct gendisk *disk;
ddd47442
MM		 2015 InquiryData_struct *inq_buff = NULL;
2016 unsigned int block_size;
00988a35 2017 sector_t total_size;
ddd47442
MM		 2018 unsigned long flags = 0;
2019 int ret = 0;
a72da29b
MM		 2020 drive_info_struct *drvinfo;
2021
2022 /* Get information about the disk and modify the driver structure */
2023 inq_buff = kmalloc(sizeof(InquiryData_struct), GFP_KERNEL);
9cef0d2f 2024 drvinfo = kzalloc(sizeof(*drvinfo), GFP_KERNEL);
a72da29b
MM		 2025 if (inq_buff == NULL || drvinfo == NULL)
2026 goto mem_msg;
2027
2028 /* testing to see if 16-byte CDBs are already being used */
2029 if (h->cciss_read == CCISS_READ_16) {
f70dba83 2030 cciss_read_capacity_16(h, drv_index,
a72da29b
MM		 2031 &total_size, &block_size);
2032
2033 } else {
f70dba83 2034 cciss_read_capacity(h, drv_index, &total_size, &block_size);
a72da29b
MM		 2035 /* if read_capacity returns all F's this volume is >2TB */
2036 /* in size so we switch to 16-byte CDB's for all */
2037 /* read/write ops */
2038 if (total_size == 0xFFFFFFFFULL) {
f70dba83 2039 cciss_read_capacity_16(h, drv_index,
a72da29b
MM		 2040 &total_size, &block_size);
2041 h->cciss_read = CCISS_READ_16;
2042 h->cciss_write = CCISS_WRITE_16;
2043 } else {
2044 h->cciss_read = CCISS_READ_10;
2045 h->cciss_write = CCISS_WRITE_10;
2046 }
2047 }
2048
f70dba83 2049 cciss_geometry_inquiry(h, drv_index, total_size, block_size,
a72da29b
MM		 2050 inq_buff, drvinfo);
2051 drvinfo->block_size = block_size;
2052 drvinfo->nr_blocks = total_size + 1;
2053
f70dba83 2054 cciss_get_device_descr(h, drv_index, drvinfo->vendor,
7fe06326 2055 drvinfo->model, drvinfo->rev);
f70dba83 2056 cciss_get_serial_no(h, drv_index, drvinfo->serial_no,
a72da29b 2057 sizeof(drvinfo->serial_no));
9cef0d2f
SC		 2058 /* Save the lunid in case we deregister the disk, below. */
2059 memcpy(drvinfo->LunID, h->drv[drv_index]->LunID,
2060 sizeof(drvinfo->LunID));
a72da29b
MM		 2061
2062 /* Is it the same disk we already know, and nothing's changed? */
9cef0d2f 2063 if (h->drv[drv_index]->raid_level != -1 &&
a72da29b 2064 ((memcmp(drvinfo->serial_no,
9cef0d2f
SC		 2065 h->drv[drv_index]->serial_no, 16) == 0) &&
2066 drvinfo->block_size == h->drv[drv_index]->block_size &&
2067 drvinfo->nr_blocks == h->drv[drv_index]->nr_blocks &&
2068 drvinfo->heads == h->drv[drv_index]->heads &&
2069 drvinfo->sectors == h->drv[drv_index]->sectors &&
2070 drvinfo->cylinders == h->drv[drv_index]->cylinders))
a72da29b
MM		 2071 /* The disk is unchanged, nothing to update */
2072 goto freeret;
a72da29b 2073
6ae5ce8e
MM		 2074 /* If we get here it's not the same disk, or something's changed,
2075 * so we need to * deregister it, and re-register it, if it's not
2076 * in use.
2077 * If the disk already exists then deregister it before proceeding
2078 * (unless it's the first disk (for the controller node).
2079 */
9cef0d2f 2080 if (h->drv[drv_index]->raid_level != -1 && drv_index != 0) {
b2a4a43d 2081 dev_warn(&h->pdev->dev, "disk %d has changed.\n", drv_index);
f70dba83 2082 spin_lock_irqsave(&h->lock, flags);
9cef0d2f 2083 h->drv[drv_index]->busy_configuring = 1;
f70dba83 2084 spin_unlock_irqrestore(&h->lock, flags);
e14ac670 2085
9cef0d2f 2086 /* deregister_disk sets h->drv[drv_index]->queue = NULL
6ae5ce8e
MM		 2087 * which keeps the interrupt handler from starting
2088 * the queue.
2089 */
2d11d993 2090 ret = deregister_disk(h, drv_index, 0, via_ioctl);
ddd47442
MM		 2091 }
2092
2093 /* If the disk is in use return */
2094 if (ret)
a72da29b
MM		 2095 goto freeret;
2096
6ae5ce8e 2097 /* Save the new information from cciss_geometry_inquiry
9cef0d2f
SC		 2098 * and serial number inquiry. If the disk was deregistered
2099 * above, then h->drv[drv_index] will be NULL.
6ae5ce8e 2100 */
9cef0d2f
SC		 2101 if (h->drv[drv_index] == NULL) {
2102 drvinfo->device_initialized = 0;
2103 h->drv[drv_index] = drvinfo;
2104 drvinfo = NULL; /* so it won't be freed below. */
2105 } else {
2106 /* special case for cxd0 */
2107 h->drv[drv_index]->block_size = drvinfo->block_size;
2108 h->drv[drv_index]->nr_blocks = drvinfo->nr_blocks;
2109 h->drv[drv_index]->heads = drvinfo->heads;
2110 h->drv[drv_index]->sectors = drvinfo->sectors;
2111 h->drv[drv_index]->cylinders = drvinfo->cylinders;
2112 h->drv[drv_index]->raid_level = drvinfo->raid_level;
2113 memcpy(h->drv[drv_index]->serial_no, drvinfo->serial_no, 16);
2114 memcpy(h->drv[drv_index]->vendor, drvinfo->vendor,
2115 VENDOR_LEN + 1);
2116 memcpy(h->drv[drv_index]->model, drvinfo->model, MODEL_LEN + 1);
2117 memcpy(h->drv[drv_index]->rev, drvinfo->rev, REV_LEN + 1);
2118 }
ddd47442
MM		 2119
2120 ++h->num_luns;
2121 disk = h->gendisk[drv_index];
9cef0d2f 2122 set_capacity(disk, h->drv[drv_index]->nr_blocks);
ddd47442 2123
6ae5ce8e
MM		 2124 /* If it's not disk 0 (drv_index != 0)
2125 * or if it was disk 0, but there was previously
2126 * no actual corresponding configured logical drive
2127 * (raid_leve == -1) then we want to update the
2128 * logical drive's information.
2129 */
361e9b07
SC		 2130 if (drv_index || first_time) {
2131 if (cciss_add_disk(h, disk, drv_index) != 0) {
2132 cciss_free_gendisk(h, drv_index);
9cef0d2f 2133 cciss_free_drive_info(h, drv_index);
b2a4a43d
SC		 2134 dev_warn(&h->pdev->dev, "could not update disk %d\n",
2135 drv_index);
361e9b07
SC		 2136 --h->num_luns;
2137 }
2138 }
ddd47442 2139
6ae5ce8e 2140freeret:
ddd47442 2141 kfree(inq_buff);
a72da29b 2142 kfree(drvinfo);
ddd47442 2143 return;
6ae5ce8e 2144mem_msg:
b2a4a43d 2145 dev_err(&h->pdev->dev, "out of memory\n");
ddd47442
MM		 2146 goto freeret;
2147}
2148
2149/* This function will find the first index of the controllers drive array
9cef0d2f
SC		 2150 * that has a null drv pointer and allocate the drive info struct and
2151 * will return that index This is where new drives will be added.
2152 * If the index to be returned is greater than the highest_lun index for
2153 * the controller then highest_lun is set * to this new index.
2154 * If there are no available indexes or if tha allocation fails, then -1
2155 * is returned. * "controller_node" is used to know if this is a real
2156 * logical drive, or just the controller node, which determines if this
2157 * counts towards highest_lun.
7c832835 2158 */
9cef0d2f 2159static int cciss_alloc_drive_info(ctlr_info_t *h, int controller_node)
ddd47442
MM		 2160{
2161 int i;
9cef0d2f 2162 drive_info_struct *drv;
ddd47442 2163
9cef0d2f 2164 /* Search for an empty slot for our drive info */
7c832835 2165 for (i = 0; i < CISS_MAX_LUN; i++) {
9cef0d2f
SC		 2166
2167 /* if not cxd0 case, and it's occupied, skip it. */
2168 if (h->drv[i] && i != 0)
2169 continue;
2170 /*
2171 * If it's cxd0 case, and drv is alloc'ed already, and a
2172 * disk is configured there, skip it.
2173 */
2174 if (i == 0 && h->drv[i] && h->drv[i]->raid_level != -1)
2175 continue;
2176
2177 /*
2178 * We've found an empty slot. Update highest_lun
2179 * provided this isn't just the fake cxd0 controller node.
2180 */
2181 if (i > h->highest_lun && !controller_node)
2182 h->highest_lun = i;
2183
2184 /* If adding a real disk at cxd0, and it's already alloc'ed */
2185 if (i == 0 && h->drv[i] != NULL)
ddd47442 2186 return i;
9cef0d2f
SC		 2187
2188 /*
2189 * Found an empty slot, not already alloc'ed. Allocate it.
2190 * Mark it with raid_level == -1, so we know it's new later on.
2191 */
2192 drv = kzalloc(sizeof(*drv), GFP_KERNEL);
2193 if (!drv)
2194 return -1;
2195 drv->raid_level = -1; /* so we know it's new */
2196 h->drv[i] = drv;
2197 return i;
ddd47442
MM		 2198 }
2199 return -1;
2200}
2201
9cef0d2f
SC		 2202static void cciss_free_drive_info(ctlr_info_t *h, int drv_index)
2203{
2204 kfree(h->drv[drv_index]);
2205 h->drv[drv_index] = NULL;
2206}
2207
361e9b07
SC		 2208static void cciss_free_gendisk(ctlr_info_t *h, int drv_index)
2209{
2210 put_disk(h->gendisk[drv_index]);
2211 h->gendisk[drv_index] = NULL;
2212}
2213
6ae5ce8e
MM		 2214/* cciss_add_gendisk finds a free hba[]->drv structure
2215 * and allocates a gendisk if needed, and sets the lunid
2216 * in the drvinfo structure. It returns the index into
2217 * the ->drv[] array, or -1 if none are free.
2218 * is_controller_node indicates whether highest_lun should
2219 * count this disk, or if it's only being added to provide
2220 * a means to talk to the controller in case no logical
2221 * drives have yet been configured.
2222 */
39ccf9a6
SC		 2223static int cciss_add_gendisk(ctlr_info_t *h, unsigned char lunid[],
2224 int controller_node)
6ae5ce8e
MM		 2225{
2226 int drv_index;
2227
9cef0d2f 2228 drv_index = cciss_alloc_drive_info(h, controller_node);
6ae5ce8e
MM		 2229 if (drv_index == -1)
2230 return -1;
8ce51966 2231
6ae5ce8e
MM		 2232 /*Check if the gendisk needs to be allocated */
2233 if (!h->gendisk[drv_index]) {
2234 h->gendisk[drv_index] =
2235 alloc_disk(1 << NWD_SHIFT);
2236 if (!h->gendisk[drv_index]) {
b2a4a43d
SC		 2237 dev_err(&h->pdev->dev,
2238 "could not allocate a new disk %d\n",
2239 drv_index);
9cef0d2f 2240 goto err_free_drive_info;
6ae5ce8e
MM		 2241 }
2242 }
9cef0d2f
SC		 2243 memcpy(h->drv[drv_index]->LunID, lunid,
2244 sizeof(h->drv[drv_index]->LunID));
2245 if (cciss_create_ld_sysfs_entry(h, drv_index))
7fe06326 2246 goto err_free_disk;
6ae5ce8e
MM		 2247 /* Don't need to mark this busy because nobody */
2248 /* else knows about this disk yet to contend */
2249 /* for access to it. */
9cef0d2f 2250 h->drv[drv_index]->busy_configuring = 0;
6ae5ce8e
MM		 2251 wmb();
2252 return drv_index;
7fe06326
AP		 2253
2254err_free_disk:
361e9b07 2255 cciss_free_gendisk(h, drv_index);
9cef0d2f
SC		 2256err_free_drive_info:
2257 cciss_free_drive_info(h, drv_index);
7fe06326 2258 return -1;
6ae5ce8e
MM		 2259}
2260
2261/* This is for the special case of a controller which
2262 * has no logical drives. In this case, we still need
2263 * to register a disk so the controller can be accessed
2264 * by the Array Config Utility.
2265 */
2266static void cciss_add_controller_node(ctlr_info_t *h)
2267{
2268 struct gendisk *disk;
2269 int drv_index;
2270
2271 if (h->gendisk[0] != NULL) /* already did this? Then bail. */
2272 return;
2273
39ccf9a6 2274 drv_index = cciss_add_gendisk(h, CTLR_LUNID, 1);
361e9b07
SC		 2275 if (drv_index == -1)
2276 goto error;
9cef0d2f
SC		 2277 h->drv[drv_index]->block_size = 512;
2278 h->drv[drv_index]->nr_blocks = 0;
2279 h->drv[drv_index]->heads = 0;
2280 h->drv[drv_index]->sectors = 0;
2281 h->drv[drv_index]->cylinders = 0;
2282 h->drv[drv_index]->raid_level = -1;
2283 memset(h->drv[drv_index]->serial_no, 0, 16);
6ae5ce8e 2284 disk = h->gendisk[drv_index];
361e9b07
SC		 2285 if (cciss_add_disk(h, disk, drv_index) == 0)
2286 return;
2287 cciss_free_gendisk(h, drv_index);
9cef0d2f 2288 cciss_free_drive_info(h, drv_index);
361e9b07 2289error:
b2a4a43d 2290 dev_warn(&h->pdev->dev, "could not add disk 0.\n");
361e9b07 2291 return;
6ae5ce8e
MM		 2292}
2293
ddd47442 2294/* This function will add and remove logical drives from the Logical
d14c4ab5 2295 * drive array of the controller and maintain persistency of ordering
ddd47442
MM		 2296 * so that mount points are preserved until the next reboot. This allows
2297 * for the removal of logical drives in the middle of the drive array
2298 * without a re-ordering of those drives.
2299 * INPUT
2300 * h = The controller to perform the operations on
7c832835 2301 */
2d11d993
SC		 2302static int rebuild_lun_table(ctlr_info_t *h, int first_time,
2303 int via_ioctl)
1da177e4 2304{
ddd47442
MM		 2305 int num_luns;
2306 ReportLunData_struct *ld_buff = NULL;
ddd47442
MM		 2307 int return_code;
2308 int listlength = 0;
2309 int i;
2310 int drv_found;
2311 int drv_index = 0;
39ccf9a6 2312 unsigned char lunid[8] = CTLR_LUNID;
1da177e4 2313 unsigned long flags;
ddd47442 2314
6ae5ce8e
MM		 2315 if (!capable(CAP_SYS_RAWIO))
2316 return -EPERM;
2317
ddd47442 2318 /* Set busy_configuring flag for this operation */
f70dba83 2319 spin_lock_irqsave(&h->lock, flags);
7c832835 2320 if (h->busy_configuring) {
f70dba83 2321 spin_unlock_irqrestore(&h->lock, flags);
ddd47442
MM		 2322 return -EBUSY;
2323 }
2324 h->busy_configuring = 1;
f70dba83 2325 spin_unlock_irqrestore(&h->lock, flags);
ddd47442 2326
a72da29b
MM		 2327 ld_buff = kzalloc(sizeof(ReportLunData_struct), GFP_KERNEL);
2328 if (ld_buff == NULL)
2329 goto mem_msg;
2330
f70dba83 2331 return_code = sendcmd_withirq(h, CISS_REPORT_LOG, ld_buff,
b57695fe 2332 sizeof(ReportLunData_struct),
2333 0, CTLR_LUNID, TYPE_CMD);
ddd47442 2334
a72da29b
MM		 2335 if (return_code == IO_OK)
2336 listlength = be32_to_cpu(*(__be32 *) ld_buff->LUNListLength);
2337 else { /* reading number of logical volumes failed */
b2a4a43d
SC		 2338 dev_warn(&h->pdev->dev,
2339 "report logical volume command failed\n");
a72da29b
MM		 2340 listlength = 0;
2341 goto freeret;
2342 }
2343
2344 num_luns = listlength / 8; /* 8 bytes per entry */
2345 if (num_luns > CISS_MAX_LUN) {
2346 num_luns = CISS_MAX_LUN;
b2a4a43d 2347 dev_warn(&h->pdev->dev, "more luns configured"
a72da29b
MM		 2348 " on controller than can be handled by"
2349 " this driver.\n");
2350 }
2351
6ae5ce8e
MM		 2352 if (num_luns == 0)
2353 cciss_add_controller_node(h);
2354
2355 /* Compare controller drive array to driver's drive array
2356 * to see if any drives are missing on the controller due
2357 * to action of Array Config Utility (user deletes drive)
2358 * and deregister logical drives which have disappeared.
2359 */
a72da29b
MM		 2360 for (i = 0; i <= h->highest_lun; i++) {
2361 int j;
2362 drv_found = 0;
d8a0be6a
SC		 2363
2364 /* skip holes in the array from already deleted drives */
9cef0d2f 2365 if (h->drv[i] == NULL)
d8a0be6a
SC		 2366 continue;
2367
a72da29b 2368 for (j = 0; j < num_luns; j++) {
39ccf9a6 2369 memcpy(lunid, &ld_buff->LUN[j][0], sizeof(lunid));
9cef0d2f 2370 if (memcmp(h->drv[i]->LunID, lunid,
39ccf9a6 2371 sizeof(lunid)) == 0) {
a72da29b
MM		 2372 drv_found = 1;
2373 break;
2374 }
2375 }
2376 if (!drv_found) {
2377 /* Deregister it from the OS, it's gone. */
f70dba83 2378 spin_lock_irqsave(&h->lock, flags);
9cef0d2f 2379 h->drv[i]->busy_configuring = 1;
f70dba83 2380 spin_unlock_irqrestore(&h->lock, flags);
2d11d993 2381 return_code = deregister_disk(h, i, 1, via_ioctl);
9cef0d2f
SC		 2382 if (h->drv[i] != NULL)
2383 h->drv[i]->busy_configuring = 0;
ddd47442 2384 }
a72da29b 2385 }
ddd47442 2386
a72da29b
MM		 2387 /* Compare controller drive array to driver's drive array.
2388 * Check for updates in the drive information and any new drives
2389 * on the controller due to ACU adding logical drives, or changing
2390 * a logical drive's size, etc. Reregister any new/changed drives
2391 */
2392 for (i = 0; i < num_luns; i++) {
2393 int j;
ddd47442 2394
a72da29b 2395 drv_found = 0;
ddd47442 2396
39ccf9a6 2397 memcpy(lunid, &ld_buff->LUN[i][0], sizeof(lunid));
a72da29b
MM		 2398 /* Find if the LUN is already in the drive array
2399 * of the driver. If so then update its info
2400 * if not in use. If it does not exist then find
2401 * the first free index and add it.
2402 */
2403 for (j = 0; j <= h->highest_lun; j++) {
9cef0d2f
SC		 2404 if (h->drv[j] != NULL &&
2405 memcmp(h->drv[j]->LunID, lunid,
2406 sizeof(h->drv[j]->LunID)) == 0) {
a72da29b
MM		 2407 drv_index = j;
2408 drv_found = 1;
2409 break;
ddd47442 2410 }
a72da29b 2411 }
ddd47442 2412
a72da29b
MM		 2413 /* check if the drive was found already in the array */
2414 if (!drv_found) {
eece695f 2415 drv_index = cciss_add_gendisk(h, lunid, 0);
a72da29b
MM		 2416 if (drv_index == -1)
2417 goto freeret;
a72da29b 2418 }
f70dba83 2419 cciss_update_drive_info(h, drv_index, first_time, via_ioctl);
a72da29b 2420 } /* end for */
ddd47442 2421
6ae5ce8e 2422freeret:
ddd47442
MM		 2423 kfree(ld_buff);
2424 h->busy_configuring = 0;
2425 /* We return -1 here to tell the ACU that we have registered/updated
2426 * all of the drives that we can and to keep it from calling us
2427 * additional times.
7c832835 2428 */
ddd47442 2429 return -1;
6ae5ce8e 2430mem_msg:
b2a4a43d 2431 dev_err(&h->pdev->dev, "out of memory\n");
a72da29b 2432 h->busy_configuring = 0;
ddd47442
MM		 2433 goto freeret;
2434}
2435
9ddb27b4
SC		 2436static void cciss_clear_drive_info(drive_info_struct *drive_info)
2437{
2438 /* zero out the disk size info */
2439 drive_info->nr_blocks = 0;
2440 drive_info->block_size = 0;
2441 drive_info->heads = 0;
2442 drive_info->sectors = 0;
2443 drive_info->cylinders = 0;
2444 drive_info->raid_level = -1;
2445 memset(drive_info->serial_no, 0, sizeof(drive_info->serial_no));
2446 memset(drive_info->model, 0, sizeof(drive_info->model));
2447 memset(drive_info->rev, 0, sizeof(drive_info->rev));
2448 memset(drive_info->vendor, 0, sizeof(drive_info->vendor));
2449 /*
2450 * don't clear the LUNID though, we need to remember which
2451 * one this one is.
2452 */
2453}
2454
ddd47442
MM		 2455/* This function will deregister the disk and it's queue from the
2456 * kernel. It must be called with the controller lock held and the
2457 * drv structures busy_configuring flag set. It's parameters are:
2458 *
2459 * disk = This is the disk to be deregistered
2460 * drv = This is the drive_info_struct associated with the disk to be
2461 * deregistered. It contains information about the disk used
2462 * by the driver.
2463 * clear_all = This flag determines whether or not the disk information
2464 * is going to be completely cleared out and the highest_lun
2465 * reset. Sometimes we want to clear out information about
d14c4ab5 2466 * the disk in preparation for re-adding it. In this case
ddd47442
MM		 2467 * the highest_lun should be left unchanged and the LunID
2468 * should not be cleared.
2d11d993
SC		 2469 * via_ioctl
2470 * This indicates whether we've reached this path via ioctl.
2471 * This affects the maximum usage count allowed for c0d0 to be messed with.
2472 * If this path is reached via ioctl(), then the max_usage_count will
2473 * be 1, as the process calling ioctl() has got to have the device open.
2474 * If we get here via sysfs, then the max usage count will be zero.
ddd47442 2475*/
a0ea8622 2476static int deregister_disk(ctlr_info_t *h, int drv_index,
2d11d993 2477 int clear_all, int via_ioctl)
ddd47442 2478{
799202cb 2479 int i;
a0ea8622
SC		 2480 struct gendisk *disk;
2481 drive_info_struct *drv;
9cef0d2f 2482 int recalculate_highest_lun;
1da177e4
LT		 2483
2484 if (!capable(CAP_SYS_RAWIO))
2485 return -EPERM;
2486
9cef0d2f 2487 drv = h->drv[drv_index];
a0ea8622
SC		 2488 disk = h->gendisk[drv_index];
2489
1da177e4 2490 /* make sure logical volume is NOT is use */
7c832835 2491 if (clear_all || (h->gendisk[0] == disk)) {
2d11d993 2492 if (drv->usage_count > via_ioctl)
7c832835
BH		 2493 return -EBUSY;
2494 } else if (drv->usage_count > 0)
2495 return -EBUSY;
1da177e4 2496
9cef0d2f
SC		 2497 recalculate_highest_lun = (drv == h->drv[h->highest_lun]);
2498
ddd47442
MM		 2499 /* invalidate the devices and deregister the disk. If it is disk
2500 * zero do not deregister it but just zero out it's values. This
2501 * allows us to delete disk zero but keep the controller registered.
7c832835
BH		 2502 */
2503 if (h->gendisk[0] != disk) {
5a9df732 2504 struct request_queue *q = disk->queue;
097d0264 2505 if (disk->flags & GENHD_FL_UP) {
8ce51966 2506 cciss_destroy_ld_sysfs_entry(h, drv_index, 0);
5a9df732 2507 del_gendisk(disk);
5a9df732 2508 }
9cef0d2f 2509 if (q)
5a9df732 2510 blk_cleanup_queue(q);
5a9df732
AB		 2511 /* If clear_all is set then we are deleting the logical
2512 * drive, not just refreshing its info. For drives
2513 * other than disk 0 we will call put_disk. We do not
2514 * do this for disk 0 as we need it to be able to
2515 * configure the controller.
a72da29b 2516 */
5a9df732
AB		 2517 if (clear_all){
2518 /* This isn't pretty, but we need to find the
2519 * disk in our array and NULL our the pointer.
2520 * This is so that we will call alloc_disk if
2521 * this index is used again later.
a72da29b 2522 */
5a9df732 2523 for (i=0; i < CISS_MAX_LUN; i++){
a72da29b 2524 if (h->gendisk[i] == disk) {
5a9df732
AB		 2525 h->gendisk[i] = NULL;
2526 break;
799202cb 2527 }
799202cb 2528 }
5a9df732 2529 put_disk(disk);
ddd47442 2530 }
799202cb
MM		 2531 } else {
2532 set_capacity(disk, 0);
9cef0d2f 2533 cciss_clear_drive_info(drv);
ddd47442
MM		 2534 }
2535
2536 --h->num_luns;
ddd47442 2537
9cef0d2f
SC		 2538 /* if it was the last disk, find the new hightest lun */
2539 if (clear_all && recalculate_highest_lun) {
c2d45b4d 2540 int newhighest = -1;
9cef0d2f
SC		 2541 for (i = 0; i <= h->highest_lun; i++) {
2542 /* if the disk has size > 0, it is available */
2543 if (h->drv[i] && h->drv[i]->heads)
2544 newhighest = i;
1da177e4 2545 }
9cef0d2f 2546 h->highest_lun = newhighest;
ddd47442 2547 }
e2019b58 2548 return 0;
1da177e4 2549}
ddd47442 2550
f70dba83 2551static int fill_cmd(ctlr_info_t *h, CommandList_struct *c, __u8 cmd, void *buff,
b57695fe 2552 size_t size, __u8 page_code, unsigned char *scsi3addr,
2553 int cmd_type)
1da177e4 2554{
1da177e4
LT		 2555 u64bit buff_dma_handle;
2556 int status = IO_OK;
2557
2558 c->cmd_type = CMD_IOCTL_PEND;
2559 c->Header.ReplyQueue = 0;
7c832835 2560 if (buff != NULL) {
1da177e4 2561 c->Header.SGList = 1;
7c832835 2562 c->Header.SGTotal = 1;
1da177e4
LT		 2563 } else {
2564 c->Header.SGList = 0;
7c832835 2565 c->Header.SGTotal = 0;
1da177e4
LT		 2566 }
2567 c->Header.Tag.lower = c->busaddr;
b57695fe 2568 memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8);
1da177e4
LT		 2569
2570 c->Request.Type.Type = cmd_type;
2571 if (cmd_type == TYPE_CMD) {
7c832835
BH		 2572 switch (cmd) {
2573 case CISS_INQUIRY:
1da177e4 2574 /* are we trying to read a vital product page */
7c832835 2575 if (page_code != 0) {
1da177e4
LT		 2576 c->Request.CDB[1] = 0x01;
2577 c->Request.CDB[2] = page_code;
2578 }
2579 c->Request.CDBLen = 6;
7c832835 2580 c->Request.Type.Attribute = ATTR_SIMPLE;
1da177e4
LT		 2581 c->Request.Type.Direction = XFER_READ;
2582 c->Request.Timeout = 0;
7c832835
BH		 2583 c->Request.CDB[0] = CISS_INQUIRY;
2584 c->Request.CDB[4] = size & 0xFF;
2585 break;
1da177e4
LT		 2586 case CISS_REPORT_LOG:
2587 case CISS_REPORT_PHYS:
7c832835 2588 /* Talking to controller so It's a physical command
1da177e4 2589 mode = 00 target = 0. Nothing to write.
7c832835 2590 */
1da177e4
LT		 2591 c->Request.CDBLen = 12;
2592 c->Request.Type.Attribute = ATTR_SIMPLE;
2593 c->Request.Type.Direction = XFER_READ;
2594 c->Request.Timeout = 0;
2595 c->Request.CDB[0] = cmd;
b028461d 2596 c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */
1da177e4
LT		 2597 c->Request.CDB[7] = (size >> 16) & 0xFF;
2598 c->Request.CDB[8] = (size >> 8) & 0xFF;
2599 c->Request.CDB[9] = size & 0xFF;
2600 break;
2601
2602 case CCISS_READ_CAPACITY:
1da177e4
LT		 2603 c->Request.CDBLen = 10;
2604 c->Request.Type.Attribute = ATTR_SIMPLE;
2605 c->Request.Type.Direction = XFER_READ;
2606 c->Request.Timeout = 0;
2607 c->Request.CDB[0] = cmd;
7c832835 2608 break;
00988a35 2609 case CCISS_READ_CAPACITY_16:
00988a35
MMOD		 2610 c->Request.CDBLen = 16;
2611 c->Request.Type.Attribute = ATTR_SIMPLE;
2612 c->Request.Type.Direction = XFER_READ;
2613 c->Request.Timeout = 0;
2614 c->Request.CDB[0] = cmd;
2615 c->Request.CDB[1] = 0x10;
2616 c->Request.CDB[10] = (size >> 24) & 0xFF;
2617 c->Request.CDB[11] = (size >> 16) & 0xFF;
2618 c->Request.CDB[12] = (size >> 8) & 0xFF;
2619 c->Request.CDB[13] = size & 0xFF;
2620 c->Request.Timeout = 0;
2621 c->Request.CDB[0] = cmd;
2622 break;
1da177e4
LT		 2623 case CCISS_CACHE_FLUSH:
2624 c->Request.CDBLen = 12;
2625 c->Request.Type.Attribute = ATTR_SIMPLE;
2626 c->Request.Type.Direction = XFER_WRITE;
2627 c->Request.Timeout = 0;
2628 c->Request.CDB[0] = BMIC_WRITE;
2629 c->Request.CDB[6] = BMIC_CACHE_FLUSH;
59bd71a8
SC		 2630 c->Request.CDB[7] = (size >> 8) & 0xFF;
2631 c->Request.CDB[8] = size & 0xFF;
7c832835 2632 break;
88f627ae 2633 case TEST_UNIT_READY:
88f627ae
SC		 2634 c->Request.CDBLen = 6;
2635 c->Request.Type.Attribute = ATTR_SIMPLE;
2636 c->Request.Type.Direction = XFER_NONE;
2637 c->Request.Timeout = 0;
2638 break;
1da177e4 2639 default:
b2a4a43d 2640 dev_warn(&h->pdev->dev, "Unknown Command 0x%c\n", cmd);
e2019b58 2641 return IO_ERROR;
1da177e4
LT		 2642 }
2643 } else if (cmd_type == TYPE_MSG) {
2644 switch (cmd) {
8f71bb82 2645 case CCISS_ABORT_MSG:
3da8b713 2646 c->Request.CDBLen = 12;
2647 c->Request.Type.Attribute = ATTR_SIMPLE;
2648 c->Request.Type.Direction = XFER_WRITE;
2649 c->Request.Timeout = 0;
7c832835
BH		 2650 c->Request.CDB[0] = cmd; /* abort */
2651 c->Request.CDB[1] = 0; /* abort a command */
3da8b713 2652 /* buff contains the tag of the command to abort */
2653 memcpy(&c->Request.CDB[4], buff, 8);
2654 break;
8f71bb82 2655 case CCISS_RESET_MSG:
88f627ae 2656 c->Request.CDBLen = 16;
3da8b713 2657 c->Request.Type.Attribute = ATTR_SIMPLE;
88f627ae 2658 c->Request.Type.Direction = XFER_NONE;
3da8b713 2659 c->Request.Timeout = 0;
2660 memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB));
7c832835 2661 c->Request.CDB[0] = cmd; /* reset */
8f71bb82 2662 c->Request.CDB[1] = CCISS_RESET_TYPE_TARGET;
00988a35 2663 break;
8f71bb82 2664 case CCISS_NOOP_MSG:
1da177e4
LT		 2665 c->Request.CDBLen = 1;
2666 c->Request.Type.Attribute = ATTR_SIMPLE;
2667 c->Request.Type.Direction = XFER_WRITE;
2668 c->Request.Timeout = 0;
2669 c->Request.CDB[0] = cmd;
2670 break;
2671 default:
b2a4a43d
SC		 2672 dev_warn(&h->pdev->dev,
2673 "unknown message type %d\n", cmd);
1da177e4
LT		 2674 return IO_ERROR;
2675 }
2676 } else {
b2a4a43d 2677 dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type);
1da177e4
LT		 2678 return IO_ERROR;
2679 }
2680 /* Fill in the scatter gather information */
2681 if (size > 0) {
2682 buff_dma_handle.val = (__u64) pci_map_single(h->pdev,
7c832835
BH		 2683 buff, size,
2684 PCI_DMA_BIDIRECTIONAL);
1da177e4
LT		 2685 c->SG[0].Addr.lower = buff_dma_handle.val32.lower;
2686 c->SG[0].Addr.upper = buff_dma_handle.val32.upper;
2687 c->SG[0].Len = size;
7c832835 2688 c->SG[0].Ext = 0; /* we are not chaining */
1da177e4
LT		 2689 }
2690 return status;
2691}
7c832835 2692
8d85fce7
GKH		 2693static int cciss_send_reset(ctlr_info_t *h, unsigned char *scsi3addr,
2694 u8 reset_type)
edc83d47
JA		 2695{
2696 CommandList_struct *c;
2697 int return_status;
2698
2699 c = cmd_alloc(h);
2700 if (!c)
2701 return -ENOMEM;
2702 return_status = fill_cmd(h, c, CCISS_RESET_MSG, NULL, 0, 0,
2703 CTLR_LUNID, TYPE_MSG);
2704 c->Request.CDB[1] = reset_type; /* fill_cmd defaults to target reset */
2705 if (return_status != IO_OK) {
2706 cmd_special_free(h, c);
2707 return return_status;
2708 }
2709 c->waiting = NULL;
2710 enqueue_cmd_and_start_io(h, c);
2711 /* Don't wait for completion, the reset won't complete. Don't free
2712 * the command either. This is the last command we will send before
2713 * re-initializing everything, so it doesn't matter and won't leak.
2714 */
2715 return 0;
2716}
2717
3c2ab402 2718static int check_target_status(ctlr_info_t *h, CommandList_struct *c)
2719{
2720 switch (c->err_info->ScsiStatus) {
2721 case SAM_STAT_GOOD:
2722 return IO_OK;
2723 case SAM_STAT_CHECK_CONDITION:
2724 switch (0xf & c->err_info->SenseInfo[2]) {
2725 case 0: return IO_OK; /* no sense */
2726 case 1: return IO_OK; /* recovered error */
2727 default:
c08fac65
SC		 2728 if (check_for_unit_attention(h, c))
2729 return IO_NEEDS_RETRY;
b2a4a43d 2730 dev_warn(&h->pdev->dev, "cmd 0x%02x "
3c2ab402 2731 "check condition, sense key = 0x%02x\n",
b2a4a43d 2732 c->Request.CDB[0], c->err_info->SenseInfo[2]);
3c2ab402 2733 }
2734 break;
2735 default:
b2a4a43d
SC		 2736 dev_warn(&h->pdev->dev, "cmd 0x%02x"
2737 "scsi status = 0x%02x\n",
3c2ab402 2738 c->Request.CDB[0], c->err_info->ScsiStatus);
2739 break;
2740 }
2741 return IO_ERROR;
2742}
2743
789a424a 2744static int process_sendcmd_error(ctlr_info_t *h, CommandList_struct *c)
1da177e4 2745{
5390cfc3 2746 int return_status = IO_OK;
7c832835 2747
789a424a 2748 if (c->err_info->CommandStatus == CMD_SUCCESS)
2749 return IO_OK;
5390cfc3 2750
2751 switch (c->err_info->CommandStatus) {
2752 case CMD_TARGET_STATUS:
3c2ab402 2753 return_status = check_target_status(h, c);
5390cfc3 2754 break;
2755 case CMD_DATA_UNDERRUN:
2756 case CMD_DATA_OVERRUN:
2757 /* expected for inquiry and report lun commands */
2758 break;
2759 case CMD_INVALID:
b2a4a43d 2760 dev_warn(&h->pdev->dev, "cmd 0x%02x is "
5390cfc3 2761 "reported invalid\n", c->Request.CDB[0]);
2762 return_status = IO_ERROR;
2763 break;
2764 case CMD_PROTOCOL_ERR:
b2a4a43d
SC		 2765 dev_warn(&h->pdev->dev, "cmd 0x%02x has "
2766 "protocol error\n", c->Request.CDB[0]);
5390cfc3 2767 return_status = IO_ERROR;
2768 break;
2769 case CMD_HARDWARE_ERR:
b2a4a43d 2770 dev_warn(&h->pdev->dev, "cmd 0x%02x had "
5390cfc3 2771 " hardware error\n", c->Request.CDB[0]);
2772 return_status = IO_ERROR;
2773 break;
2774 case CMD_CONNECTION_LOST:
b2a4a43d 2775 dev_warn(&h->pdev->dev, "cmd 0x%02x had "
5390cfc3 2776 "connection lost\n", c->Request.CDB[0]);
2777 return_status = IO_ERROR;
2778 break;
2779 case CMD_ABORTED:
b2a4a43d 2780 dev_warn(&h->pdev->dev, "cmd 0x%02x was "
5390cfc3 2781 "aborted\n", c->Request.CDB[0]);
2782 return_status = IO_ERROR;
2783 break;
2784 case CMD_ABORT_FAILED:
b2a4a43d 2785 dev_warn(&h->pdev->dev, "cmd 0x%02x reports "
5390cfc3 2786 "abort failed\n", c->Request.CDB[0]);
2787 return_status = IO_ERROR;
2788 break;
2789 case CMD_UNSOLICITED_ABORT:
b2a4a43d 2790 dev_warn(&h->pdev->dev, "unsolicited abort 0x%02x\n",
5390cfc3 2791 c->Request.CDB[0]);
789a424a 2792 return_status = IO_NEEDS_RETRY;
5390cfc3 2793 break;
6d9a4f9e
SC		 2794 case CMD_UNABORTABLE:
2795 dev_warn(&h->pdev->dev, "cmd unabortable\n");
2796 return_status = IO_ERROR;
2797 break;
5390cfc3 2798 default:
b2a4a43d 2799 dev_warn(&h->pdev->dev, "cmd 0x%02x returned "
5390cfc3 2800 "unknown status %x\n", c->Request.CDB[0],
2801 c->err_info->CommandStatus);
2802 return_status = IO_ERROR;
7c832835 2803 }
789a424a 2804 return return_status;
2805}
2806
2807static int sendcmd_withirq_core(ctlr_info_t *h, CommandList_struct *c,
2808 int attempt_retry)
2809{
2810 DECLARE_COMPLETION_ONSTACK(wait);
2811 u64bit buff_dma_handle;
789a424a 2812 int return_status = IO_OK;
2813
2814resend_cmd2:
2815 c->waiting = &wait;
664a717d 2816 enqueue_cmd_and_start_io(h, c);
789a424a 2817
2818 wait_for_completion(&wait);
2819
2820 if (c->err_info->CommandStatus == 0 || !attempt_retry)
2821 goto command_done;
2822
2823 return_status = process_sendcmd_error(h, c);
2824
2825 if (return_status == IO_NEEDS_RETRY &&
2826 c->retry_count < MAX_CMD_RETRIES) {
b2a4a43d 2827 dev_warn(&h->pdev->dev, "retrying 0x%02x\n",
789a424a 2828 c->Request.CDB[0]);
2829 c->retry_count++;
2830 /* erase the old error information */
2831 memset(c->err_info, 0, sizeof(ErrorInfo_struct));
2832 return_status = IO_OK;
16735d02 2833 reinit_completion(&wait);
789a424a 2834 goto resend_cmd2;
2835 }
5390cfc3 2836
2837command_done:
1da177e4 2838 /* unlock the buffers from DMA */
bb2a37bf
MM		 2839 buff_dma_handle.val32.lower = c->SG[0].Addr.lower;
2840 buff_dma_handle.val32.upper = c->SG[0].Addr.upper;
7c832835
BH		 2841 pci_unmap_single(h->pdev, (dma_addr_t) buff_dma_handle.val,
2842 c->SG[0].Len, PCI_DMA_BIDIRECTIONAL);
5390cfc3 2843 return return_status;
2844}
2845
f70dba83 2846static int sendcmd_withirq(ctlr_info_t *h, __u8 cmd, void *buff, size_t size,
b57695fe 2847 __u8 page_code, unsigned char scsi3addr[],
2848 int cmd_type)
5390cfc3 2849{
5390cfc3 2850 CommandList_struct *c;
2851 int return_status;
2852
6b4d96b8 2853 c = cmd_special_alloc(h);
5390cfc3 2854 if (!c)
2855 return -ENOMEM;
f70dba83 2856 return_status = fill_cmd(h, c, cmd, buff, size, page_code,
b57695fe 2857 scsi3addr, cmd_type);
5390cfc3 2858 if (return_status == IO_OK)
789a424a 2859 return_status = sendcmd_withirq_core(h, c, 1);
2860
6b4d96b8 2861 cmd_special_free(h, c);
7c832835 2862 return return_status;
1da177e4 2863}
7c832835 2864
f70dba83 2865static void cciss_geometry_inquiry(ctlr_info_t *h, int logvol,
7b838bde 2866 sector_t total_size,
7c832835
BH		 2867 unsigned int block_size,
2868 InquiryData_struct *inq_buff,
2869 drive_info_struct *drv)
1da177e4
LT		 2870{
2871 int return_code;
00988a35 2872 unsigned long t;
b57695fe 2873 unsigned char scsi3addr[8];
00988a35 2874
1da177e4 2875 memset(inq_buff, 0, sizeof(InquiryData_struct));
f70dba83
SC		 2876 log_unit_to_scsi3addr(h, scsi3addr, logvol);
2877 return_code = sendcmd_withirq(h, CISS_INQUIRY, inq_buff,
7b838bde 2878 sizeof(*inq_buff), 0xC1, scsi3addr, TYPE_CMD);
1da177e4 2879 if (return_code == IO_OK) {
7c832835 2880 if (inq_buff->data_byte[8] == 0xFF) {
b2a4a43d
SC		 2881 dev_warn(&h->pdev->dev,
2882 "reading geometry failed, volume "
7c832835 2883 "does not support reading geometry\n");
1da177e4 2884 drv->heads = 255;
b028461d 2885 drv->sectors = 32; /* Sectors per track */
7f42d3b8 2886 drv->cylinders = total_size + 1;
89f97ad1 2887 drv->raid_level = RAID_UNKNOWN;
1da177e4 2888 } else {
1da177e4
LT		 2889 drv->heads = inq_buff->data_byte[6];
2890 drv->sectors = inq_buff->data_byte[7];
2891 drv->cylinders = (inq_buff->data_byte[4] & 0xff) << 8;
2892 drv->cylinders += inq_buff->data_byte[5];
2893 drv->raid_level = inq_buff->data_byte[8];
3f7705ea
MW		 2894 }
2895 drv->block_size = block_size;
97c06978 2896 drv->nr_blocks = total_size + 1;
3f7705ea
MW		 2897 t = drv->heads * drv->sectors;
2898 if (t > 1) {
97c06978
MMOD		 2899 sector_t real_size = total_size + 1;
2900 unsigned long rem = sector_div(real_size, t);
3f7705ea 2901 if (rem)
97c06978
MMOD		 2902 real_size++;
2903 drv->cylinders = real_size;
1da177e4 2904 }
7c832835 2905 } else { /* Get geometry failed */
b2a4a43d 2906 dev_warn(&h->pdev->dev, "reading geometry failed\n");
1da177e4 2907 }
1da177e4 2908}
7c832835 2909
1da177e4 2910static void
f70dba83 2911cciss_read_capacity(ctlr_info_t *h, int logvol, sector_t *total_size,
7c832835 2912 unsigned int *block_size)
1da177e4 2913{
00988a35 2914 ReadCapdata_struct *buf;
1da177e4 2915 int return_code;
b57695fe 2916 unsigned char scsi3addr[8];
1aebe187
MK		 2917
2918 buf = kzalloc(sizeof(ReadCapdata_struct), GFP_KERNEL);
2919 if (!buf) {
b2a4a43d 2920 dev_warn(&h->pdev->dev, "out of memory\n");
00988a35
MMOD		 2921 return;
2922 }
1aebe187 2923
f70dba83
SC		 2924 log_unit_to_scsi3addr(h, scsi3addr, logvol);
2925 return_code = sendcmd_withirq(h, CCISS_READ_CAPACITY, buf,
7b838bde 2926 sizeof(ReadCapdata_struct), 0, scsi3addr, TYPE_CMD);
1da177e4 2927 if (return_code == IO_OK) {
4c1f2b31
AV		 2928 *total_size = be32_to_cpu(*(__be32 *) buf->total_size);
2929 *block_size = be32_to_cpu(*(__be32 *) buf->block_size);
7c832835 2930 } else { /* read capacity command failed */
b2a4a43d 2931 dev_warn(&h->pdev->dev, "read capacity failed\n");
1da177e4
LT		 2932 *total_size = 0;
2933 *block_size = BLOCK_SIZE;
2934 }
00988a35 2935 kfree(buf);
00988a35
MMOD		 2936}
2937
f70dba83 2938static void cciss_read_capacity_16(ctlr_info_t *h, int logvol,
7b838bde 2939 sector_t *total_size, unsigned int *block_size)
00988a35
MMOD		 2940{
2941 ReadCapdata_struct_16 *buf;
2942 int return_code;
b57695fe 2943 unsigned char scsi3addr[8];
1aebe187
MK		 2944
2945 buf = kzalloc(sizeof(ReadCapdata_struct_16), GFP_KERNEL);
2946 if (!buf) {
b2a4a43d 2947 dev_warn(&h->pdev->dev, "out of memory\n");
00988a35
MMOD		 2948 return;
2949 }
1aebe187 2950
f70dba83
SC		 2951 log_unit_to_scsi3addr(h, scsi3addr, logvol);
2952 return_code = sendcmd_withirq(h, CCISS_READ_CAPACITY_16,
2953 buf, sizeof(ReadCapdata_struct_16),
7b838bde 2954 0, scsi3addr, TYPE_CMD);
00988a35 2955 if (return_code == IO_OK) {
4c1f2b31
AV		 2956 *total_size = be64_to_cpu(*(__be64 *) buf->total_size);
2957 *block_size = be32_to_cpu(*(__be32 *) buf->block_size);
00988a35 2958 } else { /* read capacity command failed */
b2a4a43d 2959 dev_warn(&h->pdev->dev, "read capacity failed\n");
00988a35
MMOD		 2960 *total_size = 0;
2961 *block_size = BLOCK_SIZE;
2962 }
b2a4a43d 2963 dev_info(&h->pdev->dev, " blocks= %llu block_size= %d\n",
97c06978 2964 (unsigned long long)*total_size+1, *block_size);
00988a35 2965 kfree(buf);
1da177e4
LT		 2966}
2967
1da177e4
LT		 2968static int cciss_revalidate(struct gendisk *disk)
2969{
2970 ctlr_info_t *h = get_host(disk);
2971 drive_info_struct *drv = get_drv(disk);
2972 int logvol;
7c832835 2973 int FOUND = 0;
1da177e4 2974 unsigned int block_size;
00988a35 2975 sector_t total_size;
1da177e4
LT		 2976 InquiryData_struct *inq_buff = NULL;
2977
68264e9d 2978 for (logvol = 0; logvol <= h->highest_lun; logvol++) {
0fc13c89 2979 if (!h->drv[logvol])
453434cf 2980 continue;
9cef0d2f 2981 if (memcmp(h->drv[logvol]->LunID, drv->LunID,
39ccf9a6 2982 sizeof(drv->LunID)) == 0) {
7c832835 2983 FOUND = 1;
1da177e4
LT		 2984 break;
2985 }
2986 }
2987
7c832835
BH		 2988 if (!FOUND)
2989 return 1;
1da177e4 2990
7c832835
BH		 2991 inq_buff = kmalloc(sizeof(InquiryData_struct), GFP_KERNEL);
2992 if (inq_buff == NULL) {
b2a4a43d 2993 dev_warn(&h->pdev->dev, "out of memory\n");
7c832835
BH		 2994 return 1;
2995 }
00988a35 2996 if (h->cciss_read == CCISS_READ_10) {
f70dba83 2997 cciss_read_capacity(h, logvol,
00988a35
MMOD		 2998 &total_size, &block_size);
2999 } else {
f70dba83 3000 cciss_read_capacity_16(h, logvol,
00988a35
MMOD		 3001 &total_size, &block_size);
3002 }
f70dba83 3003 cciss_geometry_inquiry(h, logvol, total_size, block_size,
7c832835 3004 inq_buff, drv);
1da177e4 3005
e1defc4f 3006 blk_queue_logical_block_size(drv->queue, drv->block_size);
1da177e4
LT		 3007 set_capacity(disk, drv->nr_blocks);
3008
1da177e4
LT		 3009 kfree(inq_buff);
3010 return 0;
3011}
3012
1da177e4
LT		 3013/*
3014 * Map (physical) PCI mem into (virtual) kernel space
3015 */
3016static void __iomem *remap_pci_mem(ulong base, ulong size)
3017{
7c832835
BH		 3018 ulong page_base = ((ulong) base) & PAGE_MASK;
3019 ulong page_offs = ((ulong) base) - page_base;
3020 void __iomem *page_remapped = ioremap(page_base, page_offs + size);
1da177e4 3021
7c832835 3022 return page_remapped ? (page_remapped + page_offs) : NULL;
1da177e4
LT		 3023}
3024
7c832835
BH		 3025/*
3026 * Takes jobs of the Q and sends them to the hardware, then puts it on
3027 * the Q to wait for completion.
3028 */
3029static void start_io(ctlr_info_t *h)
1da177e4
LT		 3030{
3031 CommandList_struct *c;
7c832835 3032
e6e1ee93
JA		 3033 while (!list_empty(&h->reqQ)) {
3034 c = list_entry(h->reqQ.next, CommandList_struct, list);
1da177e4
LT		 3035 /* can't do anything if fifo is full */
3036 if ((h->access.fifo_full(h))) {
b2a4a43d 3037 dev_warn(&h->pdev->dev, "fifo full\n");
1da177e4
LT		 3038 break;
3039 }
3040
7c832835 3041 /* Get the first entry from the Request Q */
8a3173de 3042 removeQ(c);
1da177e4 3043 h->Qdepth--;
7c832835
BH		 3044
3045 /* Tell the controller execute command */
1da177e4 3046 h->access.submit_command(h, c);
7c832835
BH		 3047
3048 /* Put job onto the completed Q */
8a3173de 3049 addQ(&h->cmpQ, c);
1da177e4
LT		 3050 }
3051}
7c832835 3052
f70dba83 3053/* Assumes that h->lock is held. */
1da177e4
LT		 3054/* Zeros out the error record and then resends the command back */
3055/* to the controller */
7c832835 3056static inline void resend_cciss_cmd(ctlr_info_t *h, CommandList_struct *c)
1da177e4
LT		 3057{
3058 /* erase the old error information */
3059 memset(c->err_info, 0, sizeof(ErrorInfo_struct));
3060
3061 /* add it to software queue and then send it to the controller */
8a3173de 3062 addQ(&h->reqQ, c);
1da177e4 3063 h->Qdepth++;
7c832835 3064 if (h->Qdepth > h->maxQsinceinit)
1da177e4
LT		 3065 h->maxQsinceinit = h->Qdepth;
3066
3067 start_io(h);
3068}
a9925a06 3069
1a614f50
SC		 3070static inline unsigned int make_status_bytes(unsigned int scsi_status_byte,
3071 unsigned int msg_byte, unsigned int host_byte,
3072 unsigned int driver_byte)
3073{
3074 /* inverse of macros in scsi.h */
3075 return (scsi_status_byte & 0xff) |
3076 ((msg_byte & 0xff) << 8) |
3077 ((host_byte & 0xff) << 16) |
3078 ((driver_byte & 0xff) << 24);
3079}
3080
0a9279cc
MM		 3081static inline int evaluate_target_status(ctlr_info_t *h,
3082 CommandList_struct *cmd, int *retry_cmd)
03bbfee5
MMOD		 3083{
3084 unsigned char sense_key;
1a614f50
SC		 3085 unsigned char status_byte, msg_byte, host_byte, driver_byte;
3086 int error_value;
3087
0a9279cc 3088 *retry_cmd = 0;
1a614f50
SC		 3089 /* If we get in here, it means we got "target status", that is, scsi status */
3090 status_byte = cmd->err_info->ScsiStatus;
3091 driver_byte = DRIVER_OK;
3092 msg_byte = cmd->err_info->CommandStatus; /* correct? seems too device specific */
3093
57292b58 3094 if (blk_rq_is_passthrough(cmd->rq))
1a614f50
SC		 3095 host_byte = DID_PASSTHROUGH;
3096 else
3097 host_byte = DID_OK;
3098
3099 error_value = make_status_bytes(status_byte, msg_byte,
3100 host_byte, driver_byte);
03bbfee5 3101
1a614f50 3102 if (cmd->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION) {
57292b58 3103 if (!blk_rq_is_passthrough(cmd->rq))
b2a4a43d 3104 dev_warn(&h->pdev->dev, "cmd %p "
03bbfee5
MMOD		 3105 "has SCSI Status 0x%x\n",
3106 cmd, cmd->err_info->ScsiStatus);
1a614f50 3107 return error_value;
03bbfee5
MMOD		 3108 }
3109
3110 /* check the sense key */
3111 sense_key = 0xf & cmd->err_info->SenseInfo[2];
3112 /* no status or recovered error */
33659ebb 3113 if (((sense_key == 0x0) || (sense_key == 0x1)) &&
57292b58 3114 !blk_rq_is_passthrough(cmd->rq))
1a614f50 3115 error_value = 0;
03bbfee5 3116
0a9279cc 3117 if (check_for_unit_attention(h, cmd)) {
57292b58 3118 *retry_cmd = !blk_rq_is_passthrough(cmd->rq);
0a9279cc
MM		 3119 return 0;
3120 }
3121
33659ebb 3122 /* Not SG_IO or similar? */
57292b58 3123 if (!blk_rq_is_passthrough(cmd->rq)) {
1a614f50 3124 if (error_value != 0)
b2a4a43d 3125 dev_warn(&h->pdev->dev, "cmd %p has CHECK CONDITION"
03bbfee5 3126 " sense key = 0x%x\n", cmd, sense_key);
1a614f50 3127 return error_value;
03bbfee5
MMOD		 3128 }
3129
82ed4db4 3130 scsi_req(cmd->rq)->sense_len = cmd->err_info->SenseLen;
1a614f50 3131 return error_value;
03bbfee5
MMOD		 3132}
3133
7c832835 3134/* checks the status of the job and calls complete buffers to mark all
a9925a06
JA		 3135 * buffers for the completed job. Note that this function does not need
3136 * to hold the hba/queue lock.
7c832835
BH		 3137 */
3138static inline void complete_command(ctlr_info_t *h, CommandList_struct *cmd,
3139 int timeout)
1da177e4 3140{
1da177e4 3141 int retry_cmd = 0;
198b7660
MMOD		 3142 struct request *rq = cmd->rq;
3143
3144 rq->errors = 0;
7c832835 3145
1da177e4 3146 if (timeout)
1a614f50 3147 rq->errors = make_status_bytes(0, 0, 0, DRIVER_TIMEOUT);
1da177e4 3148
d38ae168
MMOD		 3149 if (cmd->err_info->CommandStatus == 0) /* no error has occurred */
3150 goto after_error_processing;
7c832835 3151
d38ae168 3152 switch (cmd->err_info->CommandStatus) {
d38ae168 3153 case CMD_TARGET_STATUS:
0a9279cc 3154 rq->errors = evaluate_target_status(h, cmd, &retry_cmd);
d38ae168
MMOD		 3155 break;
3156 case CMD_DATA_UNDERRUN:
57292b58 3157 if (!blk_rq_is_passthrough(cmd->rq)) {
b2a4a43d 3158 dev_warn(&h->pdev->dev, "cmd %p has"
03bbfee5
MMOD		 3159 " completed with data underrun "
3160 "reported\n", cmd);
03bbfee5 3161 }
d38ae168
MMOD		 3162 break;
3163 case CMD_DATA_OVERRUN:
57292b58 3164 if (!blk_rq_is_passthrough(cmd->rq))
b2a4a43d 3165 dev_warn(&h->pdev->dev, "cciss: cmd %p has"
03bbfee5
MMOD		 3166 " completed with data overrun "
3167 "reported\n", cmd);
d38ae168
MMOD		 3168 break;
3169 case CMD_INVALID:
b2a4a43d 3170 dev_warn(&h->pdev->dev, "cciss: cmd %p is "
d38ae168 3171 "reported invalid\n", cmd);
1a614f50
SC		 3172 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3173 cmd->err_info->CommandStatus, DRIVER_OK,
57292b58 3174 blk_rq_is_passthrough(cmd->rq) ?
33659ebb 3175 DID_PASSTHROUGH : DID_ERROR);
d38ae168
MMOD		 3176 break;
3177 case CMD_PROTOCOL_ERR:
b2a4a43d
SC		 3178 dev_warn(&h->pdev->dev, "cciss: cmd %p has "
3179 "protocol error\n", cmd);
1a614f50
SC		 3180 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3181 cmd->err_info->CommandStatus, DRIVER_OK,
57292b58 3182 blk_rq_is_passthrough(cmd->rq) ?
33659ebb 3183 DID_PASSTHROUGH : DID_ERROR);
d38ae168
MMOD		 3184 break;
3185 case CMD_HARDWARE_ERR:
b2a4a43d 3186 dev_warn(&h->pdev->dev, "cciss: cmd %p had "
d38ae168 3187 " hardware error\n", cmd);
1a614f50
SC		 3188 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3189 cmd->err_info->CommandStatus, DRIVER_OK,
57292b58 3190 blk_rq_is_passthrough(cmd->rq) ?
33659ebb 3191 DID_PASSTHROUGH : DID_ERROR);
d38ae168
MMOD		 3192 break;
3193 case CMD_CONNECTION_LOST:
b2a4a43d 3194 dev_warn(&h->pdev->dev, "cciss: cmd %p had "
d38ae168 3195 "connection lost\n", cmd);
1a614f50
SC		 3196 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3197 cmd->err_info->CommandStatus, DRIVER_OK,
57292b58 3198 blk_rq_is_passthrough(cmd->rq) ?
33659ebb 3199 DID_PASSTHROUGH : DID_ERROR);
d38ae168
MMOD		 3200 break;
3201 case CMD_ABORTED:
b2a4a43d 3202 dev_warn(&h->pdev->dev, "cciss: cmd %p was "
d38ae168 3203 "aborted\n", cmd);
1a614f50
SC		 3204 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3205 cmd->err_info->CommandStatus, DRIVER_OK,
57292b58 3206 blk_rq_is_passthrough(cmd->rq) ?
33659ebb 3207 DID_PASSTHROUGH : DID_ABORT);
d38ae168
MMOD		 3208 break;
3209 case CMD_ABORT_FAILED:
b2a4a43d 3210 dev_warn(&h->pdev->dev, "cciss: cmd %p reports "
d38ae168 3211 "abort failed\n", cmd);
1a614f50
SC		 3212 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3213 cmd->err_info->CommandStatus, DRIVER_OK,
57292b58 3214 blk_rq_is_passthrough(cmd->rq) ?
33659ebb 3215 DID_PASSTHROUGH : DID_ERROR);
d38ae168
MMOD		 3216 break;
3217 case CMD_UNSOLICITED_ABORT:
b2a4a43d 3218 dev_warn(&h->pdev->dev, "cciss%d: unsolicited "
d38ae168
MMOD		 3219 "abort %p\n", h->ctlr, cmd);
3220 if (cmd->retry_count < MAX_CMD_RETRIES) {
3221 retry_cmd = 1;
b2a4a43d 3222 dev_warn(&h->pdev->dev, "retrying %p\n", cmd);
d38ae168
MMOD		 3223 cmd->retry_count++;
3224 } else
b2a4a43d
SC		 3225 dev_warn(&h->pdev->dev,
3226 "%p retried too many times\n", cmd);
1a614f50
SC		 3227 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3228 cmd->err_info->CommandStatus, DRIVER_OK,
57292b58 3229 blk_rq_is_passthrough(cmd->rq) ?
33659ebb 3230 DID_PASSTHROUGH : DID_ABORT);
d38ae168
MMOD		 3231 break;
3232 case CMD_TIMEOUT:
b2a4a43d 3233 dev_warn(&h->pdev->dev, "cmd %p timedout\n", cmd);
1a614f50
SC		 3234 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3235 cmd->err_info->CommandStatus, DRIVER_OK,
57292b58 3236 blk_rq_is_passthrough(cmd->rq) ?
33659ebb 3237 DID_PASSTHROUGH : DID_ERROR);
d38ae168 3238 break;
6d9a4f9e
SC		 3239 case CMD_UNABORTABLE:
3240 dev_warn(&h->pdev->dev, "cmd %p unabortable\n", cmd);
3241 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3242 cmd->err_info->CommandStatus, DRIVER_OK,
57292b58 3243 blk_rq_is_passthrough(cmd->rq) ?
6d9a4f9e
SC		 3244 DID_PASSTHROUGH : DID_ERROR);
3245 break;
d38ae168 3246 default:
b2a4a43d 3247 dev_warn(&h->pdev->dev, "cmd %p returned "
d38ae168
MMOD		 3248 "unknown status %x\n", cmd,
3249 cmd->err_info->CommandStatus);
1a614f50
SC		 3250 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3251 cmd->err_info->CommandStatus, DRIVER_OK,
57292b58 3252 blk_rq_is_passthrough(cmd->rq) ?
33659ebb 3253 DID_PASSTHROUGH : DID_ERROR);
1da177e4 3254 }
d38ae168
MMOD		 3255
3256after_error_processing:
3257
1da177e4 3258 /* We need to return this command */
7c832835
BH		 3259 if (retry_cmd) {
3260 resend_cciss_cmd(h, cmd);
1da177e4 3261 return;
7c832835 3262 }
03bbfee5 3263 cmd->rq->completion_data = cmd;
a9925a06 3264 blk_complete_request(cmd->rq);
1da177e4
LT		 3265}
3266
0c2b3908
MM		 3267static inline u32 cciss_tag_contains_index(u32 tag)
3268{
5e216153 3269#define DIRECT_LOOKUP_BIT 0x10
0c2b3908
MM		 3270 return tag & DIRECT_LOOKUP_BIT;
3271}
3272
3273static inline u32 cciss_tag_to_index(u32 tag)
3274{
5e216153 3275#define DIRECT_LOOKUP_SHIFT 5
0c2b3908
MM		 3276 return tag >> DIRECT_LOOKUP_SHIFT;
3277}
3278
0498cc2a 3279static inline u32 cciss_tag_discard_error_bits(ctlr_info_t *h, u32 tag)
0c2b3908 3280{
0498cc2a
SC		 3281#define CCISS_PERF_ERROR_BITS ((1 << DIRECT_LOOKUP_SHIFT) - 1)
3282#define CCISS_SIMPLE_ERROR_BITS 0x03
3283 if (likely(h->transMethod & CFGTBL_Trans_Performant))
3284 return tag & ~CCISS_PERF_ERROR_BITS;
3285 return tag & ~CCISS_SIMPLE_ERROR_BITS;
0c2b3908
MM		 3286}
3287
3288static inline void cciss_mark_tag_indexed(u32 *tag)
3289{
3290 *tag |= DIRECT_LOOKUP_BIT;
3291}
3292
3293static inline void cciss_set_tag_index(u32 *tag, u32 index)
3294{
3295 *tag |= (index << DIRECT_LOOKUP_SHIFT);
3296}
3297
7c832835
BH		 3298/*
3299 * Get a request and submit it to the controller.
1da177e4 3300 */
165125e1 3301static void do_cciss_request(struct request_queue *q)
1da177e4 3302{
7c832835 3303 ctlr_info_t *h = q->queuedata;
1da177e4 3304 CommandList_struct *c;
00988a35
MMOD		 3305 sector_t start_blk;
3306 int seg;
1da177e4
LT		 3307 struct request *creq;
3308 u64bit temp64;
5c07a311
DB		 3309 struct scatterlist *tmp_sg;
3310 SGDescriptor_struct *curr_sg;
1da177e4
LT		 3311 drive_info_struct *drv;
3312 int i, dir;
5c07a311
DB		 3313 int sg_index = 0;
3314 int chained = 0;
1da177e4 3315
7c832835 3316 queue:
9934c8c0 3317 creq = blk_peek_request(q);
1da177e4
LT		 3318 if (!creq)
3319 goto startio;
3320
5c07a311 3321 BUG_ON(creq->nr_phys_segments > h->maxsgentries);
1da177e4 3322
6b4d96b8
SC		 3323 c = cmd_alloc(h);
3324 if (!c)
1da177e4
LT		 3325 goto full;
3326
9934c8c0 3327 blk_start_request(creq);
1da177e4 3328
5c07a311 3329 tmp_sg = h->scatter_list[c->cmdindex];
1da177e4
LT		 3330 spin_unlock_irq(q->queue_lock);
3331
3332 c->cmd_type = CMD_RWREQ;
3333 c->rq = creq;
7c832835
BH		 3334
3335 /* fill in the request */
1da177e4 3336 drv = creq->rq_disk->private_data;
b028461d 3337 c->Header.ReplyQueue = 0; /* unused in simple mode */
33079b21
MM		 3338 /* got command from pool, so use the command block index instead */
3339 /* for direct lookups. */
3340 /* The first 2 bits are reserved for controller error reporting. */
0c2b3908
MM		 3341 cciss_set_tag_index(&c->Header.Tag.lower, c->cmdindex);
3342 cciss_mark_tag_indexed(&c->Header.Tag.lower);
39ccf9a6 3343 memcpy(&c->Header.LUN, drv->LunID, sizeof(drv->LunID));
b028461d 3344 c->Request.CDBLen = 10; /* 12 byte commands not in FW yet; */
3345 c->Request.Type.Type = TYPE_CMD; /* It is a command. */
7c832835
BH		 3346 c->Request.Type.Attribute = ATTR_SIMPLE;
3347 c->Request.Type.Direction =
a52de245 3348 (rq_data_dir(creq) == READ) ? XFER_READ : XFER_WRITE;
b028461d 3349 c->Request.Timeout = 0; /* Don't time out */
7c832835 3350 c->Request.CDB[0] =
00988a35 3351 (rq_data_dir(creq) == READ) ? h->cciss_read : h->cciss_write;
83096ebf 3352 start_blk = blk_rq_pos(creq);
b2a4a43d 3353 dev_dbg(&h->pdev->dev, "sector =%d nr_sectors=%d\n",
83096ebf 3354 (int)blk_rq_pos(creq), (int)blk_rq_sectors(creq));
5c07a311 3355 sg_init_table(tmp_sg, h->maxsgentries);
1da177e4
LT		 3356 seg = blk_rq_map_sg(q, creq, tmp_sg);
3357
7c832835 3358 /* get the DMA records for the setup */
1da177e4
LT		 3359 if (c->Request.Type.Direction == XFER_READ)
3360 dir = PCI_DMA_FROMDEVICE;
3361 else
3362 dir = PCI_DMA_TODEVICE;
3363
5c07a311
DB		 3364 curr_sg = c->SG;
3365 sg_index = 0;
3366 chained = 0;
3367
7c832835 3368 for (i = 0; i < seg; i++) {
5c07a311
DB		 3369 if (((sg_index+1) == (h->max_cmd_sgentries)) &&
3370 !chained && ((seg - i) > 1)) {
5c07a311 3371 /* Point to next chain block. */
dccc9b56 3372 curr_sg = h->cmd_sg_list[c->cmdindex];
5c07a311
DB		 3373 sg_index = 0;
3374 chained = 1;
3375 }
3376 curr_sg[sg_index].Len = tmp_sg[i].length;
45711f1a 3377 temp64.val = (__u64) pci_map_page(h->pdev, sg_page(&tmp_sg[i]),
5c07a311
DB		 3378 tmp_sg[i].offset,
3379 tmp_sg[i].length, dir);
ebe73647
DB		 3380 if (dma_mapping_error(&h->pdev->dev, temp64.val)) {
3381 dev_warn(&h->pdev->dev,
3382 "%s: error mapping page for DMA\n", __func__);
3383 creq->errors = make_status_bytes(SAM_STAT_GOOD,
3384 0, DRIVER_OK,
3385 DID_SOFT_ERROR);
3386 cmd_free(h, c);
3387 return;
3388 }
5c07a311
DB		 3389 curr_sg[sg_index].Addr.lower = temp64.val32.lower;
3390 curr_sg[sg_index].Addr.upper = temp64.val32.upper;
3391 curr_sg[sg_index].Ext = 0; /* we are not chaining */
5c07a311 3392 ++sg_index;
1da177e4 3393 }
ebe73647
DB		 3394 if (chained) {
3395 if (cciss_map_sg_chain_block(h, c, h->cmd_sg_list[c->cmdindex],
d45033ef 3396 (seg - (h->max_cmd_sgentries - 1)) *
ebe73647
DB		 3397 sizeof(SGDescriptor_struct))) {
3398 creq->errors = make_status_bytes(SAM_STAT_GOOD,
3399 0, DRIVER_OK,
3400 DID_SOFT_ERROR);
3401 cmd_free(h, c);
3402 return;
3403 }
3404 }
5c07a311 3405
7c832835
BH		 3406 /* track how many SG entries we are using */
3407 if (seg > h->maxSG)
3408 h->maxSG = seg;
1da177e4 3409
b2a4a43d 3410 dev_dbg(&h->pdev->dev, "Submitting %u sectors in %d segments "
5c07a311
DB		 3411 "chained[%d]\n",
3412 blk_rq_sectors(creq), seg, chained);
1da177e4 3413
5e216153
MM		 3414 c->Header.SGTotal = seg + chained;
3415 if (seg <= h->max_cmd_sgentries)
3416 c->Header.SGList = c->Header.SGTotal;
3417 else
5c07a311 3418 c->Header.SGList = h->max_cmd_sgentries;
5e216153 3419 set_performant_mode(h, c);
5c07a311 3420
aebf526b
CH		 3421 switch (req_op(creq)) {
3422 case REQ_OP_READ:
3423 case REQ_OP_WRITE:
03bbfee5
MMOD		 3424 if(h->cciss_read == CCISS_READ_10) {
3425 c->Request.CDB[1] = 0;
b028461d 3426 c->Request.CDB[2] = (start_blk >> 24) & 0xff; /* MSB */
03bbfee5
MMOD		 3427 c->Request.CDB[3] = (start_blk >> 16) & 0xff;
3428 c->Request.CDB[4] = (start_blk >> 8) & 0xff;
3429 c->Request.CDB[5] = start_blk & 0xff;
b028461d 3430 c->Request.CDB[6] = 0; /* (sect >> 24) & 0xff; MSB */
83096ebf
TH		 3431 c->Request.CDB[7] = (blk_rq_sectors(creq) >> 8) & 0xff;
3432 c->Request.CDB[8] = blk_rq_sectors(creq) & 0xff;
03bbfee5
MMOD		 3433 c->Request.CDB[9] = c->Request.CDB[11] = c->Request.CDB[12] = 0;
3434 } else {
582539e5
RD		 3435 u32 upper32 = upper_32_bits(start_blk);
3436
03bbfee5
MMOD		 3437 c->Request.CDBLen = 16;
3438 c->Request.CDB[1]= 0;
b028461d 3439 c->Request.CDB[2]= (upper32 >> 24) & 0xff; /* MSB */
582539e5
RD		 3440 c->Request.CDB[3]= (upper32 >> 16) & 0xff;
3441 c->Request.CDB[4]= (upper32 >> 8) & 0xff;
3442 c->Request.CDB[5]= upper32 & 0xff;
03bbfee5
MMOD		 3443 c->Request.CDB[6]= (start_blk >> 24) & 0xff;
3444 c->Request.CDB[7]= (start_blk >> 16) & 0xff;
3445 c->Request.CDB[8]= (start_blk >> 8) & 0xff;
3446 c->Request.CDB[9]= start_blk & 0xff;
83096ebf
TH		 3447 c->Request.CDB[10]= (blk_rq_sectors(creq) >> 24) & 0xff;
3448 c->Request.CDB[11]= (blk_rq_sectors(creq) >> 16) & 0xff;
3449 c->Request.CDB[12]= (blk_rq_sectors(creq) >> 8) & 0xff;
3450 c->Request.CDB[13]= blk_rq_sectors(creq) & 0xff;
03bbfee5
MMOD		 3451 c->Request.CDB[14] = c->Request.CDB[15] = 0;
3452 }
aebf526b
CH		 3453 break;
3454 case REQ_OP_SCSI_IN:
3455 case REQ_OP_SCSI_OUT:
82ed4db4
CH		 3456 c->Request.CDBLen = scsi_req(creq)->cmd_len;
3457 memcpy(c->Request.CDB, scsi_req(creq)->cmd, BLK_MAX_CDB);
3458 scsi_req(creq)->sense = c->err_info->SenseInfo;
aebf526b
CH		 3459 break;
3460 default:
b2a4a43d 3461 dev_warn(&h->pdev->dev, "bad request type %d\n",
aebf526b 3462 creq->cmd_flags);
03bbfee5 3463 BUG();
00988a35 3464 }
1da177e4
LT		 3465
3466 spin_lock_irq(q->queue_lock);
3467
8a3173de 3468 addQ(&h->reqQ, c);
1da177e4 3469 h->Qdepth++;
7c832835
BH		 3470 if (h->Qdepth > h->maxQsinceinit)
3471 h->maxQsinceinit = h->Qdepth;
1da177e4
LT		 3472
3473 goto queue;
00988a35 3474full:
1da177e4 3475 blk_stop_queue(q);
00988a35 3476startio:
1da177e4
LT		 3477 /* We will already have the driver lock here so not need
3478 * to lock it.
7c832835 3479 */
1da177e4
LT		 3480 start_io(h);
3481}
3482
3da8b713 3483static inline unsigned long get_next_completion(ctlr_info_t *h)
3484{
3da8b713 3485 return h->access.command_completed(h);
3da8b713 3486}
3487
3488static inline int interrupt_pending(ctlr_info_t *h)
3489{
3da8b713 3490 return h->access.intr_pending(h);
3da8b713 3491}
3492
3493static inline long interrupt_not_for_us(ctlr_info_t *h)
3494{
81125860 3495 return ((h->access.intr_pending(h) == 0) ||
2cf3af1c 3496 (h->interrupts_enabled == 0));
3da8b713 3497}
3498
0c2b3908
MM		 3499static inline int bad_tag(ctlr_info_t *h, u32 tag_index,
3500 u32 raw_tag)
1da177e4 3501{
0c2b3908
MM		 3502 if (unlikely(tag_index >= h->nr_cmds)) {
3503 dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag);
3504 return 1;
3505 }
3506 return 0;
3507}
3508
3509static inline void finish_cmd(ctlr_info_t *h, CommandList_struct *c,
3510 u32 raw_tag)
3511{
3512 removeQ(c);
3513 if (likely(c->cmd_type == CMD_RWREQ))
3514 complete_command(h, c, 0);
3515 else if (c->cmd_type == CMD_IOCTL_PEND)
3516 complete(c->waiting);
3517#ifdef CONFIG_CISS_SCSI_TAPE
3518 else if (c->cmd_type == CMD_SCSI)
3519 complete_scsi_command(c, 0, raw_tag);
3520#endif
3521}
3522
29979a71
MM		 3523static inline u32 next_command(ctlr_info_t *h)
3524{
3525 u32 a;
3526
0498cc2a 3527 if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant)))
29979a71
MM		 3528 return h->access.command_completed(h);
3529
3530 if ((*(h->reply_pool_head) & 1) == (h->reply_pool_wraparound)) {
3531 a = *(h->reply_pool_head); /* Next cmd in ring buffer */
3532 (h->reply_pool_head)++;
3533 h->commands_outstanding--;
3534 } else {
3535 a = FIFO_EMPTY;
3536 }
3537 /* Check for wraparound */
3538 if (h->reply_pool_head == (h->reply_pool + h->max_commands)) {
3539 h->reply_pool_head = h->reply_pool;
3540 h->reply_pool_wraparound ^= 1;
3541 }
3542 return a;
3543}
3544
0c2b3908
MM		 3545/* process completion of an indexed ("direct lookup") command */
3546static inline u32 process_indexed_cmd(ctlr_info_t *h, u32 raw_tag)
3547{
3548 u32 tag_index;
1da177e4 3549 CommandList_struct *c;
0c2b3908
MM		 3550
3551 tag_index = cciss_tag_to_index(raw_tag);
3552 if (bad_tag(h, tag_index, raw_tag))
5e216153 3553 return next_command(h);
0c2b3908
MM		 3554 c = h->cmd_pool + tag_index;
3555 finish_cmd(h, c, raw_tag);
5e216153 3556 return next_command(h);
0c2b3908
MM		 3557}
3558
3559/* process completion of a non-indexed command */
3560static inline u32 process_nonindexed_cmd(ctlr_info_t *h, u32 raw_tag)
3561{
0c2b3908 3562 CommandList_struct *c = NULL;
0c2b3908
MM		 3563 __u32 busaddr_masked, tag_masked;
3564
0498cc2a 3565 tag_masked = cciss_tag_discard_error_bits(h, raw_tag);
e6e1ee93 3566 list_for_each_entry(c, &h->cmpQ, list) {
0498cc2a 3567 busaddr_masked = cciss_tag_discard_error_bits(h, c->busaddr);
0c2b3908
MM		 3568 if (busaddr_masked == tag_masked) {
3569 finish_cmd(h, c, raw_tag);
5e216153 3570 return next_command(h);
0c2b3908
MM		 3571 }
3572 }
3573 bad_tag(h, h->nr_cmds + 1, raw_tag);
5e216153 3574 return next_command(h);
0c2b3908
MM		 3575}
3576
5afe2781
SC		 3577/* Some controllers, like p400, will give us one interrupt
3578 * after a soft reset, even if we turned interrupts off.
3579 * Only need to check for this in the cciss_xxx_discard_completions
3580 * functions.
3581 */
3582static int ignore_bogus_interrupt(ctlr_info_t *h)
3583{
3584 if (likely(!reset_devices))
3585 return 0;
3586
3587 if (likely(h->interrupts_enabled))
3588 return 0;
3589
3590 dev_info(&h->pdev->dev, "Received interrupt while interrupts disabled "
3591 "(known firmware bug.) Ignoring.\n");
3592
3593 return 1;
3594}
3595
3596static irqreturn_t cciss_intx_discard_completions(int irq, void *dev_id)
3597{
3598 ctlr_info_t *h = dev_id;
3599 unsigned long flags;
3600 u32 raw_tag;
3601
3602 if (ignore_bogus_interrupt(h))
3603 return IRQ_NONE;
3604
3605 if (interrupt_not_for_us(h))
3606 return IRQ_NONE;
3607 spin_lock_irqsave(&h->lock, flags);
3608 while (interrupt_pending(h)) {
3609 raw_tag = get_next_completion(h);
3610 while (raw_tag != FIFO_EMPTY)
3611 raw_tag = next_command(h);
3612 }
3613 spin_unlock_irqrestore(&h->lock, flags);
3614 return IRQ_HANDLED;
3615}
3616
3617static irqreturn_t cciss_msix_discard_completions(int irq, void *dev_id)
3618{
3619 ctlr_info_t *h = dev_id;
3620 unsigned long flags;
3621 u32 raw_tag;
3622
3623 if (ignore_bogus_interrupt(h))
3624 return IRQ_NONE;
3625
3626 spin_lock_irqsave(&h->lock, flags);
3627 raw_tag = get_next_completion(h);
3628 while (raw_tag != FIFO_EMPTY)
3629 raw_tag = next_command(h);
3630 spin_unlock_irqrestore(&h->lock, flags);
3631 return IRQ_HANDLED;
3632}
3633
0c2b3908
MM		 3634static irqreturn_t do_cciss_intx(int irq, void *dev_id)
3635{
3636 ctlr_info_t *h = dev_id;
1da177e4 3637 unsigned long flags;
0c2b3908 3638 u32 raw_tag;
1da177e4 3639
3da8b713 3640 if (interrupt_not_for_us(h))
1da177e4 3641 return IRQ_NONE;
f70dba83 3642 spin_lock_irqsave(&h->lock, flags);
3da8b713 3643 while (interrupt_pending(h)) {
0c2b3908
MM		 3644 raw_tag = get_next_completion(h);
3645 while (raw_tag != FIFO_EMPTY) {
3646 if (cciss_tag_contains_index(raw_tag))
3647 raw_tag = process_indexed_cmd(h, raw_tag);
3648 else
3649 raw_tag = process_nonindexed_cmd(h, raw_tag);
1da177e4
LT		 3650 }
3651 }
f70dba83 3652 spin_unlock_irqrestore(&h->lock, flags);
0c2b3908
MM		 3653 return IRQ_HANDLED;
3654}
1da177e4 3655
0c2b3908
MM		 3656/* Add a second interrupt handler for MSI/MSI-X mode. In this mode we never
3657 * check the interrupt pending register because it is not set.
3658 */
3659static irqreturn_t do_cciss_msix_intr(int irq, void *dev_id)
3660{
3661 ctlr_info_t *h = dev_id;
3662 unsigned long flags;
3663 u32 raw_tag;
8a3173de 3664
f70dba83 3665 spin_lock_irqsave(&h->lock, flags);
0c2b3908
MM		 3666 raw_tag = get_next_completion(h);
3667 while (raw_tag != FIFO_EMPTY) {
3668 if (cciss_tag_contains_index(raw_tag))
3669 raw_tag = process_indexed_cmd(h, raw_tag);
3670 else
3671 raw_tag = process_nonindexed_cmd(h, raw_tag);
1da177e4 3672 }
f70dba83 3673 spin_unlock_irqrestore(&h->lock, flags);
1da177e4
LT		 3674 return IRQ_HANDLED;
3675}
7c832835 3676
b368c9dd
AP		 3677/**
3678 * add_to_scan_list() - add controller to rescan queue
3679 * @h: Pointer to the controller.
3680 *
3681 * Adds the controller to the rescan queue if not already on the queue.
3682 *
3683 * returns 1 if added to the queue, 0 if skipped (could be on the
3684 * queue already, or the controller could be initializing or shutting
3685 * down).
3686 **/
3687static int add_to_scan_list(struct ctlr_info *h)
3688{
3689 struct ctlr_info *test_h;
3690 int found = 0;
3691 int ret = 0;
3692
3693 if (h->busy_initializing)
3694 return 0;
3695
3696 if (!mutex_trylock(&h->busy_shutting_down))
3697 return 0;
3698
3699 mutex_lock(&scan_mutex);
3700 list_for_each_entry(test_h, &scan_q, scan_list) {
3701 if (test_h == h) {
3702 found = 1;
3703 break;
3704 }
3705 }
3706 if (!found && !h->busy_scanning) {
16735d02 3707 reinit_completion(&h->scan_wait);
b368c9dd
AP		 3708 list_add_tail(&h->scan_list, &scan_q);
3709 ret = 1;
3710 }
3711 mutex_unlock(&scan_mutex);
3712 mutex_unlock(&h->busy_shutting_down);
3713
3714 return ret;
3715}
3716
3717/**
3718 * remove_from_scan_list() - remove controller from rescan queue
3719 * @h: Pointer to the controller.
3720 *
3721 * Removes the controller from the rescan queue if present. Blocks if
fd8489cf
SC		 3722 * the controller is currently conducting a rescan. The controller
3723 * can be in one of three states:
3724 * 1. Doesn't need a scan
3725 * 2. On the scan list, but not scanning yet (we remove it)
3726 * 3. Busy scanning (and not on the list). In this case we want to wait for
3727 * the scan to complete to make sure the scanning thread for this
3728 * controller is completely idle.
b368c9dd
AP		 3729 **/
3730static void remove_from_scan_list(struct ctlr_info *h)
3731{
3732 struct ctlr_info *test_h, *tmp_h;
b368c9dd
AP		 3733
3734 mutex_lock(&scan_mutex);
3735 list_for_each_entry_safe(test_h, tmp_h, &scan_q, scan_list) {
fd8489cf 3736 if (test_h == h) { /* state 2. */
b368c9dd
AP		 3737 list_del(&h->scan_list);
3738 complete_all(&h->scan_wait);
3739 mutex_unlock(&scan_mutex);
3740 return;
3741 }
3742 }
fd8489cf
SC		 3743 if (h->busy_scanning) { /* state 3. */
3744 mutex_unlock(&scan_mutex);
b368c9dd 3745 wait_for_completion(&h->scan_wait);
fd8489cf
SC		 3746 } else { /* state 1, nothing to do. */
3747 mutex_unlock(&scan_mutex);
3748 }
b368c9dd
AP		 3749}
3750
3751/**
3752 * scan_thread() - kernel thread used to rescan controllers
3753 * @data: Ignored.
3754 *
3755 * A kernel thread used scan for drive topology changes on
3756 * controllers. The thread processes only one controller at a time
3757 * using a queue. Controllers are added to the queue using
3758 * add_to_scan_list() and removed from the queue either after done
3759 * processing or using remove_from_scan_list().
3760 *
3761 * returns 0.
3762 **/
0a9279cc
MM		 3763static int scan_thread(void *data)
3764{
b368c9dd 3765 struct ctlr_info *h;
0a9279cc 3766
b368c9dd
AP		 3767 while (1) {
3768 set_current_state(TASK_INTERRUPTIBLE);
3769 schedule();
0a9279cc
MM		 3770 if (kthread_should_stop())
3771 break;
b368c9dd
AP		 3772
3773 while (1) {
3774 mutex_lock(&scan_mutex);
3775 if (list_empty(&scan_q)) {
3776 mutex_unlock(&scan_mutex);
3777 break;
3778 }
3779
3780 h = list_entry(scan_q.next,
3781 struct ctlr_info,
3782 scan_list);
3783 list_del(&h->scan_list);
3784 h->busy_scanning = 1;
3785 mutex_unlock(&scan_mutex);
3786
d06dfbd2
SC		 3787 rebuild_lun_table(h, 0, 0);
3788 complete_all(&h->scan_wait);
3789 mutex_lock(&scan_mutex);
3790 h->busy_scanning = 0;
3791 mutex_unlock(&scan_mutex);
b368c9dd 3792 }
0a9279cc 3793 }
b368c9dd 3794
0a9279cc
MM		 3795 return 0;
3796}
3797
3798static int check_for_unit_attention(ctlr_info_t *h, CommandList_struct *c)
3799{
3800 if (c->err_info->SenseInfo[2] != UNIT_ATTENTION)
3801 return 0;
3802
3803 switch (c->err_info->SenseInfo[12]) {
3804 case STATE_CHANGED:
b2a4a43d
SC		 3805 dev_warn(&h->pdev->dev, "a state change "
3806 "detected, command retried\n");
0a9279cc
MM		 3807 return 1;
3808 break;
3809 case LUN_FAILED:
b2a4a43d
SC		 3810 dev_warn(&h->pdev->dev, "LUN failure "
3811 "detected, action required\n");
0a9279cc
MM		 3812 return 1;
3813 break;
3814 case REPORT_LUNS_CHANGED:
b2a4a43d 3815 dev_warn(&h->pdev->dev, "report LUN data changed\n");
da002184
SC		 3816 /*
3817 * Here, we could call add_to_scan_list and wake up the scan thread,
3818 * except that it's quite likely that we will get more than one
3819 * REPORT_LUNS_CHANGED condition in quick succession, which means
3820 * that those which occur after the first one will likely happen
3821 * *during* the scan_thread's rescan. And the rescan code is not
3822 * robust enough to restart in the middle, undoing what it has already
3823 * done, and it's not clear that it's even possible to do this, since
3824 * part of what it does is notify the block layer, which starts
3825 * doing it's own i/o to read partition tables and so on, and the
3826 * driver doesn't have visibility to know what might need undoing.
3827 * In any event, if possible, it is horribly complicated to get right
3828 * so we just don't do it for now.
3829 *
3830 * Note: this REPORT_LUNS_CHANGED condition only occurs on the MSA2012.
3831 */
0a9279cc
MM		 3832 return 1;
3833 break;
3834 case POWER_OR_RESET:
b2a4a43d
SC		 3835 dev_warn(&h->pdev->dev,
3836 "a power on or device reset detected\n");
0a9279cc
MM		 3837 return 1;
3838 break;
3839 case UNIT_ATTENTION_CLEARED:
b2a4a43d
SC		 3840 dev_warn(&h->pdev->dev,
3841 "unit attention cleared by another initiator\n");
0a9279cc
MM		 3842 return 1;
3843 break;
3844 default:
b2a4a43d
SC		 3845 dev_warn(&h->pdev->dev, "unknown unit attention detected\n");
3846 return 1;
0a9279cc
MM		 3847 }
3848}
3849
7c832835 3850/*
d14c4ab5 3851 * We cannot read the structure directly, for portability we must use
1da177e4 3852 * the io functions.
7c832835 3853 * This is for debug only.
1da177e4 3854 */
b2a4a43d 3855static void print_cfg_table(ctlr_info_t *h)
1da177e4
LT		 3856{
3857 int i;
3858 char temp_name[17];
b2a4a43d 3859 CfgTable_struct *tb = h->cfgtable;
1da177e4 3860
b2a4a43d
SC		 3861 dev_dbg(&h->pdev->dev, "Controller Configuration information\n");
3862 dev_dbg(&h->pdev->dev, "------------------------------------\n");
7c832835 3863 for (i = 0; i < 4; i++)
1da177e4 3864 temp_name[i] = readb(&(tb->Signature[i]));
7c832835 3865 temp_name[4] = '\0';
b2a4a43d
SC		 3866 dev_dbg(&h->pdev->dev, " Signature = %s\n", temp_name);
3867 dev_dbg(&h->pdev->dev, " Spec Number = %d\n",
3868 readl(&(tb->SpecValence)));
3869 dev_dbg(&h->pdev->dev, " Transport methods supported = 0x%x\n",
7c832835 3870 readl(&(tb->TransportSupport)));
b2a4a43d 3871 dev_dbg(&h->pdev->dev, " Transport methods active = 0x%x\n",
7c832835 3872 readl(&(tb->TransportActive)));
b2a4a43d 3873 dev_dbg(&h->pdev->dev, " Requested transport Method = 0x%x\n",
7c832835 3874 readl(&(tb->HostWrite.TransportRequest)));
b2a4a43d 3875 dev_dbg(&h->pdev->dev, " Coalesce Interrupt Delay = 0x%x\n",
7c832835 3876 readl(&(tb->HostWrite.CoalIntDelay)));
b2a4a43d 3877 dev_dbg(&h->pdev->dev, " Coalesce Interrupt Count = 0x%x\n",
7c832835 3878 readl(&(tb->HostWrite.CoalIntCount)));
a8036dfb 3879 dev_dbg(&h->pdev->dev, " Max outstanding commands = 0x%x\n",
7c832835 3880 readl(&(tb->CmdsOutMax)));
b2a4a43d
SC		 3881 dev_dbg(&h->pdev->dev, " Bus Types = 0x%x\n",
3882 readl(&(tb->BusTypes)));
7c832835 3883 for (i = 0; i < 16; i++)
1da177e4
LT		 3884 temp_name[i] = readb(&(tb->ServerName[i]));
3885 temp_name[16] = '\0';
b2a4a43d
SC		 3886 dev_dbg(&h->pdev->dev, " Server Name = %s\n", temp_name);
3887 dev_dbg(&h->pdev->dev, " Heartbeat Counter = 0x%x\n\n\n",
3888 readl(&(tb->HeartBeat)));
1da177e4 3889}
1da177e4 3890
7c832835 3891static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr)
1da177e4
LT		 3892{
3893 int i, offset, mem_type, bar_type;
7c832835 3894 if (pci_bar_addr == PCI_BASE_ADDRESS_0) /* looking for BAR zero? */
1da177e4
LT		 3895 return 0;
3896 offset = 0;
7c832835
BH		 3897 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
3898 bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE;
1da177e4
LT		 3899 if (bar_type == PCI_BASE_ADDRESS_SPACE_IO)
3900 offset += 4;
3901 else {
3902 mem_type = pci_resource_flags(pdev, i) &
7c832835 3903 PCI_BASE_ADDRESS_MEM_TYPE_MASK;
1da177e4 3904 switch (mem_type) {
7c832835
BH		 3905 case PCI_BASE_ADDRESS_MEM_TYPE_32:
3906 case PCI_BASE_ADDRESS_MEM_TYPE_1M:
3907 offset += 4; /* 32 bit */
3908 break;
3909 case PCI_BASE_ADDRESS_MEM_TYPE_64:
3910 offset += 8;
3911 break;
3912 default: /* reserved in PCI 2.2 */
b2a4a43d 3913 dev_warn(&pdev->dev,
7c832835
BH		 3914 "Base address is invalid\n");
3915 return -1;
1da177e4
LT		 3916 break;
3917 }
3918 }
7c832835
BH		 3919 if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0)
3920 return i + 1;
1da177e4
LT		 3921 }
3922 return -1;
3923}
3924
5e216153
MM		 3925/* Fill in bucket_map[], given nsgs (the max number of
3926 * scatter gather elements supported) and bucket[],
3927 * which is an array of 8 integers. The bucket[] array
3928 * contains 8 different DMA transfer sizes (in 16
3929 * byte increments) which the controller uses to fetch
3930 * commands. This function fills in bucket_map[], which
3931 * maps a given number of scatter gather elements to one of
3932 * the 8 DMA transfer sizes. The point of it is to allow the
3933 * controller to only do as much DMA as needed to fetch the
3934 * command, with the DMA transfer size encoded in the lower
3935 * bits of the command address.
3936 */
3937static void calc_bucket_map(int bucket[], int num_buckets,
3938 int nsgs, int *bucket_map)
3939{
3940 int i, j, b, size;
3941
3942 /* even a command with 0 SGs requires 4 blocks */
3943#define MINIMUM_TRANSFER_BLOCKS 4
3944#define NUM_BUCKETS 8
3945 /* Note, bucket_map must have nsgs+1 entries. */
3946 for (i = 0; i <= nsgs; i++) {
3947 /* Compute size of a command with i SG entries */
3948 size = i + MINIMUM_TRANSFER_BLOCKS;
3949 b = num_buckets; /* Assume the biggest bucket */
3950 /* Find the bucket that is just big enough */
3951 for (j = 0; j < 8; j++) {
3952 if (bucket[j] >= size) {
3953 b = j;
3954 break;
3955 }
3956 }
3957 /* for a command with i SG entries, use bucket b. */
3958 bucket_map[i] = b;
3959 }
3960}
3961
8d85fce7 3962static void cciss_wait_for_mode_change_ack(ctlr_info_t *h)
0f8a6a1e
SC		 3963{
3964 int i;
3965
3966 /* under certain very rare conditions, this can take awhile.
3967 * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right
3968 * as we enter this code.) */
3969 for (i = 0; i < MAX_CONFIG_WAIT; i++) {
3970 if (!(readl(h->vaddr + SA5_DOORBELL) & CFGTBL_ChangeReq))
3971 break;
332c2f80 3972 usleep_range(10000, 20000);
0f8a6a1e
SC		 3973 }
3974}
3975
8d85fce7 3976static void cciss_enter_performant_mode(ctlr_info_t *h, u32 use_short_tags)
b9933135
SC		 3977{
3978 /* This is a bit complicated. There are 8 registers on
3979 * the controller which we write to to tell it 8 different
3980 * sizes of commands which there may be. It's a way of
3981 * reducing the DMA done to fetch each command. Encoded into
3982 * each command's tag are 3 bits which communicate to the controller
3983 * which of the eight sizes that command fits within. The size of
3984 * each command depends on how many scatter gather entries there are.
3985 * Each SG entry requires 16 bytes. The eight registers are programmed
3986 * with the number of 16-byte blocks a command of that size requires.
3987 * The smallest command possible requires 5 such 16 byte blocks.
3988 * the largest command possible requires MAXSGENTRIES + 4 16-byte
3989 * blocks. Note, this only extends to the SG entries contained
3990 * within the command block, and does not extend to chained blocks
3991 * of SG elements. bft[] contains the eight values we write to
3992 * the registers. They are not evenly distributed, but have more
3993 * sizes for small commands, and fewer sizes for larger commands.
3994 */
5e216153 3995 __u32 trans_offset;
b9933135 3996 int bft[8] = { 5, 6, 8, 10, 12, 20, 28, MAXSGENTRIES + 4};
5e216153
MM		 3997 /*
3998 * 5 = 1 s/g entry or 4k
3999 * 6 = 2 s/g entry or 8k
4000 * 8 = 4 s/g entry or 16k
4001 * 10 = 6 s/g entry or 24k
4002 */
5e216153 4003 unsigned long register_value;
5e216153
MM		 4004 BUILD_BUG_ON(28 > MAXSGENTRIES + 4);
4005
5e216153
MM		 4006 h->reply_pool_wraparound = 1; /* spec: init to 1 */
4007
4008 /* Controller spec: zero out this buffer. */
4009 memset(h->reply_pool, 0, h->max_commands * sizeof(__u64));
4010 h->reply_pool_head = h->reply_pool;
4011
4012 trans_offset = readl(&(h->cfgtable->TransMethodOffset));
4013 calc_bucket_map(bft, ARRAY_SIZE(bft), h->maxsgentries,
4014 h->blockFetchTable);
4015 writel(bft[0], &h->transtable->BlockFetch0);
4016 writel(bft[1], &h->transtable->BlockFetch1);
4017 writel(bft[2], &h->transtable->BlockFetch2);
4018 writel(bft[3], &h->transtable->BlockFetch3);
4019 writel(bft[4], &h->transtable->BlockFetch4);
4020 writel(bft[5], &h->transtable->BlockFetch5);
4021 writel(bft[6], &h->transtable->BlockFetch6);
4022 writel(bft[7], &h->transtable->BlockFetch7);
4023
4024 /* size of controller ring buffer */
4025 writel(h->max_commands, &h->transtable->RepQSize);
4026 writel(1, &h->transtable->RepQCount);
4027 writel(0, &h->transtable->RepQCtrAddrLow32);
4028 writel(0, &h->transtable->RepQCtrAddrHigh32);
4029 writel(h->reply_pool_dhandle, &h->transtable->RepQAddr0Low32);
4030 writel(0, &h->transtable->RepQAddr0High32);
0498cc2a 4031 writel(CFGTBL_Trans_Performant | use_short_tags,
5e216153
MM		 4032 &(h->cfgtable->HostWrite.TransportRequest));
4033
5e216153 4034 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
0f8a6a1e 4035 cciss_wait_for_mode_change_ack(h);
5e216153 4036 register_value = readl(&(h->cfgtable->TransportActive));
b9933135 4037 if (!(register_value & CFGTBL_Trans_Performant))
b2a4a43d 4038 dev_warn(&h->pdev->dev, "cciss: unable to get board into"
5e216153 4039 " performant mode\n");
b9933135
SC		 4040}
4041
8d85fce7 4042static void cciss_put_controller_into_performant_mode(ctlr_info_t *h)
b9933135
SC		 4043{
4044 __u32 trans_support;
4045
13049537
JH		 4046 if (cciss_simple_mode)
4047 return;
4048
b9933135
SC		 4049 dev_dbg(&h->pdev->dev, "Trying to put board into Performant mode\n");
4050 /* Attempt to put controller into performant mode if supported */
4051 /* Does board support performant mode? */
4052 trans_support = readl(&(h->cfgtable->TransportSupport));
4053 if (!(trans_support & PERFORMANT_MODE))
4054 return;
4055
b2a4a43d 4056 dev_dbg(&h->pdev->dev, "Placing controller into performant mode\n");
b9933135
SC		 4057 /* Performant mode demands commands on a 32 byte boundary
4058 * pci_alloc_consistent aligns on page boundarys already.
4059 * Just need to check if divisible by 32
4060 */
4061 if ((sizeof(CommandList_struct) % 32) != 0) {
b2a4a43d 4062 dev_warn(&h->pdev->dev, "%s %d %s\n",
b9933135
SC		 4063 "cciss info: command size[",
4064 (int)sizeof(CommandList_struct),
4065 "] not divisible by 32, no performant mode..\n");
5e216153
MM		 4066 return;
4067 }
4068
b9933135
SC		 4069 /* Performant mode ring buffer and supporting data structures */
4070 h->reply_pool = (__u64 *)pci_alloc_consistent(
4071 h->pdev, h->max_commands * sizeof(__u64),
4072 &(h->reply_pool_dhandle));
4073
4074 /* Need a block fetch table for performant mode */
4075 h->blockFetchTable = kmalloc(((h->maxsgentries+1) *
4076 sizeof(__u32)), GFP_KERNEL);
4077
4078 if ((h->reply_pool == NULL) || (h->blockFetchTable == NULL))
4079 goto clean_up;
4080
0498cc2a
SC		 4081 cciss_enter_performant_mode(h,
4082 trans_support & CFGTBL_Trans_use_short_tags);
b9933135 4083
5e216153
MM		 4084 /* Change the access methods to the performant access methods */
4085 h->access = SA5_performant_access;
b9933135 4086 h->transMethod = CFGTBL_Trans_Performant;
5e216153
MM		 4087
4088 return;
4089clean_up:
4090 kfree(h->blockFetchTable);
4091 if (h->reply_pool)
4092 pci_free_consistent(h->pdev,
4093 h->max_commands * sizeof(__u64),
4094 h->reply_pool,
4095 h->reply_pool_dhandle);
4096 return;
4097
4098} /* cciss_put_controller_into_performant_mode */
4099
fb86a35b
MM		 4100/* If MSI/MSI-X is supported by the kernel we will try to enable it on
4101 * controllers that are capable. If not, we use IO-APIC mode.
4102 */
4103
8d85fce7 4104static void cciss_interrupt_mode(ctlr_info_t *h)
fb86a35b 4105{
c5c9b26e 4106 int ret;
fb86a35b
MM		 4107
4108 /* Some boards advertise MSI but don't really support it */
f70dba83
SC		 4109 if ((h->board_id == 0x40700E11) || (h->board_id == 0x40800E11) ||
4110 (h->board_id == 0x40820E11) || (h->board_id == 0x40830E11))
fb86a35b
MM		 4111 goto default_int_mode;
4112
c5c9b26e
CH		 4113 ret = pci_alloc_irq_vectors(h->pdev, 4, 4, PCI_IRQ_MSIX);
4114 if (ret >= 0) {
4115 h->intr[0] = pci_irq_vector(h->pdev, 0);
4116 h->intr[1] = pci_irq_vector(h->pdev, 1);
4117 h->intr[2] = pci_irq_vector(h->pdev, 2);
4118 h->intr[3] = pci_irq_vector(h->pdev, 3);
4119 return;
7c832835 4120 }
c5c9b26e
CH		 4121
4122 ret = pci_alloc_irq_vectors(h->pdev, 1, 1, PCI_IRQ_MSI);
4123
1ecb9c0f 4124default_int_mode:
fb86a35b 4125 /* if we get here we're going to use the default interrupt mode */
c5c9b26e 4126 h->intr[h->intr_mode] = pci_irq_vector(h->pdev, 0);
fb86a35b
MM		 4127 return;
4128}
4129
8d85fce7 4130static int cciss_lookup_board_id(struct pci_dev *pdev, u32 *board_id)
1da177e4 4131{
6539fa9b
SC		 4132 int i;
4133 u32 subsystem_vendor_id, subsystem_device_id;
2ec24ff1
SC		 4134
4135 subsystem_vendor_id = pdev->subsystem_vendor;
4136 subsystem_device_id = pdev->subsystem_device;
6539fa9b
SC		 4137 *board_id = ((subsystem_device_id << 16) & 0xffff0000) |
4138 subsystem_vendor_id;
2ec24ff1 4139
e4292e05
MM		 4140 for (i = 0; i < ARRAY_SIZE(products); i++) {
4141 /* Stand aside for hpsa driver on request */
4142 if (cciss_allow_hpsa)
4143 return -ENODEV;
6539fa9b
SC		 4144 if (*board_id == products[i].board_id)
4145 return i;
e4292e05 4146 }
6539fa9b
SC		 4147 dev_warn(&pdev->dev, "unrecognized board ID: 0x%08x, ignoring.\n",
4148 *board_id);
4149 return -ENODEV;
4150}
1da177e4 4151
dd9c426e
SC		 4152static inline bool cciss_board_disabled(ctlr_info_t *h)
4153{
4154 u16 command;
1da177e4 4155
dd9c426e
SC		 4156 (void) pci_read_config_word(h->pdev, PCI_COMMAND, &command);
4157 return ((command & PCI_COMMAND_MEMORY) == 0);
4158}
1da177e4 4159
8d85fce7
GKH		 4160static int cciss_pci_find_memory_BAR(struct pci_dev *pdev,
4161 unsigned long *memory_bar)
d474830d
SC		 4162{
4163 int i;
4e570309 4164
d474830d
SC		 4165 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++)
4166 if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) {
4167 /* addressing mode bits already removed */
4168 *memory_bar = pci_resource_start(pdev, i);
4169 dev_dbg(&pdev->dev, "memory BAR = %lx\n",
4170 *memory_bar);
4171 return 0;
4172 }
4173 dev_warn(&pdev->dev, "no memory BAR found\n");
4174 return -ENODEV;
4175}
1da177e4 4176
8d85fce7
GKH		 4177static int cciss_wait_for_board_state(struct pci_dev *pdev,
4178 void __iomem *vaddr, int wait_for_ready)
afa842fa
SC		 4179#define BOARD_READY 1
4180#define BOARD_NOT_READY 0
e99ba136 4181{
afa842fa 4182 int i, iterations;
e99ba136 4183 u32 scratchpad;
1da177e4 4184
afa842fa
SC		 4185 if (wait_for_ready)
4186 iterations = CCISS_BOARD_READY_ITERATIONS;
4187 else
4188 iterations = CCISS_BOARD_NOT_READY_ITERATIONS;
4189
4190 for (i = 0; i < iterations; i++) {
4191 scratchpad = readl(vaddr + SA5_SCRATCHPAD_OFFSET);
4192 if (wait_for_ready) {
4193 if (scratchpad == CCISS_FIRMWARE_READY)
4194 return 0;
4195 } else {
4196 if (scratchpad != CCISS_FIRMWARE_READY)
4197 return 0;
4198 }
e99ba136 4199 msleep(CCISS_BOARD_READY_POLL_INTERVAL_MSECS);
e1438581 4200 }
afa842fa 4201 dev_warn(&pdev->dev, "board not ready, timed out.\n");
e99ba136
SC		 4202 return -ENODEV;
4203}
e1438581 4204
8d85fce7
GKH		 4205static int cciss_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr,
4206 u32 *cfg_base_addr, u64 *cfg_base_addr_index,
4207 u64 *cfg_offset)
8e93bf6d
SC		 4208{
4209 *cfg_base_addr = readl(vaddr + SA5_CTCFG_OFFSET);
4210 *cfg_offset = readl(vaddr + SA5_CTMEM_OFFSET);
4211 *cfg_base_addr &= (u32) 0x0000ffff;
4212 *cfg_base_addr_index = find_PCI_BAR_index(pdev, *cfg_base_addr);
4213 if (*cfg_base_addr_index == -1) {
4214 dev_warn(&pdev->dev, "cannot find cfg_base_addr_index, "
4215 "*cfg_base_addr = 0x%08x\n", *cfg_base_addr);
4216 return -ENODEV;
4217 }
4218 return 0;
4219}
1da177e4 4220
8d85fce7 4221static int cciss_find_cfgtables(ctlr_info_t *h)
4809d098
SC		 4222{
4223 u64 cfg_offset;
4224 u32 cfg_base_addr;
4225 u64 cfg_base_addr_index;
4226 u32 trans_offset;
8e93bf6d 4227 int rc;
1da177e4 4228
8e93bf6d
SC		 4229 rc = cciss_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr,
4230 &cfg_base_addr_index, &cfg_offset);
4231 if (rc)
4232 return rc;
4809d098 4233 h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev,
d2b805d8 4234 cfg_base_addr_index) + cfg_offset, sizeof(*h->cfgtable));
4809d098
SC		 4235 if (!h->cfgtable)
4236 return -ENOMEM;
62710ae1
SC		 4237 rc = write_driver_ver_to_cfgtable(h->cfgtable);
4238 if (rc)
4239 return rc;
4809d098 4240 /* Find performant mode table. */
8e93bf6d 4241 trans_offset = readl(&h->cfgtable->TransMethodOffset);
4809d098
SC		 4242 h->transtable = remap_pci_mem(pci_resource_start(h->pdev,
4243 cfg_base_addr_index)+cfg_offset+trans_offset,
4244 sizeof(*h->transtable));
4245 if (!h->transtable)
4246 return -ENOMEM;
4247 return 0;
4248}
1da177e4 4249
8d85fce7 4250static void cciss_get_max_perf_mode_cmds(struct ctlr_info *h)
adfbc1ff
SC		 4251{
4252 h->max_commands = readl(&(h->cfgtable->MaxPerformantModeCommands));
186fb9cf
SC		 4253
4254 /* Limit commands in memory limited kdump scenario. */
4255 if (reset_devices && h->max_commands > 32)
4256 h->max_commands = 32;
4257
adfbc1ff
SC		 4258 if (h->max_commands < 16) {
4259 dev_warn(&h->pdev->dev, "Controller reports "
4260 "max supported commands of %d, an obvious lie. "
4261 "Using 16. Ensure that firmware is up to date.\n",
4262 h->max_commands);
4263 h->max_commands = 16;
1da177e4 4264 }
adfbc1ff 4265}
1da177e4 4266
afadbf4b
SC		 4267/* Interrogate the hardware for some limits:
4268 * max commands, max SG elements without chaining, and with chaining,
4269 * SG chain block size, etc.
4270 */
8d85fce7 4271static void cciss_find_board_params(ctlr_info_t *h)
afadbf4b 4272{
adfbc1ff 4273 cciss_get_max_perf_mode_cmds(h);
8a4ec67b 4274 h->nr_cmds = h->max_commands - 4 - cciss_tape_cmds;
afadbf4b 4275 h->maxsgentries = readl(&(h->cfgtable->MaxSGElements));
e7b18ede
MM		 4276 /*
4277 * The P600 may exhibit poor performnace under some workloads
4278 * if we use the value in the configuration table. Limit this
4279 * controller to MAXSGENTRIES (32) instead.
4280 */
4281 if (h->board_id == 0x3225103C)
4282 h->maxsgentries = MAXSGENTRIES;
5c07a311 4283 /*
afadbf4b 4284 * Limit in-command s/g elements to 32 save dma'able memory.
5c07a311
DB		 4285 * Howvever spec says if 0, use 31
4286 */
afadbf4b
SC		 4287 h->max_cmd_sgentries = 31;
4288 if (h->maxsgentries > 512) {
4289 h->max_cmd_sgentries = 32;
4290 h->chainsize = h->maxsgentries - h->max_cmd_sgentries + 1;
4291 h->maxsgentries--; /* save one for chain pointer */
5c07a311 4292 } else {
afadbf4b
SC		 4293 h->maxsgentries = 31; /* default to traditional values */
4294 h->chainsize = 0;
5c07a311 4295 }
afadbf4b 4296}
5c07a311 4297
501b92cd
SC		 4298static inline bool CISS_signature_present(ctlr_info_t *h)
4299{
d48c152a 4300 if (!check_signature(h->cfgtable->Signature, "CISS", 4)) {
501b92cd
SC		 4301 dev_warn(&h->pdev->dev, "not a valid CISS config table\n");
4302 return false;
1da177e4 4303 }
501b92cd
SC		 4304 return true;
4305}
4306
322e304c
SC		 4307/* Need to enable prefetch in the SCSI core for 6400 in x86 */
4308static inline void cciss_enable_scsi_prefetch(ctlr_info_t *h)
4309{
1da177e4 4310#ifdef CONFIG_X86
322e304c
SC		 4311 u32 prefetch;
4312
4313 prefetch = readl(&(h->cfgtable->SCSI_Prefetch));
4314 prefetch |= 0x100;
4315 writel(prefetch, &(h->cfgtable->SCSI_Prefetch));
1da177e4 4316#endif
322e304c 4317}
1da177e4 4318
bfd63ee5
SC		 4319/* Disable DMA prefetch for the P600. Otherwise an ASIC bug may result
4320 * in a prefetch beyond physical memory.
4321 */
4322static inline void cciss_p600_dma_prefetch_quirk(ctlr_info_t *h)
4323{
4324 u32 dma_prefetch;
4325 __u32 dma_refetch;
4326
4327 if (h->board_id != 0x3225103C)
4328 return;
4329 dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG);
4330 dma_prefetch |= 0x8000;
4331 writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG);
4332 pci_read_config_dword(h->pdev, PCI_COMMAND_PARITY, &dma_refetch);
4333 dma_refetch |= 0x1;
4334 pci_write_config_dword(h->pdev, PCI_COMMAND_PARITY, dma_refetch);
4335}
4336
8d85fce7 4337static int cciss_pci_init(ctlr_info_t *h)
6539fa9b 4338{
4809d098 4339 int prod_index, err;
6539fa9b 4340
f70dba83 4341 prod_index = cciss_lookup_board_id(h->pdev, &h->board_id);
6539fa9b 4342 if (prod_index < 0)
2ec24ff1 4343 return -ENODEV;
f70dba83
SC		 4344 h->product_name = products[prod_index].product_name;
4345 h->access = *(products[prod_index].access);
1da177e4 4346
f70dba83 4347 if (cciss_board_disabled(h)) {
b2a4a43d 4348 dev_warn(&h->pdev->dev, "controller appears to be disabled\n");
c33ac89b 4349 return -ENODEV;
1da177e4 4350 }
19373358
MG		 4351
4352 pci_disable_link_state(h->pdev, PCIE_LINK_STATE_L0S |
4353 PCIE_LINK_STATE_L1 | PCIE_LINK_STATE_CLKPM);
4354
f70dba83 4355 err = pci_enable_device(h->pdev);
7c832835 4356 if (err) {
b2a4a43d 4357 dev_warn(&h->pdev->dev, "Unable to Enable PCI device\n");
c33ac89b 4358 return err;
f92e2f5f
MM		 4359 }
4360
f70dba83 4361 err = pci_request_regions(h->pdev, "cciss");
4e570309 4362 if (err) {
b2a4a43d
SC		 4363 dev_warn(&h->pdev->dev,
4364 "Cannot obtain PCI resources, aborting\n");
872225ca 4365 return err;
4e570309 4366 }
1da177e4 4367
b2a4a43d
SC		 4368 dev_dbg(&h->pdev->dev, "irq = %x\n", h->pdev->irq);
4369 dev_dbg(&h->pdev->dev, "board_id = %x\n", h->board_id);
1da177e4 4370
fb86a35b
MM		 4371/* If the kernel supports MSI/MSI-X we will try to enable that functionality,
4372 * else we use the IO-APIC interrupt assigned to us by system ROM.
4373 */
f70dba83
SC		 4374 cciss_interrupt_mode(h);
4375 err = cciss_pci_find_memory_BAR(h->pdev, &h->paddr);
d474830d 4376 if (err)
e1438581 4377 goto err_out_free_res;
f70dba83
SC		 4378 h->vaddr = remap_pci_mem(h->paddr, 0x250);
4379 if (!h->vaddr) {
da550321
SC		 4380 err = -ENOMEM;
4381 goto err_out_free_res;
7c832835 4382 }
afa842fa 4383 err = cciss_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY);
e99ba136 4384 if (err)
4e570309 4385 goto err_out_free_res;
f70dba83 4386 err = cciss_find_cfgtables(h);
4809d098 4387 if (err)
4e570309 4388 goto err_out_free_res;
b2a4a43d 4389 print_cfg_table(h);
f70dba83 4390 cciss_find_board_params(h);
1da177e4 4391
f70dba83 4392 if (!CISS_signature_present(h)) {
c33ac89b 4393 err = -ENODEV;
4e570309 4394 goto err_out_free_res;
1da177e4 4395 }
f70dba83
SC		 4396 cciss_enable_scsi_prefetch(h);
4397 cciss_p600_dma_prefetch_quirk(h);
13049537
JH		 4398 err = cciss_enter_simple_mode(h);
4399 if (err)
4400 goto err_out_free_res;
f70dba83 4401 cciss_put_controller_into_performant_mode(h);
1da177e4
LT		 4402 return 0;
4403
5faad620 4404err_out_free_res:
872225ca
MM		 4405 /*
4406 * Deliberately omit pci_disable_device(): it does something nasty to
4407 * Smart Array controllers that pci_enable_device does not undo
4408 */
f70dba83
SC		 4409 if (h->transtable)
4410 iounmap(h->transtable);
4411 if (h->cfgtable)
4412 iounmap(h->cfgtable);
4413 if (h->vaddr)
4414 iounmap(h->vaddr);
4415 pci_release_regions(h->pdev);
c33ac89b 4416 return err;
1da177e4
LT		 4417}
4418
6ae5ce8e
MM		 4419/* Function to find the first free pointer into our hba[] array
4420 * Returns -1 if no free entries are left.
7c832835 4421 */
b2a4a43d 4422static int alloc_cciss_hba(struct pci_dev *pdev)
1da177e4 4423{
799202cb 4424 int i;
1da177e4 4425
7c832835 4426 for (i = 0; i < MAX_CTLR; i++) {
1da177e4 4427 if (!hba[i]) {
f70dba83 4428 ctlr_info_t *h;
f2912a12 4429
f70dba83
SC		 4430 h = kzalloc(sizeof(ctlr_info_t), GFP_KERNEL);
4431 if (!h)
1da177e4 4432 goto Enomem;
f70dba83 4433 hba[i] = h;
1da177e4
LT		 4434 return i;
4435 }
4436 }
b2a4a43d 4437 dev_warn(&pdev->dev, "This driver supports a maximum"
7c832835 4438 " of %d controllers.\n", MAX_CTLR);
799202cb
MM		 4439 return -1;
4440Enomem:
b2a4a43d 4441 dev_warn(&pdev->dev, "out of memory.\n");
1da177e4
LT		 4442 return -1;
4443}
4444
f70dba83 4445static void free_hba(ctlr_info_t *h)
1da177e4 4446{
2c935593 4447 int i;
1da177e4 4448
f70dba83 4449 hba[h->ctlr] = NULL;
2c935593
SC		 4450 for (i = 0; i < h->highest_lun + 1; i++)
4451 if (h->gendisk[i] != NULL)
4452 put_disk(h->gendisk[i]);
4453 kfree(h);
1da177e4
LT		 4454}
4455
82eb03cf 4456/* Send a message CDB to the firmware. */
8d85fce7
GKH		 4457static int cciss_message(struct pci_dev *pdev, unsigned char opcode,
4458 unsigned char type)
82eb03cf
CC		 4459{
4460 typedef struct {
4461 CommandListHeader_struct CommandHeader;
4462 RequestBlock_struct Request;
4463 ErrDescriptor_struct ErrorDescriptor;
4464 } Command;
4465 static const size_t cmd_sz = sizeof(Command) + sizeof(ErrorInfo_struct);
4466 Command *cmd;
4467 dma_addr_t paddr64;
4468 uint32_t paddr32, tag;
4469 void __iomem *vaddr;
4470 int i, err;
4471
4472 vaddr = ioremap_nocache(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0));
4473 if (vaddr == NULL)
4474 return -ENOMEM;
4475
4476 /* The Inbound Post Queue only accepts 32-bit physical addresses for the
4477 CCISS commands, so they must be allocated from the lower 4GiB of
4478 memory. */
e930438c 4479 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
82eb03cf
CC		 4480 if (err) {
4481 iounmap(vaddr);
4482 return -ENOMEM;
4483 }
4484
4485 cmd = pci_alloc_consistent(pdev, cmd_sz, &paddr64);
4486 if (cmd == NULL) {
4487 iounmap(vaddr);
4488 return -ENOMEM;
4489 }
4490
4491 /* This must fit, because of the 32-bit consistent DMA mask. Also,
4492 although there's no guarantee, we assume that the address is at
4493 least 4-byte aligned (most likely, it's page-aligned). */
4494 paddr32 = paddr64;
4495
4496 cmd->CommandHeader.ReplyQueue = 0;
4497 cmd->CommandHeader.SGList = 0;
4498 cmd->CommandHeader.SGTotal = 0;
4499 cmd->CommandHeader.Tag.lower = paddr32;
4500 cmd->CommandHeader.Tag.upper = 0;
4501 memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8);
4502
4503 cmd->Request.CDBLen = 16;
4504 cmd->Request.Type.Type = TYPE_MSG;
4505 cmd->Request.Type.Attribute = ATTR_HEADOFQUEUE;
4506 cmd->Request.Type.Direction = XFER_NONE;
4507 cmd->Request.Timeout = 0; /* Don't time out */
4508 cmd->Request.CDB[0] = opcode;
4509 cmd->Request.CDB[1] = type;
4510 memset(&cmd->Request.CDB[2], 0, 14); /* the rest of the CDB is reserved */
4511
4512 cmd->ErrorDescriptor.Addr.lower = paddr32 + sizeof(Command);
4513 cmd->ErrorDescriptor.Addr.upper = 0;
4514 cmd->ErrorDescriptor.Len = sizeof(ErrorInfo_struct);
4515
4516 writel(paddr32, vaddr + SA5_REQUEST_PORT_OFFSET);
4517
4518 for (i = 0; i < 10; i++) {
4519 tag = readl(vaddr + SA5_REPLY_PORT_OFFSET);
4520 if ((tag & ~3) == paddr32)
4521 break;
3e28601f 4522 msleep(CCISS_POST_RESET_NOOP_TIMEOUT_MSECS);
82eb03cf
CC		 4523 }
4524
4525 iounmap(vaddr);
4526
4527 /* we leak the DMA buffer here ... no choice since the controller could
4528 still complete the command. */
4529 if (i == 10) {
b2a4a43d
SC		 4530 dev_err(&pdev->dev,
4531 "controller message %02x:%02x timed out\n",
82eb03cf
CC		 4532 opcode, type);
4533 return -ETIMEDOUT;
4534 }
4535
4536 pci_free_consistent(pdev, cmd_sz, cmd, paddr64);
4537
4538 if (tag & 2) {
b2a4a43d 4539 dev_err(&pdev->dev, "controller message %02x:%02x failed\n",
82eb03cf
CC		 4540 opcode, type);
4541 return -EIO;
4542 }
4543
b2a4a43d 4544 dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n",
82eb03cf
CC		 4545 opcode, type);
4546 return 0;
4547}
4548
82eb03cf
CC		 4549#define cciss_noop(p) cciss_message(p, 3, 0)
4550
a6528d01 4551static int cciss_controller_hard_reset(struct pci_dev *pdev,
bf2e2e6b 4552 void * __iomem vaddr, u32 use_doorbell)
82eb03cf 4553{
a6528d01
SC		 4554 u16 pmcsr;
4555 int pos;
82eb03cf 4556
a6528d01
SC		 4557 if (use_doorbell) {
4558 /* For everything after the P600, the PCI power state method
4559 * of resetting the controller doesn't work, so we have this
4560 * other way using the doorbell register.
4561 */
4562 dev_info(&pdev->dev, "using doorbell to reset controller\n");
bf2e2e6b 4563 writel(use_doorbell, vaddr + SA5_DOORBELL);
a6528d01
SC		 4564 } else { /* Try to do it the PCI power state way */
4565
4566 /* Quoting from the Open CISS Specification: "The Power
4567 * Management Control/Status Register (CSR) controls the power
4568 * state of the device. The normal operating state is D0,
4569 * CSR=00h. The software off state is D3, CSR=03h. To reset
4570 * the controller, place the interface device in D3 then to D0,
4571 * this causes a secondary PCI reset which will reset the
4572 * controller." */
4573
4574 pos = pci_find_capability(pdev, PCI_CAP_ID_PM);
4575 if (pos == 0) {
4576 dev_err(&pdev->dev,
4577 "cciss_controller_hard_reset: "
4578 "PCI PM not supported\n");
4579 return -ENODEV;
4580 }
4581 dev_info(&pdev->dev, "using PCI PM to reset controller\n");
4582 /* enter the D3hot power management state */
4583 pci_read_config_word(pdev, pos + PCI_PM_CTRL, &pmcsr);
4584 pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
4585 pmcsr |= PCI_D3hot;
4586 pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
82eb03cf 4587
a6528d01 4588 msleep(500);
82eb03cf 4589
a6528d01
SC		 4590 /* enter the D0 power management state */
4591 pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
4592 pmcsr |= PCI_D0;
4593 pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
ab5dbebe
MM		 4594
4595 /*
4596 * The P600 requires a small delay when changing states.
4597 * Otherwise we may think the board did not reset and we bail.
4598 * This for kdump only and is particular to the P600.
4599 */
4600 msleep(500);
a6528d01
SC		 4601 }
4602 return 0;
4603}
82eb03cf 4604
8d85fce7 4605static void init_driver_version(char *driver_version, int len)
62710ae1
SC		 4606{
4607 memset(driver_version, 0, len);
4608 strncpy(driver_version, "cciss " DRIVER_NAME, len - 1);
4609}
4610
8d85fce7 4611static int write_driver_ver_to_cfgtable(CfgTable_struct __iomem *cfgtable)
62710ae1
SC		 4612{
4613 char *driver_version;
4614 int i, size = sizeof(cfgtable->driver_version);
4615
4616 driver_version = kmalloc(size, GFP_KERNEL);
4617 if (!driver_version)
4618 return -ENOMEM;
4619
4620 init_driver_version(driver_version, size);
4621 for (i = 0; i < size; i++)
4622 writeb(driver_version[i], &cfgtable->driver_version[i]);
4623 kfree(driver_version);
4624 return 0;
4625}
4626
8d85fce7
GKH		 4627static void read_driver_ver_from_cfgtable(CfgTable_struct __iomem *cfgtable,
4628 unsigned char *driver_ver)
62710ae1
SC		 4629{
4630 int i;
4631
4632 for (i = 0; i < sizeof(cfgtable->driver_version); i++)
4633 driver_ver[i] = readb(&cfgtable->driver_version[i]);
4634}
4635
8d85fce7 4636static int controller_reset_failed(CfgTable_struct __iomem *cfgtable)
62710ae1
SC		 4637{
4638
4639 char *driver_ver, *old_driver_ver;
4640 int rc, size = sizeof(cfgtable->driver_version);
4641
4642 old_driver_ver = kmalloc(2 * size, GFP_KERNEL);
4643 if (!old_driver_ver)
4644 return -ENOMEM;
4645 driver_ver = old_driver_ver + size;
4646
4647 /* After a reset, the 32 bytes of "driver version" in the cfgtable
4648 * should have been changed, otherwise we know the reset failed.
4649 */
4650 init_driver_version(old_driver_ver, size);
4651 read_driver_ver_from_cfgtable(cfgtable, driver_ver);
4652 rc = !memcmp(driver_ver, old_driver_ver, size);
4653 kfree(old_driver_ver);
4654 return rc;
4655}
4656
a6528d01
SC		 4657/* This does a hard reset of the controller using PCI power management
4658 * states or using the doorbell register. */
8d85fce7 4659static int cciss_kdump_hard_reset_controller(struct pci_dev *pdev)
a6528d01 4660{
a6528d01
SC		 4661 u64 cfg_offset;
4662 u32 cfg_base_addr;
4663 u64 cfg_base_addr_index;
4664 void __iomem *vaddr;
4665 unsigned long paddr;
62710ae1 4666 u32 misc_fw_support;
f442e64b 4667 int rc;
a6528d01 4668 CfgTable_struct __iomem *cfgtable;
bf2e2e6b 4669 u32 use_doorbell;
058a0f9f 4670 u32 board_id;
f442e64b 4671 u16 command_register;
a6528d01
SC		 4672
4673 /* For controllers as old a the p600, this is very nearly
4674 * the same thing as
4675 *
4676 * pci_save_state(pci_dev);
4677 * pci_set_power_state(pci_dev, PCI_D3hot);
4678 * pci_set_power_state(pci_dev, PCI_D0);
4679 * pci_restore_state(pci_dev);
4680 *
a6528d01
SC		 4681 * For controllers newer than the P600, the pci power state
4682 * method of resetting doesn't work so we have another way
4683 * using the doorbell register.
4684 */
82eb03cf 4685
058a0f9f
SC		 4686 /* Exclude 640x boards. These are two pci devices in one slot
4687 * which share a battery backed cache module. One controls the
4688 * cache, the other accesses the cache through the one that controls
4689 * it. If we reset the one controlling the cache, the other will
4690 * likely not be happy. Just forbid resetting this conjoined mess.
4691 */
4692 cciss_lookup_board_id(pdev, &board_id);
ec52d5f1 4693 if (!ctlr_is_resettable(board_id)) {
b9ea9dcd 4694 dev_warn(&pdev->dev, "Controller not resettable\n");
82eb03cf
CC		 4695 return -ENODEV;
4696 }
4697
ec52d5f1
SC		 4698 /* if controller is soft- but not hard resettable... */
4699 if (!ctlr_is_hard_resettable(board_id))
4700 return -ENOTSUPP; /* try soft reset later. */
4701
f442e64b
SC		 4702 /* Save the PCI command register */
4703 pci_read_config_word(pdev, 4, &command_register);
4704 /* Turn the board off. This is so that later pci_restore_state()
4705 * won't turn the board on before the rest of config space is ready.
4706 */
4707 pci_disable_device(pdev);
4708 pci_save_state(pdev);
82eb03cf 4709
a6528d01
SC		 4710 /* find the first memory BAR, so we can find the cfg table */
4711 rc = cciss_pci_find_memory_BAR(pdev, &paddr);
4712 if (rc)
4713 return rc;
4714 vaddr = remap_pci_mem(paddr, 0x250);
4715 if (!vaddr)
4716 return -ENOMEM;
82eb03cf 4717
a6528d01
SC		 4718 /* find cfgtable in order to check if reset via doorbell is supported */
4719 rc = cciss_find_cfg_addrs(pdev, vaddr, &cfg_base_addr,
4720 &cfg_base_addr_index, &cfg_offset);
4721 if (rc)
4722 goto unmap_vaddr;
4723 cfgtable = remap_pci_mem(pci_resource_start(pdev,
4724 cfg_base_addr_index) + cfg_offset, sizeof(*cfgtable));
4725 if (!cfgtable) {
4726 rc = -ENOMEM;
4727 goto unmap_vaddr;
4728 }
62710ae1
SC		 4729 rc = write_driver_ver_to_cfgtable(cfgtable);
4730 if (rc)
4731 goto unmap_vaddr;
82eb03cf 4732
bf2e2e6b
SC		 4733 /* If reset via doorbell register is supported, use that.
4734 * There are two such methods. Favor the newest method.
75230ff2 4735 */
bf2e2e6b
SC		 4736 misc_fw_support = readl(&cfgtable->misc_fw_support);
4737 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET2;
4738 if (use_doorbell) {
4739 use_doorbell = DOORBELL_CTLR_RESET2;
4740 } else {
4741 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET;
063d2cf7
SC		 4742 if (use_doorbell) {
4743 dev_warn(&pdev->dev, "Controller claims that "
4744 "'Bit 2 doorbell reset' is "
4745 "supported, but not 'bit 5 doorbell reset'. "
4746 "Firmware update is recommended.\n");
4747 rc = -ENOTSUPP; /* use the soft reset */
4748 goto unmap_cfgtable;
4749 }
bf2e2e6b 4750 }
75230ff2 4751
a6528d01
SC		 4752 rc = cciss_controller_hard_reset(pdev, vaddr, use_doorbell);
4753 if (rc)
4754 goto unmap_cfgtable;
f442e64b
SC		 4755 pci_restore_state(pdev);
4756 rc = pci_enable_device(pdev);
4757 if (rc) {
4758 dev_warn(&pdev->dev, "failed to enable device.\n");
4759 goto unmap_cfgtable;
82eb03cf 4760 }
f442e64b 4761 pci_write_config_word(pdev, 4, command_register);
82eb03cf 4762
a6528d01
SC		 4763 /* Some devices (notably the HP Smart Array 5i Controller)
4764 need a little pause here */
4765 msleep(CCISS_POST_RESET_PAUSE_MSECS);
4766
afa842fa 4767 /* Wait for board to become not ready, then ready. */
59ec86bb 4768 dev_info(&pdev->dev, "Waiting for board to reset.\n");
afa842fa 4769 rc = cciss_wait_for_board_state(pdev, vaddr, BOARD_NOT_READY);
5afe2781
SC		 4770 if (rc) {
4771 dev_warn(&pdev->dev, "Failed waiting for board to hard reset."
4772 " Will try soft reset.\n");
4773 rc = -ENOTSUPP; /* Not expected, but try soft reset later */
4774 goto unmap_cfgtable;
4775 }
afa842fa
SC		 4776 rc = cciss_wait_for_board_state(pdev, vaddr, BOARD_READY);
4777 if (rc) {
4778 dev_warn(&pdev->dev,
5afe2781
SC		 4779 "failed waiting for board to become ready "
4780 "after hard reset\n");
afa842fa
SC		 4781 goto unmap_cfgtable;
4782 }
afa842fa 4783
62710ae1
SC		 4784 rc = controller_reset_failed(vaddr);
4785 if (rc < 0)
4786 goto unmap_cfgtable;
4787 if (rc) {
5afe2781
SC		 4788 dev_warn(&pdev->dev, "Unable to successfully hard reset "
4789 "controller. Will try soft reset.\n");
4790 rc = -ENOTSUPP; /* Not expected, but try soft reset later */
62710ae1 4791 } else {
5afe2781 4792 dev_info(&pdev->dev, "Board ready after hard reset.\n");
a6528d01
SC		 4793 }
4794
4795unmap_cfgtable:
4796 iounmap(cfgtable);
4797
4798unmap_vaddr:
4799 iounmap(vaddr);
4800 return rc;
82eb03cf
CC		 4801}
4802
8d85fce7 4803static int cciss_init_reset_devices(struct pci_dev *pdev)
83123cb1 4804{
a6528d01 4805 int rc, i;
83123cb1
SC		 4806
4807 if (!reset_devices)
4808 return 0;
4809
a6528d01
SC		 4810 /* Reset the controller with a PCI power-cycle or via doorbell */
4811 rc = cciss_kdump_hard_reset_controller(pdev);
83123cb1 4812
a6528d01
SC		 4813 /* -ENOTSUPP here means we cannot reset the controller
4814 * but it's already (and still) up and running in
058a0f9f
SC		 4815 * "performant mode". Or, it might be 640x, which can't reset
4816 * due to concerns about shared bbwc between 6402/6404 pair.
a6528d01
SC		 4817 */
4818 if (rc == -ENOTSUPP)
5afe2781 4819 return rc; /* just try to do the kdump anyhow. */
a6528d01
SC		 4820 if (rc)
4821 return -ENODEV;
83123cb1
SC		 4822
4823 /* Now try to get the controller to respond to a no-op */
59ec86bb 4824 dev_warn(&pdev->dev, "Waiting for controller to respond to no-op\n");
83123cb1
SC		 4825 for (i = 0; i < CCISS_POST_RESET_NOOP_RETRIES; i++) {
4826 if (cciss_noop(pdev) == 0)
4827 break;
4828 else
4829 dev_warn(&pdev->dev, "no-op failed%s\n",
4830 (i < CCISS_POST_RESET_NOOP_RETRIES - 1 ?
4831 "; re-trying" : ""));
4832 msleep(CCISS_POST_RESET_NOOP_INTERVAL_MSECS);
4833 }
82eb03cf
CC		 4834 return 0;
4835}
4836
8d85fce7 4837static int cciss_allocate_cmd_pool(ctlr_info_t *h)
54dae343 4838{
1f118bc4 4839 h->cmd_pool_bits = kmalloc(BITS_TO_LONGS(h->nr_cmds) *
54dae343
SC		 4840 sizeof(unsigned long), GFP_KERNEL);
4841 h->cmd_pool = pci_alloc_consistent(h->pdev,
4842 h->nr_cmds * sizeof(CommandList_struct),
4843 &(h->cmd_pool_dhandle));
4844 h->errinfo_pool = pci_alloc_consistent(h->pdev,
4845 h->nr_cmds * sizeof(ErrorInfo_struct),
4846 &(h->errinfo_pool_dhandle));
4847 if ((h->cmd_pool_bits == NULL)
4848 || (h->cmd_pool == NULL)
4849 || (h->errinfo_pool == NULL)) {
4850 dev_err(&h->pdev->dev, "out of memory");
4851 return -ENOMEM;
4852 }
4853 return 0;
4854}
4855
8d85fce7 4856static int cciss_allocate_scatterlists(ctlr_info_t *h)
abf7966e
SC		 4857{
4858 int i;
4859
4860 /* zero it, so that on free we need not know how many were alloc'ed */
4861 h->scatter_list = kzalloc(h->max_commands *
4862 sizeof(struct scatterlist *), GFP_KERNEL);
4863 if (!h->scatter_list)
4864 return -ENOMEM;
4865
4866 for (i = 0; i < h->nr_cmds; i++) {
4867 h->scatter_list[i] = kmalloc(sizeof(struct scatterlist) *
4868 h->maxsgentries, GFP_KERNEL);
4869 if (h->scatter_list[i] == NULL) {
4870 dev_err(&h->pdev->dev, "could not allocate "
4871 "s/g lists\n");
4872 return -ENOMEM;
4873 }
4874 }
4875 return 0;
4876}
4877
4878static void cciss_free_scatterlists(ctlr_info_t *h)
4879{
4880 int i;
4881
4882 if (h->scatter_list) {
4883 for (i = 0; i < h->nr_cmds; i++)
4884 kfree(h->scatter_list[i]);
4885 kfree(h->scatter_list);
4886 }
4887}
4888
54dae343
SC		 4889static void cciss_free_cmd_pool(ctlr_info_t *h)
4890{
4891 kfree(h->cmd_pool_bits);
4892 if (h->cmd_pool)
4893 pci_free_consistent(h->pdev,
4894 h->nr_cmds * sizeof(CommandList_struct),
4895 h->cmd_pool, h->cmd_pool_dhandle);
4896 if (h->errinfo_pool)
4897 pci_free_consistent(h->pdev,
4898 h->nr_cmds * sizeof(ErrorInfo_struct),
4899 h->errinfo_pool, h->errinfo_pool_dhandle);
4900}
4901
2b48085f
SC		 4902static int cciss_request_irq(ctlr_info_t *h,
4903 irqreturn_t (*msixhandler)(int, void *),
4904 irqreturn_t (*intxhandler)(int, void *))
4905{
c5c9b26e 4906 if (h->pdev->msi_enabled || h->pdev->msix_enabled) {
13049537 4907 if (!request_irq(h->intr[h->intr_mode], msixhandler,
6225da48 4908 0, h->devname, h))
2b48085f
SC		 4909 return 0;
4910 dev_err(&h->pdev->dev, "Unable to get msi irq %d"
13049537 4911 " for %s\n", h->intr[h->intr_mode],
2b48085f
SC		 4912 h->devname);
4913 return -1;
4914 }
4915
13049537 4916 if (!request_irq(h->intr[h->intr_mode], intxhandler,
6225da48 4917 IRQF_SHARED, h->devname, h))
2b48085f
SC		 4918 return 0;
4919 dev_err(&h->pdev->dev, "Unable to get irq %d for %s\n",
13049537 4920 h->intr[h->intr_mode], h->devname);
2b48085f
SC		 4921 return -1;
4922}
4923
8d85fce7 4924static int cciss_kdump_soft_reset(ctlr_info_t *h)
5afe2781
SC		 4925{
4926 if (cciss_send_reset(h, CTLR_LUNID, CCISS_RESET_TYPE_CONTROLLER)) {
4927 dev_warn(&h->pdev->dev, "Resetting array controller failed.\n");
4928 return -EIO;
4929 }
4930
4931 dev_info(&h->pdev->dev, "Waiting for board to soft reset.\n");
4932 if (cciss_wait_for_board_state(h->pdev, h->vaddr, BOARD_NOT_READY)) {
4933 dev_warn(&h->pdev->dev, "Soft reset had no effect.\n");
4934 return -1;
4935 }
4936
4937 dev_info(&h->pdev->dev, "Board reset, awaiting READY status.\n");
4938 if (cciss_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY)) {
4939 dev_warn(&h->pdev->dev, "Board failed to become ready "
4940 "after soft reset.\n");
4941 return -1;
4942 }
4943
4944 return 0;
4945}
4946
4947static void cciss_undo_allocations_after_kdump_soft_reset(ctlr_info_t *h)
4948{
4949 int ctlr = h->ctlr;
4950
13049537 4951 free_irq(h->intr[h->intr_mode], h);
c5c9b26e 4952 pci_free_irq_vectors(h->pdev);
5afe2781
SC		 4953 cciss_free_sg_chain_blocks(h->cmd_sg_list, h->nr_cmds);
4954 cciss_free_scatterlists(h);
4955 cciss_free_cmd_pool(h);
4956 kfree(h->blockFetchTable);
4957 if (h->reply_pool)
4958 pci_free_consistent(h->pdev, h->max_commands * sizeof(__u64),
4959 h->reply_pool, h->reply_pool_dhandle);
4960 if (h->transtable)
4961 iounmap(h->transtable);
4962 if (h->cfgtable)
4963 iounmap(h->cfgtable);
4964 if (h->vaddr)
4965 iounmap(h->vaddr);
4966 unregister_blkdev(h->major, h->devname);
4967 cciss_destroy_hba_sysfs_entry(h);
4968 pci_release_regions(h->pdev);
4969 kfree(h);
4970 hba[ctlr] = NULL;
4971}
4972
1da177e4
LT		 4973/*
4974 * This is it. Find all the controllers and register them. I really hate
4975 * stealing all these major device numbers.
4976 * returns the number of block devices registered.
4977 */
8d85fce7 4978static int cciss_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
1da177e4 4979{
1da177e4 4980 int i;
799202cb 4981 int j = 0;
1da177e4 4982 int rc;
5afe2781 4983 int try_soft_reset = 0;
22bece00 4984 int dac, return_code;
212a5026 4985 InquiryData_struct *inq_buff;
f70dba83 4986 ctlr_info_t *h;
5afe2781 4987 unsigned long flags;
1da177e4 4988
0821e904
MM		 4989 /*
4990 * By default the cciss driver is used for all older HP Smart Array
4991 * controllers. There are module paramaters that allow a user to
4992 * override this behavior and instead use the hpsa SCSI driver. If
4993 * this is the case cciss may be loaded first from the kdump initrd
4994 * image and cause a kernel panic. So if reset_devices is true and
4995 * cciss_allow_hpsa is set just bail.
4996 */
4997 if ((reset_devices) && (cciss_allow_hpsa == 1))
4998 return -ENODEV;
83123cb1 4999 rc = cciss_init_reset_devices(pdev);
5afe2781
SC		 5000 if (rc) {
5001 if (rc != -ENOTSUPP)
5002 return rc;
5003 /* If the reset fails in a particular way (it has no way to do
5004 * a proper hard reset, so returns -ENOTSUPP) we can try to do
5005 * a soft reset once we get the controller configured up to the
5006 * point that it can accept a command.
5007 */
5008 try_soft_reset = 1;
5009 rc = 0;
5010 }
5011
5012reinit_after_soft_reset:
5013
b2a4a43d 5014 i = alloc_cciss_hba(pdev);
7c832835 5015 if (i < 0)
4336548a 5016 return -ENOMEM;
1f8ef380 5017
f70dba83
SC		 5018 h = hba[i];
5019 h->pdev = pdev;
5020 h->busy_initializing = 1;
13049537 5021 h->intr_mode = cciss_simple_mode ? SIMPLE_MODE_INT : PERF_MODE_INT;
e6e1ee93
JA		 5022 INIT_LIST_HEAD(&h->cmpQ);
5023 INIT_LIST_HEAD(&h->reqQ);
f70dba83 5024 mutex_init(&h->busy_shutting_down);
1f8ef380 5025
f70dba83 5026 if (cciss_pci_init(h) != 0)
2cfa948c 5027 goto clean_no_release_regions;
1da177e4 5028
f70dba83
SC		 5029 sprintf(h->devname, "cciss%d", i);
5030 h->ctlr = i;
1da177e4 5031
8a4ec67b
SC		 5032 if (cciss_tape_cmds < 2)
5033 cciss_tape_cmds = 2;
5034 if (cciss_tape_cmds > 16)
5035 cciss_tape_cmds = 16;
5036
f70dba83 5037 init_completion(&h->scan_wait);
b368c9dd 5038
f70dba83 5039 if (cciss_create_hba_sysfs_entry(h))
7fe06326
AP		 5040 goto clean0;
5041
1da177e4 5042 /* configure PCI DMA stuff */
6a35528a 5043 if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(64)))
40aabb58 5044 dac = 1;
284901a9 5045 else if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32)))
40aabb58 5046 dac = 0;
1da177e4 5047 else {
b2a4a43d 5048 dev_err(&h->pdev->dev, "no suitable DMA available\n");
1da177e4
LT		 5049 goto clean1;
5050 }
5051
5052 /*
5053 * register with the major number, or get a dynamic major number
5054 * by passing 0 as argument. This is done for greater than
5055 * 8 controller support.
5056 */
5057 if (i < MAX_CTLR_ORIG)
f70dba83
SC		 5058 h->major = COMPAQ_CISS_MAJOR + i;
5059 rc = register_blkdev(h->major, h->devname);
7c832835 5060 if (rc == -EBUSY || rc == -EINVAL) {
b2a4a43d
SC		 5061 dev_err(&h->pdev->dev,
5062 "Unable to get major number %d for %s "
f70dba83 5063 "on hba %d\n", h->major, h->devname, i);
1da177e4 5064 goto clean1;
7c832835 5065 } else {
1da177e4 5066 if (i >= MAX_CTLR_ORIG)
f70dba83 5067 h->major = rc;
1da177e4
LT		 5068 }
5069
5070 /* make sure the board interrupts are off */
f70dba83 5071 h->access.set_intr_mask(h, CCISS_INTR_OFF);
2b48085f
SC		 5072 rc = cciss_request_irq(h, do_cciss_msix_intr, do_cciss_intx);
5073 if (rc)
5074 goto clean2;
40aabb58 5075
b2a4a43d 5076 dev_info(&h->pdev->dev, "%s: <0x%x> at PCI %s IRQ %d%s using DAC\n",
f70dba83 5077 h->devname, pdev->device, pci_name(pdev),
13049537 5078 h->intr[h->intr_mode], dac ? "" : " not");
7c832835 5079
54dae343 5080 if (cciss_allocate_cmd_pool(h))
1da177e4 5081 goto clean4;
5c07a311 5082
abf7966e 5083 if (cciss_allocate_scatterlists(h))
4ee69851
DC		 5084 goto clean4;
5085
f70dba83
SC		 5086 h->cmd_sg_list = cciss_allocate_sg_chain_blocks(h,
5087 h->chainsize, h->nr_cmds);
5088 if (!h->cmd_sg_list && h->chainsize > 0)
5c07a311 5089 goto clean4;
5c07a311 5090
f70dba83 5091 spin_lock_init(&h->lock);
1da177e4 5092
7c832835 5093 /* Initialize the pdev driver private data.
f70dba83
SC		 5094 have it point to h. */
5095 pci_set_drvdata(pdev, h);
7c832835
BH		 5096 /* command and error info recs zeroed out before
5097 they are used */
1f118bc4 5098 bitmap_zero(h->cmd_pool_bits, h->nr_cmds);
1da177e4 5099
f70dba83
SC		 5100 h->num_luns = 0;
5101 h->highest_lun = -1;
6ae5ce8e 5102 for (j = 0; j < CISS_MAX_LUN; j++) {
f70dba83
SC		 5103 h->drv[j] = NULL;
5104 h->gendisk[j] = NULL;
6ae5ce8e 5105 }
1da177e4 5106
5afe2781
SC		 5107 /* At this point, the controller is ready to take commands.
5108 * Now, if reset_devices and the hard reset didn't work, try
5109 * the soft reset and see if that works.
5110 */
5111 if (try_soft_reset) {
5112
5113 /* This is kind of gross. We may or may not get a completion
5114 * from the soft reset command, and if we do, then the value
5115 * from the fifo may or may not be valid. So, we wait 10 secs
5116 * after the reset throwing away any completions we get during
5117 * that time. Unregister the interrupt handler and register
5118 * fake ones to scoop up any residual completions.
5119 */
5120 spin_lock_irqsave(&h->lock, flags);
5121 h->access.set_intr_mask(h, CCISS_INTR_OFF);
5122 spin_unlock_irqrestore(&h->lock, flags);
13049537 5123 free_irq(h->intr[h->intr_mode], h);
5afe2781
SC		 5124 rc = cciss_request_irq(h, cciss_msix_discard_completions,
5125 cciss_intx_discard_completions);
5126 if (rc) {
5127 dev_warn(&h->pdev->dev, "Failed to request_irq after "
5128 "soft reset.\n");
5129 goto clean4;
5130 }
5131
5132 rc = cciss_kdump_soft_reset(h);
5133 if (rc) {
5134 dev_warn(&h->pdev->dev, "Soft reset failed.\n");
5135 goto clean4;
5136 }
5137
5138 dev_info(&h->pdev->dev, "Board READY.\n");
5139 dev_info(&h->pdev->dev,
5140 "Waiting for stale completions to drain.\n");
5141 h->access.set_intr_mask(h, CCISS_INTR_ON);
5142 msleep(10000);
5143 h->access.set_intr_mask(h, CCISS_INTR_OFF);
5144
5145 rc = controller_reset_failed(h->cfgtable);
5146 if (rc)
5147 dev_info(&h->pdev->dev,
5148 "Soft reset appears to have failed.\n");
5149
5150 /* since the controller's reset, we have to go back and re-init
5151 * everything. Easiest to just forget what we've done and do it
5152 * all over again.
5153 */
5154 cciss_undo_allocations_after_kdump_soft_reset(h);
5155 try_soft_reset = 0;
5156 if (rc)
5157 /* don't go to clean4, we already unallocated */
5158 return -ENODEV;
5159
5160 goto reinit_after_soft_reset;
5161 }
5162
f70dba83 5163 cciss_scsi_setup(h);
1da177e4
LT		 5164
5165 /* Turn the interrupts on so we can service requests */
f70dba83 5166 h->access.set_intr_mask(h, CCISS_INTR_ON);
1da177e4 5167
22bece00
MM		 5168 /* Get the firmware version */
5169 inq_buff = kzalloc(sizeof(InquiryData_struct), GFP_KERNEL);
5170 if (inq_buff == NULL) {
b2a4a43d 5171 dev_err(&h->pdev->dev, "out of memory\n");
22bece00
MM		 5172 goto clean4;
5173 }
5174
f70dba83 5175 return_code = sendcmd_withirq(h, CISS_INQUIRY, inq_buff,
b57695fe 5176 sizeof(InquiryData_struct), 0, CTLR_LUNID, TYPE_CMD);
22bece00 5177 if (return_code == IO_OK) {
f70dba83
SC		 5178 h->firm_ver[0] = inq_buff->data_byte[32];
5179 h->firm_ver[1] = inq_buff->data_byte[33];
5180 h->firm_ver[2] = inq_buff->data_byte[34];
5181 h->firm_ver[3] = inq_buff->data_byte[35];
22bece00 5182 } else { /* send command failed */
b2a4a43d 5183 dev_warn(&h->pdev->dev, "unable to determine firmware"
22bece00
MM		 5184 " version of controller\n");
5185 }
212a5026 5186 kfree(inq_buff);
22bece00 5187
f70dba83 5188 cciss_procinit(h);
92c4231a 5189
f70dba83 5190 h->cciss_max_sectors = 8192;
92c4231a 5191
f70dba83 5192 rebuild_lun_table(h, 1, 0);
0007a4c9 5193 cciss_engage_scsi(h);
f70dba83 5194 h->busy_initializing = 0;
b88fac63 5195 return 0;
1da177e4 5196
6ae5ce8e 5197clean4:
54dae343 5198 cciss_free_cmd_pool(h);
abf7966e 5199 cciss_free_scatterlists(h);
f70dba83 5200 cciss_free_sg_chain_blocks(h->cmd_sg_list, h->nr_cmds);
13049537 5201 free_irq(h->intr[h->intr_mode], h);
6ae5ce8e 5202clean2:
f70dba83 5203 unregister_blkdev(h->major, h->devname);
6ae5ce8e 5204clean1:
f70dba83 5205 cciss_destroy_hba_sysfs_entry(h);
7fe06326 5206clean0:
2cfa948c
SC		 5207 pci_release_regions(pdev);
5208clean_no_release_regions:
f70dba83 5209 h->busy_initializing = 0;
9cef0d2f 5210
872225ca
MM		 5211 /*
5212 * Deliberately omit pci_disable_device(): it does something nasty to
5213 * Smart Array controllers that pci_enable_device does not undo
5214 */
799202cb 5215 pci_set_drvdata(pdev, NULL);
f70dba83 5216 free_hba(h);
4336548a 5217 return -ENODEV;
1da177e4
LT		 5218}
5219
e9ca75b5 5220static void cciss_shutdown(struct pci_dev *pdev)
1da177e4 5221{
29009a03
SC		 5222 ctlr_info_t *h;
5223 char *flush_buf;
7c832835 5224 int return_code;
1da177e4 5225
29009a03
SC		 5226 h = pci_get_drvdata(pdev);
5227 flush_buf = kzalloc(4, GFP_KERNEL);
5228 if (!flush_buf) {
b2a4a43d 5229 dev_warn(&h->pdev->dev, "cache not flushed, out of memory.\n");
e9ca75b5 5230 return;
e9ca75b5 5231 }
29009a03 5232 /* write all data in the battery backed cache to disk */
f70dba83 5233 return_code = sendcmd_withirq(h, CCISS_CACHE_FLUSH, flush_buf,
29009a03
SC		 5234 4, 0, CTLR_LUNID, TYPE_CMD);
5235 kfree(flush_buf);
5236 if (return_code != IO_OK)
b2a4a43d 5237 dev_warn(&h->pdev->dev, "Error flushing cache\n");
29009a03 5238 h->access.set_intr_mask(h, CCISS_INTR_OFF);
13049537 5239 free_irq(h->intr[h->intr_mode], h);
e9ca75b5
GB		 5240}
5241
8d85fce7 5242static int cciss_enter_simple_mode(struct ctlr_info *h)
13049537
JH		 5243{
5244 u32 trans_support;
5245
5246 trans_support = readl(&(h->cfgtable->TransportSupport));
5247 if (!(trans_support & SIMPLE_MODE))
5248 return -ENOTSUPP;
5249
5250 h->max_commands = readl(&(h->cfgtable->CmdsOutMax));
5251 writel(CFGTBL_Trans_Simple, &(h->cfgtable->HostWrite.TransportRequest));
5252 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
5253 cciss_wait_for_mode_change_ack(h);
5254 print_cfg_table(h);
5255 if (!(readl(&(h->cfgtable->TransportActive)) & CFGTBL_Trans_Simple)) {
5256 dev_warn(&h->pdev->dev, "unable to get board into simple mode\n");
5257 return -ENODEV;
5258 }
5259 h->transMethod = CFGTBL_Trans_Simple;
5260 return 0;
5261}
5262
5263
8d85fce7 5264static void cciss_remove_one(struct pci_dev *pdev)
e9ca75b5 5265{
f70dba83 5266 ctlr_info_t *h;
e9ca75b5
GB		 5267 int i, j;
5268
7c832835 5269 if (pci_get_drvdata(pdev) == NULL) {
b2a4a43d 5270 dev_err(&pdev->dev, "Unable to remove device\n");
1da177e4
LT		 5271 return;
5272 }
0a9279cc 5273
f70dba83
SC		 5274 h = pci_get_drvdata(pdev);
5275 i = h->ctlr;
7c832835 5276 if (hba[i] == NULL) {
b2a4a43d 5277 dev_err(&pdev->dev, "device appears to already be removed\n");
1da177e4
LT		 5278 return;
5279 }
b6550777 5280
f70dba83 5281 mutex_lock(&h->busy_shutting_down);
0a9279cc 5282
f70dba83
SC		 5283 remove_from_scan_list(h);
5284 remove_proc_entry(h->devname, proc_cciss);
5285 unregister_blkdev(h->major, h->devname);
b6550777
BH		 5286
5287 /* remove it from the disk list */
5288 for (j = 0; j < CISS_MAX_LUN; j++) {
f70dba83 5289 struct gendisk *disk = h->gendisk[j];
b6550777 5290 if (disk) {
165125e1 5291 struct request_queue *q = disk->queue;
b6550777 5292
097d0264 5293 if (disk->flags & GENHD_FL_UP) {
f70dba83 5294 cciss_destroy_ld_sysfs_entry(h, j, 1);
b6550777 5295 del_gendisk(disk);
097d0264 5296 }
b6550777
BH		 5297 if (q)
5298 blk_cleanup_queue(q);
5299 }
5300 }
5301
ba198efb 5302#ifdef CONFIG_CISS_SCSI_TAPE
f70dba83 5303 cciss_unregister_scsi(h); /* unhook from SCSI subsystem */
ba198efb 5304#endif
b6550777 5305
e9ca75b5 5306 cciss_shutdown(pdev);
fb86a35b 5307
c5c9b26e 5308 pci_free_irq_vectors(h->pdev);
fb86a35b 5309
f70dba83
SC		 5310 iounmap(h->transtable);
5311 iounmap(h->cfgtable);
5312 iounmap(h->vaddr);
1da177e4 5313
54dae343 5314 cciss_free_cmd_pool(h);
5c07a311 5315 /* Free up sg elements */
f70dba83
SC		 5316 for (j = 0; j < h->nr_cmds; j++)
5317 kfree(h->scatter_list[j]);
5318 kfree(h->scatter_list);
5319 cciss_free_sg_chain_blocks(h->cmd_sg_list, h->nr_cmds);
e363e014
SC		 5320 kfree(h->blockFetchTable);
5321 if (h->reply_pool)
5322 pci_free_consistent(h->pdev, h->max_commands * sizeof(__u64),
5323 h->reply_pool, h->reply_pool_dhandle);
872225ca
MM		 5324 /*
5325 * Deliberately omit pci_disable_device(): it does something nasty to
5326 * Smart Array controllers that pci_enable_device does not undo
5327 */
7c832835 5328 pci_release_regions(pdev);
4e570309 5329 pci_set_drvdata(pdev, NULL);
f70dba83
SC		 5330 cciss_destroy_hba_sysfs_entry(h);
5331 mutex_unlock(&h->busy_shutting_down);
5332 free_hba(h);
7c832835 5333}
1da177e4
LT		 5334
5335static struct pci_driver cciss_pci_driver = {
7c832835
BH		 5336 .name = "cciss",
5337 .probe = cciss_init_one,
8d85fce7 5338 .remove = cciss_remove_one,
7c832835 5339 .id_table = cciss_pci_device_id, /* id_table */
e9ca75b5 5340 .shutdown = cciss_shutdown,
1da177e4
LT		 5341};
5342
5343/*
5344 * This is it. Register the PCI driver information for the cards we control
7c832835 5345 * the OS will call our registered routines when it finds one of our cards.
1da177e4
LT		 5346 */
5347static int __init cciss_init(void)
5348{
7fe06326
AP		 5349 int err;
5350
10cbda97
JA		 5351 /*
5352 * The hardware requires that commands are aligned on a 64-bit
5353 * boundary. Given that we use pci_alloc_consistent() to allocate an
5354 * array of them, the size must be a multiple of 8 bytes.
5355 */
1b7d0d28 5356 BUILD_BUG_ON(sizeof(CommandList_struct) % COMMANDLIST_ALIGNMENT);
1da177e4
LT		 5357 printk(KERN_INFO DRIVER_NAME "\n");
5358
7fe06326
AP		 5359 err = bus_register(&cciss_bus_type);
5360 if (err)
5361 return err;
5362
b368c9dd
AP		 5363 /* Start the scan thread */
5364 cciss_scan_thread = kthread_run(scan_thread, NULL, "cciss_scan");
5365 if (IS_ERR(cciss_scan_thread)) {
5366 err = PTR_ERR(cciss_scan_thread);
5367 goto err_bus_unregister;
5368 }
5369
1da177e4 5370 /* Register for our PCI devices */
7fe06326
AP		 5371 err = pci_register_driver(&cciss_pci_driver);
5372 if (err)
b368c9dd 5373 goto err_thread_stop;
7fe06326 5374
617e1344 5375 return err;
7fe06326 5376
b368c9dd
AP		 5377err_thread_stop:
5378 kthread_stop(cciss_scan_thread);
5379err_bus_unregister:
7fe06326 5380 bus_unregister(&cciss_bus_type);
b368c9dd 5381
7fe06326 5382 return err;
1da177e4
LT		 5383}
5384
5385static void __exit cciss_cleanup(void)
5386{
5387 int i;
5388
5389 pci_unregister_driver(&cciss_pci_driver);
5390 /* double check that all controller entrys have been removed */
7c832835
BH		 5391 for (i = 0; i < MAX_CTLR; i++) {
5392 if (hba[i] != NULL) {
b2a4a43d
SC		 5393 dev_warn(&hba[i]->pdev->dev,
5394 "had to remove controller\n");
1da177e4
LT		 5395 cciss_remove_one(hba[i]->pdev);
5396 }
5397 }
b368c9dd 5398 kthread_stop(cciss_scan_thread);
90fdb0b9
JA		 5399 if (proc_cciss)
5400 remove_proc_entry("driver/cciss", NULL);
7fe06326 5401 bus_unregister(&cciss_bus_type);
1da177e4
LT		 5402}
5403
5404module_init(cciss_init);
5405module_exit(cciss_cleanup);
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