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Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/linville/wirel...
[mirror_ubuntu-artful-kernel.git] / drivers / block / cciss.c
CommitLineData
1da177e4 1/*
bd4f36d6
MM		 2 * Disk Array driver for HP Smart Array controllers.
3 * (C) Copyright 2000, 2007 Hewlett-Packard Development Company, L.P.
1da177e4
LT		 4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
bd4f36d6 7 * the Free Software Foundation; version 2 of the License.
1da177e4
LT		 8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
bd4f36d6
MM		 11 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. See the GNU
12 * General Public License for more details.
1da177e4
LT		 13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
bd4f36d6
MM		 16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
17 * 02111-1307, USA.
1da177e4
LT		 18 *
19 * Questions/Comments/Bugfixes to iss_storagedev@hp.com
20 *
21 */
22
1da177e4
LT		 23#include <linux/module.h>
24#include <linux/interrupt.h>
25#include <linux/types.h>
26#include <linux/pci.h>
27#include <linux/kernel.h>
28#include <linux/slab.h>
29#include <linux/delay.h>
30#include <linux/major.h>
31#include <linux/fs.h>
32#include <linux/bio.h>
33#include <linux/blkpg.h>
34#include <linux/timer.h>
35#include <linux/proc_fs.h>
89b6e743 36#include <linux/seq_file.h>
7c832835 37#include <linux/init.h>
4d761609 38#include <linux/jiffies.h>
1da177e4
LT		 39#include <linux/hdreg.h>
40#include <linux/spinlock.h>
41#include <linux/compat.h>
b368c9dd 42#include <linux/mutex.h>
1da177e4
LT		 43#include <asm/uaccess.h>
44#include <asm/io.h>
45
eb0df996 46#include <linux/dma-mapping.h>
1da177e4
LT		 47#include <linux/blkdev.h>
48#include <linux/genhd.h>
49#include <linux/completion.h>
d5d3b736 50#include <scsi/scsi.h>
03bbfee5
MMOD		 51#include <scsi/sg.h>
52#include <scsi/scsi_ioctl.h>
53#include <linux/cdrom.h>
231bc2a2 54#include <linux/scatterlist.h>
0a9279cc 55#include <linux/kthread.h>
1da177e4
LT		 56
57#define CCISS_DRIVER_VERSION(maj,min,submin) ((maj<<16)|(min<<8)|(submin))
841fdffd
MM		 58#define DRIVER_NAME "HP CISS Driver (v 3.6.26)"
59#define DRIVER_VERSION CCISS_DRIVER_VERSION(3, 6, 26)
1da177e4
LT		 60
61/* Embedded module documentation macros - see modules.h */
62MODULE_AUTHOR("Hewlett-Packard Company");
24aac480 63MODULE_DESCRIPTION("Driver for HP Smart Array Controllers");
841fdffd
MM		 64MODULE_SUPPORTED_DEVICE("HP Smart Array Controllers");
65MODULE_VERSION("3.6.26");
1da177e4
LT		 66MODULE_LICENSE("GPL");
67
2a48fc0a 68static DEFINE_MUTEX(cciss_mutex);
bbe425cd 69static struct proc_dir_entry *proc_cciss;
2ec24ff1 70
1da177e4
LT		 71#include "cciss_cmd.h"
72#include "cciss.h"
73#include <linux/cciss_ioctl.h>
74
75/* define the PCI info for the cards we can control */
76static const struct pci_device_id cciss_pci_device_id[] = {
f82ccdb9
BH		 77 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISS, 0x0E11, 0x4070},
78 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSB, 0x0E11, 0x4080},
79 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSB, 0x0E11, 0x4082},
80 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSB, 0x0E11, 0x4083},
81 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x4091},
82 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x409A},
83 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x409B},
84 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x409C},
85 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x409D},
86 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSA, 0x103C, 0x3225},
87 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x3223},
88 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x3234},
89 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x3235},
90 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3211},
91 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3212},
92 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3213},
93 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3214},
94 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3215},
de923916 95 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x3237},
9cff3b38 96 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x323D},
1da177e4
LT		 97 {0,}
98};
7c832835 99
1da177e4
LT		 100MODULE_DEVICE_TABLE(pci, cciss_pci_device_id);
101
1da177e4
LT		 102/* board_id = Subsystem Device ID & Vendor ID
103 * product = Marketing Name for the board
7c832835 104 * access = Address of the struct of function pointers
1da177e4
LT		 105 */
106static struct board_type products[] = {
49153998
MM		 107 {0x40700E11, "Smart Array 5300", &SA5_access},
108 {0x40800E11, "Smart Array 5i", &SA5B_access},
109 {0x40820E11, "Smart Array 532", &SA5B_access},
110 {0x40830E11, "Smart Array 5312", &SA5B_access},
111 {0x409A0E11, "Smart Array 641", &SA5_access},
112 {0x409B0E11, "Smart Array 642", &SA5_access},
113 {0x409C0E11, "Smart Array 6400", &SA5_access},
114 {0x409D0E11, "Smart Array 6400 EM", &SA5_access},
115 {0x40910E11, "Smart Array 6i", &SA5_access},
116 {0x3225103C, "Smart Array P600", &SA5_access},
4205df34
SC		 117 {0x3223103C, "Smart Array P800", &SA5_access},
118 {0x3234103C, "Smart Array P400", &SA5_access},
49153998
MM		 119 {0x3235103C, "Smart Array P400i", &SA5_access},
120 {0x3211103C, "Smart Array E200i", &SA5_access},
121 {0x3212103C, "Smart Array E200", &SA5_access},
122 {0x3213103C, "Smart Array E200i", &SA5_access},
123 {0x3214103C, "Smart Array E200i", &SA5_access},
124 {0x3215103C, "Smart Array E200i", &SA5_access},
125 {0x3237103C, "Smart Array E500", &SA5_access},
2ec24ff1
SC		 126 {0x3223103C, "Smart Array P800", &SA5_access},
127 {0x3234103C, "Smart Array P400", &SA5_access},
49153998 128 {0x323D103C, "Smart Array P700m", &SA5_access},
1da177e4
LT		 129};
130
d14c4ab5 131/* How long to wait (in milliseconds) for board to go into simple mode */
7c832835 132#define MAX_CONFIG_WAIT 30000
1da177e4
LT		 133#define MAX_IOCTL_CONFIG_WAIT 1000
134
135/*define how many times we will try a command because of bus resets */
136#define MAX_CMD_RETRIES 3
137
1da177e4
LT		 138#define MAX_CTLR 32
139
140/* Originally cciss driver only supports 8 major numbers */
141#define MAX_CTLR_ORIG 8
142
1da177e4
LT		 143static ctlr_info_t *hba[MAX_CTLR];
144
b368c9dd
AP		 145static struct task_struct *cciss_scan_thread;
146static DEFINE_MUTEX(scan_mutex);
147static LIST_HEAD(scan_q);
148
165125e1 149static void do_cciss_request(struct request_queue *q);
0c2b3908
MM		 150static irqreturn_t do_cciss_intx(int irq, void *dev_id);
151static irqreturn_t do_cciss_msix_intr(int irq, void *dev_id);
ef7822c2 152static int cciss_open(struct block_device *bdev, fmode_t mode);
6e9624b8 153static int cciss_unlocked_open(struct block_device *bdev, fmode_t mode);
ef7822c2 154static int cciss_release(struct gendisk *disk, fmode_t mode);
8a6cfeb6
AB		 155static int do_ioctl(struct block_device *bdev, fmode_t mode,
156 unsigned int cmd, unsigned long arg);
ef7822c2 157static int cciss_ioctl(struct block_device *bdev, fmode_t mode,
7c832835 158 unsigned int cmd, unsigned long arg);
a885c8c4 159static int cciss_getgeo(struct block_device *bdev, struct hd_geometry *geo);
1da177e4 160
1da177e4 161static int cciss_revalidate(struct gendisk *disk);
2d11d993 162static int rebuild_lun_table(ctlr_info_t *h, int first_time, int via_ioctl);
a0ea8622 163static int deregister_disk(ctlr_info_t *h, int drv_index,
2d11d993 164 int clear_all, int via_ioctl);
1da177e4 165
f70dba83 166static void cciss_read_capacity(ctlr_info_t *h, int logvol,
00988a35 167 sector_t *total_size, unsigned int *block_size);
f70dba83 168static void cciss_read_capacity_16(ctlr_info_t *h, int logvol,
00988a35 169 sector_t *total_size, unsigned int *block_size);
f70dba83 170static void cciss_geometry_inquiry(ctlr_info_t *h, int logvol,
7b838bde 171 sector_t total_size,
00988a35 172 unsigned int block_size, InquiryData_struct *inq_buff,
7c832835 173 drive_info_struct *drv);
dac5488a 174static void __devinit cciss_interrupt_mode(ctlr_info_t *);
7c832835 175static void start_io(ctlr_info_t *h);
f70dba83 176static int sendcmd_withirq(ctlr_info_t *h, __u8 cmd, void *buff, size_t size,
b57695fe 177 __u8 page_code, unsigned char scsi3addr[],
178 int cmd_type);
85cc61ae 179static int sendcmd_withirq_core(ctlr_info_t *h, CommandList_struct *c,
180 int attempt_retry);
181static int process_sendcmd_error(ctlr_info_t *h, CommandList_struct *c);
1da177e4 182
d6f4965d 183static int add_to_scan_list(struct ctlr_info *h);
0a9279cc
MM		 184static int scan_thread(void *data);
185static int check_for_unit_attention(ctlr_info_t *h, CommandList_struct *c);
617e1344
SC		 186static void cciss_hba_release(struct device *dev);
187static void cciss_device_release(struct device *dev);
361e9b07 188static void cciss_free_gendisk(ctlr_info_t *h, int drv_index);
9cef0d2f 189static void cciss_free_drive_info(ctlr_info_t *h, int drv_index);
29979a71 190static inline u32 next_command(ctlr_info_t *h);
a6528d01
SC		 191static int __devinit cciss_find_cfg_addrs(struct pci_dev *pdev,
192 void __iomem *vaddr, u32 *cfg_base_addr, u64 *cfg_base_addr_index,
193 u64 *cfg_offset);
194static int __devinit cciss_pci_find_memory_BAR(struct pci_dev *pdev,
195 unsigned long *memory_bar);
196
33079b21 197
5e216153
MM		 198/* performant mode helper functions */
199static void calc_bucket_map(int *bucket, int num_buckets, int nsgs,
200 int *bucket_map);
201static void cciss_put_controller_into_performant_mode(ctlr_info_t *h);
33079b21 202
1da177e4 203#ifdef CONFIG_PROC_FS
f70dba83 204static void cciss_procinit(ctlr_info_t *h);
1da177e4 205#else
f70dba83 206static void cciss_procinit(ctlr_info_t *h)
7c832835
BH		 207{
208}
209#endif /* CONFIG_PROC_FS */
1da177e4
LT		 210
211#ifdef CONFIG_COMPAT
ef7822c2
AV		 212static int cciss_compat_ioctl(struct block_device *, fmode_t,
213 unsigned, unsigned long);
1da177e4
LT		 214#endif
215
83d5cde4 216static const struct block_device_operations cciss_fops = {
7c832835 217 .owner = THIS_MODULE,
6e9624b8 218 .open = cciss_unlocked_open,
ef7822c2 219 .release = cciss_release,
8a6cfeb6 220 .ioctl = do_ioctl,
7c832835 221 .getgeo = cciss_getgeo,
1da177e4 222#ifdef CONFIG_COMPAT
ef7822c2 223 .compat_ioctl = cciss_compat_ioctl,
1da177e4 224#endif
7c832835 225 .revalidate_disk = cciss_revalidate,
1da177e4
LT		 226};
227
5e216153
MM		 228/* set_performant_mode: Modify the tag for cciss performant
229 * set bit 0 for pull model, bits 3-1 for block fetch
230 * register number
231 */
232static void set_performant_mode(ctlr_info_t *h, CommandList_struct *c)
233{
234 if (likely(h->transMethod == CFGTBL_Trans_Performant))
235 c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1);
236}
237
1da177e4
LT		 238/*
239 * Enqueuing and dequeuing functions for cmdlists.
240 */
e6e1ee93 241static inline void addQ(struct list_head *list, CommandList_struct *c)
1da177e4 242{
e6e1ee93 243 list_add_tail(&c->list, list);
1da177e4
LT		 244}
245
8a3173de 246static inline void removeQ(CommandList_struct *c)
1da177e4 247{
b59e64d0
HR		 248 /*
249 * After kexec/dump some commands might still
250 * be in flight, which the firmware will try
251 * to complete. Resetting the firmware doesn't work
252 * with old fw revisions, so we have to mark
253 * them off as 'stale' to prevent the driver from
254 * falling over.
255 */
e6e1ee93 256 if (WARN_ON(list_empty(&c->list))) {
b59e64d0 257 c->cmd_type = CMD_MSG_STALE;
8a3173de 258 return;
b59e64d0 259 }
8a3173de 260
e6e1ee93 261 list_del_init(&c->list);
1da177e4
LT		 262}
263
664a717d
MM		 264static void enqueue_cmd_and_start_io(ctlr_info_t *h,
265 CommandList_struct *c)
266{
267 unsigned long flags;
5e216153 268 set_performant_mode(h, c);
664a717d
MM		 269 spin_lock_irqsave(&h->lock, flags);
270 addQ(&h->reqQ, c);
271 h->Qdepth++;
2a643ec6
SC		 272 if (h->Qdepth > h->maxQsinceinit)
273 h->maxQsinceinit = h->Qdepth;
664a717d
MM		 274 start_io(h);
275 spin_unlock_irqrestore(&h->lock, flags);
276}
277
dccc9b56 278static void cciss_free_sg_chain_blocks(SGDescriptor_struct **cmd_sg_list,
49fc5601
SC		 279 int nr_cmds)
280{
281 int i;
282
283 if (!cmd_sg_list)
284 return;
285 for (i = 0; i < nr_cmds; i++) {
dccc9b56
SC		 286 kfree(cmd_sg_list[i]);
287 cmd_sg_list[i] = NULL;
49fc5601
SC		 288 }
289 kfree(cmd_sg_list);
290}
291
dccc9b56
SC		 292static SGDescriptor_struct **cciss_allocate_sg_chain_blocks(
293 ctlr_info_t *h, int chainsize, int nr_cmds)
49fc5601
SC		 294{
295 int j;
dccc9b56 296 SGDescriptor_struct **cmd_sg_list;
49fc5601
SC		 297
298 if (chainsize <= 0)
299 return NULL;
300
301 cmd_sg_list = kmalloc(sizeof(*cmd_sg_list) * nr_cmds, GFP_KERNEL);
302 if (!cmd_sg_list)
303 return NULL;
304
305 /* Build up chain blocks for each command */
306 for (j = 0; j < nr_cmds; j++) {
49fc5601 307 /* Need a block of chainsized s/g elements. */
dccc9b56
SC		 308 cmd_sg_list[j] = kmalloc((chainsize *
309 sizeof(*cmd_sg_list[j])), GFP_KERNEL);
310 if (!cmd_sg_list[j]) {
49fc5601
SC		 311 dev_err(&h->pdev->dev, "Cannot get memory "
312 "for s/g chains.\n");
313 goto clean;
314 }
315 }
316 return cmd_sg_list;
317clean:
318 cciss_free_sg_chain_blocks(cmd_sg_list, nr_cmds);
319 return NULL;
320}
321
d45033ef
SC		 322static void cciss_unmap_sg_chain_block(ctlr_info_t *h, CommandList_struct *c)
323{
324 SGDescriptor_struct *chain_sg;
325 u64bit temp64;
326
327 if (c->Header.SGTotal <= h->max_cmd_sgentries)
328 return;
329
330 chain_sg = &c->SG[h->max_cmd_sgentries - 1];
331 temp64.val32.lower = chain_sg->Addr.lower;
332 temp64.val32.upper = chain_sg->Addr.upper;
333 pci_unmap_single(h->pdev, temp64.val, chain_sg->Len, PCI_DMA_TODEVICE);
334}
335
336static void cciss_map_sg_chain_block(ctlr_info_t *h, CommandList_struct *c,
337 SGDescriptor_struct *chain_block, int len)
338{
339 SGDescriptor_struct *chain_sg;
340 u64bit temp64;
341
342 chain_sg = &c->SG[h->max_cmd_sgentries - 1];
343 chain_sg->Ext = CCISS_SG_CHAIN;
344 chain_sg->Len = len;
345 temp64.val = pci_map_single(h->pdev, chain_block, len,
346 PCI_DMA_TODEVICE);
347 chain_sg->Addr.lower = temp64.val32.lower;
348 chain_sg->Addr.upper = temp64.val32.upper;
349}
350
1da177e4
LT		 351#include "cciss_scsi.c" /* For SCSI tape support */
352
1e6f2dc1
AB		 353static const char *raid_label[] = { "0", "4", "1(1+0)", "5", "5+1", "ADG",
354 "UNKNOWN"
355};
0e4a9d03 356#define RAID_UNKNOWN (ARRAY_SIZE(raid_label)-1)
0f5486ec 357
1da177e4
LT		 358#ifdef CONFIG_PROC_FS
359
360/*
361 * Report information about this controller.
362 */
363#define ENG_GIG 1000000000
364#define ENG_GIG_FACTOR (ENG_GIG/512)
89b6e743 365#define ENGAGE_SCSI "engage scsi"
1da177e4 366
89b6e743 367static void cciss_seq_show_header(struct seq_file *seq)
1da177e4 368{
89b6e743
MM		 369 ctlr_info_t *h = seq->private;
370
371 seq_printf(seq, "%s: HP %s Controller\n"
372 "Board ID: 0x%08lx\n"
373 "Firmware Version: %c%c%c%c\n"
374 "IRQ: %d\n"
375 "Logical drives: %d\n"
376 "Current Q depth: %d\n"
377 "Current # commands on controller: %d\n"
378 "Max Q depth since init: %d\n"
379 "Max # commands on controller since init: %d\n"
380 "Max SG entries since init: %d\n",
381 h->devname,
382 h->product_name,
383 (unsigned long)h->board_id,
384 h->firm_ver[0], h->firm_ver[1], h->firm_ver[2],
5e216153 385 h->firm_ver[3], (unsigned int)h->intr[PERF_MODE_INT],
89b6e743
MM		 386 h->num_luns,
387 h->Qdepth, h->commands_outstanding,
388 h->maxQsinceinit, h->max_outstanding, h->maxSG);
389
390#ifdef CONFIG_CISS_SCSI_TAPE
f70dba83 391 cciss_seq_tape_report(seq, h);
89b6e743
MM		 392#endif /* CONFIG_CISS_SCSI_TAPE */
393}
1da177e4 394
89b6e743
MM		 395static void *cciss_seq_start(struct seq_file *seq, loff_t *pos)
396{
397 ctlr_info_t *h = seq->private;
89b6e743 398 unsigned long flags;
1da177e4
LT		 399
400 /* prevent displaying bogus info during configuration
401 * or deconfiguration of a logical volume
402 */
f70dba83 403 spin_lock_irqsave(&h->lock, flags);
1da177e4 404 if (h->busy_configuring) {
f70dba83 405 spin_unlock_irqrestore(&h->lock, flags);
89b6e743 406 return ERR_PTR(-EBUSY);
1da177e4
LT		 407 }
408 h->busy_configuring = 1;
f70dba83 409 spin_unlock_irqrestore(&h->lock, flags);
1da177e4 410
89b6e743
MM		 411 if (*pos == 0)
412 cciss_seq_show_header(seq);
413
414 return pos;
415}
416
417static int cciss_seq_show(struct seq_file *seq, void *v)
418{
419 sector_t vol_sz, vol_sz_frac;
420 ctlr_info_t *h = seq->private;
421 unsigned ctlr = h->ctlr;
422 loff_t *pos = v;
9cef0d2f 423 drive_info_struct *drv = h->drv[*pos];
89b6e743
MM		 424
425 if (*pos > h->highest_lun)
426 return 0;
427
531c2dc7
SC		 428 if (drv == NULL) /* it's possible for h->drv[] to have holes. */
429 return 0;
430
89b6e743
MM		 431 if (drv->heads == 0)
432 return 0;
433
434 vol_sz = drv->nr_blocks;
435 vol_sz_frac = sector_div(vol_sz, ENG_GIG_FACTOR);
436 vol_sz_frac *= 100;
437 sector_div(vol_sz_frac, ENG_GIG_FACTOR);
438
fa52bec9 439 if (drv->raid_level < 0 || drv->raid_level > RAID_UNKNOWN)
89b6e743
MM		 440 drv->raid_level = RAID_UNKNOWN;
441 seq_printf(seq, "cciss/c%dd%d:"
442 "\t%4u.%02uGB\tRAID %s\n",
443 ctlr, (int) *pos, (int)vol_sz, (int)vol_sz_frac,
444 raid_label[drv->raid_level]);
445 return 0;
446}
447
448static void *cciss_seq_next(struct seq_file *seq, void *v, loff_t *pos)
449{
450 ctlr_info_t *h = seq->private;
451
452 if (*pos > h->highest_lun)
453 return NULL;
454 *pos += 1;
455
456 return pos;
457}
458
459static void cciss_seq_stop(struct seq_file *seq, void *v)
460{
461 ctlr_info_t *h = seq->private;
462
463 /* Only reset h->busy_configuring if we succeeded in setting
464 * it during cciss_seq_start. */
465 if (v == ERR_PTR(-EBUSY))
466 return;
7c832835 467
1da177e4 468 h->busy_configuring = 0;
1da177e4
LT		 469}
470
88e9d34c 471static const struct seq_operations cciss_seq_ops = {
89b6e743
MM		 472 .start = cciss_seq_start,
473 .show = cciss_seq_show,
474 .next = cciss_seq_next,
475 .stop = cciss_seq_stop,
476};
477
478static int cciss_seq_open(struct inode *inode, struct file *file)
479{
480 int ret = seq_open(file, &cciss_seq_ops);
481 struct seq_file *seq = file->private_data;
482
483 if (!ret)
484 seq->private = PDE(inode)->data;
485
486 return ret;
487}
488
489static ssize_t
490cciss_proc_write(struct file *file, const char __user *buf,
491 size_t length, loff_t *ppos)
1da177e4 492{
89b6e743
MM		 493 int err;
494 char *buffer;
495
496#ifndef CONFIG_CISS_SCSI_TAPE
497 return -EINVAL;
1da177e4
LT		 498#endif
499
89b6e743 500 if (!buf || length > PAGE_SIZE - 1)
7c832835 501 return -EINVAL;
89b6e743
MM		 502
503 buffer = (char *)__get_free_page(GFP_KERNEL);
504 if (!buffer)
505 return -ENOMEM;
506
507 err = -EFAULT;
508 if (copy_from_user(buffer, buf, length))
509 goto out;
510 buffer[length] = '\0';
511
512#ifdef CONFIG_CISS_SCSI_TAPE
513 if (strncmp(ENGAGE_SCSI, buffer, sizeof ENGAGE_SCSI - 1) == 0) {
514 struct seq_file *seq = file->private_data;
515 ctlr_info_t *h = seq->private;
89b6e743 516
f70dba83 517 err = cciss_engage_scsi(h);
8721c81f 518 if (err == 0)
89b6e743
MM		 519 err = length;
520 } else
521#endif /* CONFIG_CISS_SCSI_TAPE */
522 err = -EINVAL;
7c832835
BH		 523 /* might be nice to have "disengage" too, but it's not
524 safely possible. (only 1 module use count, lock issues.) */
89b6e743
MM		 525
526out:
527 free_page((unsigned long)buffer);
528 return err;
1da177e4
LT		 529}
530
828c0950 531static const struct file_operations cciss_proc_fops = {
89b6e743
MM		 532 .owner = THIS_MODULE,
533 .open = cciss_seq_open,
534 .read = seq_read,
535 .llseek = seq_lseek,
536 .release = seq_release,
537 .write = cciss_proc_write,
538};
539
f70dba83 540static void __devinit cciss_procinit(ctlr_info_t *h)
1da177e4
LT		 541{
542 struct proc_dir_entry *pde;
543
89b6e743 544 if (proc_cciss == NULL)
928b4d8c 545 proc_cciss = proc_mkdir("driver/cciss", NULL);
89b6e743
MM		 546 if (!proc_cciss)
547 return;
f70dba83 548 pde = proc_create_data(h->devname, S_IWUSR | S_IRUSR | S_IRGRP |
89b6e743 549 S_IROTH, proc_cciss,
f70dba83 550 &cciss_proc_fops, h);
1da177e4 551}
7c832835 552#endif /* CONFIG_PROC_FS */
1da177e4 553
7fe06326
AP		 554#define MAX_PRODUCT_NAME_LEN 19
555
556#define to_hba(n) container_of(n, struct ctlr_info, dev)
557#define to_drv(n) container_of(n, drive_info_struct, dev)
558
d6f4965d
AP		 559static ssize_t host_store_rescan(struct device *dev,
560 struct device_attribute *attr,
561 const char *buf, size_t count)
562{
563 struct ctlr_info *h = to_hba(dev);
564
565 add_to_scan_list(h);
566 wake_up_process(cciss_scan_thread);
567 wait_for_completion_interruptible(&h->scan_wait);
568
569 return count;
570}
8ba95c69 571static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan);
7fe06326
AP		 572
573static ssize_t dev_show_unique_id(struct device *dev,
574 struct device_attribute *attr,
575 char *buf)
576{
577 drive_info_struct *drv = to_drv(dev);
578 struct ctlr_info *h = to_hba(drv->dev.parent);
579 __u8 sn[16];
580 unsigned long flags;
581 int ret = 0;
582
f70dba83 583 spin_lock_irqsave(&h->lock, flags);
7fe06326
AP		 584 if (h->busy_configuring)
585 ret = -EBUSY;
586 else
587 memcpy(sn, drv->serial_no, sizeof(sn));
f70dba83 588 spin_unlock_irqrestore(&h->lock, flags);
7fe06326
AP		 589
590 if (ret)
591 return ret;
592 else
593 return snprintf(buf, 16 * 2 + 2,
594 "%02X%02X%02X%02X%02X%02X%02X%02X"
595 "%02X%02X%02X%02X%02X%02X%02X%02X\n",
596 sn[0], sn[1], sn[2], sn[3],
597 sn[4], sn[5], sn[6], sn[7],
598 sn[8], sn[9], sn[10], sn[11],
599 sn[12], sn[13], sn[14], sn[15]);
600}
8ba95c69 601static DEVICE_ATTR(unique_id, S_IRUGO, dev_show_unique_id, NULL);
7fe06326
AP		 602
603static ssize_t dev_show_vendor(struct device *dev,
604 struct device_attribute *attr,
605 char *buf)
606{
607 drive_info_struct *drv = to_drv(dev);
608 struct ctlr_info *h = to_hba(drv->dev.parent);
609 char vendor[VENDOR_LEN + 1];
610 unsigned long flags;
611 int ret = 0;
612
f70dba83 613 spin_lock_irqsave(&h->lock, flags);
7fe06326
AP		 614 if (h->busy_configuring)
615 ret = -EBUSY;
616 else
617 memcpy(vendor, drv->vendor, VENDOR_LEN + 1);
f70dba83 618 spin_unlock_irqrestore(&h->lock, flags);
7fe06326
AP		 619
620 if (ret)
621 return ret;
622 else
623 return snprintf(buf, sizeof(vendor) + 1, "%s\n", drv->vendor);
624}
8ba95c69 625static DEVICE_ATTR(vendor, S_IRUGO, dev_show_vendor, NULL);
7fe06326
AP		 626
627static ssize_t dev_show_model(struct device *dev,
628 struct device_attribute *attr,
629 char *buf)
630{
631 drive_info_struct *drv = to_drv(dev);
632 struct ctlr_info *h = to_hba(drv->dev.parent);
633 char model[MODEL_LEN + 1];
634 unsigned long flags;
635 int ret = 0;
636
f70dba83 637 spin_lock_irqsave(&h->lock, flags);
7fe06326
AP		 638 if (h->busy_configuring)
639 ret = -EBUSY;
640 else
641 memcpy(model, drv->model, MODEL_LEN + 1);
f70dba83 642 spin_unlock_irqrestore(&h->lock, flags);
7fe06326
AP		 643
644 if (ret)
645 return ret;
646 else
647 return snprintf(buf, sizeof(model) + 1, "%s\n", drv->model);
648}
8ba95c69 649static DEVICE_ATTR(model, S_IRUGO, dev_show_model, NULL);
7fe06326
AP		 650
651static ssize_t dev_show_rev(struct device *dev,
652 struct device_attribute *attr,
653 char *buf)
654{
655 drive_info_struct *drv = to_drv(dev);
656 struct ctlr_info *h = to_hba(drv->dev.parent);
657 char rev[REV_LEN + 1];
658 unsigned long flags;
659 int ret = 0;
660
f70dba83 661 spin_lock_irqsave(&h->lock, flags);
7fe06326
AP		 662 if (h->busy_configuring)
663 ret = -EBUSY;
664 else
665 memcpy(rev, drv->rev, REV_LEN + 1);
f70dba83 666 spin_unlock_irqrestore(&h->lock, flags);
7fe06326
AP		 667
668 if (ret)
669 return ret;
670 else
671 return snprintf(buf, sizeof(rev) + 1, "%s\n", drv->rev);
672}
8ba95c69 673static DEVICE_ATTR(rev, S_IRUGO, dev_show_rev, NULL);
7fe06326 674
ce84a8ae
SC		 675static ssize_t cciss_show_lunid(struct device *dev,
676 struct device_attribute *attr, char *buf)
677{
9cef0d2f
SC		 678 drive_info_struct *drv = to_drv(dev);
679 struct ctlr_info *h = to_hba(drv->dev.parent);
ce84a8ae
SC		 680 unsigned long flags;
681 unsigned char lunid[8];
682
f70dba83 683 spin_lock_irqsave(&h->lock, flags);
ce84a8ae 684 if (h->busy_configuring) {
f70dba83 685 spin_unlock_irqrestore(&h->lock, flags);
ce84a8ae
SC		 686 return -EBUSY;
687 }
688 if (!drv->heads) {
f70dba83 689 spin_unlock_irqrestore(&h->lock, flags);
ce84a8ae
SC		 690 return -ENOTTY;
691 }
692 memcpy(lunid, drv->LunID, sizeof(lunid));
f70dba83 693 spin_unlock_irqrestore(&h->lock, flags);
ce84a8ae
SC		 694 return snprintf(buf, 20, "0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
695 lunid[0], lunid[1], lunid[2], lunid[3],
696 lunid[4], lunid[5], lunid[6], lunid[7]);
697}
8ba95c69 698static DEVICE_ATTR(lunid, S_IRUGO, cciss_show_lunid, NULL);
ce84a8ae 699
3ff1111d
SC		 700static ssize_t cciss_show_raid_level(struct device *dev,
701 struct device_attribute *attr, char *buf)
702{
9cef0d2f
SC		 703 drive_info_struct *drv = to_drv(dev);
704 struct ctlr_info *h = to_hba(drv->dev.parent);
3ff1111d
SC		 705 int raid;
706 unsigned long flags;
707
f70dba83 708 spin_lock_irqsave(&h->lock, flags);
3ff1111d 709 if (h->busy_configuring) {
f70dba83 710 spin_unlock_irqrestore(&h->lock, flags);
3ff1111d
SC		 711 return -EBUSY;
712 }
713 raid = drv->raid_level;
f70dba83 714 spin_unlock_irqrestore(&h->lock, flags);
3ff1111d
SC		 715 if (raid < 0 || raid > RAID_UNKNOWN)
716 raid = RAID_UNKNOWN;
717
718 return snprintf(buf, strlen(raid_label[raid]) + 7, "RAID %s\n",
719 raid_label[raid]);
720}
8ba95c69 721static DEVICE_ATTR(raid_level, S_IRUGO, cciss_show_raid_level, NULL);
3ff1111d 722
e272afec
SC		 723static ssize_t cciss_show_usage_count(struct device *dev,
724 struct device_attribute *attr, char *buf)
725{
9cef0d2f
SC		 726 drive_info_struct *drv = to_drv(dev);
727 struct ctlr_info *h = to_hba(drv->dev.parent);
e272afec
SC		 728 unsigned long flags;
729 int count;
730
f70dba83 731 spin_lock_irqsave(&h->lock, flags);
e272afec 732 if (h->busy_configuring) {
f70dba83 733 spin_unlock_irqrestore(&h->lock, flags);
e272afec
SC		 734 return -EBUSY;
735 }
736 count = drv->usage_count;
f70dba83 737 spin_unlock_irqrestore(&h->lock, flags);
e272afec
SC		 738 return snprintf(buf, 20, "%d\n", count);
739}
8ba95c69 740static DEVICE_ATTR(usage_count, S_IRUGO, cciss_show_usage_count, NULL);
e272afec 741
d6f4965d
AP		 742static struct attribute *cciss_host_attrs[] = {
743 &dev_attr_rescan.attr,
744 NULL
745};
746
747static struct attribute_group cciss_host_attr_group = {
748 .attrs = cciss_host_attrs,
749};
750
9f792d9f 751static const struct attribute_group *cciss_host_attr_groups[] = {
d6f4965d
AP		 752 &cciss_host_attr_group,
753 NULL
754};
755
756static struct device_type cciss_host_type = {
757 .name = "cciss_host",
758 .groups = cciss_host_attr_groups,
617e1344 759 .release = cciss_hba_release,
d6f4965d
AP		 760};
761
7fe06326
AP		 762static struct attribute *cciss_dev_attrs[] = {
763 &dev_attr_unique_id.attr,
764 &dev_attr_model.attr,
765 &dev_attr_vendor.attr,
766 &dev_attr_rev.attr,
ce84a8ae 767 &dev_attr_lunid.attr,
3ff1111d 768 &dev_attr_raid_level.attr,
e272afec 769 &dev_attr_usage_count.attr,
7fe06326
AP		 770 NULL
771};
772
773static struct attribute_group cciss_dev_attr_group = {
774 .attrs = cciss_dev_attrs,
775};
776
a4dbd674 777static const struct attribute_group *cciss_dev_attr_groups[] = {
7fe06326
AP		 778 &cciss_dev_attr_group,
779 NULL
780};
781
782static struct device_type cciss_dev_type = {
783 .name = "cciss_device",
784 .groups = cciss_dev_attr_groups,
617e1344 785 .release = cciss_device_release,
7fe06326
AP		 786};
787
788static struct bus_type cciss_bus_type = {
789 .name = "cciss",
790};
791
617e1344
SC		 792/*
793 * cciss_hba_release is called when the reference count
794 * of h->dev goes to zero.
795 */
796static void cciss_hba_release(struct device *dev)
797{
798 /*
799 * nothing to do, but need this to avoid a warning
800 * about not having a release handler from lib/kref.c.
801 */
802}
7fe06326
AP		 803
804/*
805 * Initialize sysfs entry for each controller. This sets up and registers
806 * the 'cciss#' directory for each individual controller under
807 * /sys/bus/pci/devices/<dev>/.
808 */
809static int cciss_create_hba_sysfs_entry(struct ctlr_info *h)
810{
811 device_initialize(&h->dev);
812 h->dev.type = &cciss_host_type;
813 h->dev.bus = &cciss_bus_type;
814 dev_set_name(&h->dev, "%s", h->devname);
815 h->dev.parent = &h->pdev->dev;
816
817 return device_add(&h->dev);
818}
819
820/*
821 * Remove sysfs entries for an hba.
822 */
823static void cciss_destroy_hba_sysfs_entry(struct ctlr_info *h)
824{
825 device_del(&h->dev);
617e1344
SC		 826 put_device(&h->dev); /* final put. */
827}
828
829/* cciss_device_release is called when the reference count
9cef0d2f 830 * of h->drv[x]dev goes to zero.
617e1344
SC		 831 */
832static void cciss_device_release(struct device *dev)
833{
9cef0d2f
SC		 834 drive_info_struct *drv = to_drv(dev);
835 kfree(drv);
7fe06326
AP		 836}
837
838/*
839 * Initialize sysfs for each logical drive. This sets up and registers
840 * the 'c#d#' directory for each individual logical drive under
841 * /sys/bus/pci/devices/<dev/ccis#/. We also create a link from
842 * /sys/block/cciss!c#d# to this entry.
843 */
617e1344 844static long cciss_create_ld_sysfs_entry(struct ctlr_info *h,
7fe06326
AP		 845 int drv_index)
846{
617e1344
SC		 847 struct device *dev;
848
9cef0d2f 849 if (h->drv[drv_index]->device_initialized)
8ce51966
SC		 850 return 0;
851
9cef0d2f 852 dev = &h->drv[drv_index]->dev;
617e1344
SC		 853 device_initialize(dev);
854 dev->type = &cciss_dev_type;
855 dev->bus = &cciss_bus_type;
856 dev_set_name(dev, "c%dd%d", h->ctlr, drv_index);
857 dev->parent = &h->dev;
9cef0d2f 858 h->drv[drv_index]->device_initialized = 1;
617e1344 859 return device_add(dev);
7fe06326
AP		 860}
861
862/*
863 * Remove sysfs entries for a logical drive.
864 */
8ce51966
SC		 865static void cciss_destroy_ld_sysfs_entry(struct ctlr_info *h, int drv_index,
866 int ctlr_exiting)
7fe06326 867{
9cef0d2f 868 struct device *dev = &h->drv[drv_index]->dev;
8ce51966
SC		 869
870 /* special case for c*d0, we only destroy it on controller exit */
871 if (drv_index == 0 && !ctlr_exiting)
872 return;
873
617e1344
SC		 874 device_del(dev);
875 put_device(dev); /* the "final" put. */
9cef0d2f 876 h->drv[drv_index] = NULL;
7fe06326
AP		 877}
878
7c832835
BH		 879/*
880 * For operations that cannot sleep, a command block is allocated at init,
1da177e4 881 * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track
6b4d96b8 882 * which ones are free or in use.
7c832835 883 */
6b4d96b8 884static CommandList_struct *cmd_alloc(ctlr_info_t *h)
1da177e4
LT		 885{
886 CommandList_struct *c;
7c832835 887 int i;
1da177e4
LT		 888 u64bit temp64;
889 dma_addr_t cmd_dma_handle, err_dma_handle;
890
6b4d96b8
SC		 891 do {
892 i = find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds);
893 if (i == h->nr_cmds)
7c832835 894 return NULL;
6b4d96b8
SC		 895 } while (test_and_set_bit(i & (BITS_PER_LONG - 1),
896 h->cmd_pool_bits + (i / BITS_PER_LONG)) != 0);
6b4d96b8
SC		 897 c = h->cmd_pool + i;
898 memset(c, 0, sizeof(CommandList_struct));
899 cmd_dma_handle = h->cmd_pool_dhandle + i * sizeof(CommandList_struct);
900 c->err_info = h->errinfo_pool + i;
901 memset(c->err_info, 0, sizeof(ErrorInfo_struct));
902 err_dma_handle = h->errinfo_pool_dhandle
903 + i * sizeof(ErrorInfo_struct);
904 h->nr_allocs++;
1da177e4 905
6b4d96b8 906 c->cmdindex = i;
33079b21 907
e6e1ee93 908 INIT_LIST_HEAD(&c->list);
6b4d96b8
SC		 909 c->busaddr = (__u32) cmd_dma_handle;
910 temp64.val = (__u64) err_dma_handle;
911 c->ErrDesc.Addr.lower = temp64.val32.lower;
912 c->ErrDesc.Addr.upper = temp64.val32.upper;
913 c->ErrDesc.Len = sizeof(ErrorInfo_struct);
7c832835 914
6b4d96b8
SC		 915 c->ctlr = h->ctlr;
916 return c;
917}
33079b21 918
6b4d96b8
SC		 919/* allocate a command using pci_alloc_consistent, used for ioctls,
920 * etc., not for the main i/o path.
921 */
922static CommandList_struct *cmd_special_alloc(ctlr_info_t *h)
923{
924 CommandList_struct *c;
925 u64bit temp64;
926 dma_addr_t cmd_dma_handle, err_dma_handle;
927
928 c = (CommandList_struct *) pci_alloc_consistent(h->pdev,
929 sizeof(CommandList_struct), &cmd_dma_handle);
930 if (c == NULL)
931 return NULL;
932 memset(c, 0, sizeof(CommandList_struct));
933
934 c->cmdindex = -1;
935
936 c->err_info = (ErrorInfo_struct *)
937 pci_alloc_consistent(h->pdev, sizeof(ErrorInfo_struct),
938 &err_dma_handle);
939
940 if (c->err_info == NULL) {
941 pci_free_consistent(h->pdev,
942 sizeof(CommandList_struct), c, cmd_dma_handle);
943 return NULL;
7c832835 944 }
6b4d96b8 945 memset(c->err_info, 0, sizeof(ErrorInfo_struct));
1da177e4 946
e6e1ee93 947 INIT_LIST_HEAD(&c->list);
1da177e4 948 c->busaddr = (__u32) cmd_dma_handle;
7c832835 949 temp64.val = (__u64) err_dma_handle;
1da177e4
LT		 950 c->ErrDesc.Addr.lower = temp64.val32.lower;
951 c->ErrDesc.Addr.upper = temp64.val32.upper;
952 c->ErrDesc.Len = sizeof(ErrorInfo_struct);
1da177e4 953
7c832835
BH		 954 c->ctlr = h->ctlr;
955 return c;
1da177e4
LT		 956}
957
6b4d96b8 958static void cmd_free(ctlr_info_t *h, CommandList_struct *c)
1da177e4
LT		 959{
960 int i;
6b4d96b8
SC		 961
962 i = c - h->cmd_pool;
963 clear_bit(i & (BITS_PER_LONG - 1),
964 h->cmd_pool_bits + (i / BITS_PER_LONG));
965 h->nr_frees++;
966}
967
968static void cmd_special_free(ctlr_info_t *h, CommandList_struct *c)
969{
1da177e4
LT		 970 u64bit temp64;
971
6b4d96b8
SC		 972 temp64.val32.lower = c->ErrDesc.Addr.lower;
973 temp64.val32.upper = c->ErrDesc.Addr.upper;
974 pci_free_consistent(h->pdev, sizeof(ErrorInfo_struct),
975 c->err_info, (dma_addr_t) temp64.val);
976 pci_free_consistent(h->pdev, sizeof(CommandList_struct),
977 c, (dma_addr_t) c->busaddr);
1da177e4
LT		 978}
979
980static inline ctlr_info_t *get_host(struct gendisk *disk)
981{
7c832835 982 return disk->queue->queuedata;
1da177e4
LT		 983}
984
985static inline drive_info_struct *get_drv(struct gendisk *disk)
986{
987 return disk->private_data;
988}
989
990/*
991 * Open. Make sure the device is really there.
992 */
ef7822c2 993static int cciss_open(struct block_device *bdev, fmode_t mode)
1da177e4 994{
f70dba83 995 ctlr_info_t *h = get_host(bdev->bd_disk);
ef7822c2 996 drive_info_struct *drv = get_drv(bdev->bd_disk);
1da177e4 997
b2a4a43d 998 dev_dbg(&h->pdev->dev, "cciss_open %s\n", bdev->bd_disk->disk_name);
2e043986 999 if (drv->busy_configuring)
ddd47442 1000 return -EBUSY;
1da177e4
LT		 1001 /*
1002 * Root is allowed to open raw volume zero even if it's not configured
1003 * so array config can still work. Root is also allowed to open any
1004 * volume that has a LUN ID, so it can issue IOCTL to reread the
1005 * disk information. I don't think I really like this
1006 * but I'm already using way to many device nodes to claim another one
1007 * for "raw controller".
1008 */
7a06f789 1009 if (drv->heads == 0) {
ef7822c2 1010 if (MINOR(bdev->bd_dev) != 0) { /* not node 0? */
1da177e4 1011 /* if not node 0 make sure it is a partition = 0 */
ef7822c2 1012 if (MINOR(bdev->bd_dev) & 0x0f) {
7c832835 1013 return -ENXIO;
1da177e4 1014 /* if it is, make sure we have a LUN ID */
39ccf9a6
SC		 1015 } else if (memcmp(drv->LunID, CTLR_LUNID,
1016 sizeof(drv->LunID))) {
1da177e4
LT		 1017 return -ENXIO;
1018 }
1019 }
1020 if (!capable(CAP_SYS_ADMIN))
1021 return -EPERM;
1022 }
1023 drv->usage_count++;
f70dba83 1024 h->usage_count++;
1da177e4
LT		 1025 return 0;
1026}
7c832835 1027
6e9624b8
AB		 1028static int cciss_unlocked_open(struct block_device *bdev, fmode_t mode)
1029{
1030 int ret;
1031
2a48fc0a 1032 mutex_lock(&cciss_mutex);
6e9624b8 1033 ret = cciss_open(bdev, mode);
2a48fc0a 1034 mutex_unlock(&cciss_mutex);
6e9624b8
AB		 1035
1036 return ret;
1037}
1038
1da177e4
LT		 1039/*
1040 * Close. Sync first.
1041 */
ef7822c2 1042static int cciss_release(struct gendisk *disk, fmode_t mode)
1da177e4 1043{
f70dba83 1044 ctlr_info_t *h;
6e9624b8 1045 drive_info_struct *drv;
1da177e4 1046
2a48fc0a 1047 mutex_lock(&cciss_mutex);
f70dba83 1048 h = get_host(disk);
6e9624b8 1049 drv = get_drv(disk);
b2a4a43d 1050 dev_dbg(&h->pdev->dev, "cciss_release %s\n", disk->disk_name);
1da177e4 1051 drv->usage_count--;
f70dba83 1052 h->usage_count--;
2a48fc0a 1053 mutex_unlock(&cciss_mutex);
1da177e4
LT		 1054 return 0;
1055}
1056
ef7822c2
AV		 1057static int do_ioctl(struct block_device *bdev, fmode_t mode,
1058 unsigned cmd, unsigned long arg)
1da177e4
LT		 1059{
1060 int ret;
2a48fc0a 1061 mutex_lock(&cciss_mutex);
ef7822c2 1062 ret = cciss_ioctl(bdev, mode, cmd, arg);
2a48fc0a 1063 mutex_unlock(&cciss_mutex);
1da177e4
LT		 1064 return ret;
1065}
1066
8a6cfeb6
AB		 1067#ifdef CONFIG_COMPAT
1068
ef7822c2
AV		 1069static int cciss_ioctl32_passthru(struct block_device *bdev, fmode_t mode,
1070 unsigned cmd, unsigned long arg);
1071static int cciss_ioctl32_big_passthru(struct block_device *bdev, fmode_t mode,
1072 unsigned cmd, unsigned long arg);
1da177e4 1073
ef7822c2
AV		 1074static int cciss_compat_ioctl(struct block_device *bdev, fmode_t mode,
1075 unsigned cmd, unsigned long arg)
1da177e4
LT		 1076{
1077 switch (cmd) {
1078 case CCISS_GETPCIINFO:
1079 case CCISS_GETINTINFO:
1080 case CCISS_SETINTINFO:
1081 case CCISS_GETNODENAME:
1082 case CCISS_SETNODENAME:
1083 case CCISS_GETHEARTBEAT:
1084 case CCISS_GETBUSTYPES:
1085 case CCISS_GETFIRMVER:
1086 case CCISS_GETDRIVVER:
1087 case CCISS_REVALIDVOLS:
1088 case CCISS_DEREGDISK:
1089 case CCISS_REGNEWDISK:
1090 case CCISS_REGNEWD:
1091 case CCISS_RESCANDISK:
1092 case CCISS_GETLUNINFO:
ef7822c2 1093 return do_ioctl(bdev, mode, cmd, arg);
1da177e4
LT		 1094
1095 case CCISS_PASSTHRU32:
ef7822c2 1096 return cciss_ioctl32_passthru(bdev, mode, cmd, arg);
1da177e4 1097 case CCISS_BIG_PASSTHRU32:
ef7822c2 1098 return cciss_ioctl32_big_passthru(bdev, mode, cmd, arg);
1da177e4
LT		 1099
1100 default:
1101 return -ENOIOCTLCMD;
1102 }
1103}
1104
ef7822c2
AV		 1105static int cciss_ioctl32_passthru(struct block_device *bdev, fmode_t mode,
1106 unsigned cmd, unsigned long arg)
1da177e4
LT		 1107{
1108 IOCTL32_Command_struct __user *arg32 =
7c832835 1109 (IOCTL32_Command_struct __user *) arg;
1da177e4
LT		 1110 IOCTL_Command_struct arg64;
1111 IOCTL_Command_struct __user *p = compat_alloc_user_space(sizeof(arg64));
1112 int err;
1113 u32 cp;
1114
1115 err = 0;
7c832835
BH		 1116 err |=
1117 copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
1118 sizeof(arg64.LUN_info));
1119 err |=
1120 copy_from_user(&arg64.Request, &arg32->Request,
1121 sizeof(arg64.Request));
1122 err |=
1123 copy_from_user(&arg64.error_info, &arg32->error_info,
1124 sizeof(arg64.error_info));
1da177e4
LT		 1125 err |= get_user(arg64.buf_size, &arg32->buf_size);
1126 err |= get_user(cp, &arg32->buf);
1127 arg64.buf = compat_ptr(cp);
1128 err |= copy_to_user(p, &arg64, sizeof(arg64));
1129
1130 if (err)
1131 return -EFAULT;
1132
ef7822c2 1133 err = do_ioctl(bdev, mode, CCISS_PASSTHRU, (unsigned long)p);
1da177e4
LT		 1134 if (err)
1135 return err;
7c832835
BH		 1136 err |=
1137 copy_in_user(&arg32->error_info, &p->error_info,
1138 sizeof(arg32->error_info));
1da177e4
LT		 1139 if (err)
1140 return -EFAULT;
1141 return err;
1142}
1143
ef7822c2
AV		 1144static int cciss_ioctl32_big_passthru(struct block_device *bdev, fmode_t mode,
1145 unsigned cmd, unsigned long arg)
1da177e4
LT		 1146{
1147 BIG_IOCTL32_Command_struct __user *arg32 =
7c832835 1148 (BIG_IOCTL32_Command_struct __user *) arg;
1da177e4 1149 BIG_IOCTL_Command_struct arg64;
7c832835
BH		 1150 BIG_IOCTL_Command_struct __user *p =
1151 compat_alloc_user_space(sizeof(arg64));
1da177e4
LT		 1152 int err;
1153 u32 cp;
1154
7ab5118d 1155 memset(&arg64, 0, sizeof(arg64));
1da177e4 1156 err = 0;
7c832835
BH		 1157 err |=
1158 copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
1159 sizeof(arg64.LUN_info));
1160 err |=
1161 copy_from_user(&arg64.Request, &arg32->Request,
1162 sizeof(arg64.Request));
1163 err |=
1164 copy_from_user(&arg64.error_info, &arg32->error_info,
1165 sizeof(arg64.error_info));
1da177e4
LT		 1166 err |= get_user(arg64.buf_size, &arg32->buf_size);
1167 err |= get_user(arg64.malloc_size, &arg32->malloc_size);
1168 err |= get_user(cp, &arg32->buf);
1169 arg64.buf = compat_ptr(cp);
1170 err |= copy_to_user(p, &arg64, sizeof(arg64));
1171
1172 if (err)
7c832835 1173 return -EFAULT;
1da177e4 1174
ef7822c2 1175 err = do_ioctl(bdev, mode, CCISS_BIG_PASSTHRU, (unsigned long)p);
1da177e4
LT		 1176 if (err)
1177 return err;
7c832835
BH		 1178 err |=
1179 copy_in_user(&arg32->error_info, &p->error_info,
1180 sizeof(arg32->error_info));
1da177e4
LT		 1181 if (err)
1182 return -EFAULT;
1183 return err;
1184}
1185#endif
a885c8c4
CH		 1186
1187static int cciss_getgeo(struct block_device *bdev, struct hd_geometry *geo)
1188{
1189 drive_info_struct *drv = get_drv(bdev->bd_disk);
1190
1191 if (!drv->cylinders)
1192 return -ENXIO;
1193
1194 geo->heads = drv->heads;
1195 geo->sectors = drv->sectors;
1196 geo->cylinders = drv->cylinders;
1197 return 0;
1198}
1199
f70dba83 1200static void check_ioctl_unit_attention(ctlr_info_t *h, CommandList_struct *c)
0a9279cc
MM		 1201{
1202 if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
1203 c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION)
f70dba83 1204 (void)check_for_unit_attention(h, c);
0a9279cc 1205}
0a25a5ae
SC		 1206
1207static int cciss_getpciinfo(ctlr_info_t *h, void __user *argp)
1da177e4 1208{
0a25a5ae 1209 cciss_pci_info_struct pciinfo;
1da177e4 1210
0a25a5ae
SC		 1211 if (!argp)
1212 return -EINVAL;
1213 pciinfo.domain = pci_domain_nr(h->pdev->bus);
1214 pciinfo.bus = h->pdev->bus->number;
1215 pciinfo.dev_fn = h->pdev->devfn;
1216 pciinfo.board_id = h->board_id;
1217 if (copy_to_user(argp, &pciinfo, sizeof(cciss_pci_info_struct)))
1218 return -EFAULT;
1219 return 0;
1220}
1da177e4 1221
576e661c
SC		 1222static int cciss_getintinfo(ctlr_info_t *h, void __user *argp)
1223{
1224 cciss_coalint_struct intinfo;
1da177e4 1225
576e661c
SC		 1226 if (!argp)
1227 return -EINVAL;
1228 intinfo.delay = readl(&h->cfgtable->HostWrite.CoalIntDelay);
1229 intinfo.count = readl(&h->cfgtable->HostWrite.CoalIntCount);
1230 if (copy_to_user
1231 (argp, &intinfo, sizeof(cciss_coalint_struct)))
1232 return -EFAULT;
1233 return 0;
1234}
1da177e4 1235
4c800eed
SC		 1236static int cciss_setintinfo(ctlr_info_t *h, void __user *argp)
1237{
1238 cciss_coalint_struct intinfo;
1239 unsigned long flags;
1240 int i;
1da177e4 1241
4c800eed
SC		 1242 if (!argp)
1243 return -EINVAL;
1244 if (!capable(CAP_SYS_ADMIN))
1245 return -EPERM;
1246 if (copy_from_user(&intinfo, argp, sizeof(intinfo)))
1247 return -EFAULT;
1248 if ((intinfo.delay == 0) && (intinfo.count == 0))
1249 return -EINVAL;
1250 spin_lock_irqsave(&h->lock, flags);
1251 /* Update the field, and then ring the doorbell */
1252 writel(intinfo.delay, &(h->cfgtable->HostWrite.CoalIntDelay));
1253 writel(intinfo.count, &(h->cfgtable->HostWrite.CoalIntCount));
1254 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
1255
1256 for (i = 0; i < MAX_IOCTL_CONFIG_WAIT; i++) {
1257 if (!(readl(h->vaddr + SA5_DOORBELL) & CFGTBL_ChangeReq))
1258 break;
1259 udelay(1000); /* delay and try again */
1260 }
1261 spin_unlock_irqrestore(&h->lock, flags);
1262 if (i >= MAX_IOCTL_CONFIG_WAIT)
1263 return -EAGAIN;
1264 return 0;
1265}
1da177e4 1266
25216109
SC		 1267static int cciss_getnodename(ctlr_info_t *h, void __user *argp)
1268{
1269 NodeName_type NodeName;
1270 int i;
1da177e4 1271
25216109
SC		 1272 if (!argp)
1273 return -EINVAL;
1274 for (i = 0; i < 16; i++)
1275 NodeName[i] = readb(&h->cfgtable->ServerName[i]);
1276 if (copy_to_user(argp, NodeName, sizeof(NodeName_type)))
1277 return -EFAULT;
1278 return 0;
1279}
7c832835 1280
4f43f32c
SC		 1281static int cciss_setnodename(ctlr_info_t *h, void __user *argp)
1282{
1283 NodeName_type NodeName;
1284 unsigned long flags;
1285 int i;
7c832835 1286
4f43f32c
SC		 1287 if (!argp)
1288 return -EINVAL;
1289 if (!capable(CAP_SYS_ADMIN))
1290 return -EPERM;
1291 if (copy_from_user(NodeName, argp, sizeof(NodeName_type)))
1292 return -EFAULT;
1293 spin_lock_irqsave(&h->lock, flags);
1294 /* Update the field, and then ring the doorbell */
1295 for (i = 0; i < 16; i++)
1296 writeb(NodeName[i], &h->cfgtable->ServerName[i]);
1297 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
1298 for (i = 0; i < MAX_IOCTL_CONFIG_WAIT; i++) {
1299 if (!(readl(h->vaddr + SA5_DOORBELL) & CFGTBL_ChangeReq))
1300 break;
1301 udelay(1000); /* delay and try again */
1302 }
1303 spin_unlock_irqrestore(&h->lock, flags);
1304 if (i >= MAX_IOCTL_CONFIG_WAIT)
1305 return -EAGAIN;
1306 return 0;
1307}
7c832835 1308
93c74931
SC		 1309static int cciss_getheartbeat(ctlr_info_t *h, void __user *argp)
1310{
1311 Heartbeat_type heartbeat;
7c832835 1312
93c74931
SC		 1313 if (!argp)
1314 return -EINVAL;
1315 heartbeat = readl(&h->cfgtable->HeartBeat);
1316 if (copy_to_user(argp, &heartbeat, sizeof(Heartbeat_type)))
1317 return -EFAULT;
1318 return 0;
1319}
0a9279cc 1320
d18dfad4
SC		 1321static int cciss_getbustypes(ctlr_info_t *h, void __user *argp)
1322{
1323 BusTypes_type BusTypes;
7c832835 1324
d18dfad4
SC		 1325 if (!argp)
1326 return -EINVAL;
1327 BusTypes = readl(&h->cfgtable->BusTypes);
1328 if (copy_to_user(argp, &BusTypes, sizeof(BusTypes_type)))
1329 return -EFAULT;
1330 return 0;
1331}
1332
8a4f7fbf
SC		 1333static int cciss_getfirmver(ctlr_info_t *h, void __user *argp)
1334{
1335 FirmwareVer_type firmware;
1336
1337 if (!argp)
1338 return -EINVAL;
1339 memcpy(firmware, h->firm_ver, 4);
1340
1341 if (copy_to_user
1342 (argp, firmware, sizeof(FirmwareVer_type)))
1343 return -EFAULT;
1344 return 0;
1345}
1346
c525919d
SC		 1347static int cciss_getdrivver(ctlr_info_t *h, void __user *argp)
1348{
1349 DriverVer_type DriverVer = DRIVER_VERSION;
1350
1351 if (!argp)
1352 return -EINVAL;
1353 if (copy_to_user(argp, &DriverVer, sizeof(DriverVer_type)))
1354 return -EFAULT;
1355 return 0;
1356}
1357
0894b32c
SC		 1358static int cciss_getluninfo(ctlr_info_t *h,
1359 struct gendisk *disk, void __user *argp)
1360{
1361 LogvolInfo_struct luninfo;
1362 drive_info_struct *drv = get_drv(disk);
1363
1364 if (!argp)
1365 return -EINVAL;
1366 memcpy(&luninfo.LunID, drv->LunID, sizeof(luninfo.LunID));
1367 luninfo.num_opens = drv->usage_count;
1368 luninfo.num_parts = 0;
1369 if (copy_to_user(argp, &luninfo, sizeof(LogvolInfo_struct)))
1370 return -EFAULT;
1371 return 0;
1372}
1373
f32f125b
SC		 1374static int cciss_passthru(ctlr_info_t *h, void __user *argp)
1375{
1376 IOCTL_Command_struct iocommand;
1377 CommandList_struct *c;
1378 char *buff = NULL;
1379 u64bit temp64;
1380 DECLARE_COMPLETION_ONSTACK(wait);
1381
1382 if (!argp)
1383 return -EINVAL;
1384
1385 if (!capable(CAP_SYS_RAWIO))
1386 return -EPERM;
1387
1388 if (copy_from_user
1389 (&iocommand, argp, sizeof(IOCTL_Command_struct)))
1390 return -EFAULT;
1391 if ((iocommand.buf_size < 1) &&
1392 (iocommand.Request.Type.Direction != XFER_NONE)) {
1393 return -EINVAL;
1394 }
1395 if (iocommand.buf_size > 0) {
1396 buff = kmalloc(iocommand.buf_size, GFP_KERNEL);
1397 if (buff == NULL)
1398 return -EFAULT;
1399 }
1400 if (iocommand.Request.Type.Direction == XFER_WRITE) {
1401 /* Copy the data into the buffer we created */
1402 if (copy_from_user(buff, iocommand.buf, iocommand.buf_size)) {
1403 kfree(buff);
1404 return -EFAULT;
1405 }
1406 } else {
1407 memset(buff, 0, iocommand.buf_size);
1408 }
1409 c = cmd_special_alloc(h);
1410 if (!c) {
1411 kfree(buff);
1412 return -ENOMEM;
1413 }
1414 /* Fill in the command type */
1415 c->cmd_type = CMD_IOCTL_PEND;
1416 /* Fill in Command Header */
1417 c->Header.ReplyQueue = 0; /* unused in simple mode */
1418 if (iocommand.buf_size > 0) { /* buffer to fill */
1419 c->Header.SGList = 1;
1420 c->Header.SGTotal = 1;
1421 } else { /* no buffers to fill */
1422 c->Header.SGList = 0;
1423 c->Header.SGTotal = 0;
1424 }
1425 c->Header.LUN = iocommand.LUN_info;
1426 /* use the kernel address the cmd block for tag */
1427 c->Header.Tag.lower = c->busaddr;
1428
1429 /* Fill in Request block */
1430 c->Request = iocommand.Request;
1431
1432 /* Fill in the scatter gather information */
1433 if (iocommand.buf_size > 0) {
1434 temp64.val = pci_map_single(h->pdev, buff,
1435 iocommand.buf_size, PCI_DMA_BIDIRECTIONAL);
1436 c->SG[0].Addr.lower = temp64.val32.lower;
1437 c->SG[0].Addr.upper = temp64.val32.upper;
1438 c->SG[0].Len = iocommand.buf_size;
1439 c->SG[0].Ext = 0; /* we are not chaining */
1440 }
1441 c->waiting = &wait;
1442
1443 enqueue_cmd_and_start_io(h, c);
1444 wait_for_completion(&wait);
1445
1446 /* unlock the buffers from DMA */
1447 temp64.val32.lower = c->SG[0].Addr.lower;
1448 temp64.val32.upper = c->SG[0].Addr.upper;
1449 pci_unmap_single(h->pdev, (dma_addr_t) temp64.val, iocommand.buf_size,
1450 PCI_DMA_BIDIRECTIONAL);
1451 check_ioctl_unit_attention(h, c);
1452
1453 /* Copy the error information out */
1454 iocommand.error_info = *(c->err_info);
1455 if (copy_to_user(argp, &iocommand, sizeof(IOCTL_Command_struct))) {
1456 kfree(buff);
1457 cmd_special_free(h, c);
1458 return -EFAULT;
1459 }
1460
1461 if (iocommand.Request.Type.Direction == XFER_READ) {
1462 /* Copy the data out of the buffer we created */
1463 if (copy_to_user(iocommand.buf, buff, iocommand.buf_size)) {
7c832835 1464 kfree(buff);
6b4d96b8 1465 cmd_special_free(h, c);
f32f125b 1466 return -EFAULT;
1da177e4 1467 }
f32f125b
SC		 1468 }
1469 kfree(buff);
1470 cmd_special_free(h, c);
1471 return 0;
1472}
1473
0c9f5ba7
SC		 1474static int cciss_bigpassthru(ctlr_info_t *h, void __user *argp)
1475{
1476 BIG_IOCTL_Command_struct *ioc;
1477 CommandList_struct *c;
1478 unsigned char **buff = NULL;
1479 int *buff_size = NULL;
1480 u64bit temp64;
1481 BYTE sg_used = 0;
1482 int status = 0;
1483 int i;
1484 DECLARE_COMPLETION_ONSTACK(wait);
1485 __u32 left;
1486 __u32 sz;
1487 BYTE __user *data_ptr;
1488
1489 if (!argp)
1490 return -EINVAL;
1491 if (!capable(CAP_SYS_RAWIO))
1492 return -EPERM;
1493 ioc = (BIG_IOCTL_Command_struct *)
1494 kmalloc(sizeof(*ioc), GFP_KERNEL);
1495 if (!ioc) {
1496 status = -ENOMEM;
1497 goto cleanup1;
1498 }
1499 if (copy_from_user(ioc, argp, sizeof(*ioc))) {
1500 status = -EFAULT;
1501 goto cleanup1;
1502 }
1503 if ((ioc->buf_size < 1) &&
1504 (ioc->Request.Type.Direction != XFER_NONE)) {
1505 status = -EINVAL;
1506 goto cleanup1;
1507 }
1508 /* Check kmalloc limits using all SGs */
1509 if (ioc->malloc_size > MAX_KMALLOC_SIZE) {
1510 status = -EINVAL;
1511 goto cleanup1;
1512 }
1513 if (ioc->buf_size > ioc->malloc_size * MAXSGENTRIES) {
1514 status = -EINVAL;
1515 goto cleanup1;
1516 }
1517 buff = kzalloc(MAXSGENTRIES * sizeof(char *), GFP_KERNEL);
1518 if (!buff) {
1519 status = -ENOMEM;
1520 goto cleanup1;
1521 }
1522 buff_size = kmalloc(MAXSGENTRIES * sizeof(int), GFP_KERNEL);
1523 if (!buff_size) {
1524 status = -ENOMEM;
1525 goto cleanup1;
1526 }
1527 left = ioc->buf_size;
1528 data_ptr = ioc->buf;
1529 while (left) {
1530 sz = (left > ioc->malloc_size) ? ioc->malloc_size : left;
1531 buff_size[sg_used] = sz;
1532 buff[sg_used] = kmalloc(sz, GFP_KERNEL);
1533 if (buff[sg_used] == NULL) {
1534 status = -ENOMEM;
1535 goto cleanup1;
1536 }
1537 if (ioc->Request.Type.Direction == XFER_WRITE) {
1538 if (copy_from_user(buff[sg_used], data_ptr, sz)) {
7c832835
BH		 1539 status = -EFAULT;
1540 goto cleanup1;
1541 }
0c9f5ba7
SC		 1542 } else {
1543 memset(buff[sg_used], 0, sz);
1544 }
1545 left -= sz;
1546 data_ptr += sz;
1547 sg_used++;
1548 }
1549 c = cmd_special_alloc(h);
1550 if (!c) {
1551 status = -ENOMEM;
1552 goto cleanup1;
1553 }
1554 c->cmd_type = CMD_IOCTL_PEND;
1555 c->Header.ReplyQueue = 0;
fcfb5c0c
SC		 1556 c->Header.SGList = sg_used;
1557 c->Header.SGTotal = sg_used;
0c9f5ba7
SC		 1558 c->Header.LUN = ioc->LUN_info;
1559 c->Header.Tag.lower = c->busaddr;
1560
1561 c->Request = ioc->Request;
fcfb5c0c
SC		 1562 for (i = 0; i < sg_used; i++) {
1563 temp64.val = pci_map_single(h->pdev, buff[i], buff_size[i],
0c9f5ba7 1564 PCI_DMA_BIDIRECTIONAL);
fcfb5c0c
SC		 1565 c->SG[i].Addr.lower = temp64.val32.lower;
1566 c->SG[i].Addr.upper = temp64.val32.upper;
1567 c->SG[i].Len = buff_size[i];
1568 c->SG[i].Ext = 0; /* we are not chaining */
0c9f5ba7
SC		 1569 }
1570 c->waiting = &wait;
1571 enqueue_cmd_and_start_io(h, c);
1572 wait_for_completion(&wait);
1573 /* unlock the buffers from DMA */
1574 for (i = 0; i < sg_used; i++) {
1575 temp64.val32.lower = c->SG[i].Addr.lower;
1576 temp64.val32.upper = c->SG[i].Addr.upper;
1577 pci_unmap_single(h->pdev,
1578 (dma_addr_t) temp64.val, buff_size[i],
1579 PCI_DMA_BIDIRECTIONAL);
1580 }
1581 check_ioctl_unit_attention(h, c);
1582 /* Copy the error information out */
1583 ioc->error_info = *(c->err_info);
1584 if (copy_to_user(argp, ioc, sizeof(*ioc))) {
1585 cmd_special_free(h, c);
1586 status = -EFAULT;
1587 goto cleanup1;
1588 }
1589 if (ioc->Request.Type.Direction == XFER_READ) {
1590 /* Copy the data out of the buffer we created */
1591 BYTE __user *ptr = ioc->buf;
1592 for (i = 0; i < sg_used; i++) {
1593 if (copy_to_user(ptr, buff[i], buff_size[i])) {
6b4d96b8 1594 cmd_special_free(h, c);
7c832835
BH		 1595 status = -EFAULT;
1596 goto cleanup1;
1597 }
0c9f5ba7 1598 ptr += buff_size[i];
1da177e4 1599 }
0c9f5ba7
SC		 1600 }
1601 cmd_special_free(h, c);
1602 status = 0;
1603cleanup1:
1604 if (buff) {
1605 for (i = 0; i < sg_used; i++)
1606 kfree(buff[i]);
1607 kfree(buff);
1608 }
1609 kfree(buff_size);
1610 kfree(ioc);
1611 return status;
1612}
1613
ef7822c2 1614static int cciss_ioctl(struct block_device *bdev, fmode_t mode,
c525919d 1615 unsigned int cmd, unsigned long arg)
1da177e4 1616{
1da177e4 1617 struct gendisk *disk = bdev->bd_disk;
f70dba83 1618 ctlr_info_t *h = get_host(disk);
1da177e4
LT		 1619 void __user *argp = (void __user *)arg;
1620
b2a4a43d
SC		 1621 dev_dbg(&h->pdev->dev, "cciss_ioctl: Called with cmd=%x %lx\n",
1622 cmd, arg);
7c832835 1623 switch (cmd) {
1da177e4 1624 case CCISS_GETPCIINFO:
0a25a5ae 1625 return cciss_getpciinfo(h, argp);
1da177e4 1626 case CCISS_GETINTINFO:
576e661c 1627 return cciss_getintinfo(h, argp);
1da177e4 1628 case CCISS_SETINTINFO:
4c800eed 1629 return cciss_setintinfo(h, argp);
1da177e4 1630 case CCISS_GETNODENAME:
25216109 1631 return cciss_getnodename(h, argp);
1da177e4 1632 case CCISS_SETNODENAME:
4f43f32c 1633 return cciss_setnodename(h, argp);
1da177e4 1634 case CCISS_GETHEARTBEAT:
93c74931 1635 return cciss_getheartbeat(h, argp);
1da177e4 1636 case CCISS_GETBUSTYPES:
d18dfad4 1637 return cciss_getbustypes(h, argp);
1da177e4 1638 case CCISS_GETFIRMVER:
8a4f7fbf 1639 return cciss_getfirmver(h, argp);
7c832835 1640 case CCISS_GETDRIVVER:
c525919d 1641 return cciss_getdrivver(h, argp);
6ae5ce8e
MM		 1642 case CCISS_DEREGDISK:
1643 case CCISS_REGNEWD:
1da177e4 1644 case CCISS_REVALIDVOLS:
f70dba83 1645 return rebuild_lun_table(h, 0, 1);
0894b32c
SC		 1646 case CCISS_GETLUNINFO:
1647 return cciss_getluninfo(h, disk, argp);
1da177e4 1648 case CCISS_PASSTHRU:
f32f125b 1649 return cciss_passthru(h, argp);
0c9f5ba7
SC		 1650 case CCISS_BIG_PASSTHRU:
1651 return cciss_bigpassthru(h, argp);
03bbfee5
MMOD		 1652
1653 /* scsi_cmd_ioctl handles these, below, though some are not */
1654 /* very meaningful for cciss. SG_IO is the main one people want. */
1655
1656 case SG_GET_VERSION_NUM:
1657 case SG_SET_TIMEOUT:
1658 case SG_GET_TIMEOUT:
1659 case SG_GET_RESERVED_SIZE:
1660 case SG_SET_RESERVED_SIZE:
1661 case SG_EMULATED_HOST:
1662 case SG_IO:
1663 case SCSI_IOCTL_SEND_COMMAND:
ef7822c2 1664 return scsi_cmd_ioctl(disk->queue, disk, mode, cmd, argp);
03bbfee5
MMOD		 1665
1666 /* scsi_cmd_ioctl would normally handle these, below, but */
1667 /* they aren't a good fit for cciss, as CD-ROMs are */
1668 /* not supported, and we don't have any bus/target/lun */
1669 /* which we present to the kernel. */
1670
1671 case CDROM_SEND_PACKET:
1672 case CDROMCLOSETRAY:
1673 case CDROMEJECT:
1674 case SCSI_IOCTL_GET_IDLUN:
1675 case SCSI_IOCTL_GET_BUS_NUMBER:
1da177e4
LT		 1676 default:
1677 return -ENOTTY;
1678 }
1da177e4
LT		 1679}
1680
7b30f092
JA		 1681static void cciss_check_queues(ctlr_info_t *h)
1682{
1683 int start_queue = h->next_to_run;
1684 int i;
1685
1686 /* check to see if we have maxed out the number of commands that can
1687 * be placed on the queue. If so then exit. We do this check here
1688 * in case the interrupt we serviced was from an ioctl and did not
1689 * free any new commands.
1690 */
f880632f 1691 if ((find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds)) == h->nr_cmds)
7b30f092
JA		 1692 return;
1693
1694 /* We have room on the queue for more commands. Now we need to queue
1695 * them up. We will also keep track of the next queue to run so
1696 * that every queue gets a chance to be started first.
1697 */
1698 for (i = 0; i < h->highest_lun + 1; i++) {
1699 int curr_queue = (start_queue + i) % (h->highest_lun + 1);
1700 /* make sure the disk has been added and the drive is real
1701 * because this can be called from the middle of init_one.
1702 */
9cef0d2f
SC		 1703 if (!h->drv[curr_queue])
1704 continue;
1705 if (!(h->drv[curr_queue]->queue) ||
1706 !(h->drv[curr_queue]->heads))
7b30f092
JA		 1707 continue;
1708 blk_start_queue(h->gendisk[curr_queue]->queue);
1709
1710 /* check to see if we have maxed out the number of commands
1711 * that can be placed on the queue.
1712 */
f880632f 1713 if ((find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds)) == h->nr_cmds) {
7b30f092
JA		 1714 if (curr_queue == start_queue) {
1715 h->next_to_run =
1716 (start_queue + 1) % (h->highest_lun + 1);
1717 break;
1718 } else {
1719 h->next_to_run = curr_queue;
1720 break;
1721 }
7b30f092
JA		 1722 }
1723 }
1724}
1725
ca1e0484
MM		 1726static void cciss_softirq_done(struct request *rq)
1727{
f70dba83
SC		 1728 CommandList_struct *c = rq->completion_data;
1729 ctlr_info_t *h = hba[c->ctlr];
1730 SGDescriptor_struct *curr_sg = c->SG;
ca1e0484 1731 u64bit temp64;
664a717d 1732 unsigned long flags;
ca1e0484 1733 int i, ddir;
5c07a311 1734 int sg_index = 0;
ca1e0484 1735
f70dba83 1736 if (c->Request.Type.Direction == XFER_READ)
ca1e0484
MM		 1737 ddir = PCI_DMA_FROMDEVICE;
1738 else
1739 ddir = PCI_DMA_TODEVICE;
1740
1741 /* command did not need to be retried */
1742 /* unmap the DMA mapping for all the scatter gather elements */
f70dba83 1743 for (i = 0; i < c->Header.SGList; i++) {
5c07a311 1744 if (curr_sg[sg_index].Ext == CCISS_SG_CHAIN) {
f70dba83 1745 cciss_unmap_sg_chain_block(h, c);
5c07a311 1746 /* Point to the next block */
f70dba83 1747 curr_sg = h->cmd_sg_list[c->cmdindex];
5c07a311
DB		 1748 sg_index = 0;
1749 }
1750 temp64.val32.lower = curr_sg[sg_index].Addr.lower;
1751 temp64.val32.upper = curr_sg[sg_index].Addr.upper;
1752 pci_unmap_page(h->pdev, temp64.val, curr_sg[sg_index].Len,
1753 ddir);
1754 ++sg_index;
ca1e0484
MM		 1755 }
1756
b2a4a43d 1757 dev_dbg(&h->pdev->dev, "Done with %p\n", rq);
ca1e0484 1758
c3a4d78c 1759 /* set the residual count for pc requests */
33659ebb 1760 if (rq->cmd_type == REQ_TYPE_BLOCK_PC)
f70dba83 1761 rq->resid_len = c->err_info->ResidualCnt;
ac44e5b2 1762
c3a4d78c 1763 blk_end_request_all(rq, (rq->errors == 0) ? 0 : -EIO);
3daeea29 1764
ca1e0484 1765 spin_lock_irqsave(&h->lock, flags);
6b4d96b8 1766 cmd_free(h, c);
7b30f092 1767 cciss_check_queues(h);
ca1e0484
MM		 1768 spin_unlock_irqrestore(&h->lock, flags);
1769}
1770
39ccf9a6
SC		 1771static inline void log_unit_to_scsi3addr(ctlr_info_t *h,
1772 unsigned char scsi3addr[], uint32_t log_unit)
b57695fe 1773{
9cef0d2f
SC		 1774 memcpy(scsi3addr, h->drv[log_unit]->LunID,
1775 sizeof(h->drv[log_unit]->LunID));
b57695fe 1776}
1777
7fe06326
AP		 1778/* This function gets the SCSI vendor, model, and revision of a logical drive
1779 * via the inquiry page 0. Model, vendor, and rev are set to empty strings if
1780 * they cannot be read.
1781 */
f70dba83 1782static void cciss_get_device_descr(ctlr_info_t *h, int logvol,
7fe06326
AP		 1783 char *vendor, char *model, char *rev)
1784{
1785 int rc;
1786 InquiryData_struct *inq_buf;
b57695fe 1787 unsigned char scsi3addr[8];
7fe06326
AP		 1788
1789 *vendor = '\0';
1790 *model = '\0';
1791 *rev = '\0';
1792
1793 inq_buf = kzalloc(sizeof(InquiryData_struct), GFP_KERNEL);
1794 if (!inq_buf)
1795 return;
1796
f70dba83
SC		 1797 log_unit_to_scsi3addr(h, scsi3addr, logvol);
1798 rc = sendcmd_withirq(h, CISS_INQUIRY, inq_buf, sizeof(*inq_buf), 0,
7b838bde 1799 scsi3addr, TYPE_CMD);
7fe06326
AP		 1800 if (rc == IO_OK) {
1801 memcpy(vendor, &inq_buf->data_byte[8], VENDOR_LEN);
1802 vendor[VENDOR_LEN] = '\0';
1803 memcpy(model, &inq_buf->data_byte[16], MODEL_LEN);
1804 model[MODEL_LEN] = '\0';
1805 memcpy(rev, &inq_buf->data_byte[32], REV_LEN);
1806 rev[REV_LEN] = '\0';
1807 }
1808
1809 kfree(inq_buf);
1810 return;
1811}
1812
a72da29b
MM		 1813/* This function gets the serial number of a logical drive via
1814 * inquiry page 0x83. Serial no. is 16 bytes. If the serial
1815 * number cannot be had, for whatever reason, 16 bytes of 0xff
1816 * are returned instead.
1817 */
f70dba83 1818static void cciss_get_serial_no(ctlr_info_t *h, int logvol,
a72da29b
MM		 1819 unsigned char *serial_no, int buflen)
1820{
1821#define PAGE_83_INQ_BYTES 64
1822 int rc;
1823 unsigned char *buf;
b57695fe 1824 unsigned char scsi3addr[8];
a72da29b
MM		 1825
1826 if (buflen > 16)
1827 buflen = 16;
1828 memset(serial_no, 0xff, buflen);
1829 buf = kzalloc(PAGE_83_INQ_BYTES, GFP_KERNEL);
1830 if (!buf)
1831 return;
1832 memset(serial_no, 0, buflen);
f70dba83
SC		 1833 log_unit_to_scsi3addr(h, scsi3addr, logvol);
1834 rc = sendcmd_withirq(h, CISS_INQUIRY, buf,
7b838bde 1835 PAGE_83_INQ_BYTES, 0x83, scsi3addr, TYPE_CMD);
a72da29b
MM		 1836 if (rc == IO_OK)
1837 memcpy(serial_no, &buf[8], buflen);
1838 kfree(buf);
1839 return;
1840}
1841
617e1344
SC		 1842/*
1843 * cciss_add_disk sets up the block device queue for a logical drive
1844 */
1845static int cciss_add_disk(ctlr_info_t *h, struct gendisk *disk,
6ae5ce8e
MM		 1846 int drv_index)
1847{
1848 disk->queue = blk_init_queue(do_cciss_request, &h->lock);
e8074f79
SC		 1849 if (!disk->queue)
1850 goto init_queue_failure;
6ae5ce8e
MM		 1851 sprintf(disk->disk_name, "cciss/c%dd%d", h->ctlr, drv_index);
1852 disk->major = h->major;
1853 disk->first_minor = drv_index << NWD_SHIFT;
1854 disk->fops = &cciss_fops;
9cef0d2f
SC		 1855 if (cciss_create_ld_sysfs_entry(h, drv_index))
1856 goto cleanup_queue;
1857 disk->private_data = h->drv[drv_index];
1858 disk->driverfs_dev = &h->drv[drv_index]->dev;
6ae5ce8e
MM		 1859
1860 /* Set up queue information */
1861 blk_queue_bounce_limit(disk->queue, h->pdev->dma_mask);
1862
1863 /* This is a hardware imposed limit. */
8a78362c 1864 blk_queue_max_segments(disk->queue, h->maxsgentries);
6ae5ce8e 1865
086fa5ff 1866 blk_queue_max_hw_sectors(disk->queue, h->cciss_max_sectors);
6ae5ce8e
MM		 1867
1868 blk_queue_softirq_done(disk->queue, cciss_softirq_done);
1869
1870 disk->queue->queuedata = h;
1871
e1defc4f 1872 blk_queue_logical_block_size(disk->queue,
9cef0d2f 1873 h->drv[drv_index]->block_size);
6ae5ce8e
MM		 1874
1875 /* Make sure all queue data is written out before */
9cef0d2f 1876 /* setting h->drv[drv_index]->queue, as setting this */
6ae5ce8e
MM		 1877 /* allows the interrupt handler to start the queue */
1878 wmb();
9cef0d2f 1879 h->drv[drv_index]->queue = disk->queue;
6ae5ce8e 1880 add_disk(disk);
617e1344
SC		 1881 return 0;
1882
1883cleanup_queue:
1884 blk_cleanup_queue(disk->queue);
1885 disk->queue = NULL;
e8074f79 1886init_queue_failure:
617e1344 1887 return -1;
6ae5ce8e
MM		 1888}
1889
ddd47442 1890/* This function will check the usage_count of the drive to be updated/added.
a72da29b
MM		 1891 * If the usage_count is zero and it is a heretofore unknown drive, or,
1892 * the drive's capacity, geometry, or serial number has changed,
1893 * then the drive information will be updated and the disk will be
1894 * re-registered with the kernel. If these conditions don't hold,
1895 * then it will be left alone for the next reboot. The exception to this
1896 * is disk 0 which will always be left registered with the kernel since it
1897 * is also the controller node. Any changes to disk 0 will show up on
1898 * the next reboot.
7c832835 1899 */
f70dba83
SC		 1900static void cciss_update_drive_info(ctlr_info_t *h, int drv_index,
1901 int first_time, int via_ioctl)
7c832835 1902{
ddd47442 1903 struct gendisk *disk;
ddd47442
MM		 1904 InquiryData_struct *inq_buff = NULL;
1905 unsigned int block_size;
00988a35 1906 sector_t total_size;
ddd47442
MM		 1907 unsigned long flags = 0;
1908 int ret = 0;
a72da29b
MM		 1909 drive_info_struct *drvinfo;
1910
1911 /* Get information about the disk and modify the driver structure */
1912 inq_buff = kmalloc(sizeof(InquiryData_struct), GFP_KERNEL);
9cef0d2f 1913 drvinfo = kzalloc(sizeof(*drvinfo), GFP_KERNEL);
a72da29b
MM		 1914 if (inq_buff == NULL || drvinfo == NULL)
1915 goto mem_msg;
1916
1917 /* testing to see if 16-byte CDBs are already being used */
1918 if (h->cciss_read == CCISS_READ_16) {
f70dba83 1919 cciss_read_capacity_16(h, drv_index,
a72da29b
MM		 1920 &total_size, &block_size);
1921
1922 } else {
f70dba83 1923 cciss_read_capacity(h, drv_index, &total_size, &block_size);
a72da29b
MM		 1924 /* if read_capacity returns all F's this volume is >2TB */
1925 /* in size so we switch to 16-byte CDB's for all */
1926 /* read/write ops */
1927 if (total_size == 0xFFFFFFFFULL) {
f70dba83 1928 cciss_read_capacity_16(h, drv_index,
a72da29b
MM		 1929 &total_size, &block_size);
1930 h->cciss_read = CCISS_READ_16;
1931 h->cciss_write = CCISS_WRITE_16;
1932 } else {
1933 h->cciss_read = CCISS_READ_10;
1934 h->cciss_write = CCISS_WRITE_10;
1935 }
1936 }
1937
f70dba83 1938 cciss_geometry_inquiry(h, drv_index, total_size, block_size,
a72da29b
MM		 1939 inq_buff, drvinfo);
1940 drvinfo->block_size = block_size;
1941 drvinfo->nr_blocks = total_size + 1;
1942
f70dba83 1943 cciss_get_device_descr(h, drv_index, drvinfo->vendor,
7fe06326 1944 drvinfo->model, drvinfo->rev);
f70dba83 1945 cciss_get_serial_no(h, drv_index, drvinfo->serial_no,
a72da29b 1946 sizeof(drvinfo->serial_no));
9cef0d2f
SC		 1947 /* Save the lunid in case we deregister the disk, below. */
1948 memcpy(drvinfo->LunID, h->drv[drv_index]->LunID,
1949 sizeof(drvinfo->LunID));
a72da29b
MM		 1950
1951 /* Is it the same disk we already know, and nothing's changed? */
9cef0d2f 1952 if (h->drv[drv_index]->raid_level != -1 &&
a72da29b 1953 ((memcmp(drvinfo->serial_no,
9cef0d2f
SC		 1954 h->drv[drv_index]->serial_no, 16) == 0) &&
1955 drvinfo->block_size == h->drv[drv_index]->block_size &&
1956 drvinfo->nr_blocks == h->drv[drv_index]->nr_blocks &&
1957 drvinfo->heads == h->drv[drv_index]->heads &&
1958 drvinfo->sectors == h->drv[drv_index]->sectors &&
1959 drvinfo->cylinders == h->drv[drv_index]->cylinders))
a72da29b
MM		 1960 /* The disk is unchanged, nothing to update */
1961 goto freeret;
a72da29b 1962
6ae5ce8e
MM		 1963 /* If we get here it's not the same disk, or something's changed,
1964 * so we need to * deregister it, and re-register it, if it's not
1965 * in use.
1966 * If the disk already exists then deregister it before proceeding
1967 * (unless it's the first disk (for the controller node).
1968 */
9cef0d2f 1969 if (h->drv[drv_index]->raid_level != -1 && drv_index != 0) {
b2a4a43d 1970 dev_warn(&h->pdev->dev, "disk %d has changed.\n", drv_index);
f70dba83 1971 spin_lock_irqsave(&h->lock, flags);
9cef0d2f 1972 h->drv[drv_index]->busy_configuring = 1;
f70dba83 1973 spin_unlock_irqrestore(&h->lock, flags);
e14ac670 1974
9cef0d2f 1975 /* deregister_disk sets h->drv[drv_index]->queue = NULL
6ae5ce8e
MM		 1976 * which keeps the interrupt handler from starting
1977 * the queue.
1978 */
2d11d993 1979 ret = deregister_disk(h, drv_index, 0, via_ioctl);
ddd47442
MM		 1980 }
1981
1982 /* If the disk is in use return */
1983 if (ret)
a72da29b
MM		 1984 goto freeret;
1985
6ae5ce8e 1986 /* Save the new information from cciss_geometry_inquiry
9cef0d2f
SC		 1987 * and serial number inquiry. If the disk was deregistered
1988 * above, then h->drv[drv_index] will be NULL.
6ae5ce8e 1989 */
9cef0d2f
SC		 1990 if (h->drv[drv_index] == NULL) {
1991 drvinfo->device_initialized = 0;
1992 h->drv[drv_index] = drvinfo;
1993 drvinfo = NULL; /* so it won't be freed below. */
1994 } else {
1995 /* special case for cxd0 */
1996 h->drv[drv_index]->block_size = drvinfo->block_size;
1997 h->drv[drv_index]->nr_blocks = drvinfo->nr_blocks;
1998 h->drv[drv_index]->heads = drvinfo->heads;
1999 h->drv[drv_index]->sectors = drvinfo->sectors;
2000 h->drv[drv_index]->cylinders = drvinfo->cylinders;
2001 h->drv[drv_index]->raid_level = drvinfo->raid_level;
2002 memcpy(h->drv[drv_index]->serial_no, drvinfo->serial_no, 16);
2003 memcpy(h->drv[drv_index]->vendor, drvinfo->vendor,
2004 VENDOR_LEN + 1);
2005 memcpy(h->drv[drv_index]->model, drvinfo->model, MODEL_LEN + 1);
2006 memcpy(h->drv[drv_index]->rev, drvinfo->rev, REV_LEN + 1);
2007 }
ddd47442
MM		 2008
2009 ++h->num_luns;
2010 disk = h->gendisk[drv_index];
9cef0d2f 2011 set_capacity(disk, h->drv[drv_index]->nr_blocks);
ddd47442 2012
6ae5ce8e
MM		 2013 /* If it's not disk 0 (drv_index != 0)
2014 * or if it was disk 0, but there was previously
2015 * no actual corresponding configured logical drive
2016 * (raid_leve == -1) then we want to update the
2017 * logical drive's information.
2018 */
361e9b07
SC		 2019 if (drv_index || first_time) {
2020 if (cciss_add_disk(h, disk, drv_index) != 0) {
2021 cciss_free_gendisk(h, drv_index);
9cef0d2f 2022 cciss_free_drive_info(h, drv_index);
b2a4a43d
SC		 2023 dev_warn(&h->pdev->dev, "could not update disk %d\n",
2024 drv_index);
361e9b07
SC		 2025 --h->num_luns;
2026 }
2027 }
ddd47442 2028
6ae5ce8e 2029freeret:
ddd47442 2030 kfree(inq_buff);
a72da29b 2031 kfree(drvinfo);
ddd47442 2032 return;
6ae5ce8e 2033mem_msg:
b2a4a43d 2034 dev_err(&h->pdev->dev, "out of memory\n");
ddd47442
MM		 2035 goto freeret;
2036}
2037
2038/* This function will find the first index of the controllers drive array
9cef0d2f
SC		 2039 * that has a null drv pointer and allocate the drive info struct and
2040 * will return that index This is where new drives will be added.
2041 * If the index to be returned is greater than the highest_lun index for
2042 * the controller then highest_lun is set * to this new index.
2043 * If there are no available indexes or if tha allocation fails, then -1
2044 * is returned. * "controller_node" is used to know if this is a real
2045 * logical drive, or just the controller node, which determines if this
2046 * counts towards highest_lun.
7c832835 2047 */
9cef0d2f 2048static int cciss_alloc_drive_info(ctlr_info_t *h, int controller_node)
ddd47442
MM		 2049{
2050 int i;
9cef0d2f 2051 drive_info_struct *drv;
ddd47442 2052
9cef0d2f 2053 /* Search for an empty slot for our drive info */
7c832835 2054 for (i = 0; i < CISS_MAX_LUN; i++) {
9cef0d2f
SC		 2055
2056 /* if not cxd0 case, and it's occupied, skip it. */
2057 if (h->drv[i] && i != 0)
2058 continue;
2059 /*
2060 * If it's cxd0 case, and drv is alloc'ed already, and a
2061 * disk is configured there, skip it.
2062 */
2063 if (i == 0 && h->drv[i] && h->drv[i]->raid_level != -1)
2064 continue;
2065
2066 /*
2067 * We've found an empty slot. Update highest_lun
2068 * provided this isn't just the fake cxd0 controller node.
2069 */
2070 if (i > h->highest_lun && !controller_node)
2071 h->highest_lun = i;
2072
2073 /* If adding a real disk at cxd0, and it's already alloc'ed */
2074 if (i == 0 && h->drv[i] != NULL)
ddd47442 2075 return i;
9cef0d2f
SC		 2076
2077 /*
2078 * Found an empty slot, not already alloc'ed. Allocate it.
2079 * Mark it with raid_level == -1, so we know it's new later on.
2080 */
2081 drv = kzalloc(sizeof(*drv), GFP_KERNEL);
2082 if (!drv)
2083 return -1;
2084 drv->raid_level = -1; /* so we know it's new */
2085 h->drv[i] = drv;
2086 return i;
ddd47442
MM		 2087 }
2088 return -1;
2089}
2090
9cef0d2f
SC		 2091static void cciss_free_drive_info(ctlr_info_t *h, int drv_index)
2092{
2093 kfree(h->drv[drv_index]);
2094 h->drv[drv_index] = NULL;
2095}
2096
361e9b07
SC		 2097static void cciss_free_gendisk(ctlr_info_t *h, int drv_index)
2098{
2099 put_disk(h->gendisk[drv_index]);
2100 h->gendisk[drv_index] = NULL;
2101}
2102
6ae5ce8e
MM		 2103/* cciss_add_gendisk finds a free hba[]->drv structure
2104 * and allocates a gendisk if needed, and sets the lunid
2105 * in the drvinfo structure. It returns the index into
2106 * the ->drv[] array, or -1 if none are free.
2107 * is_controller_node indicates whether highest_lun should
2108 * count this disk, or if it's only being added to provide
2109 * a means to talk to the controller in case no logical
2110 * drives have yet been configured.
2111 */
39ccf9a6
SC		 2112static int cciss_add_gendisk(ctlr_info_t *h, unsigned char lunid[],
2113 int controller_node)
6ae5ce8e
MM		 2114{
2115 int drv_index;
2116
9cef0d2f 2117 drv_index = cciss_alloc_drive_info(h, controller_node);
6ae5ce8e
MM		 2118 if (drv_index == -1)
2119 return -1;
8ce51966 2120
6ae5ce8e
MM		 2121 /*Check if the gendisk needs to be allocated */
2122 if (!h->gendisk[drv_index]) {
2123 h->gendisk[drv_index] =
2124 alloc_disk(1 << NWD_SHIFT);
2125 if (!h->gendisk[drv_index]) {
b2a4a43d
SC		 2126 dev_err(&h->pdev->dev,
2127 "could not allocate a new disk %d\n",
2128 drv_index);
9cef0d2f 2129 goto err_free_drive_info;
6ae5ce8e
MM		 2130 }
2131 }
9cef0d2f
SC		 2132 memcpy(h->drv[drv_index]->LunID, lunid,
2133 sizeof(h->drv[drv_index]->LunID));
2134 if (cciss_create_ld_sysfs_entry(h, drv_index))
7fe06326 2135 goto err_free_disk;
6ae5ce8e
MM		 2136 /* Don't need to mark this busy because nobody */
2137 /* else knows about this disk yet to contend */
2138 /* for access to it. */
9cef0d2f 2139 h->drv[drv_index]->busy_configuring = 0;
6ae5ce8e
MM		 2140 wmb();
2141 return drv_index;
7fe06326
AP		 2142
2143err_free_disk:
361e9b07 2144 cciss_free_gendisk(h, drv_index);
9cef0d2f
SC		 2145err_free_drive_info:
2146 cciss_free_drive_info(h, drv_index);
7fe06326 2147 return -1;
6ae5ce8e
MM		 2148}
2149
2150/* This is for the special case of a controller which
2151 * has no logical drives. In this case, we still need
2152 * to register a disk so the controller can be accessed
2153 * by the Array Config Utility.
2154 */
2155static void cciss_add_controller_node(ctlr_info_t *h)
2156{
2157 struct gendisk *disk;
2158 int drv_index;
2159
2160 if (h->gendisk[0] != NULL) /* already did this? Then bail. */
2161 return;
2162
39ccf9a6 2163 drv_index = cciss_add_gendisk(h, CTLR_LUNID, 1);
361e9b07
SC		 2164 if (drv_index == -1)
2165 goto error;
9cef0d2f
SC		 2166 h->drv[drv_index]->block_size = 512;
2167 h->drv[drv_index]->nr_blocks = 0;
2168 h->drv[drv_index]->heads = 0;
2169 h->drv[drv_index]->sectors = 0;
2170 h->drv[drv_index]->cylinders = 0;
2171 h->drv[drv_index]->raid_level = -1;
2172 memset(h->drv[drv_index]->serial_no, 0, 16);
6ae5ce8e 2173 disk = h->gendisk[drv_index];
361e9b07
SC		 2174 if (cciss_add_disk(h, disk, drv_index) == 0)
2175 return;
2176 cciss_free_gendisk(h, drv_index);
9cef0d2f 2177 cciss_free_drive_info(h, drv_index);
361e9b07 2178error:
b2a4a43d 2179 dev_warn(&h->pdev->dev, "could not add disk 0.\n");
361e9b07 2180 return;
6ae5ce8e
MM		 2181}
2182
ddd47442 2183/* This function will add and remove logical drives from the Logical
d14c4ab5 2184 * drive array of the controller and maintain persistency of ordering
ddd47442
MM		 2185 * so that mount points are preserved until the next reboot. This allows
2186 * for the removal of logical drives in the middle of the drive array
2187 * without a re-ordering of those drives.
2188 * INPUT
2189 * h = The controller to perform the operations on
7c832835 2190 */
2d11d993
SC		 2191static int rebuild_lun_table(ctlr_info_t *h, int first_time,
2192 int via_ioctl)
1da177e4 2193{
ddd47442
MM		 2194 int num_luns;
2195 ReportLunData_struct *ld_buff = NULL;
ddd47442
MM		 2196 int return_code;
2197 int listlength = 0;
2198 int i;
2199 int drv_found;
2200 int drv_index = 0;
39ccf9a6 2201 unsigned char lunid[8] = CTLR_LUNID;
1da177e4 2202 unsigned long flags;
ddd47442 2203
6ae5ce8e
MM		 2204 if (!capable(CAP_SYS_RAWIO))
2205 return -EPERM;
2206
ddd47442 2207 /* Set busy_configuring flag for this operation */
f70dba83 2208 spin_lock_irqsave(&h->lock, flags);
7c832835 2209 if (h->busy_configuring) {
f70dba83 2210 spin_unlock_irqrestore(&h->lock, flags);
ddd47442
MM		 2211 return -EBUSY;
2212 }
2213 h->busy_configuring = 1;
f70dba83 2214 spin_unlock_irqrestore(&h->lock, flags);
ddd47442 2215
a72da29b
MM		 2216 ld_buff = kzalloc(sizeof(ReportLunData_struct), GFP_KERNEL);
2217 if (ld_buff == NULL)
2218 goto mem_msg;
2219
f70dba83 2220 return_code = sendcmd_withirq(h, CISS_REPORT_LOG, ld_buff,
b57695fe 2221 sizeof(ReportLunData_struct),
2222 0, CTLR_LUNID, TYPE_CMD);
ddd47442 2223
a72da29b
MM		 2224 if (return_code == IO_OK)
2225 listlength = be32_to_cpu(*(__be32 *) ld_buff->LUNListLength);
2226 else { /* reading number of logical volumes failed */
b2a4a43d
SC		 2227 dev_warn(&h->pdev->dev,
2228 "report logical volume command failed\n");
a72da29b
MM		 2229 listlength = 0;
2230 goto freeret;
2231 }
2232
2233 num_luns = listlength / 8; /* 8 bytes per entry */
2234 if (num_luns > CISS_MAX_LUN) {
2235 num_luns = CISS_MAX_LUN;
b2a4a43d 2236 dev_warn(&h->pdev->dev, "more luns configured"
a72da29b
MM		 2237 " on controller than can be handled by"
2238 " this driver.\n");
2239 }
2240
6ae5ce8e
MM		 2241 if (num_luns == 0)
2242 cciss_add_controller_node(h);
2243
2244 /* Compare controller drive array to driver's drive array
2245 * to see if any drives are missing on the controller due
2246 * to action of Array Config Utility (user deletes drive)
2247 * and deregister logical drives which have disappeared.
2248 */
a72da29b
MM		 2249 for (i = 0; i <= h->highest_lun; i++) {
2250 int j;
2251 drv_found = 0;
d8a0be6a
SC		 2252
2253 /* skip holes in the array from already deleted drives */
9cef0d2f 2254 if (h->drv[i] == NULL)
d8a0be6a
SC		 2255 continue;
2256
a72da29b 2257 for (j = 0; j < num_luns; j++) {
39ccf9a6 2258 memcpy(lunid, &ld_buff->LUN[j][0], sizeof(lunid));
9cef0d2f 2259 if (memcmp(h->drv[i]->LunID, lunid,
39ccf9a6 2260 sizeof(lunid)) == 0) {
a72da29b
MM		 2261 drv_found = 1;
2262 break;
2263 }
2264 }
2265 if (!drv_found) {
2266 /* Deregister it from the OS, it's gone. */
f70dba83 2267 spin_lock_irqsave(&h->lock, flags);
9cef0d2f 2268 h->drv[i]->busy_configuring = 1;
f70dba83 2269 spin_unlock_irqrestore(&h->lock, flags);
2d11d993 2270 return_code = deregister_disk(h, i, 1, via_ioctl);
9cef0d2f
SC		 2271 if (h->drv[i] != NULL)
2272 h->drv[i]->busy_configuring = 0;
ddd47442 2273 }
a72da29b 2274 }
ddd47442 2275
a72da29b
MM		 2276 /* Compare controller drive array to driver's drive array.
2277 * Check for updates in the drive information and any new drives
2278 * on the controller due to ACU adding logical drives, or changing
2279 * a logical drive's size, etc. Reregister any new/changed drives
2280 */
2281 for (i = 0; i < num_luns; i++) {
2282 int j;
ddd47442 2283
a72da29b 2284 drv_found = 0;
ddd47442 2285
39ccf9a6 2286 memcpy(lunid, &ld_buff->LUN[i][0], sizeof(lunid));
a72da29b
MM		 2287 /* Find if the LUN is already in the drive array
2288 * of the driver. If so then update its info
2289 * if not in use. If it does not exist then find
2290 * the first free index and add it.
2291 */
2292 for (j = 0; j <= h->highest_lun; j++) {
9cef0d2f
SC		 2293 if (h->drv[j] != NULL &&
2294 memcmp(h->drv[j]->LunID, lunid,
2295 sizeof(h->drv[j]->LunID)) == 0) {
a72da29b
MM		 2296 drv_index = j;
2297 drv_found = 1;
2298 break;
ddd47442 2299 }
a72da29b 2300 }
ddd47442 2301
a72da29b
MM		 2302 /* check if the drive was found already in the array */
2303 if (!drv_found) {
eece695f 2304 drv_index = cciss_add_gendisk(h, lunid, 0);
a72da29b
MM		 2305 if (drv_index == -1)
2306 goto freeret;
a72da29b 2307 }
f70dba83 2308 cciss_update_drive_info(h, drv_index, first_time, via_ioctl);
a72da29b 2309 } /* end for */
ddd47442 2310
6ae5ce8e 2311freeret:
ddd47442
MM		 2312 kfree(ld_buff);
2313 h->busy_configuring = 0;
2314 /* We return -1 here to tell the ACU that we have registered/updated
2315 * all of the drives that we can and to keep it from calling us
2316 * additional times.
7c832835 2317 */
ddd47442 2318 return -1;
6ae5ce8e 2319mem_msg:
b2a4a43d 2320 dev_err(&h->pdev->dev, "out of memory\n");
a72da29b 2321 h->busy_configuring = 0;
ddd47442
MM		 2322 goto freeret;
2323}
2324
9ddb27b4
SC		 2325static void cciss_clear_drive_info(drive_info_struct *drive_info)
2326{
2327 /* zero out the disk size info */
2328 drive_info->nr_blocks = 0;
2329 drive_info->block_size = 0;
2330 drive_info->heads = 0;
2331 drive_info->sectors = 0;
2332 drive_info->cylinders = 0;
2333 drive_info->raid_level = -1;
2334 memset(drive_info->serial_no, 0, sizeof(drive_info->serial_no));
2335 memset(drive_info->model, 0, sizeof(drive_info->model));
2336 memset(drive_info->rev, 0, sizeof(drive_info->rev));
2337 memset(drive_info->vendor, 0, sizeof(drive_info->vendor));
2338 /*
2339 * don't clear the LUNID though, we need to remember which
2340 * one this one is.
2341 */
2342}
2343
ddd47442
MM		 2344/* This function will deregister the disk and it's queue from the
2345 * kernel. It must be called with the controller lock held and the
2346 * drv structures busy_configuring flag set. It's parameters are:
2347 *
2348 * disk = This is the disk to be deregistered
2349 * drv = This is the drive_info_struct associated with the disk to be
2350 * deregistered. It contains information about the disk used
2351 * by the driver.
2352 * clear_all = This flag determines whether or not the disk information
2353 * is going to be completely cleared out and the highest_lun
2354 * reset. Sometimes we want to clear out information about
d14c4ab5 2355 * the disk in preparation for re-adding it. In this case
ddd47442
MM		 2356 * the highest_lun should be left unchanged and the LunID
2357 * should not be cleared.
2d11d993
SC		 2358 * via_ioctl
2359 * This indicates whether we've reached this path via ioctl.
2360 * This affects the maximum usage count allowed for c0d0 to be messed with.
2361 * If this path is reached via ioctl(), then the max_usage_count will
2362 * be 1, as the process calling ioctl() has got to have the device open.
2363 * If we get here via sysfs, then the max usage count will be zero.
ddd47442 2364*/
a0ea8622 2365static int deregister_disk(ctlr_info_t *h, int drv_index,
2d11d993 2366 int clear_all, int via_ioctl)
ddd47442 2367{
799202cb 2368 int i;
a0ea8622
SC		 2369 struct gendisk *disk;
2370 drive_info_struct *drv;
9cef0d2f 2371 int recalculate_highest_lun;
1da177e4
LT		 2372
2373 if (!capable(CAP_SYS_RAWIO))
2374 return -EPERM;
2375
9cef0d2f 2376 drv = h->drv[drv_index];
a0ea8622
SC		 2377 disk = h->gendisk[drv_index];
2378
1da177e4 2379 /* make sure logical volume is NOT is use */
7c832835 2380 if (clear_all || (h->gendisk[0] == disk)) {
2d11d993 2381 if (drv->usage_count > via_ioctl)
7c832835
BH		 2382 return -EBUSY;
2383 } else if (drv->usage_count > 0)
2384 return -EBUSY;
1da177e4 2385
9cef0d2f
SC		 2386 recalculate_highest_lun = (drv == h->drv[h->highest_lun]);
2387
ddd47442
MM		 2388 /* invalidate the devices and deregister the disk. If it is disk
2389 * zero do not deregister it but just zero out it's values. This
2390 * allows us to delete disk zero but keep the controller registered.
7c832835
BH		 2391 */
2392 if (h->gendisk[0] != disk) {
5a9df732 2393 struct request_queue *q = disk->queue;
097d0264 2394 if (disk->flags & GENHD_FL_UP) {
8ce51966 2395 cciss_destroy_ld_sysfs_entry(h, drv_index, 0);
5a9df732 2396 del_gendisk(disk);
5a9df732 2397 }
9cef0d2f 2398 if (q)
5a9df732 2399 blk_cleanup_queue(q);
5a9df732
AB		 2400 /* If clear_all is set then we are deleting the logical
2401 * drive, not just refreshing its info. For drives
2402 * other than disk 0 we will call put_disk. We do not
2403 * do this for disk 0 as we need it to be able to
2404 * configure the controller.
a72da29b 2405 */
5a9df732
AB		 2406 if (clear_all){
2407 /* This isn't pretty, but we need to find the
2408 * disk in our array and NULL our the pointer.
2409 * This is so that we will call alloc_disk if
2410 * this index is used again later.
a72da29b 2411 */
5a9df732 2412 for (i=0; i < CISS_MAX_LUN; i++){
a72da29b 2413 if (h->gendisk[i] == disk) {
5a9df732
AB		 2414 h->gendisk[i] = NULL;
2415 break;
799202cb 2416 }
799202cb 2417 }
5a9df732 2418 put_disk(disk);
ddd47442 2419 }
799202cb
MM		 2420 } else {
2421 set_capacity(disk, 0);
9cef0d2f 2422 cciss_clear_drive_info(drv);
ddd47442
MM		 2423 }
2424
2425 --h->num_luns;
ddd47442 2426
9cef0d2f
SC		 2427 /* if it was the last disk, find the new hightest lun */
2428 if (clear_all && recalculate_highest_lun) {
c2d45b4d 2429 int newhighest = -1;
9cef0d2f
SC		 2430 for (i = 0; i <= h->highest_lun; i++) {
2431 /* if the disk has size > 0, it is available */
2432 if (h->drv[i] && h->drv[i]->heads)
2433 newhighest = i;
1da177e4 2434 }
9cef0d2f 2435 h->highest_lun = newhighest;
ddd47442 2436 }
e2019b58 2437 return 0;
1da177e4 2438}
ddd47442 2439
f70dba83 2440static int fill_cmd(ctlr_info_t *h, CommandList_struct *c, __u8 cmd, void *buff,
b57695fe 2441 size_t size, __u8 page_code, unsigned char *scsi3addr,
2442 int cmd_type)
1da177e4 2443{
1da177e4
LT		 2444 u64bit buff_dma_handle;
2445 int status = IO_OK;
2446
2447 c->cmd_type = CMD_IOCTL_PEND;
2448 c->Header.ReplyQueue = 0;
7c832835 2449 if (buff != NULL) {
1da177e4 2450 c->Header.SGList = 1;
7c832835 2451 c->Header.SGTotal = 1;
1da177e4
LT		 2452 } else {
2453 c->Header.SGList = 0;
7c832835 2454 c->Header.SGTotal = 0;
1da177e4
LT		 2455 }
2456 c->Header.Tag.lower = c->busaddr;
b57695fe 2457 memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8);
1da177e4
LT		 2458
2459 c->Request.Type.Type = cmd_type;
2460 if (cmd_type == TYPE_CMD) {
7c832835
BH		 2461 switch (cmd) {
2462 case CISS_INQUIRY:
1da177e4 2463 /* are we trying to read a vital product page */
7c832835 2464 if (page_code != 0) {
1da177e4
LT		 2465 c->Request.CDB[1] = 0x01;
2466 c->Request.CDB[2] = page_code;
2467 }
2468 c->Request.CDBLen = 6;
7c832835 2469 c->Request.Type.Attribute = ATTR_SIMPLE;
1da177e4
LT		 2470 c->Request.Type.Direction = XFER_READ;
2471 c->Request.Timeout = 0;
7c832835
BH		 2472 c->Request.CDB[0] = CISS_INQUIRY;
2473 c->Request.CDB[4] = size & 0xFF;
2474 break;
1da177e4
LT		 2475 case CISS_REPORT_LOG:
2476 case CISS_REPORT_PHYS:
7c832835 2477 /* Talking to controller so It's a physical command
1da177e4 2478 mode = 00 target = 0. Nothing to write.
7c832835 2479 */
1da177e4
LT		 2480 c->Request.CDBLen = 12;
2481 c->Request.Type.Attribute = ATTR_SIMPLE;
2482 c->Request.Type.Direction = XFER_READ;
2483 c->Request.Timeout = 0;
2484 c->Request.CDB[0] = cmd;
b028461d 2485 c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */
1da177e4
LT		 2486 c->Request.CDB[7] = (size >> 16) & 0xFF;
2487 c->Request.CDB[8] = (size >> 8) & 0xFF;
2488 c->Request.CDB[9] = size & 0xFF;
2489 break;
2490
2491 case CCISS_READ_CAPACITY:
1da177e4
LT		 2492 c->Request.CDBLen = 10;
2493 c->Request.Type.Attribute = ATTR_SIMPLE;
2494 c->Request.Type.Direction = XFER_READ;
2495 c->Request.Timeout = 0;
2496 c->Request.CDB[0] = cmd;
7c832835 2497 break;
00988a35 2498 case CCISS_READ_CAPACITY_16:
00988a35
MMOD		 2499 c->Request.CDBLen = 16;
2500 c->Request.Type.Attribute = ATTR_SIMPLE;
2501 c->Request.Type.Direction = XFER_READ;
2502 c->Request.Timeout = 0;
2503 c->Request.CDB[0] = cmd;
2504 c->Request.CDB[1] = 0x10;
2505 c->Request.CDB[10] = (size >> 24) & 0xFF;
2506 c->Request.CDB[11] = (size >> 16) & 0xFF;
2507 c->Request.CDB[12] = (size >> 8) & 0xFF;
2508 c->Request.CDB[13] = size & 0xFF;
2509 c->Request.Timeout = 0;
2510 c->Request.CDB[0] = cmd;
2511 break;
1da177e4
LT		 2512 case CCISS_CACHE_FLUSH:
2513 c->Request.CDBLen = 12;
2514 c->Request.Type.Attribute = ATTR_SIMPLE;
2515 c->Request.Type.Direction = XFER_WRITE;
2516 c->Request.Timeout = 0;
2517 c->Request.CDB[0] = BMIC_WRITE;
2518 c->Request.CDB[6] = BMIC_CACHE_FLUSH;
7c832835 2519 break;
88f627ae 2520 case TEST_UNIT_READY:
88f627ae
SC		 2521 c->Request.CDBLen = 6;
2522 c->Request.Type.Attribute = ATTR_SIMPLE;
2523 c->Request.Type.Direction = XFER_NONE;
2524 c->Request.Timeout = 0;
2525 break;
1da177e4 2526 default:
b2a4a43d 2527 dev_warn(&h->pdev->dev, "Unknown Command 0x%c\n", cmd);
e2019b58 2528 return IO_ERROR;
1da177e4
LT		 2529 }
2530 } else if (cmd_type == TYPE_MSG) {
2531 switch (cmd) {
7c832835 2532 case 0: /* ABORT message */
3da8b713 2533 c->Request.CDBLen = 12;
2534 c->Request.Type.Attribute = ATTR_SIMPLE;
2535 c->Request.Type.Direction = XFER_WRITE;
2536 c->Request.Timeout = 0;
7c832835
BH		 2537 c->Request.CDB[0] = cmd; /* abort */
2538 c->Request.CDB[1] = 0; /* abort a command */
3da8b713 2539 /* buff contains the tag of the command to abort */
2540 memcpy(&c->Request.CDB[4], buff, 8);
2541 break;
7c832835 2542 case 1: /* RESET message */
88f627ae 2543 c->Request.CDBLen = 16;
3da8b713 2544 c->Request.Type.Attribute = ATTR_SIMPLE;
88f627ae 2545 c->Request.Type.Direction = XFER_NONE;
3da8b713 2546 c->Request.Timeout = 0;
2547 memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB));
7c832835 2548 c->Request.CDB[0] = cmd; /* reset */
88f627ae 2549 c->Request.CDB[1] = 0x03; /* reset a target */
00988a35 2550 break;
1da177e4
LT		 2551 case 3: /* No-Op message */
2552 c->Request.CDBLen = 1;
2553 c->Request.Type.Attribute = ATTR_SIMPLE;
2554 c->Request.Type.Direction = XFER_WRITE;
2555 c->Request.Timeout = 0;
2556 c->Request.CDB[0] = cmd;
2557 break;
2558 default:
b2a4a43d
SC		 2559 dev_warn(&h->pdev->dev,
2560 "unknown message type %d\n", cmd);
1da177e4
LT		 2561 return IO_ERROR;
2562 }
2563 } else {
b2a4a43d 2564 dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type);
1da177e4
LT		 2565 return IO_ERROR;
2566 }
2567 /* Fill in the scatter gather information */
2568 if (size > 0) {
2569 buff_dma_handle.val = (__u64) pci_map_single(h->pdev,
7c832835
BH		 2570 buff, size,
2571 PCI_DMA_BIDIRECTIONAL);
1da177e4
LT		 2572 c->SG[0].Addr.lower = buff_dma_handle.val32.lower;
2573 c->SG[0].Addr.upper = buff_dma_handle.val32.upper;
2574 c->SG[0].Len = size;
7c832835 2575 c->SG[0].Ext = 0; /* we are not chaining */
1da177e4
LT		 2576 }
2577 return status;
2578}
7c832835 2579
3c2ab402 2580static int check_target_status(ctlr_info_t *h, CommandList_struct *c)
2581{
2582 switch (c->err_info->ScsiStatus) {
2583 case SAM_STAT_GOOD:
2584 return IO_OK;
2585 case SAM_STAT_CHECK_CONDITION:
2586 switch (0xf & c->err_info->SenseInfo[2]) {
2587 case 0: return IO_OK; /* no sense */
2588 case 1: return IO_OK; /* recovered error */
2589 default:
c08fac65
SC		 2590 if (check_for_unit_attention(h, c))
2591 return IO_NEEDS_RETRY;
b2a4a43d 2592 dev_warn(&h->pdev->dev, "cmd 0x%02x "
3c2ab402 2593 "check condition, sense key = 0x%02x\n",
b2a4a43d 2594 c->Request.CDB[0], c->err_info->SenseInfo[2]);
3c2ab402 2595 }
2596 break;
2597 default:
b2a4a43d
SC		 2598 dev_warn(&h->pdev->dev, "cmd 0x%02x"
2599 "scsi status = 0x%02x\n",
3c2ab402 2600 c->Request.CDB[0], c->err_info->ScsiStatus);
2601 break;
2602 }
2603 return IO_ERROR;
2604}
2605
789a424a 2606static int process_sendcmd_error(ctlr_info_t *h, CommandList_struct *c)
1da177e4 2607{
5390cfc3 2608 int return_status = IO_OK;
7c832835 2609
789a424a 2610 if (c->err_info->CommandStatus == CMD_SUCCESS)
2611 return IO_OK;
5390cfc3 2612
2613 switch (c->err_info->CommandStatus) {
2614 case CMD_TARGET_STATUS:
3c2ab402 2615 return_status = check_target_status(h, c);
5390cfc3 2616 break;
2617 case CMD_DATA_UNDERRUN:
2618 case CMD_DATA_OVERRUN:
2619 /* expected for inquiry and report lun commands */
2620 break;
2621 case CMD_INVALID:
b2a4a43d 2622 dev_warn(&h->pdev->dev, "cmd 0x%02x is "
5390cfc3 2623 "reported invalid\n", c->Request.CDB[0]);
2624 return_status = IO_ERROR;
2625 break;
2626 case CMD_PROTOCOL_ERR:
b2a4a43d
SC		 2627 dev_warn(&h->pdev->dev, "cmd 0x%02x has "
2628 "protocol error\n", c->Request.CDB[0]);
5390cfc3 2629 return_status = IO_ERROR;
2630 break;
2631 case CMD_HARDWARE_ERR:
b2a4a43d 2632 dev_warn(&h->pdev->dev, "cmd 0x%02x had "
5390cfc3 2633 " hardware error\n", c->Request.CDB[0]);
2634 return_status = IO_ERROR;
2635 break;
2636 case CMD_CONNECTION_LOST:
b2a4a43d 2637 dev_warn(&h->pdev->dev, "cmd 0x%02x had "
5390cfc3 2638 "connection lost\n", c->Request.CDB[0]);
2639 return_status = IO_ERROR;
2640 break;
2641 case CMD_ABORTED:
b2a4a43d 2642 dev_warn(&h->pdev->dev, "cmd 0x%02x was "
5390cfc3 2643 "aborted\n", c->Request.CDB[0]);
2644 return_status = IO_ERROR;
2645 break;
2646 case CMD_ABORT_FAILED:
b2a4a43d 2647 dev_warn(&h->pdev->dev, "cmd 0x%02x reports "
5390cfc3 2648 "abort failed\n", c->Request.CDB[0]);
2649 return_status = IO_ERROR;
2650 break;
2651 case CMD_UNSOLICITED_ABORT:
b2a4a43d 2652 dev_warn(&h->pdev->dev, "unsolicited abort 0x%02x\n",
5390cfc3 2653 c->Request.CDB[0]);
789a424a 2654 return_status = IO_NEEDS_RETRY;
5390cfc3 2655 break;
2656 default:
b2a4a43d 2657 dev_warn(&h->pdev->dev, "cmd 0x%02x returned "
5390cfc3 2658 "unknown status %x\n", c->Request.CDB[0],
2659 c->err_info->CommandStatus);
2660 return_status = IO_ERROR;
7c832835 2661 }
789a424a 2662 return return_status;
2663}
2664
2665static int sendcmd_withirq_core(ctlr_info_t *h, CommandList_struct *c,
2666 int attempt_retry)
2667{
2668 DECLARE_COMPLETION_ONSTACK(wait);
2669 u64bit buff_dma_handle;
789a424a 2670 int return_status = IO_OK;
2671
2672resend_cmd2:
2673 c->waiting = &wait;
664a717d 2674 enqueue_cmd_and_start_io(h, c);
789a424a 2675
2676 wait_for_completion(&wait);
2677
2678 if (c->err_info->CommandStatus == 0 || !attempt_retry)
2679 goto command_done;
2680
2681 return_status = process_sendcmd_error(h, c);
2682
2683 if (return_status == IO_NEEDS_RETRY &&
2684 c->retry_count < MAX_CMD_RETRIES) {
b2a4a43d 2685 dev_warn(&h->pdev->dev, "retrying 0x%02x\n",
789a424a 2686 c->Request.CDB[0]);
2687 c->retry_count++;
2688 /* erase the old error information */
2689 memset(c->err_info, 0, sizeof(ErrorInfo_struct));
2690 return_status = IO_OK;
2691 INIT_COMPLETION(wait);
2692 goto resend_cmd2;
2693 }
5390cfc3 2694
2695command_done:
1da177e4 2696 /* unlock the buffers from DMA */
bb2a37bf
MM		 2697 buff_dma_handle.val32.lower = c->SG[0].Addr.lower;
2698 buff_dma_handle.val32.upper = c->SG[0].Addr.upper;
7c832835
BH		 2699 pci_unmap_single(h->pdev, (dma_addr_t) buff_dma_handle.val,
2700 c->SG[0].Len, PCI_DMA_BIDIRECTIONAL);
5390cfc3 2701 return return_status;
2702}
2703
f70dba83 2704static int sendcmd_withirq(ctlr_info_t *h, __u8 cmd, void *buff, size_t size,
b57695fe 2705 __u8 page_code, unsigned char scsi3addr[],
2706 int cmd_type)
5390cfc3 2707{
5390cfc3 2708 CommandList_struct *c;
2709 int return_status;
2710
6b4d96b8 2711 c = cmd_special_alloc(h);
5390cfc3 2712 if (!c)
2713 return -ENOMEM;
f70dba83 2714 return_status = fill_cmd(h, c, cmd, buff, size, page_code,
b57695fe 2715 scsi3addr, cmd_type);
5390cfc3 2716 if (return_status == IO_OK)
789a424a 2717 return_status = sendcmd_withirq_core(h, c, 1);
2718
6b4d96b8 2719 cmd_special_free(h, c);
7c832835 2720 return return_status;
1da177e4 2721}
7c832835 2722
f70dba83 2723static void cciss_geometry_inquiry(ctlr_info_t *h, int logvol,
7b838bde 2724 sector_t total_size,
7c832835
BH		 2725 unsigned int block_size,
2726 InquiryData_struct *inq_buff,
2727 drive_info_struct *drv)
1da177e4
LT		 2728{
2729 int return_code;
00988a35 2730 unsigned long t;
b57695fe 2731 unsigned char scsi3addr[8];
00988a35 2732
1da177e4 2733 memset(inq_buff, 0, sizeof(InquiryData_struct));
f70dba83
SC		 2734 log_unit_to_scsi3addr(h, scsi3addr, logvol);
2735 return_code = sendcmd_withirq(h, CISS_INQUIRY, inq_buff,
7b838bde 2736 sizeof(*inq_buff), 0xC1, scsi3addr, TYPE_CMD);
1da177e4 2737 if (return_code == IO_OK) {
7c832835 2738 if (inq_buff->data_byte[8] == 0xFF) {
b2a4a43d
SC		 2739 dev_warn(&h->pdev->dev,
2740 "reading geometry failed, volume "
7c832835 2741 "does not support reading geometry\n");
1da177e4 2742 drv->heads = 255;
b028461d 2743 drv->sectors = 32; /* Sectors per track */
7f42d3b8 2744 drv->cylinders = total_size + 1;
89f97ad1 2745 drv->raid_level = RAID_UNKNOWN;
1da177e4 2746 } else {
1da177e4
LT		 2747 drv->heads = inq_buff->data_byte[6];
2748 drv->sectors = inq_buff->data_byte[7];
2749 drv->cylinders = (inq_buff->data_byte[4] & 0xff) << 8;
2750 drv->cylinders += inq_buff->data_byte[5];
2751 drv->raid_level = inq_buff->data_byte[8];
3f7705ea
MW		 2752 }
2753 drv->block_size = block_size;
97c06978 2754 drv->nr_blocks = total_size + 1;
3f7705ea
MW		 2755 t = drv->heads * drv->sectors;
2756 if (t > 1) {
97c06978
MMOD		 2757 sector_t real_size = total_size + 1;
2758 unsigned long rem = sector_div(real_size, t);
3f7705ea 2759 if (rem)
97c06978
MMOD		 2760 real_size++;
2761 drv->cylinders = real_size;
1da177e4 2762 }
7c832835 2763 } else { /* Get geometry failed */
b2a4a43d 2764 dev_warn(&h->pdev->dev, "reading geometry failed\n");
1da177e4 2765 }
1da177e4 2766}
7c832835 2767
1da177e4 2768static void
f70dba83 2769cciss_read_capacity(ctlr_info_t *h, int logvol, sector_t *total_size,
7c832835 2770 unsigned int *block_size)
1da177e4 2771{
00988a35 2772 ReadCapdata_struct *buf;
1da177e4 2773 int return_code;
b57695fe 2774 unsigned char scsi3addr[8];
1aebe187
MK		 2775
2776 buf = kzalloc(sizeof(ReadCapdata_struct), GFP_KERNEL);
2777 if (!buf) {
b2a4a43d 2778 dev_warn(&h->pdev->dev, "out of memory\n");
00988a35
MMOD		 2779 return;
2780 }
1aebe187 2781
f70dba83
SC		 2782 log_unit_to_scsi3addr(h, scsi3addr, logvol);
2783 return_code = sendcmd_withirq(h, CCISS_READ_CAPACITY, buf,
7b838bde 2784 sizeof(ReadCapdata_struct), 0, scsi3addr, TYPE_CMD);
1da177e4 2785 if (return_code == IO_OK) {
4c1f2b31
AV		 2786 *total_size = be32_to_cpu(*(__be32 *) buf->total_size);
2787 *block_size = be32_to_cpu(*(__be32 *) buf->block_size);
7c832835 2788 } else { /* read capacity command failed */
b2a4a43d 2789 dev_warn(&h->pdev->dev, "read capacity failed\n");
1da177e4
LT		 2790 *total_size = 0;
2791 *block_size = BLOCK_SIZE;
2792 }
00988a35 2793 kfree(buf);
00988a35
MMOD		 2794}
2795
f70dba83 2796static void cciss_read_capacity_16(ctlr_info_t *h, int logvol,
7b838bde 2797 sector_t *total_size, unsigned int *block_size)
00988a35
MMOD		 2798{
2799 ReadCapdata_struct_16 *buf;
2800 int return_code;
b57695fe 2801 unsigned char scsi3addr[8];
1aebe187
MK		 2802
2803 buf = kzalloc(sizeof(ReadCapdata_struct_16), GFP_KERNEL);
2804 if (!buf) {
b2a4a43d 2805 dev_warn(&h->pdev->dev, "out of memory\n");
00988a35
MMOD		 2806 return;
2807 }
1aebe187 2808
f70dba83
SC		 2809 log_unit_to_scsi3addr(h, scsi3addr, logvol);
2810 return_code = sendcmd_withirq(h, CCISS_READ_CAPACITY_16,
2811 buf, sizeof(ReadCapdata_struct_16),
7b838bde 2812 0, scsi3addr, TYPE_CMD);
00988a35 2813 if (return_code == IO_OK) {
4c1f2b31
AV		 2814 *total_size = be64_to_cpu(*(__be64 *) buf->total_size);
2815 *block_size = be32_to_cpu(*(__be32 *) buf->block_size);
00988a35 2816 } else { /* read capacity command failed */
b2a4a43d 2817 dev_warn(&h->pdev->dev, "read capacity failed\n");
00988a35
MMOD		 2818 *total_size = 0;
2819 *block_size = BLOCK_SIZE;
2820 }
b2a4a43d 2821 dev_info(&h->pdev->dev, " blocks= %llu block_size= %d\n",
97c06978 2822 (unsigned long long)*total_size+1, *block_size);
00988a35 2823 kfree(buf);
1da177e4
LT		 2824}
2825
1da177e4
LT		 2826static int cciss_revalidate(struct gendisk *disk)
2827{
2828 ctlr_info_t *h = get_host(disk);
2829 drive_info_struct *drv = get_drv(disk);
2830 int logvol;
7c832835 2831 int FOUND = 0;
1da177e4 2832 unsigned int block_size;
00988a35 2833 sector_t total_size;
1da177e4
LT		 2834 InquiryData_struct *inq_buff = NULL;
2835
7c832835 2836 for (logvol = 0; logvol < CISS_MAX_LUN; logvol++) {
0fc13c89 2837 if (!h->drv[logvol])
453434cf 2838 continue;
9cef0d2f 2839 if (memcmp(h->drv[logvol]->LunID, drv->LunID,
39ccf9a6 2840 sizeof(drv->LunID)) == 0) {
7c832835 2841 FOUND = 1;
1da177e4
LT		 2842 break;
2843 }
2844 }
2845
7c832835
BH		 2846 if (!FOUND)
2847 return 1;
1da177e4 2848
7c832835
BH		 2849 inq_buff = kmalloc(sizeof(InquiryData_struct), GFP_KERNEL);
2850 if (inq_buff == NULL) {
b2a4a43d 2851 dev_warn(&h->pdev->dev, "out of memory\n");
7c832835
BH		 2852 return 1;
2853 }
00988a35 2854 if (h->cciss_read == CCISS_READ_10) {
f70dba83 2855 cciss_read_capacity(h, logvol,
00988a35
MMOD		 2856 &total_size, &block_size);
2857 } else {
f70dba83 2858 cciss_read_capacity_16(h, logvol,
00988a35
MMOD		 2859 &total_size, &block_size);
2860 }
f70dba83 2861 cciss_geometry_inquiry(h, logvol, total_size, block_size,
7c832835 2862 inq_buff, drv);
1da177e4 2863
e1defc4f 2864 blk_queue_logical_block_size(drv->queue, drv->block_size);
1da177e4
LT		 2865 set_capacity(disk, drv->nr_blocks);
2866
1da177e4
LT		 2867 kfree(inq_buff);
2868 return 0;
2869}
2870
1da177e4
LT		 2871/*
2872 * Map (physical) PCI mem into (virtual) kernel space
2873 */
2874static void __iomem *remap_pci_mem(ulong base, ulong size)
2875{
7c832835
BH		 2876 ulong page_base = ((ulong) base) & PAGE_MASK;
2877 ulong page_offs = ((ulong) base) - page_base;
2878 void __iomem *page_remapped = ioremap(page_base, page_offs + size);
1da177e4 2879
7c832835 2880 return page_remapped ? (page_remapped + page_offs) : NULL;
1da177e4
LT		 2881}
2882
7c832835
BH		 2883/*
2884 * Takes jobs of the Q and sends them to the hardware, then puts it on
2885 * the Q to wait for completion.
2886 */
2887static void start_io(ctlr_info_t *h)
1da177e4
LT		 2888{
2889 CommandList_struct *c;
7c832835 2890
e6e1ee93
JA		 2891 while (!list_empty(&h->reqQ)) {
2892 c = list_entry(h->reqQ.next, CommandList_struct, list);
1da177e4
LT		 2893 /* can't do anything if fifo is full */
2894 if ((h->access.fifo_full(h))) {
b2a4a43d 2895 dev_warn(&h->pdev->dev, "fifo full\n");
1da177e4
LT		 2896 break;
2897 }
2898
7c832835 2899 /* Get the first entry from the Request Q */
8a3173de 2900 removeQ(c);
1da177e4 2901 h->Qdepth--;
7c832835
BH		 2902
2903 /* Tell the controller execute command */
1da177e4 2904 h->access.submit_command(h, c);
7c832835
BH		 2905
2906 /* Put job onto the completed Q */
8a3173de 2907 addQ(&h->cmpQ, c);
1da177e4
LT		 2908 }
2909}
7c832835 2910
f70dba83 2911/* Assumes that h->lock is held. */
1da177e4
LT		 2912/* Zeros out the error record and then resends the command back */
2913/* to the controller */
7c832835 2914static inline void resend_cciss_cmd(ctlr_info_t *h, CommandList_struct *c)
1da177e4
LT		 2915{
2916 /* erase the old error information */
2917 memset(c->err_info, 0, sizeof(ErrorInfo_struct));
2918
2919 /* add it to software queue and then send it to the controller */
8a3173de 2920 addQ(&h->reqQ, c);
1da177e4 2921 h->Qdepth++;
7c832835 2922 if (h->Qdepth > h->maxQsinceinit)
1da177e4
LT		 2923 h->maxQsinceinit = h->Qdepth;
2924
2925 start_io(h);
2926}
a9925a06 2927
1a614f50
SC		 2928static inline unsigned int make_status_bytes(unsigned int scsi_status_byte,
2929 unsigned int msg_byte, unsigned int host_byte,
2930 unsigned int driver_byte)
2931{
2932 /* inverse of macros in scsi.h */
2933 return (scsi_status_byte & 0xff) |
2934 ((msg_byte & 0xff) << 8) |
2935 ((host_byte & 0xff) << 16) |
2936 ((driver_byte & 0xff) << 24);
2937}
2938
0a9279cc
MM		 2939static inline int evaluate_target_status(ctlr_info_t *h,
2940 CommandList_struct *cmd, int *retry_cmd)
03bbfee5
MMOD		 2941{
2942 unsigned char sense_key;
1a614f50
SC		 2943 unsigned char status_byte, msg_byte, host_byte, driver_byte;
2944 int error_value;
2945
0a9279cc 2946 *retry_cmd = 0;
1a614f50
SC		 2947 /* If we get in here, it means we got "target status", that is, scsi status */
2948 status_byte = cmd->err_info->ScsiStatus;
2949 driver_byte = DRIVER_OK;
2950 msg_byte = cmd->err_info->CommandStatus; /* correct? seems too device specific */
2951
33659ebb 2952 if (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC)
1a614f50
SC		 2953 host_byte = DID_PASSTHROUGH;
2954 else
2955 host_byte = DID_OK;
2956
2957 error_value = make_status_bytes(status_byte, msg_byte,
2958 host_byte, driver_byte);
03bbfee5 2959
1a614f50 2960 if (cmd->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION) {
33659ebb 2961 if (cmd->rq->cmd_type != REQ_TYPE_BLOCK_PC)
b2a4a43d 2962 dev_warn(&h->pdev->dev, "cmd %p "
03bbfee5
MMOD		 2963 "has SCSI Status 0x%x\n",
2964 cmd, cmd->err_info->ScsiStatus);
1a614f50 2965 return error_value;
03bbfee5
MMOD		 2966 }
2967
2968 /* check the sense key */
2969 sense_key = 0xf & cmd->err_info->SenseInfo[2];
2970 /* no status or recovered error */
33659ebb
CH		 2971 if (((sense_key == 0x0) || (sense_key == 0x1)) &&
2972 (cmd->rq->cmd_type != REQ_TYPE_BLOCK_PC))
1a614f50 2973 error_value = 0;
03bbfee5 2974
0a9279cc 2975 if (check_for_unit_attention(h, cmd)) {
33659ebb 2976 *retry_cmd = !(cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC);
0a9279cc
MM		 2977 return 0;
2978 }
2979
33659ebb
CH		 2980 /* Not SG_IO or similar? */
2981 if (cmd->rq->cmd_type != REQ_TYPE_BLOCK_PC) {
1a614f50 2982 if (error_value != 0)
b2a4a43d 2983 dev_warn(&h->pdev->dev, "cmd %p has CHECK CONDITION"
03bbfee5 2984 " sense key = 0x%x\n", cmd, sense_key);
1a614f50 2985 return error_value;
03bbfee5
MMOD		 2986 }
2987
2988 /* SG_IO or similar, copy sense data back */
2989 if (cmd->rq->sense) {
2990 if (cmd->rq->sense_len > cmd->err_info->SenseLen)
2991 cmd->rq->sense_len = cmd->err_info->SenseLen;
2992 memcpy(cmd->rq->sense, cmd->err_info->SenseInfo,
2993 cmd->rq->sense_len);
2994 } else
2995 cmd->rq->sense_len = 0;
2996
1a614f50 2997 return error_value;
03bbfee5
MMOD		 2998}
2999
7c832835 3000/* checks the status of the job and calls complete buffers to mark all
a9925a06
JA		 3001 * buffers for the completed job. Note that this function does not need
3002 * to hold the hba/queue lock.
7c832835
BH		 3003 */
3004static inline void complete_command(ctlr_info_t *h, CommandList_struct *cmd,
3005 int timeout)
1da177e4 3006{
1da177e4 3007 int retry_cmd = 0;
198b7660
MMOD		 3008 struct request *rq = cmd->rq;
3009
3010 rq->errors = 0;
7c832835 3011
1da177e4 3012 if (timeout)
1a614f50 3013 rq->errors = make_status_bytes(0, 0, 0, DRIVER_TIMEOUT);
1da177e4 3014
d38ae168
MMOD		 3015 if (cmd->err_info->CommandStatus == 0) /* no error has occurred */
3016 goto after_error_processing;
7c832835 3017
d38ae168 3018 switch (cmd->err_info->CommandStatus) {
d38ae168 3019 case CMD_TARGET_STATUS:
0a9279cc 3020 rq->errors = evaluate_target_status(h, cmd, &retry_cmd);
d38ae168
MMOD		 3021 break;
3022 case CMD_DATA_UNDERRUN:
33659ebb 3023 if (cmd->rq->cmd_type == REQ_TYPE_FS) {
b2a4a43d 3024 dev_warn(&h->pdev->dev, "cmd %p has"
03bbfee5
MMOD		 3025 " completed with data underrun "
3026 "reported\n", cmd);
c3a4d78c 3027 cmd->rq->resid_len = cmd->err_info->ResidualCnt;
03bbfee5 3028 }
d38ae168
MMOD		 3029 break;
3030 case CMD_DATA_OVERRUN:
33659ebb 3031 if (cmd->rq->cmd_type == REQ_TYPE_FS)
b2a4a43d 3032 dev_warn(&h->pdev->dev, "cciss: cmd %p has"
03bbfee5
MMOD		 3033 " completed with data overrun "
3034 "reported\n", cmd);
d38ae168
MMOD		 3035 break;
3036 case CMD_INVALID:
b2a4a43d 3037 dev_warn(&h->pdev->dev, "cciss: cmd %p is "
d38ae168 3038 "reported invalid\n", cmd);
1a614f50
SC		 3039 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3040 cmd->err_info->CommandStatus, DRIVER_OK,
33659ebb
CH		 3041 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3042 DID_PASSTHROUGH : DID_ERROR);
d38ae168
MMOD		 3043 break;
3044 case CMD_PROTOCOL_ERR:
b2a4a43d
SC		 3045 dev_warn(&h->pdev->dev, "cciss: cmd %p has "
3046 "protocol error\n", cmd);
1a614f50
SC		 3047 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3048 cmd->err_info->CommandStatus, DRIVER_OK,
33659ebb
CH		 3049 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3050 DID_PASSTHROUGH : DID_ERROR);
d38ae168
MMOD		 3051 break;
3052 case CMD_HARDWARE_ERR:
b2a4a43d 3053 dev_warn(&h->pdev->dev, "cciss: cmd %p had "
d38ae168 3054 " hardware error\n", cmd);
1a614f50
SC		 3055 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3056 cmd->err_info->CommandStatus, DRIVER_OK,
33659ebb
CH		 3057 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3058 DID_PASSTHROUGH : DID_ERROR);
d38ae168
MMOD		 3059 break;
3060 case CMD_CONNECTION_LOST:
b2a4a43d 3061 dev_warn(&h->pdev->dev, "cciss: cmd %p had "
d38ae168 3062 "connection lost\n", cmd);
1a614f50
SC		 3063 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3064 cmd->err_info->CommandStatus, DRIVER_OK,
33659ebb
CH		 3065 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3066 DID_PASSTHROUGH : DID_ERROR);
d38ae168
MMOD		 3067 break;
3068 case CMD_ABORTED:
b2a4a43d 3069 dev_warn(&h->pdev->dev, "cciss: cmd %p was "
d38ae168 3070 "aborted\n", cmd);
1a614f50
SC		 3071 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3072 cmd->err_info->CommandStatus, DRIVER_OK,
33659ebb
CH		 3073 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3074 DID_PASSTHROUGH : DID_ABORT);
d38ae168
MMOD		 3075 break;
3076 case CMD_ABORT_FAILED:
b2a4a43d 3077 dev_warn(&h->pdev->dev, "cciss: cmd %p reports "
d38ae168 3078 "abort failed\n", cmd);
1a614f50
SC		 3079 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3080 cmd->err_info->CommandStatus, DRIVER_OK,
33659ebb
CH		 3081 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3082 DID_PASSTHROUGH : DID_ERROR);
d38ae168
MMOD		 3083 break;
3084 case CMD_UNSOLICITED_ABORT:
b2a4a43d 3085 dev_warn(&h->pdev->dev, "cciss%d: unsolicited "
d38ae168
MMOD		 3086 "abort %p\n", h->ctlr, cmd);
3087 if (cmd->retry_count < MAX_CMD_RETRIES) {
3088 retry_cmd = 1;
b2a4a43d 3089 dev_warn(&h->pdev->dev, "retrying %p\n", cmd);
d38ae168
MMOD		 3090 cmd->retry_count++;
3091 } else
b2a4a43d
SC		 3092 dev_warn(&h->pdev->dev,
3093 "%p retried too many times\n", cmd);
1a614f50
SC		 3094 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3095 cmd->err_info->CommandStatus, DRIVER_OK,
33659ebb
CH		 3096 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3097 DID_PASSTHROUGH : DID_ABORT);
d38ae168
MMOD		 3098 break;
3099 case CMD_TIMEOUT:
b2a4a43d 3100 dev_warn(&h->pdev->dev, "cmd %p timedout\n", cmd);
1a614f50
SC		 3101 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3102 cmd->err_info->CommandStatus, DRIVER_OK,
33659ebb
CH		 3103 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3104 DID_PASSTHROUGH : DID_ERROR);
d38ae168
MMOD		 3105 break;
3106 default:
b2a4a43d 3107 dev_warn(&h->pdev->dev, "cmd %p returned "
d38ae168
MMOD		 3108 "unknown status %x\n", cmd,
3109 cmd->err_info->CommandStatus);
1a614f50
SC		 3110 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3111 cmd->err_info->CommandStatus, DRIVER_OK,
33659ebb
CH		 3112 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3113 DID_PASSTHROUGH : DID_ERROR);
1da177e4 3114 }
d38ae168
MMOD		 3115
3116after_error_processing:
3117
1da177e4 3118 /* We need to return this command */
7c832835
BH		 3119 if (retry_cmd) {
3120 resend_cciss_cmd(h, cmd);
1da177e4 3121 return;
7c832835 3122 }
03bbfee5 3123 cmd->rq->completion_data = cmd;
a9925a06 3124 blk_complete_request(cmd->rq);
1da177e4
LT		 3125}
3126
0c2b3908
MM		 3127static inline u32 cciss_tag_contains_index(u32 tag)
3128{
5e216153 3129#define DIRECT_LOOKUP_BIT 0x10
0c2b3908
MM		 3130 return tag & DIRECT_LOOKUP_BIT;
3131}
3132
3133static inline u32 cciss_tag_to_index(u32 tag)
3134{
5e216153 3135#define DIRECT_LOOKUP_SHIFT 5
0c2b3908
MM		 3136 return tag >> DIRECT_LOOKUP_SHIFT;
3137}
3138
3139static inline u32 cciss_tag_discard_error_bits(u32 tag)
3140{
3141#define CCISS_ERROR_BITS 0x03
3142 return tag & ~CCISS_ERROR_BITS;
3143}
3144
3145static inline void cciss_mark_tag_indexed(u32 *tag)
3146{
3147 *tag |= DIRECT_LOOKUP_BIT;
3148}
3149
3150static inline void cciss_set_tag_index(u32 *tag, u32 index)
3151{
3152 *tag |= (index << DIRECT_LOOKUP_SHIFT);
3153}
3154
7c832835
BH		 3155/*
3156 * Get a request and submit it to the controller.
1da177e4 3157 */
165125e1 3158static void do_cciss_request(struct request_queue *q)
1da177e4 3159{
7c832835 3160 ctlr_info_t *h = q->queuedata;
1da177e4 3161 CommandList_struct *c;
00988a35
MMOD		 3162 sector_t start_blk;
3163 int seg;
1da177e4
LT		 3164 struct request *creq;
3165 u64bit temp64;
5c07a311
DB		 3166 struct scatterlist *tmp_sg;
3167 SGDescriptor_struct *curr_sg;
1da177e4
LT		 3168 drive_info_struct *drv;
3169 int i, dir;
5c07a311
DB		 3170 int sg_index = 0;
3171 int chained = 0;
1da177e4
LT		 3172
3173 /* We call start_io here in case there is a command waiting on the
3174 * queue that has not been sent.
7c832835 3175 */
1da177e4
LT		 3176 if (blk_queue_plugged(q))
3177 goto startio;
3178
7c832835 3179 queue:
9934c8c0 3180 creq = blk_peek_request(q);
1da177e4
LT		 3181 if (!creq)
3182 goto startio;
3183
5c07a311 3184 BUG_ON(creq->nr_phys_segments > h->maxsgentries);
1da177e4 3185
6b4d96b8
SC		 3186 c = cmd_alloc(h);
3187 if (!c)
1da177e4
LT		 3188 goto full;
3189
9934c8c0 3190 blk_start_request(creq);
1da177e4 3191
5c07a311 3192 tmp_sg = h->scatter_list[c->cmdindex];
1da177e4
LT		 3193 spin_unlock_irq(q->queue_lock);
3194
3195 c->cmd_type = CMD_RWREQ;
3196 c->rq = creq;
7c832835
BH		 3197
3198 /* fill in the request */
1da177e4 3199 drv = creq->rq_disk->private_data;
b028461d 3200 c->Header.ReplyQueue = 0; /* unused in simple mode */
33079b21
MM		 3201 /* got command from pool, so use the command block index instead */
3202 /* for direct lookups. */
3203 /* The first 2 bits are reserved for controller error reporting. */
0c2b3908
MM		 3204 cciss_set_tag_index(&c->Header.Tag.lower, c->cmdindex);
3205 cciss_mark_tag_indexed(&c->Header.Tag.lower);
39ccf9a6 3206 memcpy(&c->Header.LUN, drv->LunID, sizeof(drv->LunID));
b028461d 3207 c->Request.CDBLen = 10; /* 12 byte commands not in FW yet; */
3208 c->Request.Type.Type = TYPE_CMD; /* It is a command. */
7c832835
BH		 3209 c->Request.Type.Attribute = ATTR_SIMPLE;
3210 c->Request.Type.Direction =
a52de245 3211 (rq_data_dir(creq) == READ) ? XFER_READ : XFER_WRITE;
b028461d 3212 c->Request.Timeout = 0; /* Don't time out */
7c832835 3213 c->Request.CDB[0] =
00988a35 3214 (rq_data_dir(creq) == READ) ? h->cciss_read : h->cciss_write;
83096ebf 3215 start_blk = blk_rq_pos(creq);
b2a4a43d 3216 dev_dbg(&h->pdev->dev, "sector =%d nr_sectors=%d\n",
83096ebf 3217 (int)blk_rq_pos(creq), (int)blk_rq_sectors(creq));
5c07a311 3218 sg_init_table(tmp_sg, h->maxsgentries);
1da177e4
LT		 3219 seg = blk_rq_map_sg(q, creq, tmp_sg);
3220
7c832835 3221 /* get the DMA records for the setup */
1da177e4
LT		 3222 if (c->Request.Type.Direction == XFER_READ)
3223 dir = PCI_DMA_FROMDEVICE;
3224 else
3225 dir = PCI_DMA_TODEVICE;
3226
5c07a311
DB		 3227 curr_sg = c->SG;
3228 sg_index = 0;
3229 chained = 0;
3230
7c832835 3231 for (i = 0; i < seg; i++) {
5c07a311
DB		 3232 if (((sg_index+1) == (h->max_cmd_sgentries)) &&
3233 !chained && ((seg - i) > 1)) {
5c07a311 3234 /* Point to next chain block. */
dccc9b56 3235 curr_sg = h->cmd_sg_list[c->cmdindex];
5c07a311
DB		 3236 sg_index = 0;
3237 chained = 1;
3238 }
3239 curr_sg[sg_index].Len = tmp_sg[i].length;
45711f1a 3240 temp64.val = (__u64) pci_map_page(h->pdev, sg_page(&tmp_sg[i]),
5c07a311
DB		 3241 tmp_sg[i].offset,
3242 tmp_sg[i].length, dir);
3243 curr_sg[sg_index].Addr.lower = temp64.val32.lower;
3244 curr_sg[sg_index].Addr.upper = temp64.val32.upper;
3245 curr_sg[sg_index].Ext = 0; /* we are not chaining */
5c07a311 3246 ++sg_index;
1da177e4 3247 }
d45033ef
SC		 3248 if (chained)
3249 cciss_map_sg_chain_block(h, c, h->cmd_sg_list[c->cmdindex],
3250 (seg - (h->max_cmd_sgentries - 1)) *
3251 sizeof(SGDescriptor_struct));
5c07a311 3252
7c832835
BH		 3253 /* track how many SG entries we are using */
3254 if (seg > h->maxSG)
3255 h->maxSG = seg;
1da177e4 3256
b2a4a43d 3257 dev_dbg(&h->pdev->dev, "Submitting %u sectors in %d segments "
5c07a311
DB		 3258 "chained[%d]\n",
3259 blk_rq_sectors(creq), seg, chained);
1da177e4 3260
5e216153
MM		 3261 c->Header.SGTotal = seg + chained;
3262 if (seg <= h->max_cmd_sgentries)
3263 c->Header.SGList = c->Header.SGTotal;
3264 else
5c07a311 3265 c->Header.SGList = h->max_cmd_sgentries;
5e216153 3266 set_performant_mode(h, c);
5c07a311 3267
33659ebb 3268 if (likely(creq->cmd_type == REQ_TYPE_FS)) {
03bbfee5
MMOD		 3269 if(h->cciss_read == CCISS_READ_10) {
3270 c->Request.CDB[1] = 0;
b028461d 3271 c->Request.CDB[2] = (start_blk >> 24) & 0xff; /* MSB */
03bbfee5
MMOD		 3272 c->Request.CDB[3] = (start_blk >> 16) & 0xff;
3273 c->Request.CDB[4] = (start_blk >> 8) & 0xff;
3274 c->Request.CDB[5] = start_blk & 0xff;
b028461d 3275 c->Request.CDB[6] = 0; /* (sect >> 24) & 0xff; MSB */
83096ebf
TH		 3276 c->Request.CDB[7] = (blk_rq_sectors(creq) >> 8) & 0xff;
3277 c->Request.CDB[8] = blk_rq_sectors(creq) & 0xff;
03bbfee5
MMOD		 3278 c->Request.CDB[9] = c->Request.CDB[11] = c->Request.CDB[12] = 0;
3279 } else {
582539e5
RD		 3280 u32 upper32 = upper_32_bits(start_blk);
3281
03bbfee5
MMOD		 3282 c->Request.CDBLen = 16;
3283 c->Request.CDB[1]= 0;
b028461d 3284 c->Request.CDB[2]= (upper32 >> 24) & 0xff; /* MSB */
582539e5
RD		 3285 c->Request.CDB[3]= (upper32 >> 16) & 0xff;
3286 c->Request.CDB[4]= (upper32 >> 8) & 0xff;
3287 c->Request.CDB[5]= upper32 & 0xff;
03bbfee5
MMOD		 3288 c->Request.CDB[6]= (start_blk >> 24) & 0xff;
3289 c->Request.CDB[7]= (start_blk >> 16) & 0xff;
3290 c->Request.CDB[8]= (start_blk >> 8) & 0xff;
3291 c->Request.CDB[9]= start_blk & 0xff;
83096ebf
TH		 3292 c->Request.CDB[10]= (blk_rq_sectors(creq) >> 24) & 0xff;
3293 c->Request.CDB[11]= (blk_rq_sectors(creq) >> 16) & 0xff;
3294 c->Request.CDB[12]= (blk_rq_sectors(creq) >> 8) & 0xff;
3295 c->Request.CDB[13]= blk_rq_sectors(creq) & 0xff;
03bbfee5
MMOD		 3296 c->Request.CDB[14] = c->Request.CDB[15] = 0;
3297 }
33659ebb 3298 } else if (creq->cmd_type == REQ_TYPE_BLOCK_PC) {
03bbfee5
MMOD		 3299 c->Request.CDBLen = creq->cmd_len;
3300 memcpy(c->Request.CDB, creq->cmd, BLK_MAX_CDB);
00988a35 3301 } else {
b2a4a43d
SC		 3302 dev_warn(&h->pdev->dev, "bad request type %d\n",
3303 creq->cmd_type);
03bbfee5 3304 BUG();
00988a35 3305 }
1da177e4
LT		 3306
3307 spin_lock_irq(q->queue_lock);
3308
8a3173de 3309 addQ(&h->reqQ, c);
1da177e4 3310 h->Qdepth++;
7c832835
BH		 3311 if (h->Qdepth > h->maxQsinceinit)
3312 h->maxQsinceinit = h->Qdepth;
1da177e4
LT		 3313
3314 goto queue;
00988a35 3315full:
1da177e4 3316 blk_stop_queue(q);
00988a35 3317startio:
1da177e4
LT		 3318 /* We will already have the driver lock here so not need
3319 * to lock it.
7c832835 3320 */
1da177e4
LT		 3321 start_io(h);
3322}
3323
3da8b713 3324static inline unsigned long get_next_completion(ctlr_info_t *h)
3325{
3da8b713 3326 return h->access.command_completed(h);
3da8b713 3327}
3328
3329static inline int interrupt_pending(ctlr_info_t *h)
3330{
3da8b713 3331 return h->access.intr_pending(h);
3da8b713 3332}
3333
3334static inline long interrupt_not_for_us(ctlr_info_t *h)
3335{
81125860 3336 return ((h->access.intr_pending(h) == 0) ||
2cf3af1c 3337 (h->interrupts_enabled == 0));
3da8b713 3338}
3339
0c2b3908
MM		 3340static inline int bad_tag(ctlr_info_t *h, u32 tag_index,
3341 u32 raw_tag)
1da177e4 3342{
0c2b3908
MM		 3343 if (unlikely(tag_index >= h->nr_cmds)) {
3344 dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag);
3345 return 1;
3346 }
3347 return 0;
3348}
3349
3350static inline void finish_cmd(ctlr_info_t *h, CommandList_struct *c,
3351 u32 raw_tag)
3352{
3353 removeQ(c);
3354 if (likely(c->cmd_type == CMD_RWREQ))
3355 complete_command(h, c, 0);
3356 else if (c->cmd_type == CMD_IOCTL_PEND)
3357 complete(c->waiting);
3358#ifdef CONFIG_CISS_SCSI_TAPE
3359 else if (c->cmd_type == CMD_SCSI)
3360 complete_scsi_command(c, 0, raw_tag);
3361#endif
3362}
3363
29979a71
MM		 3364static inline u32 next_command(ctlr_info_t *h)
3365{
3366 u32 a;
3367
3368 if (unlikely(h->transMethod != CFGTBL_Trans_Performant))
3369 return h->access.command_completed(h);
3370
3371 if ((*(h->reply_pool_head) & 1) == (h->reply_pool_wraparound)) {
3372 a = *(h->reply_pool_head); /* Next cmd in ring buffer */
3373 (h->reply_pool_head)++;
3374 h->commands_outstanding--;
3375 } else {
3376 a = FIFO_EMPTY;
3377 }
3378 /* Check for wraparound */
3379 if (h->reply_pool_head == (h->reply_pool + h->max_commands)) {
3380 h->reply_pool_head = h->reply_pool;
3381 h->reply_pool_wraparound ^= 1;
3382 }
3383 return a;
3384}
3385
0c2b3908
MM		 3386/* process completion of an indexed ("direct lookup") command */
3387static inline u32 process_indexed_cmd(ctlr_info_t *h, u32 raw_tag)
3388{
3389 u32 tag_index;
1da177e4 3390 CommandList_struct *c;
0c2b3908
MM		 3391
3392 tag_index = cciss_tag_to_index(raw_tag);
3393 if (bad_tag(h, tag_index, raw_tag))
5e216153 3394 return next_command(h);
0c2b3908
MM		 3395 c = h->cmd_pool + tag_index;
3396 finish_cmd(h, c, raw_tag);
5e216153 3397 return next_command(h);
0c2b3908
MM		 3398}
3399
3400/* process completion of a non-indexed command */
3401static inline u32 process_nonindexed_cmd(ctlr_info_t *h, u32 raw_tag)
3402{
3403 u32 tag;
3404 CommandList_struct *c = NULL;
0c2b3908
MM		 3405 __u32 busaddr_masked, tag_masked;
3406
3407 tag = cciss_tag_discard_error_bits(raw_tag);
e6e1ee93 3408 list_for_each_entry(c, &h->cmpQ, list) {
0c2b3908
MM		 3409 busaddr_masked = cciss_tag_discard_error_bits(c->busaddr);
3410 tag_masked = cciss_tag_discard_error_bits(tag);
3411 if (busaddr_masked == tag_masked) {
3412 finish_cmd(h, c, raw_tag);
5e216153 3413 return next_command(h);
0c2b3908
MM		 3414 }
3415 }
3416 bad_tag(h, h->nr_cmds + 1, raw_tag);
5e216153 3417 return next_command(h);
0c2b3908
MM		 3418}
3419
3420static irqreturn_t do_cciss_intx(int irq, void *dev_id)
3421{
3422 ctlr_info_t *h = dev_id;
1da177e4 3423 unsigned long flags;
0c2b3908 3424 u32 raw_tag;
1da177e4 3425
3da8b713 3426 if (interrupt_not_for_us(h))
1da177e4 3427 return IRQ_NONE;
f70dba83 3428 spin_lock_irqsave(&h->lock, flags);
3da8b713 3429 while (interrupt_pending(h)) {
0c2b3908
MM		 3430 raw_tag = get_next_completion(h);
3431 while (raw_tag != FIFO_EMPTY) {
3432 if (cciss_tag_contains_index(raw_tag))
3433 raw_tag = process_indexed_cmd(h, raw_tag);
3434 else
3435 raw_tag = process_nonindexed_cmd(h, raw_tag);
1da177e4
LT		 3436 }
3437 }
f70dba83 3438 spin_unlock_irqrestore(&h->lock, flags);
0c2b3908
MM		 3439 return IRQ_HANDLED;
3440}
1da177e4 3441
0c2b3908
MM		 3442/* Add a second interrupt handler for MSI/MSI-X mode. In this mode we never
3443 * check the interrupt pending register because it is not set.
3444 */
3445static irqreturn_t do_cciss_msix_intr(int irq, void *dev_id)
3446{
3447 ctlr_info_t *h = dev_id;
3448 unsigned long flags;
3449 u32 raw_tag;
8a3173de 3450
f70dba83 3451 spin_lock_irqsave(&h->lock, flags);
0c2b3908
MM		 3452 raw_tag = get_next_completion(h);
3453 while (raw_tag != FIFO_EMPTY) {
3454 if (cciss_tag_contains_index(raw_tag))
3455 raw_tag = process_indexed_cmd(h, raw_tag);
3456 else
3457 raw_tag = process_nonindexed_cmd(h, raw_tag);
1da177e4 3458 }
f70dba83 3459 spin_unlock_irqrestore(&h->lock, flags);
1da177e4
LT		 3460 return IRQ_HANDLED;
3461}
7c832835 3462
b368c9dd
AP		 3463/**
3464 * add_to_scan_list() - add controller to rescan queue
3465 * @h: Pointer to the controller.
3466 *
3467 * Adds the controller to the rescan queue if not already on the queue.
3468 *
3469 * returns 1 if added to the queue, 0 if skipped (could be on the
3470 * queue already, or the controller could be initializing or shutting
3471 * down).
3472 **/
3473static int add_to_scan_list(struct ctlr_info *h)
3474{
3475 struct ctlr_info *test_h;
3476 int found = 0;
3477 int ret = 0;
3478
3479 if (h->busy_initializing)
3480 return 0;
3481
3482 if (!mutex_trylock(&h->busy_shutting_down))
3483 return 0;
3484
3485 mutex_lock(&scan_mutex);
3486 list_for_each_entry(test_h, &scan_q, scan_list) {
3487 if (test_h == h) {
3488 found = 1;
3489 break;
3490 }
3491 }
3492 if (!found && !h->busy_scanning) {
3493 INIT_COMPLETION(h->scan_wait);
3494 list_add_tail(&h->scan_list, &scan_q);
3495 ret = 1;
3496 }
3497 mutex_unlock(&scan_mutex);
3498 mutex_unlock(&h->busy_shutting_down);
3499
3500 return ret;
3501}
3502
3503/**
3504 * remove_from_scan_list() - remove controller from rescan queue
3505 * @h: Pointer to the controller.
3506 *
3507 * Removes the controller from the rescan queue if present. Blocks if
fd8489cf
SC		 3508 * the controller is currently conducting a rescan. The controller
3509 * can be in one of three states:
3510 * 1. Doesn't need a scan
3511 * 2. On the scan list, but not scanning yet (we remove it)
3512 * 3. Busy scanning (and not on the list). In this case we want to wait for
3513 * the scan to complete to make sure the scanning thread for this
3514 * controller is completely idle.
b368c9dd
AP		 3515 **/
3516static void remove_from_scan_list(struct ctlr_info *h)
3517{
3518 struct ctlr_info *test_h, *tmp_h;
b368c9dd
AP		 3519
3520 mutex_lock(&scan_mutex);
3521 list_for_each_entry_safe(test_h, tmp_h, &scan_q, scan_list) {
fd8489cf 3522 if (test_h == h) { /* state 2. */
b368c9dd
AP		 3523 list_del(&h->scan_list);
3524 complete_all(&h->scan_wait);
3525 mutex_unlock(&scan_mutex);
3526 return;
3527 }
3528 }
fd8489cf
SC		 3529 if (h->busy_scanning) { /* state 3. */
3530 mutex_unlock(&scan_mutex);
b368c9dd 3531 wait_for_completion(&h->scan_wait);
fd8489cf
SC		 3532 } else { /* state 1, nothing to do. */
3533 mutex_unlock(&scan_mutex);
3534 }
b368c9dd
AP		 3535}
3536
3537/**
3538 * scan_thread() - kernel thread used to rescan controllers
3539 * @data: Ignored.
3540 *
3541 * A kernel thread used scan for drive topology changes on
3542 * controllers. The thread processes only one controller at a time
3543 * using a queue. Controllers are added to the queue using
3544 * add_to_scan_list() and removed from the queue either after done
3545 * processing or using remove_from_scan_list().
3546 *
3547 * returns 0.
3548 **/
0a9279cc
MM		 3549static int scan_thread(void *data)
3550{
b368c9dd 3551 struct ctlr_info *h;
0a9279cc 3552
b368c9dd
AP		 3553 while (1) {
3554 set_current_state(TASK_INTERRUPTIBLE);
3555 schedule();
0a9279cc
MM		 3556 if (kthread_should_stop())
3557 break;
b368c9dd
AP		 3558
3559 while (1) {
3560 mutex_lock(&scan_mutex);
3561 if (list_empty(&scan_q)) {
3562 mutex_unlock(&scan_mutex);
3563 break;
3564 }
3565
3566 h = list_entry(scan_q.next,
3567 struct ctlr_info,
3568 scan_list);
3569 list_del(&h->scan_list);
3570 h->busy_scanning = 1;
3571 mutex_unlock(&scan_mutex);
3572
d06dfbd2
SC		 3573 rebuild_lun_table(h, 0, 0);
3574 complete_all(&h->scan_wait);
3575 mutex_lock(&scan_mutex);
3576 h->busy_scanning = 0;
3577 mutex_unlock(&scan_mutex);
b368c9dd 3578 }
0a9279cc 3579 }
b368c9dd 3580
0a9279cc
MM		 3581 return 0;
3582}
3583
3584static int check_for_unit_attention(ctlr_info_t *h, CommandList_struct *c)
3585{
3586 if (c->err_info->SenseInfo[2] != UNIT_ATTENTION)
3587 return 0;
3588
3589 switch (c->err_info->SenseInfo[12]) {
3590 case STATE_CHANGED:
b2a4a43d
SC		 3591 dev_warn(&h->pdev->dev, "a state change "
3592 "detected, command retried\n");
0a9279cc
MM		 3593 return 1;
3594 break;
3595 case LUN_FAILED:
b2a4a43d
SC		 3596 dev_warn(&h->pdev->dev, "LUN failure "
3597 "detected, action required\n");
0a9279cc
MM		 3598 return 1;
3599 break;
3600 case REPORT_LUNS_CHANGED:
b2a4a43d 3601 dev_warn(&h->pdev->dev, "report LUN data changed\n");
da002184
SC		 3602 /*
3603 * Here, we could call add_to_scan_list and wake up the scan thread,
3604 * except that it's quite likely that we will get more than one
3605 * REPORT_LUNS_CHANGED condition in quick succession, which means
3606 * that those which occur after the first one will likely happen
3607 * *during* the scan_thread's rescan. And the rescan code is not
3608 * robust enough to restart in the middle, undoing what it has already
3609 * done, and it's not clear that it's even possible to do this, since
3610 * part of what it does is notify the block layer, which starts
3611 * doing it's own i/o to read partition tables and so on, and the
3612 * driver doesn't have visibility to know what might need undoing.
3613 * In any event, if possible, it is horribly complicated to get right
3614 * so we just don't do it for now.
3615 *
3616 * Note: this REPORT_LUNS_CHANGED condition only occurs on the MSA2012.
3617 */
0a9279cc
MM		 3618 return 1;
3619 break;
3620 case POWER_OR_RESET:
b2a4a43d
SC		 3621 dev_warn(&h->pdev->dev,
3622 "a power on or device reset detected\n");
0a9279cc
MM		 3623 return 1;
3624 break;
3625 case UNIT_ATTENTION_CLEARED:
b2a4a43d
SC		 3626 dev_warn(&h->pdev->dev,
3627 "unit attention cleared by another initiator\n");
0a9279cc
MM		 3628 return 1;
3629 break;
3630 default:
b2a4a43d
SC		 3631 dev_warn(&h->pdev->dev, "unknown unit attention detected\n");
3632 return 1;
0a9279cc
MM		 3633 }
3634}
3635
7c832835 3636/*
d14c4ab5 3637 * We cannot read the structure directly, for portability we must use
1da177e4 3638 * the io functions.
7c832835 3639 * This is for debug only.
1da177e4 3640 */
b2a4a43d 3641static void print_cfg_table(ctlr_info_t *h)
1da177e4
LT		 3642{
3643 int i;
3644 char temp_name[17];
b2a4a43d 3645 CfgTable_struct *tb = h->cfgtable;
1da177e4 3646
b2a4a43d
SC		 3647 dev_dbg(&h->pdev->dev, "Controller Configuration information\n");
3648 dev_dbg(&h->pdev->dev, "------------------------------------\n");
7c832835 3649 for (i = 0; i < 4; i++)
1da177e4 3650 temp_name[i] = readb(&(tb->Signature[i]));
7c832835 3651 temp_name[4] = '\0';
b2a4a43d
SC		 3652 dev_dbg(&h->pdev->dev, " Signature = %s\n", temp_name);
3653 dev_dbg(&h->pdev->dev, " Spec Number = %d\n",
3654 readl(&(tb->SpecValence)));
3655 dev_dbg(&h->pdev->dev, " Transport methods supported = 0x%x\n",
7c832835 3656 readl(&(tb->TransportSupport)));
b2a4a43d 3657 dev_dbg(&h->pdev->dev, " Transport methods active = 0x%x\n",
7c832835 3658 readl(&(tb->TransportActive)));
b2a4a43d 3659 dev_dbg(&h->pdev->dev, " Requested transport Method = 0x%x\n",
7c832835 3660 readl(&(tb->HostWrite.TransportRequest)));
b2a4a43d 3661 dev_dbg(&h->pdev->dev, " Coalesce Interrupt Delay = 0x%x\n",
7c832835 3662 readl(&(tb->HostWrite.CoalIntDelay)));
b2a4a43d 3663 dev_dbg(&h->pdev->dev, " Coalesce Interrupt Count = 0x%x\n",
7c832835 3664 readl(&(tb->HostWrite.CoalIntCount)));
b2a4a43d 3665 dev_dbg(&h->pdev->dev, " Max outstanding commands = 0x%d\n",
7c832835 3666 readl(&(tb->CmdsOutMax)));
b2a4a43d
SC		 3667 dev_dbg(&h->pdev->dev, " Bus Types = 0x%x\n",
3668 readl(&(tb->BusTypes)));
7c832835 3669 for (i = 0; i < 16; i++)
1da177e4
LT		 3670 temp_name[i] = readb(&(tb->ServerName[i]));
3671 temp_name[16] = '\0';
b2a4a43d
SC		 3672 dev_dbg(&h->pdev->dev, " Server Name = %s\n", temp_name);
3673 dev_dbg(&h->pdev->dev, " Heartbeat Counter = 0x%x\n\n\n",
3674 readl(&(tb->HeartBeat)));
1da177e4 3675}
1da177e4 3676
7c832835 3677static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr)
1da177e4
LT		 3678{
3679 int i, offset, mem_type, bar_type;
7c832835 3680 if (pci_bar_addr == PCI_BASE_ADDRESS_0) /* looking for BAR zero? */
1da177e4
LT		 3681 return 0;
3682 offset = 0;
7c832835
BH		 3683 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
3684 bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE;
1da177e4
LT		 3685 if (bar_type == PCI_BASE_ADDRESS_SPACE_IO)
3686 offset += 4;
3687 else {
3688 mem_type = pci_resource_flags(pdev, i) &
7c832835 3689 PCI_BASE_ADDRESS_MEM_TYPE_MASK;
1da177e4 3690 switch (mem_type) {
7c832835
BH		 3691 case PCI_BASE_ADDRESS_MEM_TYPE_32:
3692 case PCI_BASE_ADDRESS_MEM_TYPE_1M:
3693 offset += 4; /* 32 bit */
3694 break;
3695 case PCI_BASE_ADDRESS_MEM_TYPE_64:
3696 offset += 8;
3697 break;
3698 default: /* reserved in PCI 2.2 */
b2a4a43d 3699 dev_warn(&pdev->dev,
7c832835
BH		 3700 "Base address is invalid\n");
3701 return -1;
1da177e4
LT		 3702 break;
3703 }
3704 }
7c832835
BH		 3705 if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0)
3706 return i + 1;
1da177e4
LT		 3707 }
3708 return -1;
3709}
3710
5e216153
MM		 3711/* Fill in bucket_map[], given nsgs (the max number of
3712 * scatter gather elements supported) and bucket[],
3713 * which is an array of 8 integers. The bucket[] array
3714 * contains 8 different DMA transfer sizes (in 16
3715 * byte increments) which the controller uses to fetch
3716 * commands. This function fills in bucket_map[], which
3717 * maps a given number of scatter gather elements to one of
3718 * the 8 DMA transfer sizes. The point of it is to allow the
3719 * controller to only do as much DMA as needed to fetch the
3720 * command, with the DMA transfer size encoded in the lower
3721 * bits of the command address.
3722 */
3723static void calc_bucket_map(int bucket[], int num_buckets,
3724 int nsgs, int *bucket_map)
3725{
3726 int i, j, b, size;
3727
3728 /* even a command with 0 SGs requires 4 blocks */
3729#define MINIMUM_TRANSFER_BLOCKS 4
3730#define NUM_BUCKETS 8
3731 /* Note, bucket_map must have nsgs+1 entries. */
3732 for (i = 0; i <= nsgs; i++) {
3733 /* Compute size of a command with i SG entries */
3734 size = i + MINIMUM_TRANSFER_BLOCKS;
3735 b = num_buckets; /* Assume the biggest bucket */
3736 /* Find the bucket that is just big enough */
3737 for (j = 0; j < 8; j++) {
3738 if (bucket[j] >= size) {
3739 b = j;
3740 break;
3741 }
3742 }
3743 /* for a command with i SG entries, use bucket b. */
3744 bucket_map[i] = b;
3745 }
3746}
3747
0f8a6a1e
SC		 3748static void __devinit cciss_wait_for_mode_change_ack(ctlr_info_t *h)
3749{
3750 int i;
3751
3752 /* under certain very rare conditions, this can take awhile.
3753 * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right
3754 * as we enter this code.) */
3755 for (i = 0; i < MAX_CONFIG_WAIT; i++) {
3756 if (!(readl(h->vaddr + SA5_DOORBELL) & CFGTBL_ChangeReq))
3757 break;
332c2f80 3758 usleep_range(10000, 20000);
0f8a6a1e
SC		 3759 }
3760}
3761
b9933135
SC		 3762static __devinit void cciss_enter_performant_mode(ctlr_info_t *h)
3763{
3764 /* This is a bit complicated. There are 8 registers on
3765 * the controller which we write to to tell it 8 different
3766 * sizes of commands which there may be. It's a way of
3767 * reducing the DMA done to fetch each command. Encoded into
3768 * each command's tag are 3 bits which communicate to the controller
3769 * which of the eight sizes that command fits within. The size of
3770 * each command depends on how many scatter gather entries there are.
3771 * Each SG entry requires 16 bytes. The eight registers are programmed
3772 * with the number of 16-byte blocks a command of that size requires.
3773 * The smallest command possible requires 5 such 16 byte blocks.
3774 * the largest command possible requires MAXSGENTRIES + 4 16-byte
3775 * blocks. Note, this only extends to the SG entries contained
3776 * within the command block, and does not extend to chained blocks
3777 * of SG elements. bft[] contains the eight values we write to
3778 * the registers. They are not evenly distributed, but have more
3779 * sizes for small commands, and fewer sizes for larger commands.
3780 */
5e216153 3781 __u32 trans_offset;
b9933135 3782 int bft[8] = { 5, 6, 8, 10, 12, 20, 28, MAXSGENTRIES + 4};
5e216153
MM		 3783 /*
3784 * 5 = 1 s/g entry or 4k
3785 * 6 = 2 s/g entry or 8k
3786 * 8 = 4 s/g entry or 16k
3787 * 10 = 6 s/g entry or 24k
3788 */
5e216153 3789 unsigned long register_value;
5e216153
MM		 3790 BUILD_BUG_ON(28 > MAXSGENTRIES + 4);
3791
5e216153
MM		 3792 h->reply_pool_wraparound = 1; /* spec: init to 1 */
3793
3794 /* Controller spec: zero out this buffer. */
3795 memset(h->reply_pool, 0, h->max_commands * sizeof(__u64));
3796 h->reply_pool_head = h->reply_pool;
3797
3798 trans_offset = readl(&(h->cfgtable->TransMethodOffset));
3799 calc_bucket_map(bft, ARRAY_SIZE(bft), h->maxsgentries,
3800 h->blockFetchTable);
3801 writel(bft[0], &h->transtable->BlockFetch0);
3802 writel(bft[1], &h->transtable->BlockFetch1);
3803 writel(bft[2], &h->transtable->BlockFetch2);
3804 writel(bft[3], &h->transtable->BlockFetch3);
3805 writel(bft[4], &h->transtable->BlockFetch4);
3806 writel(bft[5], &h->transtable->BlockFetch5);
3807 writel(bft[6], &h->transtable->BlockFetch6);
3808 writel(bft[7], &h->transtable->BlockFetch7);
3809
3810 /* size of controller ring buffer */
3811 writel(h->max_commands, &h->transtable->RepQSize);
3812 writel(1, &h->transtable->RepQCount);
3813 writel(0, &h->transtable->RepQCtrAddrLow32);
3814 writel(0, &h->transtable->RepQCtrAddrHigh32);
3815 writel(h->reply_pool_dhandle, &h->transtable->RepQAddr0Low32);
3816 writel(0, &h->transtable->RepQAddr0High32);
3817 writel(CFGTBL_Trans_Performant,
3818 &(h->cfgtable->HostWrite.TransportRequest));
3819
5e216153 3820 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
0f8a6a1e 3821 cciss_wait_for_mode_change_ack(h);
5e216153 3822 register_value = readl(&(h->cfgtable->TransportActive));
b9933135 3823 if (!(register_value & CFGTBL_Trans_Performant))
b2a4a43d 3824 dev_warn(&h->pdev->dev, "cciss: unable to get board into"
5e216153 3825 " performant mode\n");
b9933135
SC		 3826}
3827
3828static void __devinit cciss_put_controller_into_performant_mode(ctlr_info_t *h)
3829{
3830 __u32 trans_support;
3831
3832 dev_dbg(&h->pdev->dev, "Trying to put board into Performant mode\n");
3833 /* Attempt to put controller into performant mode if supported */
3834 /* Does board support performant mode? */
3835 trans_support = readl(&(h->cfgtable->TransportSupport));
3836 if (!(trans_support & PERFORMANT_MODE))
3837 return;
3838
b2a4a43d 3839 dev_dbg(&h->pdev->dev, "Placing controller into performant mode\n");
b9933135
SC		 3840 /* Performant mode demands commands on a 32 byte boundary
3841 * pci_alloc_consistent aligns on page boundarys already.
3842 * Just need to check if divisible by 32
3843 */
3844 if ((sizeof(CommandList_struct) % 32) != 0) {
b2a4a43d 3845 dev_warn(&h->pdev->dev, "%s %d %s\n",
b9933135
SC		 3846 "cciss info: command size[",
3847 (int)sizeof(CommandList_struct),
3848 "] not divisible by 32, no performant mode..\n");
5e216153
MM		 3849 return;
3850 }
3851
b9933135
SC		 3852 /* Performant mode ring buffer and supporting data structures */
3853 h->reply_pool = (__u64 *)pci_alloc_consistent(
3854 h->pdev, h->max_commands * sizeof(__u64),
3855 &(h->reply_pool_dhandle));
3856
3857 /* Need a block fetch table for performant mode */
3858 h->blockFetchTable = kmalloc(((h->maxsgentries+1) *
3859 sizeof(__u32)), GFP_KERNEL);
3860
3861 if ((h->reply_pool == NULL) || (h->blockFetchTable == NULL))
3862 goto clean_up;
3863
3864 cciss_enter_performant_mode(h);
3865
5e216153
MM		 3866 /* Change the access methods to the performant access methods */
3867 h->access = SA5_performant_access;
b9933135 3868 h->transMethod = CFGTBL_Trans_Performant;
5e216153
MM		 3869
3870 return;
3871clean_up:
3872 kfree(h->blockFetchTable);
3873 if (h->reply_pool)
3874 pci_free_consistent(h->pdev,
3875 h->max_commands * sizeof(__u64),
3876 h->reply_pool,
3877 h->reply_pool_dhandle);
3878 return;
3879
3880} /* cciss_put_controller_into_performant_mode */
3881
fb86a35b
MM		 3882/* If MSI/MSI-X is supported by the kernel we will try to enable it on
3883 * controllers that are capable. If not, we use IO-APIC mode.
3884 */
3885
f70dba83 3886static void __devinit cciss_interrupt_mode(ctlr_info_t *h)
fb86a35b
MM		 3887{
3888#ifdef CONFIG_PCI_MSI
7c832835
BH		 3889 int err;
3890 struct msix_entry cciss_msix_entries[4] = { {0, 0}, {0, 1},
3891 {0, 2}, {0, 3}
3892 };
fb86a35b
MM		 3893
3894 /* Some boards advertise MSI but don't really support it */
f70dba83
SC		 3895 if ((h->board_id == 0x40700E11) || (h->board_id == 0x40800E11) ||
3896 (h->board_id == 0x40820E11) || (h->board_id == 0x40830E11))
fb86a35b
MM		 3897 goto default_int_mode;
3898
f70dba83
SC		 3899 if (pci_find_capability(h->pdev, PCI_CAP_ID_MSIX)) {
3900 err = pci_enable_msix(h->pdev, cciss_msix_entries, 4);
7c832835 3901 if (!err) {
f70dba83
SC		 3902 h->intr[0] = cciss_msix_entries[0].vector;
3903 h->intr[1] = cciss_msix_entries[1].vector;
3904 h->intr[2] = cciss_msix_entries[2].vector;
3905 h->intr[3] = cciss_msix_entries[3].vector;
3906 h->msix_vector = 1;
7c832835
BH		 3907 return;
3908 }
3909 if (err > 0) {
b2a4a43d
SC		 3910 dev_warn(&h->pdev->dev,
3911 "only %d MSI-X vectors available\n", err);
1ecb9c0f 3912 goto default_int_mode;
7c832835 3913 } else {
b2a4a43d
SC		 3914 dev_warn(&h->pdev->dev,
3915 "MSI-X init failed %d\n", err);
1ecb9c0f 3916 goto default_int_mode;
7c832835
BH		 3917 }
3918 }
f70dba83
SC		 3919 if (pci_find_capability(h->pdev, PCI_CAP_ID_MSI)) {
3920 if (!pci_enable_msi(h->pdev))
3921 h->msi_vector = 1;
3922 else
b2a4a43d 3923 dev_warn(&h->pdev->dev, "MSI init failed\n");
7c832835 3924 }
1ecb9c0f 3925default_int_mode:
7c832835 3926#endif /* CONFIG_PCI_MSI */
fb86a35b 3927 /* if we get here we're going to use the default interrupt mode */
f70dba83 3928 h->intr[PERF_MODE_INT] = h->pdev->irq;
fb86a35b
MM		 3929 return;
3930}
3931
6539fa9b 3932static int __devinit cciss_lookup_board_id(struct pci_dev *pdev, u32 *board_id)
1da177e4 3933{
6539fa9b
SC		 3934 int i;
3935 u32 subsystem_vendor_id, subsystem_device_id;
2ec24ff1
SC		 3936
3937 subsystem_vendor_id = pdev->subsystem_vendor;
3938 subsystem_device_id = pdev->subsystem_device;
6539fa9b
SC		 3939 *board_id = ((subsystem_device_id << 16) & 0xffff0000) |
3940 subsystem_vendor_id;
2ec24ff1 3941
4205df34 3942 for (i = 0; i < ARRAY_SIZE(products); i++)
6539fa9b
SC		 3943 if (*board_id == products[i].board_id)
3944 return i;
6539fa9b
SC		 3945 dev_warn(&pdev->dev, "unrecognized board ID: 0x%08x, ignoring.\n",
3946 *board_id);
3947 return -ENODEV;
3948}
1da177e4 3949
dd9c426e
SC		 3950static inline bool cciss_board_disabled(ctlr_info_t *h)
3951{
3952 u16 command;
1da177e4 3953
dd9c426e
SC		 3954 (void) pci_read_config_word(h->pdev, PCI_COMMAND, &command);
3955 return ((command & PCI_COMMAND_MEMORY) == 0);
3956}
1da177e4 3957
d474830d
SC		 3958static int __devinit cciss_pci_find_memory_BAR(struct pci_dev *pdev,
3959 unsigned long *memory_bar)
3960{
3961 int i;
4e570309 3962
d474830d
SC		 3963 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++)
3964 if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) {
3965 /* addressing mode bits already removed */
3966 *memory_bar = pci_resource_start(pdev, i);
3967 dev_dbg(&pdev->dev, "memory BAR = %lx\n",
3968 *memory_bar);
3969 return 0;
3970 }
3971 dev_warn(&pdev->dev, "no memory BAR found\n");
3972 return -ENODEV;
3973}
1da177e4 3974
afa842fa
SC		 3975static int __devinit cciss_wait_for_board_state(struct pci_dev *pdev,
3976 void __iomem *vaddr, int wait_for_ready)
3977#define BOARD_READY 1
3978#define BOARD_NOT_READY 0
e99ba136 3979{
afa842fa 3980 int i, iterations;
e99ba136 3981 u32 scratchpad;
1da177e4 3982
afa842fa
SC		 3983 if (wait_for_ready)
3984 iterations = CCISS_BOARD_READY_ITERATIONS;
3985 else
3986 iterations = CCISS_BOARD_NOT_READY_ITERATIONS;
3987
3988 for (i = 0; i < iterations; i++) {
3989 scratchpad = readl(vaddr + SA5_SCRATCHPAD_OFFSET);
3990 if (wait_for_ready) {
3991 if (scratchpad == CCISS_FIRMWARE_READY)
3992 return 0;
3993 } else {
3994 if (scratchpad != CCISS_FIRMWARE_READY)
3995 return 0;
3996 }
e99ba136 3997 msleep(CCISS_BOARD_READY_POLL_INTERVAL_MSECS);
e1438581 3998 }
afa842fa 3999 dev_warn(&pdev->dev, "board not ready, timed out.\n");
e99ba136
SC		 4000 return -ENODEV;
4001}
e1438581 4002
8e93bf6d
SC		 4003static int __devinit cciss_find_cfg_addrs(struct pci_dev *pdev,
4004 void __iomem *vaddr, u32 *cfg_base_addr, u64 *cfg_base_addr_index,
4005 u64 *cfg_offset)
4006{
4007 *cfg_base_addr = readl(vaddr + SA5_CTCFG_OFFSET);
4008 *cfg_offset = readl(vaddr + SA5_CTMEM_OFFSET);
4009 *cfg_base_addr &= (u32) 0x0000ffff;
4010 *cfg_base_addr_index = find_PCI_BAR_index(pdev, *cfg_base_addr);
4011 if (*cfg_base_addr_index == -1) {
4012 dev_warn(&pdev->dev, "cannot find cfg_base_addr_index, "
4013 "*cfg_base_addr = 0x%08x\n", *cfg_base_addr);
4014 return -ENODEV;
4015 }
4016 return 0;
4017}
1da177e4 4018
4809d098
SC		 4019static int __devinit cciss_find_cfgtables(ctlr_info_t *h)
4020{
4021 u64 cfg_offset;
4022 u32 cfg_base_addr;
4023 u64 cfg_base_addr_index;
4024 u32 trans_offset;
8e93bf6d 4025 int rc;
1da177e4 4026
8e93bf6d
SC		 4027 rc = cciss_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr,
4028 &cfg_base_addr_index, &cfg_offset);
4029 if (rc)
4030 return rc;
4809d098 4031 h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev,
8e93bf6d 4032 cfg_base_addr_index) + cfg_offset, sizeof(h->cfgtable));
4809d098
SC		 4033 if (!h->cfgtable)
4034 return -ENOMEM;
4035 /* Find performant mode table. */
8e93bf6d 4036 trans_offset = readl(&h->cfgtable->TransMethodOffset);
4809d098
SC		 4037 h->transtable = remap_pci_mem(pci_resource_start(h->pdev,
4038 cfg_base_addr_index)+cfg_offset+trans_offset,
4039 sizeof(*h->transtable));
4040 if (!h->transtable)
4041 return -ENOMEM;
4042 return 0;
4043}
1da177e4 4044
adfbc1ff
SC		 4045static void __devinit cciss_get_max_perf_mode_cmds(struct ctlr_info *h)
4046{
4047 h->max_commands = readl(&(h->cfgtable->MaxPerformantModeCommands));
186fb9cf
SC		 4048
4049 /* Limit commands in memory limited kdump scenario. */
4050 if (reset_devices && h->max_commands > 32)
4051 h->max_commands = 32;
4052
adfbc1ff
SC		 4053 if (h->max_commands < 16) {
4054 dev_warn(&h->pdev->dev, "Controller reports "
4055 "max supported commands of %d, an obvious lie. "
4056 "Using 16. Ensure that firmware is up to date.\n",
4057 h->max_commands);
4058 h->max_commands = 16;
1da177e4 4059 }
adfbc1ff 4060}
1da177e4 4061
afadbf4b
SC		 4062/* Interrogate the hardware for some limits:
4063 * max commands, max SG elements without chaining, and with chaining,
4064 * SG chain block size, etc.
4065 */
4066static void __devinit cciss_find_board_params(ctlr_info_t *h)
4067{
adfbc1ff 4068 cciss_get_max_perf_mode_cmds(h);
afadbf4b
SC		 4069 h->nr_cmds = h->max_commands - 4; /* Allow room for some ioctls */
4070 h->maxsgentries = readl(&(h->cfgtable->MaxSGElements));
5c07a311 4071 /*
afadbf4b 4072 * Limit in-command s/g elements to 32 save dma'able memory.
5c07a311
DB		 4073 * Howvever spec says if 0, use 31
4074 */
afadbf4b
SC		 4075 h->max_cmd_sgentries = 31;
4076 if (h->maxsgentries > 512) {
4077 h->max_cmd_sgentries = 32;
4078 h->chainsize = h->maxsgentries - h->max_cmd_sgentries + 1;
4079 h->maxsgentries--; /* save one for chain pointer */
5c07a311 4080 } else {
afadbf4b
SC		 4081 h->maxsgentries = 31; /* default to traditional values */
4082 h->chainsize = 0;
5c07a311 4083 }
afadbf4b 4084}
5c07a311 4085
501b92cd
SC		 4086static inline bool CISS_signature_present(ctlr_info_t *h)
4087{
4088 if ((readb(&h->cfgtable->Signature[0]) != 'C') ||
4089 (readb(&h->cfgtable->Signature[1]) != 'I') ||
4090 (readb(&h->cfgtable->Signature[2]) != 'S') ||
4091 (readb(&h->cfgtable->Signature[3]) != 'S')) {
4092 dev_warn(&h->pdev->dev, "not a valid CISS config table\n");
4093 return false;
1da177e4 4094 }
501b92cd
SC		 4095 return true;
4096}
4097
322e304c
SC		 4098/* Need to enable prefetch in the SCSI core for 6400 in x86 */
4099static inline void cciss_enable_scsi_prefetch(ctlr_info_t *h)
4100{
1da177e4 4101#ifdef CONFIG_X86
322e304c
SC		 4102 u32 prefetch;
4103
4104 prefetch = readl(&(h->cfgtable->SCSI_Prefetch));
4105 prefetch |= 0x100;
4106 writel(prefetch, &(h->cfgtable->SCSI_Prefetch));
1da177e4 4107#endif
322e304c 4108}
1da177e4 4109
bfd63ee5
SC		 4110/* Disable DMA prefetch for the P600. Otherwise an ASIC bug may result
4111 * in a prefetch beyond physical memory.
4112 */
4113static inline void cciss_p600_dma_prefetch_quirk(ctlr_info_t *h)
4114{
4115 u32 dma_prefetch;
4116 __u32 dma_refetch;
4117
4118 if (h->board_id != 0x3225103C)
4119 return;
4120 dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG);
4121 dma_prefetch |= 0x8000;
4122 writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG);
4123 pci_read_config_dword(h->pdev, PCI_COMMAND_PARITY, &dma_refetch);
4124 dma_refetch |= 0x1;
4125 pci_write_config_dword(h->pdev, PCI_COMMAND_PARITY, dma_refetch);
4126}
4127
f70dba83 4128static int __devinit cciss_pci_init(ctlr_info_t *h)
6539fa9b 4129{
4809d098 4130 int prod_index, err;
6539fa9b 4131
f70dba83 4132 prod_index = cciss_lookup_board_id(h->pdev, &h->board_id);
6539fa9b 4133 if (prod_index < 0)
2ec24ff1 4134 return -ENODEV;
f70dba83
SC		 4135 h->product_name = products[prod_index].product_name;
4136 h->access = *(products[prod_index].access);
1da177e4 4137
f70dba83 4138 if (cciss_board_disabled(h)) {
b2a4a43d 4139 dev_warn(&h->pdev->dev, "controller appears to be disabled\n");
c33ac89b 4140 return -ENODEV;
1da177e4 4141 }
f70dba83 4142 err = pci_enable_device(h->pdev);
7c832835 4143 if (err) {
b2a4a43d 4144 dev_warn(&h->pdev->dev, "Unable to Enable PCI device\n");
c33ac89b 4145 return err;
f92e2f5f
MM		 4146 }
4147
f70dba83 4148 err = pci_request_regions(h->pdev, "cciss");
4e570309 4149 if (err) {
b2a4a43d
SC		 4150 dev_warn(&h->pdev->dev,
4151 "Cannot obtain PCI resources, aborting\n");
872225ca 4152 return err;
4e570309 4153 }
1da177e4 4154
b2a4a43d
SC		 4155 dev_dbg(&h->pdev->dev, "irq = %x\n", h->pdev->irq);
4156 dev_dbg(&h->pdev->dev, "board_id = %x\n", h->board_id);
1da177e4 4157
fb86a35b
MM		 4158/* If the kernel supports MSI/MSI-X we will try to enable that functionality,
4159 * else we use the IO-APIC interrupt assigned to us by system ROM.
4160 */
f70dba83
SC		 4161 cciss_interrupt_mode(h);
4162 err = cciss_pci_find_memory_BAR(h->pdev, &h->paddr);
d474830d 4163 if (err)
e1438581 4164 goto err_out_free_res;
f70dba83
SC		 4165 h->vaddr = remap_pci_mem(h->paddr, 0x250);
4166 if (!h->vaddr) {
da550321
SC		 4167 err = -ENOMEM;
4168 goto err_out_free_res;
7c832835 4169 }
afa842fa 4170 err = cciss_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY);
e99ba136 4171 if (err)
4e570309 4172 goto err_out_free_res;
f70dba83 4173 err = cciss_find_cfgtables(h);
4809d098 4174 if (err)
4e570309 4175 goto err_out_free_res;
b2a4a43d 4176 print_cfg_table(h);
f70dba83 4177 cciss_find_board_params(h);
1da177e4 4178
f70dba83 4179 if (!CISS_signature_present(h)) {
c33ac89b 4180 err = -ENODEV;
4e570309 4181 goto err_out_free_res;
1da177e4 4182 }
f70dba83
SC		 4183 cciss_enable_scsi_prefetch(h);
4184 cciss_p600_dma_prefetch_quirk(h);
4185 cciss_put_controller_into_performant_mode(h);
1da177e4
LT		 4186 return 0;
4187
5faad620 4188err_out_free_res:
872225ca
MM		 4189 /*
4190 * Deliberately omit pci_disable_device(): it does something nasty to
4191 * Smart Array controllers that pci_enable_device does not undo
4192 */
f70dba83
SC		 4193 if (h->transtable)
4194 iounmap(h->transtable);
4195 if (h->cfgtable)
4196 iounmap(h->cfgtable);
4197 if (h->vaddr)
4198 iounmap(h->vaddr);
4199 pci_release_regions(h->pdev);
c33ac89b 4200 return err;
1da177e4
LT		 4201}
4202
6ae5ce8e
MM		 4203/* Function to find the first free pointer into our hba[] array
4204 * Returns -1 if no free entries are left.
7c832835 4205 */
b2a4a43d 4206static int alloc_cciss_hba(struct pci_dev *pdev)
1da177e4 4207{
799202cb 4208 int i;
1da177e4 4209
7c832835 4210 for (i = 0; i < MAX_CTLR; i++) {
1da177e4 4211 if (!hba[i]) {
f70dba83 4212 ctlr_info_t *h;
f2912a12 4213
f70dba83
SC		 4214 h = kzalloc(sizeof(ctlr_info_t), GFP_KERNEL);
4215 if (!h)
1da177e4 4216 goto Enomem;
f70dba83 4217 hba[i] = h;
1da177e4
LT		 4218 return i;
4219 }
4220 }
b2a4a43d 4221 dev_warn(&pdev->dev, "This driver supports a maximum"
7c832835 4222 " of %d controllers.\n", MAX_CTLR);
799202cb
MM		 4223 return -1;
4224Enomem:
b2a4a43d 4225 dev_warn(&pdev->dev, "out of memory.\n");
1da177e4
LT		 4226 return -1;
4227}
4228
f70dba83 4229static void free_hba(ctlr_info_t *h)
1da177e4 4230{
2c935593 4231 int i;
1da177e4 4232
f70dba83 4233 hba[h->ctlr] = NULL;
2c935593
SC		 4234 for (i = 0; i < h->highest_lun + 1; i++)
4235 if (h->gendisk[i] != NULL)
4236 put_disk(h->gendisk[i]);
4237 kfree(h);
1da177e4
LT		 4238}
4239
82eb03cf
CC		 4240/* Send a message CDB to the firmware. */
4241static __devinit int cciss_message(struct pci_dev *pdev, unsigned char opcode, unsigned char type)
4242{
4243 typedef struct {
4244 CommandListHeader_struct CommandHeader;
4245 RequestBlock_struct Request;
4246 ErrDescriptor_struct ErrorDescriptor;
4247 } Command;
4248 static const size_t cmd_sz = sizeof(Command) + sizeof(ErrorInfo_struct);
4249 Command *cmd;
4250 dma_addr_t paddr64;
4251 uint32_t paddr32, tag;
4252 void __iomem *vaddr;
4253 int i, err;
4254
4255 vaddr = ioremap_nocache(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0));
4256 if (vaddr == NULL)
4257 return -ENOMEM;
4258
4259 /* The Inbound Post Queue only accepts 32-bit physical addresses for the
4260 CCISS commands, so they must be allocated from the lower 4GiB of
4261 memory. */
e930438c 4262 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
82eb03cf
CC		 4263 if (err) {
4264 iounmap(vaddr);
4265 return -ENOMEM;
4266 }
4267
4268 cmd = pci_alloc_consistent(pdev, cmd_sz, &paddr64);
4269 if (cmd == NULL) {
4270 iounmap(vaddr);
4271 return -ENOMEM;
4272 }
4273
4274 /* This must fit, because of the 32-bit consistent DMA mask. Also,
4275 although there's no guarantee, we assume that the address is at
4276 least 4-byte aligned (most likely, it's page-aligned). */
4277 paddr32 = paddr64;
4278
4279 cmd->CommandHeader.ReplyQueue = 0;
4280 cmd->CommandHeader.SGList = 0;
4281 cmd->CommandHeader.SGTotal = 0;
4282 cmd->CommandHeader.Tag.lower = paddr32;
4283 cmd->CommandHeader.Tag.upper = 0;
4284 memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8);
4285
4286 cmd->Request.CDBLen = 16;
4287 cmd->Request.Type.Type = TYPE_MSG;
4288 cmd->Request.Type.Attribute = ATTR_HEADOFQUEUE;
4289 cmd->Request.Type.Direction = XFER_NONE;
4290 cmd->Request.Timeout = 0; /* Don't time out */
4291 cmd->Request.CDB[0] = opcode;
4292 cmd->Request.CDB[1] = type;
4293 memset(&cmd->Request.CDB[2], 0, 14); /* the rest of the CDB is reserved */
4294
4295 cmd->ErrorDescriptor.Addr.lower = paddr32 + sizeof(Command);
4296 cmd->ErrorDescriptor.Addr.upper = 0;
4297 cmd->ErrorDescriptor.Len = sizeof(ErrorInfo_struct);
4298
4299 writel(paddr32, vaddr + SA5_REQUEST_PORT_OFFSET);
4300
4301 for (i = 0; i < 10; i++) {
4302 tag = readl(vaddr + SA5_REPLY_PORT_OFFSET);
4303 if ((tag & ~3) == paddr32)
4304 break;
4305 schedule_timeout_uninterruptible(HZ);
4306 }
4307
4308 iounmap(vaddr);
4309
4310 /* we leak the DMA buffer here ... no choice since the controller could
4311 still complete the command. */
4312 if (i == 10) {
b2a4a43d
SC		 4313 dev_err(&pdev->dev,
4314 "controller message %02x:%02x timed out\n",
82eb03cf
CC		 4315 opcode, type);
4316 return -ETIMEDOUT;
4317 }
4318
4319 pci_free_consistent(pdev, cmd_sz, cmd, paddr64);
4320
4321 if (tag & 2) {
b2a4a43d 4322 dev_err(&pdev->dev, "controller message %02x:%02x failed\n",
82eb03cf
CC		 4323 opcode, type);
4324 return -EIO;
4325 }
4326
b2a4a43d 4327 dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n",
82eb03cf
CC		 4328 opcode, type);
4329 return 0;
4330}
4331
4332#define cciss_soft_reset_controller(p) cciss_message(p, 1, 0)
4333#define cciss_noop(p) cciss_message(p, 3, 0)
4334
a6528d01
SC		 4335static int cciss_controller_hard_reset(struct pci_dev *pdev,
4336 void * __iomem vaddr, bool use_doorbell)
82eb03cf 4337{
a6528d01
SC		 4338 u16 pmcsr;
4339 int pos;
82eb03cf 4340
a6528d01
SC		 4341 if (use_doorbell) {
4342 /* For everything after the P600, the PCI power state method
4343 * of resetting the controller doesn't work, so we have this
4344 * other way using the doorbell register.
4345 */
4346 dev_info(&pdev->dev, "using doorbell to reset controller\n");
4347 writel(DOORBELL_CTLR_RESET, vaddr + SA5_DOORBELL);
4348 msleep(1000);
4349 } else { /* Try to do it the PCI power state way */
4350
4351 /* Quoting from the Open CISS Specification: "The Power
4352 * Management Control/Status Register (CSR) controls the power
4353 * state of the device. The normal operating state is D0,
4354 * CSR=00h. The software off state is D3, CSR=03h. To reset
4355 * the controller, place the interface device in D3 then to D0,
4356 * this causes a secondary PCI reset which will reset the
4357 * controller." */
4358
4359 pos = pci_find_capability(pdev, PCI_CAP_ID_PM);
4360 if (pos == 0) {
4361 dev_err(&pdev->dev,
4362 "cciss_controller_hard_reset: "
4363 "PCI PM not supported\n");
4364 return -ENODEV;
4365 }
4366 dev_info(&pdev->dev, "using PCI PM to reset controller\n");
4367 /* enter the D3hot power management state */
4368 pci_read_config_word(pdev, pos + PCI_PM_CTRL, &pmcsr);
4369 pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
4370 pmcsr |= PCI_D3hot;
4371 pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
82eb03cf 4372
a6528d01 4373 msleep(500);
82eb03cf 4374
a6528d01
SC		 4375 /* enter the D0 power management state */
4376 pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
4377 pmcsr |= PCI_D0;
4378 pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
82eb03cf 4379
a6528d01
SC		 4380 msleep(500);
4381 }
4382 return 0;
4383}
82eb03cf 4384
a6528d01
SC		 4385/* This does a hard reset of the controller using PCI power management
4386 * states or using the doorbell register. */
4387static __devinit int cciss_kdump_hard_reset_controller(struct pci_dev *pdev)
4388{
a6528d01
SC		 4389 u64 cfg_offset;
4390 u32 cfg_base_addr;
4391 u64 cfg_base_addr_index;
4392 void __iomem *vaddr;
4393 unsigned long paddr;
4394 u32 misc_fw_support, active_transport;
f442e64b 4395 int rc;
a6528d01
SC		 4396 CfgTable_struct __iomem *cfgtable;
4397 bool use_doorbell;
058a0f9f 4398 u32 board_id;
f442e64b 4399 u16 command_register;
a6528d01
SC		 4400
4401 /* For controllers as old a the p600, this is very nearly
4402 * the same thing as
4403 *
4404 * pci_save_state(pci_dev);
4405 * pci_set_power_state(pci_dev, PCI_D3hot);
4406 * pci_set_power_state(pci_dev, PCI_D0);
4407 * pci_restore_state(pci_dev);
4408 *
a6528d01
SC		 4409 * For controllers newer than the P600, the pci power state
4410 * method of resetting doesn't work so we have another way
4411 * using the doorbell register.
4412 */
82eb03cf 4413
058a0f9f
SC		 4414 /* Exclude 640x boards. These are two pci devices in one slot
4415 * which share a battery backed cache module. One controls the
4416 * cache, the other accesses the cache through the one that controls
4417 * it. If we reset the one controlling the cache, the other will
4418 * likely not be happy. Just forbid resetting this conjoined mess.
4419 */
4420 cciss_lookup_board_id(pdev, &board_id);
4421 if (board_id == 0x409C0E11 || board_id == 0x409D0E11) {
4422 dev_warn(&pdev->dev, "Cannot reset Smart Array 640x "
4423 "due to shared cache module.");
82eb03cf
CC		 4424 return -ENODEV;
4425 }
4426
f442e64b
SC		 4427 /* Save the PCI command register */
4428 pci_read_config_word(pdev, 4, &command_register);
4429 /* Turn the board off. This is so that later pci_restore_state()
4430 * won't turn the board on before the rest of config space is ready.
4431 */
4432 pci_disable_device(pdev);
4433 pci_save_state(pdev);
82eb03cf 4434
a6528d01
SC		 4435 /* find the first memory BAR, so we can find the cfg table */
4436 rc = cciss_pci_find_memory_BAR(pdev, &paddr);
4437 if (rc)
4438 return rc;
4439 vaddr = remap_pci_mem(paddr, 0x250);
4440 if (!vaddr)
4441 return -ENOMEM;
82eb03cf 4442
a6528d01
SC		 4443 /* find cfgtable in order to check if reset via doorbell is supported */
4444 rc = cciss_find_cfg_addrs(pdev, vaddr, &cfg_base_addr,
4445 &cfg_base_addr_index, &cfg_offset);
4446 if (rc)
4447 goto unmap_vaddr;
4448 cfgtable = remap_pci_mem(pci_resource_start(pdev,
4449 cfg_base_addr_index) + cfg_offset, sizeof(*cfgtable));
4450 if (!cfgtable) {
4451 rc = -ENOMEM;
4452 goto unmap_vaddr;
4453 }
82eb03cf 4454
a6528d01
SC		 4455 /* If reset via doorbell register is supported, use that. */
4456 misc_fw_support = readl(&cfgtable->misc_fw_support);
4457 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET;
82eb03cf 4458
75230ff2
SC		 4459 /* The doorbell reset seems to cause lockups on some Smart
4460 * Arrays (e.g. P410, P410i, maybe others). Until this is
4461 * fixed or at least isolated, avoid the doorbell reset.
4462 */
4463 use_doorbell = 0;
4464
a6528d01
SC		 4465 rc = cciss_controller_hard_reset(pdev, vaddr, use_doorbell);
4466 if (rc)
4467 goto unmap_cfgtable;
f442e64b
SC		 4468 pci_restore_state(pdev);
4469 rc = pci_enable_device(pdev);
4470 if (rc) {
4471 dev_warn(&pdev->dev, "failed to enable device.\n");
4472 goto unmap_cfgtable;
82eb03cf 4473 }
f442e64b 4474 pci_write_config_word(pdev, 4, command_register);
82eb03cf 4475
a6528d01
SC		 4476 /* Some devices (notably the HP Smart Array 5i Controller)
4477 need a little pause here */
4478 msleep(CCISS_POST_RESET_PAUSE_MSECS);
4479
afa842fa
SC		 4480 /* Wait for board to become not ready, then ready. */
4481 dev_info(&pdev->dev, "Waiting for board to become ready.\n");
4482 rc = cciss_wait_for_board_state(pdev, vaddr, BOARD_NOT_READY);
4483 if (rc) /* Don't bail, might be E500, etc. which can't be reset */
4484 dev_warn(&pdev->dev,
4485 "failed waiting for board to become not ready\n");
4486 rc = cciss_wait_for_board_state(pdev, vaddr, BOARD_READY);
4487 if (rc) {
4488 dev_warn(&pdev->dev,
4489 "failed waiting for board to become ready\n");
4490 goto unmap_cfgtable;
4491 }
4492 dev_info(&pdev->dev, "board ready.\n");
4493
a6528d01
SC		 4494 /* Controller should be in simple mode at this point. If it's not,
4495 * It means we're on one of those controllers which doesn't support
4496 * the doorbell reset method and on which the PCI power management reset
4497 * method doesn't work (P800, for example.)
4498 * In those cases, don't try to proceed, as it generally doesn't work.
4499 */
4500 active_transport = readl(&cfgtable->TransportActive);
4501 if (active_transport & PERFORMANT_MODE) {
4502 dev_warn(&pdev->dev, "Unable to successfully reset controller,"
4503 " Ignoring controller.\n");
4504 rc = -ENODEV;
4505 }
4506
4507unmap_cfgtable:
4508 iounmap(cfgtable);
4509
4510unmap_vaddr:
4511 iounmap(vaddr);
4512 return rc;
82eb03cf
CC		 4513}
4514
83123cb1
SC		 4515static __devinit int cciss_init_reset_devices(struct pci_dev *pdev)
4516{
a6528d01 4517 int rc, i;
83123cb1
SC		 4518
4519 if (!reset_devices)
4520 return 0;
4521
a6528d01
SC		 4522 /* Reset the controller with a PCI power-cycle or via doorbell */
4523 rc = cciss_kdump_hard_reset_controller(pdev);
83123cb1 4524
a6528d01
SC		 4525 /* -ENOTSUPP here means we cannot reset the controller
4526 * but it's already (and still) up and running in
058a0f9f
SC		 4527 * "performant mode". Or, it might be 640x, which can't reset
4528 * due to concerns about shared bbwc between 6402/6404 pair.
a6528d01
SC		 4529 */
4530 if (rc == -ENOTSUPP)
4531 return 0; /* just try to do the kdump anyhow. */
4532 if (rc)
4533 return -ENODEV;
83123cb1
SC		 4534
4535 /* Now try to get the controller to respond to a no-op */
4536 for (i = 0; i < CCISS_POST_RESET_NOOP_RETRIES; i++) {
4537 if (cciss_noop(pdev) == 0)
4538 break;
4539 else
4540 dev_warn(&pdev->dev, "no-op failed%s\n",
4541 (i < CCISS_POST_RESET_NOOP_RETRIES - 1 ?
4542 "; re-trying" : ""));
4543 msleep(CCISS_POST_RESET_NOOP_INTERVAL_MSECS);
4544 }
82eb03cf
CC		 4545 return 0;
4546}
4547
1da177e4
LT		 4548/*
4549 * This is it. Find all the controllers and register them. I really hate
4550 * stealing all these major device numbers.
4551 * returns the number of block devices registered.
4552 */
4553static int __devinit cciss_init_one(struct pci_dev *pdev,
7c832835 4554 const struct pci_device_id *ent)
1da177e4 4555{
1da177e4 4556 int i;
799202cb 4557 int j = 0;
5c07a311 4558 int k = 0;
1da177e4 4559 int rc;
22bece00 4560 int dac, return_code;
212a5026 4561 InquiryData_struct *inq_buff;
f70dba83 4562 ctlr_info_t *h;
1da177e4 4563
83123cb1
SC		 4564 rc = cciss_init_reset_devices(pdev);
4565 if (rc)
4566 return rc;
b2a4a43d 4567 i = alloc_cciss_hba(pdev);
7c832835 4568 if (i < 0)
e2019b58 4569 return -1;
1f8ef380 4570
f70dba83
SC		 4571 h = hba[i];
4572 h->pdev = pdev;
4573 h->busy_initializing = 1;
e6e1ee93
JA		 4574 INIT_LIST_HEAD(&h->cmpQ);
4575 INIT_LIST_HEAD(&h->reqQ);
f70dba83 4576 mutex_init(&h->busy_shutting_down);
1f8ef380 4577
f70dba83 4578 if (cciss_pci_init(h) != 0)
2cfa948c 4579 goto clean_no_release_regions;
1da177e4 4580
f70dba83
SC		 4581 sprintf(h->devname, "cciss%d", i);
4582 h->ctlr = i;
1da177e4 4583
f70dba83 4584 init_completion(&h->scan_wait);
b368c9dd 4585
f70dba83 4586 if (cciss_create_hba_sysfs_entry(h))
7fe06326
AP		 4587 goto clean0;
4588
1da177e4 4589 /* configure PCI DMA stuff */
6a35528a 4590 if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(64)))
40aabb58 4591 dac = 1;
284901a9 4592 else if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32)))
40aabb58 4593 dac = 0;
1da177e4 4594 else {
b2a4a43d 4595 dev_err(&h->pdev->dev, "no suitable DMA available\n");
1da177e4
LT		 4596 goto clean1;
4597 }
4598
4599 /*
4600 * register with the major number, or get a dynamic major number
4601 * by passing 0 as argument. This is done for greater than
4602 * 8 controller support.
4603 */
4604 if (i < MAX_CTLR_ORIG)
f70dba83
SC		 4605 h->major = COMPAQ_CISS_MAJOR + i;
4606 rc = register_blkdev(h->major, h->devname);
7c832835 4607 if (rc == -EBUSY || rc == -EINVAL) {
b2a4a43d
SC		 4608 dev_err(&h->pdev->dev,
4609 "Unable to get major number %d for %s "
f70dba83 4610 "on hba %d\n", h->major, h->devname, i);
1da177e4 4611 goto clean1;
7c832835 4612 } else {
1da177e4 4613 if (i >= MAX_CTLR_ORIG)
f70dba83 4614 h->major = rc;
1da177e4
LT		 4615 }
4616
4617 /* make sure the board interrupts are off */
f70dba83
SC		 4618 h->access.set_intr_mask(h, CCISS_INTR_OFF);
4619 if (h->msi_vector || h->msix_vector) {
4620 if (request_irq(h->intr[PERF_MODE_INT],
0c2b3908 4621 do_cciss_msix_intr,
f70dba83 4622 IRQF_DISABLED, h->devname, h)) {
b2a4a43d 4623 dev_err(&h->pdev->dev, "Unable to get irq %d for %s\n",
f70dba83 4624 h->intr[PERF_MODE_INT], h->devname);
0c2b3908
MM		 4625 goto clean2;
4626 }
4627 } else {
f70dba83
SC		 4628 if (request_irq(h->intr[PERF_MODE_INT], do_cciss_intx,
4629 IRQF_DISABLED, h->devname, h)) {
b2a4a43d 4630 dev_err(&h->pdev->dev, "Unable to get irq %d for %s\n",
f70dba83 4631 h->intr[PERF_MODE_INT], h->devname);
0c2b3908
MM		 4632 goto clean2;
4633 }
1da177e4 4634 }
40aabb58 4635
b2a4a43d 4636 dev_info(&h->pdev->dev, "%s: <0x%x> at PCI %s IRQ %d%s using DAC\n",
f70dba83
SC		 4637 h->devname, pdev->device, pci_name(pdev),
4638 h->intr[PERF_MODE_INT], dac ? "" : " not");
7c832835 4639
f70dba83
SC		 4640 h->cmd_pool_bits =
4641 kmalloc(DIV_ROUND_UP(h->nr_cmds, BITS_PER_LONG)
061837bc 4642 * sizeof(unsigned long), GFP_KERNEL);
f70dba83
SC		 4643 h->cmd_pool = (CommandList_struct *)
4644 pci_alloc_consistent(h->pdev,
4645 h->nr_cmds * sizeof(CommandList_struct),
4646 &(h->cmd_pool_dhandle));
4647 h->errinfo_pool = (ErrorInfo_struct *)
4648 pci_alloc_consistent(h->pdev,
4649 h->nr_cmds * sizeof(ErrorInfo_struct),
4650 &(h->errinfo_pool_dhandle));
4651 if ((h->cmd_pool_bits == NULL)
4652 || (h->cmd_pool == NULL)
4653 || (h->errinfo_pool == NULL)) {
b2a4a43d 4654 dev_err(&h->pdev->dev, "out of memory");
1da177e4
LT		 4655 goto clean4;
4656 }
5c07a311
DB		 4657
4658 /* Need space for temp scatter list */
f70dba83 4659 h->scatter_list = kmalloc(h->max_commands *
5c07a311
DB		 4660 sizeof(struct scatterlist *),
4661 GFP_KERNEL);
4ee69851
DC		 4662 if (!h->scatter_list)
4663 goto clean4;
4664
f70dba83
SC		 4665 for (k = 0; k < h->nr_cmds; k++) {
4666 h->scatter_list[k] = kmalloc(sizeof(struct scatterlist) *
4667 h->maxsgentries,
5c07a311 4668 GFP_KERNEL);
f70dba83 4669 if (h->scatter_list[k] == NULL) {
b2a4a43d
SC		 4670 dev_err(&h->pdev->dev,
4671 "could not allocate s/g lists\n");
5c07a311
DB		 4672 goto clean4;
4673 }
4674 }
f70dba83
SC		 4675 h->cmd_sg_list = cciss_allocate_sg_chain_blocks(h,
4676 h->chainsize, h->nr_cmds);
4677 if (!h->cmd_sg_list && h->chainsize > 0)
5c07a311 4678 goto clean4;
5c07a311 4679
f70dba83 4680 spin_lock_init(&h->lock);
1da177e4 4681
7c832835 4682 /* Initialize the pdev driver private data.
f70dba83
SC		 4683 have it point to h. */
4684 pci_set_drvdata(pdev, h);
7c832835
BH		 4685 /* command and error info recs zeroed out before
4686 they are used */
f70dba83
SC		 4687 memset(h->cmd_pool_bits, 0,
4688 DIV_ROUND_UP(h->nr_cmds, BITS_PER_LONG)
061837bc 4689 * sizeof(unsigned long));
1da177e4 4690
f70dba83
SC		 4691 h->num_luns = 0;
4692 h->highest_lun = -1;
6ae5ce8e 4693 for (j = 0; j < CISS_MAX_LUN; j++) {
f70dba83
SC		 4694 h->drv[j] = NULL;
4695 h->gendisk[j] = NULL;
6ae5ce8e 4696 }
1da177e4 4697
f70dba83 4698 cciss_scsi_setup(h);
1da177e4
LT		 4699
4700 /* Turn the interrupts on so we can service requests */
f70dba83 4701 h->access.set_intr_mask(h, CCISS_INTR_ON);
1da177e4 4702
22bece00
MM		 4703 /* Get the firmware version */
4704 inq_buff = kzalloc(sizeof(InquiryData_struct), GFP_KERNEL);
4705 if (inq_buff == NULL) {
b2a4a43d 4706 dev_err(&h->pdev->dev, "out of memory\n");
22bece00
MM		 4707 goto clean4;
4708 }
4709
f70dba83 4710 return_code = sendcmd_withirq(h, CISS_INQUIRY, inq_buff,
b57695fe 4711 sizeof(InquiryData_struct), 0, CTLR_LUNID, TYPE_CMD);
22bece00 4712 if (return_code == IO_OK) {
f70dba83
SC		 4713 h->firm_ver[0] = inq_buff->data_byte[32];
4714 h->firm_ver[1] = inq_buff->data_byte[33];
4715 h->firm_ver[2] = inq_buff->data_byte[34];
4716 h->firm_ver[3] = inq_buff->data_byte[35];
22bece00 4717 } else { /* send command failed */
b2a4a43d 4718 dev_warn(&h->pdev->dev, "unable to determine firmware"
22bece00
MM		 4719 " version of controller\n");
4720 }
212a5026 4721 kfree(inq_buff);
22bece00 4722
f70dba83 4723 cciss_procinit(h);
92c4231a 4724
f70dba83 4725 h->cciss_max_sectors = 8192;
92c4231a 4726
f70dba83
SC		 4727 rebuild_lun_table(h, 1, 0);
4728 h->busy_initializing = 0;
e2019b58 4729 return 1;
1da177e4 4730
6ae5ce8e 4731clean4:
f70dba83 4732 kfree(h->cmd_pool_bits);
5c07a311 4733 /* Free up sg elements */
b0722cb1 4734 for (k-- ; k >= 0; k--)
f70dba83
SC		 4735 kfree(h->scatter_list[k]);
4736 kfree(h->scatter_list);
4737 cciss_free_sg_chain_blocks(h->cmd_sg_list, h->nr_cmds);
4738 if (h->cmd_pool)
4739 pci_free_consistent(h->pdev,
4740 h->nr_cmds * sizeof(CommandList_struct),
4741 h->cmd_pool, h->cmd_pool_dhandle);
4742 if (h->errinfo_pool)
4743 pci_free_consistent(h->pdev,
4744 h->nr_cmds * sizeof(ErrorInfo_struct),
4745 h->errinfo_pool,
4746 h->errinfo_pool_dhandle);
4747 free_irq(h->intr[PERF_MODE_INT], h);
6ae5ce8e 4748clean2:
f70dba83 4749 unregister_blkdev(h->major, h->devname);
6ae5ce8e 4750clean1:
f70dba83 4751 cciss_destroy_hba_sysfs_entry(h);
7fe06326 4752clean0:
2cfa948c
SC		 4753 pci_release_regions(pdev);
4754clean_no_release_regions:
f70dba83 4755 h->busy_initializing = 0;
9cef0d2f 4756
872225ca
MM		 4757 /*
4758 * Deliberately omit pci_disable_device(): it does something nasty to
4759 * Smart Array controllers that pci_enable_device does not undo
4760 */
799202cb 4761 pci_set_drvdata(pdev, NULL);
f70dba83 4762 free_hba(h);
e2019b58 4763 return -1;
1da177e4
LT		 4764}
4765
e9ca75b5 4766static void cciss_shutdown(struct pci_dev *pdev)
1da177e4 4767{
29009a03
SC		 4768 ctlr_info_t *h;
4769 char *flush_buf;
7c832835 4770 int return_code;
1da177e4 4771
29009a03
SC		 4772 h = pci_get_drvdata(pdev);
4773 flush_buf = kzalloc(4, GFP_KERNEL);
4774 if (!flush_buf) {
b2a4a43d 4775 dev_warn(&h->pdev->dev, "cache not flushed, out of memory.\n");
e9ca75b5 4776 return;
e9ca75b5 4777 }
29009a03
SC		 4778 /* write all data in the battery backed cache to disk */
4779 memset(flush_buf, 0, 4);
f70dba83 4780 return_code = sendcmd_withirq(h, CCISS_CACHE_FLUSH, flush_buf,
29009a03
SC		 4781 4, 0, CTLR_LUNID, TYPE_CMD);
4782 kfree(flush_buf);
4783 if (return_code != IO_OK)
b2a4a43d 4784 dev_warn(&h->pdev->dev, "Error flushing cache\n");
29009a03 4785 h->access.set_intr_mask(h, CCISS_INTR_OFF);
5e216153 4786 free_irq(h->intr[PERF_MODE_INT], h);
e9ca75b5
GB		 4787}
4788
4789static void __devexit cciss_remove_one(struct pci_dev *pdev)
4790{
f70dba83 4791 ctlr_info_t *h;
e9ca75b5
GB		 4792 int i, j;
4793
7c832835 4794 if (pci_get_drvdata(pdev) == NULL) {
b2a4a43d 4795 dev_err(&pdev->dev, "Unable to remove device\n");
1da177e4
LT		 4796 return;
4797 }
0a9279cc 4798
f70dba83
SC		 4799 h = pci_get_drvdata(pdev);
4800 i = h->ctlr;
7c832835 4801 if (hba[i] == NULL) {
b2a4a43d 4802 dev_err(&pdev->dev, "device appears to already be removed\n");
1da177e4
LT		 4803 return;
4804 }
b6550777 4805
f70dba83 4806 mutex_lock(&h->busy_shutting_down);
0a9279cc 4807
f70dba83
SC		 4808 remove_from_scan_list(h);
4809 remove_proc_entry(h->devname, proc_cciss);
4810 unregister_blkdev(h->major, h->devname);
b6550777
BH		 4811
4812 /* remove it from the disk list */
4813 for (j = 0; j < CISS_MAX_LUN; j++) {
f70dba83 4814 struct gendisk *disk = h->gendisk[j];
b6550777 4815 if (disk) {
165125e1 4816 struct request_queue *q = disk->queue;
b6550777 4817
097d0264 4818 if (disk->flags & GENHD_FL_UP) {
f70dba83 4819 cciss_destroy_ld_sysfs_entry(h, j, 1);
b6550777 4820 del_gendisk(disk);
097d0264 4821 }
b6550777
BH		 4822 if (q)
4823 blk_cleanup_queue(q);
4824 }
4825 }
4826
ba198efb 4827#ifdef CONFIG_CISS_SCSI_TAPE
f70dba83 4828 cciss_unregister_scsi(h); /* unhook from SCSI subsystem */
ba198efb 4829#endif
b6550777 4830
e9ca75b5 4831 cciss_shutdown(pdev);
fb86a35b
MM		 4832
4833#ifdef CONFIG_PCI_MSI
f70dba83
SC		 4834 if (h->msix_vector)
4835 pci_disable_msix(h->pdev);
4836 else if (h->msi_vector)
4837 pci_disable_msi(h->pdev);
7c832835 4838#endif /* CONFIG_PCI_MSI */
fb86a35b 4839
f70dba83
SC		 4840 iounmap(h->transtable);
4841 iounmap(h->cfgtable);
4842 iounmap(h->vaddr);
1da177e4 4843
f70dba83
SC		 4844 pci_free_consistent(h->pdev, h->nr_cmds * sizeof(CommandList_struct),
4845 h->cmd_pool, h->cmd_pool_dhandle);
4846 pci_free_consistent(h->pdev, h->nr_cmds * sizeof(ErrorInfo_struct),
4847 h->errinfo_pool, h->errinfo_pool_dhandle);
4848 kfree(h->cmd_pool_bits);
5c07a311 4849 /* Free up sg elements */
f70dba83
SC		 4850 for (j = 0; j < h->nr_cmds; j++)
4851 kfree(h->scatter_list[j]);
4852 kfree(h->scatter_list);
4853 cciss_free_sg_chain_blocks(h->cmd_sg_list, h->nr_cmds);
872225ca
MM		 4854 /*
4855 * Deliberately omit pci_disable_device(): it does something nasty to
4856 * Smart Array controllers that pci_enable_device does not undo
4857 */
7c832835 4858 pci_release_regions(pdev);
4e570309 4859 pci_set_drvdata(pdev, NULL);
f70dba83
SC		 4860 cciss_destroy_hba_sysfs_entry(h);
4861 mutex_unlock(&h->busy_shutting_down);
4862 free_hba(h);
7c832835 4863}
1da177e4
LT		 4864
4865static struct pci_driver cciss_pci_driver = {
7c832835
BH		 4866 .name = "cciss",
4867 .probe = cciss_init_one,
4868 .remove = __devexit_p(cciss_remove_one),
4869 .id_table = cciss_pci_device_id, /* id_table */
e9ca75b5 4870 .shutdown = cciss_shutdown,
1da177e4
LT		 4871};
4872
4873/*
4874 * This is it. Register the PCI driver information for the cards we control
7c832835 4875 * the OS will call our registered routines when it finds one of our cards.
1da177e4
LT		 4876 */
4877static int __init cciss_init(void)
4878{
7fe06326
AP		 4879 int err;
4880
10cbda97
JA		 4881 /*
4882 * The hardware requires that commands are aligned on a 64-bit
4883 * boundary. Given that we use pci_alloc_consistent() to allocate an
4884 * array of them, the size must be a multiple of 8 bytes.
4885 */
1b7d0d28 4886 BUILD_BUG_ON(sizeof(CommandList_struct) % COMMANDLIST_ALIGNMENT);
1da177e4
LT		 4887 printk(KERN_INFO DRIVER_NAME "\n");
4888
7fe06326
AP		 4889 err = bus_register(&cciss_bus_type);
4890 if (err)
4891 return err;
4892
b368c9dd
AP		 4893 /* Start the scan thread */
4894 cciss_scan_thread = kthread_run(scan_thread, NULL, "cciss_scan");
4895 if (IS_ERR(cciss_scan_thread)) {
4896 err = PTR_ERR(cciss_scan_thread);
4897 goto err_bus_unregister;
4898 }
4899
1da177e4 4900 /* Register for our PCI devices */
7fe06326
AP		 4901 err = pci_register_driver(&cciss_pci_driver);
4902 if (err)
b368c9dd 4903 goto err_thread_stop;
7fe06326 4904
617e1344 4905 return err;
7fe06326 4906
b368c9dd
AP		 4907err_thread_stop:
4908 kthread_stop(cciss_scan_thread);
4909err_bus_unregister:
7fe06326 4910 bus_unregister(&cciss_bus_type);
b368c9dd 4911
7fe06326 4912 return err;
1da177e4
LT		 4913}
4914
4915static void __exit cciss_cleanup(void)
4916{
4917 int i;
4918
4919 pci_unregister_driver(&cciss_pci_driver);
4920 /* double check that all controller entrys have been removed */
7c832835
BH		 4921 for (i = 0; i < MAX_CTLR; i++) {
4922 if (hba[i] != NULL) {
b2a4a43d
SC		 4923 dev_warn(&hba[i]->pdev->dev,
4924 "had to remove controller\n");
1da177e4
LT		 4925 cciss_remove_one(hba[i]->pdev);
4926 }
4927 }
b368c9dd 4928 kthread_stop(cciss_scan_thread);
90fdb0b9
JA		 4929 if (proc_cciss)
4930 remove_proc_entry("driver/cciss", NULL);
7fe06326 4931 bus_unregister(&cciss_bus_type);
1da177e4
LT		 4932}
4933
4934module_init(cciss_init);
4935module_exit(cciss_cleanup);
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