]> git.proxmox.com Git - mirror_ubuntu-artful-kernel.git/blame - drivers/block/cciss.c
projects / mirror_ubuntu-artful-kernel.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
loop: fix loop block driver discard and encryption comment
[mirror_ubuntu-artful-kernel.git] / drivers / block / cciss.c
CommitLineData
1da177e4 1/*
bd4f36d6
MM		 2 * Disk Array driver for HP Smart Array controllers.
3 * (C) Copyright 2000, 2007 Hewlett-Packard Development Company, L.P.
1da177e4
LT		 4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
bd4f36d6 7 * the Free Software Foundation; version 2 of the License.
1da177e4
LT		 8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
bd4f36d6
MM		 11 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. See the GNU
12 * General Public License for more details.
1da177e4
LT		 13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
bd4f36d6
MM		 16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
17 * 02111-1307, USA.
1da177e4
LT		 18 *
19 * Questions/Comments/Bugfixes to iss_storagedev@hp.com
20 *
21 */
22
1da177e4
LT		 23#include <linux/module.h>
24#include <linux/interrupt.h>
25#include <linux/types.h>
26#include <linux/pci.h>
19373358 27#include <linux/pci-aspm.h>
1da177e4
LT		 28#include <linux/kernel.h>
29#include <linux/slab.h>
30#include <linux/delay.h>
31#include <linux/major.h>
32#include <linux/fs.h>
33#include <linux/bio.h>
34#include <linux/blkpg.h>
35#include <linux/timer.h>
36#include <linux/proc_fs.h>
89b6e743 37#include <linux/seq_file.h>
7c832835 38#include <linux/init.h>
4d761609 39#include <linux/jiffies.h>
1da177e4
LT		 40#include <linux/hdreg.h>
41#include <linux/spinlock.h>
42#include <linux/compat.h>
b368c9dd 43#include <linux/mutex.h>
1da177e4
LT		 44#include <asm/uaccess.h>
45#include <asm/io.h>
46
eb0df996 47#include <linux/dma-mapping.h>
1da177e4
LT		 48#include <linux/blkdev.h>
49#include <linux/genhd.h>
50#include <linux/completion.h>
d5d3b736 51#include <scsi/scsi.h>
03bbfee5
MMOD		 52#include <scsi/sg.h>
53#include <scsi/scsi_ioctl.h>
54#include <linux/cdrom.h>
231bc2a2 55#include <linux/scatterlist.h>
0a9279cc 56#include <linux/kthread.h>
1da177e4
LT		 57
58#define CCISS_DRIVER_VERSION(maj,min,submin) ((maj<<16)|(min<<8)|(submin))
841fdffd
MM		 59#define DRIVER_NAME "HP CISS Driver (v 3.6.26)"
60#define DRIVER_VERSION CCISS_DRIVER_VERSION(3, 6, 26)
1da177e4
LT		 61
62/* Embedded module documentation macros - see modules.h */
63MODULE_AUTHOR("Hewlett-Packard Company");
24aac480 64MODULE_DESCRIPTION("Driver for HP Smart Array Controllers");
841fdffd
MM		 65MODULE_SUPPORTED_DEVICE("HP Smart Array Controllers");
66MODULE_VERSION("3.6.26");
1da177e4 67MODULE_LICENSE("GPL");
8a4ec67b
SC		 68static int cciss_tape_cmds = 6;
69module_param(cciss_tape_cmds, int, 0644);
70MODULE_PARM_DESC(cciss_tape_cmds,
71 "number of commands to allocate for tape devices (default: 6)");
13049537
JH		 72static int cciss_simple_mode;
73module_param(cciss_simple_mode, int, S_IRUGO|S_IWUSR);
74MODULE_PARM_DESC(cciss_simple_mode,
75 "Use 'simple mode' rather than 'performant mode'");
1da177e4 76
2a48fc0a 77static DEFINE_MUTEX(cciss_mutex);
bbe425cd 78static struct proc_dir_entry *proc_cciss;
2ec24ff1 79
1da177e4
LT		 80#include "cciss_cmd.h"
81#include "cciss.h"
82#include <linux/cciss_ioctl.h>
83
84/* define the PCI info for the cards we can control */
85static const struct pci_device_id cciss_pci_device_id[] = {
f82ccdb9
BH		 86 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISS, 0x0E11, 0x4070},
87 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSB, 0x0E11, 0x4080},
88 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSB, 0x0E11, 0x4082},
89 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSB, 0x0E11, 0x4083},
90 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x4091},
91 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x409A},
92 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x409B},
93 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x409C},
94 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x409D},
95 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSA, 0x103C, 0x3225},
96 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x3223},
97 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x3234},
98 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x3235},
99 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3211},
100 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3212},
101 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3213},
102 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3214},
103 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3215},
de923916 104 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x3237},
9cff3b38 105 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x323D},
1da177e4
LT		 106 {0,}
107};
7c832835 108
1da177e4
LT		 109MODULE_DEVICE_TABLE(pci, cciss_pci_device_id);
110
1da177e4
LT		 111/* board_id = Subsystem Device ID & Vendor ID
112 * product = Marketing Name for the board
7c832835 113 * access = Address of the struct of function pointers
1da177e4
LT		 114 */
115static struct board_type products[] = {
49153998
MM		 116 {0x40700E11, "Smart Array 5300", &SA5_access},
117 {0x40800E11, "Smart Array 5i", &SA5B_access},
118 {0x40820E11, "Smart Array 532", &SA5B_access},
119 {0x40830E11, "Smart Array 5312", &SA5B_access},
120 {0x409A0E11, "Smart Array 641", &SA5_access},
121 {0x409B0E11, "Smart Array 642", &SA5_access},
122 {0x409C0E11, "Smart Array 6400", &SA5_access},
123 {0x409D0E11, "Smart Array 6400 EM", &SA5_access},
124 {0x40910E11, "Smart Array 6i", &SA5_access},
125 {0x3225103C, "Smart Array P600", &SA5_access},
4205df34
SC		 126 {0x3223103C, "Smart Array P800", &SA5_access},
127 {0x3234103C, "Smart Array P400", &SA5_access},
49153998
MM		 128 {0x3235103C, "Smart Array P400i", &SA5_access},
129 {0x3211103C, "Smart Array E200i", &SA5_access},
130 {0x3212103C, "Smart Array E200", &SA5_access},
131 {0x3213103C, "Smart Array E200i", &SA5_access},
132 {0x3214103C, "Smart Array E200i", &SA5_access},
133 {0x3215103C, "Smart Array E200i", &SA5_access},
134 {0x3237103C, "Smart Array E500", &SA5_access},
2ec24ff1
SC		 135 {0x3223103C, "Smart Array P800", &SA5_access},
136 {0x3234103C, "Smart Array P400", &SA5_access},
49153998 137 {0x323D103C, "Smart Array P700m", &SA5_access},
1da177e4
LT		 138};
139
d14c4ab5 140/* How long to wait (in milliseconds) for board to go into simple mode */
7c832835 141#define MAX_CONFIG_WAIT 30000
1da177e4
LT		 142#define MAX_IOCTL_CONFIG_WAIT 1000
143
144/*define how many times we will try a command because of bus resets */
145#define MAX_CMD_RETRIES 3
146
1da177e4
LT		 147#define MAX_CTLR 32
148
149/* Originally cciss driver only supports 8 major numbers */
150#define MAX_CTLR_ORIG 8
151
1da177e4
LT		 152static ctlr_info_t *hba[MAX_CTLR];
153
b368c9dd
AP		 154static struct task_struct *cciss_scan_thread;
155static DEFINE_MUTEX(scan_mutex);
156static LIST_HEAD(scan_q);
157
165125e1 158static void do_cciss_request(struct request_queue *q);
0c2b3908
MM		 159static irqreturn_t do_cciss_intx(int irq, void *dev_id);
160static irqreturn_t do_cciss_msix_intr(int irq, void *dev_id);
ef7822c2 161static int cciss_open(struct block_device *bdev, fmode_t mode);
6e9624b8 162static int cciss_unlocked_open(struct block_device *bdev, fmode_t mode);
ef7822c2 163static int cciss_release(struct gendisk *disk, fmode_t mode);
8a6cfeb6
AB		 164static int do_ioctl(struct block_device *bdev, fmode_t mode,
165 unsigned int cmd, unsigned long arg);
ef7822c2 166static int cciss_ioctl(struct block_device *bdev, fmode_t mode,
7c832835 167 unsigned int cmd, unsigned long arg);
a885c8c4 168static int cciss_getgeo(struct block_device *bdev, struct hd_geometry *geo);
1da177e4 169
1da177e4 170static int cciss_revalidate(struct gendisk *disk);
2d11d993 171static int rebuild_lun_table(ctlr_info_t *h, int first_time, int via_ioctl);
a0ea8622 172static int deregister_disk(ctlr_info_t *h, int drv_index,
2d11d993 173 int clear_all, int via_ioctl);
1da177e4 174
f70dba83 175static void cciss_read_capacity(ctlr_info_t *h, int logvol,
00988a35 176 sector_t *total_size, unsigned int *block_size);
f70dba83 177static void cciss_read_capacity_16(ctlr_info_t *h, int logvol,
00988a35 178 sector_t *total_size, unsigned int *block_size);
f70dba83 179static void cciss_geometry_inquiry(ctlr_info_t *h, int logvol,
7b838bde 180 sector_t total_size,
00988a35 181 unsigned int block_size, InquiryData_struct *inq_buff,
7c832835 182 drive_info_struct *drv);
dac5488a 183static void __devinit cciss_interrupt_mode(ctlr_info_t *);
13049537 184static int __devinit cciss_enter_simple_mode(struct ctlr_info *h);
7c832835 185static void start_io(ctlr_info_t *h);
f70dba83 186static int sendcmd_withirq(ctlr_info_t *h, __u8 cmd, void *buff, size_t size,
b57695fe 187 __u8 page_code, unsigned char scsi3addr[],
188 int cmd_type);
85cc61ae 189static int sendcmd_withirq_core(ctlr_info_t *h, CommandList_struct *c,
190 int attempt_retry);
191static int process_sendcmd_error(ctlr_info_t *h, CommandList_struct *c);
1da177e4 192
d6f4965d 193static int add_to_scan_list(struct ctlr_info *h);
0a9279cc
MM		 194static int scan_thread(void *data);
195static int check_for_unit_attention(ctlr_info_t *h, CommandList_struct *c);
617e1344
SC		 196static void cciss_hba_release(struct device *dev);
197static void cciss_device_release(struct device *dev);
361e9b07 198static void cciss_free_gendisk(ctlr_info_t *h, int drv_index);
9cef0d2f 199static void cciss_free_drive_info(ctlr_info_t *h, int drv_index);
29979a71 200static inline u32 next_command(ctlr_info_t *h);
a6528d01
SC		 201static int __devinit cciss_find_cfg_addrs(struct pci_dev *pdev,
202 void __iomem *vaddr, u32 *cfg_base_addr, u64 *cfg_base_addr_index,
203 u64 *cfg_offset);
204static int __devinit cciss_pci_find_memory_BAR(struct pci_dev *pdev,
205 unsigned long *memory_bar);
16011131 206static inline u32 cciss_tag_discard_error_bits(ctlr_info_t *h, u32 tag);
62710ae1
SC		 207static __devinit int write_driver_ver_to_cfgtable(
208 CfgTable_struct __iomem *cfgtable);
33079b21 209
5e216153
MM		 210/* performant mode helper functions */
211static void calc_bucket_map(int *bucket, int num_buckets, int nsgs,
212 int *bucket_map);
213static void cciss_put_controller_into_performant_mode(ctlr_info_t *h);
33079b21 214
1da177e4 215#ifdef CONFIG_PROC_FS
f70dba83 216static void cciss_procinit(ctlr_info_t *h);
1da177e4 217#else
f70dba83 218static void cciss_procinit(ctlr_info_t *h)
7c832835
BH		 219{
220}
221#endif /* CONFIG_PROC_FS */
1da177e4
LT		 222
223#ifdef CONFIG_COMPAT
ef7822c2
AV		 224static int cciss_compat_ioctl(struct block_device *, fmode_t,
225 unsigned, unsigned long);
1da177e4
LT		 226#endif
227
83d5cde4 228static const struct block_device_operations cciss_fops = {
7c832835 229 .owner = THIS_MODULE,
6e9624b8 230 .open = cciss_unlocked_open,
ef7822c2 231 .release = cciss_release,
8a6cfeb6 232 .ioctl = do_ioctl,
7c832835 233 .getgeo = cciss_getgeo,
1da177e4 234#ifdef CONFIG_COMPAT
ef7822c2 235 .compat_ioctl = cciss_compat_ioctl,
1da177e4 236#endif
7c832835 237 .revalidate_disk = cciss_revalidate,
1da177e4
LT		 238};
239
5e216153
MM		 240/* set_performant_mode: Modify the tag for cciss performant
241 * set bit 0 for pull model, bits 3-1 for block fetch
242 * register number
243 */
244static void set_performant_mode(ctlr_info_t *h, CommandList_struct *c)
245{
0498cc2a 246 if (likely(h->transMethod & CFGTBL_Trans_Performant))
5e216153
MM		 247 c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1);
248}
249
1da177e4
LT		 250/*
251 * Enqueuing and dequeuing functions for cmdlists.
252 */
e6e1ee93 253static inline void addQ(struct list_head *list, CommandList_struct *c)
1da177e4 254{
e6e1ee93 255 list_add_tail(&c->list, list);
1da177e4
LT		 256}
257
8a3173de 258static inline void removeQ(CommandList_struct *c)
1da177e4 259{
b59e64d0
HR		 260 /*
261 * After kexec/dump some commands might still
262 * be in flight, which the firmware will try
263 * to complete. Resetting the firmware doesn't work
264 * with old fw revisions, so we have to mark
265 * them off as 'stale' to prevent the driver from
266 * falling over.
267 */
e6e1ee93 268 if (WARN_ON(list_empty(&c->list))) {
b59e64d0 269 c->cmd_type = CMD_MSG_STALE;
8a3173de 270 return;
b59e64d0 271 }
8a3173de 272
e6e1ee93 273 list_del_init(&c->list);
1da177e4
LT		 274}
275
664a717d
MM		 276static void enqueue_cmd_and_start_io(ctlr_info_t *h,
277 CommandList_struct *c)
278{
279 unsigned long flags;
5e216153 280 set_performant_mode(h, c);
664a717d
MM		 281 spin_lock_irqsave(&h->lock, flags);
282 addQ(&h->reqQ, c);
283 h->Qdepth++;
2a643ec6
SC		 284 if (h->Qdepth > h->maxQsinceinit)
285 h->maxQsinceinit = h->Qdepth;
664a717d
MM		 286 start_io(h);
287 spin_unlock_irqrestore(&h->lock, flags);
288}
289
dccc9b56 290static void cciss_free_sg_chain_blocks(SGDescriptor_struct **cmd_sg_list,
49fc5601
SC		 291 int nr_cmds)
292{
293 int i;
294
295 if (!cmd_sg_list)
296 return;
297 for (i = 0; i < nr_cmds; i++) {
dccc9b56
SC		 298 kfree(cmd_sg_list[i]);
299 cmd_sg_list[i] = NULL;
49fc5601
SC		 300 }
301 kfree(cmd_sg_list);
302}
303
dccc9b56
SC		 304static SGDescriptor_struct **cciss_allocate_sg_chain_blocks(
305 ctlr_info_t *h, int chainsize, int nr_cmds)
49fc5601
SC		 306{
307 int j;
dccc9b56 308 SGDescriptor_struct **cmd_sg_list;
49fc5601
SC		 309
310 if (chainsize <= 0)
311 return NULL;
312
313 cmd_sg_list = kmalloc(sizeof(*cmd_sg_list) * nr_cmds, GFP_KERNEL);
314 if (!cmd_sg_list)
315 return NULL;
316
317 /* Build up chain blocks for each command */
318 for (j = 0; j < nr_cmds; j++) {
49fc5601 319 /* Need a block of chainsized s/g elements. */
dccc9b56
SC		 320 cmd_sg_list[j] = kmalloc((chainsize *
321 sizeof(*cmd_sg_list[j])), GFP_KERNEL);
322 if (!cmd_sg_list[j]) {
49fc5601
SC		 323 dev_err(&h->pdev->dev, "Cannot get memory "
324 "for s/g chains.\n");
325 goto clean;
326 }
327 }
328 return cmd_sg_list;
329clean:
330 cciss_free_sg_chain_blocks(cmd_sg_list, nr_cmds);
331 return NULL;
332}
333
d45033ef
SC		 334static void cciss_unmap_sg_chain_block(ctlr_info_t *h, CommandList_struct *c)
335{
336 SGDescriptor_struct *chain_sg;
337 u64bit temp64;
338
339 if (c->Header.SGTotal <= h->max_cmd_sgentries)
340 return;
341
342 chain_sg = &c->SG[h->max_cmd_sgentries - 1];
343 temp64.val32.lower = chain_sg->Addr.lower;
344 temp64.val32.upper = chain_sg->Addr.upper;
345 pci_unmap_single(h->pdev, temp64.val, chain_sg->Len, PCI_DMA_TODEVICE);
346}
347
348static void cciss_map_sg_chain_block(ctlr_info_t *h, CommandList_struct *c,
349 SGDescriptor_struct *chain_block, int len)
350{
351 SGDescriptor_struct *chain_sg;
352 u64bit temp64;
353
354 chain_sg = &c->SG[h->max_cmd_sgentries - 1];
355 chain_sg->Ext = CCISS_SG_CHAIN;
356 chain_sg->Len = len;
357 temp64.val = pci_map_single(h->pdev, chain_block, len,
358 PCI_DMA_TODEVICE);
359 chain_sg->Addr.lower = temp64.val32.lower;
360 chain_sg->Addr.upper = temp64.val32.upper;
361}
362
1da177e4
LT		 363#include "cciss_scsi.c" /* For SCSI tape support */
364
1e6f2dc1
AB		 365static const char *raid_label[] = { "0", "4", "1(1+0)", "5", "5+1", "ADG",
366 "UNKNOWN"
367};
0e4a9d03 368#define RAID_UNKNOWN (ARRAY_SIZE(raid_label)-1)
0f5486ec 369
1da177e4
LT		 370#ifdef CONFIG_PROC_FS
371
372/*
373 * Report information about this controller.
374 */
375#define ENG_GIG 1000000000
376#define ENG_GIG_FACTOR (ENG_GIG/512)
89b6e743 377#define ENGAGE_SCSI "engage scsi"
1da177e4 378
89b6e743 379static void cciss_seq_show_header(struct seq_file *seq)
1da177e4 380{
89b6e743
MM		 381 ctlr_info_t *h = seq->private;
382
383 seq_printf(seq, "%s: HP %s Controller\n"
384 "Board ID: 0x%08lx\n"
385 "Firmware Version: %c%c%c%c\n"
386 "IRQ: %d\n"
387 "Logical drives: %d\n"
388 "Current Q depth: %d\n"
389 "Current # commands on controller: %d\n"
390 "Max Q depth since init: %d\n"
391 "Max # commands on controller since init: %d\n"
392 "Max SG entries since init: %d\n",
393 h->devname,
394 h->product_name,
395 (unsigned long)h->board_id,
396 h->firm_ver[0], h->firm_ver[1], h->firm_ver[2],
13049537 397 h->firm_ver[3], (unsigned int)h->intr[h->intr_mode],
89b6e743
MM		 398 h->num_luns,
399 h->Qdepth, h->commands_outstanding,
400 h->maxQsinceinit, h->max_outstanding, h->maxSG);
401
402#ifdef CONFIG_CISS_SCSI_TAPE
f70dba83 403 cciss_seq_tape_report(seq, h);
89b6e743
MM		 404#endif /* CONFIG_CISS_SCSI_TAPE */
405}
1da177e4 406
89b6e743
MM		 407static void *cciss_seq_start(struct seq_file *seq, loff_t *pos)
408{
409 ctlr_info_t *h = seq->private;
89b6e743 410 unsigned long flags;
1da177e4
LT		 411
412 /* prevent displaying bogus info during configuration
413 * or deconfiguration of a logical volume
414 */
f70dba83 415 spin_lock_irqsave(&h->lock, flags);
1da177e4 416 if (h->busy_configuring) {
f70dba83 417 spin_unlock_irqrestore(&h->lock, flags);
89b6e743 418 return ERR_PTR(-EBUSY);
1da177e4
LT		 419 }
420 h->busy_configuring = 1;
f70dba83 421 spin_unlock_irqrestore(&h->lock, flags);
1da177e4 422
89b6e743
MM		 423 if (*pos == 0)
424 cciss_seq_show_header(seq);
425
426 return pos;
427}
428
429static int cciss_seq_show(struct seq_file *seq, void *v)
430{
431 sector_t vol_sz, vol_sz_frac;
432 ctlr_info_t *h = seq->private;
433 unsigned ctlr = h->ctlr;
434 loff_t *pos = v;
9cef0d2f 435 drive_info_struct *drv = h->drv[*pos];
89b6e743
MM		 436
437 if (*pos > h->highest_lun)
438 return 0;
439
531c2dc7
SC		 440 if (drv == NULL) /* it's possible for h->drv[] to have holes. */
441 return 0;
442
89b6e743
MM		 443 if (drv->heads == 0)
444 return 0;
445
446 vol_sz = drv->nr_blocks;
447 vol_sz_frac = sector_div(vol_sz, ENG_GIG_FACTOR);
448 vol_sz_frac *= 100;
449 sector_div(vol_sz_frac, ENG_GIG_FACTOR);
450
fa52bec9 451 if (drv->raid_level < 0 || drv->raid_level > RAID_UNKNOWN)
89b6e743
MM		 452 drv->raid_level = RAID_UNKNOWN;
453 seq_printf(seq, "cciss/c%dd%d:"
454 "\t%4u.%02uGB\tRAID %s\n",
455 ctlr, (int) *pos, (int)vol_sz, (int)vol_sz_frac,
456 raid_label[drv->raid_level]);
457 return 0;
458}
459
460static void *cciss_seq_next(struct seq_file *seq, void *v, loff_t *pos)
461{
462 ctlr_info_t *h = seq->private;
463
464 if (*pos > h->highest_lun)
465 return NULL;
466 *pos += 1;
467
468 return pos;
469}
470
471static void cciss_seq_stop(struct seq_file *seq, void *v)
472{
473 ctlr_info_t *h = seq->private;
474
475 /* Only reset h->busy_configuring if we succeeded in setting
476 * it during cciss_seq_start. */
477 if (v == ERR_PTR(-EBUSY))
478 return;
7c832835 479
1da177e4 480 h->busy_configuring = 0;
1da177e4
LT		 481}
482
88e9d34c 483static const struct seq_operations cciss_seq_ops = {
89b6e743
MM		 484 .start = cciss_seq_start,
485 .show = cciss_seq_show,
486 .next = cciss_seq_next,
487 .stop = cciss_seq_stop,
488};
489
490static int cciss_seq_open(struct inode *inode, struct file *file)
491{
492 int ret = seq_open(file, &cciss_seq_ops);
493 struct seq_file *seq = file->private_data;
494
495 if (!ret)
496 seq->private = PDE(inode)->data;
497
498 return ret;
499}
500
501static ssize_t
502cciss_proc_write(struct file *file, const char __user *buf,
503 size_t length, loff_t *ppos)
1da177e4 504{
89b6e743
MM		 505 int err;
506 char *buffer;
507
508#ifndef CONFIG_CISS_SCSI_TAPE
509 return -EINVAL;
1da177e4
LT		 510#endif
511
89b6e743 512 if (!buf || length > PAGE_SIZE - 1)
7c832835 513 return -EINVAL;
89b6e743
MM		 514
515 buffer = (char *)__get_free_page(GFP_KERNEL);
516 if (!buffer)
517 return -ENOMEM;
518
519 err = -EFAULT;
520 if (copy_from_user(buffer, buf, length))
521 goto out;
522 buffer[length] = '\0';
523
524#ifdef CONFIG_CISS_SCSI_TAPE
525 if (strncmp(ENGAGE_SCSI, buffer, sizeof ENGAGE_SCSI - 1) == 0) {
526 struct seq_file *seq = file->private_data;
527 ctlr_info_t *h = seq->private;
89b6e743 528
f70dba83 529 err = cciss_engage_scsi(h);
8721c81f 530 if (err == 0)
89b6e743
MM		 531 err = length;
532 } else
533#endif /* CONFIG_CISS_SCSI_TAPE */
534 err = -EINVAL;
7c832835
BH		 535 /* might be nice to have "disengage" too, but it's not
536 safely possible. (only 1 module use count, lock issues.) */
89b6e743
MM		 537
538out:
539 free_page((unsigned long)buffer);
540 return err;
1da177e4
LT		 541}
542
828c0950 543static const struct file_operations cciss_proc_fops = {
89b6e743
MM		 544 .owner = THIS_MODULE,
545 .open = cciss_seq_open,
546 .read = seq_read,
547 .llseek = seq_lseek,
548 .release = seq_release,
549 .write = cciss_proc_write,
550};
551
f70dba83 552static void __devinit cciss_procinit(ctlr_info_t *h)
1da177e4
LT		 553{
554 struct proc_dir_entry *pde;
555
89b6e743 556 if (proc_cciss == NULL)
928b4d8c 557 proc_cciss = proc_mkdir("driver/cciss", NULL);
89b6e743
MM		 558 if (!proc_cciss)
559 return;
f70dba83 560 pde = proc_create_data(h->devname, S_IWUSR | S_IRUSR | S_IRGRP |
89b6e743 561 S_IROTH, proc_cciss,
f70dba83 562 &cciss_proc_fops, h);
1da177e4 563}
7c832835 564#endif /* CONFIG_PROC_FS */
1da177e4 565
7fe06326
AP		 566#define MAX_PRODUCT_NAME_LEN 19
567
568#define to_hba(n) container_of(n, struct ctlr_info, dev)
569#define to_drv(n) container_of(n, drive_info_struct, dev)
570
ec52d5f1 571/* List of controllers which cannot be hard reset on kexec with reset_devices */
957c2ec5
SC		 572static u32 unresettable_controller[] = {
573 0x324a103C, /* Smart Array P712m */
574 0x324b103C, /* SmartArray P711m */
575 0x3223103C, /* Smart Array P800 */
576 0x3234103C, /* Smart Array P400 */
577 0x3235103C, /* Smart Array P400i */
578 0x3211103C, /* Smart Array E200i */
579 0x3212103C, /* Smart Array E200 */
580 0x3213103C, /* Smart Array E200i */
581 0x3214103C, /* Smart Array E200i */
582 0x3215103C, /* Smart Array E200i */
583 0x3237103C, /* Smart Array E500 */
584 0x323D103C, /* Smart Array P700m */
585 0x409C0E11, /* Smart Array 6400 */
586 0x409D0E11, /* Smart Array 6400 EM */
587};
588
ec52d5f1
SC		 589/* List of controllers which cannot even be soft reset */
590static u32 soft_unresettable_controller[] = {
591 0x409C0E11, /* Smart Array 6400 */
592 0x409D0E11, /* Smart Array 6400 EM */
593};
594
595static int ctlr_is_hard_resettable(u32 board_id)
957c2ec5
SC		 596{
597 int i;
598
599 for (i = 0; i < ARRAY_SIZE(unresettable_controller); i++)
ec52d5f1 600 if (unresettable_controller[i] == board_id)
957c2ec5
SC		 601 return 0;
602 return 1;
603}
604
ec52d5f1
SC		 605static int ctlr_is_soft_resettable(u32 board_id)
606{
607 int i;
608
609 for (i = 0; i < ARRAY_SIZE(soft_unresettable_controller); i++)
610 if (soft_unresettable_controller[i] == board_id)
611 return 0;
612 return 1;
613}
614
615static int ctlr_is_resettable(u32 board_id)
616{
617 return ctlr_is_hard_resettable(board_id) ||
618 ctlr_is_soft_resettable(board_id);
619}
620
957c2ec5
SC		 621static ssize_t host_show_resettable(struct device *dev,
622 struct device_attribute *attr,
623 char *buf)
624{
625 struct ctlr_info *h = to_hba(dev);
626
ec52d5f1 627 return snprintf(buf, 20, "%d\n", ctlr_is_resettable(h->board_id));
957c2ec5
SC		 628}
629static DEVICE_ATTR(resettable, S_IRUGO, host_show_resettable, NULL);
630
d6f4965d
AP		 631static ssize_t host_store_rescan(struct device *dev,
632 struct device_attribute *attr,
633 const char *buf, size_t count)
634{
635 struct ctlr_info *h = to_hba(dev);
636
637 add_to_scan_list(h);
638 wake_up_process(cciss_scan_thread);
639 wait_for_completion_interruptible(&h->scan_wait);
640
641 return count;
642}
8ba95c69 643static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan);
7fe06326 644
f963d270
JH		 645static ssize_t host_show_transport_mode(struct device *dev,
646 struct device_attribute *attr,
647 char *buf)
648{
649 struct ctlr_info *h = to_hba(dev);
650
651 return snprintf(buf, 20, "%s\n",
652 h->transMethod & CFGTBL_Trans_Performant ?
653 "performant" : "simple");
654}
655static DEVICE_ATTR(transport_mode, S_IRUGO, host_show_transport_mode, NULL);
656
7fe06326
AP		 657static ssize_t dev_show_unique_id(struct device *dev,
658 struct device_attribute *attr,
659 char *buf)
660{
661 drive_info_struct *drv = to_drv(dev);
662 struct ctlr_info *h = to_hba(drv->dev.parent);
663 __u8 sn[16];
664 unsigned long flags;
665 int ret = 0;
666
f70dba83 667 spin_lock_irqsave(&h->lock, flags);
7fe06326
AP		 668 if (h->busy_configuring)
669 ret = -EBUSY;
670 else
671 memcpy(sn, drv->serial_no, sizeof(sn));
f70dba83 672 spin_unlock_irqrestore(&h->lock, flags);
7fe06326
AP		 673
674 if (ret)
675 return ret;
676 else
677 return snprintf(buf, 16 * 2 + 2,
678 "%02X%02X%02X%02X%02X%02X%02X%02X"
679 "%02X%02X%02X%02X%02X%02X%02X%02X\n",
680 sn[0], sn[1], sn[2], sn[3],
681 sn[4], sn[5], sn[6], sn[7],
682 sn[8], sn[9], sn[10], sn[11],
683 sn[12], sn[13], sn[14], sn[15]);
684}
8ba95c69 685static DEVICE_ATTR(unique_id, S_IRUGO, dev_show_unique_id, NULL);
7fe06326
AP		 686
687static ssize_t dev_show_vendor(struct device *dev,
688 struct device_attribute *attr,
689 char *buf)
690{
691 drive_info_struct *drv = to_drv(dev);
692 struct ctlr_info *h = to_hba(drv->dev.parent);
693 char vendor[VENDOR_LEN + 1];
694 unsigned long flags;
695 int ret = 0;
696
f70dba83 697 spin_lock_irqsave(&h->lock, flags);
7fe06326
AP		 698 if (h->busy_configuring)
699 ret = -EBUSY;
700 else
701 memcpy(vendor, drv->vendor, VENDOR_LEN + 1);
f70dba83 702 spin_unlock_irqrestore(&h->lock, flags);
7fe06326
AP		 703
704 if (ret)
705 return ret;
706 else
707 return snprintf(buf, sizeof(vendor) + 1, "%s\n", drv->vendor);
708}
8ba95c69 709static DEVICE_ATTR(vendor, S_IRUGO, dev_show_vendor, NULL);
7fe06326
AP		 710
711static ssize_t dev_show_model(struct device *dev,
712 struct device_attribute *attr,
713 char *buf)
714{
715 drive_info_struct *drv = to_drv(dev);
716 struct ctlr_info *h = to_hba(drv->dev.parent);
717 char model[MODEL_LEN + 1];
718 unsigned long flags;
719 int ret = 0;
720
f70dba83 721 spin_lock_irqsave(&h->lock, flags);
7fe06326
AP		 722 if (h->busy_configuring)
723 ret = -EBUSY;
724 else
725 memcpy(model, drv->model, MODEL_LEN + 1);
f70dba83 726 spin_unlock_irqrestore(&h->lock, flags);
7fe06326
AP		 727
728 if (ret)
729 return ret;
730 else
731 return snprintf(buf, sizeof(model) + 1, "%s\n", drv->model);
732}
8ba95c69 733static DEVICE_ATTR(model, S_IRUGO, dev_show_model, NULL);
7fe06326
AP		 734
735static ssize_t dev_show_rev(struct device *dev,
736 struct device_attribute *attr,
737 char *buf)
738{
739 drive_info_struct *drv = to_drv(dev);
740 struct ctlr_info *h = to_hba(drv->dev.parent);
741 char rev[REV_LEN + 1];
742 unsigned long flags;
743 int ret = 0;
744
f70dba83 745 spin_lock_irqsave(&h->lock, flags);
7fe06326
AP		 746 if (h->busy_configuring)
747 ret = -EBUSY;
748 else
749 memcpy(rev, drv->rev, REV_LEN + 1);
f70dba83 750 spin_unlock_irqrestore(&h->lock, flags);
7fe06326
AP		 751
752 if (ret)
753 return ret;
754 else
755 return snprintf(buf, sizeof(rev) + 1, "%s\n", drv->rev);
756}
8ba95c69 757static DEVICE_ATTR(rev, S_IRUGO, dev_show_rev, NULL);
7fe06326 758
ce84a8ae
SC		 759static ssize_t cciss_show_lunid(struct device *dev,
760 struct device_attribute *attr, char *buf)
761{
9cef0d2f
SC		 762 drive_info_struct *drv = to_drv(dev);
763 struct ctlr_info *h = to_hba(drv->dev.parent);
ce84a8ae
SC		 764 unsigned long flags;
765 unsigned char lunid[8];
766
f70dba83 767 spin_lock_irqsave(&h->lock, flags);
ce84a8ae 768 if (h->busy_configuring) {
f70dba83 769 spin_unlock_irqrestore(&h->lock, flags);
ce84a8ae
SC		 770 return -EBUSY;
771 }
772 if (!drv->heads) {
f70dba83 773 spin_unlock_irqrestore(&h->lock, flags);
ce84a8ae
SC		 774 return -ENOTTY;
775 }
776 memcpy(lunid, drv->LunID, sizeof(lunid));
f70dba83 777 spin_unlock_irqrestore(&h->lock, flags);
ce84a8ae
SC		 778 return snprintf(buf, 20, "0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
779 lunid[0], lunid[1], lunid[2], lunid[3],
780 lunid[4], lunid[5], lunid[6], lunid[7]);
781}
8ba95c69 782static DEVICE_ATTR(lunid, S_IRUGO, cciss_show_lunid, NULL);
ce84a8ae 783
3ff1111d
SC		 784static ssize_t cciss_show_raid_level(struct device *dev,
785 struct device_attribute *attr, char *buf)
786{
9cef0d2f
SC		 787 drive_info_struct *drv = to_drv(dev);
788 struct ctlr_info *h = to_hba(drv->dev.parent);
3ff1111d
SC		 789 int raid;
790 unsigned long flags;
791
f70dba83 792 spin_lock_irqsave(&h->lock, flags);
3ff1111d 793 if (h->busy_configuring) {
f70dba83 794 spin_unlock_irqrestore(&h->lock, flags);
3ff1111d
SC		 795 return -EBUSY;
796 }
797 raid = drv->raid_level;
f70dba83 798 spin_unlock_irqrestore(&h->lock, flags);
3ff1111d
SC		 799 if (raid < 0 || raid > RAID_UNKNOWN)
800 raid = RAID_UNKNOWN;
801
802 return snprintf(buf, strlen(raid_label[raid]) + 7, "RAID %s\n",
803 raid_label[raid]);
804}
8ba95c69 805static DEVICE_ATTR(raid_level, S_IRUGO, cciss_show_raid_level, NULL);
3ff1111d 806
e272afec
SC		 807static ssize_t cciss_show_usage_count(struct device *dev,
808 struct device_attribute *attr, char *buf)
809{
9cef0d2f
SC		 810 drive_info_struct *drv = to_drv(dev);
811 struct ctlr_info *h = to_hba(drv->dev.parent);
e272afec
SC		 812 unsigned long flags;
813 int count;
814
f70dba83 815 spin_lock_irqsave(&h->lock, flags);
e272afec 816 if (h->busy_configuring) {
f70dba83 817 spin_unlock_irqrestore(&h->lock, flags);
e272afec
SC		 818 return -EBUSY;
819 }
820 count = drv->usage_count;
f70dba83 821 spin_unlock_irqrestore(&h->lock, flags);
e272afec
SC		 822 return snprintf(buf, 20, "%d\n", count);
823}
8ba95c69 824static DEVICE_ATTR(usage_count, S_IRUGO, cciss_show_usage_count, NULL);
e272afec 825
d6f4965d
AP		 826static struct attribute *cciss_host_attrs[] = {
827 &dev_attr_rescan.attr,
957c2ec5 828 &dev_attr_resettable.attr,
f963d270 829 &dev_attr_transport_mode.attr,
d6f4965d
AP		 830 NULL
831};
832
833static struct attribute_group cciss_host_attr_group = {
834 .attrs = cciss_host_attrs,
835};
836
9f792d9f 837static const struct attribute_group *cciss_host_attr_groups[] = {
d6f4965d
AP		 838 &cciss_host_attr_group,
839 NULL
840};
841
842static struct device_type cciss_host_type = {
843 .name = "cciss_host",
844 .groups = cciss_host_attr_groups,
617e1344 845 .release = cciss_hba_release,
d6f4965d
AP		 846};
847
7fe06326
AP		 848static struct attribute *cciss_dev_attrs[] = {
849 &dev_attr_unique_id.attr,
850 &dev_attr_model.attr,
851 &dev_attr_vendor.attr,
852 &dev_attr_rev.attr,
ce84a8ae 853 &dev_attr_lunid.attr,
3ff1111d 854 &dev_attr_raid_level.attr,
e272afec 855 &dev_attr_usage_count.attr,
7fe06326
AP		 856 NULL
857};
858
859static struct attribute_group cciss_dev_attr_group = {
860 .attrs = cciss_dev_attrs,
861};
862
a4dbd674 863static const struct attribute_group *cciss_dev_attr_groups[] = {
7fe06326
AP		 864 &cciss_dev_attr_group,
865 NULL
866};
867
868static struct device_type cciss_dev_type = {
869 .name = "cciss_device",
870 .groups = cciss_dev_attr_groups,
617e1344 871 .release = cciss_device_release,
7fe06326
AP		 872};
873
874static struct bus_type cciss_bus_type = {
875 .name = "cciss",
876};
877
617e1344
SC		 878/*
879 * cciss_hba_release is called when the reference count
880 * of h->dev goes to zero.
881 */
882static void cciss_hba_release(struct device *dev)
883{
884 /*
885 * nothing to do, but need this to avoid a warning
886 * about not having a release handler from lib/kref.c.
887 */
888}
7fe06326
AP		 889
890/*
891 * Initialize sysfs entry for each controller. This sets up and registers
892 * the 'cciss#' directory for each individual controller under
893 * /sys/bus/pci/devices/<dev>/.
894 */
895static int cciss_create_hba_sysfs_entry(struct ctlr_info *h)
896{
897 device_initialize(&h->dev);
898 h->dev.type = &cciss_host_type;
899 h->dev.bus = &cciss_bus_type;
900 dev_set_name(&h->dev, "%s", h->devname);
901 h->dev.parent = &h->pdev->dev;
902
903 return device_add(&h->dev);
904}
905
906/*
907 * Remove sysfs entries for an hba.
908 */
909static void cciss_destroy_hba_sysfs_entry(struct ctlr_info *h)
910{
911 device_del(&h->dev);
617e1344
SC		 912 put_device(&h->dev); /* final put. */
913}
914
915/* cciss_device_release is called when the reference count
9cef0d2f 916 * of h->drv[x]dev goes to zero.
617e1344
SC		 917 */
918static void cciss_device_release(struct device *dev)
919{
9cef0d2f
SC		 920 drive_info_struct *drv = to_drv(dev);
921 kfree(drv);
7fe06326
AP		 922}
923
924/*
925 * Initialize sysfs for each logical drive. This sets up and registers
926 * the 'c#d#' directory for each individual logical drive under
927 * /sys/bus/pci/devices/<dev/ccis#/. We also create a link from
928 * /sys/block/cciss!c#d# to this entry.
929 */
617e1344 930static long cciss_create_ld_sysfs_entry(struct ctlr_info *h,
7fe06326
AP		 931 int drv_index)
932{
617e1344
SC		 933 struct device *dev;
934
9cef0d2f 935 if (h->drv[drv_index]->device_initialized)
8ce51966
SC		 936 return 0;
937
9cef0d2f 938 dev = &h->drv[drv_index]->dev;
617e1344
SC		 939 device_initialize(dev);
940 dev->type = &cciss_dev_type;
941 dev->bus = &cciss_bus_type;
942 dev_set_name(dev, "c%dd%d", h->ctlr, drv_index);
943 dev->parent = &h->dev;
9cef0d2f 944 h->drv[drv_index]->device_initialized = 1;
617e1344 945 return device_add(dev);
7fe06326
AP		 946}
947
948/*
949 * Remove sysfs entries for a logical drive.
950 */
8ce51966
SC		 951static void cciss_destroy_ld_sysfs_entry(struct ctlr_info *h, int drv_index,
952 int ctlr_exiting)
7fe06326 953{
9cef0d2f 954 struct device *dev = &h->drv[drv_index]->dev;
8ce51966
SC		 955
956 /* special case for c*d0, we only destroy it on controller exit */
957 if (drv_index == 0 && !ctlr_exiting)
958 return;
959
617e1344
SC		 960 device_del(dev);
961 put_device(dev); /* the "final" put. */
9cef0d2f 962 h->drv[drv_index] = NULL;
7fe06326
AP		 963}
964
7c832835
BH		 965/*
966 * For operations that cannot sleep, a command block is allocated at init,
1da177e4 967 * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track
6b4d96b8 968 * which ones are free or in use.
7c832835 969 */
6b4d96b8 970static CommandList_struct *cmd_alloc(ctlr_info_t *h)
1da177e4
LT		 971{
972 CommandList_struct *c;
7c832835 973 int i;
1da177e4
LT		 974 u64bit temp64;
975 dma_addr_t cmd_dma_handle, err_dma_handle;
976
6b4d96b8
SC		 977 do {
978 i = find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds);
979 if (i == h->nr_cmds)
7c832835 980 return NULL;
6b4d96b8
SC		 981 } while (test_and_set_bit(i & (BITS_PER_LONG - 1),
982 h->cmd_pool_bits + (i / BITS_PER_LONG)) != 0);
6b4d96b8
SC		 983 c = h->cmd_pool + i;
984 memset(c, 0, sizeof(CommandList_struct));
985 cmd_dma_handle = h->cmd_pool_dhandle + i * sizeof(CommandList_struct);
986 c->err_info = h->errinfo_pool + i;
987 memset(c->err_info, 0, sizeof(ErrorInfo_struct));
988 err_dma_handle = h->errinfo_pool_dhandle
989 + i * sizeof(ErrorInfo_struct);
990 h->nr_allocs++;
1da177e4 991
6b4d96b8 992 c->cmdindex = i;
33079b21 993
e6e1ee93 994 INIT_LIST_HEAD(&c->list);
6b4d96b8
SC		 995 c->busaddr = (__u32) cmd_dma_handle;
996 temp64.val = (__u64) err_dma_handle;
997 c->ErrDesc.Addr.lower = temp64.val32.lower;
998 c->ErrDesc.Addr.upper = temp64.val32.upper;
999 c->ErrDesc.Len = sizeof(ErrorInfo_struct);
7c832835 1000
6b4d96b8
SC		 1001 c->ctlr = h->ctlr;
1002 return c;
1003}
33079b21 1004
6b4d96b8
SC		 1005/* allocate a command using pci_alloc_consistent, used for ioctls,
1006 * etc., not for the main i/o path.
1007 */
1008static CommandList_struct *cmd_special_alloc(ctlr_info_t *h)
1009{
1010 CommandList_struct *c;
1011 u64bit temp64;
1012 dma_addr_t cmd_dma_handle, err_dma_handle;
1013
1014 c = (CommandList_struct *) pci_alloc_consistent(h->pdev,
1015 sizeof(CommandList_struct), &cmd_dma_handle);
1016 if (c == NULL)
1017 return NULL;
1018 memset(c, 0, sizeof(CommandList_struct));
1019
1020 c->cmdindex = -1;
1021
1022 c->err_info = (ErrorInfo_struct *)
1023 pci_alloc_consistent(h->pdev, sizeof(ErrorInfo_struct),
1024 &err_dma_handle);
1025
1026 if (c->err_info == NULL) {
1027 pci_free_consistent(h->pdev,
1028 sizeof(CommandList_struct), c, cmd_dma_handle);
1029 return NULL;
7c832835 1030 }
6b4d96b8 1031 memset(c->err_info, 0, sizeof(ErrorInfo_struct));
1da177e4 1032
e6e1ee93 1033 INIT_LIST_HEAD(&c->list);
1da177e4 1034 c->busaddr = (__u32) cmd_dma_handle;
7c832835 1035 temp64.val = (__u64) err_dma_handle;
1da177e4
LT		 1036 c->ErrDesc.Addr.lower = temp64.val32.lower;
1037 c->ErrDesc.Addr.upper = temp64.val32.upper;
1038 c->ErrDesc.Len = sizeof(ErrorInfo_struct);
1da177e4 1039
7c832835
BH		 1040 c->ctlr = h->ctlr;
1041 return c;
1da177e4
LT		 1042}
1043
6b4d96b8 1044static void cmd_free(ctlr_info_t *h, CommandList_struct *c)
1da177e4
LT		 1045{
1046 int i;
6b4d96b8
SC		 1047
1048 i = c - h->cmd_pool;
1049 clear_bit(i & (BITS_PER_LONG - 1),
1050 h->cmd_pool_bits + (i / BITS_PER_LONG));
1051 h->nr_frees++;
1052}
1053
1054static void cmd_special_free(ctlr_info_t *h, CommandList_struct *c)
1055{
1da177e4
LT		 1056 u64bit temp64;
1057
6b4d96b8
SC		 1058 temp64.val32.lower = c->ErrDesc.Addr.lower;
1059 temp64.val32.upper = c->ErrDesc.Addr.upper;
1060 pci_free_consistent(h->pdev, sizeof(ErrorInfo_struct),
1061 c->err_info, (dma_addr_t) temp64.val);
16011131
SC		 1062 pci_free_consistent(h->pdev, sizeof(CommandList_struct), c,
1063 (dma_addr_t) cciss_tag_discard_error_bits(h, (u32) c->busaddr));
1da177e4
LT		 1064}
1065
1066static inline ctlr_info_t *get_host(struct gendisk *disk)
1067{
7c832835 1068 return disk->queue->queuedata;
1da177e4
LT		 1069}
1070
1071static inline drive_info_struct *get_drv(struct gendisk *disk)
1072{
1073 return disk->private_data;
1074}
1075
1076/*
1077 * Open. Make sure the device is really there.
1078 */
ef7822c2 1079static int cciss_open(struct block_device *bdev, fmode_t mode)
1da177e4 1080{
f70dba83 1081 ctlr_info_t *h = get_host(bdev->bd_disk);
ef7822c2 1082 drive_info_struct *drv = get_drv(bdev->bd_disk);
1da177e4 1083
b2a4a43d 1084 dev_dbg(&h->pdev->dev, "cciss_open %s\n", bdev->bd_disk->disk_name);
2e043986 1085 if (drv->busy_configuring)
ddd47442 1086 return -EBUSY;
1da177e4
LT		 1087 /*
1088 * Root is allowed to open raw volume zero even if it's not configured
1089 * so array config can still work. Root is also allowed to open any
1090 * volume that has a LUN ID, so it can issue IOCTL to reread the
1091 * disk information. I don't think I really like this
1092 * but I'm already using way to many device nodes to claim another one
1093 * for "raw controller".
1094 */
7a06f789 1095 if (drv->heads == 0) {
ef7822c2 1096 if (MINOR(bdev->bd_dev) != 0) { /* not node 0? */
1da177e4 1097 /* if not node 0 make sure it is a partition = 0 */
ef7822c2 1098 if (MINOR(bdev->bd_dev) & 0x0f) {
7c832835 1099 return -ENXIO;
1da177e4 1100 /* if it is, make sure we have a LUN ID */
39ccf9a6
SC		 1101 } else if (memcmp(drv->LunID, CTLR_LUNID,
1102 sizeof(drv->LunID))) {
1da177e4
LT		 1103 return -ENXIO;
1104 }
1105 }
1106 if (!capable(CAP_SYS_ADMIN))
1107 return -EPERM;
1108 }
1109 drv->usage_count++;
f70dba83 1110 h->usage_count++;
1da177e4
LT		 1111 return 0;
1112}
7c832835 1113
6e9624b8
AB		 1114static int cciss_unlocked_open(struct block_device *bdev, fmode_t mode)
1115{
1116 int ret;
1117
2a48fc0a 1118 mutex_lock(&cciss_mutex);
6e9624b8 1119 ret = cciss_open(bdev, mode);
2a48fc0a 1120 mutex_unlock(&cciss_mutex);
6e9624b8
AB		 1121
1122 return ret;
1123}
1124
1da177e4
LT		 1125/*
1126 * Close. Sync first.
1127 */
ef7822c2 1128static int cciss_release(struct gendisk *disk, fmode_t mode)
1da177e4 1129{
f70dba83 1130 ctlr_info_t *h;
6e9624b8 1131 drive_info_struct *drv;
1da177e4 1132
2a48fc0a 1133 mutex_lock(&cciss_mutex);
f70dba83 1134 h = get_host(disk);
6e9624b8 1135 drv = get_drv(disk);
b2a4a43d 1136 dev_dbg(&h->pdev->dev, "cciss_release %s\n", disk->disk_name);
1da177e4 1137 drv->usage_count--;
f70dba83 1138 h->usage_count--;
2a48fc0a 1139 mutex_unlock(&cciss_mutex);
1da177e4
LT		 1140 return 0;
1141}
1142
ef7822c2
AV		 1143static int do_ioctl(struct block_device *bdev, fmode_t mode,
1144 unsigned cmd, unsigned long arg)
1da177e4
LT		 1145{
1146 int ret;
2a48fc0a 1147 mutex_lock(&cciss_mutex);
ef7822c2 1148 ret = cciss_ioctl(bdev, mode, cmd, arg);
2a48fc0a 1149 mutex_unlock(&cciss_mutex);
1da177e4
LT		 1150 return ret;
1151}
1152
8a6cfeb6
AB		 1153#ifdef CONFIG_COMPAT
1154
ef7822c2
AV		 1155static int cciss_ioctl32_passthru(struct block_device *bdev, fmode_t mode,
1156 unsigned cmd, unsigned long arg);
1157static int cciss_ioctl32_big_passthru(struct block_device *bdev, fmode_t mode,
1158 unsigned cmd, unsigned long arg);
1da177e4 1159
ef7822c2
AV		 1160static int cciss_compat_ioctl(struct block_device *bdev, fmode_t mode,
1161 unsigned cmd, unsigned long arg)
1da177e4
LT		 1162{
1163 switch (cmd) {
1164 case CCISS_GETPCIINFO:
1165 case CCISS_GETINTINFO:
1166 case CCISS_SETINTINFO:
1167 case CCISS_GETNODENAME:
1168 case CCISS_SETNODENAME:
1169 case CCISS_GETHEARTBEAT:
1170 case CCISS_GETBUSTYPES:
1171 case CCISS_GETFIRMVER:
1172 case CCISS_GETDRIVVER:
1173 case CCISS_REVALIDVOLS:
1174 case CCISS_DEREGDISK:
1175 case CCISS_REGNEWDISK:
1176 case CCISS_REGNEWD:
1177 case CCISS_RESCANDISK:
1178 case CCISS_GETLUNINFO:
ef7822c2 1179 return do_ioctl(bdev, mode, cmd, arg);
1da177e4
LT		 1180
1181 case CCISS_PASSTHRU32:
ef7822c2 1182 return cciss_ioctl32_passthru(bdev, mode, cmd, arg);
1da177e4 1183 case CCISS_BIG_PASSTHRU32:
ef7822c2 1184 return cciss_ioctl32_big_passthru(bdev, mode, cmd, arg);
1da177e4
LT		 1185
1186 default:
1187 return -ENOIOCTLCMD;
1188 }
1189}
1190
ef7822c2
AV		 1191static int cciss_ioctl32_passthru(struct block_device *bdev, fmode_t mode,
1192 unsigned cmd, unsigned long arg)
1da177e4
LT		 1193{
1194 IOCTL32_Command_struct __user *arg32 =
7c832835 1195 (IOCTL32_Command_struct __user *) arg;
1da177e4
LT		 1196 IOCTL_Command_struct arg64;
1197 IOCTL_Command_struct __user *p = compat_alloc_user_space(sizeof(arg64));
1198 int err;
1199 u32 cp;
1200
1201 err = 0;
7c832835
BH		 1202 err |=
1203 copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
1204 sizeof(arg64.LUN_info));
1205 err |=
1206 copy_from_user(&arg64.Request, &arg32->Request,
1207 sizeof(arg64.Request));
1208 err |=
1209 copy_from_user(&arg64.error_info, &arg32->error_info,
1210 sizeof(arg64.error_info));
1da177e4
LT		 1211 err |= get_user(arg64.buf_size, &arg32->buf_size);
1212 err |= get_user(cp, &arg32->buf);
1213 arg64.buf = compat_ptr(cp);
1214 err |= copy_to_user(p, &arg64, sizeof(arg64));
1215
1216 if (err)
1217 return -EFAULT;
1218
ef7822c2 1219 err = do_ioctl(bdev, mode, CCISS_PASSTHRU, (unsigned long)p);
1da177e4
LT		 1220 if (err)
1221 return err;
7c832835
BH		 1222 err |=
1223 copy_in_user(&arg32->error_info, &p->error_info,
1224 sizeof(arg32->error_info));
1da177e4
LT		 1225 if (err)
1226 return -EFAULT;
1227 return err;
1228}
1229
ef7822c2
AV		 1230static int cciss_ioctl32_big_passthru(struct block_device *bdev, fmode_t mode,
1231 unsigned cmd, unsigned long arg)
1da177e4
LT		 1232{
1233 BIG_IOCTL32_Command_struct __user *arg32 =
7c832835 1234 (BIG_IOCTL32_Command_struct __user *) arg;
1da177e4 1235 BIG_IOCTL_Command_struct arg64;
7c832835
BH		 1236 BIG_IOCTL_Command_struct __user *p =
1237 compat_alloc_user_space(sizeof(arg64));
1da177e4
LT		 1238 int err;
1239 u32 cp;
1240
7ab5118d 1241 memset(&arg64, 0, sizeof(arg64));
1da177e4 1242 err = 0;
7c832835
BH		 1243 err |=
1244 copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
1245 sizeof(arg64.LUN_info));
1246 err |=
1247 copy_from_user(&arg64.Request, &arg32->Request,
1248 sizeof(arg64.Request));
1249 err |=
1250 copy_from_user(&arg64.error_info, &arg32->error_info,
1251 sizeof(arg64.error_info));
1da177e4
LT		 1252 err |= get_user(arg64.buf_size, &arg32->buf_size);
1253 err |= get_user(arg64.malloc_size, &arg32->malloc_size);
1254 err |= get_user(cp, &arg32->buf);
1255 arg64.buf = compat_ptr(cp);
1256 err |= copy_to_user(p, &arg64, sizeof(arg64));
1257
1258 if (err)
7c832835 1259 return -EFAULT;
1da177e4 1260
ef7822c2 1261 err = do_ioctl(bdev, mode, CCISS_BIG_PASSTHRU, (unsigned long)p);
1da177e4
LT		 1262 if (err)
1263 return err;
7c832835
BH		 1264 err |=
1265 copy_in_user(&arg32->error_info, &p->error_info,
1266 sizeof(arg32->error_info));
1da177e4
LT		 1267 if (err)
1268 return -EFAULT;
1269 return err;
1270}
1271#endif
a885c8c4
CH		 1272
1273static int cciss_getgeo(struct block_device *bdev, struct hd_geometry *geo)
1274{
1275 drive_info_struct *drv = get_drv(bdev->bd_disk);
1276
1277 if (!drv->cylinders)
1278 return -ENXIO;
1279
1280 geo->heads = drv->heads;
1281 geo->sectors = drv->sectors;
1282 geo->cylinders = drv->cylinders;
1283 return 0;
1284}
1285
f70dba83 1286static void check_ioctl_unit_attention(ctlr_info_t *h, CommandList_struct *c)
0a9279cc
MM		 1287{
1288 if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
1289 c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION)
f70dba83 1290 (void)check_for_unit_attention(h, c);
0a9279cc 1291}
0a25a5ae
SC		 1292
1293static int cciss_getpciinfo(ctlr_info_t *h, void __user *argp)
1da177e4 1294{
0a25a5ae 1295 cciss_pci_info_struct pciinfo;
1da177e4 1296
0a25a5ae
SC		 1297 if (!argp)
1298 return -EINVAL;
1299 pciinfo.domain = pci_domain_nr(h->pdev->bus);
1300 pciinfo.bus = h->pdev->bus->number;
1301 pciinfo.dev_fn = h->pdev->devfn;
1302 pciinfo.board_id = h->board_id;
1303 if (copy_to_user(argp, &pciinfo, sizeof(cciss_pci_info_struct)))
1304 return -EFAULT;
1305 return 0;
1306}
1da177e4 1307
576e661c
SC		 1308static int cciss_getintinfo(ctlr_info_t *h, void __user *argp)
1309{
1310 cciss_coalint_struct intinfo;
1da177e4 1311
576e661c
SC		 1312 if (!argp)
1313 return -EINVAL;
1314 intinfo.delay = readl(&h->cfgtable->HostWrite.CoalIntDelay);
1315 intinfo.count = readl(&h->cfgtable->HostWrite.CoalIntCount);
1316 if (copy_to_user
1317 (argp, &intinfo, sizeof(cciss_coalint_struct)))
1318 return -EFAULT;
1319 return 0;
1320}
1da177e4 1321
4c800eed
SC		 1322static int cciss_setintinfo(ctlr_info_t *h, void __user *argp)
1323{
1324 cciss_coalint_struct intinfo;
1325 unsigned long flags;
1326 int i;
1da177e4 1327
4c800eed
SC		 1328 if (!argp)
1329 return -EINVAL;
1330 if (!capable(CAP_SYS_ADMIN))
1331 return -EPERM;
1332 if (copy_from_user(&intinfo, argp, sizeof(intinfo)))
1333 return -EFAULT;
1334 if ((intinfo.delay == 0) && (intinfo.count == 0))
1335 return -EINVAL;
1336 spin_lock_irqsave(&h->lock, flags);
1337 /* Update the field, and then ring the doorbell */
1338 writel(intinfo.delay, &(h->cfgtable->HostWrite.CoalIntDelay));
1339 writel(intinfo.count, &(h->cfgtable->HostWrite.CoalIntCount));
1340 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
1341
1342 for (i = 0; i < MAX_IOCTL_CONFIG_WAIT; i++) {
1343 if (!(readl(h->vaddr + SA5_DOORBELL) & CFGTBL_ChangeReq))
1344 break;
1345 udelay(1000); /* delay and try again */
1346 }
1347 spin_unlock_irqrestore(&h->lock, flags);
1348 if (i >= MAX_IOCTL_CONFIG_WAIT)
1349 return -EAGAIN;
1350 return 0;
1351}
1da177e4 1352
25216109
SC		 1353static int cciss_getnodename(ctlr_info_t *h, void __user *argp)
1354{
1355 NodeName_type NodeName;
1356 int i;
1da177e4 1357
25216109
SC		 1358 if (!argp)
1359 return -EINVAL;
1360 for (i = 0; i < 16; i++)
1361 NodeName[i] = readb(&h->cfgtable->ServerName[i]);
1362 if (copy_to_user(argp, NodeName, sizeof(NodeName_type)))
1363 return -EFAULT;
1364 return 0;
1365}
7c832835 1366
4f43f32c
SC		 1367static int cciss_setnodename(ctlr_info_t *h, void __user *argp)
1368{
1369 NodeName_type NodeName;
1370 unsigned long flags;
1371 int i;
7c832835 1372
4f43f32c
SC		 1373 if (!argp)
1374 return -EINVAL;
1375 if (!capable(CAP_SYS_ADMIN))
1376 return -EPERM;
1377 if (copy_from_user(NodeName, argp, sizeof(NodeName_type)))
1378 return -EFAULT;
1379 spin_lock_irqsave(&h->lock, flags);
1380 /* Update the field, and then ring the doorbell */
1381 for (i = 0; i < 16; i++)
1382 writeb(NodeName[i], &h->cfgtable->ServerName[i]);
1383 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
1384 for (i = 0; i < MAX_IOCTL_CONFIG_WAIT; i++) {
1385 if (!(readl(h->vaddr + SA5_DOORBELL) & CFGTBL_ChangeReq))
1386 break;
1387 udelay(1000); /* delay and try again */
1388 }
1389 spin_unlock_irqrestore(&h->lock, flags);
1390 if (i >= MAX_IOCTL_CONFIG_WAIT)
1391 return -EAGAIN;
1392 return 0;
1393}
7c832835 1394
93c74931
SC		 1395static int cciss_getheartbeat(ctlr_info_t *h, void __user *argp)
1396{
1397 Heartbeat_type heartbeat;
7c832835 1398
93c74931
SC		 1399 if (!argp)
1400 return -EINVAL;
1401 heartbeat = readl(&h->cfgtable->HeartBeat);
1402 if (copy_to_user(argp, &heartbeat, sizeof(Heartbeat_type)))
1403 return -EFAULT;
1404 return 0;
1405}
0a9279cc 1406
d18dfad4
SC		 1407static int cciss_getbustypes(ctlr_info_t *h, void __user *argp)
1408{
1409 BusTypes_type BusTypes;
7c832835 1410
d18dfad4
SC		 1411 if (!argp)
1412 return -EINVAL;
1413 BusTypes = readl(&h->cfgtable->BusTypes);
1414 if (copy_to_user(argp, &BusTypes, sizeof(BusTypes_type)))
1415 return -EFAULT;
1416 return 0;
1417}
1418
8a4f7fbf
SC		 1419static int cciss_getfirmver(ctlr_info_t *h, void __user *argp)
1420{
1421 FirmwareVer_type firmware;
1422
1423 if (!argp)
1424 return -EINVAL;
1425 memcpy(firmware, h->firm_ver, 4);
1426
1427 if (copy_to_user
1428 (argp, firmware, sizeof(FirmwareVer_type)))
1429 return -EFAULT;
1430 return 0;
1431}
1432
c525919d
SC		 1433static int cciss_getdrivver(ctlr_info_t *h, void __user *argp)
1434{
1435 DriverVer_type DriverVer = DRIVER_VERSION;
1436
1437 if (!argp)
1438 return -EINVAL;
1439 if (copy_to_user(argp, &DriverVer, sizeof(DriverVer_type)))
1440 return -EFAULT;
1441 return 0;
1442}
1443
0894b32c
SC		 1444static int cciss_getluninfo(ctlr_info_t *h,
1445 struct gendisk *disk, void __user *argp)
1446{
1447 LogvolInfo_struct luninfo;
1448 drive_info_struct *drv = get_drv(disk);
1449
1450 if (!argp)
1451 return -EINVAL;
1452 memcpy(&luninfo.LunID, drv->LunID, sizeof(luninfo.LunID));
1453 luninfo.num_opens = drv->usage_count;
1454 luninfo.num_parts = 0;
1455 if (copy_to_user(argp, &luninfo, sizeof(LogvolInfo_struct)))
1456 return -EFAULT;
1457 return 0;
1458}
1459
f32f125b
SC		 1460static int cciss_passthru(ctlr_info_t *h, void __user *argp)
1461{
1462 IOCTL_Command_struct iocommand;
1463 CommandList_struct *c;
1464 char *buff = NULL;
1465 u64bit temp64;
1466 DECLARE_COMPLETION_ONSTACK(wait);
1467
1468 if (!argp)
1469 return -EINVAL;
1470
1471 if (!capable(CAP_SYS_RAWIO))
1472 return -EPERM;
1473
1474 if (copy_from_user
1475 (&iocommand, argp, sizeof(IOCTL_Command_struct)))
1476 return -EFAULT;
1477 if ((iocommand.buf_size < 1) &&
1478 (iocommand.Request.Type.Direction != XFER_NONE)) {
1479 return -EINVAL;
1480 }
1481 if (iocommand.buf_size > 0) {
1482 buff = kmalloc(iocommand.buf_size, GFP_KERNEL);
1483 if (buff == NULL)
1484 return -EFAULT;
1485 }
1486 if (iocommand.Request.Type.Direction == XFER_WRITE) {
1487 /* Copy the data into the buffer we created */
1488 if (copy_from_user(buff, iocommand.buf, iocommand.buf_size)) {
1489 kfree(buff);
1490 return -EFAULT;
1491 }
1492 } else {
1493 memset(buff, 0, iocommand.buf_size);
1494 }
1495 c = cmd_special_alloc(h);
1496 if (!c) {
1497 kfree(buff);
1498 return -ENOMEM;
1499 }
1500 /* Fill in the command type */
1501 c->cmd_type = CMD_IOCTL_PEND;
1502 /* Fill in Command Header */
1503 c->Header.ReplyQueue = 0; /* unused in simple mode */
1504 if (iocommand.buf_size > 0) { /* buffer to fill */
1505 c->Header.SGList = 1;
1506 c->Header.SGTotal = 1;
1507 } else { /* no buffers to fill */
1508 c->Header.SGList = 0;
1509 c->Header.SGTotal = 0;
1510 }
1511 c->Header.LUN = iocommand.LUN_info;
1512 /* use the kernel address the cmd block for tag */
1513 c->Header.Tag.lower = c->busaddr;
1514
1515 /* Fill in Request block */
1516 c->Request = iocommand.Request;
1517
1518 /* Fill in the scatter gather information */
1519 if (iocommand.buf_size > 0) {
1520 temp64.val = pci_map_single(h->pdev, buff,
1521 iocommand.buf_size, PCI_DMA_BIDIRECTIONAL);
1522 c->SG[0].Addr.lower = temp64.val32.lower;
1523 c->SG[0].Addr.upper = temp64.val32.upper;
1524 c->SG[0].Len = iocommand.buf_size;
1525 c->SG[0].Ext = 0; /* we are not chaining */
1526 }
1527 c->waiting = &wait;
1528
1529 enqueue_cmd_and_start_io(h, c);
1530 wait_for_completion(&wait);
1531
1532 /* unlock the buffers from DMA */
1533 temp64.val32.lower = c->SG[0].Addr.lower;
1534 temp64.val32.upper = c->SG[0].Addr.upper;
1535 pci_unmap_single(h->pdev, (dma_addr_t) temp64.val, iocommand.buf_size,
1536 PCI_DMA_BIDIRECTIONAL);
1537 check_ioctl_unit_attention(h, c);
1538
1539 /* Copy the error information out */
1540 iocommand.error_info = *(c->err_info);
1541 if (copy_to_user(argp, &iocommand, sizeof(IOCTL_Command_struct))) {
1542 kfree(buff);
1543 cmd_special_free(h, c);
1544 return -EFAULT;
1545 }
1546
1547 if (iocommand.Request.Type.Direction == XFER_READ) {
1548 /* Copy the data out of the buffer we created */
1549 if (copy_to_user(iocommand.buf, buff, iocommand.buf_size)) {
7c832835 1550 kfree(buff);
6b4d96b8 1551 cmd_special_free(h, c);
f32f125b 1552 return -EFAULT;
1da177e4 1553 }
f32f125b
SC		 1554 }
1555 kfree(buff);
1556 cmd_special_free(h, c);
1557 return 0;
1558}
1559
0c9f5ba7
SC		 1560static int cciss_bigpassthru(ctlr_info_t *h, void __user *argp)
1561{
1562 BIG_IOCTL_Command_struct *ioc;
1563 CommandList_struct *c;
1564 unsigned char **buff = NULL;
1565 int *buff_size = NULL;
1566 u64bit temp64;
1567 BYTE sg_used = 0;
1568 int status = 0;
1569 int i;
1570 DECLARE_COMPLETION_ONSTACK(wait);
1571 __u32 left;
1572 __u32 sz;
1573 BYTE __user *data_ptr;
1574
1575 if (!argp)
1576 return -EINVAL;
1577 if (!capable(CAP_SYS_RAWIO))
1578 return -EPERM;
fcab1c11 1579 ioc = kmalloc(sizeof(*ioc), GFP_KERNEL);
0c9f5ba7
SC		 1580 if (!ioc) {
1581 status = -ENOMEM;
1582 goto cleanup1;
1583 }
1584 if (copy_from_user(ioc, argp, sizeof(*ioc))) {
1585 status = -EFAULT;
1586 goto cleanup1;
1587 }
1588 if ((ioc->buf_size < 1) &&
1589 (ioc->Request.Type.Direction != XFER_NONE)) {
1590 status = -EINVAL;
1591 goto cleanup1;
1592 }
1593 /* Check kmalloc limits using all SGs */
1594 if (ioc->malloc_size > MAX_KMALLOC_SIZE) {
1595 status = -EINVAL;
1596 goto cleanup1;
1597 }
1598 if (ioc->buf_size > ioc->malloc_size * MAXSGENTRIES) {
1599 status = -EINVAL;
1600 goto cleanup1;
1601 }
1602 buff = kzalloc(MAXSGENTRIES * sizeof(char *), GFP_KERNEL);
1603 if (!buff) {
1604 status = -ENOMEM;
1605 goto cleanup1;
1606 }
1607 buff_size = kmalloc(MAXSGENTRIES * sizeof(int), GFP_KERNEL);
1608 if (!buff_size) {
1609 status = -ENOMEM;
1610 goto cleanup1;
1611 }
1612 left = ioc->buf_size;
1613 data_ptr = ioc->buf;
1614 while (left) {
1615 sz = (left > ioc->malloc_size) ? ioc->malloc_size : left;
1616 buff_size[sg_used] = sz;
1617 buff[sg_used] = kmalloc(sz, GFP_KERNEL);
1618 if (buff[sg_used] == NULL) {
1619 status = -ENOMEM;
1620 goto cleanup1;
1621 }
1622 if (ioc->Request.Type.Direction == XFER_WRITE) {
1623 if (copy_from_user(buff[sg_used], data_ptr, sz)) {
7c832835
BH		 1624 status = -EFAULT;
1625 goto cleanup1;
1626 }
0c9f5ba7
SC		 1627 } else {
1628 memset(buff[sg_used], 0, sz);
1629 }
1630 left -= sz;
1631 data_ptr += sz;
1632 sg_used++;
1633 }
1634 c = cmd_special_alloc(h);
1635 if (!c) {
1636 status = -ENOMEM;
1637 goto cleanup1;
1638 }
1639 c->cmd_type = CMD_IOCTL_PEND;
1640 c->Header.ReplyQueue = 0;
fcfb5c0c
SC		 1641 c->Header.SGList = sg_used;
1642 c->Header.SGTotal = sg_used;
0c9f5ba7
SC		 1643 c->Header.LUN = ioc->LUN_info;
1644 c->Header.Tag.lower = c->busaddr;
1645
1646 c->Request = ioc->Request;
fcfb5c0c
SC		 1647 for (i = 0; i < sg_used; i++) {
1648 temp64.val = pci_map_single(h->pdev, buff[i], buff_size[i],
0c9f5ba7 1649 PCI_DMA_BIDIRECTIONAL);
fcfb5c0c
SC		 1650 c->SG[i].Addr.lower = temp64.val32.lower;
1651 c->SG[i].Addr.upper = temp64.val32.upper;
1652 c->SG[i].Len = buff_size[i];
1653 c->SG[i].Ext = 0; /* we are not chaining */
0c9f5ba7
SC		 1654 }
1655 c->waiting = &wait;
1656 enqueue_cmd_and_start_io(h, c);
1657 wait_for_completion(&wait);
1658 /* unlock the buffers from DMA */
1659 for (i = 0; i < sg_used; i++) {
1660 temp64.val32.lower = c->SG[i].Addr.lower;
1661 temp64.val32.upper = c->SG[i].Addr.upper;
1662 pci_unmap_single(h->pdev,
1663 (dma_addr_t) temp64.val, buff_size[i],
1664 PCI_DMA_BIDIRECTIONAL);
1665 }
1666 check_ioctl_unit_attention(h, c);
1667 /* Copy the error information out */
1668 ioc->error_info = *(c->err_info);
1669 if (copy_to_user(argp, ioc, sizeof(*ioc))) {
1670 cmd_special_free(h, c);
1671 status = -EFAULT;
1672 goto cleanup1;
1673 }
1674 if (ioc->Request.Type.Direction == XFER_READ) {
1675 /* Copy the data out of the buffer we created */
1676 BYTE __user *ptr = ioc->buf;
1677 for (i = 0; i < sg_used; i++) {
1678 if (copy_to_user(ptr, buff[i], buff_size[i])) {
6b4d96b8 1679 cmd_special_free(h, c);
7c832835
BH		 1680 status = -EFAULT;
1681 goto cleanup1;
1682 }
0c9f5ba7 1683 ptr += buff_size[i];
1da177e4 1684 }
0c9f5ba7
SC		 1685 }
1686 cmd_special_free(h, c);
1687 status = 0;
1688cleanup1:
1689 if (buff) {
1690 for (i = 0; i < sg_used; i++)
1691 kfree(buff[i]);
1692 kfree(buff);
1693 }
1694 kfree(buff_size);
1695 kfree(ioc);
1696 return status;
1697}
1698
ef7822c2 1699static int cciss_ioctl(struct block_device *bdev, fmode_t mode,
c525919d 1700 unsigned int cmd, unsigned long arg)
1da177e4 1701{
1da177e4 1702 struct gendisk *disk = bdev->bd_disk;
f70dba83 1703 ctlr_info_t *h = get_host(disk);
1da177e4
LT		 1704 void __user *argp = (void __user *)arg;
1705
b2a4a43d
SC		 1706 dev_dbg(&h->pdev->dev, "cciss_ioctl: Called with cmd=%x %lx\n",
1707 cmd, arg);
7c832835 1708 switch (cmd) {
1da177e4 1709 case CCISS_GETPCIINFO:
0a25a5ae 1710 return cciss_getpciinfo(h, argp);
1da177e4 1711 case CCISS_GETINTINFO:
576e661c 1712 return cciss_getintinfo(h, argp);
1da177e4 1713 case CCISS_SETINTINFO:
4c800eed 1714 return cciss_setintinfo(h, argp);
1da177e4 1715 case CCISS_GETNODENAME:
25216109 1716 return cciss_getnodename(h, argp);
1da177e4 1717 case CCISS_SETNODENAME:
4f43f32c 1718 return cciss_setnodename(h, argp);
1da177e4 1719 case CCISS_GETHEARTBEAT:
93c74931 1720 return cciss_getheartbeat(h, argp);
1da177e4 1721 case CCISS_GETBUSTYPES:
d18dfad4 1722 return cciss_getbustypes(h, argp);
1da177e4 1723 case CCISS_GETFIRMVER:
8a4f7fbf 1724 return cciss_getfirmver(h, argp);
7c832835 1725 case CCISS_GETDRIVVER:
c525919d 1726 return cciss_getdrivver(h, argp);
6ae5ce8e
MM		 1727 case CCISS_DEREGDISK:
1728 case CCISS_REGNEWD:
1da177e4 1729 case CCISS_REVALIDVOLS:
f70dba83 1730 return rebuild_lun_table(h, 0, 1);
0894b32c
SC		 1731 case CCISS_GETLUNINFO:
1732 return cciss_getluninfo(h, disk, argp);
1da177e4 1733 case CCISS_PASSTHRU:
f32f125b 1734 return cciss_passthru(h, argp);
0c9f5ba7
SC		 1735 case CCISS_BIG_PASSTHRU:
1736 return cciss_bigpassthru(h, argp);
03bbfee5
MMOD		 1737
1738 /* scsi_cmd_ioctl handles these, below, though some are not */
1739 /* very meaningful for cciss. SG_IO is the main one people want. */
1740
1741 case SG_GET_VERSION_NUM:
1742 case SG_SET_TIMEOUT:
1743 case SG_GET_TIMEOUT:
1744 case SG_GET_RESERVED_SIZE:
1745 case SG_SET_RESERVED_SIZE:
1746 case SG_EMULATED_HOST:
1747 case SG_IO:
1748 case SCSI_IOCTL_SEND_COMMAND:
ef7822c2 1749 return scsi_cmd_ioctl(disk->queue, disk, mode, cmd, argp);
03bbfee5
MMOD		 1750
1751 /* scsi_cmd_ioctl would normally handle these, below, but */
1752 /* they aren't a good fit for cciss, as CD-ROMs are */
1753 /* not supported, and we don't have any bus/target/lun */
1754 /* which we present to the kernel. */
1755
1756 case CDROM_SEND_PACKET:
1757 case CDROMCLOSETRAY:
1758 case CDROMEJECT:
1759 case SCSI_IOCTL_GET_IDLUN:
1760 case SCSI_IOCTL_GET_BUS_NUMBER:
1da177e4
LT		 1761 default:
1762 return -ENOTTY;
1763 }
1da177e4
LT		 1764}
1765
7b30f092
JA		 1766static void cciss_check_queues(ctlr_info_t *h)
1767{
1768 int start_queue = h->next_to_run;
1769 int i;
1770
1771 /* check to see if we have maxed out the number of commands that can
1772 * be placed on the queue. If so then exit. We do this check here
1773 * in case the interrupt we serviced was from an ioctl and did not
1774 * free any new commands.
1775 */
f880632f 1776 if ((find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds)) == h->nr_cmds)
7b30f092
JA		 1777 return;
1778
1779 /* We have room on the queue for more commands. Now we need to queue
1780 * them up. We will also keep track of the next queue to run so
1781 * that every queue gets a chance to be started first.
1782 */
1783 for (i = 0; i < h->highest_lun + 1; i++) {
1784 int curr_queue = (start_queue + i) % (h->highest_lun + 1);
1785 /* make sure the disk has been added and the drive is real
1786 * because this can be called from the middle of init_one.
1787 */
9cef0d2f
SC		 1788 if (!h->drv[curr_queue])
1789 continue;
1790 if (!(h->drv[curr_queue]->queue) ||
1791 !(h->drv[curr_queue]->heads))
7b30f092
JA		 1792 continue;
1793 blk_start_queue(h->gendisk[curr_queue]->queue);
1794
1795 /* check to see if we have maxed out the number of commands
1796 * that can be placed on the queue.
1797 */
f880632f 1798 if ((find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds)) == h->nr_cmds) {
7b30f092
JA		 1799 if (curr_queue == start_queue) {
1800 h->next_to_run =
1801 (start_queue + 1) % (h->highest_lun + 1);
1802 break;
1803 } else {
1804 h->next_to_run = curr_queue;
1805 break;
1806 }
7b30f092
JA		 1807 }
1808 }
1809}
1810
ca1e0484
MM		 1811static void cciss_softirq_done(struct request *rq)
1812{
f70dba83
SC		 1813 CommandList_struct *c = rq->completion_data;
1814 ctlr_info_t *h = hba[c->ctlr];
1815 SGDescriptor_struct *curr_sg = c->SG;
ca1e0484 1816 u64bit temp64;
664a717d 1817 unsigned long flags;
ca1e0484 1818 int i, ddir;
5c07a311 1819 int sg_index = 0;
ca1e0484 1820
f70dba83 1821 if (c->Request.Type.Direction == XFER_READ)
ca1e0484
MM		 1822 ddir = PCI_DMA_FROMDEVICE;
1823 else
1824 ddir = PCI_DMA_TODEVICE;
1825
1826 /* command did not need to be retried */
1827 /* unmap the DMA mapping for all the scatter gather elements */
f70dba83 1828 for (i = 0; i < c->Header.SGList; i++) {
5c07a311 1829 if (curr_sg[sg_index].Ext == CCISS_SG_CHAIN) {
f70dba83 1830 cciss_unmap_sg_chain_block(h, c);
5c07a311 1831 /* Point to the next block */
f70dba83 1832 curr_sg = h->cmd_sg_list[c->cmdindex];
5c07a311
DB		 1833 sg_index = 0;
1834 }
1835 temp64.val32.lower = curr_sg[sg_index].Addr.lower;
1836 temp64.val32.upper = curr_sg[sg_index].Addr.upper;
1837 pci_unmap_page(h->pdev, temp64.val, curr_sg[sg_index].Len,
1838 ddir);
1839 ++sg_index;
ca1e0484
MM		 1840 }
1841
b2a4a43d 1842 dev_dbg(&h->pdev->dev, "Done with %p\n", rq);
ca1e0484 1843
c3a4d78c 1844 /* set the residual count for pc requests */
33659ebb 1845 if (rq->cmd_type == REQ_TYPE_BLOCK_PC)
f70dba83 1846 rq->resid_len = c->err_info->ResidualCnt;
ac44e5b2 1847
c3a4d78c 1848 blk_end_request_all(rq, (rq->errors == 0) ? 0 : -EIO);
3daeea29 1849
ca1e0484 1850 spin_lock_irqsave(&h->lock, flags);
6b4d96b8 1851 cmd_free(h, c);
7b30f092 1852 cciss_check_queues(h);
ca1e0484
MM		 1853 spin_unlock_irqrestore(&h->lock, flags);
1854}
1855
39ccf9a6
SC		 1856static inline void log_unit_to_scsi3addr(ctlr_info_t *h,
1857 unsigned char scsi3addr[], uint32_t log_unit)
b57695fe 1858{
9cef0d2f
SC		 1859 memcpy(scsi3addr, h->drv[log_unit]->LunID,
1860 sizeof(h->drv[log_unit]->LunID));
b57695fe 1861}
1862
7fe06326
AP		 1863/* This function gets the SCSI vendor, model, and revision of a logical drive
1864 * via the inquiry page 0. Model, vendor, and rev are set to empty strings if
1865 * they cannot be read.
1866 */
f70dba83 1867static void cciss_get_device_descr(ctlr_info_t *h, int logvol,
7fe06326
AP		 1868 char *vendor, char *model, char *rev)
1869{
1870 int rc;
1871 InquiryData_struct *inq_buf;
b57695fe 1872 unsigned char scsi3addr[8];
7fe06326
AP		 1873
1874 *vendor = '\0';
1875 *model = '\0';
1876 *rev = '\0';
1877
1878 inq_buf = kzalloc(sizeof(InquiryData_struct), GFP_KERNEL);
1879 if (!inq_buf)
1880 return;
1881
f70dba83
SC		 1882 log_unit_to_scsi3addr(h, scsi3addr, logvol);
1883 rc = sendcmd_withirq(h, CISS_INQUIRY, inq_buf, sizeof(*inq_buf), 0,
7b838bde 1884 scsi3addr, TYPE_CMD);
7fe06326
AP		 1885 if (rc == IO_OK) {
1886 memcpy(vendor, &inq_buf->data_byte[8], VENDOR_LEN);
1887 vendor[VENDOR_LEN] = '\0';
1888 memcpy(model, &inq_buf->data_byte[16], MODEL_LEN);
1889 model[MODEL_LEN] = '\0';
1890 memcpy(rev, &inq_buf->data_byte[32], REV_LEN);
1891 rev[REV_LEN] = '\0';
1892 }
1893
1894 kfree(inq_buf);
1895 return;
1896}
1897
a72da29b
MM		 1898/* This function gets the serial number of a logical drive via
1899 * inquiry page 0x83. Serial no. is 16 bytes. If the serial
1900 * number cannot be had, for whatever reason, 16 bytes of 0xff
1901 * are returned instead.
1902 */
f70dba83 1903static void cciss_get_serial_no(ctlr_info_t *h, int logvol,
a72da29b
MM		 1904 unsigned char *serial_no, int buflen)
1905{
1906#define PAGE_83_INQ_BYTES 64
1907 int rc;
1908 unsigned char *buf;
b57695fe 1909 unsigned char scsi3addr[8];
a72da29b
MM		 1910
1911 if (buflen > 16)
1912 buflen = 16;
1913 memset(serial_no, 0xff, buflen);
1914 buf = kzalloc(PAGE_83_INQ_BYTES, GFP_KERNEL);
1915 if (!buf)
1916 return;
1917 memset(serial_no, 0, buflen);
f70dba83
SC		 1918 log_unit_to_scsi3addr(h, scsi3addr, logvol);
1919 rc = sendcmd_withirq(h, CISS_INQUIRY, buf,
7b838bde 1920 PAGE_83_INQ_BYTES, 0x83, scsi3addr, TYPE_CMD);
a72da29b
MM		 1921 if (rc == IO_OK)
1922 memcpy(serial_no, &buf[8], buflen);
1923 kfree(buf);
1924 return;
1925}
1926
617e1344
SC		 1927/*
1928 * cciss_add_disk sets up the block device queue for a logical drive
1929 */
1930static int cciss_add_disk(ctlr_info_t *h, struct gendisk *disk,
6ae5ce8e
MM		 1931 int drv_index)
1932{
1933 disk->queue = blk_init_queue(do_cciss_request, &h->lock);
e8074f79
SC		 1934 if (!disk->queue)
1935 goto init_queue_failure;
6ae5ce8e
MM		 1936 sprintf(disk->disk_name, "cciss/c%dd%d", h->ctlr, drv_index);
1937 disk->major = h->major;
1938 disk->first_minor = drv_index << NWD_SHIFT;
1939 disk->fops = &cciss_fops;
9cef0d2f
SC		 1940 if (cciss_create_ld_sysfs_entry(h, drv_index))
1941 goto cleanup_queue;
1942 disk->private_data = h->drv[drv_index];
1943 disk->driverfs_dev = &h->drv[drv_index]->dev;
6ae5ce8e
MM		 1944
1945 /* Set up queue information */
1946 blk_queue_bounce_limit(disk->queue, h->pdev->dma_mask);
1947
1948 /* This is a hardware imposed limit. */
8a78362c 1949 blk_queue_max_segments(disk->queue, h->maxsgentries);
6ae5ce8e 1950
086fa5ff 1951 blk_queue_max_hw_sectors(disk->queue, h->cciss_max_sectors);
6ae5ce8e
MM		 1952
1953 blk_queue_softirq_done(disk->queue, cciss_softirq_done);
1954
1955 disk->queue->queuedata = h;
1956
e1defc4f 1957 blk_queue_logical_block_size(disk->queue,
9cef0d2f 1958 h->drv[drv_index]->block_size);
6ae5ce8e
MM		 1959
1960 /* Make sure all queue data is written out before */
9cef0d2f 1961 /* setting h->drv[drv_index]->queue, as setting this */
6ae5ce8e
MM		 1962 /* allows the interrupt handler to start the queue */
1963 wmb();
9cef0d2f 1964 h->drv[drv_index]->queue = disk->queue;
6ae5ce8e 1965 add_disk(disk);
617e1344
SC		 1966 return 0;
1967
1968cleanup_queue:
1969 blk_cleanup_queue(disk->queue);
1970 disk->queue = NULL;
e8074f79 1971init_queue_failure:
617e1344 1972 return -1;
6ae5ce8e
MM		 1973}
1974
ddd47442 1975/* This function will check the usage_count of the drive to be updated/added.
a72da29b
MM		 1976 * If the usage_count is zero and it is a heretofore unknown drive, or,
1977 * the drive's capacity, geometry, or serial number has changed,
1978 * then the drive information will be updated and the disk will be
1979 * re-registered with the kernel. If these conditions don't hold,
1980 * then it will be left alone for the next reboot. The exception to this
1981 * is disk 0 which will always be left registered with the kernel since it
1982 * is also the controller node. Any changes to disk 0 will show up on
1983 * the next reboot.
7c832835 1984 */
f70dba83
SC		 1985static void cciss_update_drive_info(ctlr_info_t *h, int drv_index,
1986 int first_time, int via_ioctl)
7c832835 1987{
ddd47442 1988 struct gendisk *disk;
ddd47442
MM		 1989 InquiryData_struct *inq_buff = NULL;
1990 unsigned int block_size;
00988a35 1991 sector_t total_size;
ddd47442
MM		 1992 unsigned long flags = 0;
1993 int ret = 0;
a72da29b
MM		 1994 drive_info_struct *drvinfo;
1995
1996 /* Get information about the disk and modify the driver structure */
1997 inq_buff = kmalloc(sizeof(InquiryData_struct), GFP_KERNEL);
9cef0d2f 1998 drvinfo = kzalloc(sizeof(*drvinfo), GFP_KERNEL);
a72da29b
MM		 1999 if (inq_buff == NULL || drvinfo == NULL)
2000 goto mem_msg;
2001
2002 /* testing to see if 16-byte CDBs are already being used */
2003 if (h->cciss_read == CCISS_READ_16) {
f70dba83 2004 cciss_read_capacity_16(h, drv_index,
a72da29b
MM		 2005 &total_size, &block_size);
2006
2007 } else {
f70dba83 2008 cciss_read_capacity(h, drv_index, &total_size, &block_size);
a72da29b
MM		 2009 /* if read_capacity returns all F's this volume is >2TB */
2010 /* in size so we switch to 16-byte CDB's for all */
2011 /* read/write ops */
2012 if (total_size == 0xFFFFFFFFULL) {
f70dba83 2013 cciss_read_capacity_16(h, drv_index,
a72da29b
MM		 2014 &total_size, &block_size);
2015 h->cciss_read = CCISS_READ_16;
2016 h->cciss_write = CCISS_WRITE_16;
2017 } else {
2018 h->cciss_read = CCISS_READ_10;
2019 h->cciss_write = CCISS_WRITE_10;
2020 }
2021 }
2022
f70dba83 2023 cciss_geometry_inquiry(h, drv_index, total_size, block_size,
a72da29b
MM		 2024 inq_buff, drvinfo);
2025 drvinfo->block_size = block_size;
2026 drvinfo->nr_blocks = total_size + 1;
2027
f70dba83 2028 cciss_get_device_descr(h, drv_index, drvinfo->vendor,
7fe06326 2029 drvinfo->model, drvinfo->rev);
f70dba83 2030 cciss_get_serial_no(h, drv_index, drvinfo->serial_no,
a72da29b 2031 sizeof(drvinfo->serial_no));
9cef0d2f
SC		 2032 /* Save the lunid in case we deregister the disk, below. */
2033 memcpy(drvinfo->LunID, h->drv[drv_index]->LunID,
2034 sizeof(drvinfo->LunID));
a72da29b
MM		 2035
2036 /* Is it the same disk we already know, and nothing's changed? */
9cef0d2f 2037 if (h->drv[drv_index]->raid_level != -1 &&
a72da29b 2038 ((memcmp(drvinfo->serial_no,
9cef0d2f
SC		 2039 h->drv[drv_index]->serial_no, 16) == 0) &&
2040 drvinfo->block_size == h->drv[drv_index]->block_size &&
2041 drvinfo->nr_blocks == h->drv[drv_index]->nr_blocks &&
2042 drvinfo->heads == h->drv[drv_index]->heads &&
2043 drvinfo->sectors == h->drv[drv_index]->sectors &&
2044 drvinfo->cylinders == h->drv[drv_index]->cylinders))
a72da29b
MM		 2045 /* The disk is unchanged, nothing to update */
2046 goto freeret;
a72da29b 2047
6ae5ce8e
MM		 2048 /* If we get here it's not the same disk, or something's changed,
2049 * so we need to * deregister it, and re-register it, if it's not
2050 * in use.
2051 * If the disk already exists then deregister it before proceeding
2052 * (unless it's the first disk (for the controller node).
2053 */
9cef0d2f 2054 if (h->drv[drv_index]->raid_level != -1 && drv_index != 0) {
b2a4a43d 2055 dev_warn(&h->pdev->dev, "disk %d has changed.\n", drv_index);
f70dba83 2056 spin_lock_irqsave(&h->lock, flags);
9cef0d2f 2057 h->drv[drv_index]->busy_configuring = 1;
f70dba83 2058 spin_unlock_irqrestore(&h->lock, flags);
e14ac670 2059
9cef0d2f 2060 /* deregister_disk sets h->drv[drv_index]->queue = NULL
6ae5ce8e
MM		 2061 * which keeps the interrupt handler from starting
2062 * the queue.
2063 */
2d11d993 2064 ret = deregister_disk(h, drv_index, 0, via_ioctl);
ddd47442
MM		 2065 }
2066
2067 /* If the disk is in use return */
2068 if (ret)
a72da29b
MM		 2069 goto freeret;
2070
6ae5ce8e 2071 /* Save the new information from cciss_geometry_inquiry
9cef0d2f
SC		 2072 * and serial number inquiry. If the disk was deregistered
2073 * above, then h->drv[drv_index] will be NULL.
6ae5ce8e 2074 */
9cef0d2f
SC		 2075 if (h->drv[drv_index] == NULL) {
2076 drvinfo->device_initialized = 0;
2077 h->drv[drv_index] = drvinfo;
2078 drvinfo = NULL; /* so it won't be freed below. */
2079 } else {
2080 /* special case for cxd0 */
2081 h->drv[drv_index]->block_size = drvinfo->block_size;
2082 h->drv[drv_index]->nr_blocks = drvinfo->nr_blocks;
2083 h->drv[drv_index]->heads = drvinfo->heads;
2084 h->drv[drv_index]->sectors = drvinfo->sectors;
2085 h->drv[drv_index]->cylinders = drvinfo->cylinders;
2086 h->drv[drv_index]->raid_level = drvinfo->raid_level;
2087 memcpy(h->drv[drv_index]->serial_no, drvinfo->serial_no, 16);
2088 memcpy(h->drv[drv_index]->vendor, drvinfo->vendor,
2089 VENDOR_LEN + 1);
2090 memcpy(h->drv[drv_index]->model, drvinfo->model, MODEL_LEN + 1);
2091 memcpy(h->drv[drv_index]->rev, drvinfo->rev, REV_LEN + 1);
2092 }
ddd47442
MM		 2093
2094 ++h->num_luns;
2095 disk = h->gendisk[drv_index];
9cef0d2f 2096 set_capacity(disk, h->drv[drv_index]->nr_blocks);
ddd47442 2097
6ae5ce8e
MM		 2098 /* If it's not disk 0 (drv_index != 0)
2099 * or if it was disk 0, but there was previously
2100 * no actual corresponding configured logical drive
2101 * (raid_leve == -1) then we want to update the
2102 * logical drive's information.
2103 */
361e9b07
SC		 2104 if (drv_index || first_time) {
2105 if (cciss_add_disk(h, disk, drv_index) != 0) {
2106 cciss_free_gendisk(h, drv_index);
9cef0d2f 2107 cciss_free_drive_info(h, drv_index);
b2a4a43d
SC		 2108 dev_warn(&h->pdev->dev, "could not update disk %d\n",
2109 drv_index);
361e9b07
SC		 2110 --h->num_luns;
2111 }
2112 }
ddd47442 2113
6ae5ce8e 2114freeret:
ddd47442 2115 kfree(inq_buff);
a72da29b 2116 kfree(drvinfo);
ddd47442 2117 return;
6ae5ce8e 2118mem_msg:
b2a4a43d 2119 dev_err(&h->pdev->dev, "out of memory\n");
ddd47442
MM		 2120 goto freeret;
2121}
2122
2123/* This function will find the first index of the controllers drive array
9cef0d2f
SC		 2124 * that has a null drv pointer and allocate the drive info struct and
2125 * will return that index This is where new drives will be added.
2126 * If the index to be returned is greater than the highest_lun index for
2127 * the controller then highest_lun is set * to this new index.
2128 * If there are no available indexes or if tha allocation fails, then -1
2129 * is returned. * "controller_node" is used to know if this is a real
2130 * logical drive, or just the controller node, which determines if this
2131 * counts towards highest_lun.
7c832835 2132 */
9cef0d2f 2133static int cciss_alloc_drive_info(ctlr_info_t *h, int controller_node)
ddd47442
MM		 2134{
2135 int i;
9cef0d2f 2136 drive_info_struct *drv;
ddd47442 2137
9cef0d2f 2138 /* Search for an empty slot for our drive info */
7c832835 2139 for (i = 0; i < CISS_MAX_LUN; i++) {
9cef0d2f
SC		 2140
2141 /* if not cxd0 case, and it's occupied, skip it. */
2142 if (h->drv[i] && i != 0)
2143 continue;
2144 /*
2145 * If it's cxd0 case, and drv is alloc'ed already, and a
2146 * disk is configured there, skip it.
2147 */
2148 if (i == 0 && h->drv[i] && h->drv[i]->raid_level != -1)
2149 continue;
2150
2151 /*
2152 * We've found an empty slot. Update highest_lun
2153 * provided this isn't just the fake cxd0 controller node.
2154 */
2155 if (i > h->highest_lun && !controller_node)
2156 h->highest_lun = i;
2157
2158 /* If adding a real disk at cxd0, and it's already alloc'ed */
2159 if (i == 0 && h->drv[i] != NULL)
ddd47442 2160 return i;
9cef0d2f
SC		 2161
2162 /*
2163 * Found an empty slot, not already alloc'ed. Allocate it.
2164 * Mark it with raid_level == -1, so we know it's new later on.
2165 */
2166 drv = kzalloc(sizeof(*drv), GFP_KERNEL);
2167 if (!drv)
2168 return -1;
2169 drv->raid_level = -1; /* so we know it's new */
2170 h->drv[i] = drv;
2171 return i;
ddd47442
MM		 2172 }
2173 return -1;
2174}
2175
9cef0d2f
SC		 2176static void cciss_free_drive_info(ctlr_info_t *h, int drv_index)
2177{
2178 kfree(h->drv[drv_index]);
2179 h->drv[drv_index] = NULL;
2180}
2181
361e9b07
SC		 2182static void cciss_free_gendisk(ctlr_info_t *h, int drv_index)
2183{
2184 put_disk(h->gendisk[drv_index]);
2185 h->gendisk[drv_index] = NULL;
2186}
2187
6ae5ce8e
MM		 2188/* cciss_add_gendisk finds a free hba[]->drv structure
2189 * and allocates a gendisk if needed, and sets the lunid
2190 * in the drvinfo structure. It returns the index into
2191 * the ->drv[] array, or -1 if none are free.
2192 * is_controller_node indicates whether highest_lun should
2193 * count this disk, or if it's only being added to provide
2194 * a means to talk to the controller in case no logical
2195 * drives have yet been configured.
2196 */
39ccf9a6
SC		 2197static int cciss_add_gendisk(ctlr_info_t *h, unsigned char lunid[],
2198 int controller_node)
6ae5ce8e
MM		 2199{
2200 int drv_index;
2201
9cef0d2f 2202 drv_index = cciss_alloc_drive_info(h, controller_node);
6ae5ce8e
MM		 2203 if (drv_index == -1)
2204 return -1;
8ce51966 2205
6ae5ce8e
MM		 2206 /*Check if the gendisk needs to be allocated */
2207 if (!h->gendisk[drv_index]) {
2208 h->gendisk[drv_index] =
2209 alloc_disk(1 << NWD_SHIFT);
2210 if (!h->gendisk[drv_index]) {
b2a4a43d
SC		 2211 dev_err(&h->pdev->dev,
2212 "could not allocate a new disk %d\n",
2213 drv_index);
9cef0d2f 2214 goto err_free_drive_info;
6ae5ce8e
MM		 2215 }
2216 }
9cef0d2f
SC		 2217 memcpy(h->drv[drv_index]->LunID, lunid,
2218 sizeof(h->drv[drv_index]->LunID));
2219 if (cciss_create_ld_sysfs_entry(h, drv_index))
7fe06326 2220 goto err_free_disk;
6ae5ce8e
MM		 2221 /* Don't need to mark this busy because nobody */
2222 /* else knows about this disk yet to contend */
2223 /* for access to it. */
9cef0d2f 2224 h->drv[drv_index]->busy_configuring = 0;
6ae5ce8e
MM		 2225 wmb();
2226 return drv_index;
7fe06326
AP		 2227
2228err_free_disk:
361e9b07 2229 cciss_free_gendisk(h, drv_index);
9cef0d2f
SC		 2230err_free_drive_info:
2231 cciss_free_drive_info(h, drv_index);
7fe06326 2232 return -1;
6ae5ce8e
MM		 2233}
2234
2235/* This is for the special case of a controller which
2236 * has no logical drives. In this case, we still need
2237 * to register a disk so the controller can be accessed
2238 * by the Array Config Utility.
2239 */
2240static void cciss_add_controller_node(ctlr_info_t *h)
2241{
2242 struct gendisk *disk;
2243 int drv_index;
2244
2245 if (h->gendisk[0] != NULL) /* already did this? Then bail. */
2246 return;
2247
39ccf9a6 2248 drv_index = cciss_add_gendisk(h, CTLR_LUNID, 1);
361e9b07
SC		 2249 if (drv_index == -1)
2250 goto error;
9cef0d2f
SC		 2251 h->drv[drv_index]->block_size = 512;
2252 h->drv[drv_index]->nr_blocks = 0;
2253 h->drv[drv_index]->heads = 0;
2254 h->drv[drv_index]->sectors = 0;
2255 h->drv[drv_index]->cylinders = 0;
2256 h->drv[drv_index]->raid_level = -1;
2257 memset(h->drv[drv_index]->serial_no, 0, 16);
6ae5ce8e 2258 disk = h->gendisk[drv_index];
361e9b07
SC		 2259 if (cciss_add_disk(h, disk, drv_index) == 0)
2260 return;
2261 cciss_free_gendisk(h, drv_index);
9cef0d2f 2262 cciss_free_drive_info(h, drv_index);
361e9b07 2263error:
b2a4a43d 2264 dev_warn(&h->pdev->dev, "could not add disk 0.\n");
361e9b07 2265 return;
6ae5ce8e
MM		 2266}
2267
ddd47442 2268/* This function will add and remove logical drives from the Logical
d14c4ab5 2269 * drive array of the controller and maintain persistency of ordering
ddd47442
MM		 2270 * so that mount points are preserved until the next reboot. This allows
2271 * for the removal of logical drives in the middle of the drive array
2272 * without a re-ordering of those drives.
2273 * INPUT
2274 * h = The controller to perform the operations on
7c832835 2275 */
2d11d993
SC		 2276static int rebuild_lun_table(ctlr_info_t *h, int first_time,
2277 int via_ioctl)
1da177e4 2278{
ddd47442
MM		 2279 int num_luns;
2280 ReportLunData_struct *ld_buff = NULL;
ddd47442
MM		 2281 int return_code;
2282 int listlength = 0;
2283 int i;
2284 int drv_found;
2285 int drv_index = 0;
39ccf9a6 2286 unsigned char lunid[8] = CTLR_LUNID;
1da177e4 2287 unsigned long flags;
ddd47442 2288
6ae5ce8e
MM		 2289 if (!capable(CAP_SYS_RAWIO))
2290 return -EPERM;
2291
ddd47442 2292 /* Set busy_configuring flag for this operation */
f70dba83 2293 spin_lock_irqsave(&h->lock, flags);
7c832835 2294 if (h->busy_configuring) {
f70dba83 2295 spin_unlock_irqrestore(&h->lock, flags);
ddd47442
MM		 2296 return -EBUSY;
2297 }
2298 h->busy_configuring = 1;
f70dba83 2299 spin_unlock_irqrestore(&h->lock, flags);
ddd47442 2300
a72da29b
MM		 2301 ld_buff = kzalloc(sizeof(ReportLunData_struct), GFP_KERNEL);
2302 if (ld_buff == NULL)
2303 goto mem_msg;
2304
f70dba83 2305 return_code = sendcmd_withirq(h, CISS_REPORT_LOG, ld_buff,
b57695fe 2306 sizeof(ReportLunData_struct),
2307 0, CTLR_LUNID, TYPE_CMD);
ddd47442 2308
a72da29b
MM		 2309 if (return_code == IO_OK)
2310 listlength = be32_to_cpu(*(__be32 *) ld_buff->LUNListLength);
2311 else { /* reading number of logical volumes failed */
b2a4a43d
SC		 2312 dev_warn(&h->pdev->dev,
2313 "report logical volume command failed\n");
a72da29b
MM		 2314 listlength = 0;
2315 goto freeret;
2316 }
2317
2318 num_luns = listlength / 8; /* 8 bytes per entry */
2319 if (num_luns > CISS_MAX_LUN) {
2320 num_luns = CISS_MAX_LUN;
b2a4a43d 2321 dev_warn(&h->pdev->dev, "more luns configured"
a72da29b
MM		 2322 " on controller than can be handled by"
2323 " this driver.\n");
2324 }
2325
6ae5ce8e
MM		 2326 if (num_luns == 0)
2327 cciss_add_controller_node(h);
2328
2329 /* Compare controller drive array to driver's drive array
2330 * to see if any drives are missing on the controller due
2331 * to action of Array Config Utility (user deletes drive)
2332 * and deregister logical drives which have disappeared.
2333 */
a72da29b
MM		 2334 for (i = 0; i <= h->highest_lun; i++) {
2335 int j;
2336 drv_found = 0;
d8a0be6a
SC		 2337
2338 /* skip holes in the array from already deleted drives */
9cef0d2f 2339 if (h->drv[i] == NULL)
d8a0be6a
SC		 2340 continue;
2341
a72da29b 2342 for (j = 0; j < num_luns; j++) {
39ccf9a6 2343 memcpy(lunid, &ld_buff->LUN[j][0], sizeof(lunid));
9cef0d2f 2344 if (memcmp(h->drv[i]->LunID, lunid,
39ccf9a6 2345 sizeof(lunid)) == 0) {
a72da29b
MM		 2346 drv_found = 1;
2347 break;
2348 }
2349 }
2350 if (!drv_found) {
2351 /* Deregister it from the OS, it's gone. */
f70dba83 2352 spin_lock_irqsave(&h->lock, flags);
9cef0d2f 2353 h->drv[i]->busy_configuring = 1;
f70dba83 2354 spin_unlock_irqrestore(&h->lock, flags);
2d11d993 2355 return_code = deregister_disk(h, i, 1, via_ioctl);
9cef0d2f
SC		 2356 if (h->drv[i] != NULL)
2357 h->drv[i]->busy_configuring = 0;
ddd47442 2358 }
a72da29b 2359 }
ddd47442 2360
a72da29b
MM		 2361 /* Compare controller drive array to driver's drive array.
2362 * Check for updates in the drive information and any new drives
2363 * on the controller due to ACU adding logical drives, or changing
2364 * a logical drive's size, etc. Reregister any new/changed drives
2365 */
2366 for (i = 0; i < num_luns; i++) {
2367 int j;
ddd47442 2368
a72da29b 2369 drv_found = 0;
ddd47442 2370
39ccf9a6 2371 memcpy(lunid, &ld_buff->LUN[i][0], sizeof(lunid));
a72da29b
MM		 2372 /* Find if the LUN is already in the drive array
2373 * of the driver. If so then update its info
2374 * if not in use. If it does not exist then find
2375 * the first free index and add it.
2376 */
2377 for (j = 0; j <= h->highest_lun; j++) {
9cef0d2f
SC		 2378 if (h->drv[j] != NULL &&
2379 memcmp(h->drv[j]->LunID, lunid,
2380 sizeof(h->drv[j]->LunID)) == 0) {
a72da29b
MM		 2381 drv_index = j;
2382 drv_found = 1;
2383 break;
ddd47442 2384 }
a72da29b 2385 }
ddd47442 2386
a72da29b
MM		 2387 /* check if the drive was found already in the array */
2388 if (!drv_found) {
eece695f 2389 drv_index = cciss_add_gendisk(h, lunid, 0);
a72da29b
MM		 2390 if (drv_index == -1)
2391 goto freeret;
a72da29b 2392 }
f70dba83 2393 cciss_update_drive_info(h, drv_index, first_time, via_ioctl);
a72da29b 2394 } /* end for */
ddd47442 2395
6ae5ce8e 2396freeret:
ddd47442
MM		 2397 kfree(ld_buff);
2398 h->busy_configuring = 0;
2399 /* We return -1 here to tell the ACU that we have registered/updated
2400 * all of the drives that we can and to keep it from calling us
2401 * additional times.
7c832835 2402 */
ddd47442 2403 return -1;
6ae5ce8e 2404mem_msg:
b2a4a43d 2405 dev_err(&h->pdev->dev, "out of memory\n");
a72da29b 2406 h->busy_configuring = 0;
ddd47442
MM		 2407 goto freeret;
2408}
2409
9ddb27b4
SC		 2410static void cciss_clear_drive_info(drive_info_struct *drive_info)
2411{
2412 /* zero out the disk size info */
2413 drive_info->nr_blocks = 0;
2414 drive_info->block_size = 0;
2415 drive_info->heads = 0;
2416 drive_info->sectors = 0;
2417 drive_info->cylinders = 0;
2418 drive_info->raid_level = -1;
2419 memset(drive_info->serial_no, 0, sizeof(drive_info->serial_no));
2420 memset(drive_info->model, 0, sizeof(drive_info->model));
2421 memset(drive_info->rev, 0, sizeof(drive_info->rev));
2422 memset(drive_info->vendor, 0, sizeof(drive_info->vendor));
2423 /*
2424 * don't clear the LUNID though, we need to remember which
2425 * one this one is.
2426 */
2427}
2428
ddd47442
MM		 2429/* This function will deregister the disk and it's queue from the
2430 * kernel. It must be called with the controller lock held and the
2431 * drv structures busy_configuring flag set. It's parameters are:
2432 *
2433 * disk = This is the disk to be deregistered
2434 * drv = This is the drive_info_struct associated with the disk to be
2435 * deregistered. It contains information about the disk used
2436 * by the driver.
2437 * clear_all = This flag determines whether or not the disk information
2438 * is going to be completely cleared out and the highest_lun
2439 * reset. Sometimes we want to clear out information about
d14c4ab5 2440 * the disk in preparation for re-adding it. In this case
ddd47442
MM		 2441 * the highest_lun should be left unchanged and the LunID
2442 * should not be cleared.
2d11d993
SC		 2443 * via_ioctl
2444 * This indicates whether we've reached this path via ioctl.
2445 * This affects the maximum usage count allowed for c0d0 to be messed with.
2446 * If this path is reached via ioctl(), then the max_usage_count will
2447 * be 1, as the process calling ioctl() has got to have the device open.
2448 * If we get here via sysfs, then the max usage count will be zero.
ddd47442 2449*/
a0ea8622 2450static int deregister_disk(ctlr_info_t *h, int drv_index,
2d11d993 2451 int clear_all, int via_ioctl)
ddd47442 2452{
799202cb 2453 int i;
a0ea8622
SC		 2454 struct gendisk *disk;
2455 drive_info_struct *drv;
9cef0d2f 2456 int recalculate_highest_lun;
1da177e4
LT		 2457
2458 if (!capable(CAP_SYS_RAWIO))
2459 return -EPERM;
2460
9cef0d2f 2461 drv = h->drv[drv_index];
a0ea8622
SC		 2462 disk = h->gendisk[drv_index];
2463
1da177e4 2464 /* make sure logical volume is NOT is use */
7c832835 2465 if (clear_all || (h->gendisk[0] == disk)) {
2d11d993 2466 if (drv->usage_count > via_ioctl)
7c832835
BH		 2467 return -EBUSY;
2468 } else if (drv->usage_count > 0)
2469 return -EBUSY;
1da177e4 2470
9cef0d2f
SC		 2471 recalculate_highest_lun = (drv == h->drv[h->highest_lun]);
2472
ddd47442
MM		 2473 /* invalidate the devices and deregister the disk. If it is disk
2474 * zero do not deregister it but just zero out it's values. This
2475 * allows us to delete disk zero but keep the controller registered.
7c832835
BH		 2476 */
2477 if (h->gendisk[0] != disk) {
5a9df732 2478 struct request_queue *q = disk->queue;
097d0264 2479 if (disk->flags & GENHD_FL_UP) {
8ce51966 2480 cciss_destroy_ld_sysfs_entry(h, drv_index, 0);
5a9df732 2481 del_gendisk(disk);
5a9df732 2482 }
9cef0d2f 2483 if (q)
5a9df732 2484 blk_cleanup_queue(q);
5a9df732
AB		 2485 /* If clear_all is set then we are deleting the logical
2486 * drive, not just refreshing its info. For drives
2487 * other than disk 0 we will call put_disk. We do not
2488 * do this for disk 0 as we need it to be able to
2489 * configure the controller.
a72da29b 2490 */
5a9df732
AB		 2491 if (clear_all){
2492 /* This isn't pretty, but we need to find the
2493 * disk in our array and NULL our the pointer.
2494 * This is so that we will call alloc_disk if
2495 * this index is used again later.
a72da29b 2496 */
5a9df732 2497 for (i=0; i < CISS_MAX_LUN; i++){
a72da29b 2498 if (h->gendisk[i] == disk) {
5a9df732
AB		 2499 h->gendisk[i] = NULL;
2500 break;
799202cb 2501 }
799202cb 2502 }
5a9df732 2503 put_disk(disk);
ddd47442 2504 }
799202cb
MM		 2505 } else {
2506 set_capacity(disk, 0);
9cef0d2f 2507 cciss_clear_drive_info(drv);
ddd47442
MM		 2508 }
2509
2510 --h->num_luns;
ddd47442 2511
9cef0d2f
SC		 2512 /* if it was the last disk, find the new hightest lun */
2513 if (clear_all && recalculate_highest_lun) {
c2d45b4d 2514 int newhighest = -1;
9cef0d2f
SC		 2515 for (i = 0; i <= h->highest_lun; i++) {
2516 /* if the disk has size > 0, it is available */
2517 if (h->drv[i] && h->drv[i]->heads)
2518 newhighest = i;
1da177e4 2519 }
9cef0d2f 2520 h->highest_lun = newhighest;
ddd47442 2521 }
e2019b58 2522 return 0;
1da177e4 2523}
ddd47442 2524
f70dba83 2525static int fill_cmd(ctlr_info_t *h, CommandList_struct *c, __u8 cmd, void *buff,
b57695fe 2526 size_t size, __u8 page_code, unsigned char *scsi3addr,
2527 int cmd_type)
1da177e4 2528{
1da177e4
LT		 2529 u64bit buff_dma_handle;
2530 int status = IO_OK;
2531
2532 c->cmd_type = CMD_IOCTL_PEND;
2533 c->Header.ReplyQueue = 0;
7c832835 2534 if (buff != NULL) {
1da177e4 2535 c->Header.SGList = 1;
7c832835 2536 c->Header.SGTotal = 1;
1da177e4
LT		 2537 } else {
2538 c->Header.SGList = 0;
7c832835 2539 c->Header.SGTotal = 0;
1da177e4
LT		 2540 }
2541 c->Header.Tag.lower = c->busaddr;
b57695fe 2542 memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8);
1da177e4
LT		 2543
2544 c->Request.Type.Type = cmd_type;
2545 if (cmd_type == TYPE_CMD) {
7c832835
BH		 2546 switch (cmd) {
2547 case CISS_INQUIRY:
1da177e4 2548 /* are we trying to read a vital product page */
7c832835 2549 if (page_code != 0) {
1da177e4
LT		 2550 c->Request.CDB[1] = 0x01;
2551 c->Request.CDB[2] = page_code;
2552 }
2553 c->Request.CDBLen = 6;
7c832835 2554 c->Request.Type.Attribute = ATTR_SIMPLE;
1da177e4
LT		 2555 c->Request.Type.Direction = XFER_READ;
2556 c->Request.Timeout = 0;
7c832835
BH		 2557 c->Request.CDB[0] = CISS_INQUIRY;
2558 c->Request.CDB[4] = size & 0xFF;
2559 break;
1da177e4
LT		 2560 case CISS_REPORT_LOG:
2561 case CISS_REPORT_PHYS:
7c832835 2562 /* Talking to controller so It's a physical command
1da177e4 2563 mode = 00 target = 0. Nothing to write.
7c832835 2564 */
1da177e4
LT		 2565 c->Request.CDBLen = 12;
2566 c->Request.Type.Attribute = ATTR_SIMPLE;
2567 c->Request.Type.Direction = XFER_READ;
2568 c->Request.Timeout = 0;
2569 c->Request.CDB[0] = cmd;
b028461d 2570 c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */
1da177e4
LT		 2571 c->Request.CDB[7] = (size >> 16) & 0xFF;
2572 c->Request.CDB[8] = (size >> 8) & 0xFF;
2573 c->Request.CDB[9] = size & 0xFF;
2574 break;
2575
2576 case CCISS_READ_CAPACITY:
1da177e4
LT		 2577 c->Request.CDBLen = 10;
2578 c->Request.Type.Attribute = ATTR_SIMPLE;
2579 c->Request.Type.Direction = XFER_READ;
2580 c->Request.Timeout = 0;
2581 c->Request.CDB[0] = cmd;
7c832835 2582 break;
00988a35 2583 case CCISS_READ_CAPACITY_16:
00988a35
MMOD		 2584 c->Request.CDBLen = 16;
2585 c->Request.Type.Attribute = ATTR_SIMPLE;
2586 c->Request.Type.Direction = XFER_READ;
2587 c->Request.Timeout = 0;
2588 c->Request.CDB[0] = cmd;
2589 c->Request.CDB[1] = 0x10;
2590 c->Request.CDB[10] = (size >> 24) & 0xFF;
2591 c->Request.CDB[11] = (size >> 16) & 0xFF;
2592 c->Request.CDB[12] = (size >> 8) & 0xFF;
2593 c->Request.CDB[13] = size & 0xFF;
2594 c->Request.Timeout = 0;
2595 c->Request.CDB[0] = cmd;
2596 break;
1da177e4
LT		 2597 case CCISS_CACHE_FLUSH:
2598 c->Request.CDBLen = 12;
2599 c->Request.Type.Attribute = ATTR_SIMPLE;
2600 c->Request.Type.Direction = XFER_WRITE;
2601 c->Request.Timeout = 0;
2602 c->Request.CDB[0] = BMIC_WRITE;
2603 c->Request.CDB[6] = BMIC_CACHE_FLUSH;
7c832835 2604 break;
88f627ae 2605 case TEST_UNIT_READY:
88f627ae
SC		 2606 c->Request.CDBLen = 6;
2607 c->Request.Type.Attribute = ATTR_SIMPLE;
2608 c->Request.Type.Direction = XFER_NONE;
2609 c->Request.Timeout = 0;
2610 break;
1da177e4 2611 default:
b2a4a43d 2612 dev_warn(&h->pdev->dev, "Unknown Command 0x%c\n", cmd);
e2019b58 2613 return IO_ERROR;
1da177e4
LT		 2614 }
2615 } else if (cmd_type == TYPE_MSG) {
2616 switch (cmd) {
8f71bb82 2617 case CCISS_ABORT_MSG:
3da8b713 2618 c->Request.CDBLen = 12;
2619 c->Request.Type.Attribute = ATTR_SIMPLE;
2620 c->Request.Type.Direction = XFER_WRITE;
2621 c->Request.Timeout = 0;
7c832835
BH		 2622 c->Request.CDB[0] = cmd; /* abort */
2623 c->Request.CDB[1] = 0; /* abort a command */
3da8b713 2624 /* buff contains the tag of the command to abort */
2625 memcpy(&c->Request.CDB[4], buff, 8);
2626 break;
8f71bb82 2627 case CCISS_RESET_MSG:
88f627ae 2628 c->Request.CDBLen = 16;
3da8b713 2629 c->Request.Type.Attribute = ATTR_SIMPLE;
88f627ae 2630 c->Request.Type.Direction = XFER_NONE;
3da8b713 2631 c->Request.Timeout = 0;
2632 memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB));
7c832835 2633 c->Request.CDB[0] = cmd; /* reset */
8f71bb82 2634 c->Request.CDB[1] = CCISS_RESET_TYPE_TARGET;
00988a35 2635 break;
8f71bb82 2636 case CCISS_NOOP_MSG:
1da177e4
LT		 2637 c->Request.CDBLen = 1;
2638 c->Request.Type.Attribute = ATTR_SIMPLE;
2639 c->Request.Type.Direction = XFER_WRITE;
2640 c->Request.Timeout = 0;
2641 c->Request.CDB[0] = cmd;
2642 break;
2643 default:
b2a4a43d
SC		 2644 dev_warn(&h->pdev->dev,
2645 "unknown message type %d\n", cmd);
1da177e4
LT		 2646 return IO_ERROR;
2647 }
2648 } else {
b2a4a43d 2649 dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type);
1da177e4
LT		 2650 return IO_ERROR;
2651 }
2652 /* Fill in the scatter gather information */
2653 if (size > 0) {
2654 buff_dma_handle.val = (__u64) pci_map_single(h->pdev,
7c832835
BH		 2655 buff, size,
2656 PCI_DMA_BIDIRECTIONAL);
1da177e4
LT		 2657 c->SG[0].Addr.lower = buff_dma_handle.val32.lower;
2658 c->SG[0].Addr.upper = buff_dma_handle.val32.upper;
2659 c->SG[0].Len = size;
7c832835 2660 c->SG[0].Ext = 0; /* we are not chaining */
1da177e4
LT		 2661 }
2662 return status;
2663}
7c832835 2664
edc83d47
JA		 2665static int __devinit cciss_send_reset(ctlr_info_t *h, unsigned char *scsi3addr,
2666 u8 reset_type)
2667{
2668 CommandList_struct *c;
2669 int return_status;
2670
2671 c = cmd_alloc(h);
2672 if (!c)
2673 return -ENOMEM;
2674 return_status = fill_cmd(h, c, CCISS_RESET_MSG, NULL, 0, 0,
2675 CTLR_LUNID, TYPE_MSG);
2676 c->Request.CDB[1] = reset_type; /* fill_cmd defaults to target reset */
2677 if (return_status != IO_OK) {
2678 cmd_special_free(h, c);
2679 return return_status;
2680 }
2681 c->waiting = NULL;
2682 enqueue_cmd_and_start_io(h, c);
2683 /* Don't wait for completion, the reset won't complete. Don't free
2684 * the command either. This is the last command we will send before
2685 * re-initializing everything, so it doesn't matter and won't leak.
2686 */
2687 return 0;
2688}
2689
3c2ab402 2690static int check_target_status(ctlr_info_t *h, CommandList_struct *c)
2691{
2692 switch (c->err_info->ScsiStatus) {
2693 case SAM_STAT_GOOD:
2694 return IO_OK;
2695 case SAM_STAT_CHECK_CONDITION:
2696 switch (0xf & c->err_info->SenseInfo[2]) {
2697 case 0: return IO_OK; /* no sense */
2698 case 1: return IO_OK; /* recovered error */
2699 default:
c08fac65
SC		 2700 if (check_for_unit_attention(h, c))
2701 return IO_NEEDS_RETRY;
b2a4a43d 2702 dev_warn(&h->pdev->dev, "cmd 0x%02x "
3c2ab402 2703 "check condition, sense key = 0x%02x\n",
b2a4a43d 2704 c->Request.CDB[0], c->err_info->SenseInfo[2]);
3c2ab402 2705 }
2706 break;
2707 default:
b2a4a43d
SC		 2708 dev_warn(&h->pdev->dev, "cmd 0x%02x"
2709 "scsi status = 0x%02x\n",
3c2ab402 2710 c->Request.CDB[0], c->err_info->ScsiStatus);
2711 break;
2712 }
2713 return IO_ERROR;
2714}
2715
789a424a 2716static int process_sendcmd_error(ctlr_info_t *h, CommandList_struct *c)
1da177e4 2717{
5390cfc3 2718 int return_status = IO_OK;
7c832835 2719
789a424a 2720 if (c->err_info->CommandStatus == CMD_SUCCESS)
2721 return IO_OK;
5390cfc3 2722
2723 switch (c->err_info->CommandStatus) {
2724 case CMD_TARGET_STATUS:
3c2ab402 2725 return_status = check_target_status(h, c);
5390cfc3 2726 break;
2727 case CMD_DATA_UNDERRUN:
2728 case CMD_DATA_OVERRUN:
2729 /* expected for inquiry and report lun commands */
2730 break;
2731 case CMD_INVALID:
b2a4a43d 2732 dev_warn(&h->pdev->dev, "cmd 0x%02x is "
5390cfc3 2733 "reported invalid\n", c->Request.CDB[0]);
2734 return_status = IO_ERROR;
2735 break;
2736 case CMD_PROTOCOL_ERR:
b2a4a43d
SC		 2737 dev_warn(&h->pdev->dev, "cmd 0x%02x has "
2738 "protocol error\n", c->Request.CDB[0]);
5390cfc3 2739 return_status = IO_ERROR;
2740 break;
2741 case CMD_HARDWARE_ERR:
b2a4a43d 2742 dev_warn(&h->pdev->dev, "cmd 0x%02x had "
5390cfc3 2743 " hardware error\n", c->Request.CDB[0]);
2744 return_status = IO_ERROR;
2745 break;
2746 case CMD_CONNECTION_LOST:
b2a4a43d 2747 dev_warn(&h->pdev->dev, "cmd 0x%02x had "
5390cfc3 2748 "connection lost\n", c->Request.CDB[0]);
2749 return_status = IO_ERROR;
2750 break;
2751 case CMD_ABORTED:
b2a4a43d 2752 dev_warn(&h->pdev->dev, "cmd 0x%02x was "
5390cfc3 2753 "aborted\n", c->Request.CDB[0]);
2754 return_status = IO_ERROR;
2755 break;
2756 case CMD_ABORT_FAILED:
b2a4a43d 2757 dev_warn(&h->pdev->dev, "cmd 0x%02x reports "
5390cfc3 2758 "abort failed\n", c->Request.CDB[0]);
2759 return_status = IO_ERROR;
2760 break;
2761 case CMD_UNSOLICITED_ABORT:
b2a4a43d 2762 dev_warn(&h->pdev->dev, "unsolicited abort 0x%02x\n",
5390cfc3 2763 c->Request.CDB[0]);
789a424a 2764 return_status = IO_NEEDS_RETRY;
5390cfc3 2765 break;
6d9a4f9e
SC		 2766 case CMD_UNABORTABLE:
2767 dev_warn(&h->pdev->dev, "cmd unabortable\n");
2768 return_status = IO_ERROR;
2769 break;
5390cfc3 2770 default:
b2a4a43d 2771 dev_warn(&h->pdev->dev, "cmd 0x%02x returned "
5390cfc3 2772 "unknown status %x\n", c->Request.CDB[0],
2773 c->err_info->CommandStatus);
2774 return_status = IO_ERROR;
7c832835 2775 }
789a424a 2776 return return_status;
2777}
2778
2779static int sendcmd_withirq_core(ctlr_info_t *h, CommandList_struct *c,
2780 int attempt_retry)
2781{
2782 DECLARE_COMPLETION_ONSTACK(wait);
2783 u64bit buff_dma_handle;
789a424a 2784 int return_status = IO_OK;
2785
2786resend_cmd2:
2787 c->waiting = &wait;
664a717d 2788 enqueue_cmd_and_start_io(h, c);
789a424a 2789
2790 wait_for_completion(&wait);
2791
2792 if (c->err_info->CommandStatus == 0 || !attempt_retry)
2793 goto command_done;
2794
2795 return_status = process_sendcmd_error(h, c);
2796
2797 if (return_status == IO_NEEDS_RETRY &&
2798 c->retry_count < MAX_CMD_RETRIES) {
b2a4a43d 2799 dev_warn(&h->pdev->dev, "retrying 0x%02x\n",
789a424a 2800 c->Request.CDB[0]);
2801 c->retry_count++;
2802 /* erase the old error information */
2803 memset(c->err_info, 0, sizeof(ErrorInfo_struct));
2804 return_status = IO_OK;
2805 INIT_COMPLETION(wait);
2806 goto resend_cmd2;
2807 }
5390cfc3 2808
2809command_done:
1da177e4 2810 /* unlock the buffers from DMA */
bb2a37bf
MM		 2811 buff_dma_handle.val32.lower = c->SG[0].Addr.lower;
2812 buff_dma_handle.val32.upper = c->SG[0].Addr.upper;
7c832835
BH		 2813 pci_unmap_single(h->pdev, (dma_addr_t) buff_dma_handle.val,
2814 c->SG[0].Len, PCI_DMA_BIDIRECTIONAL);
5390cfc3 2815 return return_status;
2816}
2817
f70dba83 2818static int sendcmd_withirq(ctlr_info_t *h, __u8 cmd, void *buff, size_t size,
b57695fe 2819 __u8 page_code, unsigned char scsi3addr[],
2820 int cmd_type)
5390cfc3 2821{
5390cfc3 2822 CommandList_struct *c;
2823 int return_status;
2824
6b4d96b8 2825 c = cmd_special_alloc(h);
5390cfc3 2826 if (!c)
2827 return -ENOMEM;
f70dba83 2828 return_status = fill_cmd(h, c, cmd, buff, size, page_code,
b57695fe 2829 scsi3addr, cmd_type);
5390cfc3 2830 if (return_status == IO_OK)
789a424a 2831 return_status = sendcmd_withirq_core(h, c, 1);
2832
6b4d96b8 2833 cmd_special_free(h, c);
7c832835 2834 return return_status;
1da177e4 2835}
7c832835 2836
f70dba83 2837static void cciss_geometry_inquiry(ctlr_info_t *h, int logvol,
7b838bde 2838 sector_t total_size,
7c832835
BH		 2839 unsigned int block_size,
2840 InquiryData_struct *inq_buff,
2841 drive_info_struct *drv)
1da177e4
LT		 2842{
2843 int return_code;
00988a35 2844 unsigned long t;
b57695fe 2845 unsigned char scsi3addr[8];
00988a35 2846
1da177e4 2847 memset(inq_buff, 0, sizeof(InquiryData_struct));
f70dba83
SC		 2848 log_unit_to_scsi3addr(h, scsi3addr, logvol);
2849 return_code = sendcmd_withirq(h, CISS_INQUIRY, inq_buff,
7b838bde 2850 sizeof(*inq_buff), 0xC1, scsi3addr, TYPE_CMD);
1da177e4 2851 if (return_code == IO_OK) {
7c832835 2852 if (inq_buff->data_byte[8] == 0xFF) {
b2a4a43d
SC		 2853 dev_warn(&h->pdev->dev,
2854 "reading geometry failed, volume "
7c832835 2855 "does not support reading geometry\n");
1da177e4 2856 drv->heads = 255;
b028461d 2857 drv->sectors = 32; /* Sectors per track */
7f42d3b8 2858 drv->cylinders = total_size + 1;
89f97ad1 2859 drv->raid_level = RAID_UNKNOWN;
1da177e4 2860 } else {
1da177e4
LT		 2861 drv->heads = inq_buff->data_byte[6];
2862 drv->sectors = inq_buff->data_byte[7];
2863 drv->cylinders = (inq_buff->data_byte[4] & 0xff) << 8;
2864 drv->cylinders += inq_buff->data_byte[5];
2865 drv->raid_level = inq_buff->data_byte[8];
3f7705ea
MW		 2866 }
2867 drv->block_size = block_size;
97c06978 2868 drv->nr_blocks = total_size + 1;
3f7705ea
MW		 2869 t = drv->heads * drv->sectors;
2870 if (t > 1) {
97c06978
MMOD		 2871 sector_t real_size = total_size + 1;
2872 unsigned long rem = sector_div(real_size, t);
3f7705ea 2873 if (rem)
97c06978
MMOD		 2874 real_size++;
2875 drv->cylinders = real_size;
1da177e4 2876 }
7c832835 2877 } else { /* Get geometry failed */
b2a4a43d 2878 dev_warn(&h->pdev->dev, "reading geometry failed\n");
1da177e4 2879 }
1da177e4 2880}
7c832835 2881
1da177e4 2882static void
f70dba83 2883cciss_read_capacity(ctlr_info_t *h, int logvol, sector_t *total_size,
7c832835 2884 unsigned int *block_size)
1da177e4 2885{
00988a35 2886 ReadCapdata_struct *buf;
1da177e4 2887 int return_code;
b57695fe 2888 unsigned char scsi3addr[8];
1aebe187
MK		 2889
2890 buf = kzalloc(sizeof(ReadCapdata_struct), GFP_KERNEL);
2891 if (!buf) {
b2a4a43d 2892 dev_warn(&h->pdev->dev, "out of memory\n");
00988a35
MMOD		 2893 return;
2894 }
1aebe187 2895
f70dba83
SC		 2896 log_unit_to_scsi3addr(h, scsi3addr, logvol);
2897 return_code = sendcmd_withirq(h, CCISS_READ_CAPACITY, buf,
7b838bde 2898 sizeof(ReadCapdata_struct), 0, scsi3addr, TYPE_CMD);
1da177e4 2899 if (return_code == IO_OK) {
4c1f2b31
AV		 2900 *total_size = be32_to_cpu(*(__be32 *) buf->total_size);
2901 *block_size = be32_to_cpu(*(__be32 *) buf->block_size);
7c832835 2902 } else { /* read capacity command failed */
b2a4a43d 2903 dev_warn(&h->pdev->dev, "read capacity failed\n");
1da177e4
LT		 2904 *total_size = 0;
2905 *block_size = BLOCK_SIZE;
2906 }
00988a35 2907 kfree(buf);
00988a35
MMOD		 2908}
2909
f70dba83 2910static void cciss_read_capacity_16(ctlr_info_t *h, int logvol,
7b838bde 2911 sector_t *total_size, unsigned int *block_size)
00988a35
MMOD		 2912{
2913 ReadCapdata_struct_16 *buf;
2914 int return_code;
b57695fe 2915 unsigned char scsi3addr[8];
1aebe187
MK		 2916
2917 buf = kzalloc(sizeof(ReadCapdata_struct_16), GFP_KERNEL);
2918 if (!buf) {
b2a4a43d 2919 dev_warn(&h->pdev->dev, "out of memory\n");
00988a35
MMOD		 2920 return;
2921 }
1aebe187 2922
f70dba83
SC		 2923 log_unit_to_scsi3addr(h, scsi3addr, logvol);
2924 return_code = sendcmd_withirq(h, CCISS_READ_CAPACITY_16,
2925 buf, sizeof(ReadCapdata_struct_16),
7b838bde 2926 0, scsi3addr, TYPE_CMD);
00988a35 2927 if (return_code == IO_OK) {
4c1f2b31
AV		 2928 *total_size = be64_to_cpu(*(__be64 *) buf->total_size);
2929 *block_size = be32_to_cpu(*(__be32 *) buf->block_size);
00988a35 2930 } else { /* read capacity command failed */
b2a4a43d 2931 dev_warn(&h->pdev->dev, "read capacity failed\n");
00988a35
MMOD		 2932 *total_size = 0;
2933 *block_size = BLOCK_SIZE;
2934 }
b2a4a43d 2935 dev_info(&h->pdev->dev, " blocks= %llu block_size= %d\n",
97c06978 2936 (unsigned long long)*total_size+1, *block_size);
00988a35 2937 kfree(buf);
1da177e4
LT		 2938}
2939
1da177e4
LT		 2940static int cciss_revalidate(struct gendisk *disk)
2941{
2942 ctlr_info_t *h = get_host(disk);
2943 drive_info_struct *drv = get_drv(disk);
2944 int logvol;
7c832835 2945 int FOUND = 0;
1da177e4 2946 unsigned int block_size;
00988a35 2947 sector_t total_size;
1da177e4
LT		 2948 InquiryData_struct *inq_buff = NULL;
2949
68264e9d 2950 for (logvol = 0; logvol <= h->highest_lun; logvol++) {
0fc13c89 2951 if (!h->drv[logvol])
453434cf 2952 continue;
9cef0d2f 2953 if (memcmp(h->drv[logvol]->LunID, drv->LunID,
39ccf9a6 2954 sizeof(drv->LunID)) == 0) {
7c832835 2955 FOUND = 1;
1da177e4
LT		 2956 break;
2957 }
2958 }
2959
7c832835
BH		 2960 if (!FOUND)
2961 return 1;
1da177e4 2962
7c832835
BH		 2963 inq_buff = kmalloc(sizeof(InquiryData_struct), GFP_KERNEL);
2964 if (inq_buff == NULL) {
b2a4a43d 2965 dev_warn(&h->pdev->dev, "out of memory\n");
7c832835
BH		 2966 return 1;
2967 }
00988a35 2968 if (h->cciss_read == CCISS_READ_10) {
f70dba83 2969 cciss_read_capacity(h, logvol,
00988a35
MMOD		 2970 &total_size, &block_size);
2971 } else {
f70dba83 2972 cciss_read_capacity_16(h, logvol,
00988a35
MMOD		 2973 &total_size, &block_size);
2974 }
f70dba83 2975 cciss_geometry_inquiry(h, logvol, total_size, block_size,
7c832835 2976 inq_buff, drv);
1da177e4 2977
e1defc4f 2978 blk_queue_logical_block_size(drv->queue, drv->block_size);
1da177e4
LT		 2979 set_capacity(disk, drv->nr_blocks);
2980
1da177e4
LT		 2981 kfree(inq_buff);
2982 return 0;
2983}
2984
1da177e4
LT		 2985/*
2986 * Map (physical) PCI mem into (virtual) kernel space
2987 */
2988static void __iomem *remap_pci_mem(ulong base, ulong size)
2989{
7c832835
BH		 2990 ulong page_base = ((ulong) base) & PAGE_MASK;
2991 ulong page_offs = ((ulong) base) - page_base;
2992 void __iomem *page_remapped = ioremap(page_base, page_offs + size);
1da177e4 2993
7c832835 2994 return page_remapped ? (page_remapped + page_offs) : NULL;
1da177e4
LT		 2995}
2996
7c832835
BH		 2997/*
2998 * Takes jobs of the Q and sends them to the hardware, then puts it on
2999 * the Q to wait for completion.
3000 */
3001static void start_io(ctlr_info_t *h)
1da177e4
LT		 3002{
3003 CommandList_struct *c;
7c832835 3004
e6e1ee93
JA		 3005 while (!list_empty(&h->reqQ)) {
3006 c = list_entry(h->reqQ.next, CommandList_struct, list);
1da177e4
LT		 3007 /* can't do anything if fifo is full */
3008 if ((h->access.fifo_full(h))) {
b2a4a43d 3009 dev_warn(&h->pdev->dev, "fifo full\n");
1da177e4
LT		 3010 break;
3011 }
3012
7c832835 3013 /* Get the first entry from the Request Q */
8a3173de 3014 removeQ(c);
1da177e4 3015 h->Qdepth--;
7c832835
BH		 3016
3017 /* Tell the controller execute command */
1da177e4 3018 h->access.submit_command(h, c);
7c832835
BH		 3019
3020 /* Put job onto the completed Q */
8a3173de 3021 addQ(&h->cmpQ, c);
1da177e4
LT		 3022 }
3023}
7c832835 3024
f70dba83 3025/* Assumes that h->lock is held. */
1da177e4
LT		 3026/* Zeros out the error record and then resends the command back */
3027/* to the controller */
7c832835 3028static inline void resend_cciss_cmd(ctlr_info_t *h, CommandList_struct *c)
1da177e4
LT		 3029{
3030 /* erase the old error information */
3031 memset(c->err_info, 0, sizeof(ErrorInfo_struct));
3032
3033 /* add it to software queue and then send it to the controller */
8a3173de 3034 addQ(&h->reqQ, c);
1da177e4 3035 h->Qdepth++;
7c832835 3036 if (h->Qdepth > h->maxQsinceinit)
1da177e4
LT		 3037 h->maxQsinceinit = h->Qdepth;
3038
3039 start_io(h);
3040}
a9925a06 3041
1a614f50
SC		 3042static inline unsigned int make_status_bytes(unsigned int scsi_status_byte,
3043 unsigned int msg_byte, unsigned int host_byte,
3044 unsigned int driver_byte)
3045{
3046 /* inverse of macros in scsi.h */
3047 return (scsi_status_byte & 0xff) |
3048 ((msg_byte & 0xff) << 8) |
3049 ((host_byte & 0xff) << 16) |
3050 ((driver_byte & 0xff) << 24);
3051}
3052
0a9279cc
MM		 3053static inline int evaluate_target_status(ctlr_info_t *h,
3054 CommandList_struct *cmd, int *retry_cmd)
03bbfee5
MMOD		 3055{
3056 unsigned char sense_key;
1a614f50
SC		 3057 unsigned char status_byte, msg_byte, host_byte, driver_byte;
3058 int error_value;
3059
0a9279cc 3060 *retry_cmd = 0;
1a614f50
SC		 3061 /* If we get in here, it means we got "target status", that is, scsi status */
3062 status_byte = cmd->err_info->ScsiStatus;
3063 driver_byte = DRIVER_OK;
3064 msg_byte = cmd->err_info->CommandStatus; /* correct? seems too device specific */
3065
33659ebb 3066 if (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC)
1a614f50
SC		 3067 host_byte = DID_PASSTHROUGH;
3068 else
3069 host_byte = DID_OK;
3070
3071 error_value = make_status_bytes(status_byte, msg_byte,
3072 host_byte, driver_byte);
03bbfee5 3073
1a614f50 3074 if (cmd->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION) {
33659ebb 3075 if (cmd->rq->cmd_type != REQ_TYPE_BLOCK_PC)
b2a4a43d 3076 dev_warn(&h->pdev->dev, "cmd %p "
03bbfee5
MMOD		 3077 "has SCSI Status 0x%x\n",
3078 cmd, cmd->err_info->ScsiStatus);
1a614f50 3079 return error_value;
03bbfee5
MMOD		 3080 }
3081
3082 /* check the sense key */
3083 sense_key = 0xf & cmd->err_info->SenseInfo[2];
3084 /* no status or recovered error */
33659ebb
CH		 3085 if (((sense_key == 0x0) || (sense_key == 0x1)) &&
3086 (cmd->rq->cmd_type != REQ_TYPE_BLOCK_PC))
1a614f50 3087 error_value = 0;
03bbfee5 3088
0a9279cc 3089 if (check_for_unit_attention(h, cmd)) {
33659ebb 3090 *retry_cmd = !(cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC);
0a9279cc
MM		 3091 return 0;
3092 }
3093
33659ebb
CH		 3094 /* Not SG_IO or similar? */
3095 if (cmd->rq->cmd_type != REQ_TYPE_BLOCK_PC) {
1a614f50 3096 if (error_value != 0)
b2a4a43d 3097 dev_warn(&h->pdev->dev, "cmd %p has CHECK CONDITION"
03bbfee5 3098 " sense key = 0x%x\n", cmd, sense_key);
1a614f50 3099 return error_value;
03bbfee5
MMOD		 3100 }
3101
3102 /* SG_IO or similar, copy sense data back */
3103 if (cmd->rq->sense) {
3104 if (cmd->rq->sense_len > cmd->err_info->SenseLen)
3105 cmd->rq->sense_len = cmd->err_info->SenseLen;
3106 memcpy(cmd->rq->sense, cmd->err_info->SenseInfo,
3107 cmd->rq->sense_len);
3108 } else
3109 cmd->rq->sense_len = 0;
3110
1a614f50 3111 return error_value;
03bbfee5
MMOD		 3112}
3113
7c832835 3114/* checks the status of the job and calls complete buffers to mark all
a9925a06
JA		 3115 * buffers for the completed job. Note that this function does not need
3116 * to hold the hba/queue lock.
7c832835
BH		 3117 */
3118static inline void complete_command(ctlr_info_t *h, CommandList_struct *cmd,
3119 int timeout)
1da177e4 3120{
1da177e4 3121 int retry_cmd = 0;
198b7660
MMOD		 3122 struct request *rq = cmd->rq;
3123
3124 rq->errors = 0;
7c832835 3125
1da177e4 3126 if (timeout)
1a614f50 3127 rq->errors = make_status_bytes(0, 0, 0, DRIVER_TIMEOUT);
1da177e4 3128
d38ae168
MMOD		 3129 if (cmd->err_info->CommandStatus == 0) /* no error has occurred */
3130 goto after_error_processing;
7c832835 3131
d38ae168 3132 switch (cmd->err_info->CommandStatus) {
d38ae168 3133 case CMD_TARGET_STATUS:
0a9279cc 3134 rq->errors = evaluate_target_status(h, cmd, &retry_cmd);
d38ae168
MMOD		 3135 break;
3136 case CMD_DATA_UNDERRUN:
33659ebb 3137 if (cmd->rq->cmd_type == REQ_TYPE_FS) {
b2a4a43d 3138 dev_warn(&h->pdev->dev, "cmd %p has"
03bbfee5
MMOD		 3139 " completed with data underrun "
3140 "reported\n", cmd);
c3a4d78c 3141 cmd->rq->resid_len = cmd->err_info->ResidualCnt;
03bbfee5 3142 }
d38ae168
MMOD		 3143 break;
3144 case CMD_DATA_OVERRUN:
33659ebb 3145 if (cmd->rq->cmd_type == REQ_TYPE_FS)
b2a4a43d 3146 dev_warn(&h->pdev->dev, "cciss: cmd %p has"
03bbfee5
MMOD		 3147 " completed with data overrun "
3148 "reported\n", cmd);
d38ae168
MMOD		 3149 break;
3150 case CMD_INVALID:
b2a4a43d 3151 dev_warn(&h->pdev->dev, "cciss: cmd %p is "
d38ae168 3152 "reported invalid\n", cmd);
1a614f50
SC		 3153 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3154 cmd->err_info->CommandStatus, DRIVER_OK,
33659ebb
CH		 3155 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3156 DID_PASSTHROUGH : DID_ERROR);
d38ae168
MMOD		 3157 break;
3158 case CMD_PROTOCOL_ERR:
b2a4a43d
SC		 3159 dev_warn(&h->pdev->dev, "cciss: cmd %p has "
3160 "protocol error\n", cmd);
1a614f50
SC		 3161 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3162 cmd->err_info->CommandStatus, DRIVER_OK,
33659ebb
CH		 3163 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3164 DID_PASSTHROUGH : DID_ERROR);
d38ae168
MMOD		 3165 break;
3166 case CMD_HARDWARE_ERR:
b2a4a43d 3167 dev_warn(&h->pdev->dev, "cciss: cmd %p had "
d38ae168 3168 " hardware error\n", cmd);
1a614f50
SC		 3169 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3170 cmd->err_info->CommandStatus, DRIVER_OK,
33659ebb
CH		 3171 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3172 DID_PASSTHROUGH : DID_ERROR);
d38ae168
MMOD		 3173 break;
3174 case CMD_CONNECTION_LOST:
b2a4a43d 3175 dev_warn(&h->pdev->dev, "cciss: cmd %p had "
d38ae168 3176 "connection lost\n", cmd);
1a614f50
SC		 3177 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3178 cmd->err_info->CommandStatus, DRIVER_OK,
33659ebb
CH		 3179 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3180 DID_PASSTHROUGH : DID_ERROR);
d38ae168
MMOD		 3181 break;
3182 case CMD_ABORTED:
b2a4a43d 3183 dev_warn(&h->pdev->dev, "cciss: cmd %p was "
d38ae168 3184 "aborted\n", cmd);
1a614f50
SC		 3185 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3186 cmd->err_info->CommandStatus, DRIVER_OK,
33659ebb
CH		 3187 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3188 DID_PASSTHROUGH : DID_ABORT);
d38ae168
MMOD		 3189 break;
3190 case CMD_ABORT_FAILED:
b2a4a43d 3191 dev_warn(&h->pdev->dev, "cciss: cmd %p reports "
d38ae168 3192 "abort failed\n", cmd);
1a614f50
SC		 3193 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3194 cmd->err_info->CommandStatus, DRIVER_OK,
33659ebb
CH		 3195 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3196 DID_PASSTHROUGH : DID_ERROR);
d38ae168
MMOD		 3197 break;
3198 case CMD_UNSOLICITED_ABORT:
b2a4a43d 3199 dev_warn(&h->pdev->dev, "cciss%d: unsolicited "
d38ae168
MMOD		 3200 "abort %p\n", h->ctlr, cmd);
3201 if (cmd->retry_count < MAX_CMD_RETRIES) {
3202 retry_cmd = 1;
b2a4a43d 3203 dev_warn(&h->pdev->dev, "retrying %p\n", cmd);
d38ae168
MMOD		 3204 cmd->retry_count++;
3205 } else
b2a4a43d
SC		 3206 dev_warn(&h->pdev->dev,
3207 "%p retried too many times\n", cmd);
1a614f50
SC		 3208 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3209 cmd->err_info->CommandStatus, DRIVER_OK,
33659ebb
CH		 3210 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3211 DID_PASSTHROUGH : DID_ABORT);
d38ae168
MMOD		 3212 break;
3213 case CMD_TIMEOUT:
b2a4a43d 3214 dev_warn(&h->pdev->dev, "cmd %p timedout\n", cmd);
1a614f50
SC		 3215 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3216 cmd->err_info->CommandStatus, DRIVER_OK,
33659ebb
CH		 3217 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3218 DID_PASSTHROUGH : DID_ERROR);
d38ae168 3219 break;
6d9a4f9e
SC		 3220 case CMD_UNABORTABLE:
3221 dev_warn(&h->pdev->dev, "cmd %p unabortable\n", cmd);
3222 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3223 cmd->err_info->CommandStatus, DRIVER_OK,
3224 cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC ?
3225 DID_PASSTHROUGH : DID_ERROR);
3226 break;
d38ae168 3227 default:
b2a4a43d 3228 dev_warn(&h->pdev->dev, "cmd %p returned "
d38ae168
MMOD		 3229 "unknown status %x\n", cmd,
3230 cmd->err_info->CommandStatus);
1a614f50
SC		 3231 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3232 cmd->err_info->CommandStatus, DRIVER_OK,
33659ebb
CH		 3233 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3234 DID_PASSTHROUGH : DID_ERROR);
1da177e4 3235 }
d38ae168
MMOD		 3236
3237after_error_processing:
3238
1da177e4 3239 /* We need to return this command */
7c832835
BH		 3240 if (retry_cmd) {
3241 resend_cciss_cmd(h, cmd);
1da177e4 3242 return;
7c832835 3243 }
03bbfee5 3244 cmd->rq->completion_data = cmd;
a9925a06 3245 blk_complete_request(cmd->rq);
1da177e4
LT		 3246}
3247
0c2b3908
MM		 3248static inline u32 cciss_tag_contains_index(u32 tag)
3249{
5e216153 3250#define DIRECT_LOOKUP_BIT 0x10
0c2b3908
MM		 3251 return tag & DIRECT_LOOKUP_BIT;
3252}
3253
3254static inline u32 cciss_tag_to_index(u32 tag)
3255{
5e216153 3256#define DIRECT_LOOKUP_SHIFT 5
0c2b3908
MM		 3257 return tag >> DIRECT_LOOKUP_SHIFT;
3258}
3259
0498cc2a 3260static inline u32 cciss_tag_discard_error_bits(ctlr_info_t *h, u32 tag)
0c2b3908 3261{
0498cc2a
SC		 3262#define CCISS_PERF_ERROR_BITS ((1 << DIRECT_LOOKUP_SHIFT) - 1)
3263#define CCISS_SIMPLE_ERROR_BITS 0x03
3264 if (likely(h->transMethod & CFGTBL_Trans_Performant))
3265 return tag & ~CCISS_PERF_ERROR_BITS;
3266 return tag & ~CCISS_SIMPLE_ERROR_BITS;
0c2b3908
MM		 3267}
3268
3269static inline void cciss_mark_tag_indexed(u32 *tag)
3270{
3271 *tag |= DIRECT_LOOKUP_BIT;
3272}
3273
3274static inline void cciss_set_tag_index(u32 *tag, u32 index)
3275{
3276 *tag |= (index << DIRECT_LOOKUP_SHIFT);
3277}
3278
7c832835
BH		 3279/*
3280 * Get a request and submit it to the controller.
1da177e4 3281 */
165125e1 3282static void do_cciss_request(struct request_queue *q)
1da177e4 3283{
7c832835 3284 ctlr_info_t *h = q->queuedata;
1da177e4 3285 CommandList_struct *c;
00988a35
MMOD		 3286 sector_t start_blk;
3287 int seg;
1da177e4
LT		 3288 struct request *creq;
3289 u64bit temp64;
5c07a311
DB		 3290 struct scatterlist *tmp_sg;
3291 SGDescriptor_struct *curr_sg;
1da177e4
LT		 3292 drive_info_struct *drv;
3293 int i, dir;
5c07a311
DB		 3294 int sg_index = 0;
3295 int chained = 0;
1da177e4 3296
7c832835 3297 queue:
9934c8c0 3298 creq = blk_peek_request(q);
1da177e4
LT		 3299 if (!creq)
3300 goto startio;
3301
5c07a311 3302 BUG_ON(creq->nr_phys_segments > h->maxsgentries);
1da177e4 3303
6b4d96b8
SC		 3304 c = cmd_alloc(h);
3305 if (!c)
1da177e4
LT		 3306 goto full;
3307
9934c8c0 3308 blk_start_request(creq);
1da177e4 3309
5c07a311 3310 tmp_sg = h->scatter_list[c->cmdindex];
1da177e4
LT		 3311 spin_unlock_irq(q->queue_lock);
3312
3313 c->cmd_type = CMD_RWREQ;
3314 c->rq = creq;
7c832835
BH		 3315
3316 /* fill in the request */
1da177e4 3317 drv = creq->rq_disk->private_data;
b028461d 3318 c->Header.ReplyQueue = 0; /* unused in simple mode */
33079b21
MM		 3319 /* got command from pool, so use the command block index instead */
3320 /* for direct lookups. */
3321 /* The first 2 bits are reserved for controller error reporting. */
0c2b3908
MM		 3322 cciss_set_tag_index(&c->Header.Tag.lower, c->cmdindex);
3323 cciss_mark_tag_indexed(&c->Header.Tag.lower);
39ccf9a6 3324 memcpy(&c->Header.LUN, drv->LunID, sizeof(drv->LunID));
b028461d 3325 c->Request.CDBLen = 10; /* 12 byte commands not in FW yet; */
3326 c->Request.Type.Type = TYPE_CMD; /* It is a command. */
7c832835
BH		 3327 c->Request.Type.Attribute = ATTR_SIMPLE;
3328 c->Request.Type.Direction =
a52de245 3329 (rq_data_dir(creq) == READ) ? XFER_READ : XFER_WRITE;
b028461d 3330 c->Request.Timeout = 0; /* Don't time out */
7c832835 3331 c->Request.CDB[0] =
00988a35 3332 (rq_data_dir(creq) == READ) ? h->cciss_read : h->cciss_write;
83096ebf 3333 start_blk = blk_rq_pos(creq);
b2a4a43d 3334 dev_dbg(&h->pdev->dev, "sector =%d nr_sectors=%d\n",
83096ebf 3335 (int)blk_rq_pos(creq), (int)blk_rq_sectors(creq));
5c07a311 3336 sg_init_table(tmp_sg, h->maxsgentries);
1da177e4
LT		 3337 seg = blk_rq_map_sg(q, creq, tmp_sg);
3338
7c832835 3339 /* get the DMA records for the setup */
1da177e4
LT		 3340 if (c->Request.Type.Direction == XFER_READ)
3341 dir = PCI_DMA_FROMDEVICE;
3342 else
3343 dir = PCI_DMA_TODEVICE;
3344
5c07a311
DB		 3345 curr_sg = c->SG;
3346 sg_index = 0;
3347 chained = 0;
3348
7c832835 3349 for (i = 0; i < seg; i++) {
5c07a311
DB		 3350 if (((sg_index+1) == (h->max_cmd_sgentries)) &&
3351 !chained && ((seg - i) > 1)) {
5c07a311 3352 /* Point to next chain block. */
dccc9b56 3353 curr_sg = h->cmd_sg_list[c->cmdindex];
5c07a311
DB		 3354 sg_index = 0;
3355 chained = 1;
3356 }
3357 curr_sg[sg_index].Len = tmp_sg[i].length;
45711f1a 3358 temp64.val = (__u64) pci_map_page(h->pdev, sg_page(&tmp_sg[i]),
5c07a311
DB		 3359 tmp_sg[i].offset,
3360 tmp_sg[i].length, dir);
3361 curr_sg[sg_index].Addr.lower = temp64.val32.lower;
3362 curr_sg[sg_index].Addr.upper = temp64.val32.upper;
3363 curr_sg[sg_index].Ext = 0; /* we are not chaining */
5c07a311 3364 ++sg_index;
1da177e4 3365 }
d45033ef
SC		 3366 if (chained)
3367 cciss_map_sg_chain_block(h, c, h->cmd_sg_list[c->cmdindex],
3368 (seg - (h->max_cmd_sgentries - 1)) *
3369 sizeof(SGDescriptor_struct));
5c07a311 3370
7c832835
BH		 3371 /* track how many SG entries we are using */
3372 if (seg > h->maxSG)
3373 h->maxSG = seg;
1da177e4 3374
b2a4a43d 3375 dev_dbg(&h->pdev->dev, "Submitting %u sectors in %d segments "
5c07a311
DB		 3376 "chained[%d]\n",
3377 blk_rq_sectors(creq), seg, chained);
1da177e4 3378
5e216153
MM		 3379 c->Header.SGTotal = seg + chained;
3380 if (seg <= h->max_cmd_sgentries)
3381 c->Header.SGList = c->Header.SGTotal;
3382 else
5c07a311 3383 c->Header.SGList = h->max_cmd_sgentries;
5e216153 3384 set_performant_mode(h, c);
5c07a311 3385
33659ebb 3386 if (likely(creq->cmd_type == REQ_TYPE_FS)) {
03bbfee5
MMOD		 3387 if(h->cciss_read == CCISS_READ_10) {
3388 c->Request.CDB[1] = 0;
b028461d 3389 c->Request.CDB[2] = (start_blk >> 24) & 0xff; /* MSB */
03bbfee5
MMOD		 3390 c->Request.CDB[3] = (start_blk >> 16) & 0xff;
3391 c->Request.CDB[4] = (start_blk >> 8) & 0xff;
3392 c->Request.CDB[5] = start_blk & 0xff;
b028461d 3393 c->Request.CDB[6] = 0; /* (sect >> 24) & 0xff; MSB */
83096ebf
TH		 3394 c->Request.CDB[7] = (blk_rq_sectors(creq) >> 8) & 0xff;
3395 c->Request.CDB[8] = blk_rq_sectors(creq) & 0xff;
03bbfee5
MMOD		 3396 c->Request.CDB[9] = c->Request.CDB[11] = c->Request.CDB[12] = 0;
3397 } else {
582539e5
RD		 3398 u32 upper32 = upper_32_bits(start_blk);
3399
03bbfee5
MMOD		 3400 c->Request.CDBLen = 16;
3401 c->Request.CDB[1]= 0;
b028461d 3402 c->Request.CDB[2]= (upper32 >> 24) & 0xff; /* MSB */
582539e5
RD		 3403 c->Request.CDB[3]= (upper32 >> 16) & 0xff;
3404 c->Request.CDB[4]= (upper32 >> 8) & 0xff;
3405 c->Request.CDB[5]= upper32 & 0xff;
03bbfee5
MMOD		 3406 c->Request.CDB[6]= (start_blk >> 24) & 0xff;
3407 c->Request.CDB[7]= (start_blk >> 16) & 0xff;
3408 c->Request.CDB[8]= (start_blk >> 8) & 0xff;
3409 c->Request.CDB[9]= start_blk & 0xff;
83096ebf
TH		 3410 c->Request.CDB[10]= (blk_rq_sectors(creq) >> 24) & 0xff;
3411 c->Request.CDB[11]= (blk_rq_sectors(creq) >> 16) & 0xff;
3412 c->Request.CDB[12]= (blk_rq_sectors(creq) >> 8) & 0xff;
3413 c->Request.CDB[13]= blk_rq_sectors(creq) & 0xff;
03bbfee5
MMOD		 3414 c->Request.CDB[14] = c->Request.CDB[15] = 0;
3415 }
33659ebb 3416 } else if (creq->cmd_type == REQ_TYPE_BLOCK_PC) {
03bbfee5
MMOD		 3417 c->Request.CDBLen = creq->cmd_len;
3418 memcpy(c->Request.CDB, creq->cmd, BLK_MAX_CDB);
00988a35 3419 } else {
b2a4a43d
SC		 3420 dev_warn(&h->pdev->dev, "bad request type %d\n",
3421 creq->cmd_type);
03bbfee5 3422 BUG();
00988a35 3423 }
1da177e4
LT		 3424
3425 spin_lock_irq(q->queue_lock);
3426
8a3173de 3427 addQ(&h->reqQ, c);
1da177e4 3428 h->Qdepth++;
7c832835
BH		 3429 if (h->Qdepth > h->maxQsinceinit)
3430 h->maxQsinceinit = h->Qdepth;
1da177e4
LT		 3431
3432 goto queue;
00988a35 3433full:
1da177e4 3434 blk_stop_queue(q);
00988a35 3435startio:
1da177e4
LT		 3436 /* We will already have the driver lock here so not need
3437 * to lock it.
7c832835 3438 */
1da177e4
LT		 3439 start_io(h);
3440}
3441
3da8b713 3442static inline unsigned long get_next_completion(ctlr_info_t *h)
3443{
3da8b713 3444 return h->access.command_completed(h);
3da8b713 3445}
3446
3447static inline int interrupt_pending(ctlr_info_t *h)
3448{
3da8b713 3449 return h->access.intr_pending(h);
3da8b713 3450}
3451
3452static inline long interrupt_not_for_us(ctlr_info_t *h)
3453{
81125860 3454 return ((h->access.intr_pending(h) == 0) ||
2cf3af1c 3455 (h->interrupts_enabled == 0));
3da8b713 3456}
3457
0c2b3908
MM		 3458static inline int bad_tag(ctlr_info_t *h, u32 tag_index,
3459 u32 raw_tag)
1da177e4 3460{
0c2b3908
MM		 3461 if (unlikely(tag_index >= h->nr_cmds)) {
3462 dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag);
3463 return 1;
3464 }
3465 return 0;
3466}
3467
3468static inline void finish_cmd(ctlr_info_t *h, CommandList_struct *c,
3469 u32 raw_tag)
3470{
3471 removeQ(c);
3472 if (likely(c->cmd_type == CMD_RWREQ))
3473 complete_command(h, c, 0);
3474 else if (c->cmd_type == CMD_IOCTL_PEND)
3475 complete(c->waiting);
3476#ifdef CONFIG_CISS_SCSI_TAPE
3477 else if (c->cmd_type == CMD_SCSI)
3478 complete_scsi_command(c, 0, raw_tag);
3479#endif
3480}
3481
29979a71
MM		 3482static inline u32 next_command(ctlr_info_t *h)
3483{
3484 u32 a;
3485
0498cc2a 3486 if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant)))
29979a71
MM		 3487 return h->access.command_completed(h);
3488
3489 if ((*(h->reply_pool_head) & 1) == (h->reply_pool_wraparound)) {
3490 a = *(h->reply_pool_head); /* Next cmd in ring buffer */
3491 (h->reply_pool_head)++;
3492 h->commands_outstanding--;
3493 } else {
3494 a = FIFO_EMPTY;
3495 }
3496 /* Check for wraparound */
3497 if (h->reply_pool_head == (h->reply_pool + h->max_commands)) {
3498 h->reply_pool_head = h->reply_pool;
3499 h->reply_pool_wraparound ^= 1;
3500 }
3501 return a;
3502}
3503
0c2b3908
MM		 3504/* process completion of an indexed ("direct lookup") command */
3505static inline u32 process_indexed_cmd(ctlr_info_t *h, u32 raw_tag)
3506{
3507 u32 tag_index;
1da177e4 3508 CommandList_struct *c;
0c2b3908
MM		 3509
3510 tag_index = cciss_tag_to_index(raw_tag);
3511 if (bad_tag(h, tag_index, raw_tag))
5e216153 3512 return next_command(h);
0c2b3908
MM		 3513 c = h->cmd_pool + tag_index;
3514 finish_cmd(h, c, raw_tag);
5e216153 3515 return next_command(h);
0c2b3908
MM		 3516}
3517
3518/* process completion of a non-indexed command */
3519static inline u32 process_nonindexed_cmd(ctlr_info_t *h, u32 raw_tag)
3520{
0c2b3908 3521 CommandList_struct *c = NULL;
0c2b3908
MM		 3522 __u32 busaddr_masked, tag_masked;
3523
0498cc2a 3524 tag_masked = cciss_tag_discard_error_bits(h, raw_tag);
e6e1ee93 3525 list_for_each_entry(c, &h->cmpQ, list) {
0498cc2a 3526 busaddr_masked = cciss_tag_discard_error_bits(h, c->busaddr);
0c2b3908
MM		 3527 if (busaddr_masked == tag_masked) {
3528 finish_cmd(h, c, raw_tag);
5e216153 3529 return next_command(h);
0c2b3908
MM		 3530 }
3531 }
3532 bad_tag(h, h->nr_cmds + 1, raw_tag);
5e216153 3533 return next_command(h);
0c2b3908
MM		 3534}
3535
5afe2781
SC		 3536/* Some controllers, like p400, will give us one interrupt
3537 * after a soft reset, even if we turned interrupts off.
3538 * Only need to check for this in the cciss_xxx_discard_completions
3539 * functions.
3540 */
3541static int ignore_bogus_interrupt(ctlr_info_t *h)
3542{
3543 if (likely(!reset_devices))
3544 return 0;
3545
3546 if (likely(h->interrupts_enabled))
3547 return 0;
3548
3549 dev_info(&h->pdev->dev, "Received interrupt while interrupts disabled "
3550 "(known firmware bug.) Ignoring.\n");
3551
3552 return 1;
3553}
3554
3555static irqreturn_t cciss_intx_discard_completions(int irq, void *dev_id)
3556{
3557 ctlr_info_t *h = dev_id;
3558 unsigned long flags;
3559 u32 raw_tag;
3560
3561 if (ignore_bogus_interrupt(h))
3562 return IRQ_NONE;
3563
3564 if (interrupt_not_for_us(h))
3565 return IRQ_NONE;
3566 spin_lock_irqsave(&h->lock, flags);
3567 while (interrupt_pending(h)) {
3568 raw_tag = get_next_completion(h);
3569 while (raw_tag != FIFO_EMPTY)
3570 raw_tag = next_command(h);
3571 }
3572 spin_unlock_irqrestore(&h->lock, flags);
3573 return IRQ_HANDLED;
3574}
3575
3576static irqreturn_t cciss_msix_discard_completions(int irq, void *dev_id)
3577{
3578 ctlr_info_t *h = dev_id;
3579 unsigned long flags;
3580 u32 raw_tag;
3581
3582 if (ignore_bogus_interrupt(h))
3583 return IRQ_NONE;
3584
3585 spin_lock_irqsave(&h->lock, flags);
3586 raw_tag = get_next_completion(h);
3587 while (raw_tag != FIFO_EMPTY)
3588 raw_tag = next_command(h);
3589 spin_unlock_irqrestore(&h->lock, flags);
3590 return IRQ_HANDLED;
3591}
3592
0c2b3908
MM		 3593static irqreturn_t do_cciss_intx(int irq, void *dev_id)
3594{
3595 ctlr_info_t *h = dev_id;
1da177e4 3596 unsigned long flags;
0c2b3908 3597 u32 raw_tag;
1da177e4 3598
3da8b713 3599 if (interrupt_not_for_us(h))
1da177e4 3600 return IRQ_NONE;
f70dba83 3601 spin_lock_irqsave(&h->lock, flags);
3da8b713 3602 while (interrupt_pending(h)) {
0c2b3908
MM		 3603 raw_tag = get_next_completion(h);
3604 while (raw_tag != FIFO_EMPTY) {
3605 if (cciss_tag_contains_index(raw_tag))
3606 raw_tag = process_indexed_cmd(h, raw_tag);
3607 else
3608 raw_tag = process_nonindexed_cmd(h, raw_tag);
1da177e4
LT		 3609 }
3610 }
f70dba83 3611 spin_unlock_irqrestore(&h->lock, flags);
0c2b3908
MM		 3612 return IRQ_HANDLED;
3613}
1da177e4 3614
0c2b3908
MM		 3615/* Add a second interrupt handler for MSI/MSI-X mode. In this mode we never
3616 * check the interrupt pending register because it is not set.
3617 */
3618static irqreturn_t do_cciss_msix_intr(int irq, void *dev_id)
3619{
3620 ctlr_info_t *h = dev_id;
3621 unsigned long flags;
3622 u32 raw_tag;
8a3173de 3623
f70dba83 3624 spin_lock_irqsave(&h->lock, flags);
0c2b3908
MM		 3625 raw_tag = get_next_completion(h);
3626 while (raw_tag != FIFO_EMPTY) {
3627 if (cciss_tag_contains_index(raw_tag))
3628 raw_tag = process_indexed_cmd(h, raw_tag);
3629 else
3630 raw_tag = process_nonindexed_cmd(h, raw_tag);
1da177e4 3631 }
f70dba83 3632 spin_unlock_irqrestore(&h->lock, flags);
1da177e4
LT		 3633 return IRQ_HANDLED;
3634}
7c832835 3635
b368c9dd
AP		 3636/**
3637 * add_to_scan_list() - add controller to rescan queue
3638 * @h: Pointer to the controller.
3639 *
3640 * Adds the controller to the rescan queue if not already on the queue.
3641 *
3642 * returns 1 if added to the queue, 0 if skipped (could be on the
3643 * queue already, or the controller could be initializing or shutting
3644 * down).
3645 **/
3646static int add_to_scan_list(struct ctlr_info *h)
3647{
3648 struct ctlr_info *test_h;
3649 int found = 0;
3650 int ret = 0;
3651
3652 if (h->busy_initializing)
3653 return 0;
3654
3655 if (!mutex_trylock(&h->busy_shutting_down))
3656 return 0;
3657
3658 mutex_lock(&scan_mutex);
3659 list_for_each_entry(test_h, &scan_q, scan_list) {
3660 if (test_h == h) {
3661 found = 1;
3662 break;
3663 }
3664 }
3665 if (!found && !h->busy_scanning) {
3666 INIT_COMPLETION(h->scan_wait);
3667 list_add_tail(&h->scan_list, &scan_q);
3668 ret = 1;
3669 }
3670 mutex_unlock(&scan_mutex);
3671 mutex_unlock(&h->busy_shutting_down);
3672
3673 return ret;
3674}
3675
3676/**
3677 * remove_from_scan_list() - remove controller from rescan queue
3678 * @h: Pointer to the controller.
3679 *
3680 * Removes the controller from the rescan queue if present. Blocks if
fd8489cf
SC		 3681 * the controller is currently conducting a rescan. The controller
3682 * can be in one of three states:
3683 * 1. Doesn't need a scan
3684 * 2. On the scan list, but not scanning yet (we remove it)
3685 * 3. Busy scanning (and not on the list). In this case we want to wait for
3686 * the scan to complete to make sure the scanning thread for this
3687 * controller is completely idle.
b368c9dd
AP		 3688 **/
3689static void remove_from_scan_list(struct ctlr_info *h)
3690{
3691 struct ctlr_info *test_h, *tmp_h;
b368c9dd
AP		 3692
3693 mutex_lock(&scan_mutex);
3694 list_for_each_entry_safe(test_h, tmp_h, &scan_q, scan_list) {
fd8489cf 3695 if (test_h == h) { /* state 2. */
b368c9dd
AP		 3696 list_del(&h->scan_list);
3697 complete_all(&h->scan_wait);
3698 mutex_unlock(&scan_mutex);
3699 return;
3700 }
3701 }
fd8489cf
SC		 3702 if (h->busy_scanning) { /* state 3. */
3703 mutex_unlock(&scan_mutex);
b368c9dd 3704 wait_for_completion(&h->scan_wait);
fd8489cf
SC		 3705 } else { /* state 1, nothing to do. */
3706 mutex_unlock(&scan_mutex);
3707 }
b368c9dd
AP		 3708}
3709
3710/**
3711 * scan_thread() - kernel thread used to rescan controllers
3712 * @data: Ignored.
3713 *
3714 * A kernel thread used scan for drive topology changes on
3715 * controllers. The thread processes only one controller at a time
3716 * using a queue. Controllers are added to the queue using
3717 * add_to_scan_list() and removed from the queue either after done
3718 * processing or using remove_from_scan_list().
3719 *
3720 * returns 0.
3721 **/
0a9279cc
MM		 3722static int scan_thread(void *data)
3723{
b368c9dd 3724 struct ctlr_info *h;
0a9279cc 3725
b368c9dd
AP		 3726 while (1) {
3727 set_current_state(TASK_INTERRUPTIBLE);
3728 schedule();
0a9279cc
MM		 3729 if (kthread_should_stop())
3730 break;
b368c9dd
AP		 3731
3732 while (1) {
3733 mutex_lock(&scan_mutex);
3734 if (list_empty(&scan_q)) {
3735 mutex_unlock(&scan_mutex);
3736 break;
3737 }
3738
3739 h = list_entry(scan_q.next,
3740 struct ctlr_info,
3741 scan_list);
3742 list_del(&h->scan_list);
3743 h->busy_scanning = 1;
3744 mutex_unlock(&scan_mutex);
3745
d06dfbd2
SC		 3746 rebuild_lun_table(h, 0, 0);
3747 complete_all(&h->scan_wait);
3748 mutex_lock(&scan_mutex);
3749 h->busy_scanning = 0;
3750 mutex_unlock(&scan_mutex);
b368c9dd 3751 }
0a9279cc 3752 }
b368c9dd 3753
0a9279cc
MM		 3754 return 0;
3755}
3756
3757static int check_for_unit_attention(ctlr_info_t *h, CommandList_struct *c)
3758{
3759 if (c->err_info->SenseInfo[2] != UNIT_ATTENTION)
3760 return 0;
3761
3762 switch (c->err_info->SenseInfo[12]) {
3763 case STATE_CHANGED:
b2a4a43d
SC		 3764 dev_warn(&h->pdev->dev, "a state change "
3765 "detected, command retried\n");
0a9279cc
MM		 3766 return 1;
3767 break;
3768 case LUN_FAILED:
b2a4a43d
SC		 3769 dev_warn(&h->pdev->dev, "LUN failure "
3770 "detected, action required\n");
0a9279cc
MM		 3771 return 1;
3772 break;
3773 case REPORT_LUNS_CHANGED:
b2a4a43d 3774 dev_warn(&h->pdev->dev, "report LUN data changed\n");
da002184
SC		 3775 /*
3776 * Here, we could call add_to_scan_list and wake up the scan thread,
3777 * except that it's quite likely that we will get more than one
3778 * REPORT_LUNS_CHANGED condition in quick succession, which means
3779 * that those which occur after the first one will likely happen
3780 * *during* the scan_thread's rescan. And the rescan code is not
3781 * robust enough to restart in the middle, undoing what it has already
3782 * done, and it's not clear that it's even possible to do this, since
3783 * part of what it does is notify the block layer, which starts
3784 * doing it's own i/o to read partition tables and so on, and the
3785 * driver doesn't have visibility to know what might need undoing.
3786 * In any event, if possible, it is horribly complicated to get right
3787 * so we just don't do it for now.
3788 *
3789 * Note: this REPORT_LUNS_CHANGED condition only occurs on the MSA2012.
3790 */
0a9279cc
MM		 3791 return 1;
3792 break;
3793 case POWER_OR_RESET:
b2a4a43d
SC		 3794 dev_warn(&h->pdev->dev,
3795 "a power on or device reset detected\n");
0a9279cc
MM		 3796 return 1;
3797 break;
3798 case UNIT_ATTENTION_CLEARED:
b2a4a43d
SC		 3799 dev_warn(&h->pdev->dev,
3800 "unit attention cleared by another initiator\n");
0a9279cc
MM		 3801 return 1;
3802 break;
3803 default:
b2a4a43d
SC		 3804 dev_warn(&h->pdev->dev, "unknown unit attention detected\n");
3805 return 1;
0a9279cc
MM		 3806 }
3807}
3808
7c832835 3809/*
d14c4ab5 3810 * We cannot read the structure directly, for portability we must use
1da177e4 3811 * the io functions.
7c832835 3812 * This is for debug only.
1da177e4 3813 */
b2a4a43d 3814static void print_cfg_table(ctlr_info_t *h)
1da177e4
LT		 3815{
3816 int i;
3817 char temp_name[17];
b2a4a43d 3818 CfgTable_struct *tb = h->cfgtable;
1da177e4 3819
b2a4a43d
SC		 3820 dev_dbg(&h->pdev->dev, "Controller Configuration information\n");
3821 dev_dbg(&h->pdev->dev, "------------------------------------\n");
7c832835 3822 for (i = 0; i < 4; i++)
1da177e4 3823 temp_name[i] = readb(&(tb->Signature[i]));
7c832835 3824 temp_name[4] = '\0';
b2a4a43d
SC		 3825 dev_dbg(&h->pdev->dev, " Signature = %s\n", temp_name);
3826 dev_dbg(&h->pdev->dev, " Spec Number = %d\n",
3827 readl(&(tb->SpecValence)));
3828 dev_dbg(&h->pdev->dev, " Transport methods supported = 0x%x\n",
7c832835 3829 readl(&(tb->TransportSupport)));
b2a4a43d 3830 dev_dbg(&h->pdev->dev, " Transport methods active = 0x%x\n",
7c832835 3831 readl(&(tb->TransportActive)));
b2a4a43d 3832 dev_dbg(&h->pdev->dev, " Requested transport Method = 0x%x\n",
7c832835 3833 readl(&(tb->HostWrite.TransportRequest)));
b2a4a43d 3834 dev_dbg(&h->pdev->dev, " Coalesce Interrupt Delay = 0x%x\n",
7c832835 3835 readl(&(tb->HostWrite.CoalIntDelay)));
b2a4a43d 3836 dev_dbg(&h->pdev->dev, " Coalesce Interrupt Count = 0x%x\n",
7c832835 3837 readl(&(tb->HostWrite.CoalIntCount)));
b2a4a43d 3838 dev_dbg(&h->pdev->dev, " Max outstanding commands = 0x%d\n",
7c832835 3839 readl(&(tb->CmdsOutMax)));
b2a4a43d
SC		 3840 dev_dbg(&h->pdev->dev, " Bus Types = 0x%x\n",
3841 readl(&(tb->BusTypes)));
7c832835 3842 for (i = 0; i < 16; i++)
1da177e4
LT		 3843 temp_name[i] = readb(&(tb->ServerName[i]));
3844 temp_name[16] = '\0';
b2a4a43d
SC		 3845 dev_dbg(&h->pdev->dev, " Server Name = %s\n", temp_name);
3846 dev_dbg(&h->pdev->dev, " Heartbeat Counter = 0x%x\n\n\n",
3847 readl(&(tb->HeartBeat)));
1da177e4 3848}
1da177e4 3849
7c832835 3850static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr)
1da177e4
LT		 3851{
3852 int i, offset, mem_type, bar_type;
7c832835 3853 if (pci_bar_addr == PCI_BASE_ADDRESS_0) /* looking for BAR zero? */
1da177e4
LT		 3854 return 0;
3855 offset = 0;
7c832835
BH		 3856 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
3857 bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE;
1da177e4
LT		 3858 if (bar_type == PCI_BASE_ADDRESS_SPACE_IO)
3859 offset += 4;
3860 else {
3861 mem_type = pci_resource_flags(pdev, i) &
7c832835 3862 PCI_BASE_ADDRESS_MEM_TYPE_MASK;
1da177e4 3863 switch (mem_type) {
7c832835
BH		 3864 case PCI_BASE_ADDRESS_MEM_TYPE_32:
3865 case PCI_BASE_ADDRESS_MEM_TYPE_1M:
3866 offset += 4; /* 32 bit */
3867 break;
3868 case PCI_BASE_ADDRESS_MEM_TYPE_64:
3869 offset += 8;
3870 break;
3871 default: /* reserved in PCI 2.2 */
b2a4a43d 3872 dev_warn(&pdev->dev,
7c832835
BH		 3873 "Base address is invalid\n");
3874 return -1;
1da177e4
LT		 3875 break;
3876 }
3877 }
7c832835
BH		 3878 if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0)
3879 return i + 1;
1da177e4
LT		 3880 }
3881 return -1;
3882}
3883
5e216153
MM		 3884/* Fill in bucket_map[], given nsgs (the max number of
3885 * scatter gather elements supported) and bucket[],
3886 * which is an array of 8 integers. The bucket[] array
3887 * contains 8 different DMA transfer sizes (in 16
3888 * byte increments) which the controller uses to fetch
3889 * commands. This function fills in bucket_map[], which
3890 * maps a given number of scatter gather elements to one of
3891 * the 8 DMA transfer sizes. The point of it is to allow the
3892 * controller to only do as much DMA as needed to fetch the
3893 * command, with the DMA transfer size encoded in the lower
3894 * bits of the command address.
3895 */
3896static void calc_bucket_map(int bucket[], int num_buckets,
3897 int nsgs, int *bucket_map)
3898{
3899 int i, j, b, size;
3900
3901 /* even a command with 0 SGs requires 4 blocks */
3902#define MINIMUM_TRANSFER_BLOCKS 4
3903#define NUM_BUCKETS 8
3904 /* Note, bucket_map must have nsgs+1 entries. */
3905 for (i = 0; i <= nsgs; i++) {
3906 /* Compute size of a command with i SG entries */
3907 size = i + MINIMUM_TRANSFER_BLOCKS;
3908 b = num_buckets; /* Assume the biggest bucket */
3909 /* Find the bucket that is just big enough */
3910 for (j = 0; j < 8; j++) {
3911 if (bucket[j] >= size) {
3912 b = j;
3913 break;
3914 }
3915 }
3916 /* for a command with i SG entries, use bucket b. */
3917 bucket_map[i] = b;
3918 }
3919}
3920
0f8a6a1e
SC		 3921static void __devinit cciss_wait_for_mode_change_ack(ctlr_info_t *h)
3922{
3923 int i;
3924
3925 /* under certain very rare conditions, this can take awhile.
3926 * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right
3927 * as we enter this code.) */
3928 for (i = 0; i < MAX_CONFIG_WAIT; i++) {
3929 if (!(readl(h->vaddr + SA5_DOORBELL) & CFGTBL_ChangeReq))
3930 break;
332c2f80 3931 usleep_range(10000, 20000);
0f8a6a1e
SC		 3932 }
3933}
3934
0498cc2a
SC		 3935static __devinit void cciss_enter_performant_mode(ctlr_info_t *h,
3936 u32 use_short_tags)
b9933135
SC		 3937{
3938 /* This is a bit complicated. There are 8 registers on
3939 * the controller which we write to to tell it 8 different
3940 * sizes of commands which there may be. It's a way of
3941 * reducing the DMA done to fetch each command. Encoded into
3942 * each command's tag are 3 bits which communicate to the controller
3943 * which of the eight sizes that command fits within. The size of
3944 * each command depends on how many scatter gather entries there are.
3945 * Each SG entry requires 16 bytes. The eight registers are programmed
3946 * with the number of 16-byte blocks a command of that size requires.
3947 * The smallest command possible requires 5 such 16 byte blocks.
3948 * the largest command possible requires MAXSGENTRIES + 4 16-byte
3949 * blocks. Note, this only extends to the SG entries contained
3950 * within the command block, and does not extend to chained blocks
3951 * of SG elements. bft[] contains the eight values we write to
3952 * the registers. They are not evenly distributed, but have more
3953 * sizes for small commands, and fewer sizes for larger commands.
3954 */
5e216153 3955 __u32 trans_offset;
b9933135 3956 int bft[8] = { 5, 6, 8, 10, 12, 20, 28, MAXSGENTRIES + 4};
5e216153
MM		 3957 /*
3958 * 5 = 1 s/g entry or 4k
3959 * 6 = 2 s/g entry or 8k
3960 * 8 = 4 s/g entry or 16k
3961 * 10 = 6 s/g entry or 24k
3962 */
5e216153 3963 unsigned long register_value;
5e216153
MM		 3964 BUILD_BUG_ON(28 > MAXSGENTRIES + 4);
3965
5e216153
MM		 3966 h->reply_pool_wraparound = 1; /* spec: init to 1 */
3967
3968 /* Controller spec: zero out this buffer. */
3969 memset(h->reply_pool, 0, h->max_commands * sizeof(__u64));
3970 h->reply_pool_head = h->reply_pool;
3971
3972 trans_offset = readl(&(h->cfgtable->TransMethodOffset));
3973 calc_bucket_map(bft, ARRAY_SIZE(bft), h->maxsgentries,
3974 h->blockFetchTable);
3975 writel(bft[0], &h->transtable->BlockFetch0);
3976 writel(bft[1], &h->transtable->BlockFetch1);
3977 writel(bft[2], &h->transtable->BlockFetch2);
3978 writel(bft[3], &h->transtable->BlockFetch3);
3979 writel(bft[4], &h->transtable->BlockFetch4);
3980 writel(bft[5], &h->transtable->BlockFetch5);
3981 writel(bft[6], &h->transtable->BlockFetch6);
3982 writel(bft[7], &h->transtable->BlockFetch7);
3983
3984 /* size of controller ring buffer */
3985 writel(h->max_commands, &h->transtable->RepQSize);
3986 writel(1, &h->transtable->RepQCount);
3987 writel(0, &h->transtable->RepQCtrAddrLow32);
3988 writel(0, &h->transtable->RepQCtrAddrHigh32);
3989 writel(h->reply_pool_dhandle, &h->transtable->RepQAddr0Low32);
3990 writel(0, &h->transtable->RepQAddr0High32);
0498cc2a 3991 writel(CFGTBL_Trans_Performant | use_short_tags,
5e216153
MM		 3992 &(h->cfgtable->HostWrite.TransportRequest));
3993
5e216153 3994 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
0f8a6a1e 3995 cciss_wait_for_mode_change_ack(h);
5e216153 3996 register_value = readl(&(h->cfgtable->TransportActive));
b9933135 3997 if (!(register_value & CFGTBL_Trans_Performant))
b2a4a43d 3998 dev_warn(&h->pdev->dev, "cciss: unable to get board into"
5e216153 3999 " performant mode\n");
b9933135
SC		 4000}
4001
4002static void __devinit cciss_put_controller_into_performant_mode(ctlr_info_t *h)
4003{
4004 __u32 trans_support;
4005
13049537
JH		 4006 if (cciss_simple_mode)
4007 return;
4008
b9933135
SC		 4009 dev_dbg(&h->pdev->dev, "Trying to put board into Performant mode\n");
4010 /* Attempt to put controller into performant mode if supported */
4011 /* Does board support performant mode? */
4012 trans_support = readl(&(h->cfgtable->TransportSupport));
4013 if (!(trans_support & PERFORMANT_MODE))
4014 return;
4015
b2a4a43d 4016 dev_dbg(&h->pdev->dev, "Placing controller into performant mode\n");
b9933135
SC		 4017 /* Performant mode demands commands on a 32 byte boundary
4018 * pci_alloc_consistent aligns on page boundarys already.
4019 * Just need to check if divisible by 32
4020 */
4021 if ((sizeof(CommandList_struct) % 32) != 0) {
b2a4a43d 4022 dev_warn(&h->pdev->dev, "%s %d %s\n",
b9933135
SC		 4023 "cciss info: command size[",
4024 (int)sizeof(CommandList_struct),
4025 "] not divisible by 32, no performant mode..\n");
5e216153
MM		 4026 return;
4027 }
4028
b9933135
SC		 4029 /* Performant mode ring buffer and supporting data structures */
4030 h->reply_pool = (__u64 *)pci_alloc_consistent(
4031 h->pdev, h->max_commands * sizeof(__u64),
4032 &(h->reply_pool_dhandle));
4033
4034 /* Need a block fetch table for performant mode */
4035 h->blockFetchTable = kmalloc(((h->maxsgentries+1) *
4036 sizeof(__u32)), GFP_KERNEL);
4037
4038 if ((h->reply_pool == NULL) || (h->blockFetchTable == NULL))
4039 goto clean_up;
4040
0498cc2a
SC		 4041 cciss_enter_performant_mode(h,
4042 trans_support & CFGTBL_Trans_use_short_tags);
b9933135 4043
5e216153
MM		 4044 /* Change the access methods to the performant access methods */
4045 h->access = SA5_performant_access;
b9933135 4046 h->transMethod = CFGTBL_Trans_Performant;
5e216153
MM		 4047
4048 return;
4049clean_up:
4050 kfree(h->blockFetchTable);
4051 if (h->reply_pool)
4052 pci_free_consistent(h->pdev,
4053 h->max_commands * sizeof(__u64),
4054 h->reply_pool,
4055 h->reply_pool_dhandle);
4056 return;
4057
4058} /* cciss_put_controller_into_performant_mode */
4059
fb86a35b
MM		 4060/* If MSI/MSI-X is supported by the kernel we will try to enable it on
4061 * controllers that are capable. If not, we use IO-APIC mode.
4062 */
4063
f70dba83 4064static void __devinit cciss_interrupt_mode(ctlr_info_t *h)
fb86a35b
MM		 4065{
4066#ifdef CONFIG_PCI_MSI
7c832835
BH		 4067 int err;
4068 struct msix_entry cciss_msix_entries[4] = { {0, 0}, {0, 1},
4069 {0, 2}, {0, 3}
4070 };
fb86a35b
MM		 4071
4072 /* Some boards advertise MSI but don't really support it */
f70dba83
SC		 4073 if ((h->board_id == 0x40700E11) || (h->board_id == 0x40800E11) ||
4074 (h->board_id == 0x40820E11) || (h->board_id == 0x40830E11))
fb86a35b
MM		 4075 goto default_int_mode;
4076
f70dba83
SC		 4077 if (pci_find_capability(h->pdev, PCI_CAP_ID_MSIX)) {
4078 err = pci_enable_msix(h->pdev, cciss_msix_entries, 4);
7c832835 4079 if (!err) {
f70dba83
SC		 4080 h->intr[0] = cciss_msix_entries[0].vector;
4081 h->intr[1] = cciss_msix_entries[1].vector;
4082 h->intr[2] = cciss_msix_entries[2].vector;
4083 h->intr[3] = cciss_msix_entries[3].vector;
4084 h->msix_vector = 1;
7c832835
BH		 4085 return;
4086 }
4087 if (err > 0) {
b2a4a43d
SC		 4088 dev_warn(&h->pdev->dev,
4089 "only %d MSI-X vectors available\n", err);
1ecb9c0f 4090 goto default_int_mode;
7c832835 4091 } else {
b2a4a43d
SC		 4092 dev_warn(&h->pdev->dev,
4093 "MSI-X init failed %d\n", err);
1ecb9c0f 4094 goto default_int_mode;
7c832835
BH		 4095 }
4096 }
f70dba83
SC		 4097 if (pci_find_capability(h->pdev, PCI_CAP_ID_MSI)) {
4098 if (!pci_enable_msi(h->pdev))
4099 h->msi_vector = 1;
4100 else
b2a4a43d 4101 dev_warn(&h->pdev->dev, "MSI init failed\n");
7c832835 4102 }
1ecb9c0f 4103default_int_mode:
7c832835 4104#endif /* CONFIG_PCI_MSI */
fb86a35b 4105 /* if we get here we're going to use the default interrupt mode */
13049537 4106 h->intr[h->intr_mode] = h->pdev->irq;
fb86a35b
MM		 4107 return;
4108}
4109
6539fa9b 4110static int __devinit cciss_lookup_board_id(struct pci_dev *pdev, u32 *board_id)
1da177e4 4111{
6539fa9b
SC		 4112 int i;
4113 u32 subsystem_vendor_id, subsystem_device_id;
2ec24ff1
SC		 4114
4115 subsystem_vendor_id = pdev->subsystem_vendor;
4116 subsystem_device_id = pdev->subsystem_device;
6539fa9b
SC		 4117 *board_id = ((subsystem_device_id << 16) & 0xffff0000) |
4118 subsystem_vendor_id;
2ec24ff1 4119
4205df34 4120 for (i = 0; i < ARRAY_SIZE(products); i++)
6539fa9b
SC		 4121 if (*board_id == products[i].board_id)
4122 return i;
6539fa9b
SC		 4123 dev_warn(&pdev->dev, "unrecognized board ID: 0x%08x, ignoring.\n",
4124 *board_id);
4125 return -ENODEV;
4126}
1da177e4 4127
dd9c426e
SC		 4128static inline bool cciss_board_disabled(ctlr_info_t *h)
4129{
4130 u16 command;
1da177e4 4131
dd9c426e
SC		 4132 (void) pci_read_config_word(h->pdev, PCI_COMMAND, &command);
4133 return ((command & PCI_COMMAND_MEMORY) == 0);
4134}
1da177e4 4135
d474830d
SC		 4136static int __devinit cciss_pci_find_memory_BAR(struct pci_dev *pdev,
4137 unsigned long *memory_bar)
4138{
4139 int i;
4e570309 4140
d474830d
SC		 4141 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++)
4142 if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) {
4143 /* addressing mode bits already removed */
4144 *memory_bar = pci_resource_start(pdev, i);
4145 dev_dbg(&pdev->dev, "memory BAR = %lx\n",
4146 *memory_bar);
4147 return 0;
4148 }
4149 dev_warn(&pdev->dev, "no memory BAR found\n");
4150 return -ENODEV;
4151}
1da177e4 4152
afa842fa
SC		 4153static int __devinit cciss_wait_for_board_state(struct pci_dev *pdev,
4154 void __iomem *vaddr, int wait_for_ready)
4155#define BOARD_READY 1
4156#define BOARD_NOT_READY 0
e99ba136 4157{
afa842fa 4158 int i, iterations;
e99ba136 4159 u32 scratchpad;
1da177e4 4160
afa842fa
SC		 4161 if (wait_for_ready)
4162 iterations = CCISS_BOARD_READY_ITERATIONS;
4163 else
4164 iterations = CCISS_BOARD_NOT_READY_ITERATIONS;
4165
4166 for (i = 0; i < iterations; i++) {
4167 scratchpad = readl(vaddr + SA5_SCRATCHPAD_OFFSET);
4168 if (wait_for_ready) {
4169 if (scratchpad == CCISS_FIRMWARE_READY)
4170 return 0;
4171 } else {
4172 if (scratchpad != CCISS_FIRMWARE_READY)
4173 return 0;
4174 }
e99ba136 4175 msleep(CCISS_BOARD_READY_POLL_INTERVAL_MSECS);
e1438581 4176 }
afa842fa 4177 dev_warn(&pdev->dev, "board not ready, timed out.\n");
e99ba136
SC		 4178 return -ENODEV;
4179}
e1438581 4180
8e93bf6d
SC		 4181static int __devinit cciss_find_cfg_addrs(struct pci_dev *pdev,
4182 void __iomem *vaddr, u32 *cfg_base_addr, u64 *cfg_base_addr_index,
4183 u64 *cfg_offset)
4184{
4185 *cfg_base_addr = readl(vaddr + SA5_CTCFG_OFFSET);
4186 *cfg_offset = readl(vaddr + SA5_CTMEM_OFFSET);
4187 *cfg_base_addr &= (u32) 0x0000ffff;
4188 *cfg_base_addr_index = find_PCI_BAR_index(pdev, *cfg_base_addr);
4189 if (*cfg_base_addr_index == -1) {
4190 dev_warn(&pdev->dev, "cannot find cfg_base_addr_index, "
4191 "*cfg_base_addr = 0x%08x\n", *cfg_base_addr);
4192 return -ENODEV;
4193 }
4194 return 0;
4195}
1da177e4 4196
4809d098
SC		 4197static int __devinit cciss_find_cfgtables(ctlr_info_t *h)
4198{
4199 u64 cfg_offset;
4200 u32 cfg_base_addr;
4201 u64 cfg_base_addr_index;
4202 u32 trans_offset;
8e93bf6d 4203 int rc;
1da177e4 4204
8e93bf6d
SC		 4205 rc = cciss_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr,
4206 &cfg_base_addr_index, &cfg_offset);
4207 if (rc)
4208 return rc;
4809d098 4209 h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev,
8e93bf6d 4210 cfg_base_addr_index) + cfg_offset, sizeof(h->cfgtable));
4809d098
SC		 4211 if (!h->cfgtable)
4212 return -ENOMEM;
62710ae1
SC		 4213 rc = write_driver_ver_to_cfgtable(h->cfgtable);
4214 if (rc)
4215 return rc;
4809d098 4216 /* Find performant mode table. */
8e93bf6d 4217 trans_offset = readl(&h->cfgtable->TransMethodOffset);
4809d098
SC		 4218 h->transtable = remap_pci_mem(pci_resource_start(h->pdev,
4219 cfg_base_addr_index)+cfg_offset+trans_offset,
4220 sizeof(*h->transtable));
4221 if (!h->transtable)
4222 return -ENOMEM;
4223 return 0;
4224}
1da177e4 4225
adfbc1ff
SC		 4226static void __devinit cciss_get_max_perf_mode_cmds(struct ctlr_info *h)
4227{
4228 h->max_commands = readl(&(h->cfgtable->MaxPerformantModeCommands));
186fb9cf
SC		 4229
4230 /* Limit commands in memory limited kdump scenario. */
4231 if (reset_devices && h->max_commands > 32)
4232 h->max_commands = 32;
4233
adfbc1ff
SC		 4234 if (h->max_commands < 16) {
4235 dev_warn(&h->pdev->dev, "Controller reports "
4236 "max supported commands of %d, an obvious lie. "
4237 "Using 16. Ensure that firmware is up to date.\n",
4238 h->max_commands);
4239 h->max_commands = 16;
1da177e4 4240 }
adfbc1ff 4241}
1da177e4 4242
afadbf4b
SC		 4243/* Interrogate the hardware for some limits:
4244 * max commands, max SG elements without chaining, and with chaining,
4245 * SG chain block size, etc.
4246 */
4247static void __devinit cciss_find_board_params(ctlr_info_t *h)
4248{
adfbc1ff 4249 cciss_get_max_perf_mode_cmds(h);
8a4ec67b 4250 h->nr_cmds = h->max_commands - 4 - cciss_tape_cmds;
afadbf4b 4251 h->maxsgentries = readl(&(h->cfgtable->MaxSGElements));
5c07a311 4252 /*
afadbf4b 4253 * Limit in-command s/g elements to 32 save dma'able memory.
5c07a311
DB		 4254 * Howvever spec says if 0, use 31
4255 */
afadbf4b
SC		 4256 h->max_cmd_sgentries = 31;
4257 if (h->maxsgentries > 512) {
4258 h->max_cmd_sgentries = 32;
4259 h->chainsize = h->maxsgentries - h->max_cmd_sgentries + 1;
4260 h->maxsgentries--; /* save one for chain pointer */
5c07a311 4261 } else {
afadbf4b
SC		 4262 h->maxsgentries = 31; /* default to traditional values */
4263 h->chainsize = 0;
5c07a311 4264 }
afadbf4b 4265}
5c07a311 4266
501b92cd
SC		 4267static inline bool CISS_signature_present(ctlr_info_t *h)
4268{
4269 if ((readb(&h->cfgtable->Signature[0]) != 'C') ||
4270 (readb(&h->cfgtable->Signature[1]) != 'I') ||
4271 (readb(&h->cfgtable->Signature[2]) != 'S') ||
4272 (readb(&h->cfgtable->Signature[3]) != 'S')) {
4273 dev_warn(&h->pdev->dev, "not a valid CISS config table\n");
4274 return false;
1da177e4 4275 }
501b92cd
SC		 4276 return true;
4277}
4278
322e304c
SC		 4279/* Need to enable prefetch in the SCSI core for 6400 in x86 */
4280static inline void cciss_enable_scsi_prefetch(ctlr_info_t *h)
4281{
1da177e4 4282#ifdef CONFIG_X86
322e304c
SC		 4283 u32 prefetch;
4284
4285 prefetch = readl(&(h->cfgtable->SCSI_Prefetch));
4286 prefetch |= 0x100;
4287 writel(prefetch, &(h->cfgtable->SCSI_Prefetch));
1da177e4 4288#endif
322e304c 4289}
1da177e4 4290
bfd63ee5
SC		 4291/* Disable DMA prefetch for the P600. Otherwise an ASIC bug may result
4292 * in a prefetch beyond physical memory.
4293 */
4294static inline void cciss_p600_dma_prefetch_quirk(ctlr_info_t *h)
4295{
4296 u32 dma_prefetch;
4297 __u32 dma_refetch;
4298
4299 if (h->board_id != 0x3225103C)
4300 return;
4301 dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG);
4302 dma_prefetch |= 0x8000;
4303 writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG);
4304 pci_read_config_dword(h->pdev, PCI_COMMAND_PARITY, &dma_refetch);
4305 dma_refetch |= 0x1;
4306 pci_write_config_dword(h->pdev, PCI_COMMAND_PARITY, dma_refetch);
4307}
4308
f70dba83 4309static int __devinit cciss_pci_init(ctlr_info_t *h)
6539fa9b 4310{
4809d098 4311 int prod_index, err;
6539fa9b 4312
f70dba83 4313 prod_index = cciss_lookup_board_id(h->pdev, &h->board_id);
6539fa9b 4314 if (prod_index < 0)
2ec24ff1 4315 return -ENODEV;
f70dba83
SC		 4316 h->product_name = products[prod_index].product_name;
4317 h->access = *(products[prod_index].access);
1da177e4 4318
f70dba83 4319 if (cciss_board_disabled(h)) {
b2a4a43d 4320 dev_warn(&h->pdev->dev, "controller appears to be disabled\n");
c33ac89b 4321 return -ENODEV;
1da177e4 4322 }
19373358
MG		 4323
4324 pci_disable_link_state(h->pdev, PCIE_LINK_STATE_L0S |
4325 PCIE_LINK_STATE_L1 | PCIE_LINK_STATE_CLKPM);
4326
f70dba83 4327 err = pci_enable_device(h->pdev);
7c832835 4328 if (err) {
b2a4a43d 4329 dev_warn(&h->pdev->dev, "Unable to Enable PCI device\n");
c33ac89b 4330 return err;
f92e2f5f
MM		 4331 }
4332
f70dba83 4333 err = pci_request_regions(h->pdev, "cciss");
4e570309 4334 if (err) {
b2a4a43d
SC		 4335 dev_warn(&h->pdev->dev,
4336 "Cannot obtain PCI resources, aborting\n");
872225ca 4337 return err;
4e570309 4338 }
1da177e4 4339
b2a4a43d
SC		 4340 dev_dbg(&h->pdev->dev, "irq = %x\n", h->pdev->irq);
4341 dev_dbg(&h->pdev->dev, "board_id = %x\n", h->board_id);
1da177e4 4342
fb86a35b
MM		 4343/* If the kernel supports MSI/MSI-X we will try to enable that functionality,
4344 * else we use the IO-APIC interrupt assigned to us by system ROM.
4345 */
f70dba83
SC		 4346 cciss_interrupt_mode(h);
4347 err = cciss_pci_find_memory_BAR(h->pdev, &h->paddr);
d474830d 4348 if (err)
e1438581 4349 goto err_out_free_res;
f70dba83
SC		 4350 h->vaddr = remap_pci_mem(h->paddr, 0x250);
4351 if (!h->vaddr) {
da550321
SC		 4352 err = -ENOMEM;
4353 goto err_out_free_res;
7c832835 4354 }
afa842fa 4355 err = cciss_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY);
e99ba136 4356 if (err)
4e570309 4357 goto err_out_free_res;
f70dba83 4358 err = cciss_find_cfgtables(h);
4809d098 4359 if (err)
4e570309 4360 goto err_out_free_res;
b2a4a43d 4361 print_cfg_table(h);
f70dba83 4362 cciss_find_board_params(h);
1da177e4 4363
f70dba83 4364 if (!CISS_signature_present(h)) {
c33ac89b 4365 err = -ENODEV;
4e570309 4366 goto err_out_free_res;
1da177e4 4367 }
f70dba83
SC		 4368 cciss_enable_scsi_prefetch(h);
4369 cciss_p600_dma_prefetch_quirk(h);
13049537
JH		 4370 err = cciss_enter_simple_mode(h);
4371 if (err)
4372 goto err_out_free_res;
f70dba83 4373 cciss_put_controller_into_performant_mode(h);
1da177e4
LT		 4374 return 0;
4375
5faad620 4376err_out_free_res:
872225ca
MM		 4377 /*
4378 * Deliberately omit pci_disable_device(): it does something nasty to
4379 * Smart Array controllers that pci_enable_device does not undo
4380 */
f70dba83
SC		 4381 if (h->transtable)
4382 iounmap(h->transtable);
4383 if (h->cfgtable)
4384 iounmap(h->cfgtable);
4385 if (h->vaddr)
4386 iounmap(h->vaddr);
4387 pci_release_regions(h->pdev);
c33ac89b 4388 return err;
1da177e4
LT		 4389}
4390
6ae5ce8e
MM		 4391/* Function to find the first free pointer into our hba[] array
4392 * Returns -1 if no free entries are left.
7c832835 4393 */
b2a4a43d 4394static int alloc_cciss_hba(struct pci_dev *pdev)
1da177e4 4395{
799202cb 4396 int i;
1da177e4 4397
7c832835 4398 for (i = 0; i < MAX_CTLR; i++) {
1da177e4 4399 if (!hba[i]) {
f70dba83 4400 ctlr_info_t *h;
f2912a12 4401
f70dba83
SC		 4402 h = kzalloc(sizeof(ctlr_info_t), GFP_KERNEL);
4403 if (!h)
1da177e4 4404 goto Enomem;
f70dba83 4405 hba[i] = h;
1da177e4
LT		 4406 return i;
4407 }
4408 }
b2a4a43d 4409 dev_warn(&pdev->dev, "This driver supports a maximum"
7c832835 4410 " of %d controllers.\n", MAX_CTLR);
799202cb
MM		 4411 return -1;
4412Enomem:
b2a4a43d 4413 dev_warn(&pdev->dev, "out of memory.\n");
1da177e4
LT		 4414 return -1;
4415}
4416
f70dba83 4417static void free_hba(ctlr_info_t *h)
1da177e4 4418{
2c935593 4419 int i;
1da177e4 4420
f70dba83 4421 hba[h->ctlr] = NULL;
2c935593
SC		 4422 for (i = 0; i < h->highest_lun + 1; i++)
4423 if (h->gendisk[i] != NULL)
4424 put_disk(h->gendisk[i]);
4425 kfree(h);
1da177e4
LT		 4426}
4427
82eb03cf
CC		 4428/* Send a message CDB to the firmware. */
4429static __devinit int cciss_message(struct pci_dev *pdev, unsigned char opcode, unsigned char type)
4430{
4431 typedef struct {
4432 CommandListHeader_struct CommandHeader;
4433 RequestBlock_struct Request;
4434 ErrDescriptor_struct ErrorDescriptor;
4435 } Command;
4436 static const size_t cmd_sz = sizeof(Command) + sizeof(ErrorInfo_struct);
4437 Command *cmd;
4438 dma_addr_t paddr64;
4439 uint32_t paddr32, tag;
4440 void __iomem *vaddr;
4441 int i, err;
4442
4443 vaddr = ioremap_nocache(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0));
4444 if (vaddr == NULL)
4445 return -ENOMEM;
4446
4447 /* The Inbound Post Queue only accepts 32-bit physical addresses for the
4448 CCISS commands, so they must be allocated from the lower 4GiB of
4449 memory. */
e930438c 4450 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
82eb03cf
CC		 4451 if (err) {
4452 iounmap(vaddr);
4453 return -ENOMEM;
4454 }
4455
4456 cmd = pci_alloc_consistent(pdev, cmd_sz, &paddr64);
4457 if (cmd == NULL) {
4458 iounmap(vaddr);
4459 return -ENOMEM;
4460 }
4461
4462 /* This must fit, because of the 32-bit consistent DMA mask. Also,
4463 although there's no guarantee, we assume that the address is at
4464 least 4-byte aligned (most likely, it's page-aligned). */
4465 paddr32 = paddr64;
4466
4467 cmd->CommandHeader.ReplyQueue = 0;
4468 cmd->CommandHeader.SGList = 0;
4469 cmd->CommandHeader.SGTotal = 0;
4470 cmd->CommandHeader.Tag.lower = paddr32;
4471 cmd->CommandHeader.Tag.upper = 0;
4472 memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8);
4473
4474 cmd->Request.CDBLen = 16;
4475 cmd->Request.Type.Type = TYPE_MSG;
4476 cmd->Request.Type.Attribute = ATTR_HEADOFQUEUE;
4477 cmd->Request.Type.Direction = XFER_NONE;
4478 cmd->Request.Timeout = 0; /* Don't time out */
4479 cmd->Request.CDB[0] = opcode;
4480 cmd->Request.CDB[1] = type;
4481 memset(&cmd->Request.CDB[2], 0, 14); /* the rest of the CDB is reserved */
4482
4483 cmd->ErrorDescriptor.Addr.lower = paddr32 + sizeof(Command);
4484 cmd->ErrorDescriptor.Addr.upper = 0;
4485 cmd->ErrorDescriptor.Len = sizeof(ErrorInfo_struct);
4486
4487 writel(paddr32, vaddr + SA5_REQUEST_PORT_OFFSET);
4488
4489 for (i = 0; i < 10; i++) {
4490 tag = readl(vaddr + SA5_REPLY_PORT_OFFSET);
4491 if ((tag & ~3) == paddr32)
4492 break;
3e28601f 4493 msleep(CCISS_POST_RESET_NOOP_TIMEOUT_MSECS);
82eb03cf
CC		 4494 }
4495
4496 iounmap(vaddr);
4497
4498 /* we leak the DMA buffer here ... no choice since the controller could
4499 still complete the command. */
4500 if (i == 10) {
b2a4a43d
SC		 4501 dev_err(&pdev->dev,
4502 "controller message %02x:%02x timed out\n",
82eb03cf
CC		 4503 opcode, type);
4504 return -ETIMEDOUT;
4505 }
4506
4507 pci_free_consistent(pdev, cmd_sz, cmd, paddr64);
4508
4509 if (tag & 2) {
b2a4a43d 4510 dev_err(&pdev->dev, "controller message %02x:%02x failed\n",
82eb03cf
CC		 4511 opcode, type);
4512 return -EIO;
4513 }
4514
b2a4a43d 4515 dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n",
82eb03cf
CC		 4516 opcode, type);
4517 return 0;
4518}
4519
82eb03cf
CC		 4520#define cciss_noop(p) cciss_message(p, 3, 0)
4521
a6528d01 4522static int cciss_controller_hard_reset(struct pci_dev *pdev,
bf2e2e6b 4523 void * __iomem vaddr, u32 use_doorbell)
82eb03cf 4524{
a6528d01
SC		 4525 u16 pmcsr;
4526 int pos;
82eb03cf 4527
a6528d01
SC		 4528 if (use_doorbell) {
4529 /* For everything after the P600, the PCI power state method
4530 * of resetting the controller doesn't work, so we have this
4531 * other way using the doorbell register.
4532 */
4533 dev_info(&pdev->dev, "using doorbell to reset controller\n");
bf2e2e6b 4534 writel(use_doorbell, vaddr + SA5_DOORBELL);
a6528d01
SC		 4535 } else { /* Try to do it the PCI power state way */
4536
4537 /* Quoting from the Open CISS Specification: "The Power
4538 * Management Control/Status Register (CSR) controls the power
4539 * state of the device. The normal operating state is D0,
4540 * CSR=00h. The software off state is D3, CSR=03h. To reset
4541 * the controller, place the interface device in D3 then to D0,
4542 * this causes a secondary PCI reset which will reset the
4543 * controller." */
4544
4545 pos = pci_find_capability(pdev, PCI_CAP_ID_PM);
4546 if (pos == 0) {
4547 dev_err(&pdev->dev,
4548 "cciss_controller_hard_reset: "
4549 "PCI PM not supported\n");
4550 return -ENODEV;
4551 }
4552 dev_info(&pdev->dev, "using PCI PM to reset controller\n");
4553 /* enter the D3hot power management state */
4554 pci_read_config_word(pdev, pos + PCI_PM_CTRL, &pmcsr);
4555 pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
4556 pmcsr |= PCI_D3hot;
4557 pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
82eb03cf 4558
a6528d01 4559 msleep(500);
82eb03cf 4560
a6528d01
SC		 4561 /* enter the D0 power management state */
4562 pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
4563 pmcsr |= PCI_D0;
4564 pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
ab5dbebe
MM		 4565
4566 /*
4567 * The P600 requires a small delay when changing states.
4568 * Otherwise we may think the board did not reset and we bail.
4569 * This for kdump only and is particular to the P600.
4570 */
4571 msleep(500);
a6528d01
SC		 4572 }
4573 return 0;
4574}
82eb03cf 4575
62710ae1
SC		 4576static __devinit void init_driver_version(char *driver_version, int len)
4577{
4578 memset(driver_version, 0, len);
4579 strncpy(driver_version, "cciss " DRIVER_NAME, len - 1);
4580}
4581
4582static __devinit int write_driver_ver_to_cfgtable(
4583 CfgTable_struct __iomem *cfgtable)
4584{
4585 char *driver_version;
4586 int i, size = sizeof(cfgtable->driver_version);
4587
4588 driver_version = kmalloc(size, GFP_KERNEL);
4589 if (!driver_version)
4590 return -ENOMEM;
4591
4592 init_driver_version(driver_version, size);
4593 for (i = 0; i < size; i++)
4594 writeb(driver_version[i], &cfgtable->driver_version[i]);
4595 kfree(driver_version);
4596 return 0;
4597}
4598
4599static __devinit void read_driver_ver_from_cfgtable(
4600 CfgTable_struct __iomem *cfgtable, unsigned char *driver_ver)
4601{
4602 int i;
4603
4604 for (i = 0; i < sizeof(cfgtable->driver_version); i++)
4605 driver_ver[i] = readb(&cfgtable->driver_version[i]);
4606}
4607
4608static __devinit int controller_reset_failed(
4609 CfgTable_struct __iomem *cfgtable)
4610{
4611
4612 char *driver_ver, *old_driver_ver;
4613 int rc, size = sizeof(cfgtable->driver_version);
4614
4615 old_driver_ver = kmalloc(2 * size, GFP_KERNEL);
4616 if (!old_driver_ver)
4617 return -ENOMEM;
4618 driver_ver = old_driver_ver + size;
4619
4620 /* After a reset, the 32 bytes of "driver version" in the cfgtable
4621 * should have been changed, otherwise we know the reset failed.
4622 */
4623 init_driver_version(old_driver_ver, size);
4624 read_driver_ver_from_cfgtable(cfgtable, driver_ver);
4625 rc = !memcmp(driver_ver, old_driver_ver, size);
4626 kfree(old_driver_ver);
4627 return rc;
4628}
4629
a6528d01
SC		 4630/* This does a hard reset of the controller using PCI power management
4631 * states or using the doorbell register. */
4632static __devinit int cciss_kdump_hard_reset_controller(struct pci_dev *pdev)
4633{
a6528d01
SC		 4634 u64 cfg_offset;
4635 u32 cfg_base_addr;
4636 u64 cfg_base_addr_index;
4637 void __iomem *vaddr;
4638 unsigned long paddr;
62710ae1 4639 u32 misc_fw_support;
f442e64b 4640 int rc;
a6528d01 4641 CfgTable_struct __iomem *cfgtable;
bf2e2e6b 4642 u32 use_doorbell;
058a0f9f 4643 u32 board_id;
f442e64b 4644 u16 command_register;
a6528d01
SC		 4645
4646 /* For controllers as old a the p600, this is very nearly
4647 * the same thing as
4648 *
4649 * pci_save_state(pci_dev);
4650 * pci_set_power_state(pci_dev, PCI_D3hot);
4651 * pci_set_power_state(pci_dev, PCI_D0);
4652 * pci_restore_state(pci_dev);
4653 *
a6528d01
SC		 4654 * For controllers newer than the P600, the pci power state
4655 * method of resetting doesn't work so we have another way
4656 * using the doorbell register.
4657 */
82eb03cf 4658
058a0f9f
SC		 4659 /* Exclude 640x boards. These are two pci devices in one slot
4660 * which share a battery backed cache module. One controls the
4661 * cache, the other accesses the cache through the one that controls
4662 * it. If we reset the one controlling the cache, the other will
4663 * likely not be happy. Just forbid resetting this conjoined mess.
4664 */
4665 cciss_lookup_board_id(pdev, &board_id);
ec52d5f1 4666 if (!ctlr_is_resettable(board_id)) {
058a0f9f
SC		 4667 dev_warn(&pdev->dev, "Cannot reset Smart Array 640x "
4668 "due to shared cache module.");
82eb03cf
CC		 4669 return -ENODEV;
4670 }
4671
ec52d5f1
SC		 4672 /* if controller is soft- but not hard resettable... */
4673 if (!ctlr_is_hard_resettable(board_id))
4674 return -ENOTSUPP; /* try soft reset later. */
4675
f442e64b
SC		 4676 /* Save the PCI command register */
4677 pci_read_config_word(pdev, 4, &command_register);
4678 /* Turn the board off. This is so that later pci_restore_state()
4679 * won't turn the board on before the rest of config space is ready.
4680 */
4681 pci_disable_device(pdev);
4682 pci_save_state(pdev);
82eb03cf 4683
a6528d01
SC		 4684 /* find the first memory BAR, so we can find the cfg table */
4685 rc = cciss_pci_find_memory_BAR(pdev, &paddr);
4686 if (rc)
4687 return rc;
4688 vaddr = remap_pci_mem(paddr, 0x250);
4689 if (!vaddr)
4690 return -ENOMEM;
82eb03cf 4691
a6528d01
SC		 4692 /* find cfgtable in order to check if reset via doorbell is supported */
4693 rc = cciss_find_cfg_addrs(pdev, vaddr, &cfg_base_addr,
4694 &cfg_base_addr_index, &cfg_offset);
4695 if (rc)
4696 goto unmap_vaddr;
4697 cfgtable = remap_pci_mem(pci_resource_start(pdev,
4698 cfg_base_addr_index) + cfg_offset, sizeof(*cfgtable));
4699 if (!cfgtable) {
4700 rc = -ENOMEM;
4701 goto unmap_vaddr;
4702 }
62710ae1
SC		 4703 rc = write_driver_ver_to_cfgtable(cfgtable);
4704 if (rc)
4705 goto unmap_vaddr;
82eb03cf 4706
bf2e2e6b
SC		 4707 /* If reset via doorbell register is supported, use that.
4708 * There are two such methods. Favor the newest method.
75230ff2 4709 */
bf2e2e6b
SC		 4710 misc_fw_support = readl(&cfgtable->misc_fw_support);
4711 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET2;
4712 if (use_doorbell) {
4713 use_doorbell = DOORBELL_CTLR_RESET2;
4714 } else {
4715 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET;
063d2cf7
SC		 4716 if (use_doorbell) {
4717 dev_warn(&pdev->dev, "Controller claims that "
4718 "'Bit 2 doorbell reset' is "
4719 "supported, but not 'bit 5 doorbell reset'. "
4720 "Firmware update is recommended.\n");
4721 rc = -ENOTSUPP; /* use the soft reset */
4722 goto unmap_cfgtable;
4723 }
bf2e2e6b 4724 }
75230ff2 4725
a6528d01
SC		 4726 rc = cciss_controller_hard_reset(pdev, vaddr, use_doorbell);
4727 if (rc)
4728 goto unmap_cfgtable;
f442e64b
SC		 4729 pci_restore_state(pdev);
4730 rc = pci_enable_device(pdev);
4731 if (rc) {
4732 dev_warn(&pdev->dev, "failed to enable device.\n");
4733 goto unmap_cfgtable;
82eb03cf 4734 }
f442e64b 4735 pci_write_config_word(pdev, 4, command_register);
82eb03cf 4736
a6528d01
SC		 4737 /* Some devices (notably the HP Smart Array 5i Controller)
4738 need a little pause here */
4739 msleep(CCISS_POST_RESET_PAUSE_MSECS);
4740
afa842fa 4741 /* Wait for board to become not ready, then ready. */
59ec86bb 4742 dev_info(&pdev->dev, "Waiting for board to reset.\n");
afa842fa 4743 rc = cciss_wait_for_board_state(pdev, vaddr, BOARD_NOT_READY);
5afe2781
SC		 4744 if (rc) {
4745 dev_warn(&pdev->dev, "Failed waiting for board to hard reset."
4746 " Will try soft reset.\n");
4747 rc = -ENOTSUPP; /* Not expected, but try soft reset later */
4748 goto unmap_cfgtable;
4749 }
afa842fa
SC		 4750 rc = cciss_wait_for_board_state(pdev, vaddr, BOARD_READY);
4751 if (rc) {
4752 dev_warn(&pdev->dev,
5afe2781
SC		 4753 "failed waiting for board to become ready "
4754 "after hard reset\n");
afa842fa
SC		 4755 goto unmap_cfgtable;
4756 }
afa842fa 4757
62710ae1
SC		 4758 rc = controller_reset_failed(vaddr);
4759 if (rc < 0)
4760 goto unmap_cfgtable;
4761 if (rc) {
5afe2781
SC		 4762 dev_warn(&pdev->dev, "Unable to successfully hard reset "
4763 "controller. Will try soft reset.\n");
4764 rc = -ENOTSUPP; /* Not expected, but try soft reset later */
62710ae1 4765 } else {
5afe2781 4766 dev_info(&pdev->dev, "Board ready after hard reset.\n");
a6528d01
SC		 4767 }
4768
4769unmap_cfgtable:
4770 iounmap(cfgtable);
4771
4772unmap_vaddr:
4773 iounmap(vaddr);
4774 return rc;
82eb03cf
CC		 4775}
4776
83123cb1
SC		 4777static __devinit int cciss_init_reset_devices(struct pci_dev *pdev)
4778{
a6528d01 4779 int rc, i;
83123cb1
SC		 4780
4781 if (!reset_devices)
4782 return 0;
4783
a6528d01
SC		 4784 /* Reset the controller with a PCI power-cycle or via doorbell */
4785 rc = cciss_kdump_hard_reset_controller(pdev);
83123cb1 4786
a6528d01
SC		 4787 /* -ENOTSUPP here means we cannot reset the controller
4788 * but it's already (and still) up and running in
058a0f9f
SC		 4789 * "performant mode". Or, it might be 640x, which can't reset
4790 * due to concerns about shared bbwc between 6402/6404 pair.
a6528d01
SC		 4791 */
4792 if (rc == -ENOTSUPP)
5afe2781 4793 return rc; /* just try to do the kdump anyhow. */
a6528d01
SC		 4794 if (rc)
4795 return -ENODEV;
83123cb1
SC		 4796
4797 /* Now try to get the controller to respond to a no-op */
59ec86bb 4798 dev_warn(&pdev->dev, "Waiting for controller to respond to no-op\n");
83123cb1
SC		 4799 for (i = 0; i < CCISS_POST_RESET_NOOP_RETRIES; i++) {
4800 if (cciss_noop(pdev) == 0)
4801 break;
4802 else
4803 dev_warn(&pdev->dev, "no-op failed%s\n",
4804 (i < CCISS_POST_RESET_NOOP_RETRIES - 1 ?
4805 "; re-trying" : ""));
4806 msleep(CCISS_POST_RESET_NOOP_INTERVAL_MSECS);
4807 }
82eb03cf
CC		 4808 return 0;
4809}
4810
54dae343
SC		 4811static __devinit int cciss_allocate_cmd_pool(ctlr_info_t *h)
4812{
4813 h->cmd_pool_bits = kmalloc(
4814 DIV_ROUND_UP(h->nr_cmds, BITS_PER_LONG) *
4815 sizeof(unsigned long), GFP_KERNEL);
4816 h->cmd_pool = pci_alloc_consistent(h->pdev,
4817 h->nr_cmds * sizeof(CommandList_struct),
4818 &(h->cmd_pool_dhandle));
4819 h->errinfo_pool = pci_alloc_consistent(h->pdev,
4820 h->nr_cmds * sizeof(ErrorInfo_struct),
4821 &(h->errinfo_pool_dhandle));
4822 if ((h->cmd_pool_bits == NULL)
4823 || (h->cmd_pool == NULL)
4824 || (h->errinfo_pool == NULL)) {
4825 dev_err(&h->pdev->dev, "out of memory");
4826 return -ENOMEM;
4827 }
4828 return 0;
4829}
4830
abf7966e
SC		 4831static __devinit int cciss_allocate_scatterlists(ctlr_info_t *h)
4832{
4833 int i;
4834
4835 /* zero it, so that on free we need not know how many were alloc'ed */
4836 h->scatter_list = kzalloc(h->max_commands *
4837 sizeof(struct scatterlist *), GFP_KERNEL);
4838 if (!h->scatter_list)
4839 return -ENOMEM;
4840
4841 for (i = 0; i < h->nr_cmds; i++) {
4842 h->scatter_list[i] = kmalloc(sizeof(struct scatterlist) *
4843 h->maxsgentries, GFP_KERNEL);
4844 if (h->scatter_list[i] == NULL) {
4845 dev_err(&h->pdev->dev, "could not allocate "
4846 "s/g lists\n");
4847 return -ENOMEM;
4848 }
4849 }
4850 return 0;
4851}
4852
4853static void cciss_free_scatterlists(ctlr_info_t *h)
4854{
4855 int i;
4856
4857 if (h->scatter_list) {
4858 for (i = 0; i < h->nr_cmds; i++)
4859 kfree(h->scatter_list[i]);
4860 kfree(h->scatter_list);
4861 }
4862}
4863
54dae343
SC		 4864static void cciss_free_cmd_pool(ctlr_info_t *h)
4865{
4866 kfree(h->cmd_pool_bits);
4867 if (h->cmd_pool)
4868 pci_free_consistent(h->pdev,
4869 h->nr_cmds * sizeof(CommandList_struct),
4870 h->cmd_pool, h->cmd_pool_dhandle);
4871 if (h->errinfo_pool)
4872 pci_free_consistent(h->pdev,
4873 h->nr_cmds * sizeof(ErrorInfo_struct),
4874 h->errinfo_pool, h->errinfo_pool_dhandle);
4875}
4876
2b48085f
SC		 4877static int cciss_request_irq(ctlr_info_t *h,
4878 irqreturn_t (*msixhandler)(int, void *),
4879 irqreturn_t (*intxhandler)(int, void *))
4880{
4881 if (h->msix_vector || h->msi_vector) {
13049537 4882 if (!request_irq(h->intr[h->intr_mode], msixhandler,
2b48085f
SC		 4883 IRQF_DISABLED, h->devname, h))
4884 return 0;
4885 dev_err(&h->pdev->dev, "Unable to get msi irq %d"
13049537 4886 " for %s\n", h->intr[h->intr_mode],
2b48085f
SC		 4887 h->devname);
4888 return -1;
4889 }
4890
13049537 4891 if (!request_irq(h->intr[h->intr_mode], intxhandler,
2b48085f
SC		 4892 IRQF_DISABLED, h->devname, h))
4893 return 0;
4894 dev_err(&h->pdev->dev, "Unable to get irq %d for %s\n",
13049537 4895 h->intr[h->intr_mode], h->devname);
2b48085f
SC		 4896 return -1;
4897}
4898
5afe2781
SC		 4899static int __devinit cciss_kdump_soft_reset(ctlr_info_t *h)
4900{
4901 if (cciss_send_reset(h, CTLR_LUNID, CCISS_RESET_TYPE_CONTROLLER)) {
4902 dev_warn(&h->pdev->dev, "Resetting array controller failed.\n");
4903 return -EIO;
4904 }
4905
4906 dev_info(&h->pdev->dev, "Waiting for board to soft reset.\n");
4907 if (cciss_wait_for_board_state(h->pdev, h->vaddr, BOARD_NOT_READY)) {
4908 dev_warn(&h->pdev->dev, "Soft reset had no effect.\n");
4909 return -1;
4910 }
4911
4912 dev_info(&h->pdev->dev, "Board reset, awaiting READY status.\n");
4913 if (cciss_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY)) {
4914 dev_warn(&h->pdev->dev, "Board failed to become ready "
4915 "after soft reset.\n");
4916 return -1;
4917 }
4918
4919 return 0;
4920}
4921
4922static void cciss_undo_allocations_after_kdump_soft_reset(ctlr_info_t *h)
4923{
4924 int ctlr = h->ctlr;
4925
13049537 4926 free_irq(h->intr[h->intr_mode], h);
5afe2781
SC		 4927#ifdef CONFIG_PCI_MSI
4928 if (h->msix_vector)
4929 pci_disable_msix(h->pdev);
4930 else if (h->msi_vector)
4931 pci_disable_msi(h->pdev);
4932#endif /* CONFIG_PCI_MSI */
4933 cciss_free_sg_chain_blocks(h->cmd_sg_list, h->nr_cmds);
4934 cciss_free_scatterlists(h);
4935 cciss_free_cmd_pool(h);
4936 kfree(h->blockFetchTable);
4937 if (h->reply_pool)
4938 pci_free_consistent(h->pdev, h->max_commands * sizeof(__u64),
4939 h->reply_pool, h->reply_pool_dhandle);
4940 if (h->transtable)
4941 iounmap(h->transtable);
4942 if (h->cfgtable)
4943 iounmap(h->cfgtable);
4944 if (h->vaddr)
4945 iounmap(h->vaddr);
4946 unregister_blkdev(h->major, h->devname);
4947 cciss_destroy_hba_sysfs_entry(h);
4948 pci_release_regions(h->pdev);
4949 kfree(h);
4950 hba[ctlr] = NULL;
4951}
4952
1da177e4
LT		 4953/*
4954 * This is it. Find all the controllers and register them. I really hate
4955 * stealing all these major device numbers.
4956 * returns the number of block devices registered.
4957 */
4958static int __devinit cciss_init_one(struct pci_dev *pdev,
7c832835 4959 const struct pci_device_id *ent)
1da177e4 4960{
1da177e4 4961 int i;
799202cb 4962 int j = 0;
1da177e4 4963 int rc;
5afe2781 4964 int try_soft_reset = 0;
22bece00 4965 int dac, return_code;
212a5026 4966 InquiryData_struct *inq_buff;
f70dba83 4967 ctlr_info_t *h;
5afe2781 4968 unsigned long flags;
1da177e4 4969
83123cb1 4970 rc = cciss_init_reset_devices(pdev);
5afe2781
SC		 4971 if (rc) {
4972 if (rc != -ENOTSUPP)
4973 return rc;
4974 /* If the reset fails in a particular way (it has no way to do
4975 * a proper hard reset, so returns -ENOTSUPP) we can try to do
4976 * a soft reset once we get the controller configured up to the
4977 * point that it can accept a command.
4978 */
4979 try_soft_reset = 1;
4980 rc = 0;
4981 }
4982
4983reinit_after_soft_reset:
4984
b2a4a43d 4985 i = alloc_cciss_hba(pdev);
7c832835 4986 if (i < 0)
e2019b58 4987 return -1;
1f8ef380 4988
f70dba83
SC		 4989 h = hba[i];
4990 h->pdev = pdev;
4991 h->busy_initializing = 1;
13049537 4992 h->intr_mode = cciss_simple_mode ? SIMPLE_MODE_INT : PERF_MODE_INT;
e6e1ee93
JA		 4993 INIT_LIST_HEAD(&h->cmpQ);
4994 INIT_LIST_HEAD(&h->reqQ);
f70dba83 4995 mutex_init(&h->busy_shutting_down);
1f8ef380 4996
f70dba83 4997 if (cciss_pci_init(h) != 0)
2cfa948c 4998 goto clean_no_release_regions;
1da177e4 4999
f70dba83
SC		 5000 sprintf(h->devname, "cciss%d", i);
5001 h->ctlr = i;
1da177e4 5002
8a4ec67b
SC		 5003 if (cciss_tape_cmds < 2)
5004 cciss_tape_cmds = 2;
5005 if (cciss_tape_cmds > 16)
5006 cciss_tape_cmds = 16;
5007
f70dba83 5008 init_completion(&h->scan_wait);
b368c9dd 5009
f70dba83 5010 if (cciss_create_hba_sysfs_entry(h))
7fe06326
AP		 5011 goto clean0;
5012
1da177e4 5013 /* configure PCI DMA stuff */
6a35528a 5014 if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(64)))
40aabb58 5015 dac = 1;
284901a9 5016 else if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32)))
40aabb58 5017 dac = 0;
1da177e4 5018 else {
b2a4a43d 5019 dev_err(&h->pdev->dev, "no suitable DMA available\n");
1da177e4
LT		 5020 goto clean1;
5021 }
5022
5023 /*
5024 * register with the major number, or get a dynamic major number
5025 * by passing 0 as argument. This is done for greater than
5026 * 8 controller support.
5027 */
5028 if (i < MAX_CTLR_ORIG)
f70dba83
SC		 5029 h->major = COMPAQ_CISS_MAJOR + i;
5030 rc = register_blkdev(h->major, h->devname);
7c832835 5031 if (rc == -EBUSY || rc == -EINVAL) {
b2a4a43d
SC		 5032 dev_err(&h->pdev->dev,
5033 "Unable to get major number %d for %s "
f70dba83 5034 "on hba %d\n", h->major, h->devname, i);
1da177e4 5035 goto clean1;
7c832835 5036 } else {
1da177e4 5037 if (i >= MAX_CTLR_ORIG)
f70dba83 5038 h->major = rc;
1da177e4
LT		 5039 }
5040
5041 /* make sure the board interrupts are off */
f70dba83 5042 h->access.set_intr_mask(h, CCISS_INTR_OFF);
2b48085f
SC		 5043 rc = cciss_request_irq(h, do_cciss_msix_intr, do_cciss_intx);
5044 if (rc)
5045 goto clean2;
40aabb58 5046
b2a4a43d 5047 dev_info(&h->pdev->dev, "%s: <0x%x> at PCI %s IRQ %d%s using DAC\n",
f70dba83 5048 h->devname, pdev->device, pci_name(pdev),
13049537 5049 h->intr[h->intr_mode], dac ? "" : " not");
7c832835 5050
54dae343 5051 if (cciss_allocate_cmd_pool(h))
1da177e4 5052 goto clean4;
5c07a311 5053
abf7966e 5054 if (cciss_allocate_scatterlists(h))
4ee69851
DC		 5055 goto clean4;
5056
f70dba83
SC		 5057 h->cmd_sg_list = cciss_allocate_sg_chain_blocks(h,
5058 h->chainsize, h->nr_cmds);
5059 if (!h->cmd_sg_list && h->chainsize > 0)
5c07a311 5060 goto clean4;
5c07a311 5061
f70dba83 5062 spin_lock_init(&h->lock);
1da177e4 5063
7c832835 5064 /* Initialize the pdev driver private data.
f70dba83
SC		 5065 have it point to h. */
5066 pci_set_drvdata(pdev, h);
7c832835
BH		 5067 /* command and error info recs zeroed out before
5068 they are used */
f70dba83
SC		 5069 memset(h->cmd_pool_bits, 0,
5070 DIV_ROUND_UP(h->nr_cmds, BITS_PER_LONG)
061837bc 5071 * sizeof(unsigned long));
1da177e4 5072
f70dba83
SC		 5073 h->num_luns = 0;
5074 h->highest_lun = -1;
6ae5ce8e 5075 for (j = 0; j < CISS_MAX_LUN; j++) {
f70dba83
SC		 5076 h->drv[j] = NULL;
5077 h->gendisk[j] = NULL;
6ae5ce8e 5078 }
1da177e4 5079
5afe2781
SC		 5080 /* At this point, the controller is ready to take commands.
5081 * Now, if reset_devices and the hard reset didn't work, try
5082 * the soft reset and see if that works.
5083 */
5084 if (try_soft_reset) {
5085
5086 /* This is kind of gross. We may or may not get a completion
5087 * from the soft reset command, and if we do, then the value
5088 * from the fifo may or may not be valid. So, we wait 10 secs
5089 * after the reset throwing away any completions we get during
5090 * that time. Unregister the interrupt handler and register
5091 * fake ones to scoop up any residual completions.
5092 */
5093 spin_lock_irqsave(&h->lock, flags);
5094 h->access.set_intr_mask(h, CCISS_INTR_OFF);
5095 spin_unlock_irqrestore(&h->lock, flags);
13049537 5096 free_irq(h->intr[h->intr_mode], h);
5afe2781
SC		 5097 rc = cciss_request_irq(h, cciss_msix_discard_completions,
5098 cciss_intx_discard_completions);
5099 if (rc) {
5100 dev_warn(&h->pdev->dev, "Failed to request_irq after "
5101 "soft reset.\n");
5102 goto clean4;
5103 }
5104
5105 rc = cciss_kdump_soft_reset(h);
5106 if (rc) {
5107 dev_warn(&h->pdev->dev, "Soft reset failed.\n");
5108 goto clean4;
5109 }
5110
5111 dev_info(&h->pdev->dev, "Board READY.\n");
5112 dev_info(&h->pdev->dev,
5113 "Waiting for stale completions to drain.\n");
5114 h->access.set_intr_mask(h, CCISS_INTR_ON);
5115 msleep(10000);
5116 h->access.set_intr_mask(h, CCISS_INTR_OFF);
5117
5118 rc = controller_reset_failed(h->cfgtable);
5119 if (rc)
5120 dev_info(&h->pdev->dev,
5121 "Soft reset appears to have failed.\n");
5122
5123 /* since the controller's reset, we have to go back and re-init
5124 * everything. Easiest to just forget what we've done and do it
5125 * all over again.
5126 */
5127 cciss_undo_allocations_after_kdump_soft_reset(h);
5128 try_soft_reset = 0;
5129 if (rc)
5130 /* don't go to clean4, we already unallocated */
5131 return -ENODEV;
5132
5133 goto reinit_after_soft_reset;
5134 }
5135
f70dba83 5136 cciss_scsi_setup(h);
1da177e4
LT		 5137
5138 /* Turn the interrupts on so we can service requests */
f70dba83 5139 h->access.set_intr_mask(h, CCISS_INTR_ON);
1da177e4 5140
22bece00
MM		 5141 /* Get the firmware version */
5142 inq_buff = kzalloc(sizeof(InquiryData_struct), GFP_KERNEL);
5143 if (inq_buff == NULL) {
b2a4a43d 5144 dev_err(&h->pdev->dev, "out of memory\n");
22bece00
MM		 5145 goto clean4;
5146 }
5147
f70dba83 5148 return_code = sendcmd_withirq(h, CISS_INQUIRY, inq_buff,
b57695fe 5149 sizeof(InquiryData_struct), 0, CTLR_LUNID, TYPE_CMD);
22bece00 5150 if (return_code == IO_OK) {
f70dba83
SC		 5151 h->firm_ver[0] = inq_buff->data_byte[32];
5152 h->firm_ver[1] = inq_buff->data_byte[33];
5153 h->firm_ver[2] = inq_buff->data_byte[34];
5154 h->firm_ver[3] = inq_buff->data_byte[35];
22bece00 5155 } else { /* send command failed */
b2a4a43d 5156 dev_warn(&h->pdev->dev, "unable to determine firmware"
22bece00
MM		 5157 " version of controller\n");
5158 }
212a5026 5159 kfree(inq_buff);
22bece00 5160
f70dba83 5161 cciss_procinit(h);
92c4231a 5162
f70dba83 5163 h->cciss_max_sectors = 8192;
92c4231a 5164
f70dba83 5165 rebuild_lun_table(h, 1, 0);
0007a4c9 5166 cciss_engage_scsi(h);
f70dba83 5167 h->busy_initializing = 0;
e2019b58 5168 return 1;
1da177e4 5169
6ae5ce8e 5170clean4:
54dae343 5171 cciss_free_cmd_pool(h);
abf7966e 5172 cciss_free_scatterlists(h);
f70dba83 5173 cciss_free_sg_chain_blocks(h->cmd_sg_list, h->nr_cmds);
13049537 5174 free_irq(h->intr[h->intr_mode], h);
6ae5ce8e 5175clean2:
f70dba83 5176 unregister_blkdev(h->major, h->devname);
6ae5ce8e 5177clean1:
f70dba83 5178 cciss_destroy_hba_sysfs_entry(h);
7fe06326 5179clean0:
2cfa948c
SC		 5180 pci_release_regions(pdev);
5181clean_no_release_regions:
f70dba83 5182 h->busy_initializing = 0;
9cef0d2f 5183
872225ca
MM		 5184 /*
5185 * Deliberately omit pci_disable_device(): it does something nasty to
5186 * Smart Array controllers that pci_enable_device does not undo
5187 */
799202cb 5188 pci_set_drvdata(pdev, NULL);
f70dba83 5189 free_hba(h);
e2019b58 5190 return -1;
1da177e4
LT		 5191}
5192
e9ca75b5 5193static void cciss_shutdown(struct pci_dev *pdev)
1da177e4 5194{
29009a03
SC		 5195 ctlr_info_t *h;
5196 char *flush_buf;
7c832835 5197 int return_code;
1da177e4 5198
29009a03
SC		 5199 h = pci_get_drvdata(pdev);
5200 flush_buf = kzalloc(4, GFP_KERNEL);
5201 if (!flush_buf) {
b2a4a43d 5202 dev_warn(&h->pdev->dev, "cache not flushed, out of memory.\n");
e9ca75b5 5203 return;
e9ca75b5 5204 }
29009a03
SC		 5205 /* write all data in the battery backed cache to disk */
5206 memset(flush_buf, 0, 4);
f70dba83 5207 return_code = sendcmd_withirq(h, CCISS_CACHE_FLUSH, flush_buf,
29009a03
SC		 5208 4, 0, CTLR_LUNID, TYPE_CMD);
5209 kfree(flush_buf);
5210 if (return_code != IO_OK)
b2a4a43d 5211 dev_warn(&h->pdev->dev, "Error flushing cache\n");
29009a03 5212 h->access.set_intr_mask(h, CCISS_INTR_OFF);
13049537 5213 free_irq(h->intr[h->intr_mode], h);
e9ca75b5
GB		 5214}
5215
13049537
JH		 5216static int __devinit cciss_enter_simple_mode(struct ctlr_info *h)
5217{
5218 u32 trans_support;
5219
5220 trans_support = readl(&(h->cfgtable->TransportSupport));
5221 if (!(trans_support & SIMPLE_MODE))
5222 return -ENOTSUPP;
5223
5224 h->max_commands = readl(&(h->cfgtable->CmdsOutMax));
5225 writel(CFGTBL_Trans_Simple, &(h->cfgtable->HostWrite.TransportRequest));
5226 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
5227 cciss_wait_for_mode_change_ack(h);
5228 print_cfg_table(h);
5229 if (!(readl(&(h->cfgtable->TransportActive)) & CFGTBL_Trans_Simple)) {
5230 dev_warn(&h->pdev->dev, "unable to get board into simple mode\n");
5231 return -ENODEV;
5232 }
5233 h->transMethod = CFGTBL_Trans_Simple;
5234 return 0;
5235}
5236
5237
e9ca75b5
GB		 5238static void __devexit cciss_remove_one(struct pci_dev *pdev)
5239{
f70dba83 5240 ctlr_info_t *h;
e9ca75b5
GB		 5241 int i, j;
5242
7c832835 5243 if (pci_get_drvdata(pdev) == NULL) {
b2a4a43d 5244 dev_err(&pdev->dev, "Unable to remove device\n");
1da177e4
LT		 5245 return;
5246 }
0a9279cc 5247
f70dba83
SC		 5248 h = pci_get_drvdata(pdev);
5249 i = h->ctlr;
7c832835 5250 if (hba[i] == NULL) {
b2a4a43d 5251 dev_err(&pdev->dev, "device appears to already be removed\n");
1da177e4
LT		 5252 return;
5253 }
b6550777 5254
f70dba83 5255 mutex_lock(&h->busy_shutting_down);
0a9279cc 5256
f70dba83
SC		 5257 remove_from_scan_list(h);
5258 remove_proc_entry(h->devname, proc_cciss);
5259 unregister_blkdev(h->major, h->devname);
b6550777
BH		 5260
5261 /* remove it from the disk list */
5262 for (j = 0; j < CISS_MAX_LUN; j++) {
f70dba83 5263 struct gendisk *disk = h->gendisk[j];
b6550777 5264 if (disk) {
165125e1 5265 struct request_queue *q = disk->queue;
b6550777 5266
097d0264 5267 if (disk->flags & GENHD_FL_UP) {
f70dba83 5268 cciss_destroy_ld_sysfs_entry(h, j, 1);
b6550777 5269 del_gendisk(disk);
097d0264 5270 }
b6550777
BH		 5271 if (q)
5272 blk_cleanup_queue(q);
5273 }
5274 }
5275
ba198efb 5276#ifdef CONFIG_CISS_SCSI_TAPE
f70dba83 5277 cciss_unregister_scsi(h); /* unhook from SCSI subsystem */
ba198efb 5278#endif
b6550777 5279
e9ca75b5 5280 cciss_shutdown(pdev);
fb86a35b
MM		 5281
5282#ifdef CONFIG_PCI_MSI
f70dba83
SC		 5283 if (h->msix_vector)
5284 pci_disable_msix(h->pdev);
5285 else if (h->msi_vector)
5286 pci_disable_msi(h->pdev);
7c832835 5287#endif /* CONFIG_PCI_MSI */
fb86a35b 5288
f70dba83
SC		 5289 iounmap(h->transtable);
5290 iounmap(h->cfgtable);
5291 iounmap(h->vaddr);
1da177e4 5292
54dae343 5293 cciss_free_cmd_pool(h);
5c07a311 5294 /* Free up sg elements */
f70dba83
SC		 5295 for (j = 0; j < h->nr_cmds; j++)
5296 kfree(h->scatter_list[j]);
5297 kfree(h->scatter_list);
5298 cciss_free_sg_chain_blocks(h->cmd_sg_list, h->nr_cmds);
e363e014
SC		 5299 kfree(h->blockFetchTable);
5300 if (h->reply_pool)
5301 pci_free_consistent(h->pdev, h->max_commands * sizeof(__u64),
5302 h->reply_pool, h->reply_pool_dhandle);
872225ca
MM		 5303 /*
5304 * Deliberately omit pci_disable_device(): it does something nasty to
5305 * Smart Array controllers that pci_enable_device does not undo
5306 */
7c832835 5307 pci_release_regions(pdev);
4e570309 5308 pci_set_drvdata(pdev, NULL);
f70dba83
SC		 5309 cciss_destroy_hba_sysfs_entry(h);
5310 mutex_unlock(&h->busy_shutting_down);
5311 free_hba(h);
7c832835 5312}
1da177e4
LT		 5313
5314static struct pci_driver cciss_pci_driver = {
7c832835
BH		 5315 .name = "cciss",
5316 .probe = cciss_init_one,
5317 .remove = __devexit_p(cciss_remove_one),
5318 .id_table = cciss_pci_device_id, /* id_table */
e9ca75b5 5319 .shutdown = cciss_shutdown,
1da177e4
LT		 5320};
5321
5322/*
5323 * This is it. Register the PCI driver information for the cards we control
7c832835 5324 * the OS will call our registered routines when it finds one of our cards.
1da177e4
LT		 5325 */
5326static int __init cciss_init(void)
5327{
7fe06326
AP		 5328 int err;
5329
10cbda97
JA		 5330 /*
5331 * The hardware requires that commands are aligned on a 64-bit
5332 * boundary. Given that we use pci_alloc_consistent() to allocate an
5333 * array of them, the size must be a multiple of 8 bytes.
5334 */
1b7d0d28 5335 BUILD_BUG_ON(sizeof(CommandList_struct) % COMMANDLIST_ALIGNMENT);
1da177e4
LT		 5336 printk(KERN_INFO DRIVER_NAME "\n");
5337
7fe06326
AP		 5338 err = bus_register(&cciss_bus_type);
5339 if (err)
5340 return err;
5341
b368c9dd
AP		 5342 /* Start the scan thread */
5343 cciss_scan_thread = kthread_run(scan_thread, NULL, "cciss_scan");
5344 if (IS_ERR(cciss_scan_thread)) {
5345 err = PTR_ERR(cciss_scan_thread);
5346 goto err_bus_unregister;
5347 }
5348
1da177e4 5349 /* Register for our PCI devices */
7fe06326
AP		 5350 err = pci_register_driver(&cciss_pci_driver);
5351 if (err)
b368c9dd 5352 goto err_thread_stop;
7fe06326 5353
617e1344 5354 return err;
7fe06326 5355
b368c9dd
AP		 5356err_thread_stop:
5357 kthread_stop(cciss_scan_thread);
5358err_bus_unregister:
7fe06326 5359 bus_unregister(&cciss_bus_type);
b368c9dd 5360
7fe06326 5361 return err;
1da177e4
LT		 5362}
5363
5364static void __exit cciss_cleanup(void)
5365{
5366 int i;
5367
5368 pci_unregister_driver(&cciss_pci_driver);
5369 /* double check that all controller entrys have been removed */
7c832835
BH		 5370 for (i = 0; i < MAX_CTLR; i++) {
5371 if (hba[i] != NULL) {
b2a4a43d
SC		 5372 dev_warn(&hba[i]->pdev->dev,
5373 "had to remove controller\n");
1da177e4
LT		 5374 cciss_remove_one(hba[i]->pdev);
5375 }
5376 }
b368c9dd 5377 kthread_stop(cciss_scan_thread);
90fdb0b9
JA		 5378 if (proc_cciss)
5379 remove_proc_entry("driver/cciss", NULL);
7fe06326 5380 bus_unregister(&cciss_bus_type);
1da177e4
LT		 5381}
5382
5383module_init(cciss_init);
5384module_exit(cciss_cleanup);
Ubuntu Artful kernel mirror