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88523a61 SB |
1 | /* |
2 | * Driver for the Micron P320 SSD | |
3 | * Copyright (C) 2011 Micron Technology, Inc. | |
4 | * | |
5 | * Portions of this code were derived from works subjected to the | |
6 | * following copyright: | |
7 | * Copyright (C) 2009 Integrated Device Technology, Inc. | |
8 | * | |
9 | * This program is free software; you can redistribute it and/or modify | |
10 | * it under the terms of the GNU General Public License as published by | |
11 | * the Free Software Foundation; either version 2 of the License, or | |
12 | * (at your option) any later version. | |
13 | * | |
14 | * This program is distributed in the hope that it will be useful, | |
15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
17 | * GNU General Public License for more details. | |
18 | * | |
19 | */ | |
20 | ||
21 | #include <linux/pci.h> | |
22 | #include <linux/interrupt.h> | |
23 | #include <linux/ata.h> | |
24 | #include <linux/delay.h> | |
25 | #include <linux/hdreg.h> | |
26 | #include <linux/uaccess.h> | |
27 | #include <linux/random.h> | |
28 | #include <linux/smp.h> | |
29 | #include <linux/compat.h> | |
30 | #include <linux/fs.h> | |
0e838c62 | 31 | #include <linux/module.h> |
88523a61 SB |
32 | #include <linux/genhd.h> |
33 | #include <linux/blkdev.h> | |
34 | #include <linux/bio.h> | |
35 | #include <linux/dma-mapping.h> | |
36 | #include <linux/idr.h> | |
60ec0eec | 37 | #include <linux/kthread.h> |
88523a61 | 38 | #include <../drivers/ata/ahci.h> |
45038367 | 39 | #include <linux/export.h> |
7b421d24 | 40 | #include <linux/debugfs.h> |
88523a61 SB |
41 | #include "mtip32xx.h" |
42 | ||
43 | #define HW_CMD_SLOT_SZ (MTIP_MAX_COMMAND_SLOTS * 32) | |
44 | #define HW_CMD_TBL_SZ (AHCI_CMD_TBL_HDR_SZ + (MTIP_MAX_SG * 16)) | |
45 | #define HW_CMD_TBL_AR_SZ (HW_CMD_TBL_SZ * MTIP_MAX_COMMAND_SLOTS) | |
46 | #define HW_PORT_PRIV_DMA_SZ \ | |
47 | (HW_CMD_SLOT_SZ + HW_CMD_TBL_AR_SZ + AHCI_RX_FIS_SZ) | |
48 | ||
45038367 | 49 | #define HOST_CAP_NZDMA (1 << 19) |
88523a61 SB |
50 | #define HOST_HSORG 0xFC |
51 | #define HSORG_DISABLE_SLOTGRP_INTR (1<<24) | |
52 | #define HSORG_DISABLE_SLOTGRP_PXIS (1<<16) | |
53 | #define HSORG_HWREV 0xFF00 | |
54 | #define HSORG_STYLE 0x8 | |
55 | #define HSORG_SLOTGROUPS 0x7 | |
56 | ||
57 | #define PORT_COMMAND_ISSUE 0x38 | |
58 | #define PORT_SDBV 0x7C | |
59 | ||
60 | #define PORT_OFFSET 0x100 | |
61 | #define PORT_MEM_SIZE 0x80 | |
62 | ||
63 | #define PORT_IRQ_ERR \ | |
64 | (PORT_IRQ_HBUS_ERR | PORT_IRQ_IF_ERR | PORT_IRQ_CONNECT | \ | |
65 | PORT_IRQ_PHYRDY | PORT_IRQ_UNK_FIS | PORT_IRQ_BAD_PMP | \ | |
66 | PORT_IRQ_TF_ERR | PORT_IRQ_HBUS_DATA_ERR | PORT_IRQ_IF_NONFATAL | \ | |
67 | PORT_IRQ_OVERFLOW) | |
68 | #define PORT_IRQ_LEGACY \ | |
69 | (PORT_IRQ_PIOS_FIS | PORT_IRQ_D2H_REG_FIS) | |
70 | #define PORT_IRQ_HANDLED \ | |
71 | (PORT_IRQ_SDB_FIS | PORT_IRQ_LEGACY | \ | |
72 | PORT_IRQ_TF_ERR | PORT_IRQ_IF_ERR | \ | |
73 | PORT_IRQ_CONNECT | PORT_IRQ_PHYRDY) | |
74 | #define DEF_PORT_IRQ \ | |
75 | (PORT_IRQ_ERR | PORT_IRQ_LEGACY | PORT_IRQ_SDB_FIS) | |
76 | ||
77 | /* product numbers */ | |
78 | #define MTIP_PRODUCT_UNKNOWN 0x00 | |
79 | #define MTIP_PRODUCT_ASICFPGA 0x11 | |
80 | ||
81 | /* Device instance number, incremented each time a device is probed. */ | |
82 | static int instance; | |
83 | ||
84 | /* | |
85 | * Global variable used to hold the major block device number | |
86 | * allocated in mtip_init(). | |
87 | */ | |
3ff147d3 | 88 | static int mtip_major; |
7b421d24 | 89 | static struct dentry *dfs_parent; |
88523a61 | 90 | |
16c906e5 AT |
91 | static u32 cpu_use[NR_CPUS]; |
92 | ||
88523a61 SB |
93 | static DEFINE_SPINLOCK(rssd_index_lock); |
94 | static DEFINE_IDA(rssd_index_ida); | |
95 | ||
62ee8c13 AT |
96 | static int mtip_block_initialize(struct driver_data *dd); |
97 | ||
16d02c04 | 98 | #ifdef CONFIG_COMPAT |
88523a61 SB |
99 | struct mtip_compat_ide_task_request_s { |
100 | __u8 io_ports[8]; | |
101 | __u8 hob_ports[8]; | |
102 | ide_reg_valid_t out_flags; | |
103 | ide_reg_valid_t in_flags; | |
104 | int data_phase; | |
105 | int req_cmd; | |
106 | compat_ulong_t out_size; | |
107 | compat_ulong_t in_size; | |
108 | }; | |
16d02c04 | 109 | #endif |
88523a61 | 110 | |
6316668f JA |
111 | /* |
112 | * This function check_for_surprise_removal is called | |
113 | * while card is removed from the system and it will | |
114 | * read the vendor id from the configration space | |
115 | * | |
116 | * @pdev Pointer to the pci_dev structure. | |
117 | * | |
118 | * return value | |
119 | * true if device removed, else false | |
120 | */ | |
121 | static bool mtip_check_surprise_removal(struct pci_dev *pdev) | |
122 | { | |
123 | u16 vendor_id = 0; | |
124 | ||
125 | /* Read the vendorID from the configuration space */ | |
126 | pci_read_config_word(pdev, 0x00, &vendor_id); | |
127 | if (vendor_id == 0xFFFF) | |
128 | return true; /* device removed */ | |
129 | ||
130 | return false; /* device present */ | |
131 | } | |
132 | ||
133 | /* | |
134 | * This function is called for clean the pending command in the | |
135 | * command slot during the surprise removal of device and return | |
136 | * error to the upper layer. | |
137 | * | |
138 | * @dd Pointer to the DRIVER_DATA structure. | |
139 | * | |
140 | * return value | |
141 | * None | |
142 | */ | |
143 | static void mtip_command_cleanup(struct driver_data *dd) | |
144 | { | |
145 | int group = 0, commandslot = 0, commandindex = 0; | |
146 | struct mtip_cmd *command; | |
147 | struct mtip_port *port = dd->port; | |
45038367 AT |
148 | static int in_progress; |
149 | ||
150 | if (in_progress) | |
151 | return; | |
152 | ||
153 | in_progress = 1; | |
6316668f JA |
154 | |
155 | for (group = 0; group < 4; group++) { | |
156 | for (commandslot = 0; commandslot < 32; commandslot++) { | |
157 | if (!(port->allocated[group] & (1 << commandslot))) | |
158 | continue; | |
159 | ||
160 | commandindex = group << 5 | commandslot; | |
161 | command = &port->commands[commandindex]; | |
162 | ||
163 | if (atomic_read(&command->active) | |
164 | && (command->async_callback)) { | |
165 | command->async_callback(command->async_data, | |
166 | -ENODEV); | |
167 | command->async_callback = NULL; | |
168 | command->async_data = NULL; | |
169 | } | |
170 | ||
171 | dma_unmap_sg(&port->dd->pdev->dev, | |
172 | command->sg, | |
173 | command->scatter_ents, | |
174 | command->direction); | |
175 | } | |
176 | } | |
177 | ||
178 | up(&port->cmd_slot); | |
179 | ||
8a857a88 | 180 | set_bit(MTIP_DDF_CLEANUP_BIT, &dd->dd_flag); |
45038367 | 181 | in_progress = 0; |
6316668f JA |
182 | } |
183 | ||
88523a61 SB |
184 | /* |
185 | * Obtain an empty command slot. | |
186 | * | |
187 | * This function needs to be reentrant since it could be called | |
188 | * at the same time on multiple CPUs. The allocation of the | |
189 | * command slot must be atomic. | |
190 | * | |
191 | * @port Pointer to the port data structure. | |
192 | * | |
193 | * return value | |
194 | * >= 0 Index of command slot obtained. | |
195 | * -1 No command slots available. | |
196 | */ | |
197 | static int get_slot(struct mtip_port *port) | |
198 | { | |
199 | int slot, i; | |
200 | unsigned int num_command_slots = port->dd->slot_groups * 32; | |
201 | ||
202 | /* | |
203 | * Try 10 times, because there is a small race here. | |
204 | * that's ok, because it's still cheaper than a lock. | |
205 | * | |
206 | * Race: Since this section is not protected by lock, same bit | |
207 | * could be chosen by different process contexts running in | |
208 | * different processor. So instead of costly lock, we are going | |
209 | * with loop. | |
210 | */ | |
211 | for (i = 0; i < 10; i++) { | |
212 | slot = find_next_zero_bit(port->allocated, | |
213 | num_command_slots, 1); | |
214 | if ((slot < num_command_slots) && | |
215 | (!test_and_set_bit(slot, port->allocated))) | |
216 | return slot; | |
217 | } | |
218 | dev_warn(&port->dd->pdev->dev, "Failed to get a tag.\n"); | |
219 | ||
220 | if (mtip_check_surprise_removal(port->dd->pdev)) { | |
221 | /* Device not present, clean outstanding commands */ | |
222 | mtip_command_cleanup(port->dd); | |
223 | } | |
224 | return -1; | |
225 | } | |
226 | ||
227 | /* | |
228 | * Release a command slot. | |
229 | * | |
230 | * @port Pointer to the port data structure. | |
231 | * @tag Tag of command to release | |
232 | * | |
233 | * return value | |
234 | * None | |
235 | */ | |
236 | static inline void release_slot(struct mtip_port *port, int tag) | |
237 | { | |
238 | smp_mb__before_clear_bit(); | |
239 | clear_bit(tag, port->allocated); | |
240 | smp_mb__after_clear_bit(); | |
241 | } | |
242 | ||
243 | /* | |
6316668f | 244 | * Reset the HBA (without sleeping) |
88523a61 | 245 | * |
6316668f JA |
246 | * Just like hba_reset, except does not call sleep, so can be |
247 | * run from interrupt/tasklet context. | |
88523a61 | 248 | * |
6316668f | 249 | * @dd Pointer to the driver data structure. |
88523a61 SB |
250 | * |
251 | * return value | |
6316668f JA |
252 | * 0 The reset was successful. |
253 | * -1 The HBA Reset bit did not clear. | |
88523a61 | 254 | */ |
6316668f | 255 | static int hba_reset_nosleep(struct driver_data *dd) |
88523a61 | 256 | { |
6316668f | 257 | unsigned long timeout; |
88523a61 | 258 | |
6316668f JA |
259 | /* Chip quirk: quiesce any chip function */ |
260 | mdelay(10); | |
88523a61 | 261 | |
6316668f JA |
262 | /* Set the reset bit */ |
263 | writel(HOST_RESET, dd->mmio + HOST_CTL); | |
88523a61 | 264 | |
6316668f JA |
265 | /* Flush */ |
266 | readl(dd->mmio + HOST_CTL); | |
88523a61 | 267 | |
6316668f JA |
268 | /* |
269 | * Wait 10ms then spin for up to 1 second | |
270 | * waiting for reset acknowledgement | |
271 | */ | |
272 | timeout = jiffies + msecs_to_jiffies(1000); | |
273 | mdelay(10); | |
274 | while ((readl(dd->mmio + HOST_CTL) & HOST_RESET) | |
275 | && time_before(jiffies, timeout)) | |
276 | mdelay(1); | |
88523a61 | 277 | |
8a857a88 | 278 | if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag)) |
45038367 AT |
279 | return -1; |
280 | ||
6316668f JA |
281 | if (readl(dd->mmio + HOST_CTL) & HOST_RESET) |
282 | return -1; | |
88523a61 | 283 | |
6316668f | 284 | return 0; |
88523a61 SB |
285 | } |
286 | ||
287 | /* | |
6316668f | 288 | * Issue a command to the hardware. |
88523a61 | 289 | * |
6316668f JA |
290 | * Set the appropriate bit in the s_active and Command Issue hardware |
291 | * registers, causing hardware command processing to begin. | |
88523a61 | 292 | * |
6316668f JA |
293 | * @port Pointer to the port structure. |
294 | * @tag The tag of the command to be issued. | |
88523a61 SB |
295 | * |
296 | * return value | |
6316668f | 297 | * None |
88523a61 | 298 | */ |
6316668f | 299 | static inline void mtip_issue_ncq_command(struct mtip_port *port, int tag) |
88523a61 | 300 | { |
16c906e5 | 301 | int group = tag >> 5; |
88523a61 | 302 | |
16c906e5 | 303 | atomic_set(&port->commands[tag].active, 1); |
88523a61 | 304 | |
16c906e5 AT |
305 | /* guard SACT and CI registers */ |
306 | spin_lock(&port->cmd_issue_lock[group]); | |
6316668f JA |
307 | writel((1 << MTIP_TAG_BIT(tag)), |
308 | port->s_active[MTIP_TAG_INDEX(tag)]); | |
309 | writel((1 << MTIP_TAG_BIT(tag)), | |
310 | port->cmd_issue[MTIP_TAG_INDEX(tag)]); | |
16c906e5 | 311 | spin_unlock(&port->cmd_issue_lock[group]); |
dad40f16 AT |
312 | |
313 | /* Set the command's timeout value.*/ | |
314 | port->commands[tag].comp_time = jiffies + msecs_to_jiffies( | |
315 | MTIP_NCQ_COMMAND_TIMEOUT_MS); | |
88523a61 SB |
316 | } |
317 | ||
318 | /* | |
319 | * Enable/disable the reception of FIS | |
320 | * | |
321 | * @port Pointer to the port data structure | |
322 | * @enable 1 to enable, 0 to disable | |
323 | * | |
324 | * return value | |
325 | * Previous state: 1 enabled, 0 disabled | |
326 | */ | |
327 | static int mtip_enable_fis(struct mtip_port *port, int enable) | |
328 | { | |
329 | u32 tmp; | |
330 | ||
331 | /* enable FIS reception */ | |
332 | tmp = readl(port->mmio + PORT_CMD); | |
333 | if (enable) | |
334 | writel(tmp | PORT_CMD_FIS_RX, port->mmio + PORT_CMD); | |
335 | else | |
336 | writel(tmp & ~PORT_CMD_FIS_RX, port->mmio + PORT_CMD); | |
337 | ||
338 | /* Flush */ | |
339 | readl(port->mmio + PORT_CMD); | |
340 | ||
341 | return (((tmp & PORT_CMD_FIS_RX) == PORT_CMD_FIS_RX)); | |
342 | } | |
343 | ||
344 | /* | |
345 | * Enable/disable the DMA engine | |
346 | * | |
347 | * @port Pointer to the port data structure | |
348 | * @enable 1 to enable, 0 to disable | |
349 | * | |
350 | * return value | |
351 | * Previous state: 1 enabled, 0 disabled. | |
352 | */ | |
353 | static int mtip_enable_engine(struct mtip_port *port, int enable) | |
354 | { | |
355 | u32 tmp; | |
356 | ||
357 | /* enable FIS reception */ | |
358 | tmp = readl(port->mmio + PORT_CMD); | |
359 | if (enable) | |
360 | writel(tmp | PORT_CMD_START, port->mmio + PORT_CMD); | |
361 | else | |
362 | writel(tmp & ~PORT_CMD_START, port->mmio + PORT_CMD); | |
363 | ||
364 | readl(port->mmio + PORT_CMD); | |
365 | return (((tmp & PORT_CMD_START) == PORT_CMD_START)); | |
366 | } | |
367 | ||
368 | /* | |
369 | * Enables the port DMA engine and FIS reception. | |
370 | * | |
371 | * return value | |
372 | * None | |
373 | */ | |
374 | static inline void mtip_start_port(struct mtip_port *port) | |
375 | { | |
376 | /* Enable FIS reception */ | |
377 | mtip_enable_fis(port, 1); | |
378 | ||
379 | /* Enable the DMA engine */ | |
380 | mtip_enable_engine(port, 1); | |
381 | } | |
382 | ||
383 | /* | |
384 | * Deinitialize a port by disabling port interrupts, the DMA engine, | |
385 | * and FIS reception. | |
386 | * | |
387 | * @port Pointer to the port structure | |
388 | * | |
389 | * return value | |
390 | * None | |
391 | */ | |
392 | static inline void mtip_deinit_port(struct mtip_port *port) | |
393 | { | |
394 | /* Disable interrupts on this port */ | |
395 | writel(0, port->mmio + PORT_IRQ_MASK); | |
396 | ||
397 | /* Disable the DMA engine */ | |
398 | mtip_enable_engine(port, 0); | |
399 | ||
400 | /* Disable FIS reception */ | |
401 | mtip_enable_fis(port, 0); | |
402 | } | |
403 | ||
404 | /* | |
405 | * Initialize a port. | |
406 | * | |
407 | * This function deinitializes the port by calling mtip_deinit_port() and | |
408 | * then initializes it by setting the command header and RX FIS addresses, | |
409 | * clearing the SError register and any pending port interrupts before | |
410 | * re-enabling the default set of port interrupts. | |
411 | * | |
412 | * @port Pointer to the port structure. | |
413 | * | |
414 | * return value | |
415 | * None | |
416 | */ | |
417 | static void mtip_init_port(struct mtip_port *port) | |
418 | { | |
419 | int i; | |
420 | mtip_deinit_port(port); | |
421 | ||
422 | /* Program the command list base and FIS base addresses */ | |
423 | if (readl(port->dd->mmio + HOST_CAP) & HOST_CAP_64) { | |
424 | writel((port->command_list_dma >> 16) >> 16, | |
425 | port->mmio + PORT_LST_ADDR_HI); | |
426 | writel((port->rxfis_dma >> 16) >> 16, | |
427 | port->mmio + PORT_FIS_ADDR_HI); | |
428 | } | |
429 | ||
60ec0eec | 430 | writel(port->command_list_dma & 0xFFFFFFFF, |
88523a61 | 431 | port->mmio + PORT_LST_ADDR); |
60ec0eec | 432 | writel(port->rxfis_dma & 0xFFFFFFFF, port->mmio + PORT_FIS_ADDR); |
88523a61 SB |
433 | |
434 | /* Clear SError */ | |
435 | writel(readl(port->mmio + PORT_SCR_ERR), port->mmio + PORT_SCR_ERR); | |
436 | ||
6316668f JA |
437 | /* reset the completed registers.*/ |
438 | for (i = 0; i < port->dd->slot_groups; i++) | |
439 | writel(0xFFFFFFFF, port->completed[i]); | |
88523a61 | 440 | |
6316668f | 441 | /* Clear any pending interrupts for this port */ |
6bb688c0 | 442 | writel(readl(port->mmio + PORT_IRQ_STAT), port->mmio + PORT_IRQ_STAT); |
88523a61 | 443 | |
22be2e6e AT |
444 | /* Clear any pending interrupts on the HBA. */ |
445 | writel(readl(port->dd->mmio + HOST_IRQ_STAT), | |
446 | port->dd->mmio + HOST_IRQ_STAT); | |
447 | ||
6316668f JA |
448 | /* Enable port interrupts */ |
449 | writel(DEF_PORT_IRQ, port->mmio + PORT_IRQ_MASK); | |
88523a61 SB |
450 | } |
451 | ||
452 | /* | |
453 | * Restart a port | |
454 | * | |
455 | * @port Pointer to the port data structure. | |
456 | * | |
457 | * return value | |
458 | * None | |
459 | */ | |
6316668f | 460 | static void mtip_restart_port(struct mtip_port *port) |
88523a61 SB |
461 | { |
462 | unsigned long timeout; | |
463 | ||
464 | /* Disable the DMA engine */ | |
465 | mtip_enable_engine(port, 0); | |
466 | ||
467 | /* Chip quirk: wait up to 500ms for PxCMD.CR == 0 */ | |
468 | timeout = jiffies + msecs_to_jiffies(500); | |
469 | while ((readl(port->mmio + PORT_CMD) & PORT_CMD_LIST_ON) | |
470 | && time_before(jiffies, timeout)) | |
471 | ; | |
472 | ||
8a857a88 | 473 | if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &port->dd->dd_flag)) |
45038367 AT |
474 | return; |
475 | ||
88523a61 SB |
476 | /* |
477 | * Chip quirk: escalate to hba reset if | |
478 | * PxCMD.CR not clear after 500 ms | |
479 | */ | |
480 | if (readl(port->mmio + PORT_CMD) & PORT_CMD_LIST_ON) { | |
481 | dev_warn(&port->dd->pdev->dev, | |
482 | "PxCMD.CR not clear, escalating reset\n"); | |
483 | ||
484 | if (hba_reset_nosleep(port->dd)) | |
485 | dev_err(&port->dd->pdev->dev, | |
486 | "HBA reset escalation failed.\n"); | |
487 | ||
488 | /* 30 ms delay before com reset to quiesce chip */ | |
489 | mdelay(30); | |
490 | } | |
491 | ||
492 | dev_warn(&port->dd->pdev->dev, "Issuing COM reset\n"); | |
493 | ||
494 | /* Set PxSCTL.DET */ | |
495 | writel(readl(port->mmio + PORT_SCR_CTL) | | |
496 | 1, port->mmio + PORT_SCR_CTL); | |
497 | readl(port->mmio + PORT_SCR_CTL); | |
498 | ||
499 | /* Wait 1 ms to quiesce chip function */ | |
500 | timeout = jiffies + msecs_to_jiffies(1); | |
501 | while (time_before(jiffies, timeout)) | |
502 | ; | |
503 | ||
8a857a88 | 504 | if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &port->dd->dd_flag)) |
45038367 AT |
505 | return; |
506 | ||
88523a61 SB |
507 | /* Clear PxSCTL.DET */ |
508 | writel(readl(port->mmio + PORT_SCR_CTL) & ~1, | |
509 | port->mmio + PORT_SCR_CTL); | |
510 | readl(port->mmio + PORT_SCR_CTL); | |
511 | ||
512 | /* Wait 500 ms for bit 0 of PORT_SCR_STS to be set */ | |
513 | timeout = jiffies + msecs_to_jiffies(500); | |
514 | while (((readl(port->mmio + PORT_SCR_STAT) & 0x01) == 0) | |
515 | && time_before(jiffies, timeout)) | |
516 | ; | |
517 | ||
8a857a88 | 518 | if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &port->dd->dd_flag)) |
45038367 AT |
519 | return; |
520 | ||
88523a61 SB |
521 | if ((readl(port->mmio + PORT_SCR_STAT) & 0x01) == 0) |
522 | dev_warn(&port->dd->pdev->dev, | |
523 | "COM reset failed\n"); | |
524 | ||
22be2e6e AT |
525 | mtip_init_port(port); |
526 | mtip_start_port(port); | |
88523a61 | 527 | |
88523a61 SB |
528 | } |
529 | ||
95fea2f1 AT |
530 | /* |
531 | * Helper function for tag logging | |
532 | */ | |
533 | static void print_tags(struct driver_data *dd, | |
534 | char *msg, | |
535 | unsigned long *tagbits, | |
536 | int cnt) | |
537 | { | |
538 | unsigned char tagmap[128]; | |
539 | int group, tagmap_len = 0; | |
540 | ||
541 | memset(tagmap, 0, sizeof(tagmap)); | |
542 | for (group = SLOTBITS_IN_LONGS; group > 0; group--) | |
543 | tagmap_len = sprintf(tagmap + tagmap_len, "%016lX ", | |
544 | tagbits[group-1]); | |
545 | dev_warn(&dd->pdev->dev, | |
546 | "%d command(s) %s: tagmap [%s]", cnt, msg, tagmap); | |
547 | } | |
548 | ||
6316668f JA |
549 | /* |
550 | * Called periodically to see if any read/write commands are | |
551 | * taking too long to complete. | |
552 | * | |
553 | * @data Pointer to the PORT data structure. | |
554 | * | |
555 | * return value | |
556 | * None | |
557 | */ | |
558 | static void mtip_timeout_function(unsigned long int data) | |
559 | { | |
560 | struct mtip_port *port = (struct mtip_port *) data; | |
561 | struct host_to_dev_fis *fis; | |
562 | struct mtip_cmd *command; | |
563 | int tag, cmdto_cnt = 0; | |
564 | unsigned int bit, group; | |
298d8015 | 565 | unsigned int num_command_slots; |
95fea2f1 | 566 | unsigned long to, tagaccum[SLOTBITS_IN_LONGS]; |
6316668f JA |
567 | |
568 | if (unlikely(!port)) | |
569 | return; | |
570 | ||
8a857a88 | 571 | if (test_bit(MTIP_DDF_RESUME_BIT, &port->dd->dd_flag)) { |
6316668f JA |
572 | mod_timer(&port->cmd_timer, |
573 | jiffies + msecs_to_jiffies(30000)); | |
574 | return; | |
575 | } | |
95fea2f1 AT |
576 | /* clear the tag accumulator */ |
577 | memset(tagaccum, 0, SLOTBITS_IN_LONGS * sizeof(long)); | |
298d8015 | 578 | num_command_slots = port->dd->slot_groups * 32; |
6316668f JA |
579 | |
580 | for (tag = 0; tag < num_command_slots; tag++) { | |
581 | /* | |
582 | * Skip internal command slot as it has | |
583 | * its own timeout mechanism | |
584 | */ | |
585 | if (tag == MTIP_TAG_INTERNAL) | |
586 | continue; | |
587 | ||
588 | if (atomic_read(&port->commands[tag].active) && | |
589 | (time_after(jiffies, port->commands[tag].comp_time))) { | |
590 | group = tag >> 5; | |
60ec0eec | 591 | bit = tag & 0x1F; |
6316668f JA |
592 | |
593 | command = &port->commands[tag]; | |
594 | fis = (struct host_to_dev_fis *) command->command; | |
595 | ||
95fea2f1 | 596 | set_bit(tag, tagaccum); |
6316668f JA |
597 | cmdto_cnt++; |
598 | if (cmdto_cnt == 1) | |
8a857a88 | 599 | set_bit(MTIP_PF_EH_ACTIVE_BIT, &port->flags); |
6316668f JA |
600 | |
601 | /* | |
602 | * Clear the completed bit. This should prevent | |
603 | * any interrupt handlers from trying to retire | |
604 | * the command. | |
605 | */ | |
606 | writel(1 << bit, port->completed[group]); | |
607 | ||
608 | /* Call the async completion callback. */ | |
609 | if (likely(command->async_callback)) | |
610 | command->async_callback(command->async_data, | |
611 | -EIO); | |
612 | command->async_callback = NULL; | |
613 | command->comp_func = NULL; | |
614 | ||
615 | /* Unmap the DMA scatter list entries */ | |
616 | dma_unmap_sg(&port->dd->pdev->dev, | |
617 | command->sg, | |
618 | command->scatter_ents, | |
619 | command->direction); | |
620 | ||
621 | /* | |
622 | * Clear the allocated bit and active tag for the | |
623 | * command. | |
624 | */ | |
625 | atomic_set(&port->commands[tag].active, 0); | |
626 | release_slot(port, tag); | |
627 | ||
628 | up(&port->cmd_slot); | |
629 | } | |
630 | } | |
631 | ||
c74b0f58 | 632 | if (cmdto_cnt && !test_bit(MTIP_PF_IC_ACTIVE_BIT, &port->flags)) { |
95fea2f1 AT |
633 | print_tags(port->dd, "timed out", tagaccum, cmdto_cnt); |
634 | ||
6316668f | 635 | mtip_restart_port(port); |
8a857a88 | 636 | clear_bit(MTIP_PF_EH_ACTIVE_BIT, &port->flags); |
60ec0eec | 637 | wake_up_interruptible(&port->svc_wait); |
6316668f JA |
638 | } |
639 | ||
c74b0f58 AT |
640 | if (port->ic_pause_timer) { |
641 | to = port->ic_pause_timer + msecs_to_jiffies(1000); | |
642 | if (time_after(jiffies, to)) { | |
643 | if (!test_bit(MTIP_PF_IC_ACTIVE_BIT, &port->flags)) { | |
644 | port->ic_pause_timer = 0; | |
645 | clear_bit(MTIP_PF_SE_ACTIVE_BIT, &port->flags); | |
646 | clear_bit(MTIP_PF_DM_ACTIVE_BIT, &port->flags); | |
647 | clear_bit(MTIP_PF_IC_ACTIVE_BIT, &port->flags); | |
648 | wake_up_interruptible(&port->svc_wait); | |
649 | } | |
650 | ||
651 | ||
652 | } | |
653 | } | |
654 | ||
6316668f JA |
655 | /* Restart the timer */ |
656 | mod_timer(&port->cmd_timer, | |
657 | jiffies + msecs_to_jiffies(MTIP_TIMEOUT_CHECK_PERIOD)); | |
658 | } | |
659 | ||
660 | /* | |
661 | * IO completion function. | |
662 | * | |
663 | * This completion function is called by the driver ISR when a | |
664 | * command that was issued by the kernel completes. It first calls the | |
665 | * asynchronous completion function which normally calls back into the block | |
666 | * layer passing the asynchronous callback data, then unmaps the | |
667 | * scatter list associated with the completed command, and finally | |
668 | * clears the allocated bit associated with the completed command. | |
669 | * | |
670 | * @port Pointer to the port data structure. | |
671 | * @tag Tag of the command. | |
672 | * @data Pointer to driver_data. | |
673 | * @status Completion status. | |
674 | * | |
675 | * return value | |
676 | * None | |
677 | */ | |
678 | static void mtip_async_complete(struct mtip_port *port, | |
679 | int tag, | |
680 | void *data, | |
681 | int status) | |
682 | { | |
683 | struct mtip_cmd *command; | |
684 | struct driver_data *dd = data; | |
685 | int cb_status = status ? -EIO : 0; | |
686 | ||
687 | if (unlikely(!dd) || unlikely(!port)) | |
688 | return; | |
689 | ||
690 | command = &port->commands[tag]; | |
691 | ||
692 | if (unlikely(status == PORT_IRQ_TF_ERR)) { | |
693 | dev_warn(&port->dd->pdev->dev, | |
694 | "Command tag %d failed due to TFE\n", tag); | |
695 | } | |
696 | ||
697 | /* Upper layer callback */ | |
698 | if (likely(command->async_callback)) | |
699 | command->async_callback(command->async_data, cb_status); | |
700 | ||
701 | command->async_callback = NULL; | |
702 | command->comp_func = NULL; | |
703 | ||
704 | /* Unmap the DMA scatter list entries */ | |
705 | dma_unmap_sg(&dd->pdev->dev, | |
706 | command->sg, | |
707 | command->scatter_ents, | |
708 | command->direction); | |
709 | ||
710 | /* Clear the allocated and active bits for the command */ | |
711 | atomic_set(&port->commands[tag].active, 0); | |
712 | release_slot(port, tag); | |
713 | ||
714 | up(&port->cmd_slot); | |
715 | } | |
716 | ||
717 | /* | |
718 | * Internal command completion callback function. | |
719 | * | |
720 | * This function is normally called by the driver ISR when an internal | |
721 | * command completed. This function signals the command completion by | |
722 | * calling complete(). | |
723 | * | |
724 | * @port Pointer to the port data structure. | |
725 | * @tag Tag of the command that has completed. | |
726 | * @data Pointer to a completion structure. | |
727 | * @status Completion status. | |
728 | * | |
729 | * return value | |
730 | * None | |
731 | */ | |
732 | static void mtip_completion(struct mtip_port *port, | |
733 | int tag, | |
734 | void *data, | |
735 | int status) | |
736 | { | |
737 | struct mtip_cmd *command = &port->commands[tag]; | |
738 | struct completion *waiting = data; | |
739 | if (unlikely(status == PORT_IRQ_TF_ERR)) | |
740 | dev_warn(&port->dd->pdev->dev, | |
741 | "Internal command %d completed with TFE\n", tag); | |
742 | ||
743 | command->async_callback = NULL; | |
744 | command->comp_func = NULL; | |
745 | ||
746 | complete(waiting); | |
747 | } | |
748 | ||
8182b495 AT |
749 | static void mtip_null_completion(struct mtip_port *port, |
750 | int tag, | |
751 | void *data, | |
752 | int status) | |
753 | { | |
754 | return; | |
755 | } | |
756 | ||
f6587217 AT |
757 | static int mtip_read_log_page(struct mtip_port *port, u8 page, u16 *buffer, |
758 | dma_addr_t buffer_dma, unsigned int sectors); | |
759 | static int mtip_get_smart_attr(struct mtip_port *port, unsigned int id, | |
760 | struct smart_attr *attrib); | |
88523a61 SB |
761 | /* |
762 | * Handle an error. | |
763 | * | |
764 | * @dd Pointer to the DRIVER_DATA structure. | |
765 | * | |
766 | * return value | |
767 | * None | |
768 | */ | |
769 | static void mtip_handle_tfe(struct driver_data *dd) | |
770 | { | |
f6587217 | 771 | int group, tag, bit, reissue, rv; |
88523a61 | 772 | struct mtip_port *port; |
f6587217 | 773 | struct mtip_cmd *cmd; |
88523a61 SB |
774 | u32 completed; |
775 | struct host_to_dev_fis *fis; | |
776 | unsigned long tagaccum[SLOTBITS_IN_LONGS]; | |
95fea2f1 | 777 | unsigned int cmd_cnt = 0; |
f6587217 AT |
778 | unsigned char *buf; |
779 | char *fail_reason = NULL; | |
780 | int fail_all_ncq_write = 0, fail_all_ncq_cmds = 0; | |
88523a61 SB |
781 | |
782 | dev_warn(&dd->pdev->dev, "Taskfile error\n"); | |
783 | ||
784 | port = dd->port; | |
785 | ||
786 | /* Stop the timer to prevent command timeouts. */ | |
787 | del_timer(&port->cmd_timer); | |
d02e1f0a AT |
788 | set_bit(MTIP_PF_EH_ACTIVE_BIT, &port->flags); |
789 | ||
790 | if (test_bit(MTIP_PF_IC_ACTIVE_BIT, &port->flags) && | |
791 | test_bit(MTIP_TAG_INTERNAL, port->allocated)) { | |
792 | cmd = &port->commands[MTIP_TAG_INTERNAL]; | |
793 | dbg_printk(MTIP_DRV_NAME " TFE for the internal command\n"); | |
794 | ||
795 | atomic_inc(&cmd->active); /* active > 1 indicates error */ | |
796 | if (cmd->comp_data && cmd->comp_func) { | |
797 | cmd->comp_func(port, MTIP_TAG_INTERNAL, | |
798 | cmd->comp_data, PORT_IRQ_TF_ERR); | |
799 | } | |
800 | goto handle_tfe_exit; | |
801 | } | |
88523a61 | 802 | |
95fea2f1 AT |
803 | /* clear the tag accumulator */ |
804 | memset(tagaccum, 0, SLOTBITS_IN_LONGS * sizeof(long)); | |
805 | ||
88523a61 SB |
806 | /* Loop through all the groups */ |
807 | for (group = 0; group < dd->slot_groups; group++) { | |
808 | completed = readl(port->completed[group]); | |
809 | ||
810 | /* clear completed status register in the hardware.*/ | |
811 | writel(completed, port->completed[group]); | |
812 | ||
88523a61 SB |
813 | /* Process successfully completed commands */ |
814 | for (bit = 0; bit < 32 && completed; bit++) { | |
815 | if (!(completed & (1<<bit))) | |
816 | continue; | |
817 | tag = (group << 5) + bit; | |
818 | ||
819 | /* Skip the internal command slot */ | |
820 | if (tag == MTIP_TAG_INTERNAL) | |
821 | continue; | |
822 | ||
f6587217 AT |
823 | cmd = &port->commands[tag]; |
824 | if (likely(cmd->comp_func)) { | |
88523a61 | 825 | set_bit(tag, tagaccum); |
95fea2f1 | 826 | cmd_cnt++; |
f6587217 AT |
827 | atomic_set(&cmd->active, 0); |
828 | cmd->comp_func(port, | |
88523a61 | 829 | tag, |
f6587217 | 830 | cmd->comp_data, |
88523a61 SB |
831 | 0); |
832 | } else { | |
833 | dev_err(&port->dd->pdev->dev, | |
834 | "Missing completion func for tag %d", | |
835 | tag); | |
836 | if (mtip_check_surprise_removal(dd->pdev)) { | |
837 | mtip_command_cleanup(dd); | |
838 | /* don't proceed further */ | |
839 | return; | |
840 | } | |
841 | } | |
842 | } | |
843 | } | |
95fea2f1 AT |
844 | |
845 | print_tags(dd, "completed (TFE)", tagaccum, cmd_cnt); | |
88523a61 SB |
846 | |
847 | /* Restart the port */ | |
848 | mdelay(20); | |
849 | mtip_restart_port(port); | |
850 | ||
f6587217 AT |
851 | /* Trying to determine the cause of the error */ |
852 | rv = mtip_read_log_page(dd->port, ATA_LOG_SATA_NCQ, | |
853 | dd->port->log_buf, | |
854 | dd->port->log_buf_dma, 1); | |
855 | if (rv) { | |
856 | dev_warn(&dd->pdev->dev, | |
857 | "Error in READ LOG EXT (10h) command\n"); | |
858 | /* non-critical error, don't fail the load */ | |
859 | } else { | |
860 | buf = (unsigned char *)dd->port->log_buf; | |
861 | if (buf[259] & 0x1) { | |
862 | dev_info(&dd->pdev->dev, | |
863 | "Write protect bit is set.\n"); | |
8a857a88 | 864 | set_bit(MTIP_DDF_WRITE_PROTECT_BIT, &dd->dd_flag); |
f6587217 AT |
865 | fail_all_ncq_write = 1; |
866 | fail_reason = "write protect"; | |
867 | } | |
868 | if (buf[288] == 0xF7) { | |
869 | dev_info(&dd->pdev->dev, | |
870 | "Exceeded Tmax, drive in thermal shutdown.\n"); | |
8a857a88 | 871 | set_bit(MTIP_DDF_OVER_TEMP_BIT, &dd->dd_flag); |
f6587217 AT |
872 | fail_all_ncq_cmds = 1; |
873 | fail_reason = "thermal shutdown"; | |
874 | } | |
875 | if (buf[288] == 0xBF) { | |
876 | dev_info(&dd->pdev->dev, | |
877 | "Drive indicates rebuild has failed.\n"); | |
878 | fail_all_ncq_cmds = 1; | |
879 | fail_reason = "rebuild failed"; | |
880 | } | |
881 | } | |
882 | ||
88523a61 SB |
883 | /* clear the tag accumulator */ |
884 | memset(tagaccum, 0, SLOTBITS_IN_LONGS * sizeof(long)); | |
885 | ||
886 | /* Loop through all the groups */ | |
887 | for (group = 0; group < dd->slot_groups; group++) { | |
888 | for (bit = 0; bit < 32; bit++) { | |
889 | reissue = 1; | |
890 | tag = (group << 5) + bit; | |
f6587217 | 891 | cmd = &port->commands[tag]; |
88523a61 SB |
892 | |
893 | /* If the active bit is set re-issue the command */ | |
f6587217 | 894 | if (atomic_read(&cmd->active) == 0) |
88523a61 SB |
895 | continue; |
896 | ||
f6587217 | 897 | fis = (struct host_to_dev_fis *)cmd->command; |
88523a61 SB |
898 | |
899 | /* Should re-issue? */ | |
900 | if (tag == MTIP_TAG_INTERNAL || | |
901 | fis->command == ATA_CMD_SET_FEATURES) | |
902 | reissue = 0; | |
f6587217 AT |
903 | else { |
904 | if (fail_all_ncq_cmds || | |
905 | (fail_all_ncq_write && | |
906 | fis->command == ATA_CMD_FPDMA_WRITE)) { | |
907 | dev_warn(&dd->pdev->dev, | |
908 | " Fail: %s w/tag %d [%s].\n", | |
909 | fis->command == ATA_CMD_FPDMA_WRITE ? | |
910 | "write" : "read", | |
911 | tag, | |
912 | fail_reason != NULL ? | |
913 | fail_reason : "unknown"); | |
914 | atomic_set(&cmd->active, 0); | |
915 | if (cmd->comp_func) { | |
916 | cmd->comp_func(port, tag, | |
917 | cmd->comp_data, | |
918 | -ENODATA); | |
919 | } | |
920 | continue; | |
921 | } | |
922 | } | |
88523a61 SB |
923 | |
924 | /* | |
925 | * First check if this command has | |
926 | * exceeded its retries. | |
927 | */ | |
f6587217 | 928 | if (reissue && (cmd->retries-- > 0)) { |
88523a61 SB |
929 | |
930 | set_bit(tag, tagaccum); | |
931 | ||
88523a61 SB |
932 | /* Re-issue the command. */ |
933 | mtip_issue_ncq_command(port, tag); | |
934 | ||
935 | continue; | |
936 | } | |
937 | ||
938 | /* Retire a command that will not be reissued */ | |
939 | dev_warn(&port->dd->pdev->dev, | |
940 | "retiring tag %d\n", tag); | |
f6587217 | 941 | atomic_set(&cmd->active, 0); |
88523a61 | 942 | |
f6587217 AT |
943 | if (cmd->comp_func) |
944 | cmd->comp_func( | |
88523a61 SB |
945 | port, |
946 | tag, | |
f6587217 | 947 | cmd->comp_data, |
88523a61 SB |
948 | PORT_IRQ_TF_ERR); |
949 | else | |
950 | dev_warn(&port->dd->pdev->dev, | |
951 | "Bad completion for tag %d\n", | |
952 | tag); | |
953 | } | |
954 | } | |
95fea2f1 | 955 | print_tags(dd, "reissued (TFE)", tagaccum, cmd_cnt); |
88523a61 | 956 | |
d02e1f0a | 957 | handle_tfe_exit: |
60ec0eec | 958 | /* clear eh_active */ |
8a857a88 | 959 | clear_bit(MTIP_PF_EH_ACTIVE_BIT, &port->flags); |
60ec0eec | 960 | wake_up_interruptible(&port->svc_wait); |
88523a61 SB |
961 | |
962 | mod_timer(&port->cmd_timer, | |
963 | jiffies + msecs_to_jiffies(MTIP_TIMEOUT_CHECK_PERIOD)); | |
964 | } | |
965 | ||
966 | /* | |
967 | * Handle a set device bits interrupt | |
968 | */ | |
16c906e5 AT |
969 | static inline void mtip_workq_sdbfx(struct mtip_port *port, int group, |
970 | u32 completed) | |
88523a61 | 971 | { |
16c906e5 AT |
972 | struct driver_data *dd = port->dd; |
973 | int tag, bit; | |
88523a61 SB |
974 | struct mtip_cmd *command; |
975 | ||
16c906e5 AT |
976 | if (!completed) { |
977 | WARN_ON_ONCE(!completed); | |
978 | return; | |
979 | } | |
980 | /* clear completed status register in the hardware.*/ | |
981 | writel(completed, port->completed[group]); | |
88523a61 | 982 | |
16c906e5 AT |
983 | /* Process completed commands. */ |
984 | for (bit = 0; (bit < 32) && completed; bit++) { | |
985 | if (completed & 0x01) { | |
986 | tag = (group << 5) | bit; | |
88523a61 | 987 | |
16c906e5 AT |
988 | /* skip internal command slot. */ |
989 | if (unlikely(tag == MTIP_TAG_INTERNAL)) | |
990 | continue; | |
88523a61 | 991 | |
16c906e5 AT |
992 | command = &port->commands[tag]; |
993 | /* make internal callback */ | |
994 | if (likely(command->comp_func)) { | |
995 | command->comp_func( | |
996 | port, | |
997 | tag, | |
998 | command->comp_data, | |
999 | 0); | |
1000 | } else { | |
1001 | dev_warn(&dd->pdev->dev, | |
1002 | "Null completion " | |
1003 | "for tag %d", | |
1004 | tag); | |
88523a61 | 1005 | |
16c906e5 AT |
1006 | if (mtip_check_surprise_removal( |
1007 | dd->pdev)) { | |
1008 | mtip_command_cleanup(dd); | |
1009 | return; | |
88523a61 SB |
1010 | } |
1011 | } | |
1012 | } | |
16c906e5 | 1013 | completed >>= 1; |
88523a61 | 1014 | } |
16c906e5 AT |
1015 | |
1016 | /* If last, re-enable interrupts */ | |
1017 | if (atomic_dec_return(&dd->irq_workers_active) == 0) | |
1018 | writel(0xffffffff, dd->mmio + HOST_IRQ_STAT); | |
88523a61 SB |
1019 | } |
1020 | ||
1021 | /* | |
1022 | * Process legacy pio and d2h interrupts | |
1023 | */ | |
1024 | static inline void mtip_process_legacy(struct driver_data *dd, u32 port_stat) | |
1025 | { | |
1026 | struct mtip_port *port = dd->port; | |
1027 | struct mtip_cmd *cmd = &port->commands[MTIP_TAG_INTERNAL]; | |
1028 | ||
8a857a88 | 1029 | if (test_bit(MTIP_PF_IC_ACTIVE_BIT, &port->flags) && |
60ec0eec | 1030 | (cmd != NULL) && !(readl(port->cmd_issue[MTIP_TAG_INTERNAL]) |
88523a61 SB |
1031 | & (1 << MTIP_TAG_INTERNAL))) { |
1032 | if (cmd->comp_func) { | |
1033 | cmd->comp_func(port, | |
1034 | MTIP_TAG_INTERNAL, | |
1035 | cmd->comp_data, | |
1036 | 0); | |
1037 | return; | |
1038 | } | |
1039 | } | |
1040 | ||
88523a61 SB |
1041 | return; |
1042 | } | |
1043 | ||
1044 | /* | |
1045 | * Demux and handle errors | |
1046 | */ | |
1047 | static inline void mtip_process_errors(struct driver_data *dd, u32 port_stat) | |
1048 | { | |
1049 | if (likely(port_stat & (PORT_IRQ_TF_ERR | PORT_IRQ_IF_ERR))) | |
1050 | mtip_handle_tfe(dd); | |
1051 | ||
1052 | if (unlikely(port_stat & PORT_IRQ_CONNECT)) { | |
1053 | dev_warn(&dd->pdev->dev, | |
1054 | "Clearing PxSERR.DIAG.x\n"); | |
1055 | writel((1 << 26), dd->port->mmio + PORT_SCR_ERR); | |
1056 | } | |
1057 | ||
1058 | if (unlikely(port_stat & PORT_IRQ_PHYRDY)) { | |
1059 | dev_warn(&dd->pdev->dev, | |
1060 | "Clearing PxSERR.DIAG.n\n"); | |
1061 | writel((1 << 16), dd->port->mmio + PORT_SCR_ERR); | |
1062 | } | |
1063 | ||
1064 | if (unlikely(port_stat & ~PORT_IRQ_HANDLED)) { | |
1065 | dev_warn(&dd->pdev->dev, | |
1066 | "Port stat errors %x unhandled\n", | |
1067 | (port_stat & ~PORT_IRQ_HANDLED)); | |
1068 | } | |
1069 | } | |
1070 | ||
1071 | static inline irqreturn_t mtip_handle_irq(struct driver_data *data) | |
1072 | { | |
1073 | struct driver_data *dd = (struct driver_data *) data; | |
1074 | struct mtip_port *port = dd->port; | |
1075 | u32 hba_stat, port_stat; | |
1076 | int rv = IRQ_NONE; | |
16c906e5 AT |
1077 | int do_irq_enable = 1, i, workers; |
1078 | struct mtip_work *twork; | |
88523a61 SB |
1079 | |
1080 | hba_stat = readl(dd->mmio + HOST_IRQ_STAT); | |
1081 | if (hba_stat) { | |
1082 | rv = IRQ_HANDLED; | |
1083 | ||
1084 | /* Acknowledge the interrupt status on the port.*/ | |
1085 | port_stat = readl(port->mmio + PORT_IRQ_STAT); | |
1086 | writel(port_stat, port->mmio + PORT_IRQ_STAT); | |
1087 | ||
1088 | /* Demux port status */ | |
16c906e5 AT |
1089 | if (likely(port_stat & PORT_IRQ_SDB_FIS)) { |
1090 | do_irq_enable = 0; | |
1091 | WARN_ON_ONCE(atomic_read(&dd->irq_workers_active) != 0); | |
1092 | ||
1093 | /* Start at 1: group zero is always local? */ | |
1094 | for (i = 0, workers = 0; i < MTIP_MAX_SLOT_GROUPS; | |
1095 | i++) { | |
1096 | twork = &dd->work[i]; | |
1097 | twork->completed = readl(port->completed[i]); | |
1098 | if (twork->completed) | |
1099 | workers++; | |
1100 | } | |
1101 | ||
1102 | atomic_set(&dd->irq_workers_active, workers); | |
1103 | if (workers) { | |
1104 | for (i = 1; i < MTIP_MAX_SLOT_GROUPS; i++) { | |
1105 | twork = &dd->work[i]; | |
1106 | if (twork->completed) | |
1107 | queue_work_on( | |
1108 | twork->cpu_binding, | |
1109 | dd->isr_workq, | |
1110 | &twork->work); | |
1111 | } | |
1112 | ||
1113 | if (likely(dd->work[0].completed)) | |
1114 | mtip_workq_sdbfx(port, 0, | |
1115 | dd->work[0].completed); | |
1116 | ||
1117 | } else { | |
1118 | /* | |
1119 | * Chip quirk: SDB interrupt but nothing | |
1120 | * to complete | |
1121 | */ | |
1122 | do_irq_enable = 1; | |
1123 | } | |
1124 | } | |
88523a61 SB |
1125 | |
1126 | if (unlikely(port_stat & PORT_IRQ_ERR)) { | |
1127 | if (unlikely(mtip_check_surprise_removal(dd->pdev))) { | |
1128 | mtip_command_cleanup(dd); | |
1129 | /* don't proceed further */ | |
1130 | return IRQ_HANDLED; | |
1131 | } | |
8a857a88 | 1132 | if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT, |
45038367 AT |
1133 | &dd->dd_flag)) |
1134 | return rv; | |
88523a61 SB |
1135 | |
1136 | mtip_process_errors(dd, port_stat & PORT_IRQ_ERR); | |
1137 | } | |
1138 | ||
1139 | if (unlikely(port_stat & PORT_IRQ_LEGACY)) | |
1140 | mtip_process_legacy(dd, port_stat & PORT_IRQ_LEGACY); | |
1141 | } | |
1142 | ||
1143 | /* acknowledge interrupt */ | |
16c906e5 AT |
1144 | if (unlikely(do_irq_enable)) |
1145 | writel(hba_stat, dd->mmio + HOST_IRQ_STAT); | |
88523a61 SB |
1146 | |
1147 | return rv; | |
1148 | } | |
1149 | ||
88523a61 SB |
1150 | /* |
1151 | * HBA interrupt subroutine. | |
1152 | * | |
1153 | * @irq IRQ number. | |
1154 | * @instance Pointer to the driver data structure. | |
1155 | * | |
1156 | * return value | |
1157 | * IRQ_HANDLED A HBA interrupt was pending and handled. | |
1158 | * IRQ_NONE This interrupt was not for the HBA. | |
1159 | */ | |
1160 | static irqreturn_t mtip_irq_handler(int irq, void *instance) | |
1161 | { | |
1162 | struct driver_data *dd = instance; | |
16c906e5 AT |
1163 | |
1164 | return mtip_handle_irq(dd); | |
88523a61 SB |
1165 | } |
1166 | ||
1167 | static void mtip_issue_non_ncq_command(struct mtip_port *port, int tag) | |
1168 | { | |
1169 | atomic_set(&port->commands[tag].active, 1); | |
1170 | writel(1 << MTIP_TAG_BIT(tag), | |
1171 | port->cmd_issue[MTIP_TAG_INDEX(tag)]); | |
1172 | } | |
1173 | ||
c74b0f58 AT |
1174 | static bool mtip_pause_ncq(struct mtip_port *port, |
1175 | struct host_to_dev_fis *fis) | |
1176 | { | |
1177 | struct host_to_dev_fis *reply; | |
1178 | unsigned long task_file_data; | |
1179 | ||
1180 | reply = port->rxfis + RX_FIS_D2H_REG; | |
1181 | task_file_data = readl(port->mmio+PORT_TFDATA); | |
1182 | ||
12a166c9 AT |
1183 | if (fis->command == ATA_CMD_SEC_ERASE_UNIT) |
1184 | clear_bit(MTIP_DDF_SEC_LOCK_BIT, &port->dd->dd_flag); | |
1185 | ||
1186 | if ((task_file_data & 1)) | |
c74b0f58 AT |
1187 | return false; |
1188 | ||
1189 | if (fis->command == ATA_CMD_SEC_ERASE_PREP) { | |
1190 | set_bit(MTIP_PF_SE_ACTIVE_BIT, &port->flags); | |
12a166c9 | 1191 | set_bit(MTIP_DDF_SEC_LOCK_BIT, &port->dd->dd_flag); |
c74b0f58 AT |
1192 | port->ic_pause_timer = jiffies; |
1193 | return true; | |
1194 | } else if ((fis->command == ATA_CMD_DOWNLOAD_MICRO) && | |
1195 | (fis->features == 0x03)) { | |
1196 | set_bit(MTIP_PF_DM_ACTIVE_BIT, &port->flags); | |
1197 | port->ic_pause_timer = jiffies; | |
1198 | return true; | |
1199 | } else if ((fis->command == ATA_CMD_SEC_ERASE_UNIT) || | |
1200 | ((fis->command == 0xFC) && | |
1201 | (fis->features == 0x27 || fis->features == 0x72 || | |
1202 | fis->features == 0x62 || fis->features == 0x26))) { | |
1203 | /* Com reset after secure erase or lowlevel format */ | |
1204 | mtip_restart_port(port); | |
1205 | return false; | |
1206 | } | |
1207 | ||
1208 | return false; | |
1209 | } | |
1210 | ||
88523a61 SB |
1211 | /* |
1212 | * Wait for port to quiesce | |
1213 | * | |
1214 | * @port Pointer to port data structure | |
1215 | * @timeout Max duration to wait (ms) | |
1216 | * | |
1217 | * return value | |
1218 | * 0 Success | |
1219 | * -EBUSY Commands still active | |
1220 | */ | |
1221 | static int mtip_quiesce_io(struct mtip_port *port, unsigned long timeout) | |
1222 | { | |
1223 | unsigned long to; | |
3e54a3d1 DC |
1224 | unsigned int n; |
1225 | unsigned int active = 1; | |
88523a61 SB |
1226 | |
1227 | to = jiffies + msecs_to_jiffies(timeout); | |
1228 | do { | |
8a857a88 AT |
1229 | if (test_bit(MTIP_PF_SVC_THD_ACTIVE_BIT, &port->flags) && |
1230 | test_bit(MTIP_PF_ISSUE_CMDS_BIT, &port->flags)) { | |
60ec0eec AT |
1231 | msleep(20); |
1232 | continue; /* svc thd is actively issuing commands */ | |
1233 | } | |
8a857a88 | 1234 | if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &port->dd->dd_flag)) |
45038367 | 1235 | return -EFAULT; |
88523a61 SB |
1236 | /* |
1237 | * Ignore s_active bit 0 of array element 0. | |
1238 | * This bit will always be set | |
1239 | */ | |
60ec0eec | 1240 | active = readl(port->s_active[0]) & 0xFFFFFFFE; |
88523a61 SB |
1241 | for (n = 1; n < port->dd->slot_groups; n++) |
1242 | active |= readl(port->s_active[n]); | |
1243 | ||
1244 | if (!active) | |
1245 | break; | |
1246 | ||
1247 | msleep(20); | |
1248 | } while (time_before(jiffies, to)); | |
1249 | ||
1250 | return active ? -EBUSY : 0; | |
1251 | } | |
1252 | ||
1253 | /* | |
1254 | * Execute an internal command and wait for the completion. | |
1255 | * | |
1256 | * @port Pointer to the port data structure. | |
1257 | * @fis Pointer to the FIS that describes the command. | |
60ec0eec | 1258 | * @fis_len Length in WORDS of the FIS. |
88523a61 | 1259 | * @buffer DMA accessible for command data. |
60ec0eec | 1260 | * @buf_len Length, in bytes, of the data buffer. |
88523a61 SB |
1261 | * @opts Command header options, excluding the FIS length |
1262 | * and the number of PRD entries. | |
1263 | * @timeout Time in ms to wait for the command to complete. | |
1264 | * | |
1265 | * return value | |
1266 | * 0 Command completed successfully. | |
1267 | * -EFAULT The buffer address is not correctly aligned. | |
1268 | * -EBUSY Internal command or other IO in progress. | |
1269 | * -EAGAIN Time out waiting for command to complete. | |
1270 | */ | |
1271 | static int mtip_exec_internal_command(struct mtip_port *port, | |
8182b495 | 1272 | struct host_to_dev_fis *fis, |
60ec0eec | 1273 | int fis_len, |
88523a61 | 1274 | dma_addr_t buffer, |
60ec0eec | 1275 | int buf_len, |
88523a61 SB |
1276 | u32 opts, |
1277 | gfp_t atomic, | |
1278 | unsigned long timeout) | |
1279 | { | |
1280 | struct mtip_cmd_sg *command_sg; | |
1281 | DECLARE_COMPLETION_ONSTACK(wait); | |
c74b0f58 | 1282 | int rv = 0, ready2go = 1; |
88523a61 | 1283 | struct mtip_cmd *int_cmd = &port->commands[MTIP_TAG_INTERNAL]; |
c74b0f58 | 1284 | unsigned long to; |
88523a61 SB |
1285 | |
1286 | /* Make sure the buffer is 8 byte aligned. This is asic specific. */ | |
1287 | if (buffer & 0x00000007) { | |
1288 | dev_err(&port->dd->pdev->dev, | |
1289 | "SG buffer is not 8 byte aligned\n"); | |
1290 | return -EFAULT; | |
1291 | } | |
1292 | ||
c74b0f58 AT |
1293 | to = jiffies + msecs_to_jiffies(timeout); |
1294 | do { | |
1295 | ready2go = !test_and_set_bit(MTIP_TAG_INTERNAL, | |
1296 | port->allocated); | |
1297 | if (ready2go) | |
1298 | break; | |
1299 | mdelay(100); | |
1300 | } while (time_before(jiffies, to)); | |
1301 | if (!ready2go) { | |
88523a61 | 1302 | dev_warn(&port->dd->pdev->dev, |
c74b0f58 | 1303 | "Internal cmd active. new cmd [%02X]\n", fis->command); |
88523a61 SB |
1304 | return -EBUSY; |
1305 | } | |
8a857a88 | 1306 | set_bit(MTIP_PF_IC_ACTIVE_BIT, &port->flags); |
c74b0f58 AT |
1307 | port->ic_pause_timer = 0; |
1308 | ||
1309 | if (fis->command == ATA_CMD_SEC_ERASE_UNIT) | |
1310 | clear_bit(MTIP_PF_SE_ACTIVE_BIT, &port->flags); | |
1311 | else if (fis->command == ATA_CMD_DOWNLOAD_MICRO) | |
1312 | clear_bit(MTIP_PF_DM_ACTIVE_BIT, &port->flags); | |
88523a61 SB |
1313 | |
1314 | if (atomic == GFP_KERNEL) { | |
8182b495 AT |
1315 | if (fis->command != ATA_CMD_STANDBYNOW1) { |
1316 | /* wait for io to complete if non atomic */ | |
1317 | if (mtip_quiesce_io(port, 5000) < 0) { | |
1318 | dev_warn(&port->dd->pdev->dev, | |
1319 | "Failed to quiesce IO\n"); | |
1320 | release_slot(port, MTIP_TAG_INTERNAL); | |
8a857a88 | 1321 | clear_bit(MTIP_PF_IC_ACTIVE_BIT, &port->flags); |
8182b495 AT |
1322 | wake_up_interruptible(&port->svc_wait); |
1323 | return -EBUSY; | |
1324 | } | |
88523a61 SB |
1325 | } |
1326 | ||
1327 | /* Set the completion function and data for the command. */ | |
1328 | int_cmd->comp_data = &wait; | |
1329 | int_cmd->comp_func = mtip_completion; | |
1330 | ||
1331 | } else { | |
1332 | /* Clear completion - we're going to poll */ | |
1333 | int_cmd->comp_data = NULL; | |
8182b495 | 1334 | int_cmd->comp_func = mtip_null_completion; |
88523a61 SB |
1335 | } |
1336 | ||
1337 | /* Copy the command to the command table */ | |
60ec0eec | 1338 | memcpy(int_cmd->command, fis, fis_len*4); |
88523a61 SB |
1339 | |
1340 | /* Populate the SG list */ | |
1341 | int_cmd->command_header->opts = | |
60ec0eec AT |
1342 | __force_bit2int cpu_to_le32(opts | fis_len); |
1343 | if (buf_len) { | |
88523a61 SB |
1344 | command_sg = int_cmd->command + AHCI_CMD_TBL_HDR_SZ; |
1345 | ||
60ec0eec AT |
1346 | command_sg->info = |
1347 | __force_bit2int cpu_to_le32((buf_len-1) & 0x3FFFFF); | |
1348 | command_sg->dba = | |
1349 | __force_bit2int cpu_to_le32(buffer & 0xFFFFFFFF); | |
1350 | command_sg->dba_upper = | |
1351 | __force_bit2int cpu_to_le32((buffer >> 16) >> 16); | |
88523a61 | 1352 | |
60ec0eec AT |
1353 | int_cmd->command_header->opts |= |
1354 | __force_bit2int cpu_to_le32((1 << 16)); | |
88523a61 SB |
1355 | } |
1356 | ||
1357 | /* Populate the command header */ | |
1358 | int_cmd->command_header->byte_count = 0; | |
1359 | ||
1360 | /* Issue the command to the hardware */ | |
1361 | mtip_issue_non_ncq_command(port, MTIP_TAG_INTERNAL); | |
1362 | ||
1363 | /* Poll if atomic, wait_for_completion otherwise */ | |
1364 | if (atomic == GFP_KERNEL) { | |
1365 | /* Wait for the command to complete or timeout. */ | |
1366 | if (wait_for_completion_timeout( | |
1367 | &wait, | |
1368 | msecs_to_jiffies(timeout)) == 0) { | |
1369 | dev_err(&port->dd->pdev->dev, | |
60ec0eec AT |
1370 | "Internal command did not complete [%d] " |
1371 | "within timeout of %lu ms\n", | |
1372 | atomic, timeout); | |
45038367 | 1373 | if (mtip_check_surprise_removal(port->dd->pdev) || |
8a857a88 | 1374 | test_bit(MTIP_DDF_REMOVE_PENDING_BIT, |
45038367 AT |
1375 | &port->dd->dd_flag)) { |
1376 | rv = -ENXIO; | |
1377 | goto exec_ic_exit; | |
1378 | } | |
88523a61 SB |
1379 | rv = -EAGAIN; |
1380 | } | |
88523a61 SB |
1381 | } else { |
1382 | /* Spin for <timeout> checking if command still outstanding */ | |
1383 | timeout = jiffies + msecs_to_jiffies(timeout); | |
8182b495 AT |
1384 | while ((readl(port->cmd_issue[MTIP_TAG_INTERNAL]) |
1385 | & (1 << MTIP_TAG_INTERNAL)) | |
1386 | && time_before(jiffies, timeout)) { | |
1387 | if (mtip_check_surprise_removal(port->dd->pdev)) { | |
1388 | rv = -ENXIO; | |
1389 | goto exec_ic_exit; | |
1390 | } | |
1391 | if ((fis->command != ATA_CMD_STANDBYNOW1) && | |
8a857a88 | 1392 | test_bit(MTIP_DDF_REMOVE_PENDING_BIT, |
45038367 AT |
1393 | &port->dd->dd_flag)) { |
1394 | rv = -ENXIO; | |
1395 | goto exec_ic_exit; | |
1396 | } | |
d02e1f0a AT |
1397 | if (readl(port->mmio + PORT_IRQ_STAT) & PORT_IRQ_ERR) { |
1398 | atomic_inc(&int_cmd->active); /* error */ | |
1399 | break; | |
1400 | } | |
45038367 | 1401 | } |
d02e1f0a | 1402 | } |
88523a61 | 1403 | |
d02e1f0a AT |
1404 | if (atomic_read(&int_cmd->active) > 1) { |
1405 | dev_err(&port->dd->pdev->dev, | |
1406 | "Internal command [%02X] failed\n", fis->command); | |
1407 | rv = -EIO; | |
1408 | } | |
1409 | if (readl(port->cmd_issue[MTIP_TAG_INTERNAL]) | |
88523a61 | 1410 | & (1 << MTIP_TAG_INTERNAL)) { |
d02e1f0a AT |
1411 | rv = -ENXIO; |
1412 | if (!test_bit(MTIP_DDF_REMOVE_PENDING_BIT, | |
1413 | &port->dd->dd_flag)) { | |
1414 | mtip_restart_port(port); | |
88523a61 SB |
1415 | rv = -EAGAIN; |
1416 | } | |
1417 | } | |
45038367 | 1418 | exec_ic_exit: |
88523a61 SB |
1419 | /* Clear the allocated and active bits for the internal command. */ |
1420 | atomic_set(&int_cmd->active, 0); | |
1421 | release_slot(port, MTIP_TAG_INTERNAL); | |
c74b0f58 AT |
1422 | if (rv >= 0 && mtip_pause_ncq(port, fis)) { |
1423 | /* NCQ paused */ | |
1424 | return rv; | |
1425 | } | |
8a857a88 | 1426 | clear_bit(MTIP_PF_IC_ACTIVE_BIT, &port->flags); |
60ec0eec | 1427 | wake_up_interruptible(&port->svc_wait); |
88523a61 SB |
1428 | |
1429 | return rv; | |
1430 | } | |
1431 | ||
1432 | /* | |
1433 | * Byte-swap ATA ID strings. | |
1434 | * | |
1435 | * ATA identify data contains strings in byte-swapped 16-bit words. | |
1436 | * They must be swapped (on all architectures) to be usable as C strings. | |
1437 | * This function swaps bytes in-place. | |
1438 | * | |
1439 | * @buf The buffer location of the string | |
1440 | * @len The number of bytes to swap | |
1441 | * | |
1442 | * return value | |
1443 | * None | |
1444 | */ | |
1445 | static inline void ata_swap_string(u16 *buf, unsigned int len) | |
1446 | { | |
1447 | int i; | |
1448 | for (i = 0; i < (len/2); i++) | |
1449 | be16_to_cpus(&buf[i]); | |
1450 | } | |
1451 | ||
1452 | /* | |
1453 | * Request the device identity information. | |
1454 | * | |
1455 | * If a user space buffer is not specified, i.e. is NULL, the | |
1456 | * identify information is still read from the drive and placed | |
1457 | * into the identify data buffer (@e port->identify) in the | |
1458 | * port data structure. | |
1459 | * When the identify buffer contains valid identify information @e | |
1460 | * port->identify_valid is non-zero. | |
1461 | * | |
1462 | * @port Pointer to the port structure. | |
1463 | * @user_buffer A user space buffer where the identify data should be | |
1464 | * copied. | |
1465 | * | |
1466 | * return value | |
1467 | * 0 Command completed successfully. | |
1468 | * -EFAULT An error occurred while coping data to the user buffer. | |
1469 | * -1 Command failed. | |
1470 | */ | |
1471 | static int mtip_get_identify(struct mtip_port *port, void __user *user_buffer) | |
1472 | { | |
1473 | int rv = 0; | |
1474 | struct host_to_dev_fis fis; | |
1475 | ||
8a857a88 | 1476 | if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &port->dd->dd_flag)) |
45038367 AT |
1477 | return -EFAULT; |
1478 | ||
88523a61 SB |
1479 | /* Build the FIS. */ |
1480 | memset(&fis, 0, sizeof(struct host_to_dev_fis)); | |
1481 | fis.type = 0x27; | |
1482 | fis.opts = 1 << 7; | |
1483 | fis.command = ATA_CMD_ID_ATA; | |
1484 | ||
1485 | /* Set the identify information as invalid. */ | |
1486 | port->identify_valid = 0; | |
1487 | ||
1488 | /* Clear the identify information. */ | |
1489 | memset(port->identify, 0, sizeof(u16) * ATA_ID_WORDS); | |
1490 | ||
1491 | /* Execute the command. */ | |
1492 | if (mtip_exec_internal_command(port, | |
1493 | &fis, | |
1494 | 5, | |
1495 | port->identify_dma, | |
1496 | sizeof(u16) * ATA_ID_WORDS, | |
1497 | 0, | |
1498 | GFP_KERNEL, | |
1499 | MTIP_INTERNAL_COMMAND_TIMEOUT_MS) | |
1500 | < 0) { | |
1501 | rv = -1; | |
1502 | goto out; | |
1503 | } | |
1504 | ||
1505 | /* | |
1506 | * Perform any necessary byte-swapping. Yes, the kernel does in fact | |
1507 | * perform field-sensitive swapping on the string fields. | |
1508 | * See the kernel use of ata_id_string() for proof of this. | |
1509 | */ | |
1510 | #ifdef __LITTLE_ENDIAN | |
1511 | ata_swap_string(port->identify + 27, 40); /* model string*/ | |
1512 | ata_swap_string(port->identify + 23, 8); /* firmware string*/ | |
1513 | ata_swap_string(port->identify + 10, 20); /* serial# string*/ | |
1514 | #else | |
1515 | { | |
1516 | int i; | |
1517 | for (i = 0; i < ATA_ID_WORDS; i++) | |
1518 | port->identify[i] = le16_to_cpu(port->identify[i]); | |
1519 | } | |
1520 | #endif | |
1521 | ||
1522 | /* Set the identify buffer as valid. */ | |
1523 | port->identify_valid = 1; | |
1524 | ||
1525 | if (user_buffer) { | |
1526 | if (copy_to_user( | |
1527 | user_buffer, | |
1528 | port->identify, | |
1529 | ATA_ID_WORDS * sizeof(u16))) { | |
1530 | rv = -EFAULT; | |
1531 | goto out; | |
1532 | } | |
1533 | } | |
1534 | ||
1535 | out: | |
88523a61 SB |
1536 | return rv; |
1537 | } | |
1538 | ||
1539 | /* | |
1540 | * Issue a standby immediate command to the device. | |
1541 | * | |
1542 | * @port Pointer to the port structure. | |
1543 | * | |
1544 | * return value | |
1545 | * 0 Command was executed successfully. | |
1546 | * -1 An error occurred while executing the command. | |
1547 | */ | |
1548 | static int mtip_standby_immediate(struct mtip_port *port) | |
1549 | { | |
1550 | int rv; | |
1551 | struct host_to_dev_fis fis; | |
f6587217 | 1552 | unsigned long start; |
88523a61 | 1553 | |
88523a61 SB |
1554 | /* Build the FIS. */ |
1555 | memset(&fis, 0, sizeof(struct host_to_dev_fis)); | |
1556 | fis.type = 0x27; | |
1557 | fis.opts = 1 << 7; | |
1558 | fis.command = ATA_CMD_STANDBYNOW1; | |
1559 | ||
f6587217 | 1560 | start = jiffies; |
88523a61 SB |
1561 | rv = mtip_exec_internal_command(port, |
1562 | &fis, | |
1563 | 5, | |
1564 | 0, | |
1565 | 0, | |
1566 | 0, | |
f6587217 AT |
1567 | GFP_ATOMIC, |
1568 | 15000); | |
1569 | dbg_printk(MTIP_DRV_NAME "Time taken to complete standby cmd: %d ms\n", | |
1570 | jiffies_to_msecs(jiffies - start)); | |
1571 | if (rv) | |
1572 | dev_warn(&port->dd->pdev->dev, | |
1573 | "STANDBY IMMEDIATE command failed.\n"); | |
1574 | ||
1575 | return rv; | |
1576 | } | |
1577 | ||
1578 | /* | |
1579 | * Issue a READ LOG EXT command to the device. | |
1580 | * | |
1581 | * @port pointer to the port structure. | |
1582 | * @page page number to fetch | |
1583 | * @buffer pointer to buffer | |
1584 | * @buffer_dma dma address corresponding to @buffer | |
1585 | * @sectors page length to fetch, in sectors | |
1586 | * | |
1587 | * return value | |
1588 | * @rv return value from mtip_exec_internal_command() | |
1589 | */ | |
1590 | static int mtip_read_log_page(struct mtip_port *port, u8 page, u16 *buffer, | |
1591 | dma_addr_t buffer_dma, unsigned int sectors) | |
1592 | { | |
1593 | struct host_to_dev_fis fis; | |
1594 | ||
1595 | memset(&fis, 0, sizeof(struct host_to_dev_fis)); | |
1596 | fis.type = 0x27; | |
1597 | fis.opts = 1 << 7; | |
1598 | fis.command = ATA_CMD_READ_LOG_EXT; | |
1599 | fis.sect_count = sectors & 0xFF; | |
1600 | fis.sect_cnt_ex = (sectors >> 8) & 0xFF; | |
1601 | fis.lba_low = page; | |
1602 | fis.lba_mid = 0; | |
1603 | fis.device = ATA_DEVICE_OBS; | |
1604 | ||
1605 | memset(buffer, 0, sectors * ATA_SECT_SIZE); | |
1606 | ||
1607 | return mtip_exec_internal_command(port, | |
1608 | &fis, | |
1609 | 5, | |
1610 | buffer_dma, | |
1611 | sectors * ATA_SECT_SIZE, | |
1612 | 0, | |
1613 | GFP_ATOMIC, | |
1614 | MTIP_INTERNAL_COMMAND_TIMEOUT_MS); | |
1615 | } | |
1616 | ||
1617 | /* | |
1618 | * Issue a SMART READ DATA command to the device. | |
1619 | * | |
1620 | * @port pointer to the port structure. | |
1621 | * @buffer pointer to buffer | |
1622 | * @buffer_dma dma address corresponding to @buffer | |
1623 | * | |
1624 | * return value | |
1625 | * @rv return value from mtip_exec_internal_command() | |
1626 | */ | |
1627 | static int mtip_get_smart_data(struct mtip_port *port, u8 *buffer, | |
1628 | dma_addr_t buffer_dma) | |
1629 | { | |
1630 | struct host_to_dev_fis fis; | |
1631 | ||
1632 | memset(&fis, 0, sizeof(struct host_to_dev_fis)); | |
1633 | fis.type = 0x27; | |
1634 | fis.opts = 1 << 7; | |
1635 | fis.command = ATA_CMD_SMART; | |
1636 | fis.features = 0xD0; | |
1637 | fis.sect_count = 1; | |
1638 | fis.lba_mid = 0x4F; | |
1639 | fis.lba_hi = 0xC2; | |
1640 | fis.device = ATA_DEVICE_OBS; | |
1641 | ||
1642 | return mtip_exec_internal_command(port, | |
1643 | &fis, | |
1644 | 5, | |
1645 | buffer_dma, | |
1646 | ATA_SECT_SIZE, | |
1647 | 0, | |
1648 | GFP_ATOMIC, | |
88523a61 | 1649 | 15000); |
f6587217 AT |
1650 | } |
1651 | ||
1652 | /* | |
1653 | * Get the value of a smart attribute | |
1654 | * | |
1655 | * @port pointer to the port structure | |
1656 | * @id attribute number | |
1657 | * @attrib pointer to return attrib information corresponding to @id | |
1658 | * | |
1659 | * return value | |
1660 | * -EINVAL NULL buffer passed or unsupported attribute @id. | |
1661 | * -EPERM Identify data not valid, SMART not supported or not enabled | |
1662 | */ | |
1663 | static int mtip_get_smart_attr(struct mtip_port *port, unsigned int id, | |
1664 | struct smart_attr *attrib) | |
1665 | { | |
1666 | int rv, i; | |
1667 | struct smart_attr *pattr; | |
1668 | ||
1669 | if (!attrib) | |
1670 | return -EINVAL; | |
1671 | ||
1672 | if (!port->identify_valid) { | |
1673 | dev_warn(&port->dd->pdev->dev, "IDENTIFY DATA not valid\n"); | |
1674 | return -EPERM; | |
1675 | } | |
1676 | if (!(port->identify[82] & 0x1)) { | |
1677 | dev_warn(&port->dd->pdev->dev, "SMART not supported\n"); | |
1678 | return -EPERM; | |
1679 | } | |
1680 | if (!(port->identify[85] & 0x1)) { | |
1681 | dev_warn(&port->dd->pdev->dev, "SMART not enabled\n"); | |
1682 | return -EPERM; | |
1683 | } | |
1684 | ||
1685 | memset(port->smart_buf, 0, ATA_SECT_SIZE); | |
1686 | rv = mtip_get_smart_data(port, port->smart_buf, port->smart_buf_dma); | |
1687 | if (rv) { | |
1688 | dev_warn(&port->dd->pdev->dev, "Failed to ge SMART data\n"); | |
1689 | return rv; | |
1690 | } | |
1691 | ||
1692 | pattr = (struct smart_attr *)(port->smart_buf + 2); | |
1693 | for (i = 0; i < 29; i++, pattr++) | |
1694 | if (pattr->attr_id == id) { | |
1695 | memcpy(attrib, pattr, sizeof(struct smart_attr)); | |
1696 | break; | |
1697 | } | |
1698 | ||
1699 | if (i == 29) { | |
1700 | dev_warn(&port->dd->pdev->dev, | |
1701 | "Query for invalid SMART attribute ID\n"); | |
1702 | rv = -EINVAL; | |
1703 | } | |
88523a61 | 1704 | |
88523a61 SB |
1705 | return rv; |
1706 | } | |
1707 | ||
1708 | /* | |
1709 | * Get the drive capacity. | |
1710 | * | |
1711 | * @dd Pointer to the device data structure. | |
1712 | * @sectors Pointer to the variable that will receive the sector count. | |
1713 | * | |
1714 | * return value | |
1715 | * 1 Capacity was returned successfully. | |
1716 | * 0 The identify information is invalid. | |
1717 | */ | |
6316668f | 1718 | static bool mtip_hw_get_capacity(struct driver_data *dd, sector_t *sectors) |
88523a61 SB |
1719 | { |
1720 | struct mtip_port *port = dd->port; | |
1721 | u64 total, raw0, raw1, raw2, raw3; | |
1722 | raw0 = port->identify[100]; | |
1723 | raw1 = port->identify[101]; | |
1724 | raw2 = port->identify[102]; | |
1725 | raw3 = port->identify[103]; | |
1726 | total = raw0 | raw1<<16 | raw2<<32 | raw3<<48; | |
1727 | *sectors = total; | |
1728 | return (bool) !!port->identify_valid; | |
1729 | } | |
1730 | ||
1731 | /* | |
1732 | * Reset the HBA. | |
1733 | * | |
1734 | * Resets the HBA by setting the HBA Reset bit in the Global | |
1735 | * HBA Control register. After setting the HBA Reset bit the | |
1736 | * function waits for 1 second before reading the HBA Reset | |
1737 | * bit to make sure it has cleared. If HBA Reset is not clear | |
1738 | * an error is returned. Cannot be used in non-blockable | |
1739 | * context. | |
1740 | * | |
1741 | * @dd Pointer to the driver data structure. | |
1742 | * | |
1743 | * return value | |
1744 | * 0 The reset was successful. | |
1745 | * -1 The HBA Reset bit did not clear. | |
1746 | */ | |
1747 | static int mtip_hba_reset(struct driver_data *dd) | |
1748 | { | |
1749 | mtip_deinit_port(dd->port); | |
1750 | ||
1751 | /* Set the reset bit */ | |
1752 | writel(HOST_RESET, dd->mmio + HOST_CTL); | |
1753 | ||
1754 | /* Flush */ | |
1755 | readl(dd->mmio + HOST_CTL); | |
1756 | ||
1757 | /* Wait for reset to clear */ | |
1758 | ssleep(1); | |
1759 | ||
1760 | /* Check the bit has cleared */ | |
1761 | if (readl(dd->mmio + HOST_CTL) & HOST_RESET) { | |
1762 | dev_err(&dd->pdev->dev, | |
1763 | "Reset bit did not clear.\n"); | |
1764 | return -1; | |
1765 | } | |
1766 | ||
1767 | return 0; | |
1768 | } | |
1769 | ||
1770 | /* | |
1771 | * Display the identify command data. | |
1772 | * | |
1773 | * @port Pointer to the port data structure. | |
1774 | * | |
1775 | * return value | |
1776 | * None | |
1777 | */ | |
1778 | static void mtip_dump_identify(struct mtip_port *port) | |
1779 | { | |
1780 | sector_t sectors; | |
1781 | unsigned short revid; | |
1782 | char cbuf[42]; | |
1783 | ||
1784 | if (!port->identify_valid) | |
1785 | return; | |
1786 | ||
1787 | strlcpy(cbuf, (char *)(port->identify+10), 21); | |
1788 | dev_info(&port->dd->pdev->dev, | |
1789 | "Serial No.: %s\n", cbuf); | |
1790 | ||
1791 | strlcpy(cbuf, (char *)(port->identify+23), 9); | |
1792 | dev_info(&port->dd->pdev->dev, | |
1793 | "Firmware Ver.: %s\n", cbuf); | |
1794 | ||
1795 | strlcpy(cbuf, (char *)(port->identify+27), 41); | |
1796 | dev_info(&port->dd->pdev->dev, "Model: %s\n", cbuf); | |
1797 | ||
1798 | if (mtip_hw_get_capacity(port->dd, §ors)) | |
1799 | dev_info(&port->dd->pdev->dev, | |
1800 | "Capacity: %llu sectors (%llu MB)\n", | |
1801 | (u64)sectors, | |
1802 | ((u64)sectors) * ATA_SECT_SIZE >> 20); | |
1803 | ||
1804 | pci_read_config_word(port->dd->pdev, PCI_REVISION_ID, &revid); | |
60ec0eec | 1805 | switch (revid & 0xFF) { |
88523a61 SB |
1806 | case 0x1: |
1807 | strlcpy(cbuf, "A0", 3); | |
1808 | break; | |
1809 | case 0x3: | |
1810 | strlcpy(cbuf, "A2", 3); | |
1811 | break; | |
1812 | default: | |
1813 | strlcpy(cbuf, "?", 2); | |
1814 | break; | |
1815 | } | |
1816 | dev_info(&port->dd->pdev->dev, | |
1817 | "Card Type: %s\n", cbuf); | |
1818 | } | |
1819 | ||
1820 | /* | |
1821 | * Map the commands scatter list into the command table. | |
1822 | * | |
1823 | * @command Pointer to the command. | |
1824 | * @nents Number of scatter list entries. | |
1825 | * | |
1826 | * return value | |
1827 | * None | |
1828 | */ | |
1829 | static inline void fill_command_sg(struct driver_data *dd, | |
1830 | struct mtip_cmd *command, | |
1831 | int nents) | |
1832 | { | |
1833 | int n; | |
1834 | unsigned int dma_len; | |
1835 | struct mtip_cmd_sg *command_sg; | |
1836 | struct scatterlist *sg = command->sg; | |
1837 | ||
1838 | command_sg = command->command + AHCI_CMD_TBL_HDR_SZ; | |
1839 | ||
1840 | for (n = 0; n < nents; n++) { | |
1841 | dma_len = sg_dma_len(sg); | |
1842 | if (dma_len > 0x400000) | |
1843 | dev_err(&dd->pdev->dev, | |
1844 | "DMA segment length truncated\n"); | |
60ec0eec AT |
1845 | command_sg->info = __force_bit2int |
1846 | cpu_to_le32((dma_len-1) & 0x3FFFFF); | |
1847 | command_sg->dba = __force_bit2int | |
1848 | cpu_to_le32(sg_dma_address(sg)); | |
1849 | command_sg->dba_upper = __force_bit2int | |
1850 | cpu_to_le32((sg_dma_address(sg) >> 16) >> 16); | |
88523a61 SB |
1851 | command_sg++; |
1852 | sg++; | |
1853 | } | |
1854 | } | |
1855 | ||
1856 | /* | |
1857 | * @brief Execute a drive command. | |
1858 | * | |
1859 | * return value 0 The command completed successfully. | |
1860 | * return value -1 An error occurred while executing the command. | |
1861 | */ | |
6316668f | 1862 | static int exec_drive_task(struct mtip_port *port, u8 *command) |
88523a61 SB |
1863 | { |
1864 | struct host_to_dev_fis fis; | |
1865 | struct host_to_dev_fis *reply = (port->rxfis + RX_FIS_D2H_REG); | |
1866 | ||
88523a61 SB |
1867 | /* Build the FIS. */ |
1868 | memset(&fis, 0, sizeof(struct host_to_dev_fis)); | |
1869 | fis.type = 0x27; | |
1870 | fis.opts = 1 << 7; | |
1871 | fis.command = command[0]; | |
1872 | fis.features = command[1]; | |
1873 | fis.sect_count = command[2]; | |
1874 | fis.sector = command[3]; | |
1875 | fis.cyl_low = command[4]; | |
1876 | fis.cyl_hi = command[5]; | |
1877 | fis.device = command[6] & ~0x10; /* Clear the dev bit*/ | |
1878 | ||
c74b0f58 | 1879 | dbg_printk(MTIP_DRV_NAME " %s: User Command: cmd %x, feat %x, nsect %x, sect %x, lcyl %x, hcyl %x, sel %x\n", |
88523a61 SB |
1880 | __func__, |
1881 | command[0], | |
1882 | command[1], | |
1883 | command[2], | |
1884 | command[3], | |
1885 | command[4], | |
1886 | command[5], | |
1887 | command[6]); | |
1888 | ||
1889 | /* Execute the command. */ | |
1890 | if (mtip_exec_internal_command(port, | |
1891 | &fis, | |
1892 | 5, | |
1893 | 0, | |
1894 | 0, | |
1895 | 0, | |
1896 | GFP_KERNEL, | |
1897 | MTIP_IOCTL_COMMAND_TIMEOUT_MS) < 0) { | |
88523a61 SB |
1898 | return -1; |
1899 | } | |
1900 | ||
1901 | command[0] = reply->command; /* Status*/ | |
1902 | command[1] = reply->features; /* Error*/ | |
1903 | command[4] = reply->cyl_low; | |
1904 | command[5] = reply->cyl_hi; | |
1905 | ||
c74b0f58 | 1906 | dbg_printk(MTIP_DRV_NAME " %s: Completion Status: stat %x, err %x , cyl_lo %x cyl_hi %x\n", |
88523a61 SB |
1907 | __func__, |
1908 | command[0], | |
1909 | command[1], | |
1910 | command[4], | |
1911 | command[5]); | |
1912 | ||
88523a61 SB |
1913 | return 0; |
1914 | } | |
1915 | ||
1916 | /* | |
1917 | * @brief Execute a drive command. | |
1918 | * | |
1919 | * @param port Pointer to the port data structure. | |
1920 | * @param command Pointer to the user specified command parameters. | |
1921 | * @param user_buffer Pointer to the user space buffer where read sector | |
1922 | * data should be copied. | |
1923 | * | |
1924 | * return value 0 The command completed successfully. | |
1925 | * return value -EFAULT An error occurred while copying the completion | |
1926 | * data to the user space buffer. | |
1927 | * return value -1 An error occurred while executing the command. | |
1928 | */ | |
6316668f JA |
1929 | static int exec_drive_command(struct mtip_port *port, u8 *command, |
1930 | void __user *user_buffer) | |
88523a61 SB |
1931 | { |
1932 | struct host_to_dev_fis fis; | |
e602878f AT |
1933 | struct host_to_dev_fis *reply; |
1934 | u8 *buf = NULL; | |
1935 | dma_addr_t dma_addr = 0; | |
1936 | int rv = 0, xfer_sz = command[3]; | |
1937 | ||
1938 | if (xfer_sz) { | |
97651ea6 | 1939 | if (!user_buffer) |
e602878f AT |
1940 | return -EFAULT; |
1941 | ||
1942 | buf = dmam_alloc_coherent(&port->dd->pdev->dev, | |
1943 | ATA_SECT_SIZE * xfer_sz, | |
1944 | &dma_addr, | |
1945 | GFP_KERNEL); | |
1946 | if (!buf) { | |
1947 | dev_err(&port->dd->pdev->dev, | |
1948 | "Memory allocation failed (%d bytes)\n", | |
1949 | ATA_SECT_SIZE * xfer_sz); | |
1950 | return -ENOMEM; | |
1951 | } | |
1952 | memset(buf, 0, ATA_SECT_SIZE * xfer_sz); | |
1953 | } | |
88523a61 | 1954 | |
88523a61 SB |
1955 | /* Build the FIS. */ |
1956 | memset(&fis, 0, sizeof(struct host_to_dev_fis)); | |
e602878f AT |
1957 | fis.type = 0x27; |
1958 | fis.opts = 1 << 7; | |
1959 | fis.command = command[0]; | |
88523a61 SB |
1960 | fis.features = command[2]; |
1961 | fis.sect_count = command[3]; | |
1962 | if (fis.command == ATA_CMD_SMART) { | |
1963 | fis.sector = command[1]; | |
60ec0eec AT |
1964 | fis.cyl_low = 0x4F; |
1965 | fis.cyl_hi = 0xC2; | |
88523a61 SB |
1966 | } |
1967 | ||
e602878f AT |
1968 | if (xfer_sz) |
1969 | reply = (port->rxfis + RX_FIS_PIO_SETUP); | |
1970 | else | |
1971 | reply = (port->rxfis + RX_FIS_D2H_REG); | |
1972 | ||
88523a61 | 1973 | dbg_printk(MTIP_DRV_NAME |
c74b0f58 | 1974 | " %s: User Command: cmd %x, sect %x, " |
88523a61 SB |
1975 | "feat %x, sectcnt %x\n", |
1976 | __func__, | |
1977 | command[0], | |
1978 | command[1], | |
1979 | command[2], | |
1980 | command[3]); | |
1981 | ||
88523a61 SB |
1982 | /* Execute the command. */ |
1983 | if (mtip_exec_internal_command(port, | |
1984 | &fis, | |
1985 | 5, | |
e602878f AT |
1986 | (xfer_sz ? dma_addr : 0), |
1987 | (xfer_sz ? ATA_SECT_SIZE * xfer_sz : 0), | |
88523a61 SB |
1988 | 0, |
1989 | GFP_KERNEL, | |
1990 | MTIP_IOCTL_COMMAND_TIMEOUT_MS) | |
1991 | < 0) { | |
e602878f AT |
1992 | rv = -EFAULT; |
1993 | goto exit_drive_command; | |
88523a61 SB |
1994 | } |
1995 | ||
1996 | /* Collect the completion status. */ | |
1997 | command[0] = reply->command; /* Status*/ | |
1998 | command[1] = reply->features; /* Error*/ | |
e602878f | 1999 | command[2] = reply->sect_count; |
88523a61 SB |
2000 | |
2001 | dbg_printk(MTIP_DRV_NAME | |
c74b0f58 | 2002 | " %s: Completion Status: stat %x, " |
e602878f | 2003 | "err %x, nsect %x\n", |
88523a61 SB |
2004 | __func__, |
2005 | command[0], | |
2006 | command[1], | |
2007 | command[2]); | |
2008 | ||
e602878f | 2009 | if (xfer_sz) { |
88523a61 | 2010 | if (copy_to_user(user_buffer, |
e602878f | 2011 | buf, |
88523a61 | 2012 | ATA_SECT_SIZE * command[3])) { |
e602878f AT |
2013 | rv = -EFAULT; |
2014 | goto exit_drive_command; | |
88523a61 SB |
2015 | } |
2016 | } | |
e602878f AT |
2017 | exit_drive_command: |
2018 | if (buf) | |
2019 | dmam_free_coherent(&port->dd->pdev->dev, | |
2020 | ATA_SECT_SIZE * xfer_sz, buf, dma_addr); | |
2021 | return rv; | |
88523a61 SB |
2022 | } |
2023 | ||
2024 | /* | |
2025 | * Indicates whether a command has a single sector payload. | |
2026 | * | |
2027 | * @command passed to the device to perform the certain event. | |
2028 | * @features passed to the device to perform the certain event. | |
2029 | * | |
2030 | * return value | |
2031 | * 1 command is one that always has a single sector payload, | |
2032 | * regardless of the value in the Sector Count field. | |
2033 | * 0 otherwise | |
2034 | * | |
2035 | */ | |
2036 | static unsigned int implicit_sector(unsigned char command, | |
2037 | unsigned char features) | |
2038 | { | |
2039 | unsigned int rv = 0; | |
2040 | ||
2041 | /* list of commands that have an implicit sector count of 1 */ | |
2042 | switch (command) { | |
60ec0eec AT |
2043 | case ATA_CMD_SEC_SET_PASS: |
2044 | case ATA_CMD_SEC_UNLOCK: | |
2045 | case ATA_CMD_SEC_ERASE_PREP: | |
2046 | case ATA_CMD_SEC_ERASE_UNIT: | |
2047 | case ATA_CMD_SEC_FREEZE_LOCK: | |
2048 | case ATA_CMD_SEC_DISABLE_PASS: | |
2049 | case ATA_CMD_PMP_READ: | |
2050 | case ATA_CMD_PMP_WRITE: | |
88523a61 SB |
2051 | rv = 1; |
2052 | break; | |
60ec0eec AT |
2053 | case ATA_CMD_SET_MAX: |
2054 | if (features == ATA_SET_MAX_UNLOCK) | |
88523a61 SB |
2055 | rv = 1; |
2056 | break; | |
60ec0eec AT |
2057 | case ATA_CMD_SMART: |
2058 | if ((features == ATA_SMART_READ_VALUES) || | |
2059 | (features == ATA_SMART_READ_THRESHOLDS)) | |
88523a61 SB |
2060 | rv = 1; |
2061 | break; | |
60ec0eec AT |
2062 | case ATA_CMD_CONF_OVERLAY: |
2063 | if ((features == ATA_DCO_IDENTIFY) || | |
2064 | (features == ATA_DCO_SET)) | |
88523a61 SB |
2065 | rv = 1; |
2066 | break; | |
2067 | } | |
2068 | return rv; | |
2069 | } | |
4453bc88 SM |
2070 | static void mtip_set_timeout(struct driver_data *dd, |
2071 | struct host_to_dev_fis *fis, | |
2072 | unsigned int *timeout, u8 erasemode) | |
2df7aa96 AT |
2073 | { |
2074 | switch (fis->command) { | |
2075 | case ATA_CMD_DOWNLOAD_MICRO: | |
2076 | *timeout = 120000; /* 2 minutes */ | |
2077 | break; | |
2078 | case ATA_CMD_SEC_ERASE_UNIT: | |
2079 | case 0xFC: | |
4453bc88 SM |
2080 | if (erasemode) |
2081 | *timeout = ((*(dd->port->identify + 90) * 2) * 60000); | |
2082 | else | |
2083 | *timeout = ((*(dd->port->identify + 89) * 2) * 60000); | |
2df7aa96 AT |
2084 | break; |
2085 | case ATA_CMD_STANDBYNOW1: | |
d7c8b945 | 2086 | *timeout = 120000; /* 2 minutes */ |
2df7aa96 AT |
2087 | break; |
2088 | case 0xF7: | |
2089 | case 0xFA: | |
2090 | *timeout = 60000; /* 60 seconds */ | |
2091 | break; | |
2092 | case ATA_CMD_SMART: | |
2093 | *timeout = 15000; /* 15 seconds */ | |
2094 | break; | |
2095 | default: | |
2096 | *timeout = MTIP_IOCTL_COMMAND_TIMEOUT_MS; | |
2097 | break; | |
2098 | } | |
2099 | } | |
2100 | ||
88523a61 SB |
2101 | /* |
2102 | * Executes a taskfile | |
2103 | * See ide_taskfile_ioctl() for derivation | |
2104 | */ | |
2105 | static int exec_drive_taskfile(struct driver_data *dd, | |
ef0f1587 JA |
2106 | void __user *buf, |
2107 | ide_task_request_t *req_task, | |
2108 | int outtotal) | |
88523a61 SB |
2109 | { |
2110 | struct host_to_dev_fis fis; | |
2111 | struct host_to_dev_fis *reply; | |
88523a61 SB |
2112 | u8 *outbuf = NULL; |
2113 | u8 *inbuf = NULL; | |
16d02c04 JA |
2114 | dma_addr_t outbuf_dma = 0; |
2115 | dma_addr_t inbuf_dma = 0; | |
2116 | dma_addr_t dma_buffer = 0; | |
88523a61 | 2117 | int err = 0; |
88523a61 SB |
2118 | unsigned int taskin = 0; |
2119 | unsigned int taskout = 0; | |
2120 | u8 nsect = 0; | |
2df7aa96 | 2121 | unsigned int timeout; |
88523a61 SB |
2122 | unsigned int force_single_sector; |
2123 | unsigned int transfer_size; | |
2124 | unsigned long task_file_data; | |
ef0f1587 | 2125 | int intotal = outtotal + req_task->out_size; |
4453bc88 | 2126 | int erasemode = 0; |
88523a61 SB |
2127 | |
2128 | taskout = req_task->out_size; | |
2129 | taskin = req_task->in_size; | |
2130 | /* 130560 = 512 * 0xFF*/ | |
2131 | if (taskin > 130560 || taskout > 130560) { | |
2132 | err = -EINVAL; | |
2133 | goto abort; | |
2134 | } | |
2135 | ||
2136 | if (taskout) { | |
2137 | outbuf = kzalloc(taskout, GFP_KERNEL); | |
2138 | if (outbuf == NULL) { | |
2139 | err = -ENOMEM; | |
2140 | goto abort; | |
2141 | } | |
2142 | if (copy_from_user(outbuf, buf + outtotal, taskout)) { | |
2143 | err = -EFAULT; | |
2144 | goto abort; | |
2145 | } | |
2146 | outbuf_dma = pci_map_single(dd->pdev, | |
2147 | outbuf, | |
2148 | taskout, | |
2149 | DMA_TO_DEVICE); | |
16d02c04 | 2150 | if (outbuf_dma == 0) { |
88523a61 SB |
2151 | err = -ENOMEM; |
2152 | goto abort; | |
2153 | } | |
2154 | dma_buffer = outbuf_dma; | |
2155 | } | |
2156 | ||
2157 | if (taskin) { | |
2158 | inbuf = kzalloc(taskin, GFP_KERNEL); | |
2159 | if (inbuf == NULL) { | |
2160 | err = -ENOMEM; | |
2161 | goto abort; | |
2162 | } | |
2163 | ||
2164 | if (copy_from_user(inbuf, buf + intotal, taskin)) { | |
2165 | err = -EFAULT; | |
2166 | goto abort; | |
2167 | } | |
2168 | inbuf_dma = pci_map_single(dd->pdev, | |
2169 | inbuf, | |
2170 | taskin, DMA_FROM_DEVICE); | |
16d02c04 | 2171 | if (inbuf_dma == 0) { |
88523a61 SB |
2172 | err = -ENOMEM; |
2173 | goto abort; | |
2174 | } | |
2175 | dma_buffer = inbuf_dma; | |
2176 | } | |
2177 | ||
2178 | /* only supports PIO and non-data commands from this ioctl. */ | |
2179 | switch (req_task->data_phase) { | |
2180 | case TASKFILE_OUT: | |
2181 | nsect = taskout / ATA_SECT_SIZE; | |
2182 | reply = (dd->port->rxfis + RX_FIS_PIO_SETUP); | |
2183 | break; | |
2184 | case TASKFILE_IN: | |
2185 | reply = (dd->port->rxfis + RX_FIS_PIO_SETUP); | |
2186 | break; | |
2187 | case TASKFILE_NO_DATA: | |
2188 | reply = (dd->port->rxfis + RX_FIS_D2H_REG); | |
2189 | break; | |
2190 | default: | |
2191 | err = -EINVAL; | |
2192 | goto abort; | |
2193 | } | |
2194 | ||
88523a61 SB |
2195 | /* Build the FIS. */ |
2196 | memset(&fis, 0, sizeof(struct host_to_dev_fis)); | |
2197 | ||
2198 | fis.type = 0x27; | |
2199 | fis.opts = 1 << 7; | |
2200 | fis.command = req_task->io_ports[7]; | |
2201 | fis.features = req_task->io_ports[1]; | |
2202 | fis.sect_count = req_task->io_ports[2]; | |
2203 | fis.lba_low = req_task->io_ports[3]; | |
2204 | fis.lba_mid = req_task->io_ports[4]; | |
2205 | fis.lba_hi = req_task->io_ports[5]; | |
2206 | /* Clear the dev bit*/ | |
2207 | fis.device = req_task->io_ports[6] & ~0x10; | |
2208 | ||
2209 | if ((req_task->in_flags.all == 0) && (req_task->out_flags.all & 1)) { | |
2210 | req_task->in_flags.all = | |
2211 | IDE_TASKFILE_STD_IN_FLAGS | | |
2212 | (IDE_HOB_STD_IN_FLAGS << 8); | |
2213 | fis.lba_low_ex = req_task->hob_ports[3]; | |
2214 | fis.lba_mid_ex = req_task->hob_ports[4]; | |
2215 | fis.lba_hi_ex = req_task->hob_ports[5]; | |
2216 | fis.features_ex = req_task->hob_ports[1]; | |
2217 | fis.sect_cnt_ex = req_task->hob_ports[2]; | |
2218 | ||
2219 | } else { | |
2220 | req_task->in_flags.all = IDE_TASKFILE_STD_IN_FLAGS; | |
2221 | } | |
2222 | ||
2223 | force_single_sector = implicit_sector(fis.command, fis.features); | |
2224 | ||
2225 | if ((taskin || taskout) && (!fis.sect_count)) { | |
2226 | if (nsect) | |
2227 | fis.sect_count = nsect; | |
2228 | else { | |
2229 | if (!force_single_sector) { | |
2230 | dev_warn(&dd->pdev->dev, | |
2231 | "data movement but " | |
2232 | "sect_count is 0\n"); | |
88523a61 SB |
2233 | err = -EINVAL; |
2234 | goto abort; | |
2235 | } | |
2236 | } | |
2237 | } | |
2238 | ||
2239 | dbg_printk(MTIP_DRV_NAME | |
c74b0f58 | 2240 | " %s: cmd %x, feat %x, nsect %x," |
88523a61 SB |
2241 | " sect/lbal %x, lcyl/lbam %x, hcyl/lbah %x," |
2242 | " head/dev %x\n", | |
c74b0f58 | 2243 | __func__, |
88523a61 SB |
2244 | fis.command, |
2245 | fis.features, | |
2246 | fis.sect_count, | |
2247 | fis.lba_low, | |
2248 | fis.lba_mid, | |
2249 | fis.lba_hi, | |
2250 | fis.device); | |
2251 | ||
4453bc88 | 2252 | /* check for erase mode support during secure erase.*/ |
3208795e SM |
2253 | if ((fis.command == ATA_CMD_SEC_ERASE_UNIT) && outbuf && |
2254 | (outbuf[0] & MTIP_SEC_ERASE_MODE)) { | |
4453bc88 SM |
2255 | erasemode = 1; |
2256 | } | |
2257 | ||
2258 | mtip_set_timeout(dd, &fis, &timeout, erasemode); | |
88523a61 SB |
2259 | |
2260 | /* Determine the correct transfer size.*/ | |
2261 | if (force_single_sector) | |
2262 | transfer_size = ATA_SECT_SIZE; | |
2263 | else | |
2264 | transfer_size = ATA_SECT_SIZE * fis.sect_count; | |
2265 | ||
2266 | /* Execute the command.*/ | |
2267 | if (mtip_exec_internal_command(dd->port, | |
2268 | &fis, | |
2269 | 5, | |
2270 | dma_buffer, | |
2271 | transfer_size, | |
2272 | 0, | |
2273 | GFP_KERNEL, | |
2274 | timeout) < 0) { | |
88523a61 SB |
2275 | err = -EIO; |
2276 | goto abort; | |
2277 | } | |
2278 | ||
2279 | task_file_data = readl(dd->port->mmio+PORT_TFDATA); | |
2280 | ||
2281 | if ((req_task->data_phase == TASKFILE_IN) && !(task_file_data & 1)) { | |
2282 | reply = dd->port->rxfis + RX_FIS_PIO_SETUP; | |
2283 | req_task->io_ports[7] = reply->control; | |
2284 | } else { | |
2285 | reply = dd->port->rxfis + RX_FIS_D2H_REG; | |
2286 | req_task->io_ports[7] = reply->command; | |
2287 | } | |
2288 | ||
2289 | /* reclaim the DMA buffers.*/ | |
2290 | if (inbuf_dma) | |
2291 | pci_unmap_single(dd->pdev, inbuf_dma, | |
2292 | taskin, DMA_FROM_DEVICE); | |
2293 | if (outbuf_dma) | |
2294 | pci_unmap_single(dd->pdev, outbuf_dma, | |
2295 | taskout, DMA_TO_DEVICE); | |
16d02c04 JA |
2296 | inbuf_dma = 0; |
2297 | outbuf_dma = 0; | |
88523a61 SB |
2298 | |
2299 | /* return the ATA registers to the caller.*/ | |
2300 | req_task->io_ports[1] = reply->features; | |
2301 | req_task->io_ports[2] = reply->sect_count; | |
2302 | req_task->io_ports[3] = reply->lba_low; | |
2303 | req_task->io_ports[4] = reply->lba_mid; | |
2304 | req_task->io_ports[5] = reply->lba_hi; | |
2305 | req_task->io_ports[6] = reply->device; | |
2306 | ||
2307 | if (req_task->out_flags.all & 1) { | |
2308 | ||
2309 | req_task->hob_ports[3] = reply->lba_low_ex; | |
2310 | req_task->hob_ports[4] = reply->lba_mid_ex; | |
2311 | req_task->hob_ports[5] = reply->lba_hi_ex; | |
2312 | req_task->hob_ports[1] = reply->features_ex; | |
2313 | req_task->hob_ports[2] = reply->sect_cnt_ex; | |
2314 | } | |
88523a61 | 2315 | dbg_printk(MTIP_DRV_NAME |
c74b0f58 | 2316 | " %s: Completion: stat %x," |
88523a61 SB |
2317 | "err %x, sect_cnt %x, lbalo %x," |
2318 | "lbamid %x, lbahi %x, dev %x\n", | |
2319 | __func__, | |
2320 | req_task->io_ports[7], | |
2321 | req_task->io_ports[1], | |
2322 | req_task->io_ports[2], | |
2323 | req_task->io_ports[3], | |
2324 | req_task->io_ports[4], | |
2325 | req_task->io_ports[5], | |
2326 | req_task->io_ports[6]); | |
2327 | ||
88523a61 SB |
2328 | if (taskout) { |
2329 | if (copy_to_user(buf + outtotal, outbuf, taskout)) { | |
2330 | err = -EFAULT; | |
2331 | goto abort; | |
2332 | } | |
2333 | } | |
2334 | if (taskin) { | |
2335 | if (copy_to_user(buf + intotal, inbuf, taskin)) { | |
2336 | err = -EFAULT; | |
2337 | goto abort; | |
2338 | } | |
2339 | } | |
2340 | abort: | |
2341 | if (inbuf_dma) | |
2342 | pci_unmap_single(dd->pdev, inbuf_dma, | |
2343 | taskin, DMA_FROM_DEVICE); | |
2344 | if (outbuf_dma) | |
2345 | pci_unmap_single(dd->pdev, outbuf_dma, | |
2346 | taskout, DMA_TO_DEVICE); | |
88523a61 SB |
2347 | kfree(outbuf); |
2348 | kfree(inbuf); | |
2349 | ||
2350 | return err; | |
2351 | } | |
2352 | ||
2353 | /* | |
2354 | * Handle IOCTL calls from the Block Layer. | |
2355 | * | |
2356 | * This function is called by the Block Layer when it receives an IOCTL | |
2357 | * command that it does not understand. If the IOCTL command is not supported | |
2358 | * this function returns -ENOTTY. | |
2359 | * | |
2360 | * @dd Pointer to the driver data structure. | |
2361 | * @cmd IOCTL command passed from the Block Layer. | |
2362 | * @arg IOCTL argument passed from the Block Layer. | |
2363 | * | |
2364 | * return value | |
2365 | * 0 The IOCTL completed successfully. | |
2366 | * -ENOTTY The specified command is not supported. | |
2367 | * -EFAULT An error occurred copying data to a user space buffer. | |
2368 | * -EIO An error occurred while executing the command. | |
2369 | */ | |
ef0f1587 JA |
2370 | static int mtip_hw_ioctl(struct driver_data *dd, unsigned int cmd, |
2371 | unsigned long arg) | |
88523a61 SB |
2372 | { |
2373 | switch (cmd) { | |
2374 | case HDIO_GET_IDENTITY: | |
971890f2 AT |
2375 | { |
2376 | if (copy_to_user((void __user *)arg, dd->port->identify, | |
2377 | sizeof(u16) * ATA_ID_WORDS)) | |
2378 | return -EFAULT; | |
88523a61 | 2379 | break; |
971890f2 | 2380 | } |
88523a61 SB |
2381 | case HDIO_DRIVE_CMD: |
2382 | { | |
2383 | u8 drive_command[4]; | |
2384 | ||
2385 | /* Copy the user command info to our buffer. */ | |
2386 | if (copy_from_user(drive_command, | |
2387 | (void __user *) arg, | |
2388 | sizeof(drive_command))) | |
2389 | return -EFAULT; | |
2390 | ||
2391 | /* Execute the drive command. */ | |
2392 | if (exec_drive_command(dd->port, | |
2393 | drive_command, | |
2394 | (void __user *) (arg+4))) | |
2395 | return -EIO; | |
2396 | ||
2397 | /* Copy the status back to the users buffer. */ | |
2398 | if (copy_to_user((void __user *) arg, | |
2399 | drive_command, | |
2400 | sizeof(drive_command))) | |
2401 | return -EFAULT; | |
2402 | ||
2403 | break; | |
2404 | } | |
2405 | case HDIO_DRIVE_TASK: | |
2406 | { | |
2407 | u8 drive_command[7]; | |
2408 | ||
2409 | /* Copy the user command info to our buffer. */ | |
2410 | if (copy_from_user(drive_command, | |
2411 | (void __user *) arg, | |
2412 | sizeof(drive_command))) | |
2413 | return -EFAULT; | |
2414 | ||
2415 | /* Execute the drive command. */ | |
2416 | if (exec_drive_task(dd->port, drive_command)) | |
2417 | return -EIO; | |
2418 | ||
2419 | /* Copy the status back to the users buffer. */ | |
2420 | if (copy_to_user((void __user *) arg, | |
2421 | drive_command, | |
2422 | sizeof(drive_command))) | |
2423 | return -EFAULT; | |
2424 | ||
2425 | break; | |
2426 | } | |
ef0f1587 JA |
2427 | case HDIO_DRIVE_TASKFILE: { |
2428 | ide_task_request_t req_task; | |
2429 | int ret, outtotal; | |
2430 | ||
2431 | if (copy_from_user(&req_task, (void __user *) arg, | |
2432 | sizeof(req_task))) | |
2433 | return -EFAULT; | |
2434 | ||
2435 | outtotal = sizeof(req_task); | |
2436 | ||
2437 | ret = exec_drive_taskfile(dd, (void __user *) arg, | |
2438 | &req_task, outtotal); | |
2439 | ||
60ec0eec AT |
2440 | if (copy_to_user((void __user *) arg, &req_task, |
2441 | sizeof(req_task))) | |
ef0f1587 JA |
2442 | return -EFAULT; |
2443 | ||
2444 | return ret; | |
2445 | } | |
88523a61 SB |
2446 | |
2447 | default: | |
2448 | return -EINVAL; | |
2449 | } | |
2450 | return 0; | |
2451 | } | |
2452 | ||
2453 | /* | |
2454 | * Submit an IO to the hw | |
2455 | * | |
2456 | * This function is called by the block layer to issue an io | |
2457 | * to the device. Upon completion, the callback function will | |
2458 | * be called with the data parameter passed as the callback data. | |
2459 | * | |
2460 | * @dd Pointer to the driver data structure. | |
2461 | * @start First sector to read. | |
2462 | * @nsect Number of sectors to read. | |
2463 | * @nents Number of entries in scatter list for the read command. | |
2464 | * @tag The tag of this read command. | |
2465 | * @callback Pointer to the function that should be called | |
2466 | * when the read completes. | |
2467 | * @data Callback data passed to the callback function | |
2468 | * when the read completes. | |
88523a61 SB |
2469 | * @dir Direction (read or write) |
2470 | * | |
2471 | * return value | |
2472 | * None | |
2473 | */ | |
7c5d6238 | 2474 | static void mtip_hw_submit_io(struct driver_data *dd, sector_t sector, |
6316668f | 2475 | int nsect, int nents, int tag, void *callback, |
4e8670e2 | 2476 | void *data, int dir) |
88523a61 SB |
2477 | { |
2478 | struct host_to_dev_fis *fis; | |
2479 | struct mtip_port *port = dd->port; | |
2480 | struct mtip_cmd *command = &port->commands[tag]; | |
45038367 | 2481 | int dma_dir = (dir == READ) ? DMA_FROM_DEVICE : DMA_TO_DEVICE; |
7c5d6238 | 2482 | u64 start = sector; |
88523a61 SB |
2483 | |
2484 | /* Map the scatter list for DMA access */ | |
45038367 | 2485 | nents = dma_map_sg(&dd->pdev->dev, command->sg, nents, dma_dir); |
88523a61 SB |
2486 | |
2487 | command->scatter_ents = nents; | |
2488 | ||
2489 | /* | |
2490 | * The number of retries for this command before it is | |
2491 | * reported as a failure to the upper layers. | |
2492 | */ | |
2493 | command->retries = MTIP_MAX_RETRIES; | |
2494 | ||
2495 | /* Fill out fis */ | |
2496 | fis = command->command; | |
2497 | fis->type = 0x27; | |
2498 | fis->opts = 1 << 7; | |
2499 | fis->command = | |
2500 | (dir == READ ? ATA_CMD_FPDMA_READ : ATA_CMD_FPDMA_WRITE); | |
eda45314 SM |
2501 | fis->lba_low = start & 0xFF; |
2502 | fis->lba_mid = (start >> 8) & 0xFF; | |
2503 | fis->lba_hi = (start >> 16) & 0xFF; | |
2504 | fis->lba_low_ex = (start >> 24) & 0xFF; | |
2505 | fis->lba_mid_ex = (start >> 32) & 0xFF; | |
2506 | fis->lba_hi_ex = (start >> 40) & 0xFF; | |
88523a61 | 2507 | fis->device = 1 << 6; |
60ec0eec AT |
2508 | fis->features = nsect & 0xFF; |
2509 | fis->features_ex = (nsect >> 8) & 0xFF; | |
88523a61 SB |
2510 | fis->sect_count = ((tag << 3) | (tag >> 5)); |
2511 | fis->sect_cnt_ex = 0; | |
2512 | fis->control = 0; | |
2513 | fis->res2 = 0; | |
2514 | fis->res3 = 0; | |
2515 | fill_command_sg(dd, command, nents); | |
2516 | ||
2517 | /* Populate the command header */ | |
60ec0eec AT |
2518 | command->command_header->opts = |
2519 | __force_bit2int cpu_to_le32( | |
2520 | (nents << 16) | 5 | AHCI_CMD_PREFETCH); | |
88523a61 SB |
2521 | command->command_header->byte_count = 0; |
2522 | ||
2523 | /* | |
2524 | * Set the completion function and data for the command | |
2525 | * within this layer. | |
2526 | */ | |
2527 | command->comp_data = dd; | |
2528 | command->comp_func = mtip_async_complete; | |
45038367 | 2529 | command->direction = dma_dir; |
88523a61 SB |
2530 | |
2531 | /* | |
2532 | * Set the completion function and data for the command passed | |
2533 | * from the upper layer. | |
2534 | */ | |
2535 | command->async_data = data; | |
2536 | command->async_callback = callback; | |
2537 | ||
2538 | /* | |
60ec0eec AT |
2539 | * To prevent this command from being issued |
2540 | * if an internal command is in progress or error handling is active. | |
88523a61 | 2541 | */ |
c74b0f58 | 2542 | if (port->flags & MTIP_PF_PAUSE_IO) { |
60ec0eec | 2543 | set_bit(tag, port->cmds_to_issue); |
8a857a88 | 2544 | set_bit(MTIP_PF_ISSUE_CMDS_BIT, &port->flags); |
60ec0eec AT |
2545 | return; |
2546 | } | |
88523a61 SB |
2547 | |
2548 | /* Issue the command to the hardware */ | |
2549 | mtip_issue_ncq_command(port, tag); | |
2550 | ||
dad40f16 | 2551 | return; |
88523a61 SB |
2552 | } |
2553 | ||
2554 | /* | |
2555 | * Release a command slot. | |
2556 | * | |
2557 | * @dd Pointer to the driver data structure. | |
2558 | * @tag Slot tag | |
2559 | * | |
2560 | * return value | |
2561 | * None | |
2562 | */ | |
6316668f | 2563 | static void mtip_hw_release_scatterlist(struct driver_data *dd, int tag) |
88523a61 SB |
2564 | { |
2565 | release_slot(dd->port, tag); | |
2566 | } | |
2567 | ||
2568 | /* | |
2569 | * Obtain a command slot and return its associated scatter list. | |
2570 | * | |
2571 | * @dd Pointer to the driver data structure. | |
2572 | * @tag Pointer to an int that will receive the allocated command | |
2573 | * slot tag. | |
2574 | * | |
2575 | * return value | |
2576 | * Pointer to the scatter list for the allocated command slot | |
2577 | * or NULL if no command slots are available. | |
2578 | */ | |
6316668f JA |
2579 | static struct scatterlist *mtip_hw_get_scatterlist(struct driver_data *dd, |
2580 | int *tag) | |
88523a61 SB |
2581 | { |
2582 | /* | |
2583 | * It is possible that, even with this semaphore, a thread | |
2584 | * may think that no command slots are available. Therefore, we | |
2585 | * need to make an attempt to get_slot(). | |
2586 | */ | |
2587 | down(&dd->port->cmd_slot); | |
2588 | *tag = get_slot(dd->port); | |
2589 | ||
8a857a88 | 2590 | if (unlikely(test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag))) { |
45038367 AT |
2591 | up(&dd->port->cmd_slot); |
2592 | return NULL; | |
2593 | } | |
a09ba13e AT |
2594 | if (unlikely(*tag < 0)) { |
2595 | up(&dd->port->cmd_slot); | |
88523a61 | 2596 | return NULL; |
a09ba13e | 2597 | } |
88523a61 SB |
2598 | |
2599 | return dd->port->commands[*tag].sg; | |
2600 | } | |
2601 | ||
2602 | /* | |
7412ff13 | 2603 | * Sysfs status dump. |
88523a61 SB |
2604 | * |
2605 | * @dev Pointer to the device structure, passed by the kernrel. | |
2606 | * @attr Pointer to the device_attribute structure passed by the kernel. | |
2607 | * @buf Pointer to the char buffer that will receive the stats info. | |
2608 | * | |
2609 | * return value | |
2610 | * The size, in bytes, of the data copied into buf. | |
2611 | */ | |
f6587217 AT |
2612 | static ssize_t mtip_hw_show_status(struct device *dev, |
2613 | struct device_attribute *attr, | |
2614 | char *buf) | |
2615 | { | |
2616 | struct driver_data *dd = dev_to_disk(dev)->private_data; | |
2617 | int size = 0; | |
2618 | ||
8a857a88 | 2619 | if (test_bit(MTIP_DDF_OVER_TEMP_BIT, &dd->dd_flag)) |
f6587217 | 2620 | size += sprintf(buf, "%s", "thermal_shutdown\n"); |
8a857a88 | 2621 | else if (test_bit(MTIP_DDF_WRITE_PROTECT_BIT, &dd->dd_flag)) |
f6587217 AT |
2622 | size += sprintf(buf, "%s", "write_protect\n"); |
2623 | else | |
2624 | size += sprintf(buf, "%s", "online\n"); | |
2625 | ||
2626 | return size; | |
2627 | } | |
2628 | ||
f6587217 | 2629 | static DEVICE_ATTR(status, S_IRUGO, mtip_hw_show_status, NULL); |
88523a61 | 2630 | |
7b421d24 AT |
2631 | static ssize_t mtip_hw_read_registers(struct file *f, char __user *ubuf, |
2632 | size_t len, loff_t *offset) | |
2633 | { | |
2634 | struct driver_data *dd = (struct driver_data *)f->private_data; | |
2635 | char buf[MTIP_DFS_MAX_BUF_SIZE]; | |
2636 | u32 group_allocated; | |
2637 | int size = *offset; | |
2638 | int n; | |
2639 | ||
2640 | if (!len || size) | |
2641 | return 0; | |
2642 | ||
7b421d24 AT |
2643 | size += sprintf(&buf[size], "H/ S ACTive : [ 0x"); |
2644 | ||
2645 | for (n = dd->slot_groups-1; n >= 0; n--) | |
2646 | size += sprintf(&buf[size], "%08X ", | |
2647 | readl(dd->port->s_active[n])); | |
2648 | ||
2649 | size += sprintf(&buf[size], "]\n"); | |
2650 | size += sprintf(&buf[size], "H/ Command Issue : [ 0x"); | |
2651 | ||
2652 | for (n = dd->slot_groups-1; n >= 0; n--) | |
2653 | size += sprintf(&buf[size], "%08X ", | |
2654 | readl(dd->port->cmd_issue[n])); | |
2655 | ||
2656 | size += sprintf(&buf[size], "]\n"); | |
2657 | size += sprintf(&buf[size], "H/ Completed : [ 0x"); | |
2658 | ||
2659 | for (n = dd->slot_groups-1; n >= 0; n--) | |
2660 | size += sprintf(&buf[size], "%08X ", | |
2661 | readl(dd->port->completed[n])); | |
2662 | ||
2663 | size += sprintf(&buf[size], "]\n"); | |
2664 | size += sprintf(&buf[size], "H/ PORT IRQ STAT : [ 0x%08X ]\n", | |
2665 | readl(dd->port->mmio + PORT_IRQ_STAT)); | |
2666 | size += sprintf(&buf[size], "H/ HOST IRQ STAT : [ 0x%08X ]\n", | |
2667 | readl(dd->mmio + HOST_IRQ_STAT)); | |
2668 | size += sprintf(&buf[size], "\n"); | |
2669 | ||
2670 | size += sprintf(&buf[size], "L/ Allocated : [ 0x"); | |
2671 | ||
2672 | for (n = dd->slot_groups-1; n >= 0; n--) { | |
2673 | if (sizeof(long) > sizeof(u32)) | |
2674 | group_allocated = | |
2675 | dd->port->allocated[n/2] >> (32*(n&1)); | |
2676 | else | |
2677 | group_allocated = dd->port->allocated[n]; | |
2678 | size += sprintf(&buf[size], "%08X ", group_allocated); | |
2679 | } | |
2680 | size += sprintf(&buf[size], "]\n"); | |
2681 | ||
2682 | size += sprintf(&buf[size], "L/ Commands in Q : [ 0x"); | |
2683 | ||
2684 | for (n = dd->slot_groups-1; n >= 0; n--) { | |
2685 | if (sizeof(long) > sizeof(u32)) | |
2686 | group_allocated = | |
2687 | dd->port->cmds_to_issue[n/2] >> (32*(n&1)); | |
2688 | else | |
2689 | group_allocated = dd->port->cmds_to_issue[n]; | |
2690 | size += sprintf(&buf[size], "%08X ", group_allocated); | |
2691 | } | |
2692 | size += sprintf(&buf[size], "]\n"); | |
2693 | ||
2694 | *offset = size <= len ? size : len; | |
2695 | size = copy_to_user(ubuf, buf, *offset); | |
2696 | if (size) | |
2697 | return -EFAULT; | |
2698 | ||
2699 | return *offset; | |
2700 | } | |
2701 | ||
2702 | static ssize_t mtip_hw_read_flags(struct file *f, char __user *ubuf, | |
2703 | size_t len, loff_t *offset) | |
2704 | { | |
2705 | struct driver_data *dd = (struct driver_data *)f->private_data; | |
2706 | char buf[MTIP_DFS_MAX_BUF_SIZE]; | |
2707 | int size = *offset; | |
2708 | ||
2709 | if (!len || size) | |
2710 | return 0; | |
2711 | ||
7b421d24 AT |
2712 | size += sprintf(&buf[size], "Flag-port : [ %08lX ]\n", |
2713 | dd->port->flags); | |
2714 | size += sprintf(&buf[size], "Flag-dd : [ %08lX ]\n", | |
2715 | dd->dd_flag); | |
2716 | ||
2717 | *offset = size <= len ? size : len; | |
2718 | size = copy_to_user(ubuf, buf, *offset); | |
2719 | if (size) | |
2720 | return -EFAULT; | |
2721 | ||
2722 | return *offset; | |
2723 | } | |
2724 | ||
2725 | static const struct file_operations mtip_regs_fops = { | |
2726 | .owner = THIS_MODULE, | |
2727 | .open = simple_open, | |
2728 | .read = mtip_hw_read_registers, | |
2729 | .llseek = no_llseek, | |
2730 | }; | |
2731 | ||
2732 | static const struct file_operations mtip_flags_fops = { | |
2733 | .owner = THIS_MODULE, | |
2734 | .open = simple_open, | |
2735 | .read = mtip_hw_read_flags, | |
2736 | .llseek = no_llseek, | |
2737 | }; | |
2738 | ||
88523a61 SB |
2739 | /* |
2740 | * Create the sysfs related attributes. | |
2741 | * | |
2742 | * @dd Pointer to the driver data structure. | |
2743 | * @kobj Pointer to the kobj for the block device. | |
2744 | * | |
2745 | * return value | |
2746 | * 0 Operation completed successfully. | |
2747 | * -EINVAL Invalid parameter. | |
2748 | */ | |
6316668f | 2749 | static int mtip_hw_sysfs_init(struct driver_data *dd, struct kobject *kobj) |
88523a61 SB |
2750 | { |
2751 | if (!kobj || !dd) | |
2752 | return -EINVAL; | |
2753 | ||
f6587217 AT |
2754 | if (sysfs_create_file(kobj, &dev_attr_status.attr)) |
2755 | dev_warn(&dd->pdev->dev, | |
2756 | "Error creating 'status' sysfs entry\n"); | |
88523a61 SB |
2757 | return 0; |
2758 | } | |
2759 | ||
2760 | /* | |
2761 | * Remove the sysfs related attributes. | |
2762 | * | |
2763 | * @dd Pointer to the driver data structure. | |
2764 | * @kobj Pointer to the kobj for the block device. | |
2765 | * | |
2766 | * return value | |
2767 | * 0 Operation completed successfully. | |
2768 | * -EINVAL Invalid parameter. | |
2769 | */ | |
6316668f | 2770 | static int mtip_hw_sysfs_exit(struct driver_data *dd, struct kobject *kobj) |
88523a61 SB |
2771 | { |
2772 | if (!kobj || !dd) | |
2773 | return -EINVAL; | |
2774 | ||
f6587217 | 2775 | sysfs_remove_file(kobj, &dev_attr_status.attr); |
88523a61 SB |
2776 | |
2777 | return 0; | |
2778 | } | |
2779 | ||
7b421d24 AT |
2780 | static int mtip_hw_debugfs_init(struct driver_data *dd) |
2781 | { | |
2782 | if (!dfs_parent) | |
2783 | return -1; | |
2784 | ||
2785 | dd->dfs_node = debugfs_create_dir(dd->disk->disk_name, dfs_parent); | |
2786 | if (IS_ERR_OR_NULL(dd->dfs_node)) { | |
2787 | dev_warn(&dd->pdev->dev, | |
2788 | "Error creating node %s under debugfs\n", | |
2789 | dd->disk->disk_name); | |
2790 | dd->dfs_node = NULL; | |
2791 | return -1; | |
2792 | } | |
2793 | ||
2794 | debugfs_create_file("flags", S_IRUGO, dd->dfs_node, dd, | |
2795 | &mtip_flags_fops); | |
2796 | debugfs_create_file("registers", S_IRUGO, dd->dfs_node, dd, | |
2797 | &mtip_regs_fops); | |
2798 | ||
2799 | return 0; | |
2800 | } | |
2801 | ||
2802 | static void mtip_hw_debugfs_exit(struct driver_data *dd) | |
2803 | { | |
2804 | debugfs_remove_recursive(dd->dfs_node); | |
2805 | } | |
2806 | ||
2807 | ||
88523a61 SB |
2808 | /* |
2809 | * Perform any init/resume time hardware setup | |
2810 | * | |
2811 | * @dd Pointer to the driver data structure. | |
2812 | * | |
2813 | * return value | |
2814 | * None | |
2815 | */ | |
2816 | static inline void hba_setup(struct driver_data *dd) | |
2817 | { | |
2818 | u32 hwdata; | |
2819 | hwdata = readl(dd->mmio + HOST_HSORG); | |
2820 | ||
2821 | /* interrupt bug workaround: use only 1 IS bit.*/ | |
2822 | writel(hwdata | | |
2823 | HSORG_DISABLE_SLOTGRP_INTR | | |
2824 | HSORG_DISABLE_SLOTGRP_PXIS, | |
2825 | dd->mmio + HOST_HSORG); | |
2826 | } | |
2827 | ||
2828 | /* | |
2829 | * Detect the details of the product, and store anything needed | |
2830 | * into the driver data structure. This includes product type and | |
2831 | * version and number of slot groups. | |
2832 | * | |
2833 | * @dd Pointer to the driver data structure. | |
2834 | * | |
2835 | * return value | |
2836 | * None | |
2837 | */ | |
2838 | static void mtip_detect_product(struct driver_data *dd) | |
2839 | { | |
2840 | u32 hwdata; | |
2841 | unsigned int rev, slotgroups; | |
2842 | ||
2843 | /* | |
2844 | * HBA base + 0xFC [15:0] - vendor-specific hardware interface | |
2845 | * info register: | |
2846 | * [15:8] hardware/software interface rev# | |
2847 | * [ 3] asic-style interface | |
2848 | * [ 2:0] number of slot groups, minus 1 (only valid for asic-style). | |
2849 | */ | |
2850 | hwdata = readl(dd->mmio + HOST_HSORG); | |
2851 | ||
2852 | dd->product_type = MTIP_PRODUCT_UNKNOWN; | |
2853 | dd->slot_groups = 1; | |
2854 | ||
2855 | if (hwdata & 0x8) { | |
2856 | dd->product_type = MTIP_PRODUCT_ASICFPGA; | |
2857 | rev = (hwdata & HSORG_HWREV) >> 8; | |
2858 | slotgroups = (hwdata & HSORG_SLOTGROUPS) + 1; | |
2859 | dev_info(&dd->pdev->dev, | |
2860 | "ASIC-FPGA design, HS rev 0x%x, " | |
2861 | "%i slot groups [%i slots]\n", | |
2862 | rev, | |
2863 | slotgroups, | |
2864 | slotgroups * 32); | |
2865 | ||
2866 | if (slotgroups > MTIP_MAX_SLOT_GROUPS) { | |
2867 | dev_warn(&dd->pdev->dev, | |
2868 | "Warning: driver only supports " | |
2869 | "%i slot groups.\n", MTIP_MAX_SLOT_GROUPS); | |
2870 | slotgroups = MTIP_MAX_SLOT_GROUPS; | |
2871 | } | |
2872 | dd->slot_groups = slotgroups; | |
2873 | return; | |
2874 | } | |
2875 | ||
2876 | dev_warn(&dd->pdev->dev, "Unrecognized product id\n"); | |
2877 | } | |
2878 | ||
2879 | /* | |
2880 | * Blocking wait for FTL rebuild to complete | |
2881 | * | |
2882 | * @dd Pointer to the DRIVER_DATA structure. | |
2883 | * | |
2884 | * return value | |
2885 | * 0 FTL rebuild completed successfully | |
2886 | * -EFAULT FTL rebuild error/timeout/interruption | |
2887 | */ | |
2888 | static int mtip_ftl_rebuild_poll(struct driver_data *dd) | |
2889 | { | |
2890 | unsigned long timeout, cnt = 0, start; | |
2891 | ||
2892 | dev_warn(&dd->pdev->dev, | |
2893 | "FTL rebuild in progress. Polling for completion.\n"); | |
2894 | ||
2895 | start = jiffies; | |
88523a61 SB |
2896 | timeout = jiffies + msecs_to_jiffies(MTIP_FTL_REBUILD_TIMEOUT_MS); |
2897 | ||
2898 | do { | |
8a857a88 | 2899 | if (unlikely(test_bit(MTIP_DDF_REMOVE_PENDING_BIT, |
45038367 AT |
2900 | &dd->dd_flag))) |
2901 | return -EFAULT; | |
88523a61 SB |
2902 | if (mtip_check_surprise_removal(dd->pdev)) |
2903 | return -EFAULT; | |
60ec0eec | 2904 | |
88523a61 SB |
2905 | if (mtip_get_identify(dd->port, NULL) < 0) |
2906 | return -EFAULT; | |
2907 | ||
2908 | if (*(dd->port->identify + MTIP_FTL_REBUILD_OFFSET) == | |
2909 | MTIP_FTL_REBUILD_MAGIC) { | |
2910 | ssleep(1); | |
2911 | /* Print message every 3 minutes */ | |
2912 | if (cnt++ >= 180) { | |
2913 | dev_warn(&dd->pdev->dev, | |
2914 | "FTL rebuild in progress (%d secs).\n", | |
2915 | jiffies_to_msecs(jiffies - start) / 1000); | |
2916 | cnt = 0; | |
2917 | } | |
2918 | } else { | |
2919 | dev_warn(&dd->pdev->dev, | |
2920 | "FTL rebuild complete (%d secs).\n", | |
2921 | jiffies_to_msecs(jiffies - start) / 1000); | |
62ee8c13 | 2922 | mtip_block_initialize(dd); |
45038367 | 2923 | return 0; |
88523a61 SB |
2924 | } |
2925 | ssleep(10); | |
2926 | } while (time_before(jiffies, timeout)); | |
2927 | ||
2928 | /* Check for timeout */ | |
45038367 | 2929 | dev_err(&dd->pdev->dev, |
88523a61 SB |
2930 | "Timed out waiting for FTL rebuild to complete (%d secs).\n", |
2931 | jiffies_to_msecs(jiffies - start) / 1000); | |
45038367 | 2932 | return -EFAULT; |
88523a61 SB |
2933 | } |
2934 | ||
60ec0eec AT |
2935 | /* |
2936 | * service thread to issue queued commands | |
2937 | * | |
2938 | * @data Pointer to the driver data structure. | |
2939 | * | |
2940 | * return value | |
2941 | * 0 | |
2942 | */ | |
2943 | ||
2944 | static int mtip_service_thread(void *data) | |
2945 | { | |
2946 | struct driver_data *dd = (struct driver_data *)data; | |
2947 | unsigned long slot, slot_start, slot_wrap; | |
2948 | unsigned int num_cmd_slots = dd->slot_groups * 32; | |
2949 | struct mtip_port *port = dd->port; | |
2950 | ||
2951 | while (1) { | |
2952 | /* | |
2953 | * the condition is to check neither an internal command is | |
2954 | * is in progress nor error handling is active | |
2955 | */ | |
2956 | wait_event_interruptible(port->svc_wait, (port->flags) && | |
c74b0f58 | 2957 | !(port->flags & MTIP_PF_PAUSE_IO)); |
60ec0eec AT |
2958 | |
2959 | if (kthread_should_stop()) | |
2960 | break; | |
2961 | ||
8a857a88 | 2962 | if (unlikely(test_bit(MTIP_DDF_REMOVE_PENDING_BIT, |
45038367 AT |
2963 | &dd->dd_flag))) |
2964 | break; | |
c74b0f58 | 2965 | |
8a857a88 AT |
2966 | set_bit(MTIP_PF_SVC_THD_ACTIVE_BIT, &port->flags); |
2967 | if (test_bit(MTIP_PF_ISSUE_CMDS_BIT, &port->flags)) { | |
60ec0eec AT |
2968 | slot = 1; |
2969 | /* used to restrict the loop to one iteration */ | |
2970 | slot_start = num_cmd_slots; | |
2971 | slot_wrap = 0; | |
2972 | while (1) { | |
2973 | slot = find_next_bit(port->cmds_to_issue, | |
2974 | num_cmd_slots, slot); | |
2975 | if (slot_wrap == 1) { | |
2976 | if ((slot_start >= slot) || | |
2977 | (slot >= num_cmd_slots)) | |
2978 | break; | |
2979 | } | |
2980 | if (unlikely(slot_start == num_cmd_slots)) | |
2981 | slot_start = slot; | |
2982 | ||
2983 | if (unlikely(slot == num_cmd_slots)) { | |
2984 | slot = 1; | |
2985 | slot_wrap = 1; | |
2986 | continue; | |
2987 | } | |
2988 | ||
2989 | /* Issue the command to the hardware */ | |
2990 | mtip_issue_ncq_command(port, slot); | |
2991 | ||
60ec0eec AT |
2992 | clear_bit(slot, port->cmds_to_issue); |
2993 | } | |
2994 | ||
8a857a88 AT |
2995 | clear_bit(MTIP_PF_ISSUE_CMDS_BIT, &port->flags); |
2996 | } else if (test_bit(MTIP_PF_REBUILD_BIT, &port->flags)) { | |
8182b495 | 2997 | if (!mtip_ftl_rebuild_poll(dd)) |
8a857a88 | 2998 | set_bit(MTIP_DDF_REBUILD_FAILED_BIT, |
8182b495 | 2999 | &dd->dd_flag); |
8a857a88 | 3000 | clear_bit(MTIP_PF_REBUILD_BIT, &port->flags); |
60ec0eec | 3001 | } |
8a857a88 | 3002 | clear_bit(MTIP_PF_SVC_THD_ACTIVE_BIT, &port->flags); |
62ee8c13 | 3003 | |
c74b0f58 | 3004 | if (test_bit(MTIP_PF_SVC_THD_STOP_BIT, &port->flags)) |
62ee8c13 | 3005 | break; |
60ec0eec AT |
3006 | } |
3007 | return 0; | |
3008 | } | |
3009 | ||
88523a61 SB |
3010 | /* |
3011 | * Called once for each card. | |
3012 | * | |
3013 | * @dd Pointer to the driver data structure. | |
3014 | * | |
3015 | * return value | |
3016 | * 0 on success, else an error code. | |
3017 | */ | |
6316668f | 3018 | static int mtip_hw_init(struct driver_data *dd) |
88523a61 SB |
3019 | { |
3020 | int i; | |
3021 | int rv; | |
3022 | unsigned int num_command_slots; | |
45038367 | 3023 | unsigned long timeout, timetaken; |
f6587217 AT |
3024 | unsigned char *buf; |
3025 | struct smart_attr attr242; | |
88523a61 SB |
3026 | |
3027 | dd->mmio = pcim_iomap_table(dd->pdev)[MTIP_ABAR]; | |
3028 | ||
3029 | mtip_detect_product(dd); | |
3030 | if (dd->product_type == MTIP_PRODUCT_UNKNOWN) { | |
3031 | rv = -EIO; | |
3032 | goto out1; | |
3033 | } | |
3034 | num_command_slots = dd->slot_groups * 32; | |
3035 | ||
3036 | hba_setup(dd); | |
3037 | ||
16c906e5 AT |
3038 | dd->port = kzalloc_node(sizeof(struct mtip_port), GFP_KERNEL, |
3039 | dd->numa_node); | |
88523a61 SB |
3040 | if (!dd->port) { |
3041 | dev_err(&dd->pdev->dev, | |
3042 | "Memory allocation: port structure\n"); | |
3043 | return -ENOMEM; | |
3044 | } | |
3045 | ||
16c906e5 AT |
3046 | /* Continue workqueue setup */ |
3047 | for (i = 0; i < MTIP_MAX_SLOT_GROUPS; i++) | |
3048 | dd->work[i].port = dd->port; | |
3049 | ||
88523a61 SB |
3050 | /* Counting semaphore to track command slot usage */ |
3051 | sema_init(&dd->port->cmd_slot, num_command_slots - 1); | |
3052 | ||
3053 | /* Spinlock to prevent concurrent issue */ | |
16c906e5 AT |
3054 | for (i = 0; i < MTIP_MAX_SLOT_GROUPS; i++) |
3055 | spin_lock_init(&dd->port->cmd_issue_lock[i]); | |
88523a61 SB |
3056 | |
3057 | /* Set the port mmio base address. */ | |
3058 | dd->port->mmio = dd->mmio + PORT_OFFSET; | |
3059 | dd->port->dd = dd; | |
3060 | ||
3061 | /* Allocate memory for the command list. */ | |
3062 | dd->port->command_list = | |
3063 | dmam_alloc_coherent(&dd->pdev->dev, | |
f6587217 | 3064 | HW_PORT_PRIV_DMA_SZ + (ATA_SECT_SIZE * 4), |
88523a61 SB |
3065 | &dd->port->command_list_dma, |
3066 | GFP_KERNEL); | |
3067 | if (!dd->port->command_list) { | |
3068 | dev_err(&dd->pdev->dev, | |
3069 | "Memory allocation: command list\n"); | |
3070 | rv = -ENOMEM; | |
3071 | goto out1; | |
3072 | } | |
3073 | ||
3074 | /* Clear the memory we have allocated. */ | |
3075 | memset(dd->port->command_list, | |
3076 | 0, | |
f6587217 | 3077 | HW_PORT_PRIV_DMA_SZ + (ATA_SECT_SIZE * 4)); |
88523a61 SB |
3078 | |
3079 | /* Setup the addresse of the RX FIS. */ | |
3080 | dd->port->rxfis = dd->port->command_list + HW_CMD_SLOT_SZ; | |
3081 | dd->port->rxfis_dma = dd->port->command_list_dma + HW_CMD_SLOT_SZ; | |
3082 | ||
3083 | /* Setup the address of the command tables. */ | |
3084 | dd->port->command_table = dd->port->rxfis + AHCI_RX_FIS_SZ; | |
3085 | dd->port->command_tbl_dma = dd->port->rxfis_dma + AHCI_RX_FIS_SZ; | |
3086 | ||
3087 | /* Setup the address of the identify data. */ | |
3088 | dd->port->identify = dd->port->command_table + | |
3089 | HW_CMD_TBL_AR_SZ; | |
3090 | dd->port->identify_dma = dd->port->command_tbl_dma + | |
3091 | HW_CMD_TBL_AR_SZ; | |
3092 | ||
f6587217 | 3093 | /* Setup the address of the sector buffer - for some non-ncq cmds */ |
88523a61 SB |
3094 | dd->port->sector_buffer = (void *) dd->port->identify + ATA_SECT_SIZE; |
3095 | dd->port->sector_buffer_dma = dd->port->identify_dma + ATA_SECT_SIZE; | |
3096 | ||
f6587217 AT |
3097 | /* Setup the address of the log buf - for read log command */ |
3098 | dd->port->log_buf = (void *)dd->port->sector_buffer + ATA_SECT_SIZE; | |
3099 | dd->port->log_buf_dma = dd->port->sector_buffer_dma + ATA_SECT_SIZE; | |
3100 | ||
3101 | /* Setup the address of the smart buf - for smart read data command */ | |
3102 | dd->port->smart_buf = (void *)dd->port->log_buf + ATA_SECT_SIZE; | |
3103 | dd->port->smart_buf_dma = dd->port->log_buf_dma + ATA_SECT_SIZE; | |
3104 | ||
3105 | ||
88523a61 SB |
3106 | /* Point the command headers at the command tables. */ |
3107 | for (i = 0; i < num_command_slots; i++) { | |
3108 | dd->port->commands[i].command_header = | |
3109 | dd->port->command_list + | |
3110 | (sizeof(struct mtip_cmd_hdr) * i); | |
3111 | dd->port->commands[i].command_header_dma = | |
3112 | dd->port->command_list_dma + | |
3113 | (sizeof(struct mtip_cmd_hdr) * i); | |
3114 | ||
3115 | dd->port->commands[i].command = | |
3116 | dd->port->command_table + (HW_CMD_TBL_SZ * i); | |
3117 | dd->port->commands[i].command_dma = | |
3118 | dd->port->command_tbl_dma + (HW_CMD_TBL_SZ * i); | |
3119 | ||
3120 | if (readl(dd->mmio + HOST_CAP) & HOST_CAP_64) | |
3121 | dd->port->commands[i].command_header->ctbau = | |
60ec0eec | 3122 | __force_bit2int cpu_to_le32( |
88523a61 | 3123 | (dd->port->commands[i].command_dma >> 16) >> 16); |
60ec0eec AT |
3124 | dd->port->commands[i].command_header->ctba = |
3125 | __force_bit2int cpu_to_le32( | |
3126 | dd->port->commands[i].command_dma & 0xFFFFFFFF); | |
88523a61 SB |
3127 | |
3128 | /* | |
3129 | * If this is not done, a bug is reported by the stock | |
3130 | * FC11 i386. Due to the fact that it has lots of kernel | |
3131 | * debugging enabled. | |
3132 | */ | |
3133 | sg_init_table(dd->port->commands[i].sg, MTIP_MAX_SG); | |
3134 | ||
3135 | /* Mark all commands as currently inactive.*/ | |
3136 | atomic_set(&dd->port->commands[i].active, 0); | |
3137 | } | |
3138 | ||
3139 | /* Setup the pointers to the extended s_active and CI registers. */ | |
3140 | for (i = 0; i < dd->slot_groups; i++) { | |
3141 | dd->port->s_active[i] = | |
3142 | dd->port->mmio + i*0x80 + PORT_SCR_ACT; | |
3143 | dd->port->cmd_issue[i] = | |
3144 | dd->port->mmio + i*0x80 + PORT_COMMAND_ISSUE; | |
3145 | dd->port->completed[i] = | |
3146 | dd->port->mmio + i*0x80 + PORT_SDBV; | |
3147 | } | |
3148 | ||
45038367 AT |
3149 | timetaken = jiffies; |
3150 | timeout = jiffies + msecs_to_jiffies(30000); | |
3151 | while (((readl(dd->port->mmio + PORT_SCR_STAT) & 0x0F) != 0x03) && | |
3152 | time_before(jiffies, timeout)) { | |
3153 | mdelay(100); | |
3154 | } | |
3155 | if (unlikely(mtip_check_surprise_removal(dd->pdev))) { | |
3156 | timetaken = jiffies - timetaken; | |
3157 | dev_warn(&dd->pdev->dev, | |
3158 | "Surprise removal detected at %u ms\n", | |
3159 | jiffies_to_msecs(timetaken)); | |
3160 | rv = -ENODEV; | |
3161 | goto out2 ; | |
3162 | } | |
8a857a88 | 3163 | if (unlikely(test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag))) { |
45038367 AT |
3164 | timetaken = jiffies - timetaken; |
3165 | dev_warn(&dd->pdev->dev, | |
3166 | "Removal detected at %u ms\n", | |
3167 | jiffies_to_msecs(timetaken)); | |
3168 | rv = -EFAULT; | |
88523a61 SB |
3169 | goto out2; |
3170 | } | |
3171 | ||
45038367 AT |
3172 | /* Conditionally reset the HBA. */ |
3173 | if (!(readl(dd->mmio + HOST_CAP) & HOST_CAP_NZDMA)) { | |
3174 | if (mtip_hba_reset(dd) < 0) { | |
3175 | dev_err(&dd->pdev->dev, | |
3176 | "Card did not reset within timeout\n"); | |
3177 | rv = -EIO; | |
3178 | goto out2; | |
3179 | } | |
3180 | } else { | |
3181 | /* Clear any pending interrupts on the HBA */ | |
3182 | writel(readl(dd->mmio + HOST_IRQ_STAT), | |
3183 | dd->mmio + HOST_IRQ_STAT); | |
3184 | } | |
3185 | ||
88523a61 SB |
3186 | mtip_init_port(dd->port); |
3187 | mtip_start_port(dd->port); | |
3188 | ||
3189 | /* Setup the ISR and enable interrupts. */ | |
3190 | rv = devm_request_irq(&dd->pdev->dev, | |
3191 | dd->pdev->irq, | |
3192 | mtip_irq_handler, | |
3193 | IRQF_SHARED, | |
3194 | dev_driver_string(&dd->pdev->dev), | |
3195 | dd); | |
3196 | ||
3197 | if (rv) { | |
3198 | dev_err(&dd->pdev->dev, | |
3199 | "Unable to allocate IRQ %d\n", dd->pdev->irq); | |
3200 | goto out2; | |
3201 | } | |
16c906e5 | 3202 | irq_set_affinity_hint(dd->pdev->irq, get_cpu_mask(dd->isr_binding)); |
88523a61 SB |
3203 | |
3204 | /* Enable interrupts on the HBA. */ | |
3205 | writel(readl(dd->mmio + HOST_CTL) | HOST_IRQ_EN, | |
3206 | dd->mmio + HOST_CTL); | |
3207 | ||
3208 | init_timer(&dd->port->cmd_timer); | |
60ec0eec AT |
3209 | init_waitqueue_head(&dd->port->svc_wait); |
3210 | ||
88523a61 SB |
3211 | dd->port->cmd_timer.data = (unsigned long int) dd->port; |
3212 | dd->port->cmd_timer.function = mtip_timeout_function; | |
3213 | mod_timer(&dd->port->cmd_timer, | |
3214 | jiffies + msecs_to_jiffies(MTIP_TIMEOUT_CHECK_PERIOD)); | |
3215 | ||
45038367 | 3216 | |
8a857a88 | 3217 | if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag)) { |
45038367 AT |
3218 | rv = -EFAULT; |
3219 | goto out3; | |
3220 | } | |
3221 | ||
88523a61 SB |
3222 | if (mtip_get_identify(dd->port, NULL) < 0) { |
3223 | rv = -EFAULT; | |
3224 | goto out3; | |
3225 | } | |
88523a61 SB |
3226 | |
3227 | if (*(dd->port->identify + MTIP_FTL_REBUILD_OFFSET) == | |
3228 | MTIP_FTL_REBUILD_MAGIC) { | |
8a857a88 | 3229 | set_bit(MTIP_PF_REBUILD_BIT, &dd->port->flags); |
62ee8c13 | 3230 | return MTIP_FTL_REBUILD_MAGIC; |
88523a61 | 3231 | } |
62ee8c13 | 3232 | mtip_dump_identify(dd->port); |
f6587217 AT |
3233 | |
3234 | /* check write protect, over temp and rebuild statuses */ | |
3235 | rv = mtip_read_log_page(dd->port, ATA_LOG_SATA_NCQ, | |
3236 | dd->port->log_buf, | |
3237 | dd->port->log_buf_dma, 1); | |
3238 | if (rv) { | |
3239 | dev_warn(&dd->pdev->dev, | |
3240 | "Error in READ LOG EXT (10h) command\n"); | |
3241 | /* non-critical error, don't fail the load */ | |
3242 | } else { | |
3243 | buf = (unsigned char *)dd->port->log_buf; | |
3244 | if (buf[259] & 0x1) { | |
3245 | dev_info(&dd->pdev->dev, | |
3246 | "Write protect bit is set.\n"); | |
8a857a88 | 3247 | set_bit(MTIP_DDF_WRITE_PROTECT_BIT, &dd->dd_flag); |
f6587217 AT |
3248 | } |
3249 | if (buf[288] == 0xF7) { | |
3250 | dev_info(&dd->pdev->dev, | |
3251 | "Exceeded Tmax, drive in thermal shutdown.\n"); | |
8a857a88 | 3252 | set_bit(MTIP_DDF_OVER_TEMP_BIT, &dd->dd_flag); |
f6587217 AT |
3253 | } |
3254 | if (buf[288] == 0xBF) { | |
3255 | dev_info(&dd->pdev->dev, | |
3256 | "Drive indicates rebuild has failed.\n"); | |
3257 | /* TODO */ | |
3258 | } | |
3259 | } | |
3260 | ||
3261 | /* get write protect progess */ | |
3262 | memset(&attr242, 0, sizeof(struct smart_attr)); | |
3263 | if (mtip_get_smart_attr(dd->port, 242, &attr242)) | |
3264 | dev_warn(&dd->pdev->dev, | |
3265 | "Unable to check write protect progress\n"); | |
3266 | else | |
3267 | dev_info(&dd->pdev->dev, | |
b62868e5 AT |
3268 | "Write protect progress: %u%% (%u blocks)\n", |
3269 | attr242.cur, le32_to_cpu(attr242.data)); | |
88523a61 SB |
3270 | return rv; |
3271 | ||
3272 | out3: | |
3273 | del_timer_sync(&dd->port->cmd_timer); | |
3274 | ||
3275 | /* Disable interrupts on the HBA. */ | |
3276 | writel(readl(dd->mmio + HOST_CTL) & ~HOST_IRQ_EN, | |
3277 | dd->mmio + HOST_CTL); | |
3278 | ||
16c906e5 AT |
3279 | /* Release the IRQ. */ |
3280 | irq_set_affinity_hint(dd->pdev->irq, NULL); | |
88523a61 SB |
3281 | devm_free_irq(&dd->pdev->dev, dd->pdev->irq, dd); |
3282 | ||
3283 | out2: | |
3284 | mtip_deinit_port(dd->port); | |
3285 | ||
3286 | /* Free the command/command header memory. */ | |
3287 | dmam_free_coherent(&dd->pdev->dev, | |
f6587217 | 3288 | HW_PORT_PRIV_DMA_SZ + (ATA_SECT_SIZE * 4), |
88523a61 SB |
3289 | dd->port->command_list, |
3290 | dd->port->command_list_dma); | |
3291 | out1: | |
3292 | /* Free the memory allocated for the for structure. */ | |
3293 | kfree(dd->port); | |
3294 | ||
3295 | return rv; | |
3296 | } | |
3297 | ||
3298 | /* | |
3299 | * Called to deinitialize an interface. | |
3300 | * | |
3301 | * @dd Pointer to the driver data structure. | |
3302 | * | |
3303 | * return value | |
3304 | * 0 | |
3305 | */ | |
6316668f | 3306 | static int mtip_hw_exit(struct driver_data *dd) |
88523a61 SB |
3307 | { |
3308 | /* | |
3309 | * Send standby immediate (E0h) to the drive so that it | |
3310 | * saves its state. | |
3311 | */ | |
8a857a88 | 3312 | if (!test_bit(MTIP_DDF_CLEANUP_BIT, &dd->dd_flag)) { |
88523a61 | 3313 | |
8a857a88 | 3314 | if (!test_bit(MTIP_PF_REBUILD_BIT, &dd->port->flags)) |
45038367 AT |
3315 | if (mtip_standby_immediate(dd->port)) |
3316 | dev_warn(&dd->pdev->dev, | |
3317 | "STANDBY IMMEDIATE failed\n"); | |
88523a61 SB |
3318 | |
3319 | /* de-initialize the port. */ | |
3320 | mtip_deinit_port(dd->port); | |
3321 | ||
3322 | /* Disable interrupts on the HBA. */ | |
3323 | writel(readl(dd->mmio + HOST_CTL) & ~HOST_IRQ_EN, | |
3324 | dd->mmio + HOST_CTL); | |
3325 | } | |
3326 | ||
3327 | del_timer_sync(&dd->port->cmd_timer); | |
3328 | ||
88523a61 | 3329 | /* Release the IRQ. */ |
16c906e5 | 3330 | irq_set_affinity_hint(dd->pdev->irq, NULL); |
88523a61 SB |
3331 | devm_free_irq(&dd->pdev->dev, dd->pdev->irq, dd); |
3332 | ||
3333 | /* Free the command/command header memory. */ | |
3334 | dmam_free_coherent(&dd->pdev->dev, | |
f6587217 | 3335 | HW_PORT_PRIV_DMA_SZ + (ATA_SECT_SIZE * 4), |
88523a61 SB |
3336 | dd->port->command_list, |
3337 | dd->port->command_list_dma); | |
3338 | /* Free the memory allocated for the for structure. */ | |
3339 | kfree(dd->port); | |
3340 | ||
3341 | return 0; | |
3342 | } | |
3343 | ||
3344 | /* | |
3345 | * Issue a Standby Immediate command to the device. | |
3346 | * | |
3347 | * This function is called by the Block Layer just before the | |
3348 | * system powers off during a shutdown. | |
3349 | * | |
3350 | * @dd Pointer to the driver data structure. | |
3351 | * | |
3352 | * return value | |
3353 | * 0 | |
3354 | */ | |
6316668f | 3355 | static int mtip_hw_shutdown(struct driver_data *dd) |
88523a61 SB |
3356 | { |
3357 | /* | |
3358 | * Send standby immediate (E0h) to the drive so that it | |
3359 | * saves its state. | |
3360 | */ | |
3361 | mtip_standby_immediate(dd->port); | |
3362 | ||
3363 | return 0; | |
3364 | } | |
3365 | ||
3366 | /* | |
3367 | * Suspend function | |
3368 | * | |
3369 | * This function is called by the Block Layer just before the | |
3370 | * system hibernates. | |
3371 | * | |
3372 | * @dd Pointer to the driver data structure. | |
3373 | * | |
3374 | * return value | |
3375 | * 0 Suspend was successful | |
3376 | * -EFAULT Suspend was not successful | |
3377 | */ | |
6316668f | 3378 | static int mtip_hw_suspend(struct driver_data *dd) |
88523a61 SB |
3379 | { |
3380 | /* | |
3381 | * Send standby immediate (E0h) to the drive | |
3382 | * so that it saves its state. | |
3383 | */ | |
3384 | if (mtip_standby_immediate(dd->port) != 0) { | |
3385 | dev_err(&dd->pdev->dev, | |
3386 | "Failed standby-immediate command\n"); | |
3387 | return -EFAULT; | |
3388 | } | |
3389 | ||
3390 | /* Disable interrupts on the HBA.*/ | |
3391 | writel(readl(dd->mmio + HOST_CTL) & ~HOST_IRQ_EN, | |
3392 | dd->mmio + HOST_CTL); | |
3393 | mtip_deinit_port(dd->port); | |
3394 | ||
3395 | return 0; | |
3396 | } | |
3397 | ||
3398 | /* | |
3399 | * Resume function | |
3400 | * | |
3401 | * This function is called by the Block Layer as the | |
3402 | * system resumes. | |
3403 | * | |
3404 | * @dd Pointer to the driver data structure. | |
3405 | * | |
3406 | * return value | |
3407 | * 0 Resume was successful | |
3408 | * -EFAULT Resume was not successful | |
3409 | */ | |
6316668f | 3410 | static int mtip_hw_resume(struct driver_data *dd) |
88523a61 SB |
3411 | { |
3412 | /* Perform any needed hardware setup steps */ | |
3413 | hba_setup(dd); | |
3414 | ||
3415 | /* Reset the HBA */ | |
3416 | if (mtip_hba_reset(dd) != 0) { | |
3417 | dev_err(&dd->pdev->dev, | |
3418 | "Unable to reset the HBA\n"); | |
3419 | return -EFAULT; | |
3420 | } | |
3421 | ||
3422 | /* | |
3423 | * Enable the port, DMA engine, and FIS reception specific | |
3424 | * h/w in controller. | |
3425 | */ | |
3426 | mtip_init_port(dd->port); | |
3427 | mtip_start_port(dd->port); | |
3428 | ||
3429 | /* Enable interrupts on the HBA.*/ | |
3430 | writel(readl(dd->mmio + HOST_CTL) | HOST_IRQ_EN, | |
3431 | dd->mmio + HOST_CTL); | |
3432 | ||
3433 | return 0; | |
3434 | } | |
3435 | ||
88523a61 SB |
3436 | /* |
3437 | * Helper function for reusing disk name | |
3438 | * upon hot insertion. | |
3439 | */ | |
3440 | static int rssd_disk_name_format(char *prefix, | |
3441 | int index, | |
3442 | char *buf, | |
3443 | int buflen) | |
3444 | { | |
3445 | const int base = 'z' - 'a' + 1; | |
3446 | char *begin = buf + strlen(prefix); | |
3447 | char *end = buf + buflen; | |
3448 | char *p; | |
3449 | int unit; | |
3450 | ||
3451 | p = end - 1; | |
3452 | *p = '\0'; | |
3453 | unit = base; | |
3454 | do { | |
3455 | if (p == begin) | |
3456 | return -EINVAL; | |
3457 | *--p = 'a' + (index % unit); | |
3458 | index = (index / unit) - 1; | |
3459 | } while (index >= 0); | |
3460 | ||
3461 | memmove(begin, p, end - p); | |
3462 | memcpy(buf, prefix, strlen(prefix)); | |
3463 | ||
3464 | return 0; | |
3465 | } | |
3466 | ||
3467 | /* | |
3468 | * Block layer IOCTL handler. | |
3469 | * | |
3470 | * @dev Pointer to the block_device structure. | |
3471 | * @mode ignored | |
3472 | * @cmd IOCTL command passed from the user application. | |
3473 | * @arg Argument passed from the user application. | |
3474 | * | |
3475 | * return value | |
3476 | * 0 IOCTL completed successfully. | |
3477 | * -ENOTTY IOCTL not supported or invalid driver data | |
3478 | * structure pointer. | |
3479 | */ | |
3480 | static int mtip_block_ioctl(struct block_device *dev, | |
3481 | fmode_t mode, | |
3482 | unsigned cmd, | |
3483 | unsigned long arg) | |
3484 | { | |
3485 | struct driver_data *dd = dev->bd_disk->private_data; | |
3486 | ||
3487 | if (!capable(CAP_SYS_ADMIN)) | |
3488 | return -EACCES; | |
3489 | ||
3490 | if (!dd) | |
3491 | return -ENOTTY; | |
3492 | ||
8a857a88 | 3493 | if (unlikely(test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag))) |
45038367 AT |
3494 | return -ENOTTY; |
3495 | ||
88523a61 SB |
3496 | switch (cmd) { |
3497 | case BLKFLSBUF: | |
60ec0eec | 3498 | return -ENOTTY; |
88523a61 | 3499 | default: |
ef0f1587 | 3500 | return mtip_hw_ioctl(dd, cmd, arg); |
88523a61 SB |
3501 | } |
3502 | } | |
3503 | ||
16d02c04 | 3504 | #ifdef CONFIG_COMPAT |
88523a61 SB |
3505 | /* |
3506 | * Block layer compat IOCTL handler. | |
3507 | * | |
3508 | * @dev Pointer to the block_device structure. | |
3509 | * @mode ignored | |
3510 | * @cmd IOCTL command passed from the user application. | |
3511 | * @arg Argument passed from the user application. | |
3512 | * | |
3513 | * return value | |
3514 | * 0 IOCTL completed successfully. | |
3515 | * -ENOTTY IOCTL not supported or invalid driver data | |
3516 | * structure pointer. | |
3517 | */ | |
3518 | static int mtip_block_compat_ioctl(struct block_device *dev, | |
3519 | fmode_t mode, | |
3520 | unsigned cmd, | |
3521 | unsigned long arg) | |
3522 | { | |
3523 | struct driver_data *dd = dev->bd_disk->private_data; | |
3524 | ||
3525 | if (!capable(CAP_SYS_ADMIN)) | |
3526 | return -EACCES; | |
3527 | ||
3528 | if (!dd) | |
3529 | return -ENOTTY; | |
3530 | ||
8a857a88 | 3531 | if (unlikely(test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag))) |
45038367 AT |
3532 | return -ENOTTY; |
3533 | ||
88523a61 SB |
3534 | switch (cmd) { |
3535 | case BLKFLSBUF: | |
60ec0eec | 3536 | return -ENOTTY; |
ef0f1587 | 3537 | case HDIO_DRIVE_TASKFILE: { |
60ec0eec | 3538 | struct mtip_compat_ide_task_request_s __user *compat_req_task; |
ef0f1587 JA |
3539 | ide_task_request_t req_task; |
3540 | int compat_tasksize, outtotal, ret; | |
3541 | ||
60ec0eec AT |
3542 | compat_tasksize = |
3543 | sizeof(struct mtip_compat_ide_task_request_s); | |
ef0f1587 JA |
3544 | |
3545 | compat_req_task = | |
3546 | (struct mtip_compat_ide_task_request_s __user *) arg; | |
3547 | ||
3548 | if (copy_from_user(&req_task, (void __user *) arg, | |
60ec0eec | 3549 | compat_tasksize - (2 * sizeof(compat_long_t)))) |
ef0f1587 JA |
3550 | return -EFAULT; |
3551 | ||
3552 | if (get_user(req_task.out_size, &compat_req_task->out_size)) | |
3553 | return -EFAULT; | |
3554 | ||
3555 | if (get_user(req_task.in_size, &compat_req_task->in_size)) | |
3556 | return -EFAULT; | |
3557 | ||
3558 | outtotal = sizeof(struct mtip_compat_ide_task_request_s); | |
3559 | ||
3560 | ret = exec_drive_taskfile(dd, (void __user *) arg, | |
3561 | &req_task, outtotal); | |
3562 | ||
3563 | if (copy_to_user((void __user *) arg, &req_task, | |
3564 | compat_tasksize - | |
3565 | (2 * sizeof(compat_long_t)))) | |
3566 | return -EFAULT; | |
3567 | ||
3568 | if (put_user(req_task.out_size, &compat_req_task->out_size)) | |
3569 | return -EFAULT; | |
3570 | ||
3571 | if (put_user(req_task.in_size, &compat_req_task->in_size)) | |
3572 | return -EFAULT; | |
3573 | ||
3574 | return ret; | |
3575 | } | |
88523a61 | 3576 | default: |
ef0f1587 | 3577 | return mtip_hw_ioctl(dd, cmd, arg); |
88523a61 SB |
3578 | } |
3579 | } | |
16d02c04 | 3580 | #endif |
88523a61 SB |
3581 | |
3582 | /* | |
3583 | * Obtain the geometry of the device. | |
3584 | * | |
3585 | * You may think that this function is obsolete, but some applications, | |
3586 | * fdisk for example still used CHS values. This function describes the | |
3587 | * device as having 224 heads and 56 sectors per cylinder. These values are | |
3588 | * chosen so that each cylinder is aligned on a 4KB boundary. Since a | |
3589 | * partition is described in terms of a start and end cylinder this means | |
3590 | * that each partition is also 4KB aligned. Non-aligned partitions adversely | |
3591 | * affects performance. | |
3592 | * | |
3593 | * @dev Pointer to the block_device strucutre. | |
3594 | * @geo Pointer to a hd_geometry structure. | |
3595 | * | |
3596 | * return value | |
3597 | * 0 Operation completed successfully. | |
3598 | * -ENOTTY An error occurred while reading the drive capacity. | |
3599 | */ | |
3600 | static int mtip_block_getgeo(struct block_device *dev, | |
3601 | struct hd_geometry *geo) | |
3602 | { | |
3603 | struct driver_data *dd = dev->bd_disk->private_data; | |
3604 | sector_t capacity; | |
3605 | ||
3606 | if (!dd) | |
3607 | return -ENOTTY; | |
3608 | ||
3609 | if (!(mtip_hw_get_capacity(dd, &capacity))) { | |
3610 | dev_warn(&dd->pdev->dev, | |
3611 | "Could not get drive capacity.\n"); | |
3612 | return -ENOTTY; | |
3613 | } | |
3614 | ||
3615 | geo->heads = 224; | |
3616 | geo->sectors = 56; | |
60ec0eec | 3617 | sector_div(capacity, (geo->heads * geo->sectors)); |
88523a61 | 3618 | geo->cylinders = capacity; |
88523a61 SB |
3619 | return 0; |
3620 | } | |
3621 | ||
3622 | /* | |
3623 | * Block device operation function. | |
3624 | * | |
3625 | * This structure contains pointers to the functions required by the block | |
3626 | * layer. | |
3627 | */ | |
3628 | static const struct block_device_operations mtip_block_ops = { | |
3629 | .ioctl = mtip_block_ioctl, | |
16d02c04 | 3630 | #ifdef CONFIG_COMPAT |
88523a61 | 3631 | .compat_ioctl = mtip_block_compat_ioctl, |
16d02c04 | 3632 | #endif |
88523a61 SB |
3633 | .getgeo = mtip_block_getgeo, |
3634 | .owner = THIS_MODULE | |
3635 | }; | |
3636 | ||
3637 | /* | |
3638 | * Block layer make request function. | |
3639 | * | |
3640 | * This function is called by the kernel to process a BIO for | |
3641 | * the P320 device. | |
3642 | * | |
3643 | * @queue Pointer to the request queue. Unused other than to obtain | |
3644 | * the driver data structure. | |
3645 | * @bio Pointer to the BIO. | |
3646 | * | |
88523a61 | 3647 | */ |
a71f483d | 3648 | static void mtip_make_request(struct request_queue *queue, struct bio *bio) |
88523a61 SB |
3649 | { |
3650 | struct driver_data *dd = queue->queuedata; | |
3651 | struct scatterlist *sg; | |
3652 | struct bio_vec *bvec; | |
3653 | int nents = 0; | |
3654 | int tag = 0; | |
3655 | ||
c74b0f58 AT |
3656 | if (unlikely(dd->dd_flag & MTIP_DDF_STOP_IO)) { |
3657 | if (unlikely(test_bit(MTIP_DDF_REMOVE_PENDING_BIT, | |
3658 | &dd->dd_flag))) { | |
3659 | bio_endio(bio, -ENXIO); | |
3660 | return; | |
3661 | } | |
3662 | if (unlikely(test_bit(MTIP_DDF_OVER_TEMP_BIT, &dd->dd_flag))) { | |
3663 | bio_endio(bio, -ENODATA); | |
3664 | return; | |
3665 | } | |
3666 | if (unlikely(test_bit(MTIP_DDF_WRITE_PROTECT_BIT, | |
3667 | &dd->dd_flag) && | |
3668 | bio_data_dir(bio))) { | |
3669 | bio_endio(bio, -ENODATA); | |
3670 | return; | |
3671 | } | |
12a166c9 AT |
3672 | if (unlikely(test_bit(MTIP_DDF_SEC_LOCK_BIT, &dd->dd_flag))) { |
3673 | bio_endio(bio, -ENODATA); | |
3674 | return; | |
3675 | } | |
45038367 AT |
3676 | } |
3677 | ||
88523a61 SB |
3678 | if (unlikely(!bio_has_data(bio))) { |
3679 | blk_queue_flush(queue, 0); | |
3680 | bio_endio(bio, 0); | |
a71f483d | 3681 | return; |
88523a61 SB |
3682 | } |
3683 | ||
88523a61 SB |
3684 | sg = mtip_hw_get_scatterlist(dd, &tag); |
3685 | if (likely(sg != NULL)) { | |
3686 | blk_queue_bounce(queue, &bio); | |
3687 | ||
3688 | if (unlikely((bio)->bi_vcnt > MTIP_MAX_SG)) { | |
3689 | dev_warn(&dd->pdev->dev, | |
45038367 | 3690 | "Maximum number of SGL entries exceeded\n"); |
88523a61 SB |
3691 | bio_io_error(bio); |
3692 | mtip_hw_release_scatterlist(dd, tag); | |
a71f483d | 3693 | return; |
88523a61 SB |
3694 | } |
3695 | ||
3696 | /* Create the scatter list for this bio. */ | |
3697 | bio_for_each_segment(bvec, bio, nents) { | |
3698 | sg_set_page(&sg[nents], | |
3699 | bvec->bv_page, | |
3700 | bvec->bv_len, | |
3701 | bvec->bv_offset); | |
3702 | } | |
3703 | ||
3704 | /* Issue the read/write. */ | |
3705 | mtip_hw_submit_io(dd, | |
3706 | bio->bi_sector, | |
3707 | bio_sectors(bio), | |
3708 | nents, | |
3709 | tag, | |
3710 | bio_endio, | |
3711 | bio, | |
88523a61 | 3712 | bio_data_dir(bio)); |
a71f483d | 3713 | } else |
88523a61 | 3714 | bio_io_error(bio); |
88523a61 SB |
3715 | } |
3716 | ||
3717 | /* | |
3718 | * Block layer initialization function. | |
3719 | * | |
3720 | * This function is called once by the PCI layer for each P320 | |
3721 | * device that is connected to the system. | |
3722 | * | |
3723 | * @dd Pointer to the driver data structure. | |
3724 | * | |
3725 | * return value | |
3726 | * 0 on success else an error code. | |
3727 | */ | |
6316668f | 3728 | static int mtip_block_initialize(struct driver_data *dd) |
88523a61 | 3729 | { |
62ee8c13 | 3730 | int rv = 0, wait_for_rebuild = 0; |
88523a61 SB |
3731 | sector_t capacity; |
3732 | unsigned int index = 0; | |
3733 | struct kobject *kobj; | |
60ec0eec | 3734 | unsigned char thd_name[16]; |
88523a61 | 3735 | |
62ee8c13 AT |
3736 | if (dd->disk) |
3737 | goto skip_create_disk; /* hw init done, before rebuild */ | |
3738 | ||
88523a61 | 3739 | /* Initialize the protocol layer. */ |
62ee8c13 AT |
3740 | wait_for_rebuild = mtip_hw_init(dd); |
3741 | if (wait_for_rebuild < 0) { | |
88523a61 SB |
3742 | dev_err(&dd->pdev->dev, |
3743 | "Protocol layer initialization failed\n"); | |
3744 | rv = -EINVAL; | |
3745 | goto protocol_init_error; | |
3746 | } | |
3747 | ||
16c906e5 | 3748 | dd->disk = alloc_disk_node(MTIP_MAX_MINORS, dd->numa_node); |
88523a61 SB |
3749 | if (dd->disk == NULL) { |
3750 | dev_err(&dd->pdev->dev, | |
3751 | "Unable to allocate gendisk structure\n"); | |
3752 | rv = -EINVAL; | |
3753 | goto alloc_disk_error; | |
3754 | } | |
3755 | ||
3756 | /* Generate the disk name, implemented same as in sd.c */ | |
3757 | do { | |
3758 | if (!ida_pre_get(&rssd_index_ida, GFP_KERNEL)) | |
3759 | goto ida_get_error; | |
3760 | ||
3761 | spin_lock(&rssd_index_lock); | |
3762 | rv = ida_get_new(&rssd_index_ida, &index); | |
3763 | spin_unlock(&rssd_index_lock); | |
3764 | } while (rv == -EAGAIN); | |
3765 | ||
3766 | if (rv) | |
3767 | goto ida_get_error; | |
3768 | ||
3769 | rv = rssd_disk_name_format("rssd", | |
3770 | index, | |
3771 | dd->disk->disk_name, | |
3772 | DISK_NAME_LEN); | |
3773 | if (rv) | |
3774 | goto disk_index_error; | |
3775 | ||
3776 | dd->disk->driverfs_dev = &dd->pdev->dev; | |
3777 | dd->disk->major = dd->major; | |
3778 | dd->disk->first_minor = dd->instance * MTIP_MAX_MINORS; | |
3779 | dd->disk->fops = &mtip_block_ops; | |
88523a61 | 3780 | dd->disk->private_data = dd; |
88523a61 SB |
3781 | dd->index = index; |
3782 | ||
62ee8c13 AT |
3783 | /* |
3784 | * if rebuild pending, start the service thread, and delay the block | |
3785 | * queue creation and add_disk() | |
3786 | */ | |
3787 | if (wait_for_rebuild == MTIP_FTL_REBUILD_MAGIC) | |
3788 | goto start_service_thread; | |
3789 | ||
3790 | skip_create_disk: | |
3791 | /* Allocate the request queue. */ | |
16c906e5 | 3792 | dd->queue = blk_alloc_queue_node(GFP_KERNEL, dd->numa_node); |
62ee8c13 AT |
3793 | if (dd->queue == NULL) { |
3794 | dev_err(&dd->pdev->dev, | |
3795 | "Unable to allocate request queue\n"); | |
3796 | rv = -ENOMEM; | |
3797 | goto block_queue_alloc_init_error; | |
3798 | } | |
3799 | ||
3800 | /* Attach our request function to the request queue. */ | |
3801 | blk_queue_make_request(dd->queue, mtip_make_request); | |
3802 | ||
3803 | dd->disk->queue = dd->queue; | |
3804 | dd->queue->queuedata = dd; | |
3805 | ||
3806 | /* Set device limits. */ | |
3807 | set_bit(QUEUE_FLAG_NONROT, &dd->queue->queue_flags); | |
3808 | blk_queue_max_segments(dd->queue, MTIP_MAX_SG); | |
3809 | blk_queue_physical_block_size(dd->queue, 4096); | |
6c8ab698 AT |
3810 | blk_queue_max_hw_sectors(dd->queue, 0xffff); |
3811 | blk_queue_max_segment_size(dd->queue, 0x400000); | |
62ee8c13 | 3812 | blk_queue_io_min(dd->queue, 4096); |
6c8ab698 | 3813 | |
4e8670e2 AT |
3814 | /* |
3815 | * write back cache is not supported in the device. FUA depends on | |
3816 | * write back cache support, hence setting flush support to zero. | |
3817 | */ | |
62ee8c13 AT |
3818 | blk_queue_flush(dd->queue, 0); |
3819 | ||
88523a61 SB |
3820 | /* Set the capacity of the device in 512 byte sectors. */ |
3821 | if (!(mtip_hw_get_capacity(dd, &capacity))) { | |
3822 | dev_warn(&dd->pdev->dev, | |
3823 | "Could not read drive capacity\n"); | |
3824 | rv = -EIO; | |
3825 | goto read_capacity_error; | |
3826 | } | |
3827 | set_capacity(dd->disk, capacity); | |
3828 | ||
3829 | /* Enable the block device and add it to /dev */ | |
3830 | add_disk(dd->disk); | |
3831 | ||
3832 | /* | |
3833 | * Now that the disk is active, initialize any sysfs attributes | |
3834 | * managed by the protocol layer. | |
3835 | */ | |
3836 | kobj = kobject_get(&disk_to_dev(dd->disk)->kobj); | |
3837 | if (kobj) { | |
3838 | mtip_hw_sysfs_init(dd, kobj); | |
3839 | kobject_put(kobj); | |
3840 | } | |
7b421d24 | 3841 | mtip_hw_debugfs_init(dd); |
88523a61 | 3842 | |
45038367 | 3843 | if (dd->mtip_svc_handler) { |
8a857a88 | 3844 | set_bit(MTIP_DDF_INIT_DONE_BIT, &dd->dd_flag); |
62ee8c13 | 3845 | return rv; /* service thread created for handling rebuild */ |
45038367 | 3846 | } |
62ee8c13 AT |
3847 | |
3848 | start_service_thread: | |
60ec0eec | 3849 | sprintf(thd_name, "mtip_svc_thd_%02d", index); |
16c906e5 AT |
3850 | dd->mtip_svc_handler = kthread_create_on_node(mtip_service_thread, |
3851 | dd, dd->numa_node, thd_name); | |
60ec0eec AT |
3852 | |
3853 | if (IS_ERR(dd->mtip_svc_handler)) { | |
c74b0f58 | 3854 | dev_err(&dd->pdev->dev, "service thread failed to start\n"); |
60ec0eec AT |
3855 | dd->mtip_svc_handler = NULL; |
3856 | rv = -EFAULT; | |
62ee8c13 | 3857 | goto kthread_run_error; |
60ec0eec | 3858 | } |
16c906e5 | 3859 | wake_up_process(dd->mtip_svc_handler); |
45038367 AT |
3860 | if (wait_for_rebuild == MTIP_FTL_REBUILD_MAGIC) |
3861 | rv = wait_for_rebuild; | |
3862 | ||
88523a61 SB |
3863 | return rv; |
3864 | ||
62ee8c13 | 3865 | kthread_run_error: |
7b421d24 AT |
3866 | mtip_hw_debugfs_exit(dd); |
3867 | ||
62ee8c13 | 3868 | /* Delete our gendisk. This also removes the device from /dev */ |
88523a61 SB |
3869 | del_gendisk(dd->disk); |
3870 | ||
62ee8c13 AT |
3871 | read_capacity_error: |
3872 | blk_cleanup_queue(dd->queue); | |
3873 | ||
3874 | block_queue_alloc_init_error: | |
88523a61 SB |
3875 | disk_index_error: |
3876 | spin_lock(&rssd_index_lock); | |
3877 | ida_remove(&rssd_index_ida, index); | |
3878 | spin_unlock(&rssd_index_lock); | |
3879 | ||
3880 | ida_get_error: | |
3881 | put_disk(dd->disk); | |
3882 | ||
3883 | alloc_disk_error: | |
62ee8c13 | 3884 | mtip_hw_exit(dd); /* De-initialize the protocol layer. */ |
88523a61 SB |
3885 | |
3886 | protocol_init_error: | |
3887 | return rv; | |
3888 | } | |
3889 | ||
3890 | /* | |
3891 | * Block layer deinitialization function. | |
3892 | * | |
3893 | * Called by the PCI layer as each P320 device is removed. | |
3894 | * | |
3895 | * @dd Pointer to the driver data structure. | |
3896 | * | |
3897 | * return value | |
3898 | * 0 | |
3899 | */ | |
6316668f | 3900 | static int mtip_block_remove(struct driver_data *dd) |
88523a61 SB |
3901 | { |
3902 | struct kobject *kobj; | |
60ec0eec AT |
3903 | |
3904 | if (dd->mtip_svc_handler) { | |
c74b0f58 | 3905 | set_bit(MTIP_PF_SVC_THD_STOP_BIT, &dd->port->flags); |
60ec0eec AT |
3906 | wake_up_interruptible(&dd->port->svc_wait); |
3907 | kthread_stop(dd->mtip_svc_handler); | |
3908 | } | |
3909 | ||
f6587217 | 3910 | /* Clean up the sysfs attributes, if created */ |
8a857a88 | 3911 | if (test_bit(MTIP_DDF_INIT_DONE_BIT, &dd->dd_flag)) { |
45038367 AT |
3912 | kobj = kobject_get(&disk_to_dev(dd->disk)->kobj); |
3913 | if (kobj) { | |
3914 | mtip_hw_sysfs_exit(dd, kobj); | |
3915 | kobject_put(kobj); | |
3916 | } | |
88523a61 | 3917 | } |
7b421d24 | 3918 | mtip_hw_debugfs_exit(dd); |
88523a61 SB |
3919 | |
3920 | /* | |
3921 | * Delete our gendisk structure. This also removes the device | |
3922 | * from /dev | |
3923 | */ | |
3924 | del_gendisk(dd->disk); | |
8182b495 AT |
3925 | |
3926 | spin_lock(&rssd_index_lock); | |
3927 | ida_remove(&rssd_index_ida, dd->index); | |
3928 | spin_unlock(&rssd_index_lock); | |
3929 | ||
88523a61 SB |
3930 | blk_cleanup_queue(dd->queue); |
3931 | dd->disk = NULL; | |
3932 | dd->queue = NULL; | |
3933 | ||
3934 | /* De-initialize the protocol layer. */ | |
3935 | mtip_hw_exit(dd); | |
3936 | ||
3937 | return 0; | |
3938 | } | |
3939 | ||
3940 | /* | |
3941 | * Function called by the PCI layer when just before the | |
3942 | * machine shuts down. | |
3943 | * | |
3944 | * If a protocol layer shutdown function is present it will be called | |
3945 | * by this function. | |
3946 | * | |
3947 | * @dd Pointer to the driver data structure. | |
3948 | * | |
3949 | * return value | |
3950 | * 0 | |
3951 | */ | |
6316668f | 3952 | static int mtip_block_shutdown(struct driver_data *dd) |
88523a61 SB |
3953 | { |
3954 | dev_info(&dd->pdev->dev, | |
3955 | "Shutting down %s ...\n", dd->disk->disk_name); | |
3956 | ||
3957 | /* Delete our gendisk structure, and cleanup the blk queue. */ | |
3958 | del_gendisk(dd->disk); | |
8182b495 AT |
3959 | |
3960 | spin_lock(&rssd_index_lock); | |
3961 | ida_remove(&rssd_index_ida, dd->index); | |
3962 | spin_unlock(&rssd_index_lock); | |
3963 | ||
88523a61 SB |
3964 | blk_cleanup_queue(dd->queue); |
3965 | dd->disk = NULL; | |
3966 | dd->queue = NULL; | |
3967 | ||
3968 | mtip_hw_shutdown(dd); | |
3969 | return 0; | |
3970 | } | |
3971 | ||
6316668f | 3972 | static int mtip_block_suspend(struct driver_data *dd) |
88523a61 SB |
3973 | { |
3974 | dev_info(&dd->pdev->dev, | |
3975 | "Suspending %s ...\n", dd->disk->disk_name); | |
3976 | mtip_hw_suspend(dd); | |
3977 | return 0; | |
3978 | } | |
3979 | ||
6316668f | 3980 | static int mtip_block_resume(struct driver_data *dd) |
88523a61 SB |
3981 | { |
3982 | dev_info(&dd->pdev->dev, "Resuming %s ...\n", | |
3983 | dd->disk->disk_name); | |
3984 | mtip_hw_resume(dd); | |
3985 | return 0; | |
3986 | } | |
3987 | ||
16c906e5 AT |
3988 | static void drop_cpu(int cpu) |
3989 | { | |
3990 | cpu_use[cpu]--; | |
3991 | } | |
3992 | ||
3993 | static int get_least_used_cpu_on_node(int node) | |
3994 | { | |
3995 | int cpu, least_used_cpu, least_cnt; | |
3996 | const struct cpumask *node_mask; | |
3997 | ||
3998 | node_mask = cpumask_of_node(node); | |
3999 | least_used_cpu = cpumask_first(node_mask); | |
4000 | least_cnt = cpu_use[least_used_cpu]; | |
4001 | cpu = least_used_cpu; | |
4002 | ||
4003 | for_each_cpu(cpu, node_mask) { | |
4004 | if (cpu_use[cpu] < least_cnt) { | |
4005 | least_used_cpu = cpu; | |
4006 | least_cnt = cpu_use[cpu]; | |
4007 | } | |
4008 | } | |
4009 | cpu_use[least_used_cpu]++; | |
4010 | return least_used_cpu; | |
4011 | } | |
4012 | ||
4013 | /* Helper for selecting a node in round robin mode */ | |
4014 | static inline int mtip_get_next_rr_node(void) | |
4015 | { | |
4016 | static int next_node = -1; | |
4017 | ||
4018 | if (next_node == -1) { | |
4019 | next_node = first_online_node; | |
4020 | return next_node; | |
4021 | } | |
4022 | ||
4023 | next_node = next_online_node(next_node); | |
4024 | if (next_node == MAX_NUMNODES) | |
4025 | next_node = first_online_node; | |
4026 | return next_node; | |
4027 | } | |
4028 | ||
4029 | DEFINE_HANDLER(0); | |
4030 | DEFINE_HANDLER(1); | |
4031 | DEFINE_HANDLER(2); | |
4032 | DEFINE_HANDLER(3); | |
4033 | DEFINE_HANDLER(4); | |
4034 | DEFINE_HANDLER(5); | |
4035 | DEFINE_HANDLER(6); | |
4036 | DEFINE_HANDLER(7); | |
4037 | ||
88523a61 SB |
4038 | /* |
4039 | * Called for each supported PCI device detected. | |
4040 | * | |
4041 | * This function allocates the private data structure, enables the | |
4042 | * PCI device and then calls the block layer initialization function. | |
4043 | * | |
4044 | * return value | |
4045 | * 0 on success else an error code. | |
4046 | */ | |
4047 | static int mtip_pci_probe(struct pci_dev *pdev, | |
4048 | const struct pci_device_id *ent) | |
4049 | { | |
4050 | int rv = 0; | |
4051 | struct driver_data *dd = NULL; | |
16c906e5 AT |
4052 | char cpu_list[256]; |
4053 | const struct cpumask *node_mask; | |
4054 | int cpu, i = 0, j = 0; | |
4055 | int my_node = NUMA_NO_NODE; | |
88523a61 SB |
4056 | |
4057 | /* Allocate memory for this devices private data. */ | |
16c906e5 AT |
4058 | my_node = pcibus_to_node(pdev->bus); |
4059 | if (my_node != NUMA_NO_NODE) { | |
4060 | if (!node_online(my_node)) | |
4061 | my_node = mtip_get_next_rr_node(); | |
4062 | } else { | |
4063 | dev_info(&pdev->dev, "Kernel not reporting proximity, choosing a node\n"); | |
4064 | my_node = mtip_get_next_rr_node(); | |
4065 | } | |
4066 | dev_info(&pdev->dev, "NUMA node %d (closest: %d,%d, probe on %d:%d)\n", | |
4067 | my_node, pcibus_to_node(pdev->bus), dev_to_node(&pdev->dev), | |
4068 | cpu_to_node(smp_processor_id()), smp_processor_id()); | |
4069 | ||
4070 | dd = kzalloc_node(sizeof(struct driver_data), GFP_KERNEL, my_node); | |
88523a61 SB |
4071 | if (dd == NULL) { |
4072 | dev_err(&pdev->dev, | |
4073 | "Unable to allocate memory for driver data\n"); | |
4074 | return -ENOMEM; | |
4075 | } | |
4076 | ||
88523a61 SB |
4077 | /* Attach the private data to this PCI device. */ |
4078 | pci_set_drvdata(pdev, dd); | |
4079 | ||
4080 | rv = pcim_enable_device(pdev); | |
4081 | if (rv < 0) { | |
4082 | dev_err(&pdev->dev, "Unable to enable device\n"); | |
4083 | goto iomap_err; | |
4084 | } | |
4085 | ||
4086 | /* Map BAR5 to memory. */ | |
4087 | rv = pcim_iomap_regions(pdev, 1 << MTIP_ABAR, MTIP_DRV_NAME); | |
4088 | if (rv < 0) { | |
4089 | dev_err(&pdev->dev, "Unable to map regions\n"); | |
4090 | goto iomap_err; | |
4091 | } | |
4092 | ||
4093 | if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(64))) { | |
4094 | rv = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64)); | |
4095 | ||
4096 | if (rv) { | |
4097 | rv = pci_set_consistent_dma_mask(pdev, | |
4098 | DMA_BIT_MASK(32)); | |
4099 | if (rv) { | |
4100 | dev_warn(&pdev->dev, | |
4101 | "64-bit DMA enable failed\n"); | |
4102 | goto setmask_err; | |
4103 | } | |
4104 | } | |
4105 | } | |
4106 | ||
16c906e5 AT |
4107 | /* Copy the info we may need later into the private data structure. */ |
4108 | dd->major = mtip_major; | |
4109 | dd->instance = instance; | |
4110 | dd->pdev = pdev; | |
4111 | dd->numa_node = my_node; | |
4112 | ||
4113 | memset(dd->workq_name, 0, 32); | |
4114 | snprintf(dd->workq_name, 31, "mtipq%d", dd->instance); | |
88523a61 | 4115 | |
16c906e5 AT |
4116 | dd->isr_workq = create_workqueue(dd->workq_name); |
4117 | if (!dd->isr_workq) { | |
4118 | dev_warn(&pdev->dev, "Can't create wq %d\n", dd->instance); | |
4119 | goto block_initialize_err; | |
4120 | } | |
4121 | ||
4122 | memset(cpu_list, 0, sizeof(cpu_list)); | |
4123 | ||
4124 | node_mask = cpumask_of_node(dd->numa_node); | |
4125 | if (!cpumask_empty(node_mask)) { | |
4126 | for_each_cpu(cpu, node_mask) | |
4127 | { | |
4128 | snprintf(&cpu_list[j], 256 - j, "%d ", cpu); | |
4129 | j = strlen(cpu_list); | |
4130 | } | |
4131 | ||
4132 | dev_info(&pdev->dev, "Node %d on package %d has %d cpu(s): %s\n", | |
4133 | dd->numa_node, | |
4134 | topology_physical_package_id(cpumask_first(node_mask)), | |
4135 | nr_cpus_node(dd->numa_node), | |
4136 | cpu_list); | |
4137 | } else | |
4138 | dev_dbg(&pdev->dev, "mtip32xx: node_mask empty\n"); | |
4139 | ||
4140 | dd->isr_binding = get_least_used_cpu_on_node(dd->numa_node); | |
4141 | dev_info(&pdev->dev, "Initial IRQ binding node:cpu %d:%d\n", | |
4142 | cpu_to_node(dd->isr_binding), dd->isr_binding); | |
4143 | ||
4144 | /* first worker context always runs in ISR */ | |
4145 | dd->work[0].cpu_binding = dd->isr_binding; | |
4146 | dd->work[1].cpu_binding = get_least_used_cpu_on_node(dd->numa_node); | |
4147 | dd->work[2].cpu_binding = get_least_used_cpu_on_node(dd->numa_node); | |
4148 | dd->work[3].cpu_binding = dd->work[0].cpu_binding; | |
4149 | dd->work[4].cpu_binding = dd->work[1].cpu_binding; | |
4150 | dd->work[5].cpu_binding = dd->work[2].cpu_binding; | |
4151 | dd->work[6].cpu_binding = dd->work[2].cpu_binding; | |
4152 | dd->work[7].cpu_binding = dd->work[1].cpu_binding; | |
4153 | ||
4154 | /* Log the bindings */ | |
4155 | for_each_present_cpu(cpu) { | |
4156 | memset(cpu_list, 0, sizeof(cpu_list)); | |
4157 | for (i = 0, j = 0; i < MTIP_MAX_SLOT_GROUPS; i++) { | |
4158 | if (dd->work[i].cpu_binding == cpu) { | |
4159 | snprintf(&cpu_list[j], 256 - j, "%d ", i); | |
4160 | j = strlen(cpu_list); | |
4161 | } | |
4162 | } | |
4163 | if (j) | |
4164 | dev_info(&pdev->dev, "CPU %d: WQs %s\n", cpu, cpu_list); | |
4165 | } | |
4166 | ||
4167 | INIT_WORK(&dd->work[0].work, mtip_workq_sdbf0); | |
4168 | INIT_WORK(&dd->work[1].work, mtip_workq_sdbf1); | |
4169 | INIT_WORK(&dd->work[2].work, mtip_workq_sdbf2); | |
4170 | INIT_WORK(&dd->work[3].work, mtip_workq_sdbf3); | |
4171 | INIT_WORK(&dd->work[4].work, mtip_workq_sdbf4); | |
4172 | INIT_WORK(&dd->work[5].work, mtip_workq_sdbf5); | |
4173 | INIT_WORK(&dd->work[6].work, mtip_workq_sdbf6); | |
4174 | INIT_WORK(&dd->work[7].work, mtip_workq_sdbf7); | |
4175 | ||
4176 | pci_set_master(pdev); | |
88523a61 SB |
4177 | if (pci_enable_msi(pdev)) { |
4178 | dev_warn(&pdev->dev, | |
4179 | "Unable to enable MSI interrupt.\n"); | |
4180 | goto block_initialize_err; | |
4181 | } | |
4182 | ||
88523a61 SB |
4183 | /* Initialize the block layer. */ |
4184 | rv = mtip_block_initialize(dd); | |
4185 | if (rv < 0) { | |
4186 | dev_err(&pdev->dev, | |
4187 | "Unable to initialize block layer\n"); | |
4188 | goto block_initialize_err; | |
4189 | } | |
4190 | ||
4191 | /* | |
4192 | * Increment the instance count so that each device has a unique | |
4193 | * instance number. | |
4194 | */ | |
4195 | instance++; | |
45038367 | 4196 | if (rv != MTIP_FTL_REBUILD_MAGIC) |
8a857a88 | 4197 | set_bit(MTIP_DDF_INIT_DONE_BIT, &dd->dd_flag); |
88523a61 SB |
4198 | goto done; |
4199 | ||
4200 | block_initialize_err: | |
4201 | pci_disable_msi(pdev); | |
16c906e5 AT |
4202 | if (dd->isr_workq) { |
4203 | flush_workqueue(dd->isr_workq); | |
4204 | destroy_workqueue(dd->isr_workq); | |
4205 | drop_cpu(dd->work[0].cpu_binding); | |
4206 | drop_cpu(dd->work[1].cpu_binding); | |
4207 | drop_cpu(dd->work[2].cpu_binding); | |
4208 | } | |
88523a61 SB |
4209 | setmask_err: |
4210 | pcim_iounmap_regions(pdev, 1 << MTIP_ABAR); | |
4211 | ||
4212 | iomap_err: | |
4213 | kfree(dd); | |
4214 | pci_set_drvdata(pdev, NULL); | |
4215 | return rv; | |
4216 | done: | |
88523a61 SB |
4217 | return rv; |
4218 | } | |
4219 | ||
4220 | /* | |
4221 | * Called for each probed device when the device is removed or the | |
4222 | * driver is unloaded. | |
4223 | * | |
4224 | * return value | |
4225 | * None | |
4226 | */ | |
4227 | static void mtip_pci_remove(struct pci_dev *pdev) | |
4228 | { | |
4229 | struct driver_data *dd = pci_get_drvdata(pdev); | |
4230 | int counter = 0; | |
4231 | ||
8a857a88 | 4232 | set_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag); |
45038367 | 4233 | |
88523a61 | 4234 | if (mtip_check_surprise_removal(pdev)) { |
8a857a88 | 4235 | while (!test_bit(MTIP_DDF_CLEANUP_BIT, &dd->dd_flag)) { |
88523a61 SB |
4236 | counter++; |
4237 | msleep(20); | |
4238 | if (counter == 10) { | |
4239 | /* Cleanup the outstanding commands */ | |
4240 | mtip_command_cleanup(dd); | |
4241 | break; | |
4242 | } | |
4243 | } | |
4244 | } | |
88523a61 SB |
4245 | |
4246 | /* Clean up the block layer. */ | |
4247 | mtip_block_remove(dd); | |
4248 | ||
16c906e5 AT |
4249 | if (dd->isr_workq) { |
4250 | flush_workqueue(dd->isr_workq); | |
4251 | destroy_workqueue(dd->isr_workq); | |
4252 | drop_cpu(dd->work[0].cpu_binding); | |
4253 | drop_cpu(dd->work[1].cpu_binding); | |
4254 | drop_cpu(dd->work[2].cpu_binding); | |
4255 | } | |
4256 | ||
88523a61 SB |
4257 | pci_disable_msi(pdev); |
4258 | ||
4259 | kfree(dd); | |
4260 | pcim_iounmap_regions(pdev, 1 << MTIP_ABAR); | |
4261 | } | |
4262 | ||
4263 | /* | |
4264 | * Called for each probed device when the device is suspended. | |
4265 | * | |
4266 | * return value | |
4267 | * 0 Success | |
4268 | * <0 Error | |
4269 | */ | |
4270 | static int mtip_pci_suspend(struct pci_dev *pdev, pm_message_t mesg) | |
4271 | { | |
4272 | int rv = 0; | |
4273 | struct driver_data *dd = pci_get_drvdata(pdev); | |
4274 | ||
4275 | if (!dd) { | |
4276 | dev_err(&pdev->dev, | |
4277 | "Driver private datastructure is NULL\n"); | |
4278 | return -EFAULT; | |
4279 | } | |
4280 | ||
8a857a88 | 4281 | set_bit(MTIP_DDF_RESUME_BIT, &dd->dd_flag); |
88523a61 SB |
4282 | |
4283 | /* Disable ports & interrupts then send standby immediate */ | |
4284 | rv = mtip_block_suspend(dd); | |
4285 | if (rv < 0) { | |
4286 | dev_err(&pdev->dev, | |
4287 | "Failed to suspend controller\n"); | |
4288 | return rv; | |
4289 | } | |
4290 | ||
4291 | /* | |
4292 | * Save the pci config space to pdev structure & | |
4293 | * disable the device | |
4294 | */ | |
4295 | pci_save_state(pdev); | |
4296 | pci_disable_device(pdev); | |
4297 | ||
4298 | /* Move to Low power state*/ | |
4299 | pci_set_power_state(pdev, PCI_D3hot); | |
4300 | ||
4301 | return rv; | |
4302 | } | |
4303 | ||
4304 | /* | |
4305 | * Called for each probed device when the device is resumed. | |
4306 | * | |
4307 | * return value | |
4308 | * 0 Success | |
4309 | * <0 Error | |
4310 | */ | |
4311 | static int mtip_pci_resume(struct pci_dev *pdev) | |
4312 | { | |
4313 | int rv = 0; | |
4314 | struct driver_data *dd; | |
4315 | ||
4316 | dd = pci_get_drvdata(pdev); | |
4317 | if (!dd) { | |
4318 | dev_err(&pdev->dev, | |
4319 | "Driver private datastructure is NULL\n"); | |
4320 | return -EFAULT; | |
4321 | } | |
4322 | ||
4323 | /* Move the device to active State */ | |
4324 | pci_set_power_state(pdev, PCI_D0); | |
4325 | ||
4326 | /* Restore PCI configuration space */ | |
4327 | pci_restore_state(pdev); | |
4328 | ||
4329 | /* Enable the PCI device*/ | |
4330 | rv = pcim_enable_device(pdev); | |
4331 | if (rv < 0) { | |
4332 | dev_err(&pdev->dev, | |
4333 | "Failed to enable card during resume\n"); | |
4334 | goto err; | |
4335 | } | |
4336 | pci_set_master(pdev); | |
4337 | ||
4338 | /* | |
4339 | * Calls hbaReset, initPort, & startPort function | |
4340 | * then enables interrupts | |
4341 | */ | |
4342 | rv = mtip_block_resume(dd); | |
4343 | if (rv < 0) | |
4344 | dev_err(&pdev->dev, "Unable to resume\n"); | |
4345 | ||
4346 | err: | |
8a857a88 | 4347 | clear_bit(MTIP_DDF_RESUME_BIT, &dd->dd_flag); |
88523a61 SB |
4348 | |
4349 | return rv; | |
4350 | } | |
4351 | ||
4352 | /* | |
4353 | * Shutdown routine | |
4354 | * | |
4355 | * return value | |
4356 | * None | |
4357 | */ | |
4358 | static void mtip_pci_shutdown(struct pci_dev *pdev) | |
4359 | { | |
4360 | struct driver_data *dd = pci_get_drvdata(pdev); | |
4361 | if (dd) | |
4362 | mtip_block_shutdown(dd); | |
4363 | } | |
4364 | ||
88523a61 SB |
4365 | /* Table of device ids supported by this driver. */ |
4366 | static DEFINE_PCI_DEVICE_TABLE(mtip_pci_tbl) = { | |
1a131458 AT |
4367 | { PCI_DEVICE(PCI_VENDOR_ID_MICRON, P320H_DEVICE_ID) }, |
4368 | { PCI_DEVICE(PCI_VENDOR_ID_MICRON, P320M_DEVICE_ID) }, | |
4369 | { PCI_DEVICE(PCI_VENDOR_ID_MICRON, P320S_DEVICE_ID) }, | |
4370 | { PCI_DEVICE(PCI_VENDOR_ID_MICRON, P325M_DEVICE_ID) }, | |
4371 | { PCI_DEVICE(PCI_VENDOR_ID_MICRON, P420H_DEVICE_ID) }, | |
4372 | { PCI_DEVICE(PCI_VENDOR_ID_MICRON, P420M_DEVICE_ID) }, | |
4373 | { PCI_DEVICE(PCI_VENDOR_ID_MICRON, P425M_DEVICE_ID) }, | |
88523a61 SB |
4374 | { 0 } |
4375 | }; | |
4376 | ||
4377 | /* Structure that describes the PCI driver functions. */ | |
3ff147d3 | 4378 | static struct pci_driver mtip_pci_driver = { |
88523a61 SB |
4379 | .name = MTIP_DRV_NAME, |
4380 | .id_table = mtip_pci_tbl, | |
4381 | .probe = mtip_pci_probe, | |
4382 | .remove = mtip_pci_remove, | |
4383 | .suspend = mtip_pci_suspend, | |
4384 | .resume = mtip_pci_resume, | |
4385 | .shutdown = mtip_pci_shutdown, | |
4386 | }; | |
4387 | ||
4388 | MODULE_DEVICE_TABLE(pci, mtip_pci_tbl); | |
4389 | ||
4390 | /* | |
4391 | * Module initialization function. | |
4392 | * | |
4393 | * Called once when the module is loaded. This function allocates a major | |
4394 | * block device number to the Cyclone devices and registers the PCI layer | |
4395 | * of the driver. | |
4396 | * | |
4397 | * Return value | |
4398 | * 0 on success else error code. | |
4399 | */ | |
4400 | static int __init mtip_init(void) | |
4401 | { | |
6d27f09a RS |
4402 | int error; |
4403 | ||
45422e74 | 4404 | pr_info(MTIP_DRV_NAME " Version " MTIP_DRV_VERSION "\n"); |
88523a61 SB |
4405 | |
4406 | /* Allocate a major block device number to use with this driver. */ | |
6d27f09a RS |
4407 | error = register_blkdev(0, MTIP_DRV_NAME); |
4408 | if (error <= 0) { | |
45422e74 | 4409 | pr_err("Unable to register block device (%d)\n", |
6d27f09a | 4410 | error); |
88523a61 SB |
4411 | return -EBUSY; |
4412 | } | |
6d27f09a | 4413 | mtip_major = error; |
88523a61 | 4414 | |
7b421d24 AT |
4415 | if (!dfs_parent) { |
4416 | dfs_parent = debugfs_create_dir("rssd", NULL); | |
4417 | if (IS_ERR_OR_NULL(dfs_parent)) { | |
45422e74 | 4418 | pr_warn("Error creating debugfs parent\n"); |
7b421d24 AT |
4419 | dfs_parent = NULL; |
4420 | } | |
4421 | } | |
4422 | ||
88523a61 | 4423 | /* Register our PCI operations. */ |
6d27f09a | 4424 | error = pci_register_driver(&mtip_pci_driver); |
7b421d24 AT |
4425 | if (error) { |
4426 | debugfs_remove(dfs_parent); | |
6d27f09a | 4427 | unregister_blkdev(mtip_major, MTIP_DRV_NAME); |
7b421d24 | 4428 | } |
6d27f09a RS |
4429 | |
4430 | return error; | |
88523a61 SB |
4431 | } |
4432 | ||
4433 | /* | |
4434 | * Module de-initialization function. | |
4435 | * | |
4436 | * Called once when the module is unloaded. This function deallocates | |
4437 | * the major block device number allocated by mtip_init() and | |
4438 | * unregisters the PCI layer of the driver. | |
4439 | * | |
4440 | * Return value | |
4441 | * none | |
4442 | */ | |
4443 | static void __exit mtip_exit(void) | |
4444 | { | |
7b421d24 AT |
4445 | debugfs_remove_recursive(dfs_parent); |
4446 | ||
88523a61 SB |
4447 | /* Release the allocated major block device number. */ |
4448 | unregister_blkdev(mtip_major, MTIP_DRV_NAME); | |
4449 | ||
4450 | /* Unregister the PCI driver. */ | |
4451 | pci_unregister_driver(&mtip_pci_driver); | |
4452 | } | |
4453 | ||
4454 | MODULE_AUTHOR("Micron Technology, Inc"); | |
4455 | MODULE_DESCRIPTION("Micron RealSSD PCIe Block Driver"); | |
4456 | MODULE_LICENSE("GPL"); | |
4457 | MODULE_VERSION(MTIP_DRV_VERSION); | |
4458 | ||
4459 | module_init(mtip_init); | |
4460 | module_exit(mtip_exit); |