]>
Commit | Line | Data |
---|---|---|
88523a61 SB |
1 | /* |
2 | * Driver for the Micron P320 SSD | |
3 | * Copyright (C) 2011 Micron Technology, Inc. | |
4 | * | |
5 | * Portions of this code were derived from works subjected to the | |
6 | * following copyright: | |
7 | * Copyright (C) 2009 Integrated Device Technology, Inc. | |
8 | * | |
9 | * This program is free software; you can redistribute it and/or modify | |
10 | * it under the terms of the GNU General Public License as published by | |
11 | * the Free Software Foundation; either version 2 of the License, or | |
12 | * (at your option) any later version. | |
13 | * | |
14 | * This program is distributed in the hope that it will be useful, | |
15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
17 | * GNU General Public License for more details. | |
18 | * | |
19 | */ | |
20 | ||
21 | #include <linux/pci.h> | |
22 | #include <linux/interrupt.h> | |
23 | #include <linux/ata.h> | |
24 | #include <linux/delay.h> | |
25 | #include <linux/hdreg.h> | |
26 | #include <linux/uaccess.h> | |
27 | #include <linux/random.h> | |
28 | #include <linux/smp.h> | |
29 | #include <linux/compat.h> | |
30 | #include <linux/fs.h> | |
0e838c62 | 31 | #include <linux/module.h> |
88523a61 SB |
32 | #include <linux/genhd.h> |
33 | #include <linux/blkdev.h> | |
34 | #include <linux/bio.h> | |
35 | #include <linux/dma-mapping.h> | |
36 | #include <linux/idr.h> | |
60ec0eec | 37 | #include <linux/kthread.h> |
88523a61 SB |
38 | #include <../drivers/ata/ahci.h> |
39 | #include "mtip32xx.h" | |
40 | ||
41 | #define HW_CMD_SLOT_SZ (MTIP_MAX_COMMAND_SLOTS * 32) | |
42 | #define HW_CMD_TBL_SZ (AHCI_CMD_TBL_HDR_SZ + (MTIP_MAX_SG * 16)) | |
43 | #define HW_CMD_TBL_AR_SZ (HW_CMD_TBL_SZ * MTIP_MAX_COMMAND_SLOTS) | |
44 | #define HW_PORT_PRIV_DMA_SZ \ | |
45 | (HW_CMD_SLOT_SZ + HW_CMD_TBL_AR_SZ + AHCI_RX_FIS_SZ) | |
46 | ||
47 | #define HOST_HSORG 0xFC | |
48 | #define HSORG_DISABLE_SLOTGRP_INTR (1<<24) | |
49 | #define HSORG_DISABLE_SLOTGRP_PXIS (1<<16) | |
50 | #define HSORG_HWREV 0xFF00 | |
51 | #define HSORG_STYLE 0x8 | |
52 | #define HSORG_SLOTGROUPS 0x7 | |
53 | ||
54 | #define PORT_COMMAND_ISSUE 0x38 | |
55 | #define PORT_SDBV 0x7C | |
56 | ||
57 | #define PORT_OFFSET 0x100 | |
58 | #define PORT_MEM_SIZE 0x80 | |
59 | ||
60 | #define PORT_IRQ_ERR \ | |
61 | (PORT_IRQ_HBUS_ERR | PORT_IRQ_IF_ERR | PORT_IRQ_CONNECT | \ | |
62 | PORT_IRQ_PHYRDY | PORT_IRQ_UNK_FIS | PORT_IRQ_BAD_PMP | \ | |
63 | PORT_IRQ_TF_ERR | PORT_IRQ_HBUS_DATA_ERR | PORT_IRQ_IF_NONFATAL | \ | |
64 | PORT_IRQ_OVERFLOW) | |
65 | #define PORT_IRQ_LEGACY \ | |
66 | (PORT_IRQ_PIOS_FIS | PORT_IRQ_D2H_REG_FIS) | |
67 | #define PORT_IRQ_HANDLED \ | |
68 | (PORT_IRQ_SDB_FIS | PORT_IRQ_LEGACY | \ | |
69 | PORT_IRQ_TF_ERR | PORT_IRQ_IF_ERR | \ | |
70 | PORT_IRQ_CONNECT | PORT_IRQ_PHYRDY) | |
71 | #define DEF_PORT_IRQ \ | |
72 | (PORT_IRQ_ERR | PORT_IRQ_LEGACY | PORT_IRQ_SDB_FIS) | |
73 | ||
74 | /* product numbers */ | |
75 | #define MTIP_PRODUCT_UNKNOWN 0x00 | |
76 | #define MTIP_PRODUCT_ASICFPGA 0x11 | |
77 | ||
78 | /* Device instance number, incremented each time a device is probed. */ | |
79 | static int instance; | |
80 | ||
81 | /* | |
82 | * Global variable used to hold the major block device number | |
83 | * allocated in mtip_init(). | |
84 | */ | |
3ff147d3 | 85 | static int mtip_major; |
88523a61 SB |
86 | |
87 | static DEFINE_SPINLOCK(rssd_index_lock); | |
88 | static DEFINE_IDA(rssd_index_ida); | |
89 | ||
16d02c04 | 90 | #ifdef CONFIG_COMPAT |
88523a61 SB |
91 | struct mtip_compat_ide_task_request_s { |
92 | __u8 io_ports[8]; | |
93 | __u8 hob_ports[8]; | |
94 | ide_reg_valid_t out_flags; | |
95 | ide_reg_valid_t in_flags; | |
96 | int data_phase; | |
97 | int req_cmd; | |
98 | compat_ulong_t out_size; | |
99 | compat_ulong_t in_size; | |
100 | }; | |
16d02c04 | 101 | #endif |
88523a61 | 102 | |
6316668f JA |
103 | /* |
104 | * This function check_for_surprise_removal is called | |
105 | * while card is removed from the system and it will | |
106 | * read the vendor id from the configration space | |
107 | * | |
108 | * @pdev Pointer to the pci_dev structure. | |
109 | * | |
110 | * return value | |
111 | * true if device removed, else false | |
112 | */ | |
113 | static bool mtip_check_surprise_removal(struct pci_dev *pdev) | |
114 | { | |
115 | u16 vendor_id = 0; | |
116 | ||
117 | /* Read the vendorID from the configuration space */ | |
118 | pci_read_config_word(pdev, 0x00, &vendor_id); | |
119 | if (vendor_id == 0xFFFF) | |
120 | return true; /* device removed */ | |
121 | ||
122 | return false; /* device present */ | |
123 | } | |
124 | ||
125 | /* | |
126 | * This function is called for clean the pending command in the | |
127 | * command slot during the surprise removal of device and return | |
128 | * error to the upper layer. | |
129 | * | |
130 | * @dd Pointer to the DRIVER_DATA structure. | |
131 | * | |
132 | * return value | |
133 | * None | |
134 | */ | |
135 | static void mtip_command_cleanup(struct driver_data *dd) | |
136 | { | |
137 | int group = 0, commandslot = 0, commandindex = 0; | |
138 | struct mtip_cmd *command; | |
139 | struct mtip_port *port = dd->port; | |
140 | ||
141 | for (group = 0; group < 4; group++) { | |
142 | for (commandslot = 0; commandslot < 32; commandslot++) { | |
143 | if (!(port->allocated[group] & (1 << commandslot))) | |
144 | continue; | |
145 | ||
146 | commandindex = group << 5 | commandslot; | |
147 | command = &port->commands[commandindex]; | |
148 | ||
149 | if (atomic_read(&command->active) | |
150 | && (command->async_callback)) { | |
151 | command->async_callback(command->async_data, | |
152 | -ENODEV); | |
153 | command->async_callback = NULL; | |
154 | command->async_data = NULL; | |
155 | } | |
156 | ||
157 | dma_unmap_sg(&port->dd->pdev->dev, | |
158 | command->sg, | |
159 | command->scatter_ents, | |
160 | command->direction); | |
161 | } | |
162 | } | |
163 | ||
164 | up(&port->cmd_slot); | |
165 | ||
166 | atomic_set(&dd->drv_cleanup_done, true); | |
167 | } | |
168 | ||
88523a61 SB |
169 | /* |
170 | * Obtain an empty command slot. | |
171 | * | |
172 | * This function needs to be reentrant since it could be called | |
173 | * at the same time on multiple CPUs. The allocation of the | |
174 | * command slot must be atomic. | |
175 | * | |
176 | * @port Pointer to the port data structure. | |
177 | * | |
178 | * return value | |
179 | * >= 0 Index of command slot obtained. | |
180 | * -1 No command slots available. | |
181 | */ | |
182 | static int get_slot(struct mtip_port *port) | |
183 | { | |
184 | int slot, i; | |
185 | unsigned int num_command_slots = port->dd->slot_groups * 32; | |
186 | ||
187 | /* | |
188 | * Try 10 times, because there is a small race here. | |
189 | * that's ok, because it's still cheaper than a lock. | |
190 | * | |
191 | * Race: Since this section is not protected by lock, same bit | |
192 | * could be chosen by different process contexts running in | |
193 | * different processor. So instead of costly lock, we are going | |
194 | * with loop. | |
195 | */ | |
196 | for (i = 0; i < 10; i++) { | |
197 | slot = find_next_zero_bit(port->allocated, | |
198 | num_command_slots, 1); | |
199 | if ((slot < num_command_slots) && | |
200 | (!test_and_set_bit(slot, port->allocated))) | |
201 | return slot; | |
202 | } | |
203 | dev_warn(&port->dd->pdev->dev, "Failed to get a tag.\n"); | |
204 | ||
205 | if (mtip_check_surprise_removal(port->dd->pdev)) { | |
206 | /* Device not present, clean outstanding commands */ | |
207 | mtip_command_cleanup(port->dd); | |
208 | } | |
209 | return -1; | |
210 | } | |
211 | ||
212 | /* | |
213 | * Release a command slot. | |
214 | * | |
215 | * @port Pointer to the port data structure. | |
216 | * @tag Tag of command to release | |
217 | * | |
218 | * return value | |
219 | * None | |
220 | */ | |
221 | static inline void release_slot(struct mtip_port *port, int tag) | |
222 | { | |
223 | smp_mb__before_clear_bit(); | |
224 | clear_bit(tag, port->allocated); | |
225 | smp_mb__after_clear_bit(); | |
226 | } | |
227 | ||
228 | /* | |
6316668f | 229 | * Reset the HBA (without sleeping) |
88523a61 | 230 | * |
6316668f JA |
231 | * Just like hba_reset, except does not call sleep, so can be |
232 | * run from interrupt/tasklet context. | |
88523a61 | 233 | * |
6316668f | 234 | * @dd Pointer to the driver data structure. |
88523a61 SB |
235 | * |
236 | * return value | |
6316668f JA |
237 | * 0 The reset was successful. |
238 | * -1 The HBA Reset bit did not clear. | |
88523a61 | 239 | */ |
6316668f | 240 | static int hba_reset_nosleep(struct driver_data *dd) |
88523a61 | 241 | { |
6316668f | 242 | unsigned long timeout; |
88523a61 | 243 | |
6316668f JA |
244 | /* Chip quirk: quiesce any chip function */ |
245 | mdelay(10); | |
88523a61 | 246 | |
6316668f JA |
247 | /* Set the reset bit */ |
248 | writel(HOST_RESET, dd->mmio + HOST_CTL); | |
88523a61 | 249 | |
6316668f JA |
250 | /* Flush */ |
251 | readl(dd->mmio + HOST_CTL); | |
88523a61 | 252 | |
6316668f JA |
253 | /* |
254 | * Wait 10ms then spin for up to 1 second | |
255 | * waiting for reset acknowledgement | |
256 | */ | |
257 | timeout = jiffies + msecs_to_jiffies(1000); | |
258 | mdelay(10); | |
259 | while ((readl(dd->mmio + HOST_CTL) & HOST_RESET) | |
260 | && time_before(jiffies, timeout)) | |
261 | mdelay(1); | |
88523a61 | 262 | |
6316668f JA |
263 | if (readl(dd->mmio + HOST_CTL) & HOST_RESET) |
264 | return -1; | |
88523a61 | 265 | |
6316668f | 266 | return 0; |
88523a61 SB |
267 | } |
268 | ||
269 | /* | |
6316668f | 270 | * Issue a command to the hardware. |
88523a61 | 271 | * |
6316668f JA |
272 | * Set the appropriate bit in the s_active and Command Issue hardware |
273 | * registers, causing hardware command processing to begin. | |
88523a61 | 274 | * |
6316668f JA |
275 | * @port Pointer to the port structure. |
276 | * @tag The tag of the command to be issued. | |
88523a61 SB |
277 | * |
278 | * return value | |
6316668f | 279 | * None |
88523a61 | 280 | */ |
6316668f | 281 | static inline void mtip_issue_ncq_command(struct mtip_port *port, int tag) |
88523a61 | 282 | { |
6316668f | 283 | unsigned long flags = 0; |
88523a61 | 284 | |
6316668f | 285 | atomic_set(&port->commands[tag].active, 1); |
88523a61 | 286 | |
6316668f | 287 | spin_lock_irqsave(&port->cmd_issue_lock, flags); |
88523a61 | 288 | |
6316668f JA |
289 | writel((1 << MTIP_TAG_BIT(tag)), |
290 | port->s_active[MTIP_TAG_INDEX(tag)]); | |
291 | writel((1 << MTIP_TAG_BIT(tag)), | |
292 | port->cmd_issue[MTIP_TAG_INDEX(tag)]); | |
88523a61 | 293 | |
6316668f | 294 | spin_unlock_irqrestore(&port->cmd_issue_lock, flags); |
88523a61 SB |
295 | } |
296 | ||
297 | /* | |
298 | * Enable/disable the reception of FIS | |
299 | * | |
300 | * @port Pointer to the port data structure | |
301 | * @enable 1 to enable, 0 to disable | |
302 | * | |
303 | * return value | |
304 | * Previous state: 1 enabled, 0 disabled | |
305 | */ | |
306 | static int mtip_enable_fis(struct mtip_port *port, int enable) | |
307 | { | |
308 | u32 tmp; | |
309 | ||
310 | /* enable FIS reception */ | |
311 | tmp = readl(port->mmio + PORT_CMD); | |
312 | if (enable) | |
313 | writel(tmp | PORT_CMD_FIS_RX, port->mmio + PORT_CMD); | |
314 | else | |
315 | writel(tmp & ~PORT_CMD_FIS_RX, port->mmio + PORT_CMD); | |
316 | ||
317 | /* Flush */ | |
318 | readl(port->mmio + PORT_CMD); | |
319 | ||
320 | return (((tmp & PORT_CMD_FIS_RX) == PORT_CMD_FIS_RX)); | |
321 | } | |
322 | ||
323 | /* | |
324 | * Enable/disable the DMA engine | |
325 | * | |
326 | * @port Pointer to the port data structure | |
327 | * @enable 1 to enable, 0 to disable | |
328 | * | |
329 | * return value | |
330 | * Previous state: 1 enabled, 0 disabled. | |
331 | */ | |
332 | static int mtip_enable_engine(struct mtip_port *port, int enable) | |
333 | { | |
334 | u32 tmp; | |
335 | ||
336 | /* enable FIS reception */ | |
337 | tmp = readl(port->mmio + PORT_CMD); | |
338 | if (enable) | |
339 | writel(tmp | PORT_CMD_START, port->mmio + PORT_CMD); | |
340 | else | |
341 | writel(tmp & ~PORT_CMD_START, port->mmio + PORT_CMD); | |
342 | ||
343 | readl(port->mmio + PORT_CMD); | |
344 | return (((tmp & PORT_CMD_START) == PORT_CMD_START)); | |
345 | } | |
346 | ||
347 | /* | |
348 | * Enables the port DMA engine and FIS reception. | |
349 | * | |
350 | * return value | |
351 | * None | |
352 | */ | |
353 | static inline void mtip_start_port(struct mtip_port *port) | |
354 | { | |
355 | /* Enable FIS reception */ | |
356 | mtip_enable_fis(port, 1); | |
357 | ||
358 | /* Enable the DMA engine */ | |
359 | mtip_enable_engine(port, 1); | |
360 | } | |
361 | ||
362 | /* | |
363 | * Deinitialize a port by disabling port interrupts, the DMA engine, | |
364 | * and FIS reception. | |
365 | * | |
366 | * @port Pointer to the port structure | |
367 | * | |
368 | * return value | |
369 | * None | |
370 | */ | |
371 | static inline void mtip_deinit_port(struct mtip_port *port) | |
372 | { | |
373 | /* Disable interrupts on this port */ | |
374 | writel(0, port->mmio + PORT_IRQ_MASK); | |
375 | ||
376 | /* Disable the DMA engine */ | |
377 | mtip_enable_engine(port, 0); | |
378 | ||
379 | /* Disable FIS reception */ | |
380 | mtip_enable_fis(port, 0); | |
381 | } | |
382 | ||
383 | /* | |
384 | * Initialize a port. | |
385 | * | |
386 | * This function deinitializes the port by calling mtip_deinit_port() and | |
387 | * then initializes it by setting the command header and RX FIS addresses, | |
388 | * clearing the SError register and any pending port interrupts before | |
389 | * re-enabling the default set of port interrupts. | |
390 | * | |
391 | * @port Pointer to the port structure. | |
392 | * | |
393 | * return value | |
394 | * None | |
395 | */ | |
396 | static void mtip_init_port(struct mtip_port *port) | |
397 | { | |
398 | int i; | |
399 | mtip_deinit_port(port); | |
400 | ||
401 | /* Program the command list base and FIS base addresses */ | |
402 | if (readl(port->dd->mmio + HOST_CAP) & HOST_CAP_64) { | |
403 | writel((port->command_list_dma >> 16) >> 16, | |
404 | port->mmio + PORT_LST_ADDR_HI); | |
405 | writel((port->rxfis_dma >> 16) >> 16, | |
406 | port->mmio + PORT_FIS_ADDR_HI); | |
407 | } | |
408 | ||
60ec0eec | 409 | writel(port->command_list_dma & 0xFFFFFFFF, |
88523a61 | 410 | port->mmio + PORT_LST_ADDR); |
60ec0eec | 411 | writel(port->rxfis_dma & 0xFFFFFFFF, port->mmio + PORT_FIS_ADDR); |
88523a61 SB |
412 | |
413 | /* Clear SError */ | |
414 | writel(readl(port->mmio + PORT_SCR_ERR), port->mmio + PORT_SCR_ERR); | |
415 | ||
6316668f JA |
416 | /* reset the completed registers.*/ |
417 | for (i = 0; i < port->dd->slot_groups; i++) | |
418 | writel(0xFFFFFFFF, port->completed[i]); | |
88523a61 | 419 | |
6316668f JA |
420 | /* Clear any pending interrupts for this port */ |
421 | writel(readl(port->mmio + PORT_IRQ_STAT), port->mmio + PORT_IRQ_STAT); | |
88523a61 | 422 | |
6316668f JA |
423 | /* Enable port interrupts */ |
424 | writel(DEF_PORT_IRQ, port->mmio + PORT_IRQ_MASK); | |
88523a61 SB |
425 | } |
426 | ||
427 | /* | |
428 | * Restart a port | |
429 | * | |
430 | * @port Pointer to the port data structure. | |
431 | * | |
432 | * return value | |
433 | * None | |
434 | */ | |
6316668f | 435 | static void mtip_restart_port(struct mtip_port *port) |
88523a61 SB |
436 | { |
437 | unsigned long timeout; | |
438 | ||
439 | /* Disable the DMA engine */ | |
440 | mtip_enable_engine(port, 0); | |
441 | ||
442 | /* Chip quirk: wait up to 500ms for PxCMD.CR == 0 */ | |
443 | timeout = jiffies + msecs_to_jiffies(500); | |
444 | while ((readl(port->mmio + PORT_CMD) & PORT_CMD_LIST_ON) | |
445 | && time_before(jiffies, timeout)) | |
446 | ; | |
447 | ||
448 | /* | |
449 | * Chip quirk: escalate to hba reset if | |
450 | * PxCMD.CR not clear after 500 ms | |
451 | */ | |
452 | if (readl(port->mmio + PORT_CMD) & PORT_CMD_LIST_ON) { | |
453 | dev_warn(&port->dd->pdev->dev, | |
454 | "PxCMD.CR not clear, escalating reset\n"); | |
455 | ||
456 | if (hba_reset_nosleep(port->dd)) | |
457 | dev_err(&port->dd->pdev->dev, | |
458 | "HBA reset escalation failed.\n"); | |
459 | ||
460 | /* 30 ms delay before com reset to quiesce chip */ | |
461 | mdelay(30); | |
462 | } | |
463 | ||
464 | dev_warn(&port->dd->pdev->dev, "Issuing COM reset\n"); | |
465 | ||
466 | /* Set PxSCTL.DET */ | |
467 | writel(readl(port->mmio + PORT_SCR_CTL) | | |
468 | 1, port->mmio + PORT_SCR_CTL); | |
469 | readl(port->mmio + PORT_SCR_CTL); | |
470 | ||
471 | /* Wait 1 ms to quiesce chip function */ | |
472 | timeout = jiffies + msecs_to_jiffies(1); | |
473 | while (time_before(jiffies, timeout)) | |
474 | ; | |
475 | ||
476 | /* Clear PxSCTL.DET */ | |
477 | writel(readl(port->mmio + PORT_SCR_CTL) & ~1, | |
478 | port->mmio + PORT_SCR_CTL); | |
479 | readl(port->mmio + PORT_SCR_CTL); | |
480 | ||
481 | /* Wait 500 ms for bit 0 of PORT_SCR_STS to be set */ | |
482 | timeout = jiffies + msecs_to_jiffies(500); | |
483 | while (((readl(port->mmio + PORT_SCR_STAT) & 0x01) == 0) | |
484 | && time_before(jiffies, timeout)) | |
485 | ; | |
486 | ||
487 | if ((readl(port->mmio + PORT_SCR_STAT) & 0x01) == 0) | |
488 | dev_warn(&port->dd->pdev->dev, | |
489 | "COM reset failed\n"); | |
490 | ||
491 | /* Clear SError, the PxSERR.DIAG.x should be set so clear it */ | |
492 | writel(readl(port->mmio + PORT_SCR_ERR), port->mmio + PORT_SCR_ERR); | |
493 | ||
494 | /* Enable the DMA engine */ | |
495 | mtip_enable_engine(port, 1); | |
496 | } | |
497 | ||
6316668f JA |
498 | /* |
499 | * Called periodically to see if any read/write commands are | |
500 | * taking too long to complete. | |
501 | * | |
502 | * @data Pointer to the PORT data structure. | |
503 | * | |
504 | * return value | |
505 | * None | |
506 | */ | |
507 | static void mtip_timeout_function(unsigned long int data) | |
508 | { | |
509 | struct mtip_port *port = (struct mtip_port *) data; | |
510 | struct host_to_dev_fis *fis; | |
511 | struct mtip_cmd *command; | |
512 | int tag, cmdto_cnt = 0; | |
513 | unsigned int bit, group; | |
514 | unsigned int num_command_slots = port->dd->slot_groups * 32; | |
515 | ||
516 | if (unlikely(!port)) | |
517 | return; | |
518 | ||
519 | if (atomic_read(&port->dd->resumeflag) == true) { | |
520 | mod_timer(&port->cmd_timer, | |
521 | jiffies + msecs_to_jiffies(30000)); | |
522 | return; | |
523 | } | |
524 | ||
525 | for (tag = 0; tag < num_command_slots; tag++) { | |
526 | /* | |
527 | * Skip internal command slot as it has | |
528 | * its own timeout mechanism | |
529 | */ | |
530 | if (tag == MTIP_TAG_INTERNAL) | |
531 | continue; | |
532 | ||
533 | if (atomic_read(&port->commands[tag].active) && | |
534 | (time_after(jiffies, port->commands[tag].comp_time))) { | |
535 | group = tag >> 5; | |
60ec0eec | 536 | bit = tag & 0x1F; |
6316668f JA |
537 | |
538 | command = &port->commands[tag]; | |
539 | fis = (struct host_to_dev_fis *) command->command; | |
540 | ||
541 | dev_warn(&port->dd->pdev->dev, | |
542 | "Timeout for command tag %d\n", tag); | |
543 | ||
544 | cmdto_cnt++; | |
545 | if (cmdto_cnt == 1) | |
60ec0eec | 546 | set_bit(MTIP_FLAG_EH_ACTIVE_BIT, &port->flags); |
6316668f JA |
547 | |
548 | /* | |
549 | * Clear the completed bit. This should prevent | |
550 | * any interrupt handlers from trying to retire | |
551 | * the command. | |
552 | */ | |
553 | writel(1 << bit, port->completed[group]); | |
554 | ||
555 | /* Call the async completion callback. */ | |
556 | if (likely(command->async_callback)) | |
557 | command->async_callback(command->async_data, | |
558 | -EIO); | |
559 | command->async_callback = NULL; | |
560 | command->comp_func = NULL; | |
561 | ||
562 | /* Unmap the DMA scatter list entries */ | |
563 | dma_unmap_sg(&port->dd->pdev->dev, | |
564 | command->sg, | |
565 | command->scatter_ents, | |
566 | command->direction); | |
567 | ||
568 | /* | |
569 | * Clear the allocated bit and active tag for the | |
570 | * command. | |
571 | */ | |
572 | atomic_set(&port->commands[tag].active, 0); | |
573 | release_slot(port, tag); | |
574 | ||
575 | up(&port->cmd_slot); | |
576 | } | |
577 | } | |
578 | ||
579 | if (cmdto_cnt) { | |
580 | dev_warn(&port->dd->pdev->dev, | |
581 | "%d commands timed out: restarting port", | |
582 | cmdto_cnt); | |
583 | mtip_restart_port(port); | |
60ec0eec AT |
584 | clear_bit(MTIP_FLAG_EH_ACTIVE_BIT, &port->flags); |
585 | wake_up_interruptible(&port->svc_wait); | |
6316668f JA |
586 | } |
587 | ||
588 | /* Restart the timer */ | |
589 | mod_timer(&port->cmd_timer, | |
590 | jiffies + msecs_to_jiffies(MTIP_TIMEOUT_CHECK_PERIOD)); | |
591 | } | |
592 | ||
593 | /* | |
594 | * IO completion function. | |
595 | * | |
596 | * This completion function is called by the driver ISR when a | |
597 | * command that was issued by the kernel completes. It first calls the | |
598 | * asynchronous completion function which normally calls back into the block | |
599 | * layer passing the asynchronous callback data, then unmaps the | |
600 | * scatter list associated with the completed command, and finally | |
601 | * clears the allocated bit associated with the completed command. | |
602 | * | |
603 | * @port Pointer to the port data structure. | |
604 | * @tag Tag of the command. | |
605 | * @data Pointer to driver_data. | |
606 | * @status Completion status. | |
607 | * | |
608 | * return value | |
609 | * None | |
610 | */ | |
611 | static void mtip_async_complete(struct mtip_port *port, | |
612 | int tag, | |
613 | void *data, | |
614 | int status) | |
615 | { | |
616 | struct mtip_cmd *command; | |
617 | struct driver_data *dd = data; | |
618 | int cb_status = status ? -EIO : 0; | |
619 | ||
620 | if (unlikely(!dd) || unlikely(!port)) | |
621 | return; | |
622 | ||
623 | command = &port->commands[tag]; | |
624 | ||
625 | if (unlikely(status == PORT_IRQ_TF_ERR)) { | |
626 | dev_warn(&port->dd->pdev->dev, | |
627 | "Command tag %d failed due to TFE\n", tag); | |
628 | } | |
629 | ||
630 | /* Upper layer callback */ | |
631 | if (likely(command->async_callback)) | |
632 | command->async_callback(command->async_data, cb_status); | |
633 | ||
634 | command->async_callback = NULL; | |
635 | command->comp_func = NULL; | |
636 | ||
637 | /* Unmap the DMA scatter list entries */ | |
638 | dma_unmap_sg(&dd->pdev->dev, | |
639 | command->sg, | |
640 | command->scatter_ents, | |
641 | command->direction); | |
642 | ||
643 | /* Clear the allocated and active bits for the command */ | |
644 | atomic_set(&port->commands[tag].active, 0); | |
645 | release_slot(port, tag); | |
646 | ||
647 | up(&port->cmd_slot); | |
648 | } | |
649 | ||
650 | /* | |
651 | * Internal command completion callback function. | |
652 | * | |
653 | * This function is normally called by the driver ISR when an internal | |
654 | * command completed. This function signals the command completion by | |
655 | * calling complete(). | |
656 | * | |
657 | * @port Pointer to the port data structure. | |
658 | * @tag Tag of the command that has completed. | |
659 | * @data Pointer to a completion structure. | |
660 | * @status Completion status. | |
661 | * | |
662 | * return value | |
663 | * None | |
664 | */ | |
665 | static void mtip_completion(struct mtip_port *port, | |
666 | int tag, | |
667 | void *data, | |
668 | int status) | |
669 | { | |
670 | struct mtip_cmd *command = &port->commands[tag]; | |
671 | struct completion *waiting = data; | |
672 | if (unlikely(status == PORT_IRQ_TF_ERR)) | |
673 | dev_warn(&port->dd->pdev->dev, | |
674 | "Internal command %d completed with TFE\n", tag); | |
675 | ||
676 | command->async_callback = NULL; | |
677 | command->comp_func = NULL; | |
678 | ||
679 | complete(waiting); | |
680 | } | |
681 | ||
88523a61 SB |
682 | /* |
683 | * Helper function for tag logging | |
684 | */ | |
685 | static void print_tags(struct driver_data *dd, | |
686 | char *msg, | |
687 | unsigned long *tagbits) | |
688 | { | |
689 | unsigned int tag, count = 0; | |
690 | ||
691 | for (tag = 0; tag < (dd->slot_groups) * 32; tag++) { | |
692 | if (test_bit(tag, tagbits)) | |
693 | count++; | |
694 | } | |
695 | if (count) | |
696 | dev_info(&dd->pdev->dev, "%s [%i tags]\n", msg, count); | |
697 | } | |
698 | ||
699 | /* | |
700 | * Handle an error. | |
701 | * | |
702 | * @dd Pointer to the DRIVER_DATA structure. | |
703 | * | |
704 | * return value | |
705 | * None | |
706 | */ | |
707 | static void mtip_handle_tfe(struct driver_data *dd) | |
708 | { | |
709 | int group, tag, bit, reissue; | |
710 | struct mtip_port *port; | |
711 | struct mtip_cmd *command; | |
712 | u32 completed; | |
713 | struct host_to_dev_fis *fis; | |
714 | unsigned long tagaccum[SLOTBITS_IN_LONGS]; | |
715 | ||
716 | dev_warn(&dd->pdev->dev, "Taskfile error\n"); | |
717 | ||
718 | port = dd->port; | |
719 | ||
720 | /* Stop the timer to prevent command timeouts. */ | |
721 | del_timer(&port->cmd_timer); | |
722 | ||
723 | /* Set eh_active */ | |
60ec0eec | 724 | set_bit(MTIP_FLAG_EH_ACTIVE_BIT, &port->flags); |
88523a61 SB |
725 | |
726 | /* Loop through all the groups */ | |
727 | for (group = 0; group < dd->slot_groups; group++) { | |
728 | completed = readl(port->completed[group]); | |
729 | ||
730 | /* clear completed status register in the hardware.*/ | |
731 | writel(completed, port->completed[group]); | |
732 | ||
733 | /* clear the tag accumulator */ | |
734 | memset(tagaccum, 0, SLOTBITS_IN_LONGS * sizeof(long)); | |
735 | ||
736 | /* Process successfully completed commands */ | |
737 | for (bit = 0; bit < 32 && completed; bit++) { | |
738 | if (!(completed & (1<<bit))) | |
739 | continue; | |
740 | tag = (group << 5) + bit; | |
741 | ||
742 | /* Skip the internal command slot */ | |
743 | if (tag == MTIP_TAG_INTERNAL) | |
744 | continue; | |
745 | ||
746 | command = &port->commands[tag]; | |
747 | if (likely(command->comp_func)) { | |
748 | set_bit(tag, tagaccum); | |
749 | atomic_set(&port->commands[tag].active, 0); | |
750 | command->comp_func(port, | |
751 | tag, | |
752 | command->comp_data, | |
753 | 0); | |
754 | } else { | |
755 | dev_err(&port->dd->pdev->dev, | |
756 | "Missing completion func for tag %d", | |
757 | tag); | |
758 | if (mtip_check_surprise_removal(dd->pdev)) { | |
759 | mtip_command_cleanup(dd); | |
760 | /* don't proceed further */ | |
761 | return; | |
762 | } | |
763 | } | |
764 | } | |
765 | } | |
766 | print_tags(dd, "TFE tags completed:", tagaccum); | |
767 | ||
768 | /* Restart the port */ | |
769 | mdelay(20); | |
770 | mtip_restart_port(port); | |
771 | ||
772 | /* clear the tag accumulator */ | |
773 | memset(tagaccum, 0, SLOTBITS_IN_LONGS * sizeof(long)); | |
774 | ||
775 | /* Loop through all the groups */ | |
776 | for (group = 0; group < dd->slot_groups; group++) { | |
777 | for (bit = 0; bit < 32; bit++) { | |
778 | reissue = 1; | |
779 | tag = (group << 5) + bit; | |
780 | ||
781 | /* If the active bit is set re-issue the command */ | |
782 | if (atomic_read(&port->commands[tag].active) == 0) | |
783 | continue; | |
784 | ||
785 | fis = (struct host_to_dev_fis *) | |
786 | port->commands[tag].command; | |
787 | ||
788 | /* Should re-issue? */ | |
789 | if (tag == MTIP_TAG_INTERNAL || | |
790 | fis->command == ATA_CMD_SET_FEATURES) | |
791 | reissue = 0; | |
792 | ||
793 | /* | |
794 | * First check if this command has | |
795 | * exceeded its retries. | |
796 | */ | |
797 | if (reissue && | |
798 | (port->commands[tag].retries-- > 0)) { | |
799 | ||
800 | set_bit(tag, tagaccum); | |
801 | ||
802 | /* Update the timeout value. */ | |
803 | port->commands[tag].comp_time = | |
804 | jiffies + msecs_to_jiffies( | |
805 | MTIP_NCQ_COMMAND_TIMEOUT_MS); | |
806 | /* Re-issue the command. */ | |
807 | mtip_issue_ncq_command(port, tag); | |
808 | ||
809 | continue; | |
810 | } | |
811 | ||
812 | /* Retire a command that will not be reissued */ | |
813 | dev_warn(&port->dd->pdev->dev, | |
814 | "retiring tag %d\n", tag); | |
815 | atomic_set(&port->commands[tag].active, 0); | |
816 | ||
817 | if (port->commands[tag].comp_func) | |
818 | port->commands[tag].comp_func( | |
819 | port, | |
820 | tag, | |
821 | port->commands[tag].comp_data, | |
822 | PORT_IRQ_TF_ERR); | |
823 | else | |
824 | dev_warn(&port->dd->pdev->dev, | |
825 | "Bad completion for tag %d\n", | |
826 | tag); | |
827 | } | |
828 | } | |
829 | print_tags(dd, "TFE tags reissued:", tagaccum); | |
830 | ||
60ec0eec AT |
831 | /* clear eh_active */ |
832 | clear_bit(MTIP_FLAG_EH_ACTIVE_BIT, &port->flags); | |
833 | wake_up_interruptible(&port->svc_wait); | |
88523a61 SB |
834 | |
835 | mod_timer(&port->cmd_timer, | |
836 | jiffies + msecs_to_jiffies(MTIP_TIMEOUT_CHECK_PERIOD)); | |
837 | } | |
838 | ||
839 | /* | |
840 | * Handle a set device bits interrupt | |
841 | */ | |
842 | static inline void mtip_process_sdbf(struct driver_data *dd) | |
843 | { | |
844 | struct mtip_port *port = dd->port; | |
845 | int group, tag, bit; | |
846 | u32 completed; | |
847 | struct mtip_cmd *command; | |
848 | ||
849 | /* walk all bits in all slot groups */ | |
850 | for (group = 0; group < dd->slot_groups; group++) { | |
851 | completed = readl(port->completed[group]); | |
852 | ||
853 | /* clear completed status register in the hardware.*/ | |
854 | writel(completed, port->completed[group]); | |
855 | ||
856 | /* Process completed commands. */ | |
857 | for (bit = 0; | |
858 | (bit < 32) && completed; | |
859 | bit++, completed >>= 1) { | |
860 | if (completed & 0x01) { | |
861 | tag = (group << 5) | bit; | |
862 | ||
863 | /* skip internal command slot. */ | |
864 | if (unlikely(tag == MTIP_TAG_INTERNAL)) | |
865 | continue; | |
866 | ||
867 | command = &port->commands[tag]; | |
88523a61 SB |
868 | /* make internal callback */ |
869 | if (likely(command->comp_func)) { | |
870 | command->comp_func( | |
871 | port, | |
872 | tag, | |
873 | command->comp_data, | |
874 | 0); | |
875 | } else { | |
876 | dev_warn(&dd->pdev->dev, | |
877 | "Null completion " | |
878 | "for tag %d", | |
879 | tag); | |
880 | ||
881 | if (mtip_check_surprise_removal( | |
882 | dd->pdev)) { | |
883 | mtip_command_cleanup(dd); | |
884 | return; | |
885 | } | |
886 | } | |
887 | } | |
888 | } | |
889 | } | |
890 | } | |
891 | ||
892 | /* | |
893 | * Process legacy pio and d2h interrupts | |
894 | */ | |
895 | static inline void mtip_process_legacy(struct driver_data *dd, u32 port_stat) | |
896 | { | |
897 | struct mtip_port *port = dd->port; | |
898 | struct mtip_cmd *cmd = &port->commands[MTIP_TAG_INTERNAL]; | |
899 | ||
60ec0eec AT |
900 | if (test_bit(MTIP_FLAG_IC_ACTIVE_BIT, &port->flags) && |
901 | (cmd != NULL) && !(readl(port->cmd_issue[MTIP_TAG_INTERNAL]) | |
88523a61 SB |
902 | & (1 << MTIP_TAG_INTERNAL))) { |
903 | if (cmd->comp_func) { | |
904 | cmd->comp_func(port, | |
905 | MTIP_TAG_INTERNAL, | |
906 | cmd->comp_data, | |
907 | 0); | |
908 | return; | |
909 | } | |
910 | } | |
911 | ||
912 | dev_warn(&dd->pdev->dev, "IRQ status 0x%x ignored.\n", port_stat); | |
913 | ||
914 | return; | |
915 | } | |
916 | ||
917 | /* | |
918 | * Demux and handle errors | |
919 | */ | |
920 | static inline void mtip_process_errors(struct driver_data *dd, u32 port_stat) | |
921 | { | |
922 | if (likely(port_stat & (PORT_IRQ_TF_ERR | PORT_IRQ_IF_ERR))) | |
923 | mtip_handle_tfe(dd); | |
924 | ||
925 | if (unlikely(port_stat & PORT_IRQ_CONNECT)) { | |
926 | dev_warn(&dd->pdev->dev, | |
927 | "Clearing PxSERR.DIAG.x\n"); | |
928 | writel((1 << 26), dd->port->mmio + PORT_SCR_ERR); | |
929 | } | |
930 | ||
931 | if (unlikely(port_stat & PORT_IRQ_PHYRDY)) { | |
932 | dev_warn(&dd->pdev->dev, | |
933 | "Clearing PxSERR.DIAG.n\n"); | |
934 | writel((1 << 16), dd->port->mmio + PORT_SCR_ERR); | |
935 | } | |
936 | ||
937 | if (unlikely(port_stat & ~PORT_IRQ_HANDLED)) { | |
938 | dev_warn(&dd->pdev->dev, | |
939 | "Port stat errors %x unhandled\n", | |
940 | (port_stat & ~PORT_IRQ_HANDLED)); | |
941 | } | |
942 | } | |
943 | ||
944 | static inline irqreturn_t mtip_handle_irq(struct driver_data *data) | |
945 | { | |
946 | struct driver_data *dd = (struct driver_data *) data; | |
947 | struct mtip_port *port = dd->port; | |
948 | u32 hba_stat, port_stat; | |
949 | int rv = IRQ_NONE; | |
950 | ||
951 | hba_stat = readl(dd->mmio + HOST_IRQ_STAT); | |
952 | if (hba_stat) { | |
953 | rv = IRQ_HANDLED; | |
954 | ||
955 | /* Acknowledge the interrupt status on the port.*/ | |
956 | port_stat = readl(port->mmio + PORT_IRQ_STAT); | |
957 | writel(port_stat, port->mmio + PORT_IRQ_STAT); | |
958 | ||
959 | /* Demux port status */ | |
960 | if (likely(port_stat & PORT_IRQ_SDB_FIS)) | |
961 | mtip_process_sdbf(dd); | |
962 | ||
963 | if (unlikely(port_stat & PORT_IRQ_ERR)) { | |
964 | if (unlikely(mtip_check_surprise_removal(dd->pdev))) { | |
965 | mtip_command_cleanup(dd); | |
966 | /* don't proceed further */ | |
967 | return IRQ_HANDLED; | |
968 | } | |
969 | ||
970 | mtip_process_errors(dd, port_stat & PORT_IRQ_ERR); | |
971 | } | |
972 | ||
973 | if (unlikely(port_stat & PORT_IRQ_LEGACY)) | |
974 | mtip_process_legacy(dd, port_stat & PORT_IRQ_LEGACY); | |
975 | } | |
976 | ||
977 | /* acknowledge interrupt */ | |
978 | writel(hba_stat, dd->mmio + HOST_IRQ_STAT); | |
979 | ||
980 | return rv; | |
981 | } | |
982 | ||
983 | /* | |
984 | * Wrapper for mtip_handle_irq | |
985 | * (ignores return code) | |
986 | */ | |
987 | static void mtip_tasklet(unsigned long data) | |
988 | { | |
989 | mtip_handle_irq((struct driver_data *) data); | |
990 | } | |
991 | ||
992 | /* | |
993 | * HBA interrupt subroutine. | |
994 | * | |
995 | * @irq IRQ number. | |
996 | * @instance Pointer to the driver data structure. | |
997 | * | |
998 | * return value | |
999 | * IRQ_HANDLED A HBA interrupt was pending and handled. | |
1000 | * IRQ_NONE This interrupt was not for the HBA. | |
1001 | */ | |
1002 | static irqreturn_t mtip_irq_handler(int irq, void *instance) | |
1003 | { | |
1004 | struct driver_data *dd = instance; | |
1005 | tasklet_schedule(&dd->tasklet); | |
1006 | return IRQ_HANDLED; | |
1007 | } | |
1008 | ||
1009 | static void mtip_issue_non_ncq_command(struct mtip_port *port, int tag) | |
1010 | { | |
1011 | atomic_set(&port->commands[tag].active, 1); | |
1012 | writel(1 << MTIP_TAG_BIT(tag), | |
1013 | port->cmd_issue[MTIP_TAG_INDEX(tag)]); | |
1014 | } | |
1015 | ||
1016 | /* | |
1017 | * Wait for port to quiesce | |
1018 | * | |
1019 | * @port Pointer to port data structure | |
1020 | * @timeout Max duration to wait (ms) | |
1021 | * | |
1022 | * return value | |
1023 | * 0 Success | |
1024 | * -EBUSY Commands still active | |
1025 | */ | |
1026 | static int mtip_quiesce_io(struct mtip_port *port, unsigned long timeout) | |
1027 | { | |
1028 | unsigned long to; | |
3e54a3d1 DC |
1029 | unsigned int n; |
1030 | unsigned int active = 1; | |
88523a61 SB |
1031 | |
1032 | to = jiffies + msecs_to_jiffies(timeout); | |
1033 | do { | |
60ec0eec AT |
1034 | if (test_bit(MTIP_FLAG_SVC_THD_ACTIVE_BIT, &port->flags)) { |
1035 | msleep(20); | |
1036 | continue; /* svc thd is actively issuing commands */ | |
1037 | } | |
88523a61 SB |
1038 | /* |
1039 | * Ignore s_active bit 0 of array element 0. | |
1040 | * This bit will always be set | |
1041 | */ | |
60ec0eec | 1042 | active = readl(port->s_active[0]) & 0xFFFFFFFE; |
88523a61 SB |
1043 | for (n = 1; n < port->dd->slot_groups; n++) |
1044 | active |= readl(port->s_active[n]); | |
1045 | ||
1046 | if (!active) | |
1047 | break; | |
1048 | ||
1049 | msleep(20); | |
1050 | } while (time_before(jiffies, to)); | |
1051 | ||
1052 | return active ? -EBUSY : 0; | |
1053 | } | |
1054 | ||
1055 | /* | |
1056 | * Execute an internal command and wait for the completion. | |
1057 | * | |
1058 | * @port Pointer to the port data structure. | |
1059 | * @fis Pointer to the FIS that describes the command. | |
60ec0eec | 1060 | * @fis_len Length in WORDS of the FIS. |
88523a61 | 1061 | * @buffer DMA accessible for command data. |
60ec0eec | 1062 | * @buf_len Length, in bytes, of the data buffer. |
88523a61 SB |
1063 | * @opts Command header options, excluding the FIS length |
1064 | * and the number of PRD entries. | |
1065 | * @timeout Time in ms to wait for the command to complete. | |
1066 | * | |
1067 | * return value | |
1068 | * 0 Command completed successfully. | |
1069 | * -EFAULT The buffer address is not correctly aligned. | |
1070 | * -EBUSY Internal command or other IO in progress. | |
1071 | * -EAGAIN Time out waiting for command to complete. | |
1072 | */ | |
1073 | static int mtip_exec_internal_command(struct mtip_port *port, | |
1074 | void *fis, | |
60ec0eec | 1075 | int fis_len, |
88523a61 | 1076 | dma_addr_t buffer, |
60ec0eec | 1077 | int buf_len, |
88523a61 SB |
1078 | u32 opts, |
1079 | gfp_t atomic, | |
1080 | unsigned long timeout) | |
1081 | { | |
1082 | struct mtip_cmd_sg *command_sg; | |
1083 | DECLARE_COMPLETION_ONSTACK(wait); | |
1084 | int rv = 0; | |
1085 | struct mtip_cmd *int_cmd = &port->commands[MTIP_TAG_INTERNAL]; | |
1086 | ||
1087 | /* Make sure the buffer is 8 byte aligned. This is asic specific. */ | |
1088 | if (buffer & 0x00000007) { | |
1089 | dev_err(&port->dd->pdev->dev, | |
1090 | "SG buffer is not 8 byte aligned\n"); | |
1091 | return -EFAULT; | |
1092 | } | |
1093 | ||
1094 | /* Only one internal command should be running at a time */ | |
1095 | if (test_and_set_bit(MTIP_TAG_INTERNAL, port->allocated)) { | |
1096 | dev_warn(&port->dd->pdev->dev, | |
1097 | "Internal command already active\n"); | |
1098 | return -EBUSY; | |
1099 | } | |
60ec0eec | 1100 | set_bit(MTIP_FLAG_IC_ACTIVE_BIT, &port->flags); |
88523a61 SB |
1101 | |
1102 | if (atomic == GFP_KERNEL) { | |
1103 | /* wait for io to complete if non atomic */ | |
1104 | if (mtip_quiesce_io(port, 5000) < 0) { | |
1105 | dev_warn(&port->dd->pdev->dev, | |
1106 | "Failed to quiesce IO\n"); | |
1107 | release_slot(port, MTIP_TAG_INTERNAL); | |
60ec0eec AT |
1108 | clear_bit(MTIP_FLAG_IC_ACTIVE_BIT, &port->flags); |
1109 | wake_up_interruptible(&port->svc_wait); | |
88523a61 SB |
1110 | return -EBUSY; |
1111 | } | |
1112 | ||
1113 | /* Set the completion function and data for the command. */ | |
1114 | int_cmd->comp_data = &wait; | |
1115 | int_cmd->comp_func = mtip_completion; | |
1116 | ||
1117 | } else { | |
1118 | /* Clear completion - we're going to poll */ | |
1119 | int_cmd->comp_data = NULL; | |
1120 | int_cmd->comp_func = NULL; | |
1121 | } | |
1122 | ||
1123 | /* Copy the command to the command table */ | |
60ec0eec | 1124 | memcpy(int_cmd->command, fis, fis_len*4); |
88523a61 SB |
1125 | |
1126 | /* Populate the SG list */ | |
1127 | int_cmd->command_header->opts = | |
60ec0eec AT |
1128 | __force_bit2int cpu_to_le32(opts | fis_len); |
1129 | if (buf_len) { | |
88523a61 SB |
1130 | command_sg = int_cmd->command + AHCI_CMD_TBL_HDR_SZ; |
1131 | ||
60ec0eec AT |
1132 | command_sg->info = |
1133 | __force_bit2int cpu_to_le32((buf_len-1) & 0x3FFFFF); | |
1134 | command_sg->dba = | |
1135 | __force_bit2int cpu_to_le32(buffer & 0xFFFFFFFF); | |
1136 | command_sg->dba_upper = | |
1137 | __force_bit2int cpu_to_le32((buffer >> 16) >> 16); | |
88523a61 | 1138 | |
60ec0eec AT |
1139 | int_cmd->command_header->opts |= |
1140 | __force_bit2int cpu_to_le32((1 << 16)); | |
88523a61 SB |
1141 | } |
1142 | ||
1143 | /* Populate the command header */ | |
1144 | int_cmd->command_header->byte_count = 0; | |
1145 | ||
1146 | /* Issue the command to the hardware */ | |
1147 | mtip_issue_non_ncq_command(port, MTIP_TAG_INTERNAL); | |
1148 | ||
1149 | /* Poll if atomic, wait_for_completion otherwise */ | |
1150 | if (atomic == GFP_KERNEL) { | |
1151 | /* Wait for the command to complete or timeout. */ | |
1152 | if (wait_for_completion_timeout( | |
1153 | &wait, | |
1154 | msecs_to_jiffies(timeout)) == 0) { | |
1155 | dev_err(&port->dd->pdev->dev, | |
60ec0eec AT |
1156 | "Internal command did not complete [%d] " |
1157 | "within timeout of %lu ms\n", | |
1158 | atomic, timeout); | |
88523a61 SB |
1159 | rv = -EAGAIN; |
1160 | } | |
1161 | ||
1162 | if (readl(port->cmd_issue[MTIP_TAG_INTERNAL]) | |
1163 | & (1 << MTIP_TAG_INTERNAL)) { | |
1164 | dev_warn(&port->dd->pdev->dev, | |
1165 | "Retiring internal command but CI is 1.\n"); | |
1166 | } | |
1167 | ||
1168 | } else { | |
1169 | /* Spin for <timeout> checking if command still outstanding */ | |
1170 | timeout = jiffies + msecs_to_jiffies(timeout); | |
1171 | ||
1172 | while ((readl( | |
1173 | port->cmd_issue[MTIP_TAG_INTERNAL]) | |
1174 | & (1 << MTIP_TAG_INTERNAL)) | |
1175 | && time_before(jiffies, timeout)) | |
1176 | ; | |
1177 | ||
1178 | if (readl(port->cmd_issue[MTIP_TAG_INTERNAL]) | |
1179 | & (1 << MTIP_TAG_INTERNAL)) { | |
1180 | dev_err(&port->dd->pdev->dev, | |
1181 | "Internal command did not complete [%d]\n", | |
1182 | atomic); | |
1183 | rv = -EAGAIN; | |
1184 | } | |
1185 | } | |
1186 | ||
1187 | /* Clear the allocated and active bits for the internal command. */ | |
1188 | atomic_set(&int_cmd->active, 0); | |
1189 | release_slot(port, MTIP_TAG_INTERNAL); | |
60ec0eec AT |
1190 | clear_bit(MTIP_FLAG_IC_ACTIVE_BIT, &port->flags); |
1191 | wake_up_interruptible(&port->svc_wait); | |
88523a61 SB |
1192 | |
1193 | return rv; | |
1194 | } | |
1195 | ||
1196 | /* | |
1197 | * Byte-swap ATA ID strings. | |
1198 | * | |
1199 | * ATA identify data contains strings in byte-swapped 16-bit words. | |
1200 | * They must be swapped (on all architectures) to be usable as C strings. | |
1201 | * This function swaps bytes in-place. | |
1202 | * | |
1203 | * @buf The buffer location of the string | |
1204 | * @len The number of bytes to swap | |
1205 | * | |
1206 | * return value | |
1207 | * None | |
1208 | */ | |
1209 | static inline void ata_swap_string(u16 *buf, unsigned int len) | |
1210 | { | |
1211 | int i; | |
1212 | for (i = 0; i < (len/2); i++) | |
1213 | be16_to_cpus(&buf[i]); | |
1214 | } | |
1215 | ||
1216 | /* | |
1217 | * Request the device identity information. | |
1218 | * | |
1219 | * If a user space buffer is not specified, i.e. is NULL, the | |
1220 | * identify information is still read from the drive and placed | |
1221 | * into the identify data buffer (@e port->identify) in the | |
1222 | * port data structure. | |
1223 | * When the identify buffer contains valid identify information @e | |
1224 | * port->identify_valid is non-zero. | |
1225 | * | |
1226 | * @port Pointer to the port structure. | |
1227 | * @user_buffer A user space buffer where the identify data should be | |
1228 | * copied. | |
1229 | * | |
1230 | * return value | |
1231 | * 0 Command completed successfully. | |
1232 | * -EFAULT An error occurred while coping data to the user buffer. | |
1233 | * -1 Command failed. | |
1234 | */ | |
1235 | static int mtip_get_identify(struct mtip_port *port, void __user *user_buffer) | |
1236 | { | |
1237 | int rv = 0; | |
1238 | struct host_to_dev_fis fis; | |
1239 | ||
88523a61 SB |
1240 | /* Build the FIS. */ |
1241 | memset(&fis, 0, sizeof(struct host_to_dev_fis)); | |
1242 | fis.type = 0x27; | |
1243 | fis.opts = 1 << 7; | |
1244 | fis.command = ATA_CMD_ID_ATA; | |
1245 | ||
1246 | /* Set the identify information as invalid. */ | |
1247 | port->identify_valid = 0; | |
1248 | ||
1249 | /* Clear the identify information. */ | |
1250 | memset(port->identify, 0, sizeof(u16) * ATA_ID_WORDS); | |
1251 | ||
1252 | /* Execute the command. */ | |
1253 | if (mtip_exec_internal_command(port, | |
1254 | &fis, | |
1255 | 5, | |
1256 | port->identify_dma, | |
1257 | sizeof(u16) * ATA_ID_WORDS, | |
1258 | 0, | |
1259 | GFP_KERNEL, | |
1260 | MTIP_INTERNAL_COMMAND_TIMEOUT_MS) | |
1261 | < 0) { | |
1262 | rv = -1; | |
1263 | goto out; | |
1264 | } | |
1265 | ||
1266 | /* | |
1267 | * Perform any necessary byte-swapping. Yes, the kernel does in fact | |
1268 | * perform field-sensitive swapping on the string fields. | |
1269 | * See the kernel use of ata_id_string() for proof of this. | |
1270 | */ | |
1271 | #ifdef __LITTLE_ENDIAN | |
1272 | ata_swap_string(port->identify + 27, 40); /* model string*/ | |
1273 | ata_swap_string(port->identify + 23, 8); /* firmware string*/ | |
1274 | ata_swap_string(port->identify + 10, 20); /* serial# string*/ | |
1275 | #else | |
1276 | { | |
1277 | int i; | |
1278 | for (i = 0; i < ATA_ID_WORDS; i++) | |
1279 | port->identify[i] = le16_to_cpu(port->identify[i]); | |
1280 | } | |
1281 | #endif | |
1282 | ||
1283 | /* Set the identify buffer as valid. */ | |
1284 | port->identify_valid = 1; | |
1285 | ||
1286 | if (user_buffer) { | |
1287 | if (copy_to_user( | |
1288 | user_buffer, | |
1289 | port->identify, | |
1290 | ATA_ID_WORDS * sizeof(u16))) { | |
1291 | rv = -EFAULT; | |
1292 | goto out; | |
1293 | } | |
1294 | } | |
1295 | ||
1296 | out: | |
88523a61 SB |
1297 | return rv; |
1298 | } | |
1299 | ||
1300 | /* | |
1301 | * Issue a standby immediate command to the device. | |
1302 | * | |
1303 | * @port Pointer to the port structure. | |
1304 | * | |
1305 | * return value | |
1306 | * 0 Command was executed successfully. | |
1307 | * -1 An error occurred while executing the command. | |
1308 | */ | |
1309 | static int mtip_standby_immediate(struct mtip_port *port) | |
1310 | { | |
1311 | int rv; | |
1312 | struct host_to_dev_fis fis; | |
1313 | ||
88523a61 SB |
1314 | /* Build the FIS. */ |
1315 | memset(&fis, 0, sizeof(struct host_to_dev_fis)); | |
1316 | fis.type = 0x27; | |
1317 | fis.opts = 1 << 7; | |
1318 | fis.command = ATA_CMD_STANDBYNOW1; | |
1319 | ||
1320 | /* Execute the command. Use a 15-second timeout for large drives. */ | |
1321 | rv = mtip_exec_internal_command(port, | |
1322 | &fis, | |
1323 | 5, | |
1324 | 0, | |
1325 | 0, | |
1326 | 0, | |
1327 | GFP_KERNEL, | |
1328 | 15000); | |
1329 | ||
88523a61 SB |
1330 | return rv; |
1331 | } | |
1332 | ||
1333 | /* | |
1334 | * Get the drive capacity. | |
1335 | * | |
1336 | * @dd Pointer to the device data structure. | |
1337 | * @sectors Pointer to the variable that will receive the sector count. | |
1338 | * | |
1339 | * return value | |
1340 | * 1 Capacity was returned successfully. | |
1341 | * 0 The identify information is invalid. | |
1342 | */ | |
6316668f | 1343 | static bool mtip_hw_get_capacity(struct driver_data *dd, sector_t *sectors) |
88523a61 SB |
1344 | { |
1345 | struct mtip_port *port = dd->port; | |
1346 | u64 total, raw0, raw1, raw2, raw3; | |
1347 | raw0 = port->identify[100]; | |
1348 | raw1 = port->identify[101]; | |
1349 | raw2 = port->identify[102]; | |
1350 | raw3 = port->identify[103]; | |
1351 | total = raw0 | raw1<<16 | raw2<<32 | raw3<<48; | |
1352 | *sectors = total; | |
1353 | return (bool) !!port->identify_valid; | |
1354 | } | |
1355 | ||
1356 | /* | |
1357 | * Reset the HBA. | |
1358 | * | |
1359 | * Resets the HBA by setting the HBA Reset bit in the Global | |
1360 | * HBA Control register. After setting the HBA Reset bit the | |
1361 | * function waits for 1 second before reading the HBA Reset | |
1362 | * bit to make sure it has cleared. If HBA Reset is not clear | |
1363 | * an error is returned. Cannot be used in non-blockable | |
1364 | * context. | |
1365 | * | |
1366 | * @dd Pointer to the driver data structure. | |
1367 | * | |
1368 | * return value | |
1369 | * 0 The reset was successful. | |
1370 | * -1 The HBA Reset bit did not clear. | |
1371 | */ | |
1372 | static int mtip_hba_reset(struct driver_data *dd) | |
1373 | { | |
1374 | mtip_deinit_port(dd->port); | |
1375 | ||
1376 | /* Set the reset bit */ | |
1377 | writel(HOST_RESET, dd->mmio + HOST_CTL); | |
1378 | ||
1379 | /* Flush */ | |
1380 | readl(dd->mmio + HOST_CTL); | |
1381 | ||
1382 | /* Wait for reset to clear */ | |
1383 | ssleep(1); | |
1384 | ||
1385 | /* Check the bit has cleared */ | |
1386 | if (readl(dd->mmio + HOST_CTL) & HOST_RESET) { | |
1387 | dev_err(&dd->pdev->dev, | |
1388 | "Reset bit did not clear.\n"); | |
1389 | return -1; | |
1390 | } | |
1391 | ||
1392 | return 0; | |
1393 | } | |
1394 | ||
1395 | /* | |
1396 | * Display the identify command data. | |
1397 | * | |
1398 | * @port Pointer to the port data structure. | |
1399 | * | |
1400 | * return value | |
1401 | * None | |
1402 | */ | |
1403 | static void mtip_dump_identify(struct mtip_port *port) | |
1404 | { | |
1405 | sector_t sectors; | |
1406 | unsigned short revid; | |
1407 | char cbuf[42]; | |
1408 | ||
1409 | if (!port->identify_valid) | |
1410 | return; | |
1411 | ||
1412 | strlcpy(cbuf, (char *)(port->identify+10), 21); | |
1413 | dev_info(&port->dd->pdev->dev, | |
1414 | "Serial No.: %s\n", cbuf); | |
1415 | ||
1416 | strlcpy(cbuf, (char *)(port->identify+23), 9); | |
1417 | dev_info(&port->dd->pdev->dev, | |
1418 | "Firmware Ver.: %s\n", cbuf); | |
1419 | ||
1420 | strlcpy(cbuf, (char *)(port->identify+27), 41); | |
1421 | dev_info(&port->dd->pdev->dev, "Model: %s\n", cbuf); | |
1422 | ||
1423 | if (mtip_hw_get_capacity(port->dd, §ors)) | |
1424 | dev_info(&port->dd->pdev->dev, | |
1425 | "Capacity: %llu sectors (%llu MB)\n", | |
1426 | (u64)sectors, | |
1427 | ((u64)sectors) * ATA_SECT_SIZE >> 20); | |
1428 | ||
1429 | pci_read_config_word(port->dd->pdev, PCI_REVISION_ID, &revid); | |
60ec0eec | 1430 | switch (revid & 0xFF) { |
88523a61 SB |
1431 | case 0x1: |
1432 | strlcpy(cbuf, "A0", 3); | |
1433 | break; | |
1434 | case 0x3: | |
1435 | strlcpy(cbuf, "A2", 3); | |
1436 | break; | |
1437 | default: | |
1438 | strlcpy(cbuf, "?", 2); | |
1439 | break; | |
1440 | } | |
1441 | dev_info(&port->dd->pdev->dev, | |
1442 | "Card Type: %s\n", cbuf); | |
1443 | } | |
1444 | ||
1445 | /* | |
1446 | * Map the commands scatter list into the command table. | |
1447 | * | |
1448 | * @command Pointer to the command. | |
1449 | * @nents Number of scatter list entries. | |
1450 | * | |
1451 | * return value | |
1452 | * None | |
1453 | */ | |
1454 | static inline void fill_command_sg(struct driver_data *dd, | |
1455 | struct mtip_cmd *command, | |
1456 | int nents) | |
1457 | { | |
1458 | int n; | |
1459 | unsigned int dma_len; | |
1460 | struct mtip_cmd_sg *command_sg; | |
1461 | struct scatterlist *sg = command->sg; | |
1462 | ||
1463 | command_sg = command->command + AHCI_CMD_TBL_HDR_SZ; | |
1464 | ||
1465 | for (n = 0; n < nents; n++) { | |
1466 | dma_len = sg_dma_len(sg); | |
1467 | if (dma_len > 0x400000) | |
1468 | dev_err(&dd->pdev->dev, | |
1469 | "DMA segment length truncated\n"); | |
60ec0eec AT |
1470 | command_sg->info = __force_bit2int |
1471 | cpu_to_le32((dma_len-1) & 0x3FFFFF); | |
1472 | command_sg->dba = __force_bit2int | |
1473 | cpu_to_le32(sg_dma_address(sg)); | |
1474 | command_sg->dba_upper = __force_bit2int | |
1475 | cpu_to_le32((sg_dma_address(sg) >> 16) >> 16); | |
88523a61 SB |
1476 | command_sg++; |
1477 | sg++; | |
1478 | } | |
1479 | } | |
1480 | ||
1481 | /* | |
1482 | * @brief Execute a drive command. | |
1483 | * | |
1484 | * return value 0 The command completed successfully. | |
1485 | * return value -1 An error occurred while executing the command. | |
1486 | */ | |
6316668f | 1487 | static int exec_drive_task(struct mtip_port *port, u8 *command) |
88523a61 SB |
1488 | { |
1489 | struct host_to_dev_fis fis; | |
1490 | struct host_to_dev_fis *reply = (port->rxfis + RX_FIS_D2H_REG); | |
1491 | ||
88523a61 SB |
1492 | /* Build the FIS. */ |
1493 | memset(&fis, 0, sizeof(struct host_to_dev_fis)); | |
1494 | fis.type = 0x27; | |
1495 | fis.opts = 1 << 7; | |
1496 | fis.command = command[0]; | |
1497 | fis.features = command[1]; | |
1498 | fis.sect_count = command[2]; | |
1499 | fis.sector = command[3]; | |
1500 | fis.cyl_low = command[4]; | |
1501 | fis.cyl_hi = command[5]; | |
1502 | fis.device = command[6] & ~0x10; /* Clear the dev bit*/ | |
1503 | ||
1504 | ||
1505 | dbg_printk(MTIP_DRV_NAME "%s: User Command: cmd %x, feat %x, " | |
1506 | "nsect %x, sect %x, lcyl %x, " | |
1507 | "hcyl %x, sel %x\n", | |
1508 | __func__, | |
1509 | command[0], | |
1510 | command[1], | |
1511 | command[2], | |
1512 | command[3], | |
1513 | command[4], | |
1514 | command[5], | |
1515 | command[6]); | |
1516 | ||
1517 | /* Execute the command. */ | |
1518 | if (mtip_exec_internal_command(port, | |
1519 | &fis, | |
1520 | 5, | |
1521 | 0, | |
1522 | 0, | |
1523 | 0, | |
1524 | GFP_KERNEL, | |
1525 | MTIP_IOCTL_COMMAND_TIMEOUT_MS) < 0) { | |
88523a61 SB |
1526 | return -1; |
1527 | } | |
1528 | ||
1529 | command[0] = reply->command; /* Status*/ | |
1530 | command[1] = reply->features; /* Error*/ | |
1531 | command[4] = reply->cyl_low; | |
1532 | command[5] = reply->cyl_hi; | |
1533 | ||
1534 | dbg_printk(MTIP_DRV_NAME "%s: Completion Status: stat %x, " | |
1535 | "err %x , cyl_lo %x cyl_hi %x\n", | |
1536 | __func__, | |
1537 | command[0], | |
1538 | command[1], | |
1539 | command[4], | |
1540 | command[5]); | |
1541 | ||
88523a61 SB |
1542 | return 0; |
1543 | } | |
1544 | ||
1545 | /* | |
1546 | * @brief Execute a drive command. | |
1547 | * | |
1548 | * @param port Pointer to the port data structure. | |
1549 | * @param command Pointer to the user specified command parameters. | |
1550 | * @param user_buffer Pointer to the user space buffer where read sector | |
1551 | * data should be copied. | |
1552 | * | |
1553 | * return value 0 The command completed successfully. | |
1554 | * return value -EFAULT An error occurred while copying the completion | |
1555 | * data to the user space buffer. | |
1556 | * return value -1 An error occurred while executing the command. | |
1557 | */ | |
6316668f JA |
1558 | static int exec_drive_command(struct mtip_port *port, u8 *command, |
1559 | void __user *user_buffer) | |
88523a61 SB |
1560 | { |
1561 | struct host_to_dev_fis fis; | |
1562 | struct host_to_dev_fis *reply = (port->rxfis + RX_FIS_D2H_REG); | |
1563 | ||
88523a61 SB |
1564 | /* Build the FIS. */ |
1565 | memset(&fis, 0, sizeof(struct host_to_dev_fis)); | |
1566 | fis.type = 0x27; | |
1567 | fis.opts = 1 << 7; | |
1568 | fis.command = command[0]; | |
1569 | fis.features = command[2]; | |
1570 | fis.sect_count = command[3]; | |
1571 | if (fis.command == ATA_CMD_SMART) { | |
1572 | fis.sector = command[1]; | |
60ec0eec AT |
1573 | fis.cyl_low = 0x4F; |
1574 | fis.cyl_hi = 0xC2; | |
88523a61 SB |
1575 | } |
1576 | ||
1577 | dbg_printk(MTIP_DRV_NAME | |
1578 | "%s: User Command: cmd %x, sect %x, " | |
1579 | "feat %x, sectcnt %x\n", | |
1580 | __func__, | |
1581 | command[0], | |
1582 | command[1], | |
1583 | command[2], | |
1584 | command[3]); | |
1585 | ||
1586 | memset(port->sector_buffer, 0x00, ATA_SECT_SIZE); | |
1587 | ||
1588 | /* Execute the command. */ | |
1589 | if (mtip_exec_internal_command(port, | |
1590 | &fis, | |
1591 | 5, | |
1592 | port->sector_buffer_dma, | |
1593 | (command[3] != 0) ? ATA_SECT_SIZE : 0, | |
1594 | 0, | |
1595 | GFP_KERNEL, | |
1596 | MTIP_IOCTL_COMMAND_TIMEOUT_MS) | |
1597 | < 0) { | |
88523a61 SB |
1598 | return -1; |
1599 | } | |
1600 | ||
1601 | /* Collect the completion status. */ | |
1602 | command[0] = reply->command; /* Status*/ | |
1603 | command[1] = reply->features; /* Error*/ | |
1604 | command[2] = command[3]; | |
1605 | ||
1606 | dbg_printk(MTIP_DRV_NAME | |
1607 | "%s: Completion Status: stat %x, " | |
1608 | "err %x, cmd %x\n", | |
1609 | __func__, | |
1610 | command[0], | |
1611 | command[1], | |
1612 | command[2]); | |
1613 | ||
1614 | if (user_buffer && command[3]) { | |
1615 | if (copy_to_user(user_buffer, | |
1616 | port->sector_buffer, | |
1617 | ATA_SECT_SIZE * command[3])) { | |
88523a61 SB |
1618 | return -EFAULT; |
1619 | } | |
1620 | } | |
1621 | ||
88523a61 SB |
1622 | return 0; |
1623 | } | |
1624 | ||
1625 | /* | |
1626 | * Indicates whether a command has a single sector payload. | |
1627 | * | |
1628 | * @command passed to the device to perform the certain event. | |
1629 | * @features passed to the device to perform the certain event. | |
1630 | * | |
1631 | * return value | |
1632 | * 1 command is one that always has a single sector payload, | |
1633 | * regardless of the value in the Sector Count field. | |
1634 | * 0 otherwise | |
1635 | * | |
1636 | */ | |
1637 | static unsigned int implicit_sector(unsigned char command, | |
1638 | unsigned char features) | |
1639 | { | |
1640 | unsigned int rv = 0; | |
1641 | ||
1642 | /* list of commands that have an implicit sector count of 1 */ | |
1643 | switch (command) { | |
60ec0eec AT |
1644 | case ATA_CMD_SEC_SET_PASS: |
1645 | case ATA_CMD_SEC_UNLOCK: | |
1646 | case ATA_CMD_SEC_ERASE_PREP: | |
1647 | case ATA_CMD_SEC_ERASE_UNIT: | |
1648 | case ATA_CMD_SEC_FREEZE_LOCK: | |
1649 | case ATA_CMD_SEC_DISABLE_PASS: | |
1650 | case ATA_CMD_PMP_READ: | |
1651 | case ATA_CMD_PMP_WRITE: | |
88523a61 SB |
1652 | rv = 1; |
1653 | break; | |
60ec0eec AT |
1654 | case ATA_CMD_SET_MAX: |
1655 | if (features == ATA_SET_MAX_UNLOCK) | |
88523a61 SB |
1656 | rv = 1; |
1657 | break; | |
60ec0eec AT |
1658 | case ATA_CMD_SMART: |
1659 | if ((features == ATA_SMART_READ_VALUES) || | |
1660 | (features == ATA_SMART_READ_THRESHOLDS)) | |
88523a61 SB |
1661 | rv = 1; |
1662 | break; | |
60ec0eec AT |
1663 | case ATA_CMD_CONF_OVERLAY: |
1664 | if ((features == ATA_DCO_IDENTIFY) || | |
1665 | (features == ATA_DCO_SET)) | |
88523a61 SB |
1666 | rv = 1; |
1667 | break; | |
1668 | } | |
1669 | return rv; | |
1670 | } | |
1671 | ||
1672 | /* | |
1673 | * Executes a taskfile | |
1674 | * See ide_taskfile_ioctl() for derivation | |
1675 | */ | |
1676 | static int exec_drive_taskfile(struct driver_data *dd, | |
ef0f1587 JA |
1677 | void __user *buf, |
1678 | ide_task_request_t *req_task, | |
1679 | int outtotal) | |
88523a61 SB |
1680 | { |
1681 | struct host_to_dev_fis fis; | |
1682 | struct host_to_dev_fis *reply; | |
88523a61 SB |
1683 | u8 *outbuf = NULL; |
1684 | u8 *inbuf = NULL; | |
16d02c04 JA |
1685 | dma_addr_t outbuf_dma = 0; |
1686 | dma_addr_t inbuf_dma = 0; | |
1687 | dma_addr_t dma_buffer = 0; | |
88523a61 | 1688 | int err = 0; |
88523a61 SB |
1689 | unsigned int taskin = 0; |
1690 | unsigned int taskout = 0; | |
1691 | u8 nsect = 0; | |
88523a61 SB |
1692 | unsigned int timeout = MTIP_IOCTL_COMMAND_TIMEOUT_MS; |
1693 | unsigned int force_single_sector; | |
1694 | unsigned int transfer_size; | |
1695 | unsigned long task_file_data; | |
ef0f1587 | 1696 | int intotal = outtotal + req_task->out_size; |
88523a61 SB |
1697 | |
1698 | taskout = req_task->out_size; | |
1699 | taskin = req_task->in_size; | |
1700 | /* 130560 = 512 * 0xFF*/ | |
1701 | if (taskin > 130560 || taskout > 130560) { | |
1702 | err = -EINVAL; | |
1703 | goto abort; | |
1704 | } | |
1705 | ||
1706 | if (taskout) { | |
1707 | outbuf = kzalloc(taskout, GFP_KERNEL); | |
1708 | if (outbuf == NULL) { | |
1709 | err = -ENOMEM; | |
1710 | goto abort; | |
1711 | } | |
1712 | if (copy_from_user(outbuf, buf + outtotal, taskout)) { | |
1713 | err = -EFAULT; | |
1714 | goto abort; | |
1715 | } | |
1716 | outbuf_dma = pci_map_single(dd->pdev, | |
1717 | outbuf, | |
1718 | taskout, | |
1719 | DMA_TO_DEVICE); | |
16d02c04 | 1720 | if (outbuf_dma == 0) { |
88523a61 SB |
1721 | err = -ENOMEM; |
1722 | goto abort; | |
1723 | } | |
1724 | dma_buffer = outbuf_dma; | |
1725 | } | |
1726 | ||
1727 | if (taskin) { | |
1728 | inbuf = kzalloc(taskin, GFP_KERNEL); | |
1729 | if (inbuf == NULL) { | |
1730 | err = -ENOMEM; | |
1731 | goto abort; | |
1732 | } | |
1733 | ||
1734 | if (copy_from_user(inbuf, buf + intotal, taskin)) { | |
1735 | err = -EFAULT; | |
1736 | goto abort; | |
1737 | } | |
1738 | inbuf_dma = pci_map_single(dd->pdev, | |
1739 | inbuf, | |
1740 | taskin, DMA_FROM_DEVICE); | |
16d02c04 | 1741 | if (inbuf_dma == 0) { |
88523a61 SB |
1742 | err = -ENOMEM; |
1743 | goto abort; | |
1744 | } | |
1745 | dma_buffer = inbuf_dma; | |
1746 | } | |
1747 | ||
1748 | /* only supports PIO and non-data commands from this ioctl. */ | |
1749 | switch (req_task->data_phase) { | |
1750 | case TASKFILE_OUT: | |
1751 | nsect = taskout / ATA_SECT_SIZE; | |
1752 | reply = (dd->port->rxfis + RX_FIS_PIO_SETUP); | |
1753 | break; | |
1754 | case TASKFILE_IN: | |
1755 | reply = (dd->port->rxfis + RX_FIS_PIO_SETUP); | |
1756 | break; | |
1757 | case TASKFILE_NO_DATA: | |
1758 | reply = (dd->port->rxfis + RX_FIS_D2H_REG); | |
1759 | break; | |
1760 | default: | |
1761 | err = -EINVAL; | |
1762 | goto abort; | |
1763 | } | |
1764 | ||
88523a61 SB |
1765 | /* Build the FIS. */ |
1766 | memset(&fis, 0, sizeof(struct host_to_dev_fis)); | |
1767 | ||
1768 | fis.type = 0x27; | |
1769 | fis.opts = 1 << 7; | |
1770 | fis.command = req_task->io_ports[7]; | |
1771 | fis.features = req_task->io_ports[1]; | |
1772 | fis.sect_count = req_task->io_ports[2]; | |
1773 | fis.lba_low = req_task->io_ports[3]; | |
1774 | fis.lba_mid = req_task->io_ports[4]; | |
1775 | fis.lba_hi = req_task->io_ports[5]; | |
1776 | /* Clear the dev bit*/ | |
1777 | fis.device = req_task->io_ports[6] & ~0x10; | |
1778 | ||
1779 | if ((req_task->in_flags.all == 0) && (req_task->out_flags.all & 1)) { | |
1780 | req_task->in_flags.all = | |
1781 | IDE_TASKFILE_STD_IN_FLAGS | | |
1782 | (IDE_HOB_STD_IN_FLAGS << 8); | |
1783 | fis.lba_low_ex = req_task->hob_ports[3]; | |
1784 | fis.lba_mid_ex = req_task->hob_ports[4]; | |
1785 | fis.lba_hi_ex = req_task->hob_ports[5]; | |
1786 | fis.features_ex = req_task->hob_ports[1]; | |
1787 | fis.sect_cnt_ex = req_task->hob_ports[2]; | |
1788 | ||
1789 | } else { | |
1790 | req_task->in_flags.all = IDE_TASKFILE_STD_IN_FLAGS; | |
1791 | } | |
1792 | ||
1793 | force_single_sector = implicit_sector(fis.command, fis.features); | |
1794 | ||
1795 | if ((taskin || taskout) && (!fis.sect_count)) { | |
1796 | if (nsect) | |
1797 | fis.sect_count = nsect; | |
1798 | else { | |
1799 | if (!force_single_sector) { | |
1800 | dev_warn(&dd->pdev->dev, | |
1801 | "data movement but " | |
1802 | "sect_count is 0\n"); | |
88523a61 SB |
1803 | err = -EINVAL; |
1804 | goto abort; | |
1805 | } | |
1806 | } | |
1807 | } | |
1808 | ||
1809 | dbg_printk(MTIP_DRV_NAME | |
1810 | "taskfile: cmd %x, feat %x, nsect %x," | |
1811 | " sect/lbal %x, lcyl/lbam %x, hcyl/lbah %x," | |
1812 | " head/dev %x\n", | |
1813 | fis.command, | |
1814 | fis.features, | |
1815 | fis.sect_count, | |
1816 | fis.lba_low, | |
1817 | fis.lba_mid, | |
1818 | fis.lba_hi, | |
1819 | fis.device); | |
1820 | ||
1821 | switch (fis.command) { | |
60ec0eec AT |
1822 | case ATA_CMD_DOWNLOAD_MICRO: |
1823 | /* Change timeout for Download Microcode to 60 seconds.*/ | |
88523a61 SB |
1824 | timeout = 60000; |
1825 | break; | |
60ec0eec AT |
1826 | case ATA_CMD_SEC_ERASE_UNIT: |
1827 | /* Change timeout for Security Erase Unit to 4 minutes.*/ | |
88523a61 SB |
1828 | timeout = 240000; |
1829 | break; | |
60ec0eec AT |
1830 | case ATA_CMD_STANDBYNOW1: |
1831 | /* Change timeout for standby immediate to 10 seconds.*/ | |
88523a61 SB |
1832 | timeout = 10000; |
1833 | break; | |
60ec0eec AT |
1834 | case 0xF7: |
1835 | case 0xFA: | |
1836 | /* Change timeout for vendor unique command to 10 secs */ | |
88523a61 SB |
1837 | timeout = 10000; |
1838 | break; | |
60ec0eec AT |
1839 | case ATA_CMD_SMART: |
1840 | /* Change timeout for vendor unique command to 10 secs */ | |
88523a61 SB |
1841 | timeout = 10000; |
1842 | break; | |
1843 | default: | |
1844 | timeout = MTIP_IOCTL_COMMAND_TIMEOUT_MS; | |
1845 | break; | |
1846 | } | |
1847 | ||
1848 | /* Determine the correct transfer size.*/ | |
1849 | if (force_single_sector) | |
1850 | transfer_size = ATA_SECT_SIZE; | |
1851 | else | |
1852 | transfer_size = ATA_SECT_SIZE * fis.sect_count; | |
1853 | ||
1854 | /* Execute the command.*/ | |
1855 | if (mtip_exec_internal_command(dd->port, | |
1856 | &fis, | |
1857 | 5, | |
1858 | dma_buffer, | |
1859 | transfer_size, | |
1860 | 0, | |
1861 | GFP_KERNEL, | |
1862 | timeout) < 0) { | |
88523a61 SB |
1863 | err = -EIO; |
1864 | goto abort; | |
1865 | } | |
1866 | ||
1867 | task_file_data = readl(dd->port->mmio+PORT_TFDATA); | |
1868 | ||
1869 | if ((req_task->data_phase == TASKFILE_IN) && !(task_file_data & 1)) { | |
1870 | reply = dd->port->rxfis + RX_FIS_PIO_SETUP; | |
1871 | req_task->io_ports[7] = reply->control; | |
1872 | } else { | |
1873 | reply = dd->port->rxfis + RX_FIS_D2H_REG; | |
1874 | req_task->io_ports[7] = reply->command; | |
1875 | } | |
1876 | ||
1877 | /* reclaim the DMA buffers.*/ | |
1878 | if (inbuf_dma) | |
1879 | pci_unmap_single(dd->pdev, inbuf_dma, | |
1880 | taskin, DMA_FROM_DEVICE); | |
1881 | if (outbuf_dma) | |
1882 | pci_unmap_single(dd->pdev, outbuf_dma, | |
1883 | taskout, DMA_TO_DEVICE); | |
16d02c04 JA |
1884 | inbuf_dma = 0; |
1885 | outbuf_dma = 0; | |
88523a61 SB |
1886 | |
1887 | /* return the ATA registers to the caller.*/ | |
1888 | req_task->io_ports[1] = reply->features; | |
1889 | req_task->io_ports[2] = reply->sect_count; | |
1890 | req_task->io_ports[3] = reply->lba_low; | |
1891 | req_task->io_ports[4] = reply->lba_mid; | |
1892 | req_task->io_ports[5] = reply->lba_hi; | |
1893 | req_task->io_ports[6] = reply->device; | |
1894 | ||
1895 | if (req_task->out_flags.all & 1) { | |
1896 | ||
1897 | req_task->hob_ports[3] = reply->lba_low_ex; | |
1898 | req_task->hob_ports[4] = reply->lba_mid_ex; | |
1899 | req_task->hob_ports[5] = reply->lba_hi_ex; | |
1900 | req_task->hob_ports[1] = reply->features_ex; | |
1901 | req_task->hob_ports[2] = reply->sect_cnt_ex; | |
1902 | } | |
1903 | ||
1904 | /* Com rest after secure erase or lowlevel format */ | |
60ec0eec | 1905 | if (((fis.command == ATA_CMD_SEC_ERASE_UNIT) || |
88523a61 SB |
1906 | ((fis.command == 0xFC) && |
1907 | (fis.features == 0x27 || fis.features == 0x72 || | |
1908 | fis.features == 0x62 || fis.features == 0x26))) && | |
1909 | !(reply->command & 1)) { | |
1910 | mtip_restart_port(dd->port); | |
1911 | } | |
1912 | ||
1913 | dbg_printk(MTIP_DRV_NAME | |
1914 | "%s: Completion: stat %x," | |
1915 | "err %x, sect_cnt %x, lbalo %x," | |
1916 | "lbamid %x, lbahi %x, dev %x\n", | |
1917 | __func__, | |
1918 | req_task->io_ports[7], | |
1919 | req_task->io_ports[1], | |
1920 | req_task->io_ports[2], | |
1921 | req_task->io_ports[3], | |
1922 | req_task->io_ports[4], | |
1923 | req_task->io_ports[5], | |
1924 | req_task->io_ports[6]); | |
1925 | ||
88523a61 SB |
1926 | if (taskout) { |
1927 | if (copy_to_user(buf + outtotal, outbuf, taskout)) { | |
1928 | err = -EFAULT; | |
1929 | goto abort; | |
1930 | } | |
1931 | } | |
1932 | if (taskin) { | |
1933 | if (copy_to_user(buf + intotal, inbuf, taskin)) { | |
1934 | err = -EFAULT; | |
1935 | goto abort; | |
1936 | } | |
1937 | } | |
1938 | abort: | |
1939 | if (inbuf_dma) | |
1940 | pci_unmap_single(dd->pdev, inbuf_dma, | |
1941 | taskin, DMA_FROM_DEVICE); | |
1942 | if (outbuf_dma) | |
1943 | pci_unmap_single(dd->pdev, outbuf_dma, | |
1944 | taskout, DMA_TO_DEVICE); | |
88523a61 SB |
1945 | kfree(outbuf); |
1946 | kfree(inbuf); | |
1947 | ||
1948 | return err; | |
1949 | } | |
1950 | ||
1951 | /* | |
1952 | * Handle IOCTL calls from the Block Layer. | |
1953 | * | |
1954 | * This function is called by the Block Layer when it receives an IOCTL | |
1955 | * command that it does not understand. If the IOCTL command is not supported | |
1956 | * this function returns -ENOTTY. | |
1957 | * | |
1958 | * @dd Pointer to the driver data structure. | |
1959 | * @cmd IOCTL command passed from the Block Layer. | |
1960 | * @arg IOCTL argument passed from the Block Layer. | |
1961 | * | |
1962 | * return value | |
1963 | * 0 The IOCTL completed successfully. | |
1964 | * -ENOTTY The specified command is not supported. | |
1965 | * -EFAULT An error occurred copying data to a user space buffer. | |
1966 | * -EIO An error occurred while executing the command. | |
1967 | */ | |
ef0f1587 JA |
1968 | static int mtip_hw_ioctl(struct driver_data *dd, unsigned int cmd, |
1969 | unsigned long arg) | |
88523a61 SB |
1970 | { |
1971 | switch (cmd) { | |
1972 | case HDIO_GET_IDENTITY: | |
1973 | if (mtip_get_identify(dd->port, (void __user *) arg) < 0) { | |
1974 | dev_warn(&dd->pdev->dev, | |
1975 | "Unable to read identity\n"); | |
1976 | return -EIO; | |
1977 | } | |
1978 | ||
1979 | break; | |
1980 | case HDIO_DRIVE_CMD: | |
1981 | { | |
1982 | u8 drive_command[4]; | |
1983 | ||
1984 | /* Copy the user command info to our buffer. */ | |
1985 | if (copy_from_user(drive_command, | |
1986 | (void __user *) arg, | |
1987 | sizeof(drive_command))) | |
1988 | return -EFAULT; | |
1989 | ||
1990 | /* Execute the drive command. */ | |
1991 | if (exec_drive_command(dd->port, | |
1992 | drive_command, | |
1993 | (void __user *) (arg+4))) | |
1994 | return -EIO; | |
1995 | ||
1996 | /* Copy the status back to the users buffer. */ | |
1997 | if (copy_to_user((void __user *) arg, | |
1998 | drive_command, | |
1999 | sizeof(drive_command))) | |
2000 | return -EFAULT; | |
2001 | ||
2002 | break; | |
2003 | } | |
2004 | case HDIO_DRIVE_TASK: | |
2005 | { | |
2006 | u8 drive_command[7]; | |
2007 | ||
2008 | /* Copy the user command info to our buffer. */ | |
2009 | if (copy_from_user(drive_command, | |
2010 | (void __user *) arg, | |
2011 | sizeof(drive_command))) | |
2012 | return -EFAULT; | |
2013 | ||
2014 | /* Execute the drive command. */ | |
2015 | if (exec_drive_task(dd->port, drive_command)) | |
2016 | return -EIO; | |
2017 | ||
2018 | /* Copy the status back to the users buffer. */ | |
2019 | if (copy_to_user((void __user *) arg, | |
2020 | drive_command, | |
2021 | sizeof(drive_command))) | |
2022 | return -EFAULT; | |
2023 | ||
2024 | break; | |
2025 | } | |
ef0f1587 JA |
2026 | case HDIO_DRIVE_TASKFILE: { |
2027 | ide_task_request_t req_task; | |
2028 | int ret, outtotal; | |
2029 | ||
2030 | if (copy_from_user(&req_task, (void __user *) arg, | |
2031 | sizeof(req_task))) | |
2032 | return -EFAULT; | |
2033 | ||
2034 | outtotal = sizeof(req_task); | |
2035 | ||
2036 | ret = exec_drive_taskfile(dd, (void __user *) arg, | |
2037 | &req_task, outtotal); | |
2038 | ||
60ec0eec AT |
2039 | if (copy_to_user((void __user *) arg, &req_task, |
2040 | sizeof(req_task))) | |
ef0f1587 JA |
2041 | return -EFAULT; |
2042 | ||
2043 | return ret; | |
2044 | } | |
88523a61 SB |
2045 | |
2046 | default: | |
2047 | return -EINVAL; | |
2048 | } | |
2049 | return 0; | |
2050 | } | |
2051 | ||
2052 | /* | |
2053 | * Submit an IO to the hw | |
2054 | * | |
2055 | * This function is called by the block layer to issue an io | |
2056 | * to the device. Upon completion, the callback function will | |
2057 | * be called with the data parameter passed as the callback data. | |
2058 | * | |
2059 | * @dd Pointer to the driver data structure. | |
2060 | * @start First sector to read. | |
2061 | * @nsect Number of sectors to read. | |
2062 | * @nents Number of entries in scatter list for the read command. | |
2063 | * @tag The tag of this read command. | |
2064 | * @callback Pointer to the function that should be called | |
2065 | * when the read completes. | |
2066 | * @data Callback data passed to the callback function | |
2067 | * when the read completes. | |
2068 | * @barrier If non-zero, this command must be completed before | |
2069 | * issuing any other commands. | |
2070 | * @dir Direction (read or write) | |
2071 | * | |
2072 | * return value | |
2073 | * None | |
2074 | */ | |
6316668f JA |
2075 | static void mtip_hw_submit_io(struct driver_data *dd, sector_t start, |
2076 | int nsect, int nents, int tag, void *callback, | |
2077 | void *data, int barrier, int dir) | |
88523a61 SB |
2078 | { |
2079 | struct host_to_dev_fis *fis; | |
2080 | struct mtip_port *port = dd->port; | |
2081 | struct mtip_cmd *command = &port->commands[tag]; | |
2082 | ||
2083 | /* Map the scatter list for DMA access */ | |
2084 | if (dir == READ) | |
2085 | nents = dma_map_sg(&dd->pdev->dev, command->sg, | |
2086 | nents, DMA_FROM_DEVICE); | |
2087 | else | |
2088 | nents = dma_map_sg(&dd->pdev->dev, command->sg, | |
2089 | nents, DMA_TO_DEVICE); | |
2090 | ||
2091 | command->scatter_ents = nents; | |
2092 | ||
2093 | /* | |
2094 | * The number of retries for this command before it is | |
2095 | * reported as a failure to the upper layers. | |
2096 | */ | |
2097 | command->retries = MTIP_MAX_RETRIES; | |
2098 | ||
2099 | /* Fill out fis */ | |
2100 | fis = command->command; | |
2101 | fis->type = 0x27; | |
2102 | fis->opts = 1 << 7; | |
2103 | fis->command = | |
2104 | (dir == READ ? ATA_CMD_FPDMA_READ : ATA_CMD_FPDMA_WRITE); | |
60ec0eec AT |
2105 | *((unsigned int *) &fis->lba_low) = (start & 0xFFFFFF); |
2106 | *((unsigned int *) &fis->lba_low_ex) = ((start >> 24) & 0xFFFFFF); | |
88523a61 SB |
2107 | fis->device = 1 << 6; |
2108 | if (barrier) | |
2109 | fis->device |= FUA_BIT; | |
60ec0eec AT |
2110 | fis->features = nsect & 0xFF; |
2111 | fis->features_ex = (nsect >> 8) & 0xFF; | |
88523a61 SB |
2112 | fis->sect_count = ((tag << 3) | (tag >> 5)); |
2113 | fis->sect_cnt_ex = 0; | |
2114 | fis->control = 0; | |
2115 | fis->res2 = 0; | |
2116 | fis->res3 = 0; | |
2117 | fill_command_sg(dd, command, nents); | |
2118 | ||
2119 | /* Populate the command header */ | |
60ec0eec AT |
2120 | command->command_header->opts = |
2121 | __force_bit2int cpu_to_le32( | |
2122 | (nents << 16) | 5 | AHCI_CMD_PREFETCH); | |
88523a61 SB |
2123 | command->command_header->byte_count = 0; |
2124 | ||
2125 | /* | |
2126 | * Set the completion function and data for the command | |
2127 | * within this layer. | |
2128 | */ | |
2129 | command->comp_data = dd; | |
2130 | command->comp_func = mtip_async_complete; | |
2131 | command->direction = (dir == READ ? DMA_FROM_DEVICE : DMA_TO_DEVICE); | |
2132 | ||
2133 | /* | |
2134 | * Set the completion function and data for the command passed | |
2135 | * from the upper layer. | |
2136 | */ | |
2137 | command->async_data = data; | |
2138 | command->async_callback = callback; | |
2139 | ||
2140 | /* | |
60ec0eec AT |
2141 | * To prevent this command from being issued |
2142 | * if an internal command is in progress or error handling is active. | |
88523a61 | 2143 | */ |
60ec0eec AT |
2144 | if (unlikely(test_bit(MTIP_FLAG_IC_ACTIVE_BIT, &port->flags) || |
2145 | test_bit(MTIP_FLAG_EH_ACTIVE_BIT, &port->flags))) { | |
2146 | set_bit(tag, port->cmds_to_issue); | |
2147 | set_bit(MTIP_FLAG_ISSUE_CMDS_BIT, &port->flags); | |
2148 | return; | |
2149 | } | |
88523a61 SB |
2150 | |
2151 | /* Issue the command to the hardware */ | |
2152 | mtip_issue_ncq_command(port, tag); | |
2153 | ||
2154 | /* Set the command's timeout value.*/ | |
2155 | port->commands[tag].comp_time = jiffies + msecs_to_jiffies( | |
2156 | MTIP_NCQ_COMMAND_TIMEOUT_MS); | |
88523a61 SB |
2157 | } |
2158 | ||
2159 | /* | |
2160 | * Release a command slot. | |
2161 | * | |
2162 | * @dd Pointer to the driver data structure. | |
2163 | * @tag Slot tag | |
2164 | * | |
2165 | * return value | |
2166 | * None | |
2167 | */ | |
6316668f | 2168 | static void mtip_hw_release_scatterlist(struct driver_data *dd, int tag) |
88523a61 SB |
2169 | { |
2170 | release_slot(dd->port, tag); | |
2171 | } | |
2172 | ||
2173 | /* | |
2174 | * Obtain a command slot and return its associated scatter list. | |
2175 | * | |
2176 | * @dd Pointer to the driver data structure. | |
2177 | * @tag Pointer to an int that will receive the allocated command | |
2178 | * slot tag. | |
2179 | * | |
2180 | * return value | |
2181 | * Pointer to the scatter list for the allocated command slot | |
2182 | * or NULL if no command slots are available. | |
2183 | */ | |
6316668f JA |
2184 | static struct scatterlist *mtip_hw_get_scatterlist(struct driver_data *dd, |
2185 | int *tag) | |
88523a61 SB |
2186 | { |
2187 | /* | |
2188 | * It is possible that, even with this semaphore, a thread | |
2189 | * may think that no command slots are available. Therefore, we | |
2190 | * need to make an attempt to get_slot(). | |
2191 | */ | |
2192 | down(&dd->port->cmd_slot); | |
2193 | *tag = get_slot(dd->port); | |
2194 | ||
2195 | if (unlikely(*tag < 0)) | |
2196 | return NULL; | |
2197 | ||
2198 | return dd->port->commands[*tag].sg; | |
2199 | } | |
2200 | ||
2201 | /* | |
2202 | * Sysfs register/status dump. | |
2203 | * | |
2204 | * @dev Pointer to the device structure, passed by the kernrel. | |
2205 | * @attr Pointer to the device_attribute structure passed by the kernel. | |
2206 | * @buf Pointer to the char buffer that will receive the stats info. | |
2207 | * | |
2208 | * return value | |
2209 | * The size, in bytes, of the data copied into buf. | |
2210 | */ | |
2211 | static ssize_t hw_show_registers(struct device *dev, | |
2212 | struct device_attribute *attr, | |
2213 | char *buf) | |
2214 | { | |
2215 | u32 group_allocated; | |
2216 | struct driver_data *dd = dev_to_disk(dev)->private_data; | |
2217 | int size = 0; | |
2218 | int n; | |
2219 | ||
2220 | size += sprintf(&buf[size], "%s:\ns_active:\n", __func__); | |
2221 | ||
2222 | for (n = 0; n < dd->slot_groups; n++) | |
2223 | size += sprintf(&buf[size], "0x%08x\n", | |
2224 | readl(dd->port->s_active[n])); | |
2225 | ||
2226 | size += sprintf(&buf[size], "Command Issue:\n"); | |
2227 | ||
2228 | for (n = 0; n < dd->slot_groups; n++) | |
2229 | size += sprintf(&buf[size], "0x%08x\n", | |
2230 | readl(dd->port->cmd_issue[n])); | |
2231 | ||
2232 | size += sprintf(&buf[size], "Allocated:\n"); | |
2233 | ||
2234 | for (n = 0; n < dd->slot_groups; n++) { | |
2235 | if (sizeof(long) > sizeof(u32)) | |
2236 | group_allocated = | |
2237 | dd->port->allocated[n/2] >> (32*(n&1)); | |
2238 | else | |
2239 | group_allocated = dd->port->allocated[n]; | |
2240 | size += sprintf(&buf[size], "0x%08x\n", | |
2241 | group_allocated); | |
2242 | } | |
2243 | ||
2244 | size += sprintf(&buf[size], "completed:\n"); | |
2245 | ||
2246 | for (n = 0; n < dd->slot_groups; n++) | |
2247 | size += sprintf(&buf[size], "0x%08x\n", | |
2248 | readl(dd->port->completed[n])); | |
2249 | ||
2250 | size += sprintf(&buf[size], "PORT_IRQ_STAT 0x%08x\n", | |
2251 | readl(dd->port->mmio + PORT_IRQ_STAT)); | |
2252 | size += sprintf(&buf[size], "HOST_IRQ_STAT 0x%08x\n", | |
2253 | readl(dd->mmio + HOST_IRQ_STAT)); | |
2254 | ||
2255 | return size; | |
2256 | } | |
2257 | static DEVICE_ATTR(registers, S_IRUGO, hw_show_registers, NULL); | |
2258 | ||
2259 | /* | |
2260 | * Create the sysfs related attributes. | |
2261 | * | |
2262 | * @dd Pointer to the driver data structure. | |
2263 | * @kobj Pointer to the kobj for the block device. | |
2264 | * | |
2265 | * return value | |
2266 | * 0 Operation completed successfully. | |
2267 | * -EINVAL Invalid parameter. | |
2268 | */ | |
6316668f | 2269 | static int mtip_hw_sysfs_init(struct driver_data *dd, struct kobject *kobj) |
88523a61 SB |
2270 | { |
2271 | if (!kobj || !dd) | |
2272 | return -EINVAL; | |
2273 | ||
2274 | if (sysfs_create_file(kobj, &dev_attr_registers.attr)) | |
2275 | dev_warn(&dd->pdev->dev, | |
2276 | "Error creating registers sysfs entry\n"); | |
2277 | return 0; | |
2278 | } | |
2279 | ||
2280 | /* | |
2281 | * Remove the sysfs related attributes. | |
2282 | * | |
2283 | * @dd Pointer to the driver data structure. | |
2284 | * @kobj Pointer to the kobj for the block device. | |
2285 | * | |
2286 | * return value | |
2287 | * 0 Operation completed successfully. | |
2288 | * -EINVAL Invalid parameter. | |
2289 | */ | |
6316668f | 2290 | static int mtip_hw_sysfs_exit(struct driver_data *dd, struct kobject *kobj) |
88523a61 SB |
2291 | { |
2292 | if (!kobj || !dd) | |
2293 | return -EINVAL; | |
2294 | ||
2295 | sysfs_remove_file(kobj, &dev_attr_registers.attr); | |
2296 | ||
2297 | return 0; | |
2298 | } | |
2299 | ||
2300 | /* | |
2301 | * Perform any init/resume time hardware setup | |
2302 | * | |
2303 | * @dd Pointer to the driver data structure. | |
2304 | * | |
2305 | * return value | |
2306 | * None | |
2307 | */ | |
2308 | static inline void hba_setup(struct driver_data *dd) | |
2309 | { | |
2310 | u32 hwdata; | |
2311 | hwdata = readl(dd->mmio + HOST_HSORG); | |
2312 | ||
2313 | /* interrupt bug workaround: use only 1 IS bit.*/ | |
2314 | writel(hwdata | | |
2315 | HSORG_DISABLE_SLOTGRP_INTR | | |
2316 | HSORG_DISABLE_SLOTGRP_PXIS, | |
2317 | dd->mmio + HOST_HSORG); | |
2318 | } | |
2319 | ||
2320 | /* | |
2321 | * Detect the details of the product, and store anything needed | |
2322 | * into the driver data structure. This includes product type and | |
2323 | * version and number of slot groups. | |
2324 | * | |
2325 | * @dd Pointer to the driver data structure. | |
2326 | * | |
2327 | * return value | |
2328 | * None | |
2329 | */ | |
2330 | static void mtip_detect_product(struct driver_data *dd) | |
2331 | { | |
2332 | u32 hwdata; | |
2333 | unsigned int rev, slotgroups; | |
2334 | ||
2335 | /* | |
2336 | * HBA base + 0xFC [15:0] - vendor-specific hardware interface | |
2337 | * info register: | |
2338 | * [15:8] hardware/software interface rev# | |
2339 | * [ 3] asic-style interface | |
2340 | * [ 2:0] number of slot groups, minus 1 (only valid for asic-style). | |
2341 | */ | |
2342 | hwdata = readl(dd->mmio + HOST_HSORG); | |
2343 | ||
2344 | dd->product_type = MTIP_PRODUCT_UNKNOWN; | |
2345 | dd->slot_groups = 1; | |
2346 | ||
2347 | if (hwdata & 0x8) { | |
2348 | dd->product_type = MTIP_PRODUCT_ASICFPGA; | |
2349 | rev = (hwdata & HSORG_HWREV) >> 8; | |
2350 | slotgroups = (hwdata & HSORG_SLOTGROUPS) + 1; | |
2351 | dev_info(&dd->pdev->dev, | |
2352 | "ASIC-FPGA design, HS rev 0x%x, " | |
2353 | "%i slot groups [%i slots]\n", | |
2354 | rev, | |
2355 | slotgroups, | |
2356 | slotgroups * 32); | |
2357 | ||
2358 | if (slotgroups > MTIP_MAX_SLOT_GROUPS) { | |
2359 | dev_warn(&dd->pdev->dev, | |
2360 | "Warning: driver only supports " | |
2361 | "%i slot groups.\n", MTIP_MAX_SLOT_GROUPS); | |
2362 | slotgroups = MTIP_MAX_SLOT_GROUPS; | |
2363 | } | |
2364 | dd->slot_groups = slotgroups; | |
2365 | return; | |
2366 | } | |
2367 | ||
2368 | dev_warn(&dd->pdev->dev, "Unrecognized product id\n"); | |
2369 | } | |
2370 | ||
2371 | /* | |
2372 | * Blocking wait for FTL rebuild to complete | |
2373 | * | |
2374 | * @dd Pointer to the DRIVER_DATA structure. | |
2375 | * | |
2376 | * return value | |
2377 | * 0 FTL rebuild completed successfully | |
2378 | * -EFAULT FTL rebuild error/timeout/interruption | |
2379 | */ | |
2380 | static int mtip_ftl_rebuild_poll(struct driver_data *dd) | |
2381 | { | |
2382 | unsigned long timeout, cnt = 0, start; | |
2383 | ||
2384 | dev_warn(&dd->pdev->dev, | |
2385 | "FTL rebuild in progress. Polling for completion.\n"); | |
2386 | ||
2387 | start = jiffies; | |
2388 | dd->ftlrebuildflag = 1; | |
2389 | timeout = jiffies + msecs_to_jiffies(MTIP_FTL_REBUILD_TIMEOUT_MS); | |
2390 | ||
2391 | do { | |
88523a61 SB |
2392 | if (mtip_check_surprise_removal(dd->pdev)) |
2393 | return -EFAULT; | |
60ec0eec | 2394 | |
88523a61 SB |
2395 | if (mtip_get_identify(dd->port, NULL) < 0) |
2396 | return -EFAULT; | |
2397 | ||
2398 | if (*(dd->port->identify + MTIP_FTL_REBUILD_OFFSET) == | |
2399 | MTIP_FTL_REBUILD_MAGIC) { | |
2400 | ssleep(1); | |
2401 | /* Print message every 3 minutes */ | |
2402 | if (cnt++ >= 180) { | |
2403 | dev_warn(&dd->pdev->dev, | |
2404 | "FTL rebuild in progress (%d secs).\n", | |
2405 | jiffies_to_msecs(jiffies - start) / 1000); | |
2406 | cnt = 0; | |
2407 | } | |
2408 | } else { | |
2409 | dev_warn(&dd->pdev->dev, | |
2410 | "FTL rebuild complete (%d secs).\n", | |
2411 | jiffies_to_msecs(jiffies - start) / 1000); | |
2412 | dd->ftlrebuildflag = 0; | |
2413 | break; | |
2414 | } | |
2415 | ssleep(10); | |
2416 | } while (time_before(jiffies, timeout)); | |
2417 | ||
2418 | /* Check for timeout */ | |
2419 | if (dd->ftlrebuildflag) { | |
2420 | dev_err(&dd->pdev->dev, | |
2421 | "Timed out waiting for FTL rebuild to complete (%d secs).\n", | |
2422 | jiffies_to_msecs(jiffies - start) / 1000); | |
2423 | return -EFAULT; | |
2424 | } | |
2425 | ||
2426 | return 0; | |
2427 | } | |
2428 | ||
60ec0eec AT |
2429 | /* |
2430 | * service thread to issue queued commands | |
2431 | * | |
2432 | * @data Pointer to the driver data structure. | |
2433 | * | |
2434 | * return value | |
2435 | * 0 | |
2436 | */ | |
2437 | ||
2438 | static int mtip_service_thread(void *data) | |
2439 | { | |
2440 | struct driver_data *dd = (struct driver_data *)data; | |
2441 | unsigned long slot, slot_start, slot_wrap; | |
2442 | unsigned int num_cmd_slots = dd->slot_groups * 32; | |
2443 | struct mtip_port *port = dd->port; | |
2444 | ||
2445 | while (1) { | |
2446 | /* | |
2447 | * the condition is to check neither an internal command is | |
2448 | * is in progress nor error handling is active | |
2449 | */ | |
2450 | wait_event_interruptible(port->svc_wait, (port->flags) && | |
2451 | !test_bit(MTIP_FLAG_IC_ACTIVE_BIT, &port->flags) && | |
2452 | !test_bit(MTIP_FLAG_EH_ACTIVE_BIT, &port->flags)); | |
2453 | ||
2454 | if (kthread_should_stop()) | |
2455 | break; | |
2456 | ||
2457 | if (test_bit(MTIP_FLAG_ISSUE_CMDS_BIT, &port->flags)) { | |
2458 | set_bit(MTIP_FLAG_SVC_THD_ACTIVE_BIT, &port->flags); | |
2459 | slot = 1; | |
2460 | /* used to restrict the loop to one iteration */ | |
2461 | slot_start = num_cmd_slots; | |
2462 | slot_wrap = 0; | |
2463 | while (1) { | |
2464 | slot = find_next_bit(port->cmds_to_issue, | |
2465 | num_cmd_slots, slot); | |
2466 | if (slot_wrap == 1) { | |
2467 | if ((slot_start >= slot) || | |
2468 | (slot >= num_cmd_slots)) | |
2469 | break; | |
2470 | } | |
2471 | if (unlikely(slot_start == num_cmd_slots)) | |
2472 | slot_start = slot; | |
2473 | ||
2474 | if (unlikely(slot == num_cmd_slots)) { | |
2475 | slot = 1; | |
2476 | slot_wrap = 1; | |
2477 | continue; | |
2478 | } | |
2479 | ||
2480 | /* Issue the command to the hardware */ | |
2481 | mtip_issue_ncq_command(port, slot); | |
2482 | ||
2483 | /* Set the command's timeout value.*/ | |
2484 | port->commands[slot].comp_time = jiffies + | |
2485 | msecs_to_jiffies(MTIP_NCQ_COMMAND_TIMEOUT_MS); | |
2486 | ||
2487 | clear_bit(slot, port->cmds_to_issue); | |
2488 | } | |
2489 | ||
2490 | clear_bit(MTIP_FLAG_ISSUE_CMDS_BIT, &port->flags); | |
2491 | clear_bit(MTIP_FLAG_SVC_THD_ACTIVE_BIT, &port->flags); | |
2492 | } | |
2493 | } | |
2494 | return 0; | |
2495 | } | |
2496 | ||
88523a61 SB |
2497 | /* |
2498 | * Called once for each card. | |
2499 | * | |
2500 | * @dd Pointer to the driver data structure. | |
2501 | * | |
2502 | * return value | |
2503 | * 0 on success, else an error code. | |
2504 | */ | |
6316668f | 2505 | static int mtip_hw_init(struct driver_data *dd) |
88523a61 SB |
2506 | { |
2507 | int i; | |
2508 | int rv; | |
2509 | unsigned int num_command_slots; | |
2510 | ||
2511 | dd->mmio = pcim_iomap_table(dd->pdev)[MTIP_ABAR]; | |
2512 | ||
2513 | mtip_detect_product(dd); | |
2514 | if (dd->product_type == MTIP_PRODUCT_UNKNOWN) { | |
2515 | rv = -EIO; | |
2516 | goto out1; | |
2517 | } | |
2518 | num_command_slots = dd->slot_groups * 32; | |
2519 | ||
2520 | hba_setup(dd); | |
2521 | ||
88523a61 SB |
2522 | tasklet_init(&dd->tasklet, mtip_tasklet, (unsigned long)dd); |
2523 | ||
2524 | dd->port = kzalloc(sizeof(struct mtip_port), GFP_KERNEL); | |
2525 | if (!dd->port) { | |
2526 | dev_err(&dd->pdev->dev, | |
2527 | "Memory allocation: port structure\n"); | |
2528 | return -ENOMEM; | |
2529 | } | |
2530 | ||
2531 | /* Counting semaphore to track command slot usage */ | |
2532 | sema_init(&dd->port->cmd_slot, num_command_slots - 1); | |
2533 | ||
2534 | /* Spinlock to prevent concurrent issue */ | |
2535 | spin_lock_init(&dd->port->cmd_issue_lock); | |
2536 | ||
2537 | /* Set the port mmio base address. */ | |
2538 | dd->port->mmio = dd->mmio + PORT_OFFSET; | |
2539 | dd->port->dd = dd; | |
2540 | ||
2541 | /* Allocate memory for the command list. */ | |
2542 | dd->port->command_list = | |
2543 | dmam_alloc_coherent(&dd->pdev->dev, | |
2544 | HW_PORT_PRIV_DMA_SZ + (ATA_SECT_SIZE * 2), | |
2545 | &dd->port->command_list_dma, | |
2546 | GFP_KERNEL); | |
2547 | if (!dd->port->command_list) { | |
2548 | dev_err(&dd->pdev->dev, | |
2549 | "Memory allocation: command list\n"); | |
2550 | rv = -ENOMEM; | |
2551 | goto out1; | |
2552 | } | |
2553 | ||
2554 | /* Clear the memory we have allocated. */ | |
2555 | memset(dd->port->command_list, | |
2556 | 0, | |
2557 | HW_PORT_PRIV_DMA_SZ + (ATA_SECT_SIZE * 2)); | |
2558 | ||
2559 | /* Setup the addresse of the RX FIS. */ | |
2560 | dd->port->rxfis = dd->port->command_list + HW_CMD_SLOT_SZ; | |
2561 | dd->port->rxfis_dma = dd->port->command_list_dma + HW_CMD_SLOT_SZ; | |
2562 | ||
2563 | /* Setup the address of the command tables. */ | |
2564 | dd->port->command_table = dd->port->rxfis + AHCI_RX_FIS_SZ; | |
2565 | dd->port->command_tbl_dma = dd->port->rxfis_dma + AHCI_RX_FIS_SZ; | |
2566 | ||
2567 | /* Setup the address of the identify data. */ | |
2568 | dd->port->identify = dd->port->command_table + | |
2569 | HW_CMD_TBL_AR_SZ; | |
2570 | dd->port->identify_dma = dd->port->command_tbl_dma + | |
2571 | HW_CMD_TBL_AR_SZ; | |
2572 | ||
2573 | /* Setup the address of the sector buffer. */ | |
2574 | dd->port->sector_buffer = (void *) dd->port->identify + ATA_SECT_SIZE; | |
2575 | dd->port->sector_buffer_dma = dd->port->identify_dma + ATA_SECT_SIZE; | |
2576 | ||
2577 | /* Point the command headers at the command tables. */ | |
2578 | for (i = 0; i < num_command_slots; i++) { | |
2579 | dd->port->commands[i].command_header = | |
2580 | dd->port->command_list + | |
2581 | (sizeof(struct mtip_cmd_hdr) * i); | |
2582 | dd->port->commands[i].command_header_dma = | |
2583 | dd->port->command_list_dma + | |
2584 | (sizeof(struct mtip_cmd_hdr) * i); | |
2585 | ||
2586 | dd->port->commands[i].command = | |
2587 | dd->port->command_table + (HW_CMD_TBL_SZ * i); | |
2588 | dd->port->commands[i].command_dma = | |
2589 | dd->port->command_tbl_dma + (HW_CMD_TBL_SZ * i); | |
2590 | ||
2591 | if (readl(dd->mmio + HOST_CAP) & HOST_CAP_64) | |
2592 | dd->port->commands[i].command_header->ctbau = | |
60ec0eec | 2593 | __force_bit2int cpu_to_le32( |
88523a61 | 2594 | (dd->port->commands[i].command_dma >> 16) >> 16); |
60ec0eec AT |
2595 | dd->port->commands[i].command_header->ctba = |
2596 | __force_bit2int cpu_to_le32( | |
2597 | dd->port->commands[i].command_dma & 0xFFFFFFFF); | |
88523a61 SB |
2598 | |
2599 | /* | |
2600 | * If this is not done, a bug is reported by the stock | |
2601 | * FC11 i386. Due to the fact that it has lots of kernel | |
2602 | * debugging enabled. | |
2603 | */ | |
2604 | sg_init_table(dd->port->commands[i].sg, MTIP_MAX_SG); | |
2605 | ||
2606 | /* Mark all commands as currently inactive.*/ | |
2607 | atomic_set(&dd->port->commands[i].active, 0); | |
2608 | } | |
2609 | ||
2610 | /* Setup the pointers to the extended s_active and CI registers. */ | |
2611 | for (i = 0; i < dd->slot_groups; i++) { | |
2612 | dd->port->s_active[i] = | |
2613 | dd->port->mmio + i*0x80 + PORT_SCR_ACT; | |
2614 | dd->port->cmd_issue[i] = | |
2615 | dd->port->mmio + i*0x80 + PORT_COMMAND_ISSUE; | |
2616 | dd->port->completed[i] = | |
2617 | dd->port->mmio + i*0x80 + PORT_SDBV; | |
2618 | } | |
2619 | ||
2620 | /* Reset the HBA. */ | |
2621 | if (mtip_hba_reset(dd) < 0) { | |
2622 | dev_err(&dd->pdev->dev, | |
2623 | "Card did not reset within timeout\n"); | |
2624 | rv = -EIO; | |
2625 | goto out2; | |
2626 | } | |
2627 | ||
2628 | mtip_init_port(dd->port); | |
2629 | mtip_start_port(dd->port); | |
2630 | ||
2631 | /* Setup the ISR and enable interrupts. */ | |
2632 | rv = devm_request_irq(&dd->pdev->dev, | |
2633 | dd->pdev->irq, | |
2634 | mtip_irq_handler, | |
2635 | IRQF_SHARED, | |
2636 | dev_driver_string(&dd->pdev->dev), | |
2637 | dd); | |
2638 | ||
2639 | if (rv) { | |
2640 | dev_err(&dd->pdev->dev, | |
2641 | "Unable to allocate IRQ %d\n", dd->pdev->irq); | |
2642 | goto out2; | |
2643 | } | |
2644 | ||
2645 | /* Enable interrupts on the HBA. */ | |
2646 | writel(readl(dd->mmio + HOST_CTL) | HOST_IRQ_EN, | |
2647 | dd->mmio + HOST_CTL); | |
2648 | ||
2649 | init_timer(&dd->port->cmd_timer); | |
60ec0eec AT |
2650 | init_waitqueue_head(&dd->port->svc_wait); |
2651 | ||
88523a61 SB |
2652 | dd->port->cmd_timer.data = (unsigned long int) dd->port; |
2653 | dd->port->cmd_timer.function = mtip_timeout_function; | |
2654 | mod_timer(&dd->port->cmd_timer, | |
2655 | jiffies + msecs_to_jiffies(MTIP_TIMEOUT_CHECK_PERIOD)); | |
2656 | ||
2657 | if (mtip_get_identify(dd->port, NULL) < 0) { | |
2658 | rv = -EFAULT; | |
2659 | goto out3; | |
2660 | } | |
2661 | mtip_dump_identify(dd->port); | |
2662 | ||
2663 | if (*(dd->port->identify + MTIP_FTL_REBUILD_OFFSET) == | |
2664 | MTIP_FTL_REBUILD_MAGIC) { | |
2665 | return mtip_ftl_rebuild_poll(dd); | |
2666 | } | |
2667 | return rv; | |
2668 | ||
2669 | out3: | |
2670 | del_timer_sync(&dd->port->cmd_timer); | |
2671 | ||
2672 | /* Disable interrupts on the HBA. */ | |
2673 | writel(readl(dd->mmio + HOST_CTL) & ~HOST_IRQ_EN, | |
2674 | dd->mmio + HOST_CTL); | |
2675 | ||
2676 | /*Release the IRQ. */ | |
2677 | devm_free_irq(&dd->pdev->dev, dd->pdev->irq, dd); | |
2678 | ||
2679 | out2: | |
2680 | mtip_deinit_port(dd->port); | |
2681 | ||
2682 | /* Free the command/command header memory. */ | |
2683 | dmam_free_coherent(&dd->pdev->dev, | |
2684 | HW_PORT_PRIV_DMA_SZ + (ATA_SECT_SIZE * 2), | |
2685 | dd->port->command_list, | |
2686 | dd->port->command_list_dma); | |
2687 | out1: | |
2688 | /* Free the memory allocated for the for structure. */ | |
2689 | kfree(dd->port); | |
2690 | ||
2691 | return rv; | |
2692 | } | |
2693 | ||
2694 | /* | |
2695 | * Called to deinitialize an interface. | |
2696 | * | |
2697 | * @dd Pointer to the driver data structure. | |
2698 | * | |
2699 | * return value | |
2700 | * 0 | |
2701 | */ | |
6316668f | 2702 | static int mtip_hw_exit(struct driver_data *dd) |
88523a61 SB |
2703 | { |
2704 | /* | |
2705 | * Send standby immediate (E0h) to the drive so that it | |
2706 | * saves its state. | |
2707 | */ | |
2708 | if (atomic_read(&dd->drv_cleanup_done) != true) { | |
2709 | ||
2710 | mtip_standby_immediate(dd->port); | |
2711 | ||
2712 | /* de-initialize the port. */ | |
2713 | mtip_deinit_port(dd->port); | |
2714 | ||
2715 | /* Disable interrupts on the HBA. */ | |
2716 | writel(readl(dd->mmio + HOST_CTL) & ~HOST_IRQ_EN, | |
2717 | dd->mmio + HOST_CTL); | |
2718 | } | |
2719 | ||
2720 | del_timer_sync(&dd->port->cmd_timer); | |
2721 | ||
88523a61 SB |
2722 | /* Release the IRQ. */ |
2723 | devm_free_irq(&dd->pdev->dev, dd->pdev->irq, dd); | |
2724 | ||
60ec0eec AT |
2725 | /* Stop the bottom half tasklet. */ |
2726 | tasklet_kill(&dd->tasklet); | |
2727 | ||
88523a61 SB |
2728 | /* Free the command/command header memory. */ |
2729 | dmam_free_coherent(&dd->pdev->dev, | |
2730 | HW_PORT_PRIV_DMA_SZ + (ATA_SECT_SIZE * 2), | |
2731 | dd->port->command_list, | |
2732 | dd->port->command_list_dma); | |
2733 | /* Free the memory allocated for the for structure. */ | |
2734 | kfree(dd->port); | |
2735 | ||
2736 | return 0; | |
2737 | } | |
2738 | ||
2739 | /* | |
2740 | * Issue a Standby Immediate command to the device. | |
2741 | * | |
2742 | * This function is called by the Block Layer just before the | |
2743 | * system powers off during a shutdown. | |
2744 | * | |
2745 | * @dd Pointer to the driver data structure. | |
2746 | * | |
2747 | * return value | |
2748 | * 0 | |
2749 | */ | |
6316668f | 2750 | static int mtip_hw_shutdown(struct driver_data *dd) |
88523a61 SB |
2751 | { |
2752 | /* | |
2753 | * Send standby immediate (E0h) to the drive so that it | |
2754 | * saves its state. | |
2755 | */ | |
2756 | mtip_standby_immediate(dd->port); | |
2757 | ||
2758 | return 0; | |
2759 | } | |
2760 | ||
2761 | /* | |
2762 | * Suspend function | |
2763 | * | |
2764 | * This function is called by the Block Layer just before the | |
2765 | * system hibernates. | |
2766 | * | |
2767 | * @dd Pointer to the driver data structure. | |
2768 | * | |
2769 | * return value | |
2770 | * 0 Suspend was successful | |
2771 | * -EFAULT Suspend was not successful | |
2772 | */ | |
6316668f | 2773 | static int mtip_hw_suspend(struct driver_data *dd) |
88523a61 SB |
2774 | { |
2775 | /* | |
2776 | * Send standby immediate (E0h) to the drive | |
2777 | * so that it saves its state. | |
2778 | */ | |
2779 | if (mtip_standby_immediate(dd->port) != 0) { | |
2780 | dev_err(&dd->pdev->dev, | |
2781 | "Failed standby-immediate command\n"); | |
2782 | return -EFAULT; | |
2783 | } | |
2784 | ||
2785 | /* Disable interrupts on the HBA.*/ | |
2786 | writel(readl(dd->mmio + HOST_CTL) & ~HOST_IRQ_EN, | |
2787 | dd->mmio + HOST_CTL); | |
2788 | mtip_deinit_port(dd->port); | |
2789 | ||
2790 | return 0; | |
2791 | } | |
2792 | ||
2793 | /* | |
2794 | * Resume function | |
2795 | * | |
2796 | * This function is called by the Block Layer as the | |
2797 | * system resumes. | |
2798 | * | |
2799 | * @dd Pointer to the driver data structure. | |
2800 | * | |
2801 | * return value | |
2802 | * 0 Resume was successful | |
2803 | * -EFAULT Resume was not successful | |
2804 | */ | |
6316668f | 2805 | static int mtip_hw_resume(struct driver_data *dd) |
88523a61 SB |
2806 | { |
2807 | /* Perform any needed hardware setup steps */ | |
2808 | hba_setup(dd); | |
2809 | ||
2810 | /* Reset the HBA */ | |
2811 | if (mtip_hba_reset(dd) != 0) { | |
2812 | dev_err(&dd->pdev->dev, | |
2813 | "Unable to reset the HBA\n"); | |
2814 | return -EFAULT; | |
2815 | } | |
2816 | ||
2817 | /* | |
2818 | * Enable the port, DMA engine, and FIS reception specific | |
2819 | * h/w in controller. | |
2820 | */ | |
2821 | mtip_init_port(dd->port); | |
2822 | mtip_start_port(dd->port); | |
2823 | ||
2824 | /* Enable interrupts on the HBA.*/ | |
2825 | writel(readl(dd->mmio + HOST_CTL) | HOST_IRQ_EN, | |
2826 | dd->mmio + HOST_CTL); | |
2827 | ||
2828 | return 0; | |
2829 | } | |
2830 | ||
88523a61 SB |
2831 | /* |
2832 | * Helper function for reusing disk name | |
2833 | * upon hot insertion. | |
2834 | */ | |
2835 | static int rssd_disk_name_format(char *prefix, | |
2836 | int index, | |
2837 | char *buf, | |
2838 | int buflen) | |
2839 | { | |
2840 | const int base = 'z' - 'a' + 1; | |
2841 | char *begin = buf + strlen(prefix); | |
2842 | char *end = buf + buflen; | |
2843 | char *p; | |
2844 | int unit; | |
2845 | ||
2846 | p = end - 1; | |
2847 | *p = '\0'; | |
2848 | unit = base; | |
2849 | do { | |
2850 | if (p == begin) | |
2851 | return -EINVAL; | |
2852 | *--p = 'a' + (index % unit); | |
2853 | index = (index / unit) - 1; | |
2854 | } while (index >= 0); | |
2855 | ||
2856 | memmove(begin, p, end - p); | |
2857 | memcpy(buf, prefix, strlen(prefix)); | |
2858 | ||
2859 | return 0; | |
2860 | } | |
2861 | ||
2862 | /* | |
2863 | * Block layer IOCTL handler. | |
2864 | * | |
2865 | * @dev Pointer to the block_device structure. | |
2866 | * @mode ignored | |
2867 | * @cmd IOCTL command passed from the user application. | |
2868 | * @arg Argument passed from the user application. | |
2869 | * | |
2870 | * return value | |
2871 | * 0 IOCTL completed successfully. | |
2872 | * -ENOTTY IOCTL not supported or invalid driver data | |
2873 | * structure pointer. | |
2874 | */ | |
2875 | static int mtip_block_ioctl(struct block_device *dev, | |
2876 | fmode_t mode, | |
2877 | unsigned cmd, | |
2878 | unsigned long arg) | |
2879 | { | |
2880 | struct driver_data *dd = dev->bd_disk->private_data; | |
2881 | ||
2882 | if (!capable(CAP_SYS_ADMIN)) | |
2883 | return -EACCES; | |
2884 | ||
2885 | if (!dd) | |
2886 | return -ENOTTY; | |
2887 | ||
2888 | switch (cmd) { | |
2889 | case BLKFLSBUF: | |
60ec0eec | 2890 | return -ENOTTY; |
88523a61 | 2891 | default: |
ef0f1587 | 2892 | return mtip_hw_ioctl(dd, cmd, arg); |
88523a61 SB |
2893 | } |
2894 | } | |
2895 | ||
16d02c04 | 2896 | #ifdef CONFIG_COMPAT |
88523a61 SB |
2897 | /* |
2898 | * Block layer compat IOCTL handler. | |
2899 | * | |
2900 | * @dev Pointer to the block_device structure. | |
2901 | * @mode ignored | |
2902 | * @cmd IOCTL command passed from the user application. | |
2903 | * @arg Argument passed from the user application. | |
2904 | * | |
2905 | * return value | |
2906 | * 0 IOCTL completed successfully. | |
2907 | * -ENOTTY IOCTL not supported or invalid driver data | |
2908 | * structure pointer. | |
2909 | */ | |
2910 | static int mtip_block_compat_ioctl(struct block_device *dev, | |
2911 | fmode_t mode, | |
2912 | unsigned cmd, | |
2913 | unsigned long arg) | |
2914 | { | |
2915 | struct driver_data *dd = dev->bd_disk->private_data; | |
2916 | ||
2917 | if (!capable(CAP_SYS_ADMIN)) | |
2918 | return -EACCES; | |
2919 | ||
2920 | if (!dd) | |
2921 | return -ENOTTY; | |
2922 | ||
2923 | switch (cmd) { | |
2924 | case BLKFLSBUF: | |
60ec0eec | 2925 | return -ENOTTY; |
ef0f1587 | 2926 | case HDIO_DRIVE_TASKFILE: { |
60ec0eec | 2927 | struct mtip_compat_ide_task_request_s __user *compat_req_task; |
ef0f1587 JA |
2928 | ide_task_request_t req_task; |
2929 | int compat_tasksize, outtotal, ret; | |
2930 | ||
60ec0eec AT |
2931 | compat_tasksize = |
2932 | sizeof(struct mtip_compat_ide_task_request_s); | |
ef0f1587 JA |
2933 | |
2934 | compat_req_task = | |
2935 | (struct mtip_compat_ide_task_request_s __user *) arg; | |
2936 | ||
2937 | if (copy_from_user(&req_task, (void __user *) arg, | |
60ec0eec | 2938 | compat_tasksize - (2 * sizeof(compat_long_t)))) |
ef0f1587 JA |
2939 | return -EFAULT; |
2940 | ||
2941 | if (get_user(req_task.out_size, &compat_req_task->out_size)) | |
2942 | return -EFAULT; | |
2943 | ||
2944 | if (get_user(req_task.in_size, &compat_req_task->in_size)) | |
2945 | return -EFAULT; | |
2946 | ||
2947 | outtotal = sizeof(struct mtip_compat_ide_task_request_s); | |
2948 | ||
2949 | ret = exec_drive_taskfile(dd, (void __user *) arg, | |
2950 | &req_task, outtotal); | |
2951 | ||
2952 | if (copy_to_user((void __user *) arg, &req_task, | |
2953 | compat_tasksize - | |
2954 | (2 * sizeof(compat_long_t)))) | |
2955 | return -EFAULT; | |
2956 | ||
2957 | if (put_user(req_task.out_size, &compat_req_task->out_size)) | |
2958 | return -EFAULT; | |
2959 | ||
2960 | if (put_user(req_task.in_size, &compat_req_task->in_size)) | |
2961 | return -EFAULT; | |
2962 | ||
2963 | return ret; | |
2964 | } | |
88523a61 | 2965 | default: |
ef0f1587 | 2966 | return mtip_hw_ioctl(dd, cmd, arg); |
88523a61 SB |
2967 | } |
2968 | } | |
16d02c04 | 2969 | #endif |
88523a61 SB |
2970 | |
2971 | /* | |
2972 | * Obtain the geometry of the device. | |
2973 | * | |
2974 | * You may think that this function is obsolete, but some applications, | |
2975 | * fdisk for example still used CHS values. This function describes the | |
2976 | * device as having 224 heads and 56 sectors per cylinder. These values are | |
2977 | * chosen so that each cylinder is aligned on a 4KB boundary. Since a | |
2978 | * partition is described in terms of a start and end cylinder this means | |
2979 | * that each partition is also 4KB aligned. Non-aligned partitions adversely | |
2980 | * affects performance. | |
2981 | * | |
2982 | * @dev Pointer to the block_device strucutre. | |
2983 | * @geo Pointer to a hd_geometry structure. | |
2984 | * | |
2985 | * return value | |
2986 | * 0 Operation completed successfully. | |
2987 | * -ENOTTY An error occurred while reading the drive capacity. | |
2988 | */ | |
2989 | static int mtip_block_getgeo(struct block_device *dev, | |
2990 | struct hd_geometry *geo) | |
2991 | { | |
2992 | struct driver_data *dd = dev->bd_disk->private_data; | |
2993 | sector_t capacity; | |
2994 | ||
2995 | if (!dd) | |
2996 | return -ENOTTY; | |
2997 | ||
2998 | if (!(mtip_hw_get_capacity(dd, &capacity))) { | |
2999 | dev_warn(&dd->pdev->dev, | |
3000 | "Could not get drive capacity.\n"); | |
3001 | return -ENOTTY; | |
3002 | } | |
3003 | ||
3004 | geo->heads = 224; | |
3005 | geo->sectors = 56; | |
60ec0eec | 3006 | sector_div(capacity, (geo->heads * geo->sectors)); |
88523a61 | 3007 | geo->cylinders = capacity; |
88523a61 SB |
3008 | return 0; |
3009 | } | |
3010 | ||
3011 | /* | |
3012 | * Block device operation function. | |
3013 | * | |
3014 | * This structure contains pointers to the functions required by the block | |
3015 | * layer. | |
3016 | */ | |
3017 | static const struct block_device_operations mtip_block_ops = { | |
3018 | .ioctl = mtip_block_ioctl, | |
16d02c04 | 3019 | #ifdef CONFIG_COMPAT |
88523a61 | 3020 | .compat_ioctl = mtip_block_compat_ioctl, |
16d02c04 | 3021 | #endif |
88523a61 SB |
3022 | .getgeo = mtip_block_getgeo, |
3023 | .owner = THIS_MODULE | |
3024 | }; | |
3025 | ||
3026 | /* | |
3027 | * Block layer make request function. | |
3028 | * | |
3029 | * This function is called by the kernel to process a BIO for | |
3030 | * the P320 device. | |
3031 | * | |
3032 | * @queue Pointer to the request queue. Unused other than to obtain | |
3033 | * the driver data structure. | |
3034 | * @bio Pointer to the BIO. | |
3035 | * | |
88523a61 | 3036 | */ |
a71f483d | 3037 | static void mtip_make_request(struct request_queue *queue, struct bio *bio) |
88523a61 SB |
3038 | { |
3039 | struct driver_data *dd = queue->queuedata; | |
3040 | struct scatterlist *sg; | |
3041 | struct bio_vec *bvec; | |
3042 | int nents = 0; | |
3043 | int tag = 0; | |
3044 | ||
3045 | if (unlikely(!bio_has_data(bio))) { | |
3046 | blk_queue_flush(queue, 0); | |
3047 | bio_endio(bio, 0); | |
a71f483d | 3048 | return; |
88523a61 SB |
3049 | } |
3050 | ||
88523a61 SB |
3051 | sg = mtip_hw_get_scatterlist(dd, &tag); |
3052 | if (likely(sg != NULL)) { | |
3053 | blk_queue_bounce(queue, &bio); | |
3054 | ||
3055 | if (unlikely((bio)->bi_vcnt > MTIP_MAX_SG)) { | |
3056 | dev_warn(&dd->pdev->dev, | |
3057 | "Maximum number of SGL entries exceeded"); | |
3058 | bio_io_error(bio); | |
3059 | mtip_hw_release_scatterlist(dd, tag); | |
a71f483d | 3060 | return; |
88523a61 SB |
3061 | } |
3062 | ||
3063 | /* Create the scatter list for this bio. */ | |
3064 | bio_for_each_segment(bvec, bio, nents) { | |
3065 | sg_set_page(&sg[nents], | |
3066 | bvec->bv_page, | |
3067 | bvec->bv_len, | |
3068 | bvec->bv_offset); | |
3069 | } | |
3070 | ||
3071 | /* Issue the read/write. */ | |
3072 | mtip_hw_submit_io(dd, | |
3073 | bio->bi_sector, | |
3074 | bio_sectors(bio), | |
3075 | nents, | |
3076 | tag, | |
3077 | bio_endio, | |
3078 | bio, | |
60ec0eec | 3079 | bio->bi_rw & REQ_FUA, |
88523a61 | 3080 | bio_data_dir(bio)); |
a71f483d | 3081 | } else |
88523a61 | 3082 | bio_io_error(bio); |
88523a61 SB |
3083 | } |
3084 | ||
3085 | /* | |
3086 | * Block layer initialization function. | |
3087 | * | |
3088 | * This function is called once by the PCI layer for each P320 | |
3089 | * device that is connected to the system. | |
3090 | * | |
3091 | * @dd Pointer to the driver data structure. | |
3092 | * | |
3093 | * return value | |
3094 | * 0 on success else an error code. | |
3095 | */ | |
6316668f | 3096 | static int mtip_block_initialize(struct driver_data *dd) |
88523a61 SB |
3097 | { |
3098 | int rv = 0; | |
3099 | sector_t capacity; | |
3100 | unsigned int index = 0; | |
3101 | struct kobject *kobj; | |
60ec0eec | 3102 | unsigned char thd_name[16]; |
88523a61 SB |
3103 | |
3104 | /* Initialize the protocol layer. */ | |
3105 | rv = mtip_hw_init(dd); | |
3106 | if (rv < 0) { | |
3107 | dev_err(&dd->pdev->dev, | |
3108 | "Protocol layer initialization failed\n"); | |
3109 | rv = -EINVAL; | |
3110 | goto protocol_init_error; | |
3111 | } | |
3112 | ||
3113 | /* Allocate the request queue. */ | |
3114 | dd->queue = blk_alloc_queue(GFP_KERNEL); | |
3115 | if (dd->queue == NULL) { | |
3116 | dev_err(&dd->pdev->dev, | |
3117 | "Unable to allocate request queue\n"); | |
3118 | rv = -ENOMEM; | |
3119 | goto block_queue_alloc_init_error; | |
3120 | } | |
3121 | ||
3122 | /* Attach our request function to the request queue. */ | |
3123 | blk_queue_make_request(dd->queue, mtip_make_request); | |
3124 | ||
3125 | /* Set device limits. */ | |
3126 | set_bit(QUEUE_FLAG_NONROT, &dd->queue->queue_flags); | |
3127 | blk_queue_max_segments(dd->queue, MTIP_MAX_SG); | |
3128 | blk_queue_physical_block_size(dd->queue, 4096); | |
3129 | blk_queue_io_min(dd->queue, 4096); | |
60ec0eec | 3130 | blk_queue_flush(dd->queue, 0); |
88523a61 SB |
3131 | |
3132 | dd->disk = alloc_disk(MTIP_MAX_MINORS); | |
3133 | if (dd->disk == NULL) { | |
3134 | dev_err(&dd->pdev->dev, | |
3135 | "Unable to allocate gendisk structure\n"); | |
3136 | rv = -EINVAL; | |
3137 | goto alloc_disk_error; | |
3138 | } | |
3139 | ||
3140 | /* Generate the disk name, implemented same as in sd.c */ | |
3141 | do { | |
3142 | if (!ida_pre_get(&rssd_index_ida, GFP_KERNEL)) | |
3143 | goto ida_get_error; | |
3144 | ||
3145 | spin_lock(&rssd_index_lock); | |
3146 | rv = ida_get_new(&rssd_index_ida, &index); | |
3147 | spin_unlock(&rssd_index_lock); | |
3148 | } while (rv == -EAGAIN); | |
3149 | ||
3150 | if (rv) | |
3151 | goto ida_get_error; | |
3152 | ||
3153 | rv = rssd_disk_name_format("rssd", | |
3154 | index, | |
3155 | dd->disk->disk_name, | |
3156 | DISK_NAME_LEN); | |
3157 | if (rv) | |
3158 | goto disk_index_error; | |
3159 | ||
3160 | dd->disk->driverfs_dev = &dd->pdev->dev; | |
3161 | dd->disk->major = dd->major; | |
3162 | dd->disk->first_minor = dd->instance * MTIP_MAX_MINORS; | |
3163 | dd->disk->fops = &mtip_block_ops; | |
3164 | dd->disk->queue = dd->queue; | |
3165 | dd->disk->private_data = dd; | |
3166 | dd->queue->queuedata = dd; | |
3167 | dd->index = index; | |
3168 | ||
3169 | /* Set the capacity of the device in 512 byte sectors. */ | |
3170 | if (!(mtip_hw_get_capacity(dd, &capacity))) { | |
3171 | dev_warn(&dd->pdev->dev, | |
3172 | "Could not read drive capacity\n"); | |
3173 | rv = -EIO; | |
3174 | goto read_capacity_error; | |
3175 | } | |
3176 | set_capacity(dd->disk, capacity); | |
3177 | ||
3178 | /* Enable the block device and add it to /dev */ | |
3179 | add_disk(dd->disk); | |
3180 | ||
3181 | /* | |
3182 | * Now that the disk is active, initialize any sysfs attributes | |
3183 | * managed by the protocol layer. | |
3184 | */ | |
3185 | kobj = kobject_get(&disk_to_dev(dd->disk)->kobj); | |
3186 | if (kobj) { | |
3187 | mtip_hw_sysfs_init(dd, kobj); | |
3188 | kobject_put(kobj); | |
3189 | } | |
3190 | ||
60ec0eec AT |
3191 | sprintf(thd_name, "mtip_svc_thd_%02d", index); |
3192 | ||
3193 | dd->mtip_svc_handler = kthread_run(mtip_service_thread, | |
3194 | dd, thd_name); | |
3195 | ||
3196 | if (IS_ERR(dd->mtip_svc_handler)) { | |
3197 | printk(KERN_ERR "mtip32xx: service thread failed to start\n"); | |
3198 | dd->mtip_svc_handler = NULL; | |
3199 | rv = -EFAULT; | |
3200 | goto read_capacity_error; | |
3201 | } | |
3202 | ||
88523a61 SB |
3203 | return rv; |
3204 | ||
3205 | read_capacity_error: | |
3206 | /* | |
3207 | * Delete our gendisk structure. This also removes the device | |
3208 | * from /dev | |
3209 | */ | |
3210 | del_gendisk(dd->disk); | |
3211 | ||
3212 | disk_index_error: | |
3213 | spin_lock(&rssd_index_lock); | |
3214 | ida_remove(&rssd_index_ida, index); | |
3215 | spin_unlock(&rssd_index_lock); | |
3216 | ||
3217 | ida_get_error: | |
3218 | put_disk(dd->disk); | |
3219 | ||
3220 | alloc_disk_error: | |
3221 | blk_cleanup_queue(dd->queue); | |
3222 | ||
3223 | block_queue_alloc_init_error: | |
3224 | /* De-initialize the protocol layer. */ | |
3225 | mtip_hw_exit(dd); | |
3226 | ||
3227 | protocol_init_error: | |
3228 | return rv; | |
3229 | } | |
3230 | ||
3231 | /* | |
3232 | * Block layer deinitialization function. | |
3233 | * | |
3234 | * Called by the PCI layer as each P320 device is removed. | |
3235 | * | |
3236 | * @dd Pointer to the driver data structure. | |
3237 | * | |
3238 | * return value | |
3239 | * 0 | |
3240 | */ | |
6316668f | 3241 | static int mtip_block_remove(struct driver_data *dd) |
88523a61 SB |
3242 | { |
3243 | struct kobject *kobj; | |
60ec0eec AT |
3244 | |
3245 | if (dd->mtip_svc_handler) { | |
3246 | set_bit(MTIP_FLAG_SVC_THD_SHOULD_STOP_BIT, &dd->port->flags); | |
3247 | wake_up_interruptible(&dd->port->svc_wait); | |
3248 | kthread_stop(dd->mtip_svc_handler); | |
3249 | } | |
3250 | ||
88523a61 SB |
3251 | /* Clean up the sysfs attributes managed by the protocol layer. */ |
3252 | kobj = kobject_get(&disk_to_dev(dd->disk)->kobj); | |
3253 | if (kobj) { | |
3254 | mtip_hw_sysfs_exit(dd, kobj); | |
3255 | kobject_put(kobj); | |
3256 | } | |
3257 | ||
3258 | /* | |
3259 | * Delete our gendisk structure. This also removes the device | |
3260 | * from /dev | |
3261 | */ | |
3262 | del_gendisk(dd->disk); | |
3263 | blk_cleanup_queue(dd->queue); | |
3264 | dd->disk = NULL; | |
3265 | dd->queue = NULL; | |
3266 | ||
3267 | /* De-initialize the protocol layer. */ | |
3268 | mtip_hw_exit(dd); | |
3269 | ||
3270 | return 0; | |
3271 | } | |
3272 | ||
3273 | /* | |
3274 | * Function called by the PCI layer when just before the | |
3275 | * machine shuts down. | |
3276 | * | |
3277 | * If a protocol layer shutdown function is present it will be called | |
3278 | * by this function. | |
3279 | * | |
3280 | * @dd Pointer to the driver data structure. | |
3281 | * | |
3282 | * return value | |
3283 | * 0 | |
3284 | */ | |
6316668f | 3285 | static int mtip_block_shutdown(struct driver_data *dd) |
88523a61 SB |
3286 | { |
3287 | dev_info(&dd->pdev->dev, | |
3288 | "Shutting down %s ...\n", dd->disk->disk_name); | |
3289 | ||
3290 | /* Delete our gendisk structure, and cleanup the blk queue. */ | |
3291 | del_gendisk(dd->disk); | |
3292 | blk_cleanup_queue(dd->queue); | |
3293 | dd->disk = NULL; | |
3294 | dd->queue = NULL; | |
3295 | ||
3296 | mtip_hw_shutdown(dd); | |
3297 | return 0; | |
3298 | } | |
3299 | ||
6316668f | 3300 | static int mtip_block_suspend(struct driver_data *dd) |
88523a61 SB |
3301 | { |
3302 | dev_info(&dd->pdev->dev, | |
3303 | "Suspending %s ...\n", dd->disk->disk_name); | |
3304 | mtip_hw_suspend(dd); | |
3305 | return 0; | |
3306 | } | |
3307 | ||
6316668f | 3308 | static int mtip_block_resume(struct driver_data *dd) |
88523a61 SB |
3309 | { |
3310 | dev_info(&dd->pdev->dev, "Resuming %s ...\n", | |
3311 | dd->disk->disk_name); | |
3312 | mtip_hw_resume(dd); | |
3313 | return 0; | |
3314 | } | |
3315 | ||
3316 | /* | |
3317 | * Called for each supported PCI device detected. | |
3318 | * | |
3319 | * This function allocates the private data structure, enables the | |
3320 | * PCI device and then calls the block layer initialization function. | |
3321 | * | |
3322 | * return value | |
3323 | * 0 on success else an error code. | |
3324 | */ | |
3325 | static int mtip_pci_probe(struct pci_dev *pdev, | |
3326 | const struct pci_device_id *ent) | |
3327 | { | |
3328 | int rv = 0; | |
3329 | struct driver_data *dd = NULL; | |
3330 | ||
3331 | /* Allocate memory for this devices private data. */ | |
3332 | dd = kzalloc(sizeof(struct driver_data), GFP_KERNEL); | |
3333 | if (dd == NULL) { | |
3334 | dev_err(&pdev->dev, | |
3335 | "Unable to allocate memory for driver data\n"); | |
3336 | return -ENOMEM; | |
3337 | } | |
3338 | ||
3339 | /* Set the atomic variable as 1 in case of SRSI */ | |
3340 | atomic_set(&dd->drv_cleanup_done, true); | |
3341 | ||
3342 | atomic_set(&dd->resumeflag, false); | |
88523a61 SB |
3343 | |
3344 | /* Attach the private data to this PCI device. */ | |
3345 | pci_set_drvdata(pdev, dd); | |
3346 | ||
3347 | rv = pcim_enable_device(pdev); | |
3348 | if (rv < 0) { | |
3349 | dev_err(&pdev->dev, "Unable to enable device\n"); | |
3350 | goto iomap_err; | |
3351 | } | |
3352 | ||
3353 | /* Map BAR5 to memory. */ | |
3354 | rv = pcim_iomap_regions(pdev, 1 << MTIP_ABAR, MTIP_DRV_NAME); | |
3355 | if (rv < 0) { | |
3356 | dev_err(&pdev->dev, "Unable to map regions\n"); | |
3357 | goto iomap_err; | |
3358 | } | |
3359 | ||
3360 | if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(64))) { | |
3361 | rv = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64)); | |
3362 | ||
3363 | if (rv) { | |
3364 | rv = pci_set_consistent_dma_mask(pdev, | |
3365 | DMA_BIT_MASK(32)); | |
3366 | if (rv) { | |
3367 | dev_warn(&pdev->dev, | |
3368 | "64-bit DMA enable failed\n"); | |
3369 | goto setmask_err; | |
3370 | } | |
3371 | } | |
3372 | } | |
3373 | ||
3374 | pci_set_master(pdev); | |
3375 | ||
3376 | if (pci_enable_msi(pdev)) { | |
3377 | dev_warn(&pdev->dev, | |
3378 | "Unable to enable MSI interrupt.\n"); | |
3379 | goto block_initialize_err; | |
3380 | } | |
3381 | ||
3382 | /* Copy the info we may need later into the private data structure. */ | |
3383 | dd->major = mtip_major; | |
88523a61 SB |
3384 | dd->instance = instance; |
3385 | dd->pdev = pdev; | |
3386 | ||
3387 | /* Initialize the block layer. */ | |
3388 | rv = mtip_block_initialize(dd); | |
3389 | if (rv < 0) { | |
3390 | dev_err(&pdev->dev, | |
3391 | "Unable to initialize block layer\n"); | |
3392 | goto block_initialize_err; | |
3393 | } | |
3394 | ||
3395 | /* | |
3396 | * Increment the instance count so that each device has a unique | |
3397 | * instance number. | |
3398 | */ | |
3399 | instance++; | |
3400 | ||
3401 | goto done; | |
3402 | ||
3403 | block_initialize_err: | |
3404 | pci_disable_msi(pdev); | |
3405 | ||
3406 | setmask_err: | |
3407 | pcim_iounmap_regions(pdev, 1 << MTIP_ABAR); | |
3408 | ||
3409 | iomap_err: | |
3410 | kfree(dd); | |
3411 | pci_set_drvdata(pdev, NULL); | |
3412 | return rv; | |
3413 | done: | |
3414 | /* Set the atomic variable as 0 in case of SRSI */ | |
3415 | atomic_set(&dd->drv_cleanup_done, true); | |
3416 | ||
3417 | return rv; | |
3418 | } | |
3419 | ||
3420 | /* | |
3421 | * Called for each probed device when the device is removed or the | |
3422 | * driver is unloaded. | |
3423 | * | |
3424 | * return value | |
3425 | * None | |
3426 | */ | |
3427 | static void mtip_pci_remove(struct pci_dev *pdev) | |
3428 | { | |
3429 | struct driver_data *dd = pci_get_drvdata(pdev); | |
3430 | int counter = 0; | |
3431 | ||
3432 | if (mtip_check_surprise_removal(pdev)) { | |
3433 | while (atomic_read(&dd->drv_cleanup_done) == false) { | |
3434 | counter++; | |
3435 | msleep(20); | |
3436 | if (counter == 10) { | |
3437 | /* Cleanup the outstanding commands */ | |
3438 | mtip_command_cleanup(dd); | |
3439 | break; | |
3440 | } | |
3441 | } | |
3442 | } | |
3443 | /* Set the atomic variable as 1 in case of SRSI */ | |
3444 | atomic_set(&dd->drv_cleanup_done, true); | |
3445 | ||
3446 | /* Clean up the block layer. */ | |
3447 | mtip_block_remove(dd); | |
3448 | ||
3449 | pci_disable_msi(pdev); | |
3450 | ||
3451 | kfree(dd); | |
3452 | pcim_iounmap_regions(pdev, 1 << MTIP_ABAR); | |
3453 | } | |
3454 | ||
3455 | /* | |
3456 | * Called for each probed device when the device is suspended. | |
3457 | * | |
3458 | * return value | |
3459 | * 0 Success | |
3460 | * <0 Error | |
3461 | */ | |
3462 | static int mtip_pci_suspend(struct pci_dev *pdev, pm_message_t mesg) | |
3463 | { | |
3464 | int rv = 0; | |
3465 | struct driver_data *dd = pci_get_drvdata(pdev); | |
3466 | ||
3467 | if (!dd) { | |
3468 | dev_err(&pdev->dev, | |
3469 | "Driver private datastructure is NULL\n"); | |
3470 | return -EFAULT; | |
3471 | } | |
3472 | ||
3473 | atomic_set(&dd->resumeflag, true); | |
3474 | ||
3475 | /* Disable ports & interrupts then send standby immediate */ | |
3476 | rv = mtip_block_suspend(dd); | |
3477 | if (rv < 0) { | |
3478 | dev_err(&pdev->dev, | |
3479 | "Failed to suspend controller\n"); | |
3480 | return rv; | |
3481 | } | |
3482 | ||
3483 | /* | |
3484 | * Save the pci config space to pdev structure & | |
3485 | * disable the device | |
3486 | */ | |
3487 | pci_save_state(pdev); | |
3488 | pci_disable_device(pdev); | |
3489 | ||
3490 | /* Move to Low power state*/ | |
3491 | pci_set_power_state(pdev, PCI_D3hot); | |
3492 | ||
3493 | return rv; | |
3494 | } | |
3495 | ||
3496 | /* | |
3497 | * Called for each probed device when the device is resumed. | |
3498 | * | |
3499 | * return value | |
3500 | * 0 Success | |
3501 | * <0 Error | |
3502 | */ | |
3503 | static int mtip_pci_resume(struct pci_dev *pdev) | |
3504 | { | |
3505 | int rv = 0; | |
3506 | struct driver_data *dd; | |
3507 | ||
3508 | dd = pci_get_drvdata(pdev); | |
3509 | if (!dd) { | |
3510 | dev_err(&pdev->dev, | |
3511 | "Driver private datastructure is NULL\n"); | |
3512 | return -EFAULT; | |
3513 | } | |
3514 | ||
3515 | /* Move the device to active State */ | |
3516 | pci_set_power_state(pdev, PCI_D0); | |
3517 | ||
3518 | /* Restore PCI configuration space */ | |
3519 | pci_restore_state(pdev); | |
3520 | ||
3521 | /* Enable the PCI device*/ | |
3522 | rv = pcim_enable_device(pdev); | |
3523 | if (rv < 0) { | |
3524 | dev_err(&pdev->dev, | |
3525 | "Failed to enable card during resume\n"); | |
3526 | goto err; | |
3527 | } | |
3528 | pci_set_master(pdev); | |
3529 | ||
3530 | /* | |
3531 | * Calls hbaReset, initPort, & startPort function | |
3532 | * then enables interrupts | |
3533 | */ | |
3534 | rv = mtip_block_resume(dd); | |
3535 | if (rv < 0) | |
3536 | dev_err(&pdev->dev, "Unable to resume\n"); | |
3537 | ||
3538 | err: | |
3539 | atomic_set(&dd->resumeflag, false); | |
3540 | ||
3541 | return rv; | |
3542 | } | |
3543 | ||
3544 | /* | |
3545 | * Shutdown routine | |
3546 | * | |
3547 | * return value | |
3548 | * None | |
3549 | */ | |
3550 | static void mtip_pci_shutdown(struct pci_dev *pdev) | |
3551 | { | |
3552 | struct driver_data *dd = pci_get_drvdata(pdev); | |
3553 | if (dd) | |
3554 | mtip_block_shutdown(dd); | |
3555 | } | |
3556 | ||
88523a61 SB |
3557 | /* Table of device ids supported by this driver. */ |
3558 | static DEFINE_PCI_DEVICE_TABLE(mtip_pci_tbl) = { | |
3559 | { PCI_DEVICE(PCI_VENDOR_ID_MICRON, P320_DEVICE_ID) }, | |
3560 | { 0 } | |
3561 | }; | |
3562 | ||
3563 | /* Structure that describes the PCI driver functions. */ | |
3ff147d3 | 3564 | static struct pci_driver mtip_pci_driver = { |
88523a61 SB |
3565 | .name = MTIP_DRV_NAME, |
3566 | .id_table = mtip_pci_tbl, | |
3567 | .probe = mtip_pci_probe, | |
3568 | .remove = mtip_pci_remove, | |
3569 | .suspend = mtip_pci_suspend, | |
3570 | .resume = mtip_pci_resume, | |
3571 | .shutdown = mtip_pci_shutdown, | |
3572 | }; | |
3573 | ||
3574 | MODULE_DEVICE_TABLE(pci, mtip_pci_tbl); | |
3575 | ||
3576 | /* | |
3577 | * Module initialization function. | |
3578 | * | |
3579 | * Called once when the module is loaded. This function allocates a major | |
3580 | * block device number to the Cyclone devices and registers the PCI layer | |
3581 | * of the driver. | |
3582 | * | |
3583 | * Return value | |
3584 | * 0 on success else error code. | |
3585 | */ | |
3586 | static int __init mtip_init(void) | |
3587 | { | |
3588 | printk(KERN_INFO MTIP_DRV_NAME " Version " MTIP_DRV_VERSION "\n"); | |
3589 | ||
3590 | /* Allocate a major block device number to use with this driver. */ | |
3591 | mtip_major = register_blkdev(0, MTIP_DRV_NAME); | |
3592 | if (mtip_major < 0) { | |
3593 | printk(KERN_ERR "Unable to register block device (%d)\n", | |
3594 | mtip_major); | |
3595 | return -EBUSY; | |
3596 | } | |
3597 | ||
3598 | /* Register our PCI operations. */ | |
3599 | return pci_register_driver(&mtip_pci_driver); | |
3600 | } | |
3601 | ||
3602 | /* | |
3603 | * Module de-initialization function. | |
3604 | * | |
3605 | * Called once when the module is unloaded. This function deallocates | |
3606 | * the major block device number allocated by mtip_init() and | |
3607 | * unregisters the PCI layer of the driver. | |
3608 | * | |
3609 | * Return value | |
3610 | * none | |
3611 | */ | |
3612 | static void __exit mtip_exit(void) | |
3613 | { | |
3614 | /* Release the allocated major block device number. */ | |
3615 | unregister_blkdev(mtip_major, MTIP_DRV_NAME); | |
3616 | ||
3617 | /* Unregister the PCI driver. */ | |
3618 | pci_unregister_driver(&mtip_pci_driver); | |
3619 | } | |
3620 | ||
3621 | MODULE_AUTHOR("Micron Technology, Inc"); | |
3622 | MODULE_DESCRIPTION("Micron RealSSD PCIe Block Driver"); | |
3623 | MODULE_LICENSE("GPL"); | |
3624 | MODULE_VERSION(MTIP_DRV_VERSION); | |
3625 | ||
3626 | module_init(mtip_init); | |
3627 | module_exit(mtip_exit); |