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88523a61 SB |
1 | /* |
2 | * Driver for the Micron P320 SSD | |
3 | * Copyright (C) 2011 Micron Technology, Inc. | |
4 | * | |
5 | * Portions of this code were derived from works subjected to the | |
6 | * following copyright: | |
7 | * Copyright (C) 2009 Integrated Device Technology, Inc. | |
8 | * | |
9 | * This program is free software; you can redistribute it and/or modify | |
10 | * it under the terms of the GNU General Public License as published by | |
11 | * the Free Software Foundation; either version 2 of the License, or | |
12 | * (at your option) any later version. | |
13 | * | |
14 | * This program is distributed in the hope that it will be useful, | |
15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
17 | * GNU General Public License for more details. | |
18 | * | |
19 | */ | |
20 | ||
21 | #include <linux/pci.h> | |
22 | #include <linux/interrupt.h> | |
23 | #include <linux/ata.h> | |
24 | #include <linux/delay.h> | |
25 | #include <linux/hdreg.h> | |
26 | #include <linux/uaccess.h> | |
27 | #include <linux/random.h> | |
28 | #include <linux/smp.h> | |
29 | #include <linux/compat.h> | |
30 | #include <linux/fs.h> | |
0e838c62 | 31 | #include <linux/module.h> |
88523a61 SB |
32 | #include <linux/genhd.h> |
33 | #include <linux/blkdev.h> | |
34 | #include <linux/bio.h> | |
35 | #include <linux/dma-mapping.h> | |
36 | #include <linux/idr.h> | |
60ec0eec | 37 | #include <linux/kthread.h> |
88523a61 | 38 | #include <../drivers/ata/ahci.h> |
45038367 | 39 | #include <linux/export.h> |
7b421d24 | 40 | #include <linux/debugfs.h> |
88523a61 SB |
41 | #include "mtip32xx.h" |
42 | ||
43 | #define HW_CMD_SLOT_SZ (MTIP_MAX_COMMAND_SLOTS * 32) | |
188b9f49 SB |
44 | |
45 | /* DMA region containing RX Fis, Identify, RLE10, and SMART buffers */ | |
46 | #define AHCI_RX_FIS_SZ 0x100 | |
47 | #define AHCI_RX_FIS_OFFSET 0x0 | |
48 | #define AHCI_IDFY_SZ ATA_SECT_SIZE | |
49 | #define AHCI_IDFY_OFFSET 0x400 | |
50 | #define AHCI_SECTBUF_SZ ATA_SECT_SIZE | |
51 | #define AHCI_SECTBUF_OFFSET 0x800 | |
52 | #define AHCI_SMARTBUF_SZ ATA_SECT_SIZE | |
53 | #define AHCI_SMARTBUF_OFFSET 0xC00 | |
54 | /* 0x100 + 0x200 + 0x200 + 0x200 is smaller than 4k but we pad it out */ | |
55 | #define BLOCK_DMA_ALLOC_SZ 4096 | |
56 | ||
57 | /* DMA region containing command table (should be 8192 bytes) */ | |
58 | #define AHCI_CMD_SLOT_SZ sizeof(struct mtip_cmd_hdr) | |
59 | #define AHCI_CMD_TBL_SZ (MTIP_MAX_COMMAND_SLOTS * AHCI_CMD_SLOT_SZ) | |
60 | #define AHCI_CMD_TBL_OFFSET 0x0 | |
61 | ||
62 | /* DMA region per command (contains header and SGL) */ | |
63 | #define AHCI_CMD_TBL_HDR_SZ 0x80 | |
64 | #define AHCI_CMD_TBL_HDR_OFFSET 0x0 | |
65 | #define AHCI_CMD_TBL_SGL_SZ (MTIP_MAX_SG * sizeof(struct mtip_cmd_sg)) | |
66 | #define AHCI_CMD_TBL_SGL_OFFSET AHCI_CMD_TBL_HDR_SZ | |
67 | #define CMD_DMA_ALLOC_SZ (AHCI_CMD_TBL_SGL_SZ + AHCI_CMD_TBL_HDR_SZ) | |
68 | ||
88523a61 | 69 | |
45038367 | 70 | #define HOST_CAP_NZDMA (1 << 19) |
88523a61 SB |
71 | #define HOST_HSORG 0xFC |
72 | #define HSORG_DISABLE_SLOTGRP_INTR (1<<24) | |
73 | #define HSORG_DISABLE_SLOTGRP_PXIS (1<<16) | |
74 | #define HSORG_HWREV 0xFF00 | |
75 | #define HSORG_STYLE 0x8 | |
76 | #define HSORG_SLOTGROUPS 0x7 | |
77 | ||
78 | #define PORT_COMMAND_ISSUE 0x38 | |
79 | #define PORT_SDBV 0x7C | |
80 | ||
81 | #define PORT_OFFSET 0x100 | |
82 | #define PORT_MEM_SIZE 0x80 | |
83 | ||
84 | #define PORT_IRQ_ERR \ | |
85 | (PORT_IRQ_HBUS_ERR | PORT_IRQ_IF_ERR | PORT_IRQ_CONNECT | \ | |
86 | PORT_IRQ_PHYRDY | PORT_IRQ_UNK_FIS | PORT_IRQ_BAD_PMP | \ | |
87 | PORT_IRQ_TF_ERR | PORT_IRQ_HBUS_DATA_ERR | PORT_IRQ_IF_NONFATAL | \ | |
88 | PORT_IRQ_OVERFLOW) | |
89 | #define PORT_IRQ_LEGACY \ | |
90 | (PORT_IRQ_PIOS_FIS | PORT_IRQ_D2H_REG_FIS) | |
91 | #define PORT_IRQ_HANDLED \ | |
92 | (PORT_IRQ_SDB_FIS | PORT_IRQ_LEGACY | \ | |
93 | PORT_IRQ_TF_ERR | PORT_IRQ_IF_ERR | \ | |
94 | PORT_IRQ_CONNECT | PORT_IRQ_PHYRDY) | |
95 | #define DEF_PORT_IRQ \ | |
96 | (PORT_IRQ_ERR | PORT_IRQ_LEGACY | PORT_IRQ_SDB_FIS) | |
97 | ||
98 | /* product numbers */ | |
99 | #define MTIP_PRODUCT_UNKNOWN 0x00 | |
100 | #define MTIP_PRODUCT_ASICFPGA 0x11 | |
101 | ||
102 | /* Device instance number, incremented each time a device is probed. */ | |
103 | static int instance; | |
104 | ||
0caff003 AT |
105 | struct list_head online_list; |
106 | struct list_head removing_list; | |
107 | spinlock_t dev_lock; | |
108 | ||
88523a61 SB |
109 | /* |
110 | * Global variable used to hold the major block device number | |
111 | * allocated in mtip_init(). | |
112 | */ | |
3ff147d3 | 113 | static int mtip_major; |
7b421d24 | 114 | static struct dentry *dfs_parent; |
0caff003 | 115 | static struct dentry *dfs_device_status; |
88523a61 | 116 | |
16c906e5 AT |
117 | static u32 cpu_use[NR_CPUS]; |
118 | ||
88523a61 SB |
119 | static DEFINE_SPINLOCK(rssd_index_lock); |
120 | static DEFINE_IDA(rssd_index_ida); | |
121 | ||
62ee8c13 AT |
122 | static int mtip_block_initialize(struct driver_data *dd); |
123 | ||
16d02c04 | 124 | #ifdef CONFIG_COMPAT |
88523a61 SB |
125 | struct mtip_compat_ide_task_request_s { |
126 | __u8 io_ports[8]; | |
127 | __u8 hob_ports[8]; | |
128 | ide_reg_valid_t out_flags; | |
129 | ide_reg_valid_t in_flags; | |
130 | int data_phase; | |
131 | int req_cmd; | |
132 | compat_ulong_t out_size; | |
133 | compat_ulong_t in_size; | |
134 | }; | |
16d02c04 | 135 | #endif |
88523a61 | 136 | |
6316668f JA |
137 | /* |
138 | * This function check_for_surprise_removal is called | |
139 | * while card is removed from the system and it will | |
140 | * read the vendor id from the configration space | |
141 | * | |
142 | * @pdev Pointer to the pci_dev structure. | |
143 | * | |
144 | * return value | |
145 | * true if device removed, else false | |
146 | */ | |
147 | static bool mtip_check_surprise_removal(struct pci_dev *pdev) | |
148 | { | |
149 | u16 vendor_id = 0; | |
8f8b8995 AT |
150 | struct driver_data *dd = pci_get_drvdata(pdev); |
151 | ||
152 | if (dd->sr) | |
153 | return true; | |
6316668f JA |
154 | |
155 | /* Read the vendorID from the configuration space */ | |
156 | pci_read_config_word(pdev, 0x00, &vendor_id); | |
8f8b8995 AT |
157 | if (vendor_id == 0xFFFF) { |
158 | dd->sr = true; | |
159 | if (dd->queue) | |
160 | set_bit(QUEUE_FLAG_DEAD, &dd->queue->queue_flags); | |
161 | else | |
162 | dev_warn(&dd->pdev->dev, | |
163 | "%s: dd->queue is NULL\n", __func__); | |
164 | if (dd->port) { | |
165 | set_bit(MTIP_PF_SR_CLEANUP_BIT, &dd->port->flags); | |
166 | wake_up_interruptible(&dd->port->svc_wait); | |
167 | } else | |
168 | dev_warn(&dd->pdev->dev, | |
169 | "%s: dd->port is NULL\n", __func__); | |
6316668f | 170 | return true; /* device removed */ |
6316668f JA |
171 | } |
172 | ||
8f8b8995 | 173 | return false; /* device present */ |
6316668f JA |
174 | } |
175 | ||
88523a61 SB |
176 | /* |
177 | * Obtain an empty command slot. | |
178 | * | |
179 | * This function needs to be reentrant since it could be called | |
180 | * at the same time on multiple CPUs. The allocation of the | |
181 | * command slot must be atomic. | |
182 | * | |
183 | * @port Pointer to the port data structure. | |
184 | * | |
185 | * return value | |
186 | * >= 0 Index of command slot obtained. | |
187 | * -1 No command slots available. | |
188 | */ | |
189 | static int get_slot(struct mtip_port *port) | |
190 | { | |
191 | int slot, i; | |
192 | unsigned int num_command_slots = port->dd->slot_groups * 32; | |
193 | ||
194 | /* | |
195 | * Try 10 times, because there is a small race here. | |
196 | * that's ok, because it's still cheaper than a lock. | |
197 | * | |
198 | * Race: Since this section is not protected by lock, same bit | |
199 | * could be chosen by different process contexts running in | |
200 | * different processor. So instead of costly lock, we are going | |
201 | * with loop. | |
202 | */ | |
203 | for (i = 0; i < 10; i++) { | |
204 | slot = find_next_zero_bit(port->allocated, | |
205 | num_command_slots, 1); | |
206 | if ((slot < num_command_slots) && | |
207 | (!test_and_set_bit(slot, port->allocated))) | |
208 | return slot; | |
209 | } | |
210 | dev_warn(&port->dd->pdev->dev, "Failed to get a tag.\n"); | |
211 | ||
8f8b8995 | 212 | mtip_check_surprise_removal(port->dd->pdev); |
88523a61 SB |
213 | return -1; |
214 | } | |
215 | ||
216 | /* | |
217 | * Release a command slot. | |
218 | * | |
219 | * @port Pointer to the port data structure. | |
220 | * @tag Tag of command to release | |
221 | * | |
222 | * return value | |
223 | * None | |
224 | */ | |
225 | static inline void release_slot(struct mtip_port *port, int tag) | |
226 | { | |
227 | smp_mb__before_clear_bit(); | |
228 | clear_bit(tag, port->allocated); | |
229 | smp_mb__after_clear_bit(); | |
230 | } | |
231 | ||
8f8b8995 AT |
232 | /* |
233 | * IO completion function. | |
234 | * | |
235 | * This completion function is called by the driver ISR when a | |
236 | * command that was issued by the kernel completes. It first calls the | |
237 | * asynchronous completion function which normally calls back into the block | |
238 | * layer passing the asynchronous callback data, then unmaps the | |
239 | * scatter list associated with the completed command, and finally | |
240 | * clears the allocated bit associated with the completed command. | |
241 | * | |
242 | * @port Pointer to the port data structure. | |
243 | * @tag Tag of the command. | |
244 | * @data Pointer to driver_data. | |
245 | * @status Completion status. | |
246 | * | |
247 | * return value | |
248 | * None | |
249 | */ | |
250 | static void mtip_async_complete(struct mtip_port *port, | |
251 | int tag, | |
252 | void *data, | |
253 | int status) | |
254 | { | |
5eb9291c | 255 | struct mtip_cmd *cmd; |
8f8b8995 | 256 | struct driver_data *dd = data; |
5eb9291c SB |
257 | int unaligned, cb_status = status ? -EIO : 0; |
258 | void (*func)(void *, int); | |
8f8b8995 AT |
259 | |
260 | if (unlikely(!dd) || unlikely(!port)) | |
261 | return; | |
262 | ||
5eb9291c | 263 | cmd = &port->commands[tag]; |
8f8b8995 AT |
264 | |
265 | if (unlikely(status == PORT_IRQ_TF_ERR)) { | |
266 | dev_warn(&port->dd->pdev->dev, | |
267 | "Command tag %d failed due to TFE\n", tag); | |
268 | } | |
269 | ||
5eb9291c SB |
270 | /* Clear the active flag */ |
271 | atomic_set(&port->commands[tag].active, 0); | |
368c89d7 | 272 | |
8f8b8995 | 273 | /* Upper layer callback */ |
5eb9291c SB |
274 | func = cmd->async_callback; |
275 | if (likely(func && cmpxchg(&cmd->async_callback, func, 0) == func)) { | |
8f8b8995 | 276 | |
5eb9291c SB |
277 | /* Unmap the DMA scatter list entries */ |
278 | dma_unmap_sg(&dd->pdev->dev, | |
279 | cmd->sg, | |
280 | cmd->scatter_ents, | |
281 | cmd->direction); | |
8f8b8995 | 282 | |
5eb9291c SB |
283 | func(cmd->async_data, cb_status); |
284 | unaligned = cmd->unaligned; | |
8f8b8995 | 285 | |
5eb9291c SB |
286 | /* Clear the allocated bit for the command */ |
287 | release_slot(port, tag); | |
8f8b8995 | 288 | |
5eb9291c SB |
289 | if (unlikely(unaligned)) |
290 | up(&port->cmd_slot_unal); | |
291 | else | |
292 | up(&port->cmd_slot); | |
293 | } | |
8f8b8995 AT |
294 | } |
295 | ||
296 | /* | |
297 | * This function is called for clean the pending command in the | |
298 | * command slot during the surprise removal of device and return | |
299 | * error to the upper layer. | |
300 | * | |
301 | * @dd Pointer to the DRIVER_DATA structure. | |
302 | * | |
303 | * return value | |
304 | * None | |
305 | */ | |
306 | static void mtip_command_cleanup(struct driver_data *dd) | |
307 | { | |
308 | int tag = 0; | |
309 | struct mtip_cmd *cmd; | |
310 | struct mtip_port *port = dd->port; | |
311 | unsigned int num_cmd_slots = dd->slot_groups * 32; | |
312 | ||
313 | if (!test_bit(MTIP_DDF_INIT_DONE_BIT, &dd->dd_flag)) | |
314 | return; | |
315 | ||
316 | if (!port) | |
317 | return; | |
318 | ||
319 | cmd = &port->commands[MTIP_TAG_INTERNAL]; | |
320 | if (atomic_read(&cmd->active)) | |
321 | if (readl(port->cmd_issue[MTIP_TAG_INTERNAL]) & | |
322 | (1 << MTIP_TAG_INTERNAL)) | |
323 | if (cmd->comp_func) | |
324 | cmd->comp_func(port, MTIP_TAG_INTERNAL, | |
325 | cmd->comp_data, -ENODEV); | |
326 | ||
327 | while (1) { | |
328 | tag = find_next_bit(port->allocated, num_cmd_slots, tag); | |
329 | if (tag >= num_cmd_slots) | |
330 | break; | |
331 | ||
332 | cmd = &port->commands[tag]; | |
333 | if (atomic_read(&cmd->active)) | |
334 | mtip_async_complete(port, tag, dd, -ENODEV); | |
335 | } | |
336 | ||
337 | set_bit(MTIP_DDF_CLEANUP_BIT, &dd->dd_flag); | |
338 | } | |
339 | ||
88523a61 | 340 | /* |
6316668f | 341 | * Reset the HBA (without sleeping) |
88523a61 | 342 | * |
6316668f | 343 | * @dd Pointer to the driver data structure. |
88523a61 SB |
344 | * |
345 | * return value | |
6316668f JA |
346 | * 0 The reset was successful. |
347 | * -1 The HBA Reset bit did not clear. | |
88523a61 | 348 | */ |
d0d096b1 | 349 | static int mtip_hba_reset(struct driver_data *dd) |
88523a61 | 350 | { |
6316668f | 351 | unsigned long timeout; |
88523a61 | 352 | |
6316668f JA |
353 | /* Set the reset bit */ |
354 | writel(HOST_RESET, dd->mmio + HOST_CTL); | |
88523a61 | 355 | |
6316668f JA |
356 | /* Flush */ |
357 | readl(dd->mmio + HOST_CTL); | |
88523a61 | 358 | |
d0d096b1 AT |
359 | /* Spin for up to 2 seconds, waiting for reset acknowledgement */ |
360 | timeout = jiffies + msecs_to_jiffies(2000); | |
361 | do { | |
362 | mdelay(10); | |
363 | if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag)) | |
364 | return -1; | |
88523a61 | 365 | |
d0d096b1 AT |
366 | } while ((readl(dd->mmio + HOST_CTL) & HOST_RESET) |
367 | && time_before(jiffies, timeout)); | |
45038367 | 368 | |
6316668f JA |
369 | if (readl(dd->mmio + HOST_CTL) & HOST_RESET) |
370 | return -1; | |
88523a61 | 371 | |
6316668f | 372 | return 0; |
88523a61 SB |
373 | } |
374 | ||
375 | /* | |
6316668f | 376 | * Issue a command to the hardware. |
88523a61 | 377 | * |
6316668f JA |
378 | * Set the appropriate bit in the s_active and Command Issue hardware |
379 | * registers, causing hardware command processing to begin. | |
88523a61 | 380 | * |
6316668f JA |
381 | * @port Pointer to the port structure. |
382 | * @tag The tag of the command to be issued. | |
88523a61 SB |
383 | * |
384 | * return value | |
6316668f | 385 | * None |
88523a61 | 386 | */ |
6316668f | 387 | static inline void mtip_issue_ncq_command(struct mtip_port *port, int tag) |
88523a61 | 388 | { |
16c906e5 | 389 | int group = tag >> 5; |
88523a61 | 390 | |
16c906e5 | 391 | atomic_set(&port->commands[tag].active, 1); |
88523a61 | 392 | |
16c906e5 AT |
393 | /* guard SACT and CI registers */ |
394 | spin_lock(&port->cmd_issue_lock[group]); | |
6316668f JA |
395 | writel((1 << MTIP_TAG_BIT(tag)), |
396 | port->s_active[MTIP_TAG_INDEX(tag)]); | |
397 | writel((1 << MTIP_TAG_BIT(tag)), | |
398 | port->cmd_issue[MTIP_TAG_INDEX(tag)]); | |
16c906e5 | 399 | spin_unlock(&port->cmd_issue_lock[group]); |
dad40f16 AT |
400 | |
401 | /* Set the command's timeout value.*/ | |
402 | port->commands[tag].comp_time = jiffies + msecs_to_jiffies( | |
403 | MTIP_NCQ_COMMAND_TIMEOUT_MS); | |
88523a61 SB |
404 | } |
405 | ||
406 | /* | |
407 | * Enable/disable the reception of FIS | |
408 | * | |
409 | * @port Pointer to the port data structure | |
410 | * @enable 1 to enable, 0 to disable | |
411 | * | |
412 | * return value | |
413 | * Previous state: 1 enabled, 0 disabled | |
414 | */ | |
415 | static int mtip_enable_fis(struct mtip_port *port, int enable) | |
416 | { | |
417 | u32 tmp; | |
418 | ||
419 | /* enable FIS reception */ | |
420 | tmp = readl(port->mmio + PORT_CMD); | |
421 | if (enable) | |
422 | writel(tmp | PORT_CMD_FIS_RX, port->mmio + PORT_CMD); | |
423 | else | |
424 | writel(tmp & ~PORT_CMD_FIS_RX, port->mmio + PORT_CMD); | |
425 | ||
426 | /* Flush */ | |
427 | readl(port->mmio + PORT_CMD); | |
428 | ||
429 | return (((tmp & PORT_CMD_FIS_RX) == PORT_CMD_FIS_RX)); | |
430 | } | |
431 | ||
432 | /* | |
433 | * Enable/disable the DMA engine | |
434 | * | |
435 | * @port Pointer to the port data structure | |
436 | * @enable 1 to enable, 0 to disable | |
437 | * | |
438 | * return value | |
439 | * Previous state: 1 enabled, 0 disabled. | |
440 | */ | |
441 | static int mtip_enable_engine(struct mtip_port *port, int enable) | |
442 | { | |
443 | u32 tmp; | |
444 | ||
445 | /* enable FIS reception */ | |
446 | tmp = readl(port->mmio + PORT_CMD); | |
447 | if (enable) | |
448 | writel(tmp | PORT_CMD_START, port->mmio + PORT_CMD); | |
449 | else | |
450 | writel(tmp & ~PORT_CMD_START, port->mmio + PORT_CMD); | |
451 | ||
452 | readl(port->mmio + PORT_CMD); | |
453 | return (((tmp & PORT_CMD_START) == PORT_CMD_START)); | |
454 | } | |
455 | ||
456 | /* | |
457 | * Enables the port DMA engine and FIS reception. | |
458 | * | |
459 | * return value | |
460 | * None | |
461 | */ | |
462 | static inline void mtip_start_port(struct mtip_port *port) | |
463 | { | |
464 | /* Enable FIS reception */ | |
465 | mtip_enable_fis(port, 1); | |
466 | ||
467 | /* Enable the DMA engine */ | |
468 | mtip_enable_engine(port, 1); | |
469 | } | |
470 | ||
471 | /* | |
472 | * Deinitialize a port by disabling port interrupts, the DMA engine, | |
473 | * and FIS reception. | |
474 | * | |
475 | * @port Pointer to the port structure | |
476 | * | |
477 | * return value | |
478 | * None | |
479 | */ | |
480 | static inline void mtip_deinit_port(struct mtip_port *port) | |
481 | { | |
482 | /* Disable interrupts on this port */ | |
483 | writel(0, port->mmio + PORT_IRQ_MASK); | |
484 | ||
485 | /* Disable the DMA engine */ | |
486 | mtip_enable_engine(port, 0); | |
487 | ||
488 | /* Disable FIS reception */ | |
489 | mtip_enable_fis(port, 0); | |
490 | } | |
491 | ||
492 | /* | |
493 | * Initialize a port. | |
494 | * | |
495 | * This function deinitializes the port by calling mtip_deinit_port() and | |
496 | * then initializes it by setting the command header and RX FIS addresses, | |
497 | * clearing the SError register and any pending port interrupts before | |
498 | * re-enabling the default set of port interrupts. | |
499 | * | |
500 | * @port Pointer to the port structure. | |
501 | * | |
502 | * return value | |
503 | * None | |
504 | */ | |
505 | static void mtip_init_port(struct mtip_port *port) | |
506 | { | |
507 | int i; | |
508 | mtip_deinit_port(port); | |
509 | ||
510 | /* Program the command list base and FIS base addresses */ | |
511 | if (readl(port->dd->mmio + HOST_CAP) & HOST_CAP_64) { | |
512 | writel((port->command_list_dma >> 16) >> 16, | |
513 | port->mmio + PORT_LST_ADDR_HI); | |
514 | writel((port->rxfis_dma >> 16) >> 16, | |
515 | port->mmio + PORT_FIS_ADDR_HI); | |
516 | } | |
517 | ||
60ec0eec | 518 | writel(port->command_list_dma & 0xFFFFFFFF, |
88523a61 | 519 | port->mmio + PORT_LST_ADDR); |
60ec0eec | 520 | writel(port->rxfis_dma & 0xFFFFFFFF, port->mmio + PORT_FIS_ADDR); |
88523a61 SB |
521 | |
522 | /* Clear SError */ | |
523 | writel(readl(port->mmio + PORT_SCR_ERR), port->mmio + PORT_SCR_ERR); | |
524 | ||
6316668f JA |
525 | /* reset the completed registers.*/ |
526 | for (i = 0; i < port->dd->slot_groups; i++) | |
527 | writel(0xFFFFFFFF, port->completed[i]); | |
88523a61 | 528 | |
6316668f | 529 | /* Clear any pending interrupts for this port */ |
6bb688c0 | 530 | writel(readl(port->mmio + PORT_IRQ_STAT), port->mmio + PORT_IRQ_STAT); |
88523a61 | 531 | |
22be2e6e AT |
532 | /* Clear any pending interrupts on the HBA. */ |
533 | writel(readl(port->dd->mmio + HOST_IRQ_STAT), | |
534 | port->dd->mmio + HOST_IRQ_STAT); | |
535 | ||
6316668f JA |
536 | /* Enable port interrupts */ |
537 | writel(DEF_PORT_IRQ, port->mmio + PORT_IRQ_MASK); | |
88523a61 SB |
538 | } |
539 | ||
540 | /* | |
541 | * Restart a port | |
542 | * | |
543 | * @port Pointer to the port data structure. | |
544 | * | |
545 | * return value | |
546 | * None | |
547 | */ | |
6316668f | 548 | static void mtip_restart_port(struct mtip_port *port) |
88523a61 SB |
549 | { |
550 | unsigned long timeout; | |
551 | ||
552 | /* Disable the DMA engine */ | |
553 | mtip_enable_engine(port, 0); | |
554 | ||
555 | /* Chip quirk: wait up to 500ms for PxCMD.CR == 0 */ | |
556 | timeout = jiffies + msecs_to_jiffies(500); | |
557 | while ((readl(port->mmio + PORT_CMD) & PORT_CMD_LIST_ON) | |
558 | && time_before(jiffies, timeout)) | |
559 | ; | |
560 | ||
8a857a88 | 561 | if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &port->dd->dd_flag)) |
45038367 AT |
562 | return; |
563 | ||
88523a61 SB |
564 | /* |
565 | * Chip quirk: escalate to hba reset if | |
566 | * PxCMD.CR not clear after 500 ms | |
567 | */ | |
568 | if (readl(port->mmio + PORT_CMD) & PORT_CMD_LIST_ON) { | |
569 | dev_warn(&port->dd->pdev->dev, | |
570 | "PxCMD.CR not clear, escalating reset\n"); | |
571 | ||
d0d096b1 | 572 | if (mtip_hba_reset(port->dd)) |
88523a61 SB |
573 | dev_err(&port->dd->pdev->dev, |
574 | "HBA reset escalation failed.\n"); | |
575 | ||
576 | /* 30 ms delay before com reset to quiesce chip */ | |
577 | mdelay(30); | |
578 | } | |
579 | ||
580 | dev_warn(&port->dd->pdev->dev, "Issuing COM reset\n"); | |
581 | ||
582 | /* Set PxSCTL.DET */ | |
583 | writel(readl(port->mmio + PORT_SCR_CTL) | | |
584 | 1, port->mmio + PORT_SCR_CTL); | |
585 | readl(port->mmio + PORT_SCR_CTL); | |
586 | ||
587 | /* Wait 1 ms to quiesce chip function */ | |
588 | timeout = jiffies + msecs_to_jiffies(1); | |
589 | while (time_before(jiffies, timeout)) | |
590 | ; | |
591 | ||
8a857a88 | 592 | if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &port->dd->dd_flag)) |
45038367 AT |
593 | return; |
594 | ||
88523a61 SB |
595 | /* Clear PxSCTL.DET */ |
596 | writel(readl(port->mmio + PORT_SCR_CTL) & ~1, | |
597 | port->mmio + PORT_SCR_CTL); | |
598 | readl(port->mmio + PORT_SCR_CTL); | |
599 | ||
600 | /* Wait 500 ms for bit 0 of PORT_SCR_STS to be set */ | |
601 | timeout = jiffies + msecs_to_jiffies(500); | |
602 | while (((readl(port->mmio + PORT_SCR_STAT) & 0x01) == 0) | |
603 | && time_before(jiffies, timeout)) | |
604 | ; | |
605 | ||
8a857a88 | 606 | if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &port->dd->dd_flag)) |
45038367 AT |
607 | return; |
608 | ||
88523a61 SB |
609 | if ((readl(port->mmio + PORT_SCR_STAT) & 0x01) == 0) |
610 | dev_warn(&port->dd->pdev->dev, | |
611 | "COM reset failed\n"); | |
612 | ||
22be2e6e AT |
613 | mtip_init_port(port); |
614 | mtip_start_port(port); | |
88523a61 | 615 | |
88523a61 SB |
616 | } |
617 | ||
d0d096b1 AT |
618 | static int mtip_device_reset(struct driver_data *dd) |
619 | { | |
620 | int rv = 0; | |
621 | ||
622 | if (mtip_check_surprise_removal(dd->pdev)) | |
623 | return 0; | |
624 | ||
625 | if (mtip_hba_reset(dd) < 0) | |
626 | rv = -EFAULT; | |
627 | ||
628 | mdelay(1); | |
629 | mtip_init_port(dd->port); | |
630 | mtip_start_port(dd->port); | |
631 | ||
632 | /* Enable interrupts on the HBA. */ | |
633 | writel(readl(dd->mmio + HOST_CTL) | HOST_IRQ_EN, | |
634 | dd->mmio + HOST_CTL); | |
635 | return rv; | |
636 | } | |
637 | ||
95fea2f1 AT |
638 | /* |
639 | * Helper function for tag logging | |
640 | */ | |
641 | static void print_tags(struct driver_data *dd, | |
642 | char *msg, | |
643 | unsigned long *tagbits, | |
644 | int cnt) | |
645 | { | |
646 | unsigned char tagmap[128]; | |
647 | int group, tagmap_len = 0; | |
648 | ||
649 | memset(tagmap, 0, sizeof(tagmap)); | |
650 | for (group = SLOTBITS_IN_LONGS; group > 0; group--) | |
651 | tagmap_len = sprintf(tagmap + tagmap_len, "%016lX ", | |
652 | tagbits[group-1]); | |
653 | dev_warn(&dd->pdev->dev, | |
654 | "%d command(s) %s: tagmap [%s]", cnt, msg, tagmap); | |
655 | } | |
656 | ||
6316668f JA |
657 | /* |
658 | * Called periodically to see if any read/write commands are | |
659 | * taking too long to complete. | |
660 | * | |
661 | * @data Pointer to the PORT data structure. | |
662 | * | |
663 | * return value | |
664 | * None | |
665 | */ | |
666 | static void mtip_timeout_function(unsigned long int data) | |
667 | { | |
668 | struct mtip_port *port = (struct mtip_port *) data; | |
669 | struct host_to_dev_fis *fis; | |
5eb9291c SB |
670 | struct mtip_cmd *cmd; |
671 | int unaligned, tag, cmdto_cnt = 0; | |
6316668f | 672 | unsigned int bit, group; |
298d8015 | 673 | unsigned int num_command_slots; |
95fea2f1 | 674 | unsigned long to, tagaccum[SLOTBITS_IN_LONGS]; |
5eb9291c | 675 | void (*func)(void *, int); |
6316668f JA |
676 | |
677 | if (unlikely(!port)) | |
678 | return; | |
679 | ||
8f8b8995 AT |
680 | if (unlikely(port->dd->sr)) |
681 | return; | |
682 | ||
8a857a88 | 683 | if (test_bit(MTIP_DDF_RESUME_BIT, &port->dd->dd_flag)) { |
6316668f JA |
684 | mod_timer(&port->cmd_timer, |
685 | jiffies + msecs_to_jiffies(30000)); | |
686 | return; | |
687 | } | |
95fea2f1 AT |
688 | /* clear the tag accumulator */ |
689 | memset(tagaccum, 0, SLOTBITS_IN_LONGS * sizeof(long)); | |
298d8015 | 690 | num_command_slots = port->dd->slot_groups * 32; |
6316668f JA |
691 | |
692 | for (tag = 0; tag < num_command_slots; tag++) { | |
693 | /* | |
694 | * Skip internal command slot as it has | |
695 | * its own timeout mechanism | |
696 | */ | |
697 | if (tag == MTIP_TAG_INTERNAL) | |
698 | continue; | |
699 | ||
700 | if (atomic_read(&port->commands[tag].active) && | |
701 | (time_after(jiffies, port->commands[tag].comp_time))) { | |
702 | group = tag >> 5; | |
60ec0eec | 703 | bit = tag & 0x1F; |
6316668f | 704 | |
5eb9291c SB |
705 | cmd = &port->commands[tag]; |
706 | fis = (struct host_to_dev_fis *) cmd->command; | |
6316668f | 707 | |
95fea2f1 | 708 | set_bit(tag, tagaccum); |
6316668f JA |
709 | cmdto_cnt++; |
710 | if (cmdto_cnt == 1) | |
8a857a88 | 711 | set_bit(MTIP_PF_EH_ACTIVE_BIT, &port->flags); |
6316668f JA |
712 | |
713 | /* | |
714 | * Clear the completed bit. This should prevent | |
715 | * any interrupt handlers from trying to retire | |
716 | * the command. | |
717 | */ | |
718 | writel(1 << bit, port->completed[group]); | |
719 | ||
5eb9291c SB |
720 | /* Clear the active flag for the command */ |
721 | atomic_set(&port->commands[tag].active, 0); | |
6316668f | 722 | |
5eb9291c SB |
723 | func = cmd->async_callback; |
724 | if (func && | |
725 | cmpxchg(&cmd->async_callback, func, 0) == func) { | |
6316668f | 726 | |
5eb9291c SB |
727 | /* Unmap the DMA scatter list entries */ |
728 | dma_unmap_sg(&port->dd->pdev->dev, | |
729 | cmd->sg, | |
730 | cmd->scatter_ents, | |
731 | cmd->direction); | |
6316668f | 732 | |
5eb9291c SB |
733 | func(cmd->async_data, -EIO); |
734 | unaligned = cmd->unaligned; | |
735 | ||
736 | /* Clear the allocated bit for the command. */ | |
737 | release_slot(port, tag); | |
738 | ||
739 | if (unaligned) | |
740 | up(&port->cmd_slot_unal); | |
741 | else | |
742 | up(&port->cmd_slot); | |
743 | } | |
6316668f JA |
744 | } |
745 | } | |
746 | ||
47cd4b3c | 747 | if (cmdto_cnt) { |
95fea2f1 | 748 | print_tags(port->dd, "timed out", tagaccum, cmdto_cnt); |
47cd4b3c | 749 | if (!test_bit(MTIP_PF_IC_ACTIVE_BIT, &port->flags)) { |
d0d096b1 | 750 | mtip_device_reset(port->dd); |
47cd4b3c AT |
751 | wake_up_interruptible(&port->svc_wait); |
752 | } | |
8a857a88 | 753 | clear_bit(MTIP_PF_EH_ACTIVE_BIT, &port->flags); |
6316668f JA |
754 | } |
755 | ||
c74b0f58 AT |
756 | if (port->ic_pause_timer) { |
757 | to = port->ic_pause_timer + msecs_to_jiffies(1000); | |
758 | if (time_after(jiffies, to)) { | |
759 | if (!test_bit(MTIP_PF_IC_ACTIVE_BIT, &port->flags)) { | |
760 | port->ic_pause_timer = 0; | |
761 | clear_bit(MTIP_PF_SE_ACTIVE_BIT, &port->flags); | |
762 | clear_bit(MTIP_PF_DM_ACTIVE_BIT, &port->flags); | |
763 | clear_bit(MTIP_PF_IC_ACTIVE_BIT, &port->flags); | |
764 | wake_up_interruptible(&port->svc_wait); | |
765 | } | |
766 | ||
767 | ||
768 | } | |
769 | } | |
770 | ||
6316668f JA |
771 | /* Restart the timer */ |
772 | mod_timer(&port->cmd_timer, | |
773 | jiffies + msecs_to_jiffies(MTIP_TIMEOUT_CHECK_PERIOD)); | |
774 | } | |
775 | ||
6316668f JA |
776 | /* |
777 | * Internal command completion callback function. | |
778 | * | |
779 | * This function is normally called by the driver ISR when an internal | |
780 | * command completed. This function signals the command completion by | |
781 | * calling complete(). | |
782 | * | |
783 | * @port Pointer to the port data structure. | |
784 | * @tag Tag of the command that has completed. | |
785 | * @data Pointer to a completion structure. | |
786 | * @status Completion status. | |
787 | * | |
788 | * return value | |
789 | * None | |
790 | */ | |
791 | static void mtip_completion(struct mtip_port *port, | |
792 | int tag, | |
793 | void *data, | |
794 | int status) | |
795 | { | |
796 | struct mtip_cmd *command = &port->commands[tag]; | |
797 | struct completion *waiting = data; | |
798 | if (unlikely(status == PORT_IRQ_TF_ERR)) | |
799 | dev_warn(&port->dd->pdev->dev, | |
800 | "Internal command %d completed with TFE\n", tag); | |
801 | ||
802 | command->async_callback = NULL; | |
803 | command->comp_func = NULL; | |
804 | ||
805 | complete(waiting); | |
806 | } | |
807 | ||
8182b495 AT |
808 | static void mtip_null_completion(struct mtip_port *port, |
809 | int tag, | |
810 | void *data, | |
811 | int status) | |
812 | { | |
813 | return; | |
814 | } | |
815 | ||
f6587217 AT |
816 | static int mtip_read_log_page(struct mtip_port *port, u8 page, u16 *buffer, |
817 | dma_addr_t buffer_dma, unsigned int sectors); | |
818 | static int mtip_get_smart_attr(struct mtip_port *port, unsigned int id, | |
819 | struct smart_attr *attrib); | |
88523a61 SB |
820 | /* |
821 | * Handle an error. | |
822 | * | |
823 | * @dd Pointer to the DRIVER_DATA structure. | |
824 | * | |
825 | * return value | |
826 | * None | |
827 | */ | |
828 | static void mtip_handle_tfe(struct driver_data *dd) | |
829 | { | |
f6587217 | 830 | int group, tag, bit, reissue, rv; |
88523a61 | 831 | struct mtip_port *port; |
f6587217 | 832 | struct mtip_cmd *cmd; |
88523a61 SB |
833 | u32 completed; |
834 | struct host_to_dev_fis *fis; | |
835 | unsigned long tagaccum[SLOTBITS_IN_LONGS]; | |
95fea2f1 | 836 | unsigned int cmd_cnt = 0; |
f6587217 AT |
837 | unsigned char *buf; |
838 | char *fail_reason = NULL; | |
839 | int fail_all_ncq_write = 0, fail_all_ncq_cmds = 0; | |
88523a61 SB |
840 | |
841 | dev_warn(&dd->pdev->dev, "Taskfile error\n"); | |
842 | ||
843 | port = dd->port; | |
844 | ||
845 | /* Stop the timer to prevent command timeouts. */ | |
846 | del_timer(&port->cmd_timer); | |
d02e1f0a AT |
847 | set_bit(MTIP_PF_EH_ACTIVE_BIT, &port->flags); |
848 | ||
849 | if (test_bit(MTIP_PF_IC_ACTIVE_BIT, &port->flags) && | |
850 | test_bit(MTIP_TAG_INTERNAL, port->allocated)) { | |
851 | cmd = &port->commands[MTIP_TAG_INTERNAL]; | |
852 | dbg_printk(MTIP_DRV_NAME " TFE for the internal command\n"); | |
853 | ||
854 | atomic_inc(&cmd->active); /* active > 1 indicates error */ | |
855 | if (cmd->comp_data && cmd->comp_func) { | |
856 | cmd->comp_func(port, MTIP_TAG_INTERNAL, | |
857 | cmd->comp_data, PORT_IRQ_TF_ERR); | |
858 | } | |
859 | goto handle_tfe_exit; | |
860 | } | |
88523a61 | 861 | |
95fea2f1 AT |
862 | /* clear the tag accumulator */ |
863 | memset(tagaccum, 0, SLOTBITS_IN_LONGS * sizeof(long)); | |
864 | ||
88523a61 SB |
865 | /* Loop through all the groups */ |
866 | for (group = 0; group < dd->slot_groups; group++) { | |
867 | completed = readl(port->completed[group]); | |
868 | ||
869 | /* clear completed status register in the hardware.*/ | |
870 | writel(completed, port->completed[group]); | |
871 | ||
88523a61 SB |
872 | /* Process successfully completed commands */ |
873 | for (bit = 0; bit < 32 && completed; bit++) { | |
874 | if (!(completed & (1<<bit))) | |
875 | continue; | |
876 | tag = (group << 5) + bit; | |
877 | ||
878 | /* Skip the internal command slot */ | |
879 | if (tag == MTIP_TAG_INTERNAL) | |
880 | continue; | |
881 | ||
f6587217 AT |
882 | cmd = &port->commands[tag]; |
883 | if (likely(cmd->comp_func)) { | |
88523a61 | 884 | set_bit(tag, tagaccum); |
95fea2f1 | 885 | cmd_cnt++; |
f6587217 AT |
886 | atomic_set(&cmd->active, 0); |
887 | cmd->comp_func(port, | |
88523a61 | 888 | tag, |
f6587217 | 889 | cmd->comp_data, |
88523a61 SB |
890 | 0); |
891 | } else { | |
892 | dev_err(&port->dd->pdev->dev, | |
893 | "Missing completion func for tag %d", | |
894 | tag); | |
895 | if (mtip_check_surprise_removal(dd->pdev)) { | |
88523a61 SB |
896 | /* don't proceed further */ |
897 | return; | |
898 | } | |
899 | } | |
900 | } | |
901 | } | |
95fea2f1 AT |
902 | |
903 | print_tags(dd, "completed (TFE)", tagaccum, cmd_cnt); | |
88523a61 SB |
904 | |
905 | /* Restart the port */ | |
906 | mdelay(20); | |
907 | mtip_restart_port(port); | |
908 | ||
f6587217 AT |
909 | /* Trying to determine the cause of the error */ |
910 | rv = mtip_read_log_page(dd->port, ATA_LOG_SATA_NCQ, | |
911 | dd->port->log_buf, | |
912 | dd->port->log_buf_dma, 1); | |
913 | if (rv) { | |
914 | dev_warn(&dd->pdev->dev, | |
915 | "Error in READ LOG EXT (10h) command\n"); | |
916 | /* non-critical error, don't fail the load */ | |
917 | } else { | |
918 | buf = (unsigned char *)dd->port->log_buf; | |
919 | if (buf[259] & 0x1) { | |
920 | dev_info(&dd->pdev->dev, | |
921 | "Write protect bit is set.\n"); | |
8a857a88 | 922 | set_bit(MTIP_DDF_WRITE_PROTECT_BIT, &dd->dd_flag); |
f6587217 AT |
923 | fail_all_ncq_write = 1; |
924 | fail_reason = "write protect"; | |
925 | } | |
926 | if (buf[288] == 0xF7) { | |
927 | dev_info(&dd->pdev->dev, | |
928 | "Exceeded Tmax, drive in thermal shutdown.\n"); | |
8a857a88 | 929 | set_bit(MTIP_DDF_OVER_TEMP_BIT, &dd->dd_flag); |
f6587217 AT |
930 | fail_all_ncq_cmds = 1; |
931 | fail_reason = "thermal shutdown"; | |
932 | } | |
933 | if (buf[288] == 0xBF) { | |
26d58057 | 934 | set_bit(MTIP_DDF_SEC_LOCK_BIT, &dd->dd_flag); |
f6587217 | 935 | dev_info(&dd->pdev->dev, |
26d58057 | 936 | "Drive indicates rebuild has failed. Secure erase required.\n"); |
f6587217 AT |
937 | fail_all_ncq_cmds = 1; |
938 | fail_reason = "rebuild failed"; | |
939 | } | |
940 | } | |
941 | ||
88523a61 SB |
942 | /* clear the tag accumulator */ |
943 | memset(tagaccum, 0, SLOTBITS_IN_LONGS * sizeof(long)); | |
944 | ||
945 | /* Loop through all the groups */ | |
946 | for (group = 0; group < dd->slot_groups; group++) { | |
947 | for (bit = 0; bit < 32; bit++) { | |
948 | reissue = 1; | |
949 | tag = (group << 5) + bit; | |
f6587217 | 950 | cmd = &port->commands[tag]; |
88523a61 SB |
951 | |
952 | /* If the active bit is set re-issue the command */ | |
f6587217 | 953 | if (atomic_read(&cmd->active) == 0) |
88523a61 SB |
954 | continue; |
955 | ||
f6587217 | 956 | fis = (struct host_to_dev_fis *)cmd->command; |
88523a61 SB |
957 | |
958 | /* Should re-issue? */ | |
959 | if (tag == MTIP_TAG_INTERNAL || | |
960 | fis->command == ATA_CMD_SET_FEATURES) | |
961 | reissue = 0; | |
f6587217 AT |
962 | else { |
963 | if (fail_all_ncq_cmds || | |
964 | (fail_all_ncq_write && | |
965 | fis->command == ATA_CMD_FPDMA_WRITE)) { | |
966 | dev_warn(&dd->pdev->dev, | |
967 | " Fail: %s w/tag %d [%s].\n", | |
968 | fis->command == ATA_CMD_FPDMA_WRITE ? | |
969 | "write" : "read", | |
970 | tag, | |
971 | fail_reason != NULL ? | |
972 | fail_reason : "unknown"); | |
973 | atomic_set(&cmd->active, 0); | |
974 | if (cmd->comp_func) { | |
975 | cmd->comp_func(port, tag, | |
976 | cmd->comp_data, | |
977 | -ENODATA); | |
978 | } | |
979 | continue; | |
980 | } | |
981 | } | |
88523a61 SB |
982 | |
983 | /* | |
984 | * First check if this command has | |
985 | * exceeded its retries. | |
986 | */ | |
f6587217 | 987 | if (reissue && (cmd->retries-- > 0)) { |
88523a61 SB |
988 | |
989 | set_bit(tag, tagaccum); | |
990 | ||
88523a61 SB |
991 | /* Re-issue the command. */ |
992 | mtip_issue_ncq_command(port, tag); | |
993 | ||
994 | continue; | |
995 | } | |
996 | ||
997 | /* Retire a command that will not be reissued */ | |
998 | dev_warn(&port->dd->pdev->dev, | |
999 | "retiring tag %d\n", tag); | |
f6587217 | 1000 | atomic_set(&cmd->active, 0); |
88523a61 | 1001 | |
f6587217 AT |
1002 | if (cmd->comp_func) |
1003 | cmd->comp_func( | |
88523a61 SB |
1004 | port, |
1005 | tag, | |
f6587217 | 1006 | cmd->comp_data, |
88523a61 SB |
1007 | PORT_IRQ_TF_ERR); |
1008 | else | |
1009 | dev_warn(&port->dd->pdev->dev, | |
1010 | "Bad completion for tag %d\n", | |
1011 | tag); | |
1012 | } | |
1013 | } | |
95fea2f1 | 1014 | print_tags(dd, "reissued (TFE)", tagaccum, cmd_cnt); |
88523a61 | 1015 | |
d02e1f0a | 1016 | handle_tfe_exit: |
60ec0eec | 1017 | /* clear eh_active */ |
8a857a88 | 1018 | clear_bit(MTIP_PF_EH_ACTIVE_BIT, &port->flags); |
60ec0eec | 1019 | wake_up_interruptible(&port->svc_wait); |
88523a61 SB |
1020 | |
1021 | mod_timer(&port->cmd_timer, | |
1022 | jiffies + msecs_to_jiffies(MTIP_TIMEOUT_CHECK_PERIOD)); | |
1023 | } | |
1024 | ||
1025 | /* | |
1026 | * Handle a set device bits interrupt | |
1027 | */ | |
16c906e5 AT |
1028 | static inline void mtip_workq_sdbfx(struct mtip_port *port, int group, |
1029 | u32 completed) | |
88523a61 | 1030 | { |
16c906e5 AT |
1031 | struct driver_data *dd = port->dd; |
1032 | int tag, bit; | |
88523a61 SB |
1033 | struct mtip_cmd *command; |
1034 | ||
16c906e5 AT |
1035 | if (!completed) { |
1036 | WARN_ON_ONCE(!completed); | |
1037 | return; | |
1038 | } | |
1039 | /* clear completed status register in the hardware.*/ | |
1040 | writel(completed, port->completed[group]); | |
88523a61 | 1041 | |
16c906e5 AT |
1042 | /* Process completed commands. */ |
1043 | for (bit = 0; (bit < 32) && completed; bit++) { | |
1044 | if (completed & 0x01) { | |
1045 | tag = (group << 5) | bit; | |
88523a61 | 1046 | |
16c906e5 AT |
1047 | /* skip internal command slot. */ |
1048 | if (unlikely(tag == MTIP_TAG_INTERNAL)) | |
1049 | continue; | |
88523a61 | 1050 | |
16c906e5 AT |
1051 | command = &port->commands[tag]; |
1052 | /* make internal callback */ | |
1053 | if (likely(command->comp_func)) { | |
1054 | command->comp_func( | |
1055 | port, | |
1056 | tag, | |
1057 | command->comp_data, | |
1058 | 0); | |
1059 | } else { | |
8f8b8995 AT |
1060 | dev_dbg(&dd->pdev->dev, |
1061 | "Null completion for tag %d", | |
16c906e5 | 1062 | tag); |
88523a61 | 1063 | |
16c906e5 AT |
1064 | if (mtip_check_surprise_removal( |
1065 | dd->pdev)) { | |
16c906e5 | 1066 | return; |
88523a61 SB |
1067 | } |
1068 | } | |
1069 | } | |
16c906e5 | 1070 | completed >>= 1; |
88523a61 | 1071 | } |
16c906e5 AT |
1072 | |
1073 | /* If last, re-enable interrupts */ | |
1074 | if (atomic_dec_return(&dd->irq_workers_active) == 0) | |
1075 | writel(0xffffffff, dd->mmio + HOST_IRQ_STAT); | |
88523a61 SB |
1076 | } |
1077 | ||
1078 | /* | |
1079 | * Process legacy pio and d2h interrupts | |
1080 | */ | |
1081 | static inline void mtip_process_legacy(struct driver_data *dd, u32 port_stat) | |
1082 | { | |
1083 | struct mtip_port *port = dd->port; | |
1084 | struct mtip_cmd *cmd = &port->commands[MTIP_TAG_INTERNAL]; | |
1085 | ||
8a857a88 | 1086 | if (test_bit(MTIP_PF_IC_ACTIVE_BIT, &port->flags) && |
60ec0eec | 1087 | (cmd != NULL) && !(readl(port->cmd_issue[MTIP_TAG_INTERNAL]) |
88523a61 SB |
1088 | & (1 << MTIP_TAG_INTERNAL))) { |
1089 | if (cmd->comp_func) { | |
1090 | cmd->comp_func(port, | |
1091 | MTIP_TAG_INTERNAL, | |
1092 | cmd->comp_data, | |
1093 | 0); | |
1094 | return; | |
1095 | } | |
1096 | } | |
1097 | ||
88523a61 SB |
1098 | return; |
1099 | } | |
1100 | ||
1101 | /* | |
1102 | * Demux and handle errors | |
1103 | */ | |
1104 | static inline void mtip_process_errors(struct driver_data *dd, u32 port_stat) | |
1105 | { | |
1106 | if (likely(port_stat & (PORT_IRQ_TF_ERR | PORT_IRQ_IF_ERR))) | |
1107 | mtip_handle_tfe(dd); | |
1108 | ||
1109 | if (unlikely(port_stat & PORT_IRQ_CONNECT)) { | |
1110 | dev_warn(&dd->pdev->dev, | |
1111 | "Clearing PxSERR.DIAG.x\n"); | |
1112 | writel((1 << 26), dd->port->mmio + PORT_SCR_ERR); | |
1113 | } | |
1114 | ||
1115 | if (unlikely(port_stat & PORT_IRQ_PHYRDY)) { | |
1116 | dev_warn(&dd->pdev->dev, | |
1117 | "Clearing PxSERR.DIAG.n\n"); | |
1118 | writel((1 << 16), dd->port->mmio + PORT_SCR_ERR); | |
1119 | } | |
1120 | ||
1121 | if (unlikely(port_stat & ~PORT_IRQ_HANDLED)) { | |
1122 | dev_warn(&dd->pdev->dev, | |
1123 | "Port stat errors %x unhandled\n", | |
1124 | (port_stat & ~PORT_IRQ_HANDLED)); | |
1125 | } | |
1126 | } | |
1127 | ||
1128 | static inline irqreturn_t mtip_handle_irq(struct driver_data *data) | |
1129 | { | |
1130 | struct driver_data *dd = (struct driver_data *) data; | |
1131 | struct mtip_port *port = dd->port; | |
1132 | u32 hba_stat, port_stat; | |
1133 | int rv = IRQ_NONE; | |
16c906e5 AT |
1134 | int do_irq_enable = 1, i, workers; |
1135 | struct mtip_work *twork; | |
88523a61 SB |
1136 | |
1137 | hba_stat = readl(dd->mmio + HOST_IRQ_STAT); | |
1138 | if (hba_stat) { | |
1139 | rv = IRQ_HANDLED; | |
1140 | ||
1141 | /* Acknowledge the interrupt status on the port.*/ | |
1142 | port_stat = readl(port->mmio + PORT_IRQ_STAT); | |
1143 | writel(port_stat, port->mmio + PORT_IRQ_STAT); | |
1144 | ||
1145 | /* Demux port status */ | |
16c906e5 AT |
1146 | if (likely(port_stat & PORT_IRQ_SDB_FIS)) { |
1147 | do_irq_enable = 0; | |
1148 | WARN_ON_ONCE(atomic_read(&dd->irq_workers_active) != 0); | |
1149 | ||
1150 | /* Start at 1: group zero is always local? */ | |
1151 | for (i = 0, workers = 0; i < MTIP_MAX_SLOT_GROUPS; | |
1152 | i++) { | |
1153 | twork = &dd->work[i]; | |
1154 | twork->completed = readl(port->completed[i]); | |
1155 | if (twork->completed) | |
1156 | workers++; | |
1157 | } | |
1158 | ||
1159 | atomic_set(&dd->irq_workers_active, workers); | |
1160 | if (workers) { | |
1161 | for (i = 1; i < MTIP_MAX_SLOT_GROUPS; i++) { | |
1162 | twork = &dd->work[i]; | |
1163 | if (twork->completed) | |
1164 | queue_work_on( | |
1165 | twork->cpu_binding, | |
1166 | dd->isr_workq, | |
1167 | &twork->work); | |
1168 | } | |
1169 | ||
1170 | if (likely(dd->work[0].completed)) | |
1171 | mtip_workq_sdbfx(port, 0, | |
1172 | dd->work[0].completed); | |
1173 | ||
1174 | } else { | |
1175 | /* | |
1176 | * Chip quirk: SDB interrupt but nothing | |
1177 | * to complete | |
1178 | */ | |
1179 | do_irq_enable = 1; | |
1180 | } | |
1181 | } | |
88523a61 SB |
1182 | |
1183 | if (unlikely(port_stat & PORT_IRQ_ERR)) { | |
1184 | if (unlikely(mtip_check_surprise_removal(dd->pdev))) { | |
88523a61 SB |
1185 | /* don't proceed further */ |
1186 | return IRQ_HANDLED; | |
1187 | } | |
8a857a88 | 1188 | if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT, |
45038367 AT |
1189 | &dd->dd_flag)) |
1190 | return rv; | |
88523a61 SB |
1191 | |
1192 | mtip_process_errors(dd, port_stat & PORT_IRQ_ERR); | |
1193 | } | |
1194 | ||
1195 | if (unlikely(port_stat & PORT_IRQ_LEGACY)) | |
1196 | mtip_process_legacy(dd, port_stat & PORT_IRQ_LEGACY); | |
1197 | } | |
1198 | ||
1199 | /* acknowledge interrupt */ | |
16c906e5 AT |
1200 | if (unlikely(do_irq_enable)) |
1201 | writel(hba_stat, dd->mmio + HOST_IRQ_STAT); | |
88523a61 SB |
1202 | |
1203 | return rv; | |
1204 | } | |
1205 | ||
88523a61 SB |
1206 | /* |
1207 | * HBA interrupt subroutine. | |
1208 | * | |
1209 | * @irq IRQ number. | |
1210 | * @instance Pointer to the driver data structure. | |
1211 | * | |
1212 | * return value | |
1213 | * IRQ_HANDLED A HBA interrupt was pending and handled. | |
1214 | * IRQ_NONE This interrupt was not for the HBA. | |
1215 | */ | |
1216 | static irqreturn_t mtip_irq_handler(int irq, void *instance) | |
1217 | { | |
1218 | struct driver_data *dd = instance; | |
16c906e5 AT |
1219 | |
1220 | return mtip_handle_irq(dd); | |
88523a61 SB |
1221 | } |
1222 | ||
1223 | static void mtip_issue_non_ncq_command(struct mtip_port *port, int tag) | |
1224 | { | |
1225 | atomic_set(&port->commands[tag].active, 1); | |
1226 | writel(1 << MTIP_TAG_BIT(tag), | |
1227 | port->cmd_issue[MTIP_TAG_INDEX(tag)]); | |
1228 | } | |
1229 | ||
c74b0f58 AT |
1230 | static bool mtip_pause_ncq(struct mtip_port *port, |
1231 | struct host_to_dev_fis *fis) | |
1232 | { | |
1233 | struct host_to_dev_fis *reply; | |
1234 | unsigned long task_file_data; | |
1235 | ||
1236 | reply = port->rxfis + RX_FIS_D2H_REG; | |
1237 | task_file_data = readl(port->mmio+PORT_TFDATA); | |
1238 | ||
12a166c9 AT |
1239 | if (fis->command == ATA_CMD_SEC_ERASE_UNIT) |
1240 | clear_bit(MTIP_DDF_SEC_LOCK_BIT, &port->dd->dd_flag); | |
1241 | ||
1242 | if ((task_file_data & 1)) | |
c74b0f58 AT |
1243 | return false; |
1244 | ||
1245 | if (fis->command == ATA_CMD_SEC_ERASE_PREP) { | |
1246 | set_bit(MTIP_PF_SE_ACTIVE_BIT, &port->flags); | |
12a166c9 | 1247 | set_bit(MTIP_DDF_SEC_LOCK_BIT, &port->dd->dd_flag); |
c74b0f58 AT |
1248 | port->ic_pause_timer = jiffies; |
1249 | return true; | |
1250 | } else if ((fis->command == ATA_CMD_DOWNLOAD_MICRO) && | |
1251 | (fis->features == 0x03)) { | |
1252 | set_bit(MTIP_PF_DM_ACTIVE_BIT, &port->flags); | |
1253 | port->ic_pause_timer = jiffies; | |
1254 | return true; | |
1255 | } else if ((fis->command == ATA_CMD_SEC_ERASE_UNIT) || | |
1256 | ((fis->command == 0xFC) && | |
1257 | (fis->features == 0x27 || fis->features == 0x72 || | |
1258 | fis->features == 0x62 || fis->features == 0x26))) { | |
1259 | /* Com reset after secure erase or lowlevel format */ | |
1260 | mtip_restart_port(port); | |
1261 | return false; | |
1262 | } | |
1263 | ||
1264 | return false; | |
1265 | } | |
1266 | ||
88523a61 SB |
1267 | /* |
1268 | * Wait for port to quiesce | |
1269 | * | |
1270 | * @port Pointer to port data structure | |
1271 | * @timeout Max duration to wait (ms) | |
1272 | * | |
1273 | * return value | |
1274 | * 0 Success | |
1275 | * -EBUSY Commands still active | |
1276 | */ | |
1277 | static int mtip_quiesce_io(struct mtip_port *port, unsigned long timeout) | |
1278 | { | |
1279 | unsigned long to; | |
3e54a3d1 DC |
1280 | unsigned int n; |
1281 | unsigned int active = 1; | |
88523a61 SB |
1282 | |
1283 | to = jiffies + msecs_to_jiffies(timeout); | |
1284 | do { | |
8a857a88 AT |
1285 | if (test_bit(MTIP_PF_SVC_THD_ACTIVE_BIT, &port->flags) && |
1286 | test_bit(MTIP_PF_ISSUE_CMDS_BIT, &port->flags)) { | |
60ec0eec AT |
1287 | msleep(20); |
1288 | continue; /* svc thd is actively issuing commands */ | |
1289 | } | |
8a857a88 | 1290 | if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &port->dd->dd_flag)) |
45038367 | 1291 | return -EFAULT; |
88523a61 SB |
1292 | /* |
1293 | * Ignore s_active bit 0 of array element 0. | |
1294 | * This bit will always be set | |
1295 | */ | |
60ec0eec | 1296 | active = readl(port->s_active[0]) & 0xFFFFFFFE; |
88523a61 SB |
1297 | for (n = 1; n < port->dd->slot_groups; n++) |
1298 | active |= readl(port->s_active[n]); | |
1299 | ||
1300 | if (!active) | |
1301 | break; | |
1302 | ||
1303 | msleep(20); | |
1304 | } while (time_before(jiffies, to)); | |
1305 | ||
1306 | return active ? -EBUSY : 0; | |
1307 | } | |
1308 | ||
1309 | /* | |
1310 | * Execute an internal command and wait for the completion. | |
1311 | * | |
1312 | * @port Pointer to the port data structure. | |
1313 | * @fis Pointer to the FIS that describes the command. | |
60ec0eec | 1314 | * @fis_len Length in WORDS of the FIS. |
88523a61 | 1315 | * @buffer DMA accessible for command data. |
60ec0eec | 1316 | * @buf_len Length, in bytes, of the data buffer. |
88523a61 SB |
1317 | * @opts Command header options, excluding the FIS length |
1318 | * and the number of PRD entries. | |
1319 | * @timeout Time in ms to wait for the command to complete. | |
1320 | * | |
1321 | * return value | |
1322 | * 0 Command completed successfully. | |
1323 | * -EFAULT The buffer address is not correctly aligned. | |
1324 | * -EBUSY Internal command or other IO in progress. | |
1325 | * -EAGAIN Time out waiting for command to complete. | |
1326 | */ | |
1327 | static int mtip_exec_internal_command(struct mtip_port *port, | |
8182b495 | 1328 | struct host_to_dev_fis *fis, |
60ec0eec | 1329 | int fis_len, |
88523a61 | 1330 | dma_addr_t buffer, |
60ec0eec | 1331 | int buf_len, |
88523a61 SB |
1332 | u32 opts, |
1333 | gfp_t atomic, | |
1334 | unsigned long timeout) | |
1335 | { | |
1336 | struct mtip_cmd_sg *command_sg; | |
1337 | DECLARE_COMPLETION_ONSTACK(wait); | |
c74b0f58 | 1338 | int rv = 0, ready2go = 1; |
88523a61 | 1339 | struct mtip_cmd *int_cmd = &port->commands[MTIP_TAG_INTERNAL]; |
c74b0f58 | 1340 | unsigned long to; |
d0d096b1 | 1341 | struct driver_data *dd = port->dd; |
88523a61 SB |
1342 | |
1343 | /* Make sure the buffer is 8 byte aligned. This is asic specific. */ | |
1344 | if (buffer & 0x00000007) { | |
d0d096b1 | 1345 | dev_err(&dd->pdev->dev, "SG buffer is not 8 byte aligned\n"); |
88523a61 SB |
1346 | return -EFAULT; |
1347 | } | |
1348 | ||
c74b0f58 AT |
1349 | to = jiffies + msecs_to_jiffies(timeout); |
1350 | do { | |
1351 | ready2go = !test_and_set_bit(MTIP_TAG_INTERNAL, | |
1352 | port->allocated); | |
1353 | if (ready2go) | |
1354 | break; | |
1355 | mdelay(100); | |
1356 | } while (time_before(jiffies, to)); | |
1357 | if (!ready2go) { | |
d0d096b1 | 1358 | dev_warn(&dd->pdev->dev, |
c74b0f58 | 1359 | "Internal cmd active. new cmd [%02X]\n", fis->command); |
88523a61 SB |
1360 | return -EBUSY; |
1361 | } | |
8a857a88 | 1362 | set_bit(MTIP_PF_IC_ACTIVE_BIT, &port->flags); |
c74b0f58 AT |
1363 | port->ic_pause_timer = 0; |
1364 | ||
d0d096b1 AT |
1365 | clear_bit(MTIP_PF_SE_ACTIVE_BIT, &port->flags); |
1366 | clear_bit(MTIP_PF_DM_ACTIVE_BIT, &port->flags); | |
88523a61 SB |
1367 | |
1368 | if (atomic == GFP_KERNEL) { | |
8182b495 AT |
1369 | if (fis->command != ATA_CMD_STANDBYNOW1) { |
1370 | /* wait for io to complete if non atomic */ | |
1371 | if (mtip_quiesce_io(port, 5000) < 0) { | |
d0d096b1 | 1372 | dev_warn(&dd->pdev->dev, |
8182b495 AT |
1373 | "Failed to quiesce IO\n"); |
1374 | release_slot(port, MTIP_TAG_INTERNAL); | |
8a857a88 | 1375 | clear_bit(MTIP_PF_IC_ACTIVE_BIT, &port->flags); |
8182b495 AT |
1376 | wake_up_interruptible(&port->svc_wait); |
1377 | return -EBUSY; | |
1378 | } | |
88523a61 SB |
1379 | } |
1380 | ||
1381 | /* Set the completion function and data for the command. */ | |
1382 | int_cmd->comp_data = &wait; | |
1383 | int_cmd->comp_func = mtip_completion; | |
1384 | ||
1385 | } else { | |
1386 | /* Clear completion - we're going to poll */ | |
1387 | int_cmd->comp_data = NULL; | |
8182b495 | 1388 | int_cmd->comp_func = mtip_null_completion; |
88523a61 SB |
1389 | } |
1390 | ||
1391 | /* Copy the command to the command table */ | |
60ec0eec | 1392 | memcpy(int_cmd->command, fis, fis_len*4); |
88523a61 SB |
1393 | |
1394 | /* Populate the SG list */ | |
1395 | int_cmd->command_header->opts = | |
60ec0eec AT |
1396 | __force_bit2int cpu_to_le32(opts | fis_len); |
1397 | if (buf_len) { | |
88523a61 SB |
1398 | command_sg = int_cmd->command + AHCI_CMD_TBL_HDR_SZ; |
1399 | ||
60ec0eec AT |
1400 | command_sg->info = |
1401 | __force_bit2int cpu_to_le32((buf_len-1) & 0x3FFFFF); | |
1402 | command_sg->dba = | |
1403 | __force_bit2int cpu_to_le32(buffer & 0xFFFFFFFF); | |
1404 | command_sg->dba_upper = | |
1405 | __force_bit2int cpu_to_le32((buffer >> 16) >> 16); | |
88523a61 | 1406 | |
60ec0eec AT |
1407 | int_cmd->command_header->opts |= |
1408 | __force_bit2int cpu_to_le32((1 << 16)); | |
88523a61 SB |
1409 | } |
1410 | ||
1411 | /* Populate the command header */ | |
1412 | int_cmd->command_header->byte_count = 0; | |
1413 | ||
1414 | /* Issue the command to the hardware */ | |
1415 | mtip_issue_non_ncq_command(port, MTIP_TAG_INTERNAL); | |
1416 | ||
88523a61 SB |
1417 | if (atomic == GFP_KERNEL) { |
1418 | /* Wait for the command to complete or timeout. */ | |
d0d096b1 | 1419 | if (wait_for_completion_interruptible_timeout( |
88523a61 | 1420 | &wait, |
d0d096b1 AT |
1421 | msecs_to_jiffies(timeout)) <= 0) { |
1422 | if (rv == -ERESTARTSYS) { /* interrupted */ | |
1423 | dev_err(&dd->pdev->dev, | |
1424 | "Internal command [%02X] was interrupted after %lu ms\n", | |
1425 | fis->command, timeout); | |
1426 | rv = -EINTR; | |
1427 | goto exec_ic_exit; | |
1428 | } else if (rv == 0) /* timeout */ | |
1429 | dev_err(&dd->pdev->dev, | |
1430 | "Internal command did not complete [%02X] within timeout of %lu ms\n", | |
1431 | fis->command, timeout); | |
1432 | else | |
1433 | dev_err(&dd->pdev->dev, | |
1434 | "Internal command [%02X] wait returned code [%d] after %lu ms - unhandled\n", | |
1435 | fis->command, rv, timeout); | |
1436 | ||
1437 | if (mtip_check_surprise_removal(dd->pdev) || | |
8a857a88 | 1438 | test_bit(MTIP_DDF_REMOVE_PENDING_BIT, |
d0d096b1 AT |
1439 | &dd->dd_flag)) { |
1440 | dev_err(&dd->pdev->dev, | |
1441 | "Internal command [%02X] wait returned due to SR\n", | |
1442 | fis->command); | |
45038367 AT |
1443 | rv = -ENXIO; |
1444 | goto exec_ic_exit; | |
1445 | } | |
d0d096b1 | 1446 | mtip_device_reset(dd); /* recover from timeout issue */ |
88523a61 | 1447 | rv = -EAGAIN; |
d0d096b1 | 1448 | goto exec_ic_exit; |
88523a61 | 1449 | } |
88523a61 | 1450 | } else { |
d0d096b1 AT |
1451 | u32 hba_stat, port_stat; |
1452 | ||
88523a61 SB |
1453 | /* Spin for <timeout> checking if command still outstanding */ |
1454 | timeout = jiffies + msecs_to_jiffies(timeout); | |
8182b495 AT |
1455 | while ((readl(port->cmd_issue[MTIP_TAG_INTERNAL]) |
1456 | & (1 << MTIP_TAG_INTERNAL)) | |
1457 | && time_before(jiffies, timeout)) { | |
d0d096b1 | 1458 | if (mtip_check_surprise_removal(dd->pdev)) { |
8182b495 AT |
1459 | rv = -ENXIO; |
1460 | goto exec_ic_exit; | |
1461 | } | |
1462 | if ((fis->command != ATA_CMD_STANDBYNOW1) && | |
8a857a88 | 1463 | test_bit(MTIP_DDF_REMOVE_PENDING_BIT, |
d0d096b1 | 1464 | &dd->dd_flag)) { |
45038367 AT |
1465 | rv = -ENXIO; |
1466 | goto exec_ic_exit; | |
1467 | } | |
d0d096b1 AT |
1468 | port_stat = readl(port->mmio + PORT_IRQ_STAT); |
1469 | if (!port_stat) | |
1470 | continue; | |
1471 | ||
1472 | if (port_stat & PORT_IRQ_ERR) { | |
1473 | dev_err(&dd->pdev->dev, | |
1474 | "Internal command [%02X] failed\n", | |
1475 | fis->command); | |
1476 | mtip_device_reset(dd); | |
1477 | rv = -EIO; | |
1478 | goto exec_ic_exit; | |
1479 | } else { | |
1480 | writel(port_stat, port->mmio + PORT_IRQ_STAT); | |
1481 | hba_stat = readl(dd->mmio + HOST_IRQ_STAT); | |
1482 | if (hba_stat) | |
1483 | writel(hba_stat, | |
1484 | dd->mmio + HOST_IRQ_STAT); | |
d02e1f0a | 1485 | } |
d0d096b1 | 1486 | break; |
45038367 | 1487 | } |
d02e1f0a | 1488 | } |
88523a61 | 1489 | |
d02e1f0a | 1490 | if (readl(port->cmd_issue[MTIP_TAG_INTERNAL]) |
88523a61 | 1491 | & (1 << MTIP_TAG_INTERNAL)) { |
d02e1f0a | 1492 | rv = -ENXIO; |
d0d096b1 AT |
1493 | if (!test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag)) { |
1494 | mtip_device_reset(dd); | |
88523a61 SB |
1495 | rv = -EAGAIN; |
1496 | } | |
1497 | } | |
45038367 | 1498 | exec_ic_exit: |
88523a61 SB |
1499 | /* Clear the allocated and active bits for the internal command. */ |
1500 | atomic_set(&int_cmd->active, 0); | |
1501 | release_slot(port, MTIP_TAG_INTERNAL); | |
c74b0f58 AT |
1502 | if (rv >= 0 && mtip_pause_ncq(port, fis)) { |
1503 | /* NCQ paused */ | |
1504 | return rv; | |
1505 | } | |
8a857a88 | 1506 | clear_bit(MTIP_PF_IC_ACTIVE_BIT, &port->flags); |
60ec0eec | 1507 | wake_up_interruptible(&port->svc_wait); |
88523a61 SB |
1508 | |
1509 | return rv; | |
1510 | } | |
1511 | ||
1512 | /* | |
1513 | * Byte-swap ATA ID strings. | |
1514 | * | |
1515 | * ATA identify data contains strings in byte-swapped 16-bit words. | |
1516 | * They must be swapped (on all architectures) to be usable as C strings. | |
1517 | * This function swaps bytes in-place. | |
1518 | * | |
1519 | * @buf The buffer location of the string | |
1520 | * @len The number of bytes to swap | |
1521 | * | |
1522 | * return value | |
1523 | * None | |
1524 | */ | |
1525 | static inline void ata_swap_string(u16 *buf, unsigned int len) | |
1526 | { | |
1527 | int i; | |
1528 | for (i = 0; i < (len/2); i++) | |
1529 | be16_to_cpus(&buf[i]); | |
1530 | } | |
1531 | ||
670a6414 AT |
1532 | static void mtip_set_timeout(struct driver_data *dd, |
1533 | struct host_to_dev_fis *fis, | |
1534 | unsigned int *timeout, u8 erasemode) | |
1535 | { | |
1536 | switch (fis->command) { | |
1537 | case ATA_CMD_DOWNLOAD_MICRO: | |
1538 | *timeout = 120000; /* 2 minutes */ | |
1539 | break; | |
1540 | case ATA_CMD_SEC_ERASE_UNIT: | |
1541 | case 0xFC: | |
1542 | if (erasemode) | |
1543 | *timeout = ((*(dd->port->identify + 90) * 2) * 60000); | |
1544 | else | |
1545 | *timeout = ((*(dd->port->identify + 89) * 2) * 60000); | |
1546 | break; | |
1547 | case ATA_CMD_STANDBYNOW1: | |
1548 | *timeout = 120000; /* 2 minutes */ | |
1549 | break; | |
1550 | case 0xF7: | |
1551 | case 0xFA: | |
1552 | *timeout = 60000; /* 60 seconds */ | |
1553 | break; | |
1554 | case ATA_CMD_SMART: | |
1555 | *timeout = 15000; /* 15 seconds */ | |
1556 | break; | |
1557 | default: | |
1558 | *timeout = MTIP_IOCTL_COMMAND_TIMEOUT_MS; | |
1559 | break; | |
1560 | } | |
1561 | } | |
1562 | ||
88523a61 SB |
1563 | /* |
1564 | * Request the device identity information. | |
1565 | * | |
1566 | * If a user space buffer is not specified, i.e. is NULL, the | |
1567 | * identify information is still read from the drive and placed | |
1568 | * into the identify data buffer (@e port->identify) in the | |
1569 | * port data structure. | |
1570 | * When the identify buffer contains valid identify information @e | |
1571 | * port->identify_valid is non-zero. | |
1572 | * | |
1573 | * @port Pointer to the port structure. | |
1574 | * @user_buffer A user space buffer where the identify data should be | |
1575 | * copied. | |
1576 | * | |
1577 | * return value | |
1578 | * 0 Command completed successfully. | |
1579 | * -EFAULT An error occurred while coping data to the user buffer. | |
1580 | * -1 Command failed. | |
1581 | */ | |
1582 | static int mtip_get_identify(struct mtip_port *port, void __user *user_buffer) | |
1583 | { | |
1584 | int rv = 0; | |
1585 | struct host_to_dev_fis fis; | |
1586 | ||
8a857a88 | 1587 | if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &port->dd->dd_flag)) |
45038367 AT |
1588 | return -EFAULT; |
1589 | ||
88523a61 SB |
1590 | /* Build the FIS. */ |
1591 | memset(&fis, 0, sizeof(struct host_to_dev_fis)); | |
1592 | fis.type = 0x27; | |
1593 | fis.opts = 1 << 7; | |
1594 | fis.command = ATA_CMD_ID_ATA; | |
1595 | ||
1596 | /* Set the identify information as invalid. */ | |
1597 | port->identify_valid = 0; | |
1598 | ||
1599 | /* Clear the identify information. */ | |
1600 | memset(port->identify, 0, sizeof(u16) * ATA_ID_WORDS); | |
1601 | ||
1602 | /* Execute the command. */ | |
1603 | if (mtip_exec_internal_command(port, | |
1604 | &fis, | |
1605 | 5, | |
1606 | port->identify_dma, | |
1607 | sizeof(u16) * ATA_ID_WORDS, | |
1608 | 0, | |
1609 | GFP_KERNEL, | |
1610 | MTIP_INTERNAL_COMMAND_TIMEOUT_MS) | |
1611 | < 0) { | |
1612 | rv = -1; | |
1613 | goto out; | |
1614 | } | |
1615 | ||
1616 | /* | |
1617 | * Perform any necessary byte-swapping. Yes, the kernel does in fact | |
1618 | * perform field-sensitive swapping on the string fields. | |
1619 | * See the kernel use of ata_id_string() for proof of this. | |
1620 | */ | |
1621 | #ifdef __LITTLE_ENDIAN | |
1622 | ata_swap_string(port->identify + 27, 40); /* model string*/ | |
1623 | ata_swap_string(port->identify + 23, 8); /* firmware string*/ | |
1624 | ata_swap_string(port->identify + 10, 20); /* serial# string*/ | |
1625 | #else | |
1626 | { | |
1627 | int i; | |
1628 | for (i = 0; i < ATA_ID_WORDS; i++) | |
1629 | port->identify[i] = le16_to_cpu(port->identify[i]); | |
1630 | } | |
1631 | #endif | |
1632 | ||
26d58057 SB |
1633 | /* Check security locked state */ |
1634 | if (port->identify[128] & 0x4) | |
1635 | set_bit(MTIP_DDF_SEC_LOCK_BIT, &port->dd->dd_flag); | |
1636 | else | |
1637 | clear_bit(MTIP_DDF_SEC_LOCK_BIT, &port->dd->dd_flag); | |
1638 | ||
68466cbf | 1639 | #ifdef MTIP_TRIM /* Disabling TRIM support temporarily */ |
15283469 AT |
1640 | /* Demux ID.DRAT & ID.RZAT to determine trim support */ |
1641 | if (port->identify[69] & (1 << 14) && port->identify[69] & (1 << 5)) | |
1642 | port->dd->trim_supp = true; | |
1643 | else | |
68466cbf | 1644 | #endif |
15283469 AT |
1645 | port->dd->trim_supp = false; |
1646 | ||
88523a61 SB |
1647 | /* Set the identify buffer as valid. */ |
1648 | port->identify_valid = 1; | |
1649 | ||
1650 | if (user_buffer) { | |
1651 | if (copy_to_user( | |
1652 | user_buffer, | |
1653 | port->identify, | |
1654 | ATA_ID_WORDS * sizeof(u16))) { | |
1655 | rv = -EFAULT; | |
1656 | goto out; | |
1657 | } | |
1658 | } | |
1659 | ||
1660 | out: | |
88523a61 SB |
1661 | return rv; |
1662 | } | |
1663 | ||
1664 | /* | |
1665 | * Issue a standby immediate command to the device. | |
1666 | * | |
1667 | * @port Pointer to the port structure. | |
1668 | * | |
1669 | * return value | |
1670 | * 0 Command was executed successfully. | |
1671 | * -1 An error occurred while executing the command. | |
1672 | */ | |
1673 | static int mtip_standby_immediate(struct mtip_port *port) | |
1674 | { | |
1675 | int rv; | |
1676 | struct host_to_dev_fis fis; | |
f6587217 | 1677 | unsigned long start; |
670a6414 | 1678 | unsigned int timeout; |
88523a61 | 1679 | |
88523a61 SB |
1680 | /* Build the FIS. */ |
1681 | memset(&fis, 0, sizeof(struct host_to_dev_fis)); | |
1682 | fis.type = 0x27; | |
1683 | fis.opts = 1 << 7; | |
1684 | fis.command = ATA_CMD_STANDBYNOW1; | |
1685 | ||
670a6414 AT |
1686 | mtip_set_timeout(port->dd, &fis, &timeout, 0); |
1687 | ||
f6587217 | 1688 | start = jiffies; |
88523a61 SB |
1689 | rv = mtip_exec_internal_command(port, |
1690 | &fis, | |
1691 | 5, | |
1692 | 0, | |
1693 | 0, | |
1694 | 0, | |
f6587217 | 1695 | GFP_ATOMIC, |
670a6414 | 1696 | timeout); |
f6587217 AT |
1697 | dbg_printk(MTIP_DRV_NAME "Time taken to complete standby cmd: %d ms\n", |
1698 | jiffies_to_msecs(jiffies - start)); | |
1699 | if (rv) | |
1700 | dev_warn(&port->dd->pdev->dev, | |
1701 | "STANDBY IMMEDIATE command failed.\n"); | |
1702 | ||
1703 | return rv; | |
1704 | } | |
1705 | ||
1706 | /* | |
1707 | * Issue a READ LOG EXT command to the device. | |
1708 | * | |
1709 | * @port pointer to the port structure. | |
1710 | * @page page number to fetch | |
1711 | * @buffer pointer to buffer | |
1712 | * @buffer_dma dma address corresponding to @buffer | |
1713 | * @sectors page length to fetch, in sectors | |
1714 | * | |
1715 | * return value | |
1716 | * @rv return value from mtip_exec_internal_command() | |
1717 | */ | |
1718 | static int mtip_read_log_page(struct mtip_port *port, u8 page, u16 *buffer, | |
1719 | dma_addr_t buffer_dma, unsigned int sectors) | |
1720 | { | |
1721 | struct host_to_dev_fis fis; | |
1722 | ||
1723 | memset(&fis, 0, sizeof(struct host_to_dev_fis)); | |
1724 | fis.type = 0x27; | |
1725 | fis.opts = 1 << 7; | |
1726 | fis.command = ATA_CMD_READ_LOG_EXT; | |
1727 | fis.sect_count = sectors & 0xFF; | |
1728 | fis.sect_cnt_ex = (sectors >> 8) & 0xFF; | |
1729 | fis.lba_low = page; | |
1730 | fis.lba_mid = 0; | |
1731 | fis.device = ATA_DEVICE_OBS; | |
1732 | ||
1733 | memset(buffer, 0, sectors * ATA_SECT_SIZE); | |
1734 | ||
1735 | return mtip_exec_internal_command(port, | |
1736 | &fis, | |
1737 | 5, | |
1738 | buffer_dma, | |
1739 | sectors * ATA_SECT_SIZE, | |
1740 | 0, | |
1741 | GFP_ATOMIC, | |
1742 | MTIP_INTERNAL_COMMAND_TIMEOUT_MS); | |
1743 | } | |
1744 | ||
1745 | /* | |
1746 | * Issue a SMART READ DATA command to the device. | |
1747 | * | |
1748 | * @port pointer to the port structure. | |
1749 | * @buffer pointer to buffer | |
1750 | * @buffer_dma dma address corresponding to @buffer | |
1751 | * | |
1752 | * return value | |
1753 | * @rv return value from mtip_exec_internal_command() | |
1754 | */ | |
1755 | static int mtip_get_smart_data(struct mtip_port *port, u8 *buffer, | |
1756 | dma_addr_t buffer_dma) | |
1757 | { | |
1758 | struct host_to_dev_fis fis; | |
1759 | ||
1760 | memset(&fis, 0, sizeof(struct host_to_dev_fis)); | |
1761 | fis.type = 0x27; | |
1762 | fis.opts = 1 << 7; | |
1763 | fis.command = ATA_CMD_SMART; | |
1764 | fis.features = 0xD0; | |
1765 | fis.sect_count = 1; | |
1766 | fis.lba_mid = 0x4F; | |
1767 | fis.lba_hi = 0xC2; | |
1768 | fis.device = ATA_DEVICE_OBS; | |
1769 | ||
1770 | return mtip_exec_internal_command(port, | |
1771 | &fis, | |
1772 | 5, | |
1773 | buffer_dma, | |
1774 | ATA_SECT_SIZE, | |
1775 | 0, | |
1776 | GFP_ATOMIC, | |
88523a61 | 1777 | 15000); |
f6587217 AT |
1778 | } |
1779 | ||
1780 | /* | |
1781 | * Get the value of a smart attribute | |
1782 | * | |
1783 | * @port pointer to the port structure | |
1784 | * @id attribute number | |
1785 | * @attrib pointer to return attrib information corresponding to @id | |
1786 | * | |
1787 | * return value | |
1788 | * -EINVAL NULL buffer passed or unsupported attribute @id. | |
1789 | * -EPERM Identify data not valid, SMART not supported or not enabled | |
1790 | */ | |
1791 | static int mtip_get_smart_attr(struct mtip_port *port, unsigned int id, | |
1792 | struct smart_attr *attrib) | |
1793 | { | |
1794 | int rv, i; | |
1795 | struct smart_attr *pattr; | |
1796 | ||
1797 | if (!attrib) | |
1798 | return -EINVAL; | |
1799 | ||
1800 | if (!port->identify_valid) { | |
1801 | dev_warn(&port->dd->pdev->dev, "IDENTIFY DATA not valid\n"); | |
1802 | return -EPERM; | |
1803 | } | |
1804 | if (!(port->identify[82] & 0x1)) { | |
1805 | dev_warn(&port->dd->pdev->dev, "SMART not supported\n"); | |
1806 | return -EPERM; | |
1807 | } | |
1808 | if (!(port->identify[85] & 0x1)) { | |
1809 | dev_warn(&port->dd->pdev->dev, "SMART not enabled\n"); | |
1810 | return -EPERM; | |
1811 | } | |
1812 | ||
1813 | memset(port->smart_buf, 0, ATA_SECT_SIZE); | |
1814 | rv = mtip_get_smart_data(port, port->smart_buf, port->smart_buf_dma); | |
1815 | if (rv) { | |
1816 | dev_warn(&port->dd->pdev->dev, "Failed to ge SMART data\n"); | |
1817 | return rv; | |
1818 | } | |
1819 | ||
1820 | pattr = (struct smart_attr *)(port->smart_buf + 2); | |
1821 | for (i = 0; i < 29; i++, pattr++) | |
1822 | if (pattr->attr_id == id) { | |
1823 | memcpy(attrib, pattr, sizeof(struct smart_attr)); | |
1824 | break; | |
1825 | } | |
1826 | ||
1827 | if (i == 29) { | |
1828 | dev_warn(&port->dd->pdev->dev, | |
1829 | "Query for invalid SMART attribute ID\n"); | |
1830 | rv = -EINVAL; | |
1831 | } | |
88523a61 | 1832 | |
88523a61 SB |
1833 | return rv; |
1834 | } | |
1835 | ||
15283469 AT |
1836 | /* |
1837 | * Trim unused sectors | |
1838 | * | |
1839 | * @dd pointer to driver_data structure | |
1840 | * @lba starting lba | |
1841 | * @len # of 512b sectors to trim | |
1842 | * | |
1843 | * return value | |
1844 | * -ENOMEM Out of dma memory | |
1845 | * -EINVAL Invalid parameters passed in, trim not supported | |
1846 | * -EIO Error submitting trim request to hw | |
1847 | */ | |
d0d096b1 AT |
1848 | static int mtip_send_trim(struct driver_data *dd, unsigned int lba, |
1849 | unsigned int len) | |
15283469 AT |
1850 | { |
1851 | int i, rv = 0; | |
1852 | u64 tlba, tlen, sect_left; | |
1853 | struct mtip_trim_entry *buf; | |
1854 | dma_addr_t dma_addr; | |
1855 | struct host_to_dev_fis fis; | |
1856 | ||
1857 | if (!len || dd->trim_supp == false) | |
1858 | return -EINVAL; | |
1859 | ||
1860 | /* Trim request too big */ | |
1861 | WARN_ON(len > (MTIP_MAX_TRIM_ENTRY_LEN * MTIP_MAX_TRIM_ENTRIES)); | |
1862 | ||
1863 | /* Trim request not aligned on 4k boundary */ | |
1864 | WARN_ON(len % 8 != 0); | |
1865 | ||
1866 | /* Warn if vu_trim structure is too big */ | |
1867 | WARN_ON(sizeof(struct mtip_trim) > ATA_SECT_SIZE); | |
1868 | ||
1869 | /* Allocate a DMA buffer for the trim structure */ | |
1870 | buf = dmam_alloc_coherent(&dd->pdev->dev, ATA_SECT_SIZE, &dma_addr, | |
1871 | GFP_KERNEL); | |
1872 | if (!buf) | |
1873 | return -ENOMEM; | |
1874 | memset(buf, 0, ATA_SECT_SIZE); | |
1875 | ||
1876 | for (i = 0, sect_left = len, tlba = lba; | |
1877 | i < MTIP_MAX_TRIM_ENTRIES && sect_left; | |
1878 | i++) { | |
1879 | tlen = (sect_left >= MTIP_MAX_TRIM_ENTRY_LEN ? | |
1880 | MTIP_MAX_TRIM_ENTRY_LEN : | |
1881 | sect_left); | |
1882 | buf[i].lba = __force_bit2int cpu_to_le32(tlba); | |
1883 | buf[i].range = __force_bit2int cpu_to_le16(tlen); | |
1884 | tlba += tlen; | |
1885 | sect_left -= tlen; | |
1886 | } | |
1887 | WARN_ON(sect_left != 0); | |
1888 | ||
1889 | /* Build the fis */ | |
1890 | memset(&fis, 0, sizeof(struct host_to_dev_fis)); | |
1891 | fis.type = 0x27; | |
1892 | fis.opts = 1 << 7; | |
1893 | fis.command = 0xfb; | |
1894 | fis.features = 0x60; | |
1895 | fis.sect_count = 1; | |
1896 | fis.device = ATA_DEVICE_OBS; | |
1897 | ||
1898 | if (mtip_exec_internal_command(dd->port, | |
1899 | &fis, | |
1900 | 5, | |
1901 | dma_addr, | |
1902 | ATA_SECT_SIZE, | |
1903 | 0, | |
1904 | GFP_KERNEL, | |
1905 | MTIP_TRIM_TIMEOUT_MS) < 0) | |
1906 | rv = -EIO; | |
1907 | ||
1908 | dmam_free_coherent(&dd->pdev->dev, ATA_SECT_SIZE, buf, dma_addr); | |
1909 | return rv; | |
1910 | } | |
1911 | ||
88523a61 SB |
1912 | /* |
1913 | * Get the drive capacity. | |
1914 | * | |
1915 | * @dd Pointer to the device data structure. | |
1916 | * @sectors Pointer to the variable that will receive the sector count. | |
1917 | * | |
1918 | * return value | |
1919 | * 1 Capacity was returned successfully. | |
1920 | * 0 The identify information is invalid. | |
1921 | */ | |
6316668f | 1922 | static bool mtip_hw_get_capacity(struct driver_data *dd, sector_t *sectors) |
88523a61 SB |
1923 | { |
1924 | struct mtip_port *port = dd->port; | |
1925 | u64 total, raw0, raw1, raw2, raw3; | |
1926 | raw0 = port->identify[100]; | |
1927 | raw1 = port->identify[101]; | |
1928 | raw2 = port->identify[102]; | |
1929 | raw3 = port->identify[103]; | |
1930 | total = raw0 | raw1<<16 | raw2<<32 | raw3<<48; | |
1931 | *sectors = total; | |
1932 | return (bool) !!port->identify_valid; | |
1933 | } | |
1934 | ||
88523a61 SB |
1935 | /* |
1936 | * Display the identify command data. | |
1937 | * | |
1938 | * @port Pointer to the port data structure. | |
1939 | * | |
1940 | * return value | |
1941 | * None | |
1942 | */ | |
1943 | static void mtip_dump_identify(struct mtip_port *port) | |
1944 | { | |
1945 | sector_t sectors; | |
1946 | unsigned short revid; | |
1947 | char cbuf[42]; | |
1948 | ||
1949 | if (!port->identify_valid) | |
1950 | return; | |
1951 | ||
1952 | strlcpy(cbuf, (char *)(port->identify+10), 21); | |
1953 | dev_info(&port->dd->pdev->dev, | |
1954 | "Serial No.: %s\n", cbuf); | |
1955 | ||
1956 | strlcpy(cbuf, (char *)(port->identify+23), 9); | |
1957 | dev_info(&port->dd->pdev->dev, | |
1958 | "Firmware Ver.: %s\n", cbuf); | |
1959 | ||
1960 | strlcpy(cbuf, (char *)(port->identify+27), 41); | |
1961 | dev_info(&port->dd->pdev->dev, "Model: %s\n", cbuf); | |
1962 | ||
26d58057 SB |
1963 | dev_info(&port->dd->pdev->dev, "Security: %04x %s\n", |
1964 | port->identify[128], | |
1965 | port->identify[128] & 0x4 ? "(LOCKED)" : ""); | |
1966 | ||
88523a61 SB |
1967 | if (mtip_hw_get_capacity(port->dd, §ors)) |
1968 | dev_info(&port->dd->pdev->dev, | |
1969 | "Capacity: %llu sectors (%llu MB)\n", | |
1970 | (u64)sectors, | |
1971 | ((u64)sectors) * ATA_SECT_SIZE >> 20); | |
1972 | ||
1973 | pci_read_config_word(port->dd->pdev, PCI_REVISION_ID, &revid); | |
60ec0eec | 1974 | switch (revid & 0xFF) { |
88523a61 SB |
1975 | case 0x1: |
1976 | strlcpy(cbuf, "A0", 3); | |
1977 | break; | |
1978 | case 0x3: | |
1979 | strlcpy(cbuf, "A2", 3); | |
1980 | break; | |
1981 | default: | |
1982 | strlcpy(cbuf, "?", 2); | |
1983 | break; | |
1984 | } | |
1985 | dev_info(&port->dd->pdev->dev, | |
1986 | "Card Type: %s\n", cbuf); | |
1987 | } | |
1988 | ||
1989 | /* | |
1990 | * Map the commands scatter list into the command table. | |
1991 | * | |
1992 | * @command Pointer to the command. | |
1993 | * @nents Number of scatter list entries. | |
1994 | * | |
1995 | * return value | |
1996 | * None | |
1997 | */ | |
1998 | static inline void fill_command_sg(struct driver_data *dd, | |
1999 | struct mtip_cmd *command, | |
2000 | int nents) | |
2001 | { | |
2002 | int n; | |
2003 | unsigned int dma_len; | |
2004 | struct mtip_cmd_sg *command_sg; | |
2005 | struct scatterlist *sg = command->sg; | |
2006 | ||
2007 | command_sg = command->command + AHCI_CMD_TBL_HDR_SZ; | |
2008 | ||
2009 | for (n = 0; n < nents; n++) { | |
2010 | dma_len = sg_dma_len(sg); | |
2011 | if (dma_len > 0x400000) | |
2012 | dev_err(&dd->pdev->dev, | |
2013 | "DMA segment length truncated\n"); | |
60ec0eec AT |
2014 | command_sg->info = __force_bit2int |
2015 | cpu_to_le32((dma_len-1) & 0x3FFFFF); | |
2016 | command_sg->dba = __force_bit2int | |
2017 | cpu_to_le32(sg_dma_address(sg)); | |
2018 | command_sg->dba_upper = __force_bit2int | |
2019 | cpu_to_le32((sg_dma_address(sg) >> 16) >> 16); | |
88523a61 SB |
2020 | command_sg++; |
2021 | sg++; | |
2022 | } | |
2023 | } | |
2024 | ||
2025 | /* | |
2026 | * @brief Execute a drive command. | |
2027 | * | |
2028 | * return value 0 The command completed successfully. | |
2029 | * return value -1 An error occurred while executing the command. | |
2030 | */ | |
6316668f | 2031 | static int exec_drive_task(struct mtip_port *port, u8 *command) |
88523a61 SB |
2032 | { |
2033 | struct host_to_dev_fis fis; | |
2034 | struct host_to_dev_fis *reply = (port->rxfis + RX_FIS_D2H_REG); | |
2035 | ||
88523a61 SB |
2036 | /* Build the FIS. */ |
2037 | memset(&fis, 0, sizeof(struct host_to_dev_fis)); | |
2038 | fis.type = 0x27; | |
2039 | fis.opts = 1 << 7; | |
2040 | fis.command = command[0]; | |
2041 | fis.features = command[1]; | |
2042 | fis.sect_count = command[2]; | |
2043 | fis.sector = command[3]; | |
2044 | fis.cyl_low = command[4]; | |
2045 | fis.cyl_hi = command[5]; | |
2046 | fis.device = command[6] & ~0x10; /* Clear the dev bit*/ | |
2047 | ||
c74b0f58 | 2048 | dbg_printk(MTIP_DRV_NAME " %s: User Command: cmd %x, feat %x, nsect %x, sect %x, lcyl %x, hcyl %x, sel %x\n", |
88523a61 SB |
2049 | __func__, |
2050 | command[0], | |
2051 | command[1], | |
2052 | command[2], | |
2053 | command[3], | |
2054 | command[4], | |
2055 | command[5], | |
2056 | command[6]); | |
2057 | ||
2058 | /* Execute the command. */ | |
2059 | if (mtip_exec_internal_command(port, | |
2060 | &fis, | |
2061 | 5, | |
2062 | 0, | |
2063 | 0, | |
2064 | 0, | |
2065 | GFP_KERNEL, | |
2066 | MTIP_IOCTL_COMMAND_TIMEOUT_MS) < 0) { | |
88523a61 SB |
2067 | return -1; |
2068 | } | |
2069 | ||
2070 | command[0] = reply->command; /* Status*/ | |
2071 | command[1] = reply->features; /* Error*/ | |
2072 | command[4] = reply->cyl_low; | |
2073 | command[5] = reply->cyl_hi; | |
2074 | ||
c74b0f58 | 2075 | dbg_printk(MTIP_DRV_NAME " %s: Completion Status: stat %x, err %x , cyl_lo %x cyl_hi %x\n", |
88523a61 SB |
2076 | __func__, |
2077 | command[0], | |
2078 | command[1], | |
2079 | command[4], | |
2080 | command[5]); | |
2081 | ||
88523a61 SB |
2082 | return 0; |
2083 | } | |
2084 | ||
2085 | /* | |
2086 | * @brief Execute a drive command. | |
2087 | * | |
2088 | * @param port Pointer to the port data structure. | |
2089 | * @param command Pointer to the user specified command parameters. | |
2090 | * @param user_buffer Pointer to the user space buffer where read sector | |
2091 | * data should be copied. | |
2092 | * | |
2093 | * return value 0 The command completed successfully. | |
2094 | * return value -EFAULT An error occurred while copying the completion | |
2095 | * data to the user space buffer. | |
2096 | * return value -1 An error occurred while executing the command. | |
2097 | */ | |
6316668f JA |
2098 | static int exec_drive_command(struct mtip_port *port, u8 *command, |
2099 | void __user *user_buffer) | |
88523a61 SB |
2100 | { |
2101 | struct host_to_dev_fis fis; | |
e602878f AT |
2102 | struct host_to_dev_fis *reply; |
2103 | u8 *buf = NULL; | |
2104 | dma_addr_t dma_addr = 0; | |
2105 | int rv = 0, xfer_sz = command[3]; | |
2106 | ||
2107 | if (xfer_sz) { | |
97651ea6 | 2108 | if (!user_buffer) |
e602878f AT |
2109 | return -EFAULT; |
2110 | ||
2111 | buf = dmam_alloc_coherent(&port->dd->pdev->dev, | |
2112 | ATA_SECT_SIZE * xfer_sz, | |
2113 | &dma_addr, | |
2114 | GFP_KERNEL); | |
2115 | if (!buf) { | |
2116 | dev_err(&port->dd->pdev->dev, | |
2117 | "Memory allocation failed (%d bytes)\n", | |
2118 | ATA_SECT_SIZE * xfer_sz); | |
2119 | return -ENOMEM; | |
2120 | } | |
2121 | memset(buf, 0, ATA_SECT_SIZE * xfer_sz); | |
2122 | } | |
88523a61 | 2123 | |
88523a61 SB |
2124 | /* Build the FIS. */ |
2125 | memset(&fis, 0, sizeof(struct host_to_dev_fis)); | |
e602878f AT |
2126 | fis.type = 0x27; |
2127 | fis.opts = 1 << 7; | |
2128 | fis.command = command[0]; | |
88523a61 SB |
2129 | fis.features = command[2]; |
2130 | fis.sect_count = command[3]; | |
2131 | if (fis.command == ATA_CMD_SMART) { | |
2132 | fis.sector = command[1]; | |
60ec0eec AT |
2133 | fis.cyl_low = 0x4F; |
2134 | fis.cyl_hi = 0xC2; | |
88523a61 SB |
2135 | } |
2136 | ||
e602878f AT |
2137 | if (xfer_sz) |
2138 | reply = (port->rxfis + RX_FIS_PIO_SETUP); | |
2139 | else | |
2140 | reply = (port->rxfis + RX_FIS_D2H_REG); | |
2141 | ||
88523a61 | 2142 | dbg_printk(MTIP_DRV_NAME |
c74b0f58 | 2143 | " %s: User Command: cmd %x, sect %x, " |
88523a61 SB |
2144 | "feat %x, sectcnt %x\n", |
2145 | __func__, | |
2146 | command[0], | |
2147 | command[1], | |
2148 | command[2], | |
2149 | command[3]); | |
2150 | ||
88523a61 SB |
2151 | /* Execute the command. */ |
2152 | if (mtip_exec_internal_command(port, | |
2153 | &fis, | |
2154 | 5, | |
e602878f AT |
2155 | (xfer_sz ? dma_addr : 0), |
2156 | (xfer_sz ? ATA_SECT_SIZE * xfer_sz : 0), | |
88523a61 SB |
2157 | 0, |
2158 | GFP_KERNEL, | |
2159 | MTIP_IOCTL_COMMAND_TIMEOUT_MS) | |
2160 | < 0) { | |
e602878f AT |
2161 | rv = -EFAULT; |
2162 | goto exit_drive_command; | |
88523a61 SB |
2163 | } |
2164 | ||
2165 | /* Collect the completion status. */ | |
2166 | command[0] = reply->command; /* Status*/ | |
2167 | command[1] = reply->features; /* Error*/ | |
e602878f | 2168 | command[2] = reply->sect_count; |
88523a61 SB |
2169 | |
2170 | dbg_printk(MTIP_DRV_NAME | |
c74b0f58 | 2171 | " %s: Completion Status: stat %x, " |
e602878f | 2172 | "err %x, nsect %x\n", |
88523a61 SB |
2173 | __func__, |
2174 | command[0], | |
2175 | command[1], | |
2176 | command[2]); | |
2177 | ||
e602878f | 2178 | if (xfer_sz) { |
88523a61 | 2179 | if (copy_to_user(user_buffer, |
e602878f | 2180 | buf, |
88523a61 | 2181 | ATA_SECT_SIZE * command[3])) { |
e602878f AT |
2182 | rv = -EFAULT; |
2183 | goto exit_drive_command; | |
88523a61 SB |
2184 | } |
2185 | } | |
e602878f AT |
2186 | exit_drive_command: |
2187 | if (buf) | |
2188 | dmam_free_coherent(&port->dd->pdev->dev, | |
2189 | ATA_SECT_SIZE * xfer_sz, buf, dma_addr); | |
2190 | return rv; | |
88523a61 SB |
2191 | } |
2192 | ||
2193 | /* | |
2194 | * Indicates whether a command has a single sector payload. | |
2195 | * | |
2196 | * @command passed to the device to perform the certain event. | |
2197 | * @features passed to the device to perform the certain event. | |
2198 | * | |
2199 | * return value | |
2200 | * 1 command is one that always has a single sector payload, | |
2201 | * regardless of the value in the Sector Count field. | |
2202 | * 0 otherwise | |
2203 | * | |
2204 | */ | |
2205 | static unsigned int implicit_sector(unsigned char command, | |
2206 | unsigned char features) | |
2207 | { | |
2208 | unsigned int rv = 0; | |
2209 | ||
2210 | /* list of commands that have an implicit sector count of 1 */ | |
2211 | switch (command) { | |
60ec0eec AT |
2212 | case ATA_CMD_SEC_SET_PASS: |
2213 | case ATA_CMD_SEC_UNLOCK: | |
2214 | case ATA_CMD_SEC_ERASE_PREP: | |
2215 | case ATA_CMD_SEC_ERASE_UNIT: | |
2216 | case ATA_CMD_SEC_FREEZE_LOCK: | |
2217 | case ATA_CMD_SEC_DISABLE_PASS: | |
2218 | case ATA_CMD_PMP_READ: | |
2219 | case ATA_CMD_PMP_WRITE: | |
88523a61 SB |
2220 | rv = 1; |
2221 | break; | |
60ec0eec AT |
2222 | case ATA_CMD_SET_MAX: |
2223 | if (features == ATA_SET_MAX_UNLOCK) | |
88523a61 SB |
2224 | rv = 1; |
2225 | break; | |
60ec0eec AT |
2226 | case ATA_CMD_SMART: |
2227 | if ((features == ATA_SMART_READ_VALUES) || | |
2228 | (features == ATA_SMART_READ_THRESHOLDS)) | |
88523a61 SB |
2229 | rv = 1; |
2230 | break; | |
60ec0eec AT |
2231 | case ATA_CMD_CONF_OVERLAY: |
2232 | if ((features == ATA_DCO_IDENTIFY) || | |
2233 | (features == ATA_DCO_SET)) | |
88523a61 SB |
2234 | rv = 1; |
2235 | break; | |
2236 | } | |
2237 | return rv; | |
2238 | } | |
2df7aa96 | 2239 | |
88523a61 SB |
2240 | /* |
2241 | * Executes a taskfile | |
2242 | * See ide_taskfile_ioctl() for derivation | |
2243 | */ | |
2244 | static int exec_drive_taskfile(struct driver_data *dd, | |
ef0f1587 JA |
2245 | void __user *buf, |
2246 | ide_task_request_t *req_task, | |
2247 | int outtotal) | |
88523a61 SB |
2248 | { |
2249 | struct host_to_dev_fis fis; | |
2250 | struct host_to_dev_fis *reply; | |
88523a61 SB |
2251 | u8 *outbuf = NULL; |
2252 | u8 *inbuf = NULL; | |
16d02c04 JA |
2253 | dma_addr_t outbuf_dma = 0; |
2254 | dma_addr_t inbuf_dma = 0; | |
2255 | dma_addr_t dma_buffer = 0; | |
88523a61 | 2256 | int err = 0; |
88523a61 SB |
2257 | unsigned int taskin = 0; |
2258 | unsigned int taskout = 0; | |
2259 | u8 nsect = 0; | |
2df7aa96 | 2260 | unsigned int timeout; |
88523a61 SB |
2261 | unsigned int force_single_sector; |
2262 | unsigned int transfer_size; | |
2263 | unsigned long task_file_data; | |
ef0f1587 | 2264 | int intotal = outtotal + req_task->out_size; |
4453bc88 | 2265 | int erasemode = 0; |
88523a61 SB |
2266 | |
2267 | taskout = req_task->out_size; | |
2268 | taskin = req_task->in_size; | |
2269 | /* 130560 = 512 * 0xFF*/ | |
2270 | if (taskin > 130560 || taskout > 130560) { | |
2271 | err = -EINVAL; | |
2272 | goto abort; | |
2273 | } | |
2274 | ||
2275 | if (taskout) { | |
2276 | outbuf = kzalloc(taskout, GFP_KERNEL); | |
2277 | if (outbuf == NULL) { | |
2278 | err = -ENOMEM; | |
2279 | goto abort; | |
2280 | } | |
2281 | if (copy_from_user(outbuf, buf + outtotal, taskout)) { | |
2282 | err = -EFAULT; | |
2283 | goto abort; | |
2284 | } | |
2285 | outbuf_dma = pci_map_single(dd->pdev, | |
2286 | outbuf, | |
2287 | taskout, | |
2288 | DMA_TO_DEVICE); | |
16d02c04 | 2289 | if (outbuf_dma == 0) { |
88523a61 SB |
2290 | err = -ENOMEM; |
2291 | goto abort; | |
2292 | } | |
2293 | dma_buffer = outbuf_dma; | |
2294 | } | |
2295 | ||
2296 | if (taskin) { | |
2297 | inbuf = kzalloc(taskin, GFP_KERNEL); | |
2298 | if (inbuf == NULL) { | |
2299 | err = -ENOMEM; | |
2300 | goto abort; | |
2301 | } | |
2302 | ||
2303 | if (copy_from_user(inbuf, buf + intotal, taskin)) { | |
2304 | err = -EFAULT; | |
2305 | goto abort; | |
2306 | } | |
2307 | inbuf_dma = pci_map_single(dd->pdev, | |
2308 | inbuf, | |
2309 | taskin, DMA_FROM_DEVICE); | |
16d02c04 | 2310 | if (inbuf_dma == 0) { |
88523a61 SB |
2311 | err = -ENOMEM; |
2312 | goto abort; | |
2313 | } | |
2314 | dma_buffer = inbuf_dma; | |
2315 | } | |
2316 | ||
2317 | /* only supports PIO and non-data commands from this ioctl. */ | |
2318 | switch (req_task->data_phase) { | |
2319 | case TASKFILE_OUT: | |
2320 | nsect = taskout / ATA_SECT_SIZE; | |
2321 | reply = (dd->port->rxfis + RX_FIS_PIO_SETUP); | |
2322 | break; | |
2323 | case TASKFILE_IN: | |
2324 | reply = (dd->port->rxfis + RX_FIS_PIO_SETUP); | |
2325 | break; | |
2326 | case TASKFILE_NO_DATA: | |
2327 | reply = (dd->port->rxfis + RX_FIS_D2H_REG); | |
2328 | break; | |
2329 | default: | |
2330 | err = -EINVAL; | |
2331 | goto abort; | |
2332 | } | |
2333 | ||
88523a61 SB |
2334 | /* Build the FIS. */ |
2335 | memset(&fis, 0, sizeof(struct host_to_dev_fis)); | |
2336 | ||
2337 | fis.type = 0x27; | |
2338 | fis.opts = 1 << 7; | |
2339 | fis.command = req_task->io_ports[7]; | |
2340 | fis.features = req_task->io_ports[1]; | |
2341 | fis.sect_count = req_task->io_ports[2]; | |
2342 | fis.lba_low = req_task->io_ports[3]; | |
2343 | fis.lba_mid = req_task->io_ports[4]; | |
2344 | fis.lba_hi = req_task->io_ports[5]; | |
2345 | /* Clear the dev bit*/ | |
2346 | fis.device = req_task->io_ports[6] & ~0x10; | |
2347 | ||
2348 | if ((req_task->in_flags.all == 0) && (req_task->out_flags.all & 1)) { | |
2349 | req_task->in_flags.all = | |
2350 | IDE_TASKFILE_STD_IN_FLAGS | | |
2351 | (IDE_HOB_STD_IN_FLAGS << 8); | |
2352 | fis.lba_low_ex = req_task->hob_ports[3]; | |
2353 | fis.lba_mid_ex = req_task->hob_ports[4]; | |
2354 | fis.lba_hi_ex = req_task->hob_ports[5]; | |
2355 | fis.features_ex = req_task->hob_ports[1]; | |
2356 | fis.sect_cnt_ex = req_task->hob_ports[2]; | |
2357 | ||
2358 | } else { | |
2359 | req_task->in_flags.all = IDE_TASKFILE_STD_IN_FLAGS; | |
2360 | } | |
2361 | ||
2362 | force_single_sector = implicit_sector(fis.command, fis.features); | |
2363 | ||
2364 | if ((taskin || taskout) && (!fis.sect_count)) { | |
2365 | if (nsect) | |
2366 | fis.sect_count = nsect; | |
2367 | else { | |
2368 | if (!force_single_sector) { | |
2369 | dev_warn(&dd->pdev->dev, | |
2370 | "data movement but " | |
2371 | "sect_count is 0\n"); | |
88523a61 SB |
2372 | err = -EINVAL; |
2373 | goto abort; | |
2374 | } | |
2375 | } | |
2376 | } | |
2377 | ||
2378 | dbg_printk(MTIP_DRV_NAME | |
c74b0f58 | 2379 | " %s: cmd %x, feat %x, nsect %x," |
88523a61 SB |
2380 | " sect/lbal %x, lcyl/lbam %x, hcyl/lbah %x," |
2381 | " head/dev %x\n", | |
c74b0f58 | 2382 | __func__, |
88523a61 SB |
2383 | fis.command, |
2384 | fis.features, | |
2385 | fis.sect_count, | |
2386 | fis.lba_low, | |
2387 | fis.lba_mid, | |
2388 | fis.lba_hi, | |
2389 | fis.device); | |
2390 | ||
4453bc88 | 2391 | /* check for erase mode support during secure erase.*/ |
3208795e SM |
2392 | if ((fis.command == ATA_CMD_SEC_ERASE_UNIT) && outbuf && |
2393 | (outbuf[0] & MTIP_SEC_ERASE_MODE)) { | |
4453bc88 SM |
2394 | erasemode = 1; |
2395 | } | |
2396 | ||
2397 | mtip_set_timeout(dd, &fis, &timeout, erasemode); | |
88523a61 SB |
2398 | |
2399 | /* Determine the correct transfer size.*/ | |
2400 | if (force_single_sector) | |
2401 | transfer_size = ATA_SECT_SIZE; | |
2402 | else | |
2403 | transfer_size = ATA_SECT_SIZE * fis.sect_count; | |
2404 | ||
2405 | /* Execute the command.*/ | |
2406 | if (mtip_exec_internal_command(dd->port, | |
2407 | &fis, | |
2408 | 5, | |
2409 | dma_buffer, | |
2410 | transfer_size, | |
2411 | 0, | |
2412 | GFP_KERNEL, | |
2413 | timeout) < 0) { | |
88523a61 SB |
2414 | err = -EIO; |
2415 | goto abort; | |
2416 | } | |
2417 | ||
2418 | task_file_data = readl(dd->port->mmio+PORT_TFDATA); | |
2419 | ||
2420 | if ((req_task->data_phase == TASKFILE_IN) && !(task_file_data & 1)) { | |
2421 | reply = dd->port->rxfis + RX_FIS_PIO_SETUP; | |
2422 | req_task->io_ports[7] = reply->control; | |
2423 | } else { | |
2424 | reply = dd->port->rxfis + RX_FIS_D2H_REG; | |
2425 | req_task->io_ports[7] = reply->command; | |
2426 | } | |
2427 | ||
2428 | /* reclaim the DMA buffers.*/ | |
2429 | if (inbuf_dma) | |
2430 | pci_unmap_single(dd->pdev, inbuf_dma, | |
2431 | taskin, DMA_FROM_DEVICE); | |
2432 | if (outbuf_dma) | |
2433 | pci_unmap_single(dd->pdev, outbuf_dma, | |
2434 | taskout, DMA_TO_DEVICE); | |
16d02c04 JA |
2435 | inbuf_dma = 0; |
2436 | outbuf_dma = 0; | |
88523a61 SB |
2437 | |
2438 | /* return the ATA registers to the caller.*/ | |
2439 | req_task->io_ports[1] = reply->features; | |
2440 | req_task->io_ports[2] = reply->sect_count; | |
2441 | req_task->io_ports[3] = reply->lba_low; | |
2442 | req_task->io_ports[4] = reply->lba_mid; | |
2443 | req_task->io_ports[5] = reply->lba_hi; | |
2444 | req_task->io_ports[6] = reply->device; | |
2445 | ||
2446 | if (req_task->out_flags.all & 1) { | |
2447 | ||
2448 | req_task->hob_ports[3] = reply->lba_low_ex; | |
2449 | req_task->hob_ports[4] = reply->lba_mid_ex; | |
2450 | req_task->hob_ports[5] = reply->lba_hi_ex; | |
2451 | req_task->hob_ports[1] = reply->features_ex; | |
2452 | req_task->hob_ports[2] = reply->sect_cnt_ex; | |
2453 | } | |
88523a61 | 2454 | dbg_printk(MTIP_DRV_NAME |
c74b0f58 | 2455 | " %s: Completion: stat %x," |
88523a61 SB |
2456 | "err %x, sect_cnt %x, lbalo %x," |
2457 | "lbamid %x, lbahi %x, dev %x\n", | |
2458 | __func__, | |
2459 | req_task->io_ports[7], | |
2460 | req_task->io_ports[1], | |
2461 | req_task->io_ports[2], | |
2462 | req_task->io_ports[3], | |
2463 | req_task->io_ports[4], | |
2464 | req_task->io_ports[5], | |
2465 | req_task->io_ports[6]); | |
2466 | ||
88523a61 SB |
2467 | if (taskout) { |
2468 | if (copy_to_user(buf + outtotal, outbuf, taskout)) { | |
2469 | err = -EFAULT; | |
2470 | goto abort; | |
2471 | } | |
2472 | } | |
2473 | if (taskin) { | |
2474 | if (copy_to_user(buf + intotal, inbuf, taskin)) { | |
2475 | err = -EFAULT; | |
2476 | goto abort; | |
2477 | } | |
2478 | } | |
2479 | abort: | |
2480 | if (inbuf_dma) | |
2481 | pci_unmap_single(dd->pdev, inbuf_dma, | |
2482 | taskin, DMA_FROM_DEVICE); | |
2483 | if (outbuf_dma) | |
2484 | pci_unmap_single(dd->pdev, outbuf_dma, | |
2485 | taskout, DMA_TO_DEVICE); | |
88523a61 SB |
2486 | kfree(outbuf); |
2487 | kfree(inbuf); | |
2488 | ||
2489 | return err; | |
2490 | } | |
2491 | ||
2492 | /* | |
2493 | * Handle IOCTL calls from the Block Layer. | |
2494 | * | |
2495 | * This function is called by the Block Layer when it receives an IOCTL | |
2496 | * command that it does not understand. If the IOCTL command is not supported | |
2497 | * this function returns -ENOTTY. | |
2498 | * | |
2499 | * @dd Pointer to the driver data structure. | |
2500 | * @cmd IOCTL command passed from the Block Layer. | |
2501 | * @arg IOCTL argument passed from the Block Layer. | |
2502 | * | |
2503 | * return value | |
2504 | * 0 The IOCTL completed successfully. | |
2505 | * -ENOTTY The specified command is not supported. | |
2506 | * -EFAULT An error occurred copying data to a user space buffer. | |
2507 | * -EIO An error occurred while executing the command. | |
2508 | */ | |
ef0f1587 JA |
2509 | static int mtip_hw_ioctl(struct driver_data *dd, unsigned int cmd, |
2510 | unsigned long arg) | |
88523a61 SB |
2511 | { |
2512 | switch (cmd) { | |
2513 | case HDIO_GET_IDENTITY: | |
971890f2 AT |
2514 | { |
2515 | if (copy_to_user((void __user *)arg, dd->port->identify, | |
2516 | sizeof(u16) * ATA_ID_WORDS)) | |
2517 | return -EFAULT; | |
88523a61 | 2518 | break; |
971890f2 | 2519 | } |
88523a61 SB |
2520 | case HDIO_DRIVE_CMD: |
2521 | { | |
2522 | u8 drive_command[4]; | |
2523 | ||
2524 | /* Copy the user command info to our buffer. */ | |
2525 | if (copy_from_user(drive_command, | |
2526 | (void __user *) arg, | |
2527 | sizeof(drive_command))) | |
2528 | return -EFAULT; | |
2529 | ||
2530 | /* Execute the drive command. */ | |
2531 | if (exec_drive_command(dd->port, | |
2532 | drive_command, | |
2533 | (void __user *) (arg+4))) | |
2534 | return -EIO; | |
2535 | ||
2536 | /* Copy the status back to the users buffer. */ | |
2537 | if (copy_to_user((void __user *) arg, | |
2538 | drive_command, | |
2539 | sizeof(drive_command))) | |
2540 | return -EFAULT; | |
2541 | ||
2542 | break; | |
2543 | } | |
2544 | case HDIO_DRIVE_TASK: | |
2545 | { | |
2546 | u8 drive_command[7]; | |
2547 | ||
2548 | /* Copy the user command info to our buffer. */ | |
2549 | if (copy_from_user(drive_command, | |
2550 | (void __user *) arg, | |
2551 | sizeof(drive_command))) | |
2552 | return -EFAULT; | |
2553 | ||
2554 | /* Execute the drive command. */ | |
2555 | if (exec_drive_task(dd->port, drive_command)) | |
2556 | return -EIO; | |
2557 | ||
2558 | /* Copy the status back to the users buffer. */ | |
2559 | if (copy_to_user((void __user *) arg, | |
2560 | drive_command, | |
2561 | sizeof(drive_command))) | |
2562 | return -EFAULT; | |
2563 | ||
2564 | break; | |
2565 | } | |
ef0f1587 JA |
2566 | case HDIO_DRIVE_TASKFILE: { |
2567 | ide_task_request_t req_task; | |
2568 | int ret, outtotal; | |
2569 | ||
2570 | if (copy_from_user(&req_task, (void __user *) arg, | |
2571 | sizeof(req_task))) | |
2572 | return -EFAULT; | |
2573 | ||
2574 | outtotal = sizeof(req_task); | |
2575 | ||
2576 | ret = exec_drive_taskfile(dd, (void __user *) arg, | |
2577 | &req_task, outtotal); | |
2578 | ||
60ec0eec AT |
2579 | if (copy_to_user((void __user *) arg, &req_task, |
2580 | sizeof(req_task))) | |
ef0f1587 JA |
2581 | return -EFAULT; |
2582 | ||
2583 | return ret; | |
2584 | } | |
88523a61 SB |
2585 | |
2586 | default: | |
2587 | return -EINVAL; | |
2588 | } | |
2589 | return 0; | |
2590 | } | |
2591 | ||
2592 | /* | |
2593 | * Submit an IO to the hw | |
2594 | * | |
2595 | * This function is called by the block layer to issue an io | |
2596 | * to the device. Upon completion, the callback function will | |
2597 | * be called with the data parameter passed as the callback data. | |
2598 | * | |
2599 | * @dd Pointer to the driver data structure. | |
2600 | * @start First sector to read. | |
2601 | * @nsect Number of sectors to read. | |
2602 | * @nents Number of entries in scatter list for the read command. | |
2603 | * @tag The tag of this read command. | |
2604 | * @callback Pointer to the function that should be called | |
2605 | * when the read completes. | |
2606 | * @data Callback data passed to the callback function | |
2607 | * when the read completes. | |
88523a61 SB |
2608 | * @dir Direction (read or write) |
2609 | * | |
2610 | * return value | |
2611 | * None | |
2612 | */ | |
7c5d6238 | 2613 | static void mtip_hw_submit_io(struct driver_data *dd, sector_t sector, |
6316668f | 2614 | int nsect, int nents, int tag, void *callback, |
2077d947 | 2615 | void *data, int dir, int unaligned) |
88523a61 SB |
2616 | { |
2617 | struct host_to_dev_fis *fis; | |
2618 | struct mtip_port *port = dd->port; | |
2619 | struct mtip_cmd *command = &port->commands[tag]; | |
45038367 | 2620 | int dma_dir = (dir == READ) ? DMA_FROM_DEVICE : DMA_TO_DEVICE; |
7c5d6238 | 2621 | u64 start = sector; |
88523a61 SB |
2622 | |
2623 | /* Map the scatter list for DMA access */ | |
45038367 | 2624 | nents = dma_map_sg(&dd->pdev->dev, command->sg, nents, dma_dir); |
88523a61 SB |
2625 | |
2626 | command->scatter_ents = nents; | |
2627 | ||
2077d947 | 2628 | command->unaligned = unaligned; |
88523a61 SB |
2629 | /* |
2630 | * The number of retries for this command before it is | |
2631 | * reported as a failure to the upper layers. | |
2632 | */ | |
2633 | command->retries = MTIP_MAX_RETRIES; | |
2634 | ||
2635 | /* Fill out fis */ | |
2636 | fis = command->command; | |
2637 | fis->type = 0x27; | |
2638 | fis->opts = 1 << 7; | |
2639 | fis->command = | |
2640 | (dir == READ ? ATA_CMD_FPDMA_READ : ATA_CMD_FPDMA_WRITE); | |
eda45314 SM |
2641 | fis->lba_low = start & 0xFF; |
2642 | fis->lba_mid = (start >> 8) & 0xFF; | |
2643 | fis->lba_hi = (start >> 16) & 0xFF; | |
2644 | fis->lba_low_ex = (start >> 24) & 0xFF; | |
2645 | fis->lba_mid_ex = (start >> 32) & 0xFF; | |
2646 | fis->lba_hi_ex = (start >> 40) & 0xFF; | |
88523a61 | 2647 | fis->device = 1 << 6; |
60ec0eec AT |
2648 | fis->features = nsect & 0xFF; |
2649 | fis->features_ex = (nsect >> 8) & 0xFF; | |
88523a61 SB |
2650 | fis->sect_count = ((tag << 3) | (tag >> 5)); |
2651 | fis->sect_cnt_ex = 0; | |
2652 | fis->control = 0; | |
2653 | fis->res2 = 0; | |
2654 | fis->res3 = 0; | |
2655 | fill_command_sg(dd, command, nents); | |
2656 | ||
2077d947 AT |
2657 | if (unaligned) |
2658 | fis->device |= 1 << 7; | |
2659 | ||
88523a61 | 2660 | /* Populate the command header */ |
60ec0eec AT |
2661 | command->command_header->opts = |
2662 | __force_bit2int cpu_to_le32( | |
2663 | (nents << 16) | 5 | AHCI_CMD_PREFETCH); | |
88523a61 SB |
2664 | command->command_header->byte_count = 0; |
2665 | ||
2666 | /* | |
2667 | * Set the completion function and data for the command | |
2668 | * within this layer. | |
2669 | */ | |
2670 | command->comp_data = dd; | |
2671 | command->comp_func = mtip_async_complete; | |
45038367 | 2672 | command->direction = dma_dir; |
88523a61 SB |
2673 | |
2674 | /* | |
2675 | * Set the completion function and data for the command passed | |
2676 | * from the upper layer. | |
2677 | */ | |
2678 | command->async_data = data; | |
2679 | command->async_callback = callback; | |
2680 | ||
2681 | /* | |
60ec0eec AT |
2682 | * To prevent this command from being issued |
2683 | * if an internal command is in progress or error handling is active. | |
88523a61 | 2684 | */ |
c74b0f58 | 2685 | if (port->flags & MTIP_PF_PAUSE_IO) { |
60ec0eec | 2686 | set_bit(tag, port->cmds_to_issue); |
8a857a88 | 2687 | set_bit(MTIP_PF_ISSUE_CMDS_BIT, &port->flags); |
60ec0eec AT |
2688 | return; |
2689 | } | |
88523a61 SB |
2690 | |
2691 | /* Issue the command to the hardware */ | |
2692 | mtip_issue_ncq_command(port, tag); | |
2693 | ||
dad40f16 | 2694 | return; |
88523a61 SB |
2695 | } |
2696 | ||
2697 | /* | |
2698 | * Release a command slot. | |
2699 | * | |
2700 | * @dd Pointer to the driver data structure. | |
2701 | * @tag Slot tag | |
2702 | * | |
2703 | * return value | |
2704 | * None | |
2705 | */ | |
2077d947 AT |
2706 | static void mtip_hw_release_scatterlist(struct driver_data *dd, int tag, |
2707 | int unaligned) | |
88523a61 | 2708 | { |
2077d947 AT |
2709 | struct semaphore *sem = unaligned ? &dd->port->cmd_slot_unal : |
2710 | &dd->port->cmd_slot; | |
88523a61 | 2711 | release_slot(dd->port, tag); |
2077d947 | 2712 | up(sem); |
88523a61 SB |
2713 | } |
2714 | ||
2715 | /* | |
2716 | * Obtain a command slot and return its associated scatter list. | |
2717 | * | |
2718 | * @dd Pointer to the driver data structure. | |
2719 | * @tag Pointer to an int that will receive the allocated command | |
2720 | * slot tag. | |
2721 | * | |
2722 | * return value | |
2723 | * Pointer to the scatter list for the allocated command slot | |
2724 | * or NULL if no command slots are available. | |
2725 | */ | |
6316668f | 2726 | static struct scatterlist *mtip_hw_get_scatterlist(struct driver_data *dd, |
2077d947 | 2727 | int *tag, int unaligned) |
88523a61 | 2728 | { |
2077d947 AT |
2729 | struct semaphore *sem = unaligned ? &dd->port->cmd_slot_unal : |
2730 | &dd->port->cmd_slot; | |
2731 | ||
88523a61 SB |
2732 | /* |
2733 | * It is possible that, even with this semaphore, a thread | |
2734 | * may think that no command slots are available. Therefore, we | |
2735 | * need to make an attempt to get_slot(). | |
2736 | */ | |
2077d947 | 2737 | down(sem); |
88523a61 SB |
2738 | *tag = get_slot(dd->port); |
2739 | ||
8a857a88 | 2740 | if (unlikely(test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag))) { |
2077d947 | 2741 | up(sem); |
45038367 AT |
2742 | return NULL; |
2743 | } | |
a09ba13e | 2744 | if (unlikely(*tag < 0)) { |
2077d947 | 2745 | up(sem); |
88523a61 | 2746 | return NULL; |
a09ba13e | 2747 | } |
88523a61 SB |
2748 | |
2749 | return dd->port->commands[*tag].sg; | |
2750 | } | |
2751 | ||
2752 | /* | |
7412ff13 | 2753 | * Sysfs status dump. |
88523a61 SB |
2754 | * |
2755 | * @dev Pointer to the device structure, passed by the kernrel. | |
2756 | * @attr Pointer to the device_attribute structure passed by the kernel. | |
2757 | * @buf Pointer to the char buffer that will receive the stats info. | |
2758 | * | |
2759 | * return value | |
2760 | * The size, in bytes, of the data copied into buf. | |
2761 | */ | |
f6587217 AT |
2762 | static ssize_t mtip_hw_show_status(struct device *dev, |
2763 | struct device_attribute *attr, | |
2764 | char *buf) | |
2765 | { | |
2766 | struct driver_data *dd = dev_to_disk(dev)->private_data; | |
2767 | int size = 0; | |
2768 | ||
8a857a88 | 2769 | if (test_bit(MTIP_DDF_OVER_TEMP_BIT, &dd->dd_flag)) |
f6587217 | 2770 | size += sprintf(buf, "%s", "thermal_shutdown\n"); |
8a857a88 | 2771 | else if (test_bit(MTIP_DDF_WRITE_PROTECT_BIT, &dd->dd_flag)) |
f6587217 AT |
2772 | size += sprintf(buf, "%s", "write_protect\n"); |
2773 | else | |
2774 | size += sprintf(buf, "%s", "online\n"); | |
2775 | ||
2776 | return size; | |
2777 | } | |
2778 | ||
f6587217 | 2779 | static DEVICE_ATTR(status, S_IRUGO, mtip_hw_show_status, NULL); |
88523a61 | 2780 | |
0caff003 AT |
2781 | /* debugsfs entries */ |
2782 | ||
2783 | static ssize_t show_device_status(struct device_driver *drv, char *buf) | |
2784 | { | |
2785 | int size = 0; | |
2786 | struct driver_data *dd, *tmp; | |
2787 | unsigned long flags; | |
2788 | char id_buf[42]; | |
2789 | u16 status = 0; | |
2790 | ||
2791 | spin_lock_irqsave(&dev_lock, flags); | |
2792 | size += sprintf(&buf[size], "Devices Present:\n"); | |
2793 | list_for_each_entry_safe(dd, tmp, &online_list, online_list) { | |
c66bb3f0 | 2794 | if (dd->pdev) { |
0caff003 AT |
2795 | if (dd->port && |
2796 | dd->port->identify && | |
2797 | dd->port->identify_valid) { | |
2798 | strlcpy(id_buf, | |
2799 | (char *) (dd->port->identify + 10), 21); | |
2800 | status = *(dd->port->identify + 141); | |
2801 | } else { | |
2802 | memset(id_buf, 0, 42); | |
2803 | status = 0; | |
2804 | } | |
2805 | ||
2806 | if (dd->port && | |
2807 | test_bit(MTIP_PF_REBUILD_BIT, &dd->port->flags)) { | |
2808 | size += sprintf(&buf[size], | |
2809 | " device %s %s (ftl rebuild %d %%)\n", | |
2810 | dev_name(&dd->pdev->dev), | |
2811 | id_buf, | |
2812 | status); | |
2813 | } else { | |
2814 | size += sprintf(&buf[size], | |
2815 | " device %s %s\n", | |
2816 | dev_name(&dd->pdev->dev), | |
2817 | id_buf); | |
2818 | } | |
2819 | } | |
2820 | } | |
2821 | ||
2822 | size += sprintf(&buf[size], "Devices Being Removed:\n"); | |
2823 | list_for_each_entry_safe(dd, tmp, &removing_list, remove_list) { | |
c66bb3f0 | 2824 | if (dd->pdev) { |
0caff003 AT |
2825 | if (dd->port && |
2826 | dd->port->identify && | |
2827 | dd->port->identify_valid) { | |
2828 | strlcpy(id_buf, | |
2829 | (char *) (dd->port->identify+10), 21); | |
2830 | status = *(dd->port->identify + 141); | |
2831 | } else { | |
2832 | memset(id_buf, 0, 42); | |
2833 | status = 0; | |
2834 | } | |
2835 | ||
2836 | if (dd->port && | |
2837 | test_bit(MTIP_PF_REBUILD_BIT, &dd->port->flags)) { | |
2838 | size += sprintf(&buf[size], | |
2839 | " device %s %s (ftl rebuild %d %%)\n", | |
2840 | dev_name(&dd->pdev->dev), | |
2841 | id_buf, | |
2842 | status); | |
2843 | } else { | |
2844 | size += sprintf(&buf[size], | |
2845 | " device %s %s\n", | |
2846 | dev_name(&dd->pdev->dev), | |
2847 | id_buf); | |
2848 | } | |
2849 | } | |
2850 | } | |
2851 | spin_unlock_irqrestore(&dev_lock, flags); | |
2852 | ||
2853 | return size; | |
2854 | } | |
2855 | ||
2856 | static ssize_t mtip_hw_read_device_status(struct file *f, char __user *ubuf, | |
2857 | size_t len, loff_t *offset) | |
2858 | { | |
c8afd0dc | 2859 | struct driver_data *dd = (struct driver_data *)f->private_data; |
0caff003 | 2860 | int size = *offset; |
c8afd0dc DM |
2861 | char *buf; |
2862 | int rv = 0; | |
0caff003 AT |
2863 | |
2864 | if (!len || *offset) | |
2865 | return 0; | |
2866 | ||
c8afd0dc DM |
2867 | buf = kzalloc(MTIP_DFS_MAX_BUF_SIZE, GFP_KERNEL); |
2868 | if (!buf) { | |
2869 | dev_err(&dd->pdev->dev, | |
2870 | "Memory allocation: status buffer\n"); | |
2871 | return -ENOMEM; | |
2872 | } | |
2873 | ||
0caff003 AT |
2874 | size += show_device_status(NULL, buf); |
2875 | ||
2876 | *offset = size <= len ? size : len; | |
2877 | size = copy_to_user(ubuf, buf, *offset); | |
2878 | if (size) | |
c8afd0dc | 2879 | rv = -EFAULT; |
0caff003 | 2880 | |
c8afd0dc DM |
2881 | kfree(buf); |
2882 | return rv ? rv : *offset; | |
0caff003 AT |
2883 | } |
2884 | ||
7b421d24 AT |
2885 | static ssize_t mtip_hw_read_registers(struct file *f, char __user *ubuf, |
2886 | size_t len, loff_t *offset) | |
2887 | { | |
2888 | struct driver_data *dd = (struct driver_data *)f->private_data; | |
c8afd0dc | 2889 | char *buf; |
7b421d24 AT |
2890 | u32 group_allocated; |
2891 | int size = *offset; | |
c8afd0dc | 2892 | int n, rv = 0; |
7b421d24 AT |
2893 | |
2894 | if (!len || size) | |
2895 | return 0; | |
2896 | ||
c8afd0dc DM |
2897 | buf = kzalloc(MTIP_DFS_MAX_BUF_SIZE, GFP_KERNEL); |
2898 | if (!buf) { | |
2899 | dev_err(&dd->pdev->dev, | |
2900 | "Memory allocation: register buffer\n"); | |
2901 | return -ENOMEM; | |
2902 | } | |
2903 | ||
7b421d24 AT |
2904 | size += sprintf(&buf[size], "H/ S ACTive : [ 0x"); |
2905 | ||
2906 | for (n = dd->slot_groups-1; n >= 0; n--) | |
2907 | size += sprintf(&buf[size], "%08X ", | |
2908 | readl(dd->port->s_active[n])); | |
2909 | ||
2910 | size += sprintf(&buf[size], "]\n"); | |
2911 | size += sprintf(&buf[size], "H/ Command Issue : [ 0x"); | |
2912 | ||
2913 | for (n = dd->slot_groups-1; n >= 0; n--) | |
2914 | size += sprintf(&buf[size], "%08X ", | |
2915 | readl(dd->port->cmd_issue[n])); | |
2916 | ||
2917 | size += sprintf(&buf[size], "]\n"); | |
2918 | size += sprintf(&buf[size], "H/ Completed : [ 0x"); | |
2919 | ||
2920 | for (n = dd->slot_groups-1; n >= 0; n--) | |
2921 | size += sprintf(&buf[size], "%08X ", | |
2922 | readl(dd->port->completed[n])); | |
2923 | ||
2924 | size += sprintf(&buf[size], "]\n"); | |
2925 | size += sprintf(&buf[size], "H/ PORT IRQ STAT : [ 0x%08X ]\n", | |
2926 | readl(dd->port->mmio + PORT_IRQ_STAT)); | |
2927 | size += sprintf(&buf[size], "H/ HOST IRQ STAT : [ 0x%08X ]\n", | |
2928 | readl(dd->mmio + HOST_IRQ_STAT)); | |
2929 | size += sprintf(&buf[size], "\n"); | |
2930 | ||
2931 | size += sprintf(&buf[size], "L/ Allocated : [ 0x"); | |
2932 | ||
2933 | for (n = dd->slot_groups-1; n >= 0; n--) { | |
2934 | if (sizeof(long) > sizeof(u32)) | |
2935 | group_allocated = | |
2936 | dd->port->allocated[n/2] >> (32*(n&1)); | |
2937 | else | |
2938 | group_allocated = dd->port->allocated[n]; | |
2939 | size += sprintf(&buf[size], "%08X ", group_allocated); | |
2940 | } | |
2941 | size += sprintf(&buf[size], "]\n"); | |
2942 | ||
2943 | size += sprintf(&buf[size], "L/ Commands in Q : [ 0x"); | |
2944 | ||
2945 | for (n = dd->slot_groups-1; n >= 0; n--) { | |
2946 | if (sizeof(long) > sizeof(u32)) | |
2947 | group_allocated = | |
2948 | dd->port->cmds_to_issue[n/2] >> (32*(n&1)); | |
2949 | else | |
2950 | group_allocated = dd->port->cmds_to_issue[n]; | |
2951 | size += sprintf(&buf[size], "%08X ", group_allocated); | |
2952 | } | |
2953 | size += sprintf(&buf[size], "]\n"); | |
2954 | ||
2955 | *offset = size <= len ? size : len; | |
2956 | size = copy_to_user(ubuf, buf, *offset); | |
2957 | if (size) | |
c8afd0dc | 2958 | rv = -EFAULT; |
7b421d24 | 2959 | |
c8afd0dc DM |
2960 | kfree(buf); |
2961 | return rv ? rv : *offset; | |
7b421d24 AT |
2962 | } |
2963 | ||
2964 | static ssize_t mtip_hw_read_flags(struct file *f, char __user *ubuf, | |
2965 | size_t len, loff_t *offset) | |
2966 | { | |
2967 | struct driver_data *dd = (struct driver_data *)f->private_data; | |
c8afd0dc | 2968 | char *buf; |
7b421d24 | 2969 | int size = *offset; |
c8afd0dc | 2970 | int rv = 0; |
7b421d24 AT |
2971 | |
2972 | if (!len || size) | |
2973 | return 0; | |
2974 | ||
c8afd0dc DM |
2975 | buf = kzalloc(MTIP_DFS_MAX_BUF_SIZE, GFP_KERNEL); |
2976 | if (!buf) { | |
2977 | dev_err(&dd->pdev->dev, | |
2978 | "Memory allocation: flag buffer\n"); | |
2979 | return -ENOMEM; | |
2980 | } | |
2981 | ||
7b421d24 AT |
2982 | size += sprintf(&buf[size], "Flag-port : [ %08lX ]\n", |
2983 | dd->port->flags); | |
2984 | size += sprintf(&buf[size], "Flag-dd : [ %08lX ]\n", | |
2985 | dd->dd_flag); | |
2986 | ||
2987 | *offset = size <= len ? size : len; | |
2988 | size = copy_to_user(ubuf, buf, *offset); | |
2989 | if (size) | |
c8afd0dc | 2990 | rv = -EFAULT; |
7b421d24 | 2991 | |
c8afd0dc DM |
2992 | kfree(buf); |
2993 | return rv ? rv : *offset; | |
7b421d24 AT |
2994 | } |
2995 | ||
0caff003 AT |
2996 | static const struct file_operations mtip_device_status_fops = { |
2997 | .owner = THIS_MODULE, | |
2998 | .open = simple_open, | |
2999 | .read = mtip_hw_read_device_status, | |
3000 | .llseek = no_llseek, | |
3001 | }; | |
3002 | ||
7b421d24 AT |
3003 | static const struct file_operations mtip_regs_fops = { |
3004 | .owner = THIS_MODULE, | |
3005 | .open = simple_open, | |
3006 | .read = mtip_hw_read_registers, | |
3007 | .llseek = no_llseek, | |
3008 | }; | |
3009 | ||
3010 | static const struct file_operations mtip_flags_fops = { | |
3011 | .owner = THIS_MODULE, | |
3012 | .open = simple_open, | |
3013 | .read = mtip_hw_read_flags, | |
3014 | .llseek = no_llseek, | |
3015 | }; | |
3016 | ||
88523a61 SB |
3017 | /* |
3018 | * Create the sysfs related attributes. | |
3019 | * | |
3020 | * @dd Pointer to the driver data structure. | |
3021 | * @kobj Pointer to the kobj for the block device. | |
3022 | * | |
3023 | * return value | |
3024 | * 0 Operation completed successfully. | |
3025 | * -EINVAL Invalid parameter. | |
3026 | */ | |
6316668f | 3027 | static int mtip_hw_sysfs_init(struct driver_data *dd, struct kobject *kobj) |
88523a61 SB |
3028 | { |
3029 | if (!kobj || !dd) | |
3030 | return -EINVAL; | |
3031 | ||
f6587217 AT |
3032 | if (sysfs_create_file(kobj, &dev_attr_status.attr)) |
3033 | dev_warn(&dd->pdev->dev, | |
3034 | "Error creating 'status' sysfs entry\n"); | |
88523a61 SB |
3035 | return 0; |
3036 | } | |
3037 | ||
3038 | /* | |
3039 | * Remove the sysfs related attributes. | |
3040 | * | |
3041 | * @dd Pointer to the driver data structure. | |
3042 | * @kobj Pointer to the kobj for the block device. | |
3043 | * | |
3044 | * return value | |
3045 | * 0 Operation completed successfully. | |
3046 | * -EINVAL Invalid parameter. | |
3047 | */ | |
6316668f | 3048 | static int mtip_hw_sysfs_exit(struct driver_data *dd, struct kobject *kobj) |
88523a61 SB |
3049 | { |
3050 | if (!kobj || !dd) | |
3051 | return -EINVAL; | |
3052 | ||
f6587217 | 3053 | sysfs_remove_file(kobj, &dev_attr_status.attr); |
88523a61 SB |
3054 | |
3055 | return 0; | |
3056 | } | |
3057 | ||
7b421d24 AT |
3058 | static int mtip_hw_debugfs_init(struct driver_data *dd) |
3059 | { | |
3060 | if (!dfs_parent) | |
3061 | return -1; | |
3062 | ||
3063 | dd->dfs_node = debugfs_create_dir(dd->disk->disk_name, dfs_parent); | |
3064 | if (IS_ERR_OR_NULL(dd->dfs_node)) { | |
3065 | dev_warn(&dd->pdev->dev, | |
3066 | "Error creating node %s under debugfs\n", | |
3067 | dd->disk->disk_name); | |
3068 | dd->dfs_node = NULL; | |
3069 | return -1; | |
3070 | } | |
3071 | ||
3072 | debugfs_create_file("flags", S_IRUGO, dd->dfs_node, dd, | |
3073 | &mtip_flags_fops); | |
3074 | debugfs_create_file("registers", S_IRUGO, dd->dfs_node, dd, | |
3075 | &mtip_regs_fops); | |
3076 | ||
3077 | return 0; | |
3078 | } | |
3079 | ||
3080 | static void mtip_hw_debugfs_exit(struct driver_data *dd) | |
3081 | { | |
974a51a2 SB |
3082 | if (dd->dfs_node) |
3083 | debugfs_remove_recursive(dd->dfs_node); | |
7b421d24 AT |
3084 | } |
3085 | ||
8f8b8995 AT |
3086 | static int mtip_free_orphan(struct driver_data *dd) |
3087 | { | |
3088 | struct kobject *kobj; | |
3089 | ||
3090 | if (dd->bdev) { | |
3091 | if (dd->bdev->bd_holders >= 1) | |
3092 | return -2; | |
3093 | ||
3094 | bdput(dd->bdev); | |
3095 | dd->bdev = NULL; | |
3096 | } | |
3097 | ||
3098 | mtip_hw_debugfs_exit(dd); | |
3099 | ||
3100 | spin_lock(&rssd_index_lock); | |
3101 | ida_remove(&rssd_index_ida, dd->index); | |
3102 | spin_unlock(&rssd_index_lock); | |
3103 | ||
3104 | if (!test_bit(MTIP_DDF_INIT_DONE_BIT, &dd->dd_flag) && | |
3105 | test_bit(MTIP_DDF_REBUILD_FAILED_BIT, &dd->dd_flag)) { | |
3106 | put_disk(dd->disk); | |
3107 | } else { | |
3108 | if (dd->disk) { | |
3109 | kobj = kobject_get(&disk_to_dev(dd->disk)->kobj); | |
3110 | if (kobj) { | |
3111 | mtip_hw_sysfs_exit(dd, kobj); | |
3112 | kobject_put(kobj); | |
3113 | } | |
3114 | del_gendisk(dd->disk); | |
3115 | dd->disk = NULL; | |
3116 | } | |
3117 | if (dd->queue) { | |
3118 | dd->queue->queuedata = NULL; | |
3119 | blk_cleanup_queue(dd->queue); | |
3120 | dd->queue = NULL; | |
3121 | } | |
3122 | } | |
3123 | kfree(dd); | |
3124 | return 0; | |
3125 | } | |
7b421d24 | 3126 | |
88523a61 SB |
3127 | /* |
3128 | * Perform any init/resume time hardware setup | |
3129 | * | |
3130 | * @dd Pointer to the driver data structure. | |
3131 | * | |
3132 | * return value | |
3133 | * None | |
3134 | */ | |
3135 | static inline void hba_setup(struct driver_data *dd) | |
3136 | { | |
3137 | u32 hwdata; | |
3138 | hwdata = readl(dd->mmio + HOST_HSORG); | |
3139 | ||
3140 | /* interrupt bug workaround: use only 1 IS bit.*/ | |
3141 | writel(hwdata | | |
3142 | HSORG_DISABLE_SLOTGRP_INTR | | |
3143 | HSORG_DISABLE_SLOTGRP_PXIS, | |
3144 | dd->mmio + HOST_HSORG); | |
3145 | } | |
3146 | ||
2077d947 AT |
3147 | static int mtip_device_unaligned_constrained(struct driver_data *dd) |
3148 | { | |
3149 | return (dd->pdev->device == P420M_DEVICE_ID ? 1 : 0); | |
3150 | } | |
3151 | ||
88523a61 SB |
3152 | /* |
3153 | * Detect the details of the product, and store anything needed | |
3154 | * into the driver data structure. This includes product type and | |
3155 | * version and number of slot groups. | |
3156 | * | |
3157 | * @dd Pointer to the driver data structure. | |
3158 | * | |
3159 | * return value | |
3160 | * None | |
3161 | */ | |
3162 | static void mtip_detect_product(struct driver_data *dd) | |
3163 | { | |
3164 | u32 hwdata; | |
3165 | unsigned int rev, slotgroups; | |
3166 | ||
3167 | /* | |
3168 | * HBA base + 0xFC [15:0] - vendor-specific hardware interface | |
3169 | * info register: | |
3170 | * [15:8] hardware/software interface rev# | |
3171 | * [ 3] asic-style interface | |
3172 | * [ 2:0] number of slot groups, minus 1 (only valid for asic-style). | |
3173 | */ | |
3174 | hwdata = readl(dd->mmio + HOST_HSORG); | |
3175 | ||
3176 | dd->product_type = MTIP_PRODUCT_UNKNOWN; | |
3177 | dd->slot_groups = 1; | |
3178 | ||
3179 | if (hwdata & 0x8) { | |
3180 | dd->product_type = MTIP_PRODUCT_ASICFPGA; | |
3181 | rev = (hwdata & HSORG_HWREV) >> 8; | |
3182 | slotgroups = (hwdata & HSORG_SLOTGROUPS) + 1; | |
3183 | dev_info(&dd->pdev->dev, | |
3184 | "ASIC-FPGA design, HS rev 0x%x, " | |
3185 | "%i slot groups [%i slots]\n", | |
3186 | rev, | |
3187 | slotgroups, | |
3188 | slotgroups * 32); | |
3189 | ||
3190 | if (slotgroups > MTIP_MAX_SLOT_GROUPS) { | |
3191 | dev_warn(&dd->pdev->dev, | |
3192 | "Warning: driver only supports " | |
3193 | "%i slot groups.\n", MTIP_MAX_SLOT_GROUPS); | |
3194 | slotgroups = MTIP_MAX_SLOT_GROUPS; | |
3195 | } | |
3196 | dd->slot_groups = slotgroups; | |
3197 | return; | |
3198 | } | |
3199 | ||
3200 | dev_warn(&dd->pdev->dev, "Unrecognized product id\n"); | |
3201 | } | |
3202 | ||
3203 | /* | |
3204 | * Blocking wait for FTL rebuild to complete | |
3205 | * | |
3206 | * @dd Pointer to the DRIVER_DATA structure. | |
3207 | * | |
3208 | * return value | |
3209 | * 0 FTL rebuild completed successfully | |
3210 | * -EFAULT FTL rebuild error/timeout/interruption | |
3211 | */ | |
3212 | static int mtip_ftl_rebuild_poll(struct driver_data *dd) | |
3213 | { | |
3214 | unsigned long timeout, cnt = 0, start; | |
3215 | ||
3216 | dev_warn(&dd->pdev->dev, | |
3217 | "FTL rebuild in progress. Polling for completion.\n"); | |
3218 | ||
3219 | start = jiffies; | |
88523a61 SB |
3220 | timeout = jiffies + msecs_to_jiffies(MTIP_FTL_REBUILD_TIMEOUT_MS); |
3221 | ||
3222 | do { | |
8a857a88 | 3223 | if (unlikely(test_bit(MTIP_DDF_REMOVE_PENDING_BIT, |
45038367 AT |
3224 | &dd->dd_flag))) |
3225 | return -EFAULT; | |
88523a61 SB |
3226 | if (mtip_check_surprise_removal(dd->pdev)) |
3227 | return -EFAULT; | |
60ec0eec | 3228 | |
88523a61 SB |
3229 | if (mtip_get_identify(dd->port, NULL) < 0) |
3230 | return -EFAULT; | |
3231 | ||
3232 | if (*(dd->port->identify + MTIP_FTL_REBUILD_OFFSET) == | |
3233 | MTIP_FTL_REBUILD_MAGIC) { | |
3234 | ssleep(1); | |
3235 | /* Print message every 3 minutes */ | |
3236 | if (cnt++ >= 180) { | |
3237 | dev_warn(&dd->pdev->dev, | |
3238 | "FTL rebuild in progress (%d secs).\n", | |
3239 | jiffies_to_msecs(jiffies - start) / 1000); | |
3240 | cnt = 0; | |
3241 | } | |
3242 | } else { | |
3243 | dev_warn(&dd->pdev->dev, | |
3244 | "FTL rebuild complete (%d secs).\n", | |
3245 | jiffies_to_msecs(jiffies - start) / 1000); | |
62ee8c13 | 3246 | mtip_block_initialize(dd); |
45038367 | 3247 | return 0; |
88523a61 SB |
3248 | } |
3249 | ssleep(10); | |
3250 | } while (time_before(jiffies, timeout)); | |
3251 | ||
3252 | /* Check for timeout */ | |
45038367 | 3253 | dev_err(&dd->pdev->dev, |
88523a61 SB |
3254 | "Timed out waiting for FTL rebuild to complete (%d secs).\n", |
3255 | jiffies_to_msecs(jiffies - start) / 1000); | |
45038367 | 3256 | return -EFAULT; |
88523a61 SB |
3257 | } |
3258 | ||
60ec0eec AT |
3259 | /* |
3260 | * service thread to issue queued commands | |
3261 | * | |
3262 | * @data Pointer to the driver data structure. | |
3263 | * | |
3264 | * return value | |
3265 | * 0 | |
3266 | */ | |
3267 | ||
3268 | static int mtip_service_thread(void *data) | |
3269 | { | |
3270 | struct driver_data *dd = (struct driver_data *)data; | |
3271 | unsigned long slot, slot_start, slot_wrap; | |
3272 | unsigned int num_cmd_slots = dd->slot_groups * 32; | |
3273 | struct mtip_port *port = dd->port; | |
8f8b8995 | 3274 | int ret; |
60ec0eec AT |
3275 | |
3276 | while (1) { | |
3277 | /* | |
3278 | * the condition is to check neither an internal command is | |
3279 | * is in progress nor error handling is active | |
3280 | */ | |
3281 | wait_event_interruptible(port->svc_wait, (port->flags) && | |
c74b0f58 | 3282 | !(port->flags & MTIP_PF_PAUSE_IO)); |
60ec0eec AT |
3283 | |
3284 | if (kthread_should_stop()) | |
8f8b8995 AT |
3285 | goto st_out; |
3286 | ||
3287 | set_bit(MTIP_PF_SVC_THD_ACTIVE_BIT, &port->flags); | |
3288 | ||
3289 | /* If I am an orphan, start self cleanup */ | |
3290 | if (test_bit(MTIP_PF_SR_CLEANUP_BIT, &port->flags)) | |
60ec0eec AT |
3291 | break; |
3292 | ||
8a857a88 | 3293 | if (unlikely(test_bit(MTIP_DDF_REMOVE_PENDING_BIT, |
45038367 | 3294 | &dd->dd_flag))) |
8f8b8995 | 3295 | goto st_out; |
c74b0f58 | 3296 | |
8a857a88 | 3297 | if (test_bit(MTIP_PF_ISSUE_CMDS_BIT, &port->flags)) { |
60ec0eec AT |
3298 | slot = 1; |
3299 | /* used to restrict the loop to one iteration */ | |
3300 | slot_start = num_cmd_slots; | |
3301 | slot_wrap = 0; | |
3302 | while (1) { | |
3303 | slot = find_next_bit(port->cmds_to_issue, | |
3304 | num_cmd_slots, slot); | |
3305 | if (slot_wrap == 1) { | |
3306 | if ((slot_start >= slot) || | |
3307 | (slot >= num_cmd_slots)) | |
3308 | break; | |
3309 | } | |
3310 | if (unlikely(slot_start == num_cmd_slots)) | |
3311 | slot_start = slot; | |
3312 | ||
3313 | if (unlikely(slot == num_cmd_slots)) { | |
3314 | slot = 1; | |
3315 | slot_wrap = 1; | |
3316 | continue; | |
3317 | } | |
3318 | ||
3319 | /* Issue the command to the hardware */ | |
3320 | mtip_issue_ncq_command(port, slot); | |
3321 | ||
60ec0eec AT |
3322 | clear_bit(slot, port->cmds_to_issue); |
3323 | } | |
3324 | ||
8a857a88 AT |
3325 | clear_bit(MTIP_PF_ISSUE_CMDS_BIT, &port->flags); |
3326 | } else if (test_bit(MTIP_PF_REBUILD_BIT, &port->flags)) { | |
8f8b8995 | 3327 | if (mtip_ftl_rebuild_poll(dd) < 0) |
8a857a88 | 3328 | set_bit(MTIP_DDF_REBUILD_FAILED_BIT, |
8182b495 | 3329 | &dd->dd_flag); |
8a857a88 | 3330 | clear_bit(MTIP_PF_REBUILD_BIT, &port->flags); |
60ec0eec | 3331 | } |
8a857a88 | 3332 | clear_bit(MTIP_PF_SVC_THD_ACTIVE_BIT, &port->flags); |
62ee8c13 | 3333 | |
c74b0f58 | 3334 | if (test_bit(MTIP_PF_SVC_THD_STOP_BIT, &port->flags)) |
8f8b8995 AT |
3335 | goto st_out; |
3336 | } | |
3337 | ||
3338 | /* wait for pci remove to exit */ | |
3339 | while (1) { | |
3340 | if (test_bit(MTIP_DDF_REMOVE_DONE_BIT, &dd->dd_flag)) | |
62ee8c13 | 3341 | break; |
8f8b8995 AT |
3342 | msleep_interruptible(1000); |
3343 | if (kthread_should_stop()) | |
3344 | goto st_out; | |
60ec0eec | 3345 | } |
8f8b8995 AT |
3346 | |
3347 | while (1) { | |
3348 | ret = mtip_free_orphan(dd); | |
3349 | if (!ret) { | |
3350 | /* NOTE: All data structures are invalid, do not | |
3351 | * access any here */ | |
3352 | return 0; | |
3353 | } | |
3354 | msleep_interruptible(1000); | |
3355 | if (kthread_should_stop()) | |
3356 | goto st_out; | |
3357 | } | |
3358 | st_out: | |
60ec0eec AT |
3359 | return 0; |
3360 | } | |
3361 | ||
188b9f49 SB |
3362 | /* |
3363 | * DMA region teardown | |
3364 | * | |
3365 | * @dd Pointer to driver_data structure | |
3366 | * | |
3367 | * return value | |
3368 | * None | |
3369 | */ | |
3370 | static void mtip_dma_free(struct driver_data *dd) | |
3371 | { | |
3372 | int i; | |
3373 | struct mtip_port *port = dd->port; | |
3374 | ||
3375 | if (port->block1) | |
3376 | dmam_free_coherent(&dd->pdev->dev, BLOCK_DMA_ALLOC_SZ, | |
3377 | port->block1, port->block1_dma); | |
3378 | ||
3379 | if (port->command_list) { | |
3380 | dmam_free_coherent(&dd->pdev->dev, AHCI_CMD_TBL_SZ, | |
3381 | port->command_list, port->command_list_dma); | |
3382 | } | |
3383 | ||
3384 | for (i = 0; i < MTIP_MAX_COMMAND_SLOTS; i++) { | |
3385 | if (port->commands[i].command) | |
3386 | dmam_free_coherent(&dd->pdev->dev, CMD_DMA_ALLOC_SZ, | |
3387 | port->commands[i].command, | |
3388 | port->commands[i].command_dma); | |
3389 | } | |
3390 | } | |
3391 | ||
3392 | /* | |
3393 | * DMA region setup | |
3394 | * | |
3395 | * @dd Pointer to driver_data structure | |
3396 | * | |
3397 | * return value | |
3398 | * -ENOMEM Not enough free DMA region space to initialize driver | |
3399 | */ | |
3400 | static int mtip_dma_alloc(struct driver_data *dd) | |
3401 | { | |
3402 | struct mtip_port *port = dd->port; | |
3403 | int i, rv = 0; | |
3404 | u32 host_cap_64 = readl(dd->mmio + HOST_CAP) & HOST_CAP_64; | |
3405 | ||
3406 | /* Allocate dma memory for RX Fis, Identify, and Sector Bufffer */ | |
3407 | port->block1 = | |
3408 | dmam_alloc_coherent(&dd->pdev->dev, BLOCK_DMA_ALLOC_SZ, | |
3409 | &port->block1_dma, GFP_KERNEL); | |
3410 | if (!port->block1) | |
3411 | return -ENOMEM; | |
3412 | memset(port->block1, 0, BLOCK_DMA_ALLOC_SZ); | |
3413 | ||
3414 | /* Allocate dma memory for command list */ | |
3415 | port->command_list = | |
3416 | dmam_alloc_coherent(&dd->pdev->dev, AHCI_CMD_TBL_SZ, | |
3417 | &port->command_list_dma, GFP_KERNEL); | |
3418 | if (!port->command_list) { | |
3419 | dmam_free_coherent(&dd->pdev->dev, BLOCK_DMA_ALLOC_SZ, | |
3420 | port->block1, port->block1_dma); | |
3421 | port->block1 = NULL; | |
3422 | port->block1_dma = 0; | |
3423 | return -ENOMEM; | |
3424 | } | |
3425 | memset(port->command_list, 0, AHCI_CMD_TBL_SZ); | |
3426 | ||
3427 | /* Setup all pointers into first DMA region */ | |
3428 | port->rxfis = port->block1 + AHCI_RX_FIS_OFFSET; | |
3429 | port->rxfis_dma = port->block1_dma + AHCI_RX_FIS_OFFSET; | |
3430 | port->identify = port->block1 + AHCI_IDFY_OFFSET; | |
3431 | port->identify_dma = port->block1_dma + AHCI_IDFY_OFFSET; | |
3432 | port->log_buf = port->block1 + AHCI_SECTBUF_OFFSET; | |
3433 | port->log_buf_dma = port->block1_dma + AHCI_SECTBUF_OFFSET; | |
3434 | port->smart_buf = port->block1 + AHCI_SMARTBUF_OFFSET; | |
3435 | port->smart_buf_dma = port->block1_dma + AHCI_SMARTBUF_OFFSET; | |
3436 | ||
3437 | /* Setup per command SGL DMA region */ | |
3438 | ||
3439 | /* Point the command headers at the command tables */ | |
3440 | for (i = 0; i < MTIP_MAX_COMMAND_SLOTS; i++) { | |
3441 | port->commands[i].command = | |
3442 | dmam_alloc_coherent(&dd->pdev->dev, CMD_DMA_ALLOC_SZ, | |
3443 | &port->commands[i].command_dma, GFP_KERNEL); | |
3444 | if (!port->commands[i].command) { | |
3445 | rv = -ENOMEM; | |
3446 | mtip_dma_free(dd); | |
3447 | return rv; | |
3448 | } | |
3449 | memset(port->commands[i].command, 0, CMD_DMA_ALLOC_SZ); | |
3450 | ||
3451 | port->commands[i].command_header = port->command_list + | |
3452 | (sizeof(struct mtip_cmd_hdr) * i); | |
3453 | port->commands[i].command_header_dma = | |
3454 | dd->port->command_list_dma + | |
3455 | (sizeof(struct mtip_cmd_hdr) * i); | |
3456 | ||
3457 | if (host_cap_64) | |
3458 | port->commands[i].command_header->ctbau = | |
3459 | __force_bit2int cpu_to_le32( | |
3460 | (port->commands[i].command_dma >> 16) >> 16); | |
3461 | ||
3462 | port->commands[i].command_header->ctba = | |
3463 | __force_bit2int cpu_to_le32( | |
3464 | port->commands[i].command_dma & 0xFFFFFFFF); | |
3465 | ||
3466 | sg_init_table(port->commands[i].sg, MTIP_MAX_SG); | |
3467 | ||
3468 | /* Mark command as currently inactive */ | |
3469 | atomic_set(&dd->port->commands[i].active, 0); | |
3470 | } | |
3471 | return 0; | |
3472 | } | |
3473 | ||
88523a61 SB |
3474 | /* |
3475 | * Called once for each card. | |
3476 | * | |
3477 | * @dd Pointer to the driver data structure. | |
3478 | * | |
3479 | * return value | |
3480 | * 0 on success, else an error code. | |
3481 | */ | |
6316668f | 3482 | static int mtip_hw_init(struct driver_data *dd) |
88523a61 SB |
3483 | { |
3484 | int i; | |
3485 | int rv; | |
3486 | unsigned int num_command_slots; | |
45038367 | 3487 | unsigned long timeout, timetaken; |
f6587217 AT |
3488 | unsigned char *buf; |
3489 | struct smart_attr attr242; | |
88523a61 SB |
3490 | |
3491 | dd->mmio = pcim_iomap_table(dd->pdev)[MTIP_ABAR]; | |
3492 | ||
3493 | mtip_detect_product(dd); | |
3494 | if (dd->product_type == MTIP_PRODUCT_UNKNOWN) { | |
3495 | rv = -EIO; | |
3496 | goto out1; | |
3497 | } | |
3498 | num_command_slots = dd->slot_groups * 32; | |
3499 | ||
3500 | hba_setup(dd); | |
3501 | ||
16c906e5 AT |
3502 | dd->port = kzalloc_node(sizeof(struct mtip_port), GFP_KERNEL, |
3503 | dd->numa_node); | |
88523a61 SB |
3504 | if (!dd->port) { |
3505 | dev_err(&dd->pdev->dev, | |
3506 | "Memory allocation: port structure\n"); | |
3507 | return -ENOMEM; | |
3508 | } | |
3509 | ||
16c906e5 AT |
3510 | /* Continue workqueue setup */ |
3511 | for (i = 0; i < MTIP_MAX_SLOT_GROUPS; i++) | |
3512 | dd->work[i].port = dd->port; | |
3513 | ||
2077d947 AT |
3514 | /* Enable unaligned IO constraints for some devices */ |
3515 | if (mtip_device_unaligned_constrained(dd)) | |
3516 | dd->unal_qdepth = MTIP_MAX_UNALIGNED_SLOTS; | |
3517 | else | |
3518 | dd->unal_qdepth = 0; | |
3519 | ||
88523a61 | 3520 | /* Counting semaphore to track command slot usage */ |
2077d947 AT |
3521 | sema_init(&dd->port->cmd_slot, num_command_slots - 1 - dd->unal_qdepth); |
3522 | sema_init(&dd->port->cmd_slot_unal, dd->unal_qdepth); | |
88523a61 SB |
3523 | |
3524 | /* Spinlock to prevent concurrent issue */ | |
16c906e5 AT |
3525 | for (i = 0; i < MTIP_MAX_SLOT_GROUPS; i++) |
3526 | spin_lock_init(&dd->port->cmd_issue_lock[i]); | |
88523a61 SB |
3527 | |
3528 | /* Set the port mmio base address. */ | |
3529 | dd->port->mmio = dd->mmio + PORT_OFFSET; | |
3530 | dd->port->dd = dd; | |
3531 | ||
188b9f49 SB |
3532 | /* DMA allocations */ |
3533 | rv = mtip_dma_alloc(dd); | |
3534 | if (rv < 0) | |
88523a61 | 3535 | goto out1; |
88523a61 SB |
3536 | |
3537 | /* Setup the pointers to the extended s_active and CI registers. */ | |
3538 | for (i = 0; i < dd->slot_groups; i++) { | |
3539 | dd->port->s_active[i] = | |
3540 | dd->port->mmio + i*0x80 + PORT_SCR_ACT; | |
3541 | dd->port->cmd_issue[i] = | |
3542 | dd->port->mmio + i*0x80 + PORT_COMMAND_ISSUE; | |
3543 | dd->port->completed[i] = | |
3544 | dd->port->mmio + i*0x80 + PORT_SDBV; | |
3545 | } | |
3546 | ||
45038367 AT |
3547 | timetaken = jiffies; |
3548 | timeout = jiffies + msecs_to_jiffies(30000); | |
3549 | while (((readl(dd->port->mmio + PORT_SCR_STAT) & 0x0F) != 0x03) && | |
3550 | time_before(jiffies, timeout)) { | |
3551 | mdelay(100); | |
3552 | } | |
3553 | if (unlikely(mtip_check_surprise_removal(dd->pdev))) { | |
3554 | timetaken = jiffies - timetaken; | |
3555 | dev_warn(&dd->pdev->dev, | |
3556 | "Surprise removal detected at %u ms\n", | |
3557 | jiffies_to_msecs(timetaken)); | |
3558 | rv = -ENODEV; | |
3559 | goto out2 ; | |
3560 | } | |
8a857a88 | 3561 | if (unlikely(test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag))) { |
45038367 AT |
3562 | timetaken = jiffies - timetaken; |
3563 | dev_warn(&dd->pdev->dev, | |
3564 | "Removal detected at %u ms\n", | |
3565 | jiffies_to_msecs(timetaken)); | |
3566 | rv = -EFAULT; | |
88523a61 SB |
3567 | goto out2; |
3568 | } | |
3569 | ||
45038367 AT |
3570 | /* Conditionally reset the HBA. */ |
3571 | if (!(readl(dd->mmio + HOST_CAP) & HOST_CAP_NZDMA)) { | |
3572 | if (mtip_hba_reset(dd) < 0) { | |
3573 | dev_err(&dd->pdev->dev, | |
3574 | "Card did not reset within timeout\n"); | |
3575 | rv = -EIO; | |
3576 | goto out2; | |
3577 | } | |
3578 | } else { | |
3579 | /* Clear any pending interrupts on the HBA */ | |
3580 | writel(readl(dd->mmio + HOST_IRQ_STAT), | |
3581 | dd->mmio + HOST_IRQ_STAT); | |
3582 | } | |
3583 | ||
88523a61 SB |
3584 | mtip_init_port(dd->port); |
3585 | mtip_start_port(dd->port); | |
3586 | ||
3587 | /* Setup the ISR and enable interrupts. */ | |
3588 | rv = devm_request_irq(&dd->pdev->dev, | |
3589 | dd->pdev->irq, | |
3590 | mtip_irq_handler, | |
3591 | IRQF_SHARED, | |
3592 | dev_driver_string(&dd->pdev->dev), | |
3593 | dd); | |
3594 | ||
3595 | if (rv) { | |
3596 | dev_err(&dd->pdev->dev, | |
3597 | "Unable to allocate IRQ %d\n", dd->pdev->irq); | |
3598 | goto out2; | |
3599 | } | |
16c906e5 | 3600 | irq_set_affinity_hint(dd->pdev->irq, get_cpu_mask(dd->isr_binding)); |
88523a61 SB |
3601 | |
3602 | /* Enable interrupts on the HBA. */ | |
3603 | writel(readl(dd->mmio + HOST_CTL) | HOST_IRQ_EN, | |
3604 | dd->mmio + HOST_CTL); | |
3605 | ||
3606 | init_timer(&dd->port->cmd_timer); | |
60ec0eec AT |
3607 | init_waitqueue_head(&dd->port->svc_wait); |
3608 | ||
88523a61 SB |
3609 | dd->port->cmd_timer.data = (unsigned long int) dd->port; |
3610 | dd->port->cmd_timer.function = mtip_timeout_function; | |
3611 | mod_timer(&dd->port->cmd_timer, | |
3612 | jiffies + msecs_to_jiffies(MTIP_TIMEOUT_CHECK_PERIOD)); | |
3613 | ||
45038367 | 3614 | |
8a857a88 | 3615 | if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag)) { |
45038367 AT |
3616 | rv = -EFAULT; |
3617 | goto out3; | |
3618 | } | |
3619 | ||
88523a61 SB |
3620 | if (mtip_get_identify(dd->port, NULL) < 0) { |
3621 | rv = -EFAULT; | |
3622 | goto out3; | |
3623 | } | |
8f8b8995 | 3624 | mtip_dump_identify(dd->port); |
88523a61 SB |
3625 | |
3626 | if (*(dd->port->identify + MTIP_FTL_REBUILD_OFFSET) == | |
3627 | MTIP_FTL_REBUILD_MAGIC) { | |
8a857a88 | 3628 | set_bit(MTIP_PF_REBUILD_BIT, &dd->port->flags); |
62ee8c13 | 3629 | return MTIP_FTL_REBUILD_MAGIC; |
88523a61 | 3630 | } |
f6587217 AT |
3631 | |
3632 | /* check write protect, over temp and rebuild statuses */ | |
3633 | rv = mtip_read_log_page(dd->port, ATA_LOG_SATA_NCQ, | |
3634 | dd->port->log_buf, | |
3635 | dd->port->log_buf_dma, 1); | |
3636 | if (rv) { | |
3637 | dev_warn(&dd->pdev->dev, | |
3638 | "Error in READ LOG EXT (10h) command\n"); | |
3639 | /* non-critical error, don't fail the load */ | |
3640 | } else { | |
3641 | buf = (unsigned char *)dd->port->log_buf; | |
3642 | if (buf[259] & 0x1) { | |
3643 | dev_info(&dd->pdev->dev, | |
3644 | "Write protect bit is set.\n"); | |
8a857a88 | 3645 | set_bit(MTIP_DDF_WRITE_PROTECT_BIT, &dd->dd_flag); |
f6587217 AT |
3646 | } |
3647 | if (buf[288] == 0xF7) { | |
3648 | dev_info(&dd->pdev->dev, | |
3649 | "Exceeded Tmax, drive in thermal shutdown.\n"); | |
8a857a88 | 3650 | set_bit(MTIP_DDF_OVER_TEMP_BIT, &dd->dd_flag); |
f6587217 AT |
3651 | } |
3652 | if (buf[288] == 0xBF) { | |
3653 | dev_info(&dd->pdev->dev, | |
8f8b8995 AT |
3654 | "Drive is in security locked state.\n"); |
3655 | set_bit(MTIP_DDF_SEC_LOCK_BIT, &dd->dd_flag); | |
f6587217 AT |
3656 | } |
3657 | } | |
3658 | ||
3659 | /* get write protect progess */ | |
3660 | memset(&attr242, 0, sizeof(struct smart_attr)); | |
3661 | if (mtip_get_smart_attr(dd->port, 242, &attr242)) | |
3662 | dev_warn(&dd->pdev->dev, | |
3663 | "Unable to check write protect progress\n"); | |
3664 | else | |
3665 | dev_info(&dd->pdev->dev, | |
b62868e5 AT |
3666 | "Write protect progress: %u%% (%u blocks)\n", |
3667 | attr242.cur, le32_to_cpu(attr242.data)); | |
88523a61 SB |
3668 | return rv; |
3669 | ||
3670 | out3: | |
3671 | del_timer_sync(&dd->port->cmd_timer); | |
3672 | ||
3673 | /* Disable interrupts on the HBA. */ | |
3674 | writel(readl(dd->mmio + HOST_CTL) & ~HOST_IRQ_EN, | |
3675 | dd->mmio + HOST_CTL); | |
3676 | ||
16c906e5 AT |
3677 | /* Release the IRQ. */ |
3678 | irq_set_affinity_hint(dd->pdev->irq, NULL); | |
88523a61 SB |
3679 | devm_free_irq(&dd->pdev->dev, dd->pdev->irq, dd); |
3680 | ||
3681 | out2: | |
3682 | mtip_deinit_port(dd->port); | |
188b9f49 | 3683 | mtip_dma_free(dd); |
88523a61 | 3684 | |
88523a61 SB |
3685 | out1: |
3686 | /* Free the memory allocated for the for structure. */ | |
3687 | kfree(dd->port); | |
3688 | ||
3689 | return rv; | |
3690 | } | |
3691 | ||
3692 | /* | |
3693 | * Called to deinitialize an interface. | |
3694 | * | |
3695 | * @dd Pointer to the driver data structure. | |
3696 | * | |
3697 | * return value | |
3698 | * 0 | |
3699 | */ | |
6316668f | 3700 | static int mtip_hw_exit(struct driver_data *dd) |
88523a61 SB |
3701 | { |
3702 | /* | |
3703 | * Send standby immediate (E0h) to the drive so that it | |
3704 | * saves its state. | |
3705 | */ | |
8f8b8995 | 3706 | if (!dd->sr) { |
26d58057 SB |
3707 | if (!test_bit(MTIP_PF_REBUILD_BIT, &dd->port->flags) && |
3708 | !test_bit(MTIP_DDF_SEC_LOCK_BIT, &dd->dd_flag)) | |
45038367 AT |
3709 | if (mtip_standby_immediate(dd->port)) |
3710 | dev_warn(&dd->pdev->dev, | |
3711 | "STANDBY IMMEDIATE failed\n"); | |
88523a61 SB |
3712 | |
3713 | /* de-initialize the port. */ | |
3714 | mtip_deinit_port(dd->port); | |
3715 | ||
3716 | /* Disable interrupts on the HBA. */ | |
3717 | writel(readl(dd->mmio + HOST_CTL) & ~HOST_IRQ_EN, | |
3718 | dd->mmio + HOST_CTL); | |
3719 | } | |
3720 | ||
3721 | del_timer_sync(&dd->port->cmd_timer); | |
3722 | ||
88523a61 | 3723 | /* Release the IRQ. */ |
16c906e5 | 3724 | irq_set_affinity_hint(dd->pdev->irq, NULL); |
88523a61 SB |
3725 | devm_free_irq(&dd->pdev->dev, dd->pdev->irq, dd); |
3726 | ||
188b9f49 SB |
3727 | /* Free dma regions */ |
3728 | mtip_dma_free(dd); | |
3729 | ||
88523a61 SB |
3730 | /* Free the memory allocated for the for structure. */ |
3731 | kfree(dd->port); | |
8f8b8995 | 3732 | dd->port = NULL; |
88523a61 SB |
3733 | |
3734 | return 0; | |
3735 | } | |
3736 | ||
3737 | /* | |
3738 | * Issue a Standby Immediate command to the device. | |
3739 | * | |
3740 | * This function is called by the Block Layer just before the | |
3741 | * system powers off during a shutdown. | |
3742 | * | |
3743 | * @dd Pointer to the driver data structure. | |
3744 | * | |
3745 | * return value | |
3746 | * 0 | |
3747 | */ | |
6316668f | 3748 | static int mtip_hw_shutdown(struct driver_data *dd) |
88523a61 SB |
3749 | { |
3750 | /* | |
3751 | * Send standby immediate (E0h) to the drive so that it | |
3752 | * saves its state. | |
3753 | */ | |
8f8b8995 AT |
3754 | if (!dd->sr && dd->port) |
3755 | mtip_standby_immediate(dd->port); | |
88523a61 SB |
3756 | |
3757 | return 0; | |
3758 | } | |
3759 | ||
3760 | /* | |
3761 | * Suspend function | |
3762 | * | |
3763 | * This function is called by the Block Layer just before the | |
3764 | * system hibernates. | |
3765 | * | |
3766 | * @dd Pointer to the driver data structure. | |
3767 | * | |
3768 | * return value | |
3769 | * 0 Suspend was successful | |
3770 | * -EFAULT Suspend was not successful | |
3771 | */ | |
6316668f | 3772 | static int mtip_hw_suspend(struct driver_data *dd) |
88523a61 SB |
3773 | { |
3774 | /* | |
3775 | * Send standby immediate (E0h) to the drive | |
3776 | * so that it saves its state. | |
3777 | */ | |
3778 | if (mtip_standby_immediate(dd->port) != 0) { | |
3779 | dev_err(&dd->pdev->dev, | |
3780 | "Failed standby-immediate command\n"); | |
3781 | return -EFAULT; | |
3782 | } | |
3783 | ||
3784 | /* Disable interrupts on the HBA.*/ | |
3785 | writel(readl(dd->mmio + HOST_CTL) & ~HOST_IRQ_EN, | |
3786 | dd->mmio + HOST_CTL); | |
3787 | mtip_deinit_port(dd->port); | |
3788 | ||
3789 | return 0; | |
3790 | } | |
3791 | ||
3792 | /* | |
3793 | * Resume function | |
3794 | * | |
3795 | * This function is called by the Block Layer as the | |
3796 | * system resumes. | |
3797 | * | |
3798 | * @dd Pointer to the driver data structure. | |
3799 | * | |
3800 | * return value | |
3801 | * 0 Resume was successful | |
3802 | * -EFAULT Resume was not successful | |
3803 | */ | |
6316668f | 3804 | static int mtip_hw_resume(struct driver_data *dd) |
88523a61 SB |
3805 | { |
3806 | /* Perform any needed hardware setup steps */ | |
3807 | hba_setup(dd); | |
3808 | ||
3809 | /* Reset the HBA */ | |
3810 | if (mtip_hba_reset(dd) != 0) { | |
3811 | dev_err(&dd->pdev->dev, | |
3812 | "Unable to reset the HBA\n"); | |
3813 | return -EFAULT; | |
3814 | } | |
3815 | ||
3816 | /* | |
3817 | * Enable the port, DMA engine, and FIS reception specific | |
3818 | * h/w in controller. | |
3819 | */ | |
3820 | mtip_init_port(dd->port); | |
3821 | mtip_start_port(dd->port); | |
3822 | ||
3823 | /* Enable interrupts on the HBA.*/ | |
3824 | writel(readl(dd->mmio + HOST_CTL) | HOST_IRQ_EN, | |
3825 | dd->mmio + HOST_CTL); | |
3826 | ||
3827 | return 0; | |
3828 | } | |
3829 | ||
88523a61 SB |
3830 | /* |
3831 | * Helper function for reusing disk name | |
3832 | * upon hot insertion. | |
3833 | */ | |
3834 | static int rssd_disk_name_format(char *prefix, | |
3835 | int index, | |
3836 | char *buf, | |
3837 | int buflen) | |
3838 | { | |
3839 | const int base = 'z' - 'a' + 1; | |
3840 | char *begin = buf + strlen(prefix); | |
3841 | char *end = buf + buflen; | |
3842 | char *p; | |
3843 | int unit; | |
3844 | ||
3845 | p = end - 1; | |
3846 | *p = '\0'; | |
3847 | unit = base; | |
3848 | do { | |
3849 | if (p == begin) | |
3850 | return -EINVAL; | |
3851 | *--p = 'a' + (index % unit); | |
3852 | index = (index / unit) - 1; | |
3853 | } while (index >= 0); | |
3854 | ||
3855 | memmove(begin, p, end - p); | |
3856 | memcpy(buf, prefix, strlen(prefix)); | |
3857 | ||
3858 | return 0; | |
3859 | } | |
3860 | ||
3861 | /* | |
3862 | * Block layer IOCTL handler. | |
3863 | * | |
3864 | * @dev Pointer to the block_device structure. | |
3865 | * @mode ignored | |
3866 | * @cmd IOCTL command passed from the user application. | |
3867 | * @arg Argument passed from the user application. | |
3868 | * | |
3869 | * return value | |
3870 | * 0 IOCTL completed successfully. | |
3871 | * -ENOTTY IOCTL not supported or invalid driver data | |
3872 | * structure pointer. | |
3873 | */ | |
3874 | static int mtip_block_ioctl(struct block_device *dev, | |
3875 | fmode_t mode, | |
3876 | unsigned cmd, | |
3877 | unsigned long arg) | |
3878 | { | |
3879 | struct driver_data *dd = dev->bd_disk->private_data; | |
3880 | ||
3881 | if (!capable(CAP_SYS_ADMIN)) | |
3882 | return -EACCES; | |
3883 | ||
3884 | if (!dd) | |
3885 | return -ENOTTY; | |
3886 | ||
8a857a88 | 3887 | if (unlikely(test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag))) |
45038367 AT |
3888 | return -ENOTTY; |
3889 | ||
88523a61 SB |
3890 | switch (cmd) { |
3891 | case BLKFLSBUF: | |
60ec0eec | 3892 | return -ENOTTY; |
88523a61 | 3893 | default: |
ef0f1587 | 3894 | return mtip_hw_ioctl(dd, cmd, arg); |
88523a61 SB |
3895 | } |
3896 | } | |
3897 | ||
16d02c04 | 3898 | #ifdef CONFIG_COMPAT |
88523a61 SB |
3899 | /* |
3900 | * Block layer compat IOCTL handler. | |
3901 | * | |
3902 | * @dev Pointer to the block_device structure. | |
3903 | * @mode ignored | |
3904 | * @cmd IOCTL command passed from the user application. | |
3905 | * @arg Argument passed from the user application. | |
3906 | * | |
3907 | * return value | |
3908 | * 0 IOCTL completed successfully. | |
3909 | * -ENOTTY IOCTL not supported or invalid driver data | |
3910 | * structure pointer. | |
3911 | */ | |
3912 | static int mtip_block_compat_ioctl(struct block_device *dev, | |
3913 | fmode_t mode, | |
3914 | unsigned cmd, | |
3915 | unsigned long arg) | |
3916 | { | |
3917 | struct driver_data *dd = dev->bd_disk->private_data; | |
3918 | ||
3919 | if (!capable(CAP_SYS_ADMIN)) | |
3920 | return -EACCES; | |
3921 | ||
3922 | if (!dd) | |
3923 | return -ENOTTY; | |
3924 | ||
8a857a88 | 3925 | if (unlikely(test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag))) |
45038367 AT |
3926 | return -ENOTTY; |
3927 | ||
88523a61 SB |
3928 | switch (cmd) { |
3929 | case BLKFLSBUF: | |
60ec0eec | 3930 | return -ENOTTY; |
ef0f1587 | 3931 | case HDIO_DRIVE_TASKFILE: { |
60ec0eec | 3932 | struct mtip_compat_ide_task_request_s __user *compat_req_task; |
ef0f1587 JA |
3933 | ide_task_request_t req_task; |
3934 | int compat_tasksize, outtotal, ret; | |
3935 | ||
60ec0eec AT |
3936 | compat_tasksize = |
3937 | sizeof(struct mtip_compat_ide_task_request_s); | |
ef0f1587 JA |
3938 | |
3939 | compat_req_task = | |
3940 | (struct mtip_compat_ide_task_request_s __user *) arg; | |
3941 | ||
3942 | if (copy_from_user(&req_task, (void __user *) arg, | |
60ec0eec | 3943 | compat_tasksize - (2 * sizeof(compat_long_t)))) |
ef0f1587 JA |
3944 | return -EFAULT; |
3945 | ||
3946 | if (get_user(req_task.out_size, &compat_req_task->out_size)) | |
3947 | return -EFAULT; | |
3948 | ||
3949 | if (get_user(req_task.in_size, &compat_req_task->in_size)) | |
3950 | return -EFAULT; | |
3951 | ||
3952 | outtotal = sizeof(struct mtip_compat_ide_task_request_s); | |
3953 | ||
3954 | ret = exec_drive_taskfile(dd, (void __user *) arg, | |
3955 | &req_task, outtotal); | |
3956 | ||
3957 | if (copy_to_user((void __user *) arg, &req_task, | |
3958 | compat_tasksize - | |
3959 | (2 * sizeof(compat_long_t)))) | |
3960 | return -EFAULT; | |
3961 | ||
3962 | if (put_user(req_task.out_size, &compat_req_task->out_size)) | |
3963 | return -EFAULT; | |
3964 | ||
3965 | if (put_user(req_task.in_size, &compat_req_task->in_size)) | |
3966 | return -EFAULT; | |
3967 | ||
3968 | return ret; | |
3969 | } | |
88523a61 | 3970 | default: |
ef0f1587 | 3971 | return mtip_hw_ioctl(dd, cmd, arg); |
88523a61 SB |
3972 | } |
3973 | } | |
16d02c04 | 3974 | #endif |
88523a61 SB |
3975 | |
3976 | /* | |
3977 | * Obtain the geometry of the device. | |
3978 | * | |
3979 | * You may think that this function is obsolete, but some applications, | |
3980 | * fdisk for example still used CHS values. This function describes the | |
3981 | * device as having 224 heads and 56 sectors per cylinder. These values are | |
3982 | * chosen so that each cylinder is aligned on a 4KB boundary. Since a | |
3983 | * partition is described in terms of a start and end cylinder this means | |
3984 | * that each partition is also 4KB aligned. Non-aligned partitions adversely | |
3985 | * affects performance. | |
3986 | * | |
3987 | * @dev Pointer to the block_device strucutre. | |
3988 | * @geo Pointer to a hd_geometry structure. | |
3989 | * | |
3990 | * return value | |
3991 | * 0 Operation completed successfully. | |
3992 | * -ENOTTY An error occurred while reading the drive capacity. | |
3993 | */ | |
3994 | static int mtip_block_getgeo(struct block_device *dev, | |
3995 | struct hd_geometry *geo) | |
3996 | { | |
3997 | struct driver_data *dd = dev->bd_disk->private_data; | |
3998 | sector_t capacity; | |
3999 | ||
4000 | if (!dd) | |
4001 | return -ENOTTY; | |
4002 | ||
4003 | if (!(mtip_hw_get_capacity(dd, &capacity))) { | |
4004 | dev_warn(&dd->pdev->dev, | |
4005 | "Could not get drive capacity.\n"); | |
4006 | return -ENOTTY; | |
4007 | } | |
4008 | ||
4009 | geo->heads = 224; | |
4010 | geo->sectors = 56; | |
60ec0eec | 4011 | sector_div(capacity, (geo->heads * geo->sectors)); |
88523a61 | 4012 | geo->cylinders = capacity; |
88523a61 SB |
4013 | return 0; |
4014 | } | |
4015 | ||
4016 | /* | |
4017 | * Block device operation function. | |
4018 | * | |
4019 | * This structure contains pointers to the functions required by the block | |
4020 | * layer. | |
4021 | */ | |
4022 | static const struct block_device_operations mtip_block_ops = { | |
4023 | .ioctl = mtip_block_ioctl, | |
16d02c04 | 4024 | #ifdef CONFIG_COMPAT |
88523a61 | 4025 | .compat_ioctl = mtip_block_compat_ioctl, |
16d02c04 | 4026 | #endif |
88523a61 SB |
4027 | .getgeo = mtip_block_getgeo, |
4028 | .owner = THIS_MODULE | |
4029 | }; | |
4030 | ||
4031 | /* | |
4032 | * Block layer make request function. | |
4033 | * | |
4034 | * This function is called by the kernel to process a BIO for | |
4035 | * the P320 device. | |
4036 | * | |
4037 | * @queue Pointer to the request queue. Unused other than to obtain | |
4038 | * the driver data structure. | |
4039 | * @bio Pointer to the BIO. | |
4040 | * | |
88523a61 | 4041 | */ |
a71f483d | 4042 | static void mtip_make_request(struct request_queue *queue, struct bio *bio) |
88523a61 SB |
4043 | { |
4044 | struct driver_data *dd = queue->queuedata; | |
4045 | struct scatterlist *sg; | |
7988613b KO |
4046 | struct bio_vec bvec; |
4047 | struct bvec_iter iter; | |
4048 | int nents = 0; | |
2077d947 | 4049 | int tag = 0, unaligned = 0; |
88523a61 | 4050 | |
c74b0f58 AT |
4051 | if (unlikely(dd->dd_flag & MTIP_DDF_STOP_IO)) { |
4052 | if (unlikely(test_bit(MTIP_DDF_REMOVE_PENDING_BIT, | |
4053 | &dd->dd_flag))) { | |
4054 | bio_endio(bio, -ENXIO); | |
4055 | return; | |
4056 | } | |
4057 | if (unlikely(test_bit(MTIP_DDF_OVER_TEMP_BIT, &dd->dd_flag))) { | |
4058 | bio_endio(bio, -ENODATA); | |
4059 | return; | |
4060 | } | |
4061 | if (unlikely(test_bit(MTIP_DDF_WRITE_PROTECT_BIT, | |
4062 | &dd->dd_flag) && | |
4063 | bio_data_dir(bio))) { | |
4064 | bio_endio(bio, -ENODATA); | |
4065 | return; | |
4066 | } | |
12a166c9 AT |
4067 | if (unlikely(test_bit(MTIP_DDF_SEC_LOCK_BIT, &dd->dd_flag))) { |
4068 | bio_endio(bio, -ENODATA); | |
4069 | return; | |
4070 | } | |
8f8b8995 AT |
4071 | if (test_bit(MTIP_DDF_REBUILD_FAILED_BIT, &dd->dd_flag)) { |
4072 | bio_endio(bio, -ENXIO); | |
4073 | return; | |
4074 | } | |
45038367 AT |
4075 | } |
4076 | ||
15283469 | 4077 | if (unlikely(bio->bi_rw & REQ_DISCARD)) { |
4f024f37 | 4078 | bio_endio(bio, mtip_send_trim(dd, bio->bi_iter.bi_sector, |
15283469 AT |
4079 | bio_sectors(bio))); |
4080 | return; | |
4081 | } | |
4082 | ||
88523a61 SB |
4083 | if (unlikely(!bio_has_data(bio))) { |
4084 | blk_queue_flush(queue, 0); | |
4085 | bio_endio(bio, 0); | |
a71f483d | 4086 | return; |
88523a61 SB |
4087 | } |
4088 | ||
2077d947 AT |
4089 | if (bio_data_dir(bio) == WRITE && bio_sectors(bio) <= 64 && |
4090 | dd->unal_qdepth) { | |
4f024f37 KO |
4091 | if (bio->bi_iter.bi_sector % 8 != 0) |
4092 | /* Unaligned on 4k boundaries */ | |
2077d947 AT |
4093 | unaligned = 1; |
4094 | else if (bio_sectors(bio) % 8 != 0) /* Aligned but not 4k/8k */ | |
4095 | unaligned = 1; | |
4096 | } | |
4097 | ||
4098 | sg = mtip_hw_get_scatterlist(dd, &tag, unaligned); | |
88523a61 SB |
4099 | if (likely(sg != NULL)) { |
4100 | blk_queue_bounce(queue, &bio); | |
4101 | ||
4102 | if (unlikely((bio)->bi_vcnt > MTIP_MAX_SG)) { | |
4103 | dev_warn(&dd->pdev->dev, | |
45038367 | 4104 | "Maximum number of SGL entries exceeded\n"); |
88523a61 | 4105 | bio_io_error(bio); |
2077d947 | 4106 | mtip_hw_release_scatterlist(dd, tag, unaligned); |
a71f483d | 4107 | return; |
88523a61 SB |
4108 | } |
4109 | ||
4110 | /* Create the scatter list for this bio. */ | |
7988613b | 4111 | bio_for_each_segment(bvec, bio, iter) { |
88523a61 | 4112 | sg_set_page(&sg[nents], |
7988613b KO |
4113 | bvec.bv_page, |
4114 | bvec.bv_len, | |
4115 | bvec.bv_offset); | |
093c9593 | 4116 | nents++; |
88523a61 SB |
4117 | } |
4118 | ||
4119 | /* Issue the read/write. */ | |
4120 | mtip_hw_submit_io(dd, | |
4f024f37 | 4121 | bio->bi_iter.bi_sector, |
88523a61 SB |
4122 | bio_sectors(bio), |
4123 | nents, | |
4124 | tag, | |
4125 | bio_endio, | |
4126 | bio, | |
2077d947 AT |
4127 | bio_data_dir(bio), |
4128 | unaligned); | |
a71f483d | 4129 | } else |
88523a61 | 4130 | bio_io_error(bio); |
88523a61 SB |
4131 | } |
4132 | ||
4133 | /* | |
4134 | * Block layer initialization function. | |
4135 | * | |
4136 | * This function is called once by the PCI layer for each P320 | |
4137 | * device that is connected to the system. | |
4138 | * | |
4139 | * @dd Pointer to the driver data structure. | |
4140 | * | |
4141 | * return value | |
4142 | * 0 on success else an error code. | |
4143 | */ | |
6316668f | 4144 | static int mtip_block_initialize(struct driver_data *dd) |
88523a61 | 4145 | { |
62ee8c13 | 4146 | int rv = 0, wait_for_rebuild = 0; |
88523a61 SB |
4147 | sector_t capacity; |
4148 | unsigned int index = 0; | |
4149 | struct kobject *kobj; | |
60ec0eec | 4150 | unsigned char thd_name[16]; |
88523a61 | 4151 | |
62ee8c13 AT |
4152 | if (dd->disk) |
4153 | goto skip_create_disk; /* hw init done, before rebuild */ | |
4154 | ||
88523a61 | 4155 | /* Initialize the protocol layer. */ |
62ee8c13 AT |
4156 | wait_for_rebuild = mtip_hw_init(dd); |
4157 | if (wait_for_rebuild < 0) { | |
88523a61 SB |
4158 | dev_err(&dd->pdev->dev, |
4159 | "Protocol layer initialization failed\n"); | |
4160 | rv = -EINVAL; | |
4161 | goto protocol_init_error; | |
4162 | } | |
4163 | ||
16c906e5 | 4164 | dd->disk = alloc_disk_node(MTIP_MAX_MINORS, dd->numa_node); |
88523a61 SB |
4165 | if (dd->disk == NULL) { |
4166 | dev_err(&dd->pdev->dev, | |
4167 | "Unable to allocate gendisk structure\n"); | |
4168 | rv = -EINVAL; | |
4169 | goto alloc_disk_error; | |
4170 | } | |
4171 | ||
4172 | /* Generate the disk name, implemented same as in sd.c */ | |
4173 | do { | |
4174 | if (!ida_pre_get(&rssd_index_ida, GFP_KERNEL)) | |
4175 | goto ida_get_error; | |
4176 | ||
4177 | spin_lock(&rssd_index_lock); | |
4178 | rv = ida_get_new(&rssd_index_ida, &index); | |
4179 | spin_unlock(&rssd_index_lock); | |
4180 | } while (rv == -EAGAIN); | |
4181 | ||
4182 | if (rv) | |
4183 | goto ida_get_error; | |
4184 | ||
4185 | rv = rssd_disk_name_format("rssd", | |
4186 | index, | |
4187 | dd->disk->disk_name, | |
4188 | DISK_NAME_LEN); | |
4189 | if (rv) | |
4190 | goto disk_index_error; | |
4191 | ||
4192 | dd->disk->driverfs_dev = &dd->pdev->dev; | |
4193 | dd->disk->major = dd->major; | |
4194 | dd->disk->first_minor = dd->instance * MTIP_MAX_MINORS; | |
4195 | dd->disk->fops = &mtip_block_ops; | |
88523a61 | 4196 | dd->disk->private_data = dd; |
88523a61 SB |
4197 | dd->index = index; |
4198 | ||
8f8b8995 AT |
4199 | mtip_hw_debugfs_init(dd); |
4200 | ||
62ee8c13 AT |
4201 | /* |
4202 | * if rebuild pending, start the service thread, and delay the block | |
4203 | * queue creation and add_disk() | |
4204 | */ | |
4205 | if (wait_for_rebuild == MTIP_FTL_REBUILD_MAGIC) | |
4206 | goto start_service_thread; | |
4207 | ||
4208 | skip_create_disk: | |
4209 | /* Allocate the request queue. */ | |
16c906e5 | 4210 | dd->queue = blk_alloc_queue_node(GFP_KERNEL, dd->numa_node); |
62ee8c13 AT |
4211 | if (dd->queue == NULL) { |
4212 | dev_err(&dd->pdev->dev, | |
4213 | "Unable to allocate request queue\n"); | |
4214 | rv = -ENOMEM; | |
4215 | goto block_queue_alloc_init_error; | |
4216 | } | |
4217 | ||
4218 | /* Attach our request function to the request queue. */ | |
4219 | blk_queue_make_request(dd->queue, mtip_make_request); | |
4220 | ||
4221 | dd->disk->queue = dd->queue; | |
4222 | dd->queue->queuedata = dd; | |
4223 | ||
4224 | /* Set device limits. */ | |
4225 | set_bit(QUEUE_FLAG_NONROT, &dd->queue->queue_flags); | |
4226 | blk_queue_max_segments(dd->queue, MTIP_MAX_SG); | |
4227 | blk_queue_physical_block_size(dd->queue, 4096); | |
6c8ab698 AT |
4228 | blk_queue_max_hw_sectors(dd->queue, 0xffff); |
4229 | blk_queue_max_segment_size(dd->queue, 0x400000); | |
62ee8c13 | 4230 | blk_queue_io_min(dd->queue, 4096); |
1044b1bb | 4231 | blk_queue_bounce_limit(dd->queue, dd->pdev->dma_mask); |
6c8ab698 | 4232 | |
4e8670e2 AT |
4233 | /* |
4234 | * write back cache is not supported in the device. FUA depends on | |
4235 | * write back cache support, hence setting flush support to zero. | |
4236 | */ | |
62ee8c13 AT |
4237 | blk_queue_flush(dd->queue, 0); |
4238 | ||
15283469 AT |
4239 | /* Signal trim support */ |
4240 | if (dd->trim_supp == true) { | |
4241 | set_bit(QUEUE_FLAG_DISCARD, &dd->queue->queue_flags); | |
4242 | dd->queue->limits.discard_granularity = 4096; | |
4243 | blk_queue_max_discard_sectors(dd->queue, | |
4244 | MTIP_MAX_TRIM_ENTRY_LEN * MTIP_MAX_TRIM_ENTRIES); | |
4245 | dd->queue->limits.discard_zeroes_data = 0; | |
4246 | } | |
4247 | ||
88523a61 SB |
4248 | /* Set the capacity of the device in 512 byte sectors. */ |
4249 | if (!(mtip_hw_get_capacity(dd, &capacity))) { | |
4250 | dev_warn(&dd->pdev->dev, | |
4251 | "Could not read drive capacity\n"); | |
4252 | rv = -EIO; | |
4253 | goto read_capacity_error; | |
4254 | } | |
4255 | set_capacity(dd->disk, capacity); | |
4256 | ||
4257 | /* Enable the block device and add it to /dev */ | |
4258 | add_disk(dd->disk); | |
4259 | ||
8f8b8995 | 4260 | dd->bdev = bdget_disk(dd->disk, 0); |
88523a61 SB |
4261 | /* |
4262 | * Now that the disk is active, initialize any sysfs attributes | |
4263 | * managed by the protocol layer. | |
4264 | */ | |
4265 | kobj = kobject_get(&disk_to_dev(dd->disk)->kobj); | |
4266 | if (kobj) { | |
4267 | mtip_hw_sysfs_init(dd, kobj); | |
4268 | kobject_put(kobj); | |
4269 | } | |
4270 | ||
45038367 | 4271 | if (dd->mtip_svc_handler) { |
8a857a88 | 4272 | set_bit(MTIP_DDF_INIT_DONE_BIT, &dd->dd_flag); |
62ee8c13 | 4273 | return rv; /* service thread created for handling rebuild */ |
45038367 | 4274 | } |
62ee8c13 AT |
4275 | |
4276 | start_service_thread: | |
60ec0eec | 4277 | sprintf(thd_name, "mtip_svc_thd_%02d", index); |
16c906e5 | 4278 | dd->mtip_svc_handler = kthread_create_on_node(mtip_service_thread, |
f170168b KC |
4279 | dd, dd->numa_node, "%s", |
4280 | thd_name); | |
60ec0eec AT |
4281 | |
4282 | if (IS_ERR(dd->mtip_svc_handler)) { | |
c74b0f58 | 4283 | dev_err(&dd->pdev->dev, "service thread failed to start\n"); |
60ec0eec AT |
4284 | dd->mtip_svc_handler = NULL; |
4285 | rv = -EFAULT; | |
62ee8c13 | 4286 | goto kthread_run_error; |
60ec0eec | 4287 | } |
16c906e5 | 4288 | wake_up_process(dd->mtip_svc_handler); |
45038367 AT |
4289 | if (wait_for_rebuild == MTIP_FTL_REBUILD_MAGIC) |
4290 | rv = wait_for_rebuild; | |
4291 | ||
88523a61 SB |
4292 | return rv; |
4293 | ||
62ee8c13 | 4294 | kthread_run_error: |
8f8b8995 AT |
4295 | bdput(dd->bdev); |
4296 | dd->bdev = NULL; | |
7b421d24 | 4297 | |
62ee8c13 | 4298 | /* Delete our gendisk. This also removes the device from /dev */ |
88523a61 SB |
4299 | del_gendisk(dd->disk); |
4300 | ||
62ee8c13 AT |
4301 | read_capacity_error: |
4302 | blk_cleanup_queue(dd->queue); | |
4303 | ||
4304 | block_queue_alloc_init_error: | |
8f8b8995 | 4305 | mtip_hw_debugfs_exit(dd); |
88523a61 SB |
4306 | disk_index_error: |
4307 | spin_lock(&rssd_index_lock); | |
4308 | ida_remove(&rssd_index_ida, index); | |
4309 | spin_unlock(&rssd_index_lock); | |
4310 | ||
4311 | ida_get_error: | |
4312 | put_disk(dd->disk); | |
4313 | ||
4314 | alloc_disk_error: | |
62ee8c13 | 4315 | mtip_hw_exit(dd); /* De-initialize the protocol layer. */ |
88523a61 SB |
4316 | |
4317 | protocol_init_error: | |
4318 | return rv; | |
4319 | } | |
4320 | ||
4321 | /* | |
4322 | * Block layer deinitialization function. | |
4323 | * | |
4324 | * Called by the PCI layer as each P320 device is removed. | |
4325 | * | |
4326 | * @dd Pointer to the driver data structure. | |
4327 | * | |
4328 | * return value | |
4329 | * 0 | |
4330 | */ | |
6316668f | 4331 | static int mtip_block_remove(struct driver_data *dd) |
88523a61 SB |
4332 | { |
4333 | struct kobject *kobj; | |
60ec0eec | 4334 | |
8f8b8995 AT |
4335 | if (!dd->sr) { |
4336 | mtip_hw_debugfs_exit(dd); | |
60ec0eec | 4337 | |
8f8b8995 AT |
4338 | if (dd->mtip_svc_handler) { |
4339 | set_bit(MTIP_PF_SVC_THD_STOP_BIT, &dd->port->flags); | |
4340 | wake_up_interruptible(&dd->port->svc_wait); | |
4341 | kthread_stop(dd->mtip_svc_handler); | |
45038367 | 4342 | } |
88523a61 | 4343 | |
8f8b8995 AT |
4344 | /* Clean up the sysfs attributes, if created */ |
4345 | if (test_bit(MTIP_DDF_INIT_DONE_BIT, &dd->dd_flag)) { | |
4346 | kobj = kobject_get(&disk_to_dev(dd->disk)->kobj); | |
4347 | if (kobj) { | |
4348 | mtip_hw_sysfs_exit(dd, kobj); | |
4349 | kobject_put(kobj); | |
4350 | } | |
4351 | } | |
4352 | /* | |
4353 | * Delete our gendisk structure. This also removes the device | |
4354 | * from /dev | |
4355 | */ | |
4356 | if (dd->bdev) { | |
4357 | bdput(dd->bdev); | |
4358 | dd->bdev = NULL; | |
4359 | } | |
4360 | if (dd->disk) { | |
4361 | if (dd->disk->queue) { | |
4362 | del_gendisk(dd->disk); | |
4363 | blk_cleanup_queue(dd->queue); | |
4364 | dd->queue = NULL; | |
4365 | } else | |
4366 | put_disk(dd->disk); | |
4367 | } | |
4368 | dd->disk = NULL; | |
8182b495 | 4369 | |
8f8b8995 AT |
4370 | spin_lock(&rssd_index_lock); |
4371 | ida_remove(&rssd_index_ida, dd->index); | |
4372 | spin_unlock(&rssd_index_lock); | |
4373 | } else { | |
4374 | dev_info(&dd->pdev->dev, "device %s surprise removal\n", | |
4375 | dd->disk->disk_name); | |
4376 | } | |
88523a61 SB |
4377 | |
4378 | /* De-initialize the protocol layer. */ | |
4379 | mtip_hw_exit(dd); | |
4380 | ||
4381 | return 0; | |
4382 | } | |
4383 | ||
4384 | /* | |
4385 | * Function called by the PCI layer when just before the | |
4386 | * machine shuts down. | |
4387 | * | |
4388 | * If a protocol layer shutdown function is present it will be called | |
4389 | * by this function. | |
4390 | * | |
4391 | * @dd Pointer to the driver data structure. | |
4392 | * | |
4393 | * return value | |
4394 | * 0 | |
4395 | */ | |
6316668f | 4396 | static int mtip_block_shutdown(struct driver_data *dd) |
88523a61 | 4397 | { |
88523a61 | 4398 | /* Delete our gendisk structure, and cleanup the blk queue. */ |
58c49df3 | 4399 | if (dd->disk) { |
5a79e1ac AT |
4400 | dev_info(&dd->pdev->dev, |
4401 | "Shutting down %s ...\n", dd->disk->disk_name); | |
4402 | ||
4403 | if (dd->disk->queue) { | |
58c49df3 | 4404 | del_gendisk(dd->disk); |
5a79e1ac AT |
4405 | blk_cleanup_queue(dd->queue); |
4406 | } else | |
58c49df3 | 4407 | put_disk(dd->disk); |
5a79e1ac AT |
4408 | dd->disk = NULL; |
4409 | dd->queue = NULL; | |
58c49df3 AT |
4410 | } |
4411 | ||
8182b495 AT |
4412 | spin_lock(&rssd_index_lock); |
4413 | ida_remove(&rssd_index_ida, dd->index); | |
4414 | spin_unlock(&rssd_index_lock); | |
4415 | ||
88523a61 SB |
4416 | mtip_hw_shutdown(dd); |
4417 | return 0; | |
4418 | } | |
4419 | ||
6316668f | 4420 | static int mtip_block_suspend(struct driver_data *dd) |
88523a61 SB |
4421 | { |
4422 | dev_info(&dd->pdev->dev, | |
4423 | "Suspending %s ...\n", dd->disk->disk_name); | |
4424 | mtip_hw_suspend(dd); | |
4425 | return 0; | |
4426 | } | |
4427 | ||
6316668f | 4428 | static int mtip_block_resume(struct driver_data *dd) |
88523a61 SB |
4429 | { |
4430 | dev_info(&dd->pdev->dev, "Resuming %s ...\n", | |
4431 | dd->disk->disk_name); | |
4432 | mtip_hw_resume(dd); | |
4433 | return 0; | |
4434 | } | |
4435 | ||
16c906e5 AT |
4436 | static void drop_cpu(int cpu) |
4437 | { | |
4438 | cpu_use[cpu]--; | |
4439 | } | |
4440 | ||
4441 | static int get_least_used_cpu_on_node(int node) | |
4442 | { | |
4443 | int cpu, least_used_cpu, least_cnt; | |
4444 | const struct cpumask *node_mask; | |
4445 | ||
4446 | node_mask = cpumask_of_node(node); | |
4447 | least_used_cpu = cpumask_first(node_mask); | |
4448 | least_cnt = cpu_use[least_used_cpu]; | |
4449 | cpu = least_used_cpu; | |
4450 | ||
4451 | for_each_cpu(cpu, node_mask) { | |
4452 | if (cpu_use[cpu] < least_cnt) { | |
4453 | least_used_cpu = cpu; | |
4454 | least_cnt = cpu_use[cpu]; | |
4455 | } | |
4456 | } | |
4457 | cpu_use[least_used_cpu]++; | |
4458 | return least_used_cpu; | |
4459 | } | |
4460 | ||
4461 | /* Helper for selecting a node in round robin mode */ | |
4462 | static inline int mtip_get_next_rr_node(void) | |
4463 | { | |
4464 | static int next_node = -1; | |
4465 | ||
4466 | if (next_node == -1) { | |
4467 | next_node = first_online_node; | |
4468 | return next_node; | |
4469 | } | |
4470 | ||
4471 | next_node = next_online_node(next_node); | |
4472 | if (next_node == MAX_NUMNODES) | |
4473 | next_node = first_online_node; | |
4474 | return next_node; | |
4475 | } | |
4476 | ||
25bac122 FW |
4477 | static DEFINE_HANDLER(0); |
4478 | static DEFINE_HANDLER(1); | |
4479 | static DEFINE_HANDLER(2); | |
4480 | static DEFINE_HANDLER(3); | |
4481 | static DEFINE_HANDLER(4); | |
4482 | static DEFINE_HANDLER(5); | |
4483 | static DEFINE_HANDLER(6); | |
4484 | static DEFINE_HANDLER(7); | |
16c906e5 | 4485 | |
88523a61 SB |
4486 | /* |
4487 | * Called for each supported PCI device detected. | |
4488 | * | |
4489 | * This function allocates the private data structure, enables the | |
4490 | * PCI device and then calls the block layer initialization function. | |
4491 | * | |
4492 | * return value | |
4493 | * 0 on success else an error code. | |
4494 | */ | |
4495 | static int mtip_pci_probe(struct pci_dev *pdev, | |
4496 | const struct pci_device_id *ent) | |
4497 | { | |
4498 | int rv = 0; | |
4499 | struct driver_data *dd = NULL; | |
16c906e5 AT |
4500 | char cpu_list[256]; |
4501 | const struct cpumask *node_mask; | |
4502 | int cpu, i = 0, j = 0; | |
4503 | int my_node = NUMA_NO_NODE; | |
0caff003 | 4504 | unsigned long flags; |
88523a61 SB |
4505 | |
4506 | /* Allocate memory for this devices private data. */ | |
16c906e5 AT |
4507 | my_node = pcibus_to_node(pdev->bus); |
4508 | if (my_node != NUMA_NO_NODE) { | |
4509 | if (!node_online(my_node)) | |
4510 | my_node = mtip_get_next_rr_node(); | |
4511 | } else { | |
4512 | dev_info(&pdev->dev, "Kernel not reporting proximity, choosing a node\n"); | |
4513 | my_node = mtip_get_next_rr_node(); | |
4514 | } | |
4515 | dev_info(&pdev->dev, "NUMA node %d (closest: %d,%d, probe on %d:%d)\n", | |
4516 | my_node, pcibus_to_node(pdev->bus), dev_to_node(&pdev->dev), | |
7f328908 | 4517 | cpu_to_node(raw_smp_processor_id()), raw_smp_processor_id()); |
16c906e5 AT |
4518 | |
4519 | dd = kzalloc_node(sizeof(struct driver_data), GFP_KERNEL, my_node); | |
88523a61 SB |
4520 | if (dd == NULL) { |
4521 | dev_err(&pdev->dev, | |
4522 | "Unable to allocate memory for driver data\n"); | |
4523 | return -ENOMEM; | |
4524 | } | |
4525 | ||
88523a61 SB |
4526 | /* Attach the private data to this PCI device. */ |
4527 | pci_set_drvdata(pdev, dd); | |
4528 | ||
4529 | rv = pcim_enable_device(pdev); | |
4530 | if (rv < 0) { | |
4531 | dev_err(&pdev->dev, "Unable to enable device\n"); | |
4532 | goto iomap_err; | |
4533 | } | |
4534 | ||
4535 | /* Map BAR5 to memory. */ | |
4536 | rv = pcim_iomap_regions(pdev, 1 << MTIP_ABAR, MTIP_DRV_NAME); | |
4537 | if (rv < 0) { | |
4538 | dev_err(&pdev->dev, "Unable to map regions\n"); | |
4539 | goto iomap_err; | |
4540 | } | |
4541 | ||
4542 | if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(64))) { | |
4543 | rv = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64)); | |
4544 | ||
4545 | if (rv) { | |
4546 | rv = pci_set_consistent_dma_mask(pdev, | |
4547 | DMA_BIT_MASK(32)); | |
4548 | if (rv) { | |
4549 | dev_warn(&pdev->dev, | |
4550 | "64-bit DMA enable failed\n"); | |
4551 | goto setmask_err; | |
4552 | } | |
4553 | } | |
4554 | } | |
4555 | ||
16c906e5 AT |
4556 | /* Copy the info we may need later into the private data structure. */ |
4557 | dd->major = mtip_major; | |
4558 | dd->instance = instance; | |
4559 | dd->pdev = pdev; | |
4560 | dd->numa_node = my_node; | |
4561 | ||
0caff003 AT |
4562 | INIT_LIST_HEAD(&dd->online_list); |
4563 | INIT_LIST_HEAD(&dd->remove_list); | |
4564 | ||
16c906e5 AT |
4565 | memset(dd->workq_name, 0, 32); |
4566 | snprintf(dd->workq_name, 31, "mtipq%d", dd->instance); | |
88523a61 | 4567 | |
16c906e5 AT |
4568 | dd->isr_workq = create_workqueue(dd->workq_name); |
4569 | if (!dd->isr_workq) { | |
4570 | dev_warn(&pdev->dev, "Can't create wq %d\n", dd->instance); | |
d137c830 | 4571 | rv = -ENOMEM; |
16c906e5 AT |
4572 | goto block_initialize_err; |
4573 | } | |
4574 | ||
4575 | memset(cpu_list, 0, sizeof(cpu_list)); | |
4576 | ||
4577 | node_mask = cpumask_of_node(dd->numa_node); | |
4578 | if (!cpumask_empty(node_mask)) { | |
4579 | for_each_cpu(cpu, node_mask) | |
4580 | { | |
4581 | snprintf(&cpu_list[j], 256 - j, "%d ", cpu); | |
4582 | j = strlen(cpu_list); | |
4583 | } | |
4584 | ||
4585 | dev_info(&pdev->dev, "Node %d on package %d has %d cpu(s): %s\n", | |
4586 | dd->numa_node, | |
4587 | topology_physical_package_id(cpumask_first(node_mask)), | |
4588 | nr_cpus_node(dd->numa_node), | |
4589 | cpu_list); | |
4590 | } else | |
4591 | dev_dbg(&pdev->dev, "mtip32xx: node_mask empty\n"); | |
4592 | ||
4593 | dd->isr_binding = get_least_used_cpu_on_node(dd->numa_node); | |
4594 | dev_info(&pdev->dev, "Initial IRQ binding node:cpu %d:%d\n", | |
4595 | cpu_to_node(dd->isr_binding), dd->isr_binding); | |
4596 | ||
4597 | /* first worker context always runs in ISR */ | |
4598 | dd->work[0].cpu_binding = dd->isr_binding; | |
4599 | dd->work[1].cpu_binding = get_least_used_cpu_on_node(dd->numa_node); | |
4600 | dd->work[2].cpu_binding = get_least_used_cpu_on_node(dd->numa_node); | |
4601 | dd->work[3].cpu_binding = dd->work[0].cpu_binding; | |
4602 | dd->work[4].cpu_binding = dd->work[1].cpu_binding; | |
4603 | dd->work[5].cpu_binding = dd->work[2].cpu_binding; | |
4604 | dd->work[6].cpu_binding = dd->work[2].cpu_binding; | |
4605 | dd->work[7].cpu_binding = dd->work[1].cpu_binding; | |
4606 | ||
4607 | /* Log the bindings */ | |
4608 | for_each_present_cpu(cpu) { | |
4609 | memset(cpu_list, 0, sizeof(cpu_list)); | |
4610 | for (i = 0, j = 0; i < MTIP_MAX_SLOT_GROUPS; i++) { | |
4611 | if (dd->work[i].cpu_binding == cpu) { | |
4612 | snprintf(&cpu_list[j], 256 - j, "%d ", i); | |
4613 | j = strlen(cpu_list); | |
4614 | } | |
4615 | } | |
4616 | if (j) | |
4617 | dev_info(&pdev->dev, "CPU %d: WQs %s\n", cpu, cpu_list); | |
4618 | } | |
4619 | ||
4620 | INIT_WORK(&dd->work[0].work, mtip_workq_sdbf0); | |
4621 | INIT_WORK(&dd->work[1].work, mtip_workq_sdbf1); | |
4622 | INIT_WORK(&dd->work[2].work, mtip_workq_sdbf2); | |
4623 | INIT_WORK(&dd->work[3].work, mtip_workq_sdbf3); | |
4624 | INIT_WORK(&dd->work[4].work, mtip_workq_sdbf4); | |
4625 | INIT_WORK(&dd->work[5].work, mtip_workq_sdbf5); | |
4626 | INIT_WORK(&dd->work[6].work, mtip_workq_sdbf6); | |
4627 | INIT_WORK(&dd->work[7].work, mtip_workq_sdbf7); | |
4628 | ||
4629 | pci_set_master(pdev); | |
d137c830 WY |
4630 | rv = pci_enable_msi(pdev); |
4631 | if (rv) { | |
88523a61 SB |
4632 | dev_warn(&pdev->dev, |
4633 | "Unable to enable MSI interrupt.\n"); | |
cf91f39b | 4634 | goto msi_initialize_err; |
88523a61 SB |
4635 | } |
4636 | ||
88523a61 SB |
4637 | /* Initialize the block layer. */ |
4638 | rv = mtip_block_initialize(dd); | |
4639 | if (rv < 0) { | |
4640 | dev_err(&pdev->dev, | |
4641 | "Unable to initialize block layer\n"); | |
4642 | goto block_initialize_err; | |
4643 | } | |
4644 | ||
4645 | /* | |
4646 | * Increment the instance count so that each device has a unique | |
4647 | * instance number. | |
4648 | */ | |
4649 | instance++; | |
45038367 | 4650 | if (rv != MTIP_FTL_REBUILD_MAGIC) |
8a857a88 | 4651 | set_bit(MTIP_DDF_INIT_DONE_BIT, &dd->dd_flag); |
6b06d35f AT |
4652 | else |
4653 | rv = 0; /* device in rebuild state, return 0 from probe */ | |
0caff003 AT |
4654 | |
4655 | /* Add to online list even if in ftl rebuild */ | |
4656 | spin_lock_irqsave(&dev_lock, flags); | |
4657 | list_add(&dd->online_list, &online_list); | |
4658 | spin_unlock_irqrestore(&dev_lock, flags); | |
4659 | ||
88523a61 SB |
4660 | goto done; |
4661 | ||
4662 | block_initialize_err: | |
4663 | pci_disable_msi(pdev); | |
cf91f39b AG |
4664 | |
4665 | msi_initialize_err: | |
16c906e5 AT |
4666 | if (dd->isr_workq) { |
4667 | flush_workqueue(dd->isr_workq); | |
4668 | destroy_workqueue(dd->isr_workq); | |
4669 | drop_cpu(dd->work[0].cpu_binding); | |
4670 | drop_cpu(dd->work[1].cpu_binding); | |
4671 | drop_cpu(dd->work[2].cpu_binding); | |
4672 | } | |
88523a61 SB |
4673 | setmask_err: |
4674 | pcim_iounmap_regions(pdev, 1 << MTIP_ABAR); | |
4675 | ||
4676 | iomap_err: | |
4677 | kfree(dd); | |
4678 | pci_set_drvdata(pdev, NULL); | |
4679 | return rv; | |
4680 | done: | |
88523a61 SB |
4681 | return rv; |
4682 | } | |
4683 | ||
4684 | /* | |
4685 | * Called for each probed device when the device is removed or the | |
4686 | * driver is unloaded. | |
4687 | * | |
4688 | * return value | |
4689 | * None | |
4690 | */ | |
4691 | static void mtip_pci_remove(struct pci_dev *pdev) | |
4692 | { | |
4693 | struct driver_data *dd = pci_get_drvdata(pdev); | |
8f8b8995 | 4694 | unsigned long flags, to; |
88523a61 | 4695 | |
8a857a88 | 4696 | set_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag); |
45038367 | 4697 | |
0caff003 AT |
4698 | spin_lock_irqsave(&dev_lock, flags); |
4699 | list_del_init(&dd->online_list); | |
4700 | list_add(&dd->remove_list, &removing_list); | |
4701 | spin_unlock_irqrestore(&dev_lock, flags); | |
4702 | ||
8f8b8995 AT |
4703 | mtip_check_surprise_removal(pdev); |
4704 | synchronize_irq(dd->pdev->irq); | |
4705 | ||
4706 | /* Spin until workers are done */ | |
4707 | to = jiffies + msecs_to_jiffies(4000); | |
4708 | do { | |
4709 | msleep(20); | |
4710 | } while (atomic_read(&dd->irq_workers_active) != 0 && | |
4711 | time_before(jiffies, to)); | |
4712 | ||
4713 | if (atomic_read(&dd->irq_workers_active) != 0) { | |
4714 | dev_warn(&dd->pdev->dev, | |
4715 | "Completion workers still active!\n"); | |
88523a61 | 4716 | } |
8f8b8995 AT |
4717 | /* Cleanup the outstanding commands */ |
4718 | mtip_command_cleanup(dd); | |
88523a61 SB |
4719 | |
4720 | /* Clean up the block layer. */ | |
4721 | mtip_block_remove(dd); | |
4722 | ||
16c906e5 AT |
4723 | if (dd->isr_workq) { |
4724 | flush_workqueue(dd->isr_workq); | |
4725 | destroy_workqueue(dd->isr_workq); | |
4726 | drop_cpu(dd->work[0].cpu_binding); | |
4727 | drop_cpu(dd->work[1].cpu_binding); | |
4728 | drop_cpu(dd->work[2].cpu_binding); | |
4729 | } | |
4730 | ||
88523a61 SB |
4731 | pci_disable_msi(pdev); |
4732 | ||
0caff003 AT |
4733 | spin_lock_irqsave(&dev_lock, flags); |
4734 | list_del_init(&dd->remove_list); | |
4735 | spin_unlock_irqrestore(&dev_lock, flags); | |
4736 | ||
8f8b8995 AT |
4737 | if (!dd->sr) |
4738 | kfree(dd); | |
4739 | else | |
4740 | set_bit(MTIP_DDF_REMOVE_DONE_BIT, &dd->dd_flag); | |
4741 | ||
88523a61 | 4742 | pcim_iounmap_regions(pdev, 1 << MTIP_ABAR); |
8f8b8995 AT |
4743 | pci_set_drvdata(pdev, NULL); |
4744 | pci_dev_put(pdev); | |
4745 | ||
88523a61 SB |
4746 | } |
4747 | ||
4748 | /* | |
4749 | * Called for each probed device when the device is suspended. | |
4750 | * | |
4751 | * return value | |
4752 | * 0 Success | |
4753 | * <0 Error | |
4754 | */ | |
4755 | static int mtip_pci_suspend(struct pci_dev *pdev, pm_message_t mesg) | |
4756 | { | |
4757 | int rv = 0; | |
4758 | struct driver_data *dd = pci_get_drvdata(pdev); | |
4759 | ||
4760 | if (!dd) { | |
4761 | dev_err(&pdev->dev, | |
4762 | "Driver private datastructure is NULL\n"); | |
4763 | return -EFAULT; | |
4764 | } | |
4765 | ||
8a857a88 | 4766 | set_bit(MTIP_DDF_RESUME_BIT, &dd->dd_flag); |
88523a61 SB |
4767 | |
4768 | /* Disable ports & interrupts then send standby immediate */ | |
4769 | rv = mtip_block_suspend(dd); | |
4770 | if (rv < 0) { | |
4771 | dev_err(&pdev->dev, | |
4772 | "Failed to suspend controller\n"); | |
4773 | return rv; | |
4774 | } | |
4775 | ||
4776 | /* | |
4777 | * Save the pci config space to pdev structure & | |
4778 | * disable the device | |
4779 | */ | |
4780 | pci_save_state(pdev); | |
4781 | pci_disable_device(pdev); | |
4782 | ||
4783 | /* Move to Low power state*/ | |
4784 | pci_set_power_state(pdev, PCI_D3hot); | |
4785 | ||
4786 | return rv; | |
4787 | } | |
4788 | ||
4789 | /* | |
4790 | * Called for each probed device when the device is resumed. | |
4791 | * | |
4792 | * return value | |
4793 | * 0 Success | |
4794 | * <0 Error | |
4795 | */ | |
4796 | static int mtip_pci_resume(struct pci_dev *pdev) | |
4797 | { | |
4798 | int rv = 0; | |
4799 | struct driver_data *dd; | |
4800 | ||
4801 | dd = pci_get_drvdata(pdev); | |
4802 | if (!dd) { | |
4803 | dev_err(&pdev->dev, | |
4804 | "Driver private datastructure is NULL\n"); | |
4805 | return -EFAULT; | |
4806 | } | |
4807 | ||
4808 | /* Move the device to active State */ | |
4809 | pci_set_power_state(pdev, PCI_D0); | |
4810 | ||
4811 | /* Restore PCI configuration space */ | |
4812 | pci_restore_state(pdev); | |
4813 | ||
4814 | /* Enable the PCI device*/ | |
4815 | rv = pcim_enable_device(pdev); | |
4816 | if (rv < 0) { | |
4817 | dev_err(&pdev->dev, | |
4818 | "Failed to enable card during resume\n"); | |
4819 | goto err; | |
4820 | } | |
4821 | pci_set_master(pdev); | |
4822 | ||
4823 | /* | |
4824 | * Calls hbaReset, initPort, & startPort function | |
4825 | * then enables interrupts | |
4826 | */ | |
4827 | rv = mtip_block_resume(dd); | |
4828 | if (rv < 0) | |
4829 | dev_err(&pdev->dev, "Unable to resume\n"); | |
4830 | ||
4831 | err: | |
8a857a88 | 4832 | clear_bit(MTIP_DDF_RESUME_BIT, &dd->dd_flag); |
88523a61 SB |
4833 | |
4834 | return rv; | |
4835 | } | |
4836 | ||
4837 | /* | |
4838 | * Shutdown routine | |
4839 | * | |
4840 | * return value | |
4841 | * None | |
4842 | */ | |
4843 | static void mtip_pci_shutdown(struct pci_dev *pdev) | |
4844 | { | |
4845 | struct driver_data *dd = pci_get_drvdata(pdev); | |
4846 | if (dd) | |
4847 | mtip_block_shutdown(dd); | |
4848 | } | |
4849 | ||
88523a61 SB |
4850 | /* Table of device ids supported by this driver. */ |
4851 | static DEFINE_PCI_DEVICE_TABLE(mtip_pci_tbl) = { | |
1a131458 AT |
4852 | { PCI_DEVICE(PCI_VENDOR_ID_MICRON, P320H_DEVICE_ID) }, |
4853 | { PCI_DEVICE(PCI_VENDOR_ID_MICRON, P320M_DEVICE_ID) }, | |
4854 | { PCI_DEVICE(PCI_VENDOR_ID_MICRON, P320S_DEVICE_ID) }, | |
4855 | { PCI_DEVICE(PCI_VENDOR_ID_MICRON, P325M_DEVICE_ID) }, | |
4856 | { PCI_DEVICE(PCI_VENDOR_ID_MICRON, P420H_DEVICE_ID) }, | |
4857 | { PCI_DEVICE(PCI_VENDOR_ID_MICRON, P420M_DEVICE_ID) }, | |
4858 | { PCI_DEVICE(PCI_VENDOR_ID_MICRON, P425M_DEVICE_ID) }, | |
88523a61 SB |
4859 | { 0 } |
4860 | }; | |
4861 | ||
4862 | /* Structure that describes the PCI driver functions. */ | |
3ff147d3 | 4863 | static struct pci_driver mtip_pci_driver = { |
88523a61 SB |
4864 | .name = MTIP_DRV_NAME, |
4865 | .id_table = mtip_pci_tbl, | |
4866 | .probe = mtip_pci_probe, | |
4867 | .remove = mtip_pci_remove, | |
4868 | .suspend = mtip_pci_suspend, | |
4869 | .resume = mtip_pci_resume, | |
4870 | .shutdown = mtip_pci_shutdown, | |
4871 | }; | |
4872 | ||
4873 | MODULE_DEVICE_TABLE(pci, mtip_pci_tbl); | |
4874 | ||
4875 | /* | |
4876 | * Module initialization function. | |
4877 | * | |
4878 | * Called once when the module is loaded. This function allocates a major | |
4879 | * block device number to the Cyclone devices and registers the PCI layer | |
4880 | * of the driver. | |
4881 | * | |
4882 | * Return value | |
4883 | * 0 on success else error code. | |
4884 | */ | |
4885 | static int __init mtip_init(void) | |
4886 | { | |
6d27f09a RS |
4887 | int error; |
4888 | ||
45422e74 | 4889 | pr_info(MTIP_DRV_NAME " Version " MTIP_DRV_VERSION "\n"); |
88523a61 | 4890 | |
0caff003 AT |
4891 | spin_lock_init(&dev_lock); |
4892 | ||
4893 | INIT_LIST_HEAD(&online_list); | |
4894 | INIT_LIST_HEAD(&removing_list); | |
4895 | ||
88523a61 | 4896 | /* Allocate a major block device number to use with this driver. */ |
6d27f09a RS |
4897 | error = register_blkdev(0, MTIP_DRV_NAME); |
4898 | if (error <= 0) { | |
45422e74 | 4899 | pr_err("Unable to register block device (%d)\n", |
6d27f09a | 4900 | error); |
88523a61 SB |
4901 | return -EBUSY; |
4902 | } | |
6d27f09a | 4903 | mtip_major = error; |
88523a61 | 4904 | |
0caff003 AT |
4905 | dfs_parent = debugfs_create_dir("rssd", NULL); |
4906 | if (IS_ERR_OR_NULL(dfs_parent)) { | |
4907 | pr_warn("Error creating debugfs parent\n"); | |
4908 | dfs_parent = NULL; | |
4909 | } | |
4910 | if (dfs_parent) { | |
4911 | dfs_device_status = debugfs_create_file("device_status", | |
4912 | S_IRUGO, dfs_parent, NULL, | |
4913 | &mtip_device_status_fops); | |
4914 | if (IS_ERR_OR_NULL(dfs_device_status)) { | |
4915 | pr_err("Error creating device_status node\n"); | |
4916 | dfs_device_status = NULL; | |
7b421d24 AT |
4917 | } |
4918 | } | |
4919 | ||
88523a61 | 4920 | /* Register our PCI operations. */ |
6d27f09a | 4921 | error = pci_register_driver(&mtip_pci_driver); |
7b421d24 AT |
4922 | if (error) { |
4923 | debugfs_remove(dfs_parent); | |
6d27f09a | 4924 | unregister_blkdev(mtip_major, MTIP_DRV_NAME); |
7b421d24 | 4925 | } |
6d27f09a RS |
4926 | |
4927 | return error; | |
88523a61 SB |
4928 | } |
4929 | ||
4930 | /* | |
4931 | * Module de-initialization function. | |
4932 | * | |
4933 | * Called once when the module is unloaded. This function deallocates | |
4934 | * the major block device number allocated by mtip_init() and | |
4935 | * unregisters the PCI layer of the driver. | |
4936 | * | |
4937 | * Return value | |
4938 | * none | |
4939 | */ | |
4940 | static void __exit mtip_exit(void) | |
4941 | { | |
7b421d24 AT |
4942 | debugfs_remove_recursive(dfs_parent); |
4943 | ||
88523a61 SB |
4944 | /* Release the allocated major block device number. */ |
4945 | unregister_blkdev(mtip_major, MTIP_DRV_NAME); | |
4946 | ||
4947 | /* Unregister the PCI driver. */ | |
4948 | pci_unregister_driver(&mtip_pci_driver); | |
4949 | } | |
4950 | ||
4951 | MODULE_AUTHOR("Micron Technology, Inc"); | |
4952 | MODULE_DESCRIPTION("Micron RealSSD PCIe Block Driver"); | |
4953 | MODULE_LICENSE("GPL"); | |
4954 | MODULE_VERSION(MTIP_DRV_VERSION); | |
4955 | ||
4956 | module_init(mtip_init); | |
4957 | module_exit(mtip_exit); |