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88523a61 SB |
1 | /* |
2 | * Driver for the Micron P320 SSD | |
3 | * Copyright (C) 2011 Micron Technology, Inc. | |
4 | * | |
5 | * Portions of this code were derived from works subjected to the | |
6 | * following copyright: | |
7 | * Copyright (C) 2009 Integrated Device Technology, Inc. | |
8 | * | |
9 | * This program is free software; you can redistribute it and/or modify | |
10 | * it under the terms of the GNU General Public License as published by | |
11 | * the Free Software Foundation; either version 2 of the License, or | |
12 | * (at your option) any later version. | |
13 | * | |
14 | * This program is distributed in the hope that it will be useful, | |
15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
17 | * GNU General Public License for more details. | |
18 | * | |
19 | */ | |
20 | ||
21 | #include <linux/pci.h> | |
22 | #include <linux/interrupt.h> | |
23 | #include <linux/ata.h> | |
24 | #include <linux/delay.h> | |
25 | #include <linux/hdreg.h> | |
26 | #include <linux/uaccess.h> | |
27 | #include <linux/random.h> | |
28 | #include <linux/smp.h> | |
29 | #include <linux/compat.h> | |
30 | #include <linux/fs.h> | |
0e838c62 | 31 | #include <linux/module.h> |
88523a61 SB |
32 | #include <linux/genhd.h> |
33 | #include <linux/blkdev.h> | |
ffc771b3 | 34 | #include <linux/blk-mq.h> |
88523a61 SB |
35 | #include <linux/bio.h> |
36 | #include <linux/dma-mapping.h> | |
37 | #include <linux/idr.h> | |
60ec0eec | 38 | #include <linux/kthread.h> |
88523a61 | 39 | #include <../drivers/ata/ahci.h> |
45038367 | 40 | #include <linux/export.h> |
7b421d24 | 41 | #include <linux/debugfs.h> |
f45c40a9 | 42 | #include <linux/prefetch.h> |
88523a61 SB |
43 | #include "mtip32xx.h" |
44 | ||
45 | #define HW_CMD_SLOT_SZ (MTIP_MAX_COMMAND_SLOTS * 32) | |
188b9f49 SB |
46 | |
47 | /* DMA region containing RX Fis, Identify, RLE10, and SMART buffers */ | |
48 | #define AHCI_RX_FIS_SZ 0x100 | |
49 | #define AHCI_RX_FIS_OFFSET 0x0 | |
50 | #define AHCI_IDFY_SZ ATA_SECT_SIZE | |
51 | #define AHCI_IDFY_OFFSET 0x400 | |
52 | #define AHCI_SECTBUF_SZ ATA_SECT_SIZE | |
53 | #define AHCI_SECTBUF_OFFSET 0x800 | |
54 | #define AHCI_SMARTBUF_SZ ATA_SECT_SIZE | |
55 | #define AHCI_SMARTBUF_OFFSET 0xC00 | |
56 | /* 0x100 + 0x200 + 0x200 + 0x200 is smaller than 4k but we pad it out */ | |
57 | #define BLOCK_DMA_ALLOC_SZ 4096 | |
58 | ||
59 | /* DMA region containing command table (should be 8192 bytes) */ | |
60 | #define AHCI_CMD_SLOT_SZ sizeof(struct mtip_cmd_hdr) | |
61 | #define AHCI_CMD_TBL_SZ (MTIP_MAX_COMMAND_SLOTS * AHCI_CMD_SLOT_SZ) | |
62 | #define AHCI_CMD_TBL_OFFSET 0x0 | |
63 | ||
64 | /* DMA region per command (contains header and SGL) */ | |
65 | #define AHCI_CMD_TBL_HDR_SZ 0x80 | |
66 | #define AHCI_CMD_TBL_HDR_OFFSET 0x0 | |
67 | #define AHCI_CMD_TBL_SGL_SZ (MTIP_MAX_SG * sizeof(struct mtip_cmd_sg)) | |
68 | #define AHCI_CMD_TBL_SGL_OFFSET AHCI_CMD_TBL_HDR_SZ | |
69 | #define CMD_DMA_ALLOC_SZ (AHCI_CMD_TBL_SGL_SZ + AHCI_CMD_TBL_HDR_SZ) | |
70 | ||
88523a61 | 71 | |
45038367 | 72 | #define HOST_CAP_NZDMA (1 << 19) |
88523a61 SB |
73 | #define HOST_HSORG 0xFC |
74 | #define HSORG_DISABLE_SLOTGRP_INTR (1<<24) | |
75 | #define HSORG_DISABLE_SLOTGRP_PXIS (1<<16) | |
76 | #define HSORG_HWREV 0xFF00 | |
77 | #define HSORG_STYLE 0x8 | |
78 | #define HSORG_SLOTGROUPS 0x7 | |
79 | ||
80 | #define PORT_COMMAND_ISSUE 0x38 | |
81 | #define PORT_SDBV 0x7C | |
82 | ||
83 | #define PORT_OFFSET 0x100 | |
84 | #define PORT_MEM_SIZE 0x80 | |
85 | ||
86 | #define PORT_IRQ_ERR \ | |
87 | (PORT_IRQ_HBUS_ERR | PORT_IRQ_IF_ERR | PORT_IRQ_CONNECT | \ | |
88 | PORT_IRQ_PHYRDY | PORT_IRQ_UNK_FIS | PORT_IRQ_BAD_PMP | \ | |
89 | PORT_IRQ_TF_ERR | PORT_IRQ_HBUS_DATA_ERR | PORT_IRQ_IF_NONFATAL | \ | |
90 | PORT_IRQ_OVERFLOW) | |
91 | #define PORT_IRQ_LEGACY \ | |
92 | (PORT_IRQ_PIOS_FIS | PORT_IRQ_D2H_REG_FIS) | |
93 | #define PORT_IRQ_HANDLED \ | |
94 | (PORT_IRQ_SDB_FIS | PORT_IRQ_LEGACY | \ | |
95 | PORT_IRQ_TF_ERR | PORT_IRQ_IF_ERR | \ | |
96 | PORT_IRQ_CONNECT | PORT_IRQ_PHYRDY) | |
97 | #define DEF_PORT_IRQ \ | |
98 | (PORT_IRQ_ERR | PORT_IRQ_LEGACY | PORT_IRQ_SDB_FIS) | |
99 | ||
100 | /* product numbers */ | |
101 | #define MTIP_PRODUCT_UNKNOWN 0x00 | |
102 | #define MTIP_PRODUCT_ASICFPGA 0x11 | |
103 | ||
104 | /* Device instance number, incremented each time a device is probed. */ | |
105 | static int instance; | |
106 | ||
9e35fdcb ZY |
107 | static struct list_head online_list; |
108 | static struct list_head removing_list; | |
109 | static spinlock_t dev_lock; | |
0caff003 | 110 | |
88523a61 SB |
111 | /* |
112 | * Global variable used to hold the major block device number | |
113 | * allocated in mtip_init(). | |
114 | */ | |
3ff147d3 | 115 | static int mtip_major; |
7b421d24 | 116 | static struct dentry *dfs_parent; |
0caff003 | 117 | static struct dentry *dfs_device_status; |
88523a61 | 118 | |
16c906e5 AT |
119 | static u32 cpu_use[NR_CPUS]; |
120 | ||
88523a61 SB |
121 | static DEFINE_SPINLOCK(rssd_index_lock); |
122 | static DEFINE_IDA(rssd_index_ida); | |
123 | ||
62ee8c13 AT |
124 | static int mtip_block_initialize(struct driver_data *dd); |
125 | ||
16d02c04 | 126 | #ifdef CONFIG_COMPAT |
88523a61 SB |
127 | struct mtip_compat_ide_task_request_s { |
128 | __u8 io_ports[8]; | |
129 | __u8 hob_ports[8]; | |
130 | ide_reg_valid_t out_flags; | |
131 | ide_reg_valid_t in_flags; | |
132 | int data_phase; | |
133 | int req_cmd; | |
134 | compat_ulong_t out_size; | |
135 | compat_ulong_t in_size; | |
136 | }; | |
16d02c04 | 137 | #endif |
88523a61 | 138 | |
6316668f JA |
139 | /* |
140 | * This function check_for_surprise_removal is called | |
141 | * while card is removed from the system and it will | |
142 | * read the vendor id from the configration space | |
143 | * | |
144 | * @pdev Pointer to the pci_dev structure. | |
145 | * | |
146 | * return value | |
147 | * true if device removed, else false | |
148 | */ | |
149 | static bool mtip_check_surprise_removal(struct pci_dev *pdev) | |
150 | { | |
151 | u16 vendor_id = 0; | |
8f8b8995 AT |
152 | struct driver_data *dd = pci_get_drvdata(pdev); |
153 | ||
154 | if (dd->sr) | |
155 | return true; | |
6316668f JA |
156 | |
157 | /* Read the vendorID from the configuration space */ | |
158 | pci_read_config_word(pdev, 0x00, &vendor_id); | |
8f8b8995 AT |
159 | if (vendor_id == 0xFFFF) { |
160 | dd->sr = true; | |
161 | if (dd->queue) | |
162 | set_bit(QUEUE_FLAG_DEAD, &dd->queue->queue_flags); | |
163 | else | |
164 | dev_warn(&dd->pdev->dev, | |
165 | "%s: dd->queue is NULL\n", __func__); | |
6316668f | 166 | return true; /* device removed */ |
6316668f JA |
167 | } |
168 | ||
8f8b8995 | 169 | return false; /* device present */ |
6316668f JA |
170 | } |
171 | ||
a4e84aae ML |
172 | /* we have to use runtime tag to setup command header */ |
173 | static void mtip_init_cmd_header(struct request *rq) | |
174 | { | |
175 | struct driver_data *dd = rq->q->queuedata; | |
176 | struct mtip_cmd *cmd = blk_mq_rq_to_pdu(rq); | |
177 | u32 host_cap_64 = readl(dd->mmio + HOST_CAP) & HOST_CAP_64; | |
178 | ||
179 | /* Point the command headers at the command tables. */ | |
180 | cmd->command_header = dd->port->command_list + | |
181 | (sizeof(struct mtip_cmd_hdr) * rq->tag); | |
182 | cmd->command_header_dma = dd->port->command_list_dma + | |
183 | (sizeof(struct mtip_cmd_hdr) * rq->tag); | |
184 | ||
185 | if (host_cap_64) | |
186 | cmd->command_header->ctbau = __force_bit2int cpu_to_le32((cmd->command_dma >> 16) >> 16); | |
187 | ||
188 | cmd->command_header->ctba = __force_bit2int cpu_to_le32(cmd->command_dma & 0xFFFFFFFF); | |
189 | } | |
190 | ||
ffc771b3 | 191 | static struct mtip_cmd *mtip_get_int_command(struct driver_data *dd) |
88523a61 | 192 | { |
ffc771b3 | 193 | struct request *rq; |
88523a61 | 194 | |
008e56d2 ATS |
195 | if (mtip_check_surprise_removal(dd->pdev)) |
196 | return NULL; | |
197 | ||
6f3b0e8b | 198 | rq = blk_mq_alloc_request(dd->queue, 0, BLK_MQ_REQ_RESERVED); |
008e56d2 ATS |
199 | if (IS_ERR(rq)) |
200 | return NULL; | |
201 | ||
a4e84aae ML |
202 | /* Internal cmd isn't submitted via .queue_rq */ |
203 | mtip_init_cmd_header(rq); | |
204 | ||
ffc771b3 JA |
205 | return blk_mq_rq_to_pdu(rq); |
206 | } | |
88523a61 | 207 | |
ffc771b3 JA |
208 | static void mtip_put_int_command(struct driver_data *dd, struct mtip_cmd *cmd) |
209 | { | |
210 | blk_put_request(blk_mq_rq_from_pdu(cmd)); | |
88523a61 SB |
211 | } |
212 | ||
213 | /* | |
ffc771b3 | 214 | * Once we add support for one hctx per mtip group, this will change a bit |
88523a61 | 215 | */ |
ffc771b3 JA |
216 | static struct request *mtip_rq_from_tag(struct driver_data *dd, |
217 | unsigned int tag) | |
218 | { | |
0e62f51f JA |
219 | struct blk_mq_hw_ctx *hctx = dd->queue->queue_hw_ctx[0]; |
220 | ||
221 | return blk_mq_tag_to_rq(hctx->tags, tag); | |
ffc771b3 JA |
222 | } |
223 | ||
224 | static struct mtip_cmd *mtip_cmd_from_tag(struct driver_data *dd, | |
225 | unsigned int tag) | |
88523a61 | 226 | { |
ffc771b3 JA |
227 | struct request *rq = mtip_rq_from_tag(dd, tag); |
228 | ||
229 | return blk_mq_rq_to_pdu(rq); | |
88523a61 SB |
230 | } |
231 | ||
8f8b8995 AT |
232 | /* |
233 | * IO completion function. | |
234 | * | |
235 | * This completion function is called by the driver ISR when a | |
236 | * command that was issued by the kernel completes. It first calls the | |
237 | * asynchronous completion function which normally calls back into the block | |
238 | * layer passing the asynchronous callback data, then unmaps the | |
239 | * scatter list associated with the completed command, and finally | |
240 | * clears the allocated bit associated with the completed command. | |
241 | * | |
242 | * @port Pointer to the port data structure. | |
243 | * @tag Tag of the command. | |
244 | * @data Pointer to driver_data. | |
245 | * @status Completion status. | |
246 | * | |
247 | * return value | |
248 | * None | |
249 | */ | |
250 | static void mtip_async_complete(struct mtip_port *port, | |
ffc771b3 | 251 | int tag, struct mtip_cmd *cmd, int status) |
8f8b8995 | 252 | { |
ffc771b3 JA |
253 | struct driver_data *dd = port->dd; |
254 | struct request *rq; | |
8f8b8995 AT |
255 | |
256 | if (unlikely(!dd) || unlikely(!port)) | |
257 | return; | |
258 | ||
8f8b8995 AT |
259 | if (unlikely(status == PORT_IRQ_TF_ERR)) { |
260 | dev_warn(&port->dd->pdev->dev, | |
261 | "Command tag %d failed due to TFE\n", tag); | |
262 | } | |
263 | ||
ffc771b3 | 264 | rq = mtip_rq_from_tag(dd, tag); |
8f8b8995 | 265 | |
4dda4735 | 266 | cmd->status = status; |
08e0029a | 267 | blk_mq_complete_request(rq); |
8f8b8995 AT |
268 | } |
269 | ||
88523a61 | 270 | /* |
6316668f | 271 | * Reset the HBA (without sleeping) |
88523a61 | 272 | * |
6316668f | 273 | * @dd Pointer to the driver data structure. |
88523a61 SB |
274 | * |
275 | * return value | |
6316668f JA |
276 | * 0 The reset was successful. |
277 | * -1 The HBA Reset bit did not clear. | |
88523a61 | 278 | */ |
d0d096b1 | 279 | static int mtip_hba_reset(struct driver_data *dd) |
88523a61 | 280 | { |
6316668f | 281 | unsigned long timeout; |
88523a61 | 282 | |
6316668f JA |
283 | /* Set the reset bit */ |
284 | writel(HOST_RESET, dd->mmio + HOST_CTL); | |
88523a61 | 285 | |
6316668f JA |
286 | /* Flush */ |
287 | readl(dd->mmio + HOST_CTL); | |
88523a61 | 288 | |
2f17d71d ATS |
289 | /* |
290 | * Spin for up to 10 seconds waiting for reset acknowledgement. Spec | |
291 | * is 1 sec but in LUN failure conditions, up to 10 secs are required | |
292 | */ | |
293 | timeout = jiffies + msecs_to_jiffies(10000); | |
d0d096b1 AT |
294 | do { |
295 | mdelay(10); | |
296 | if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag)) | |
297 | return -1; | |
88523a61 | 298 | |
d0d096b1 AT |
299 | } while ((readl(dd->mmio + HOST_CTL) & HOST_RESET) |
300 | && time_before(jiffies, timeout)); | |
45038367 | 301 | |
6316668f JA |
302 | if (readl(dd->mmio + HOST_CTL) & HOST_RESET) |
303 | return -1; | |
88523a61 | 304 | |
6316668f | 305 | return 0; |
88523a61 SB |
306 | } |
307 | ||
308 | /* | |
6316668f | 309 | * Issue a command to the hardware. |
88523a61 | 310 | * |
6316668f JA |
311 | * Set the appropriate bit in the s_active and Command Issue hardware |
312 | * registers, causing hardware command processing to begin. | |
88523a61 | 313 | * |
6316668f JA |
314 | * @port Pointer to the port structure. |
315 | * @tag The tag of the command to be issued. | |
88523a61 SB |
316 | * |
317 | * return value | |
6316668f | 318 | * None |
88523a61 | 319 | */ |
6316668f | 320 | static inline void mtip_issue_ncq_command(struct mtip_port *port, int tag) |
88523a61 | 321 | { |
16c906e5 | 322 | int group = tag >> 5; |
88523a61 | 323 | |
16c906e5 AT |
324 | /* guard SACT and CI registers */ |
325 | spin_lock(&port->cmd_issue_lock[group]); | |
6316668f JA |
326 | writel((1 << MTIP_TAG_BIT(tag)), |
327 | port->s_active[MTIP_TAG_INDEX(tag)]); | |
328 | writel((1 << MTIP_TAG_BIT(tag)), | |
329 | port->cmd_issue[MTIP_TAG_INDEX(tag)]); | |
16c906e5 | 330 | spin_unlock(&port->cmd_issue_lock[group]); |
88523a61 SB |
331 | } |
332 | ||
333 | /* | |
334 | * Enable/disable the reception of FIS | |
335 | * | |
336 | * @port Pointer to the port data structure | |
337 | * @enable 1 to enable, 0 to disable | |
338 | * | |
339 | * return value | |
340 | * Previous state: 1 enabled, 0 disabled | |
341 | */ | |
342 | static int mtip_enable_fis(struct mtip_port *port, int enable) | |
343 | { | |
344 | u32 tmp; | |
345 | ||
346 | /* enable FIS reception */ | |
347 | tmp = readl(port->mmio + PORT_CMD); | |
348 | if (enable) | |
349 | writel(tmp | PORT_CMD_FIS_RX, port->mmio + PORT_CMD); | |
350 | else | |
351 | writel(tmp & ~PORT_CMD_FIS_RX, port->mmio + PORT_CMD); | |
352 | ||
353 | /* Flush */ | |
354 | readl(port->mmio + PORT_CMD); | |
355 | ||
356 | return (((tmp & PORT_CMD_FIS_RX) == PORT_CMD_FIS_RX)); | |
357 | } | |
358 | ||
359 | /* | |
360 | * Enable/disable the DMA engine | |
361 | * | |
362 | * @port Pointer to the port data structure | |
363 | * @enable 1 to enable, 0 to disable | |
364 | * | |
365 | * return value | |
366 | * Previous state: 1 enabled, 0 disabled. | |
367 | */ | |
368 | static int mtip_enable_engine(struct mtip_port *port, int enable) | |
369 | { | |
370 | u32 tmp; | |
371 | ||
372 | /* enable FIS reception */ | |
373 | tmp = readl(port->mmio + PORT_CMD); | |
374 | if (enable) | |
375 | writel(tmp | PORT_CMD_START, port->mmio + PORT_CMD); | |
376 | else | |
377 | writel(tmp & ~PORT_CMD_START, port->mmio + PORT_CMD); | |
378 | ||
379 | readl(port->mmio + PORT_CMD); | |
380 | return (((tmp & PORT_CMD_START) == PORT_CMD_START)); | |
381 | } | |
382 | ||
383 | /* | |
384 | * Enables the port DMA engine and FIS reception. | |
385 | * | |
386 | * return value | |
387 | * None | |
388 | */ | |
389 | static inline void mtip_start_port(struct mtip_port *port) | |
390 | { | |
391 | /* Enable FIS reception */ | |
392 | mtip_enable_fis(port, 1); | |
393 | ||
394 | /* Enable the DMA engine */ | |
395 | mtip_enable_engine(port, 1); | |
396 | } | |
397 | ||
398 | /* | |
399 | * Deinitialize a port by disabling port interrupts, the DMA engine, | |
400 | * and FIS reception. | |
401 | * | |
402 | * @port Pointer to the port structure | |
403 | * | |
404 | * return value | |
405 | * None | |
406 | */ | |
407 | static inline void mtip_deinit_port(struct mtip_port *port) | |
408 | { | |
409 | /* Disable interrupts on this port */ | |
410 | writel(0, port->mmio + PORT_IRQ_MASK); | |
411 | ||
412 | /* Disable the DMA engine */ | |
413 | mtip_enable_engine(port, 0); | |
414 | ||
415 | /* Disable FIS reception */ | |
416 | mtip_enable_fis(port, 0); | |
417 | } | |
418 | ||
419 | /* | |
420 | * Initialize a port. | |
421 | * | |
422 | * This function deinitializes the port by calling mtip_deinit_port() and | |
423 | * then initializes it by setting the command header and RX FIS addresses, | |
424 | * clearing the SError register and any pending port interrupts before | |
425 | * re-enabling the default set of port interrupts. | |
426 | * | |
427 | * @port Pointer to the port structure. | |
428 | * | |
429 | * return value | |
430 | * None | |
431 | */ | |
432 | static void mtip_init_port(struct mtip_port *port) | |
433 | { | |
434 | int i; | |
435 | mtip_deinit_port(port); | |
436 | ||
437 | /* Program the command list base and FIS base addresses */ | |
438 | if (readl(port->dd->mmio + HOST_CAP) & HOST_CAP_64) { | |
439 | writel((port->command_list_dma >> 16) >> 16, | |
440 | port->mmio + PORT_LST_ADDR_HI); | |
441 | writel((port->rxfis_dma >> 16) >> 16, | |
442 | port->mmio + PORT_FIS_ADDR_HI); | |
443 | } | |
444 | ||
60ec0eec | 445 | writel(port->command_list_dma & 0xFFFFFFFF, |
88523a61 | 446 | port->mmio + PORT_LST_ADDR); |
60ec0eec | 447 | writel(port->rxfis_dma & 0xFFFFFFFF, port->mmio + PORT_FIS_ADDR); |
88523a61 SB |
448 | |
449 | /* Clear SError */ | |
450 | writel(readl(port->mmio + PORT_SCR_ERR), port->mmio + PORT_SCR_ERR); | |
451 | ||
6316668f JA |
452 | /* reset the completed registers.*/ |
453 | for (i = 0; i < port->dd->slot_groups; i++) | |
454 | writel(0xFFFFFFFF, port->completed[i]); | |
88523a61 | 455 | |
6316668f | 456 | /* Clear any pending interrupts for this port */ |
6bb688c0 | 457 | writel(readl(port->mmio + PORT_IRQ_STAT), port->mmio + PORT_IRQ_STAT); |
88523a61 | 458 | |
22be2e6e AT |
459 | /* Clear any pending interrupts on the HBA. */ |
460 | writel(readl(port->dd->mmio + HOST_IRQ_STAT), | |
461 | port->dd->mmio + HOST_IRQ_STAT); | |
462 | ||
6316668f JA |
463 | /* Enable port interrupts */ |
464 | writel(DEF_PORT_IRQ, port->mmio + PORT_IRQ_MASK); | |
88523a61 SB |
465 | } |
466 | ||
467 | /* | |
468 | * Restart a port | |
469 | * | |
470 | * @port Pointer to the port data structure. | |
471 | * | |
472 | * return value | |
473 | * None | |
474 | */ | |
6316668f | 475 | static void mtip_restart_port(struct mtip_port *port) |
88523a61 SB |
476 | { |
477 | unsigned long timeout; | |
478 | ||
479 | /* Disable the DMA engine */ | |
480 | mtip_enable_engine(port, 0); | |
481 | ||
482 | /* Chip quirk: wait up to 500ms for PxCMD.CR == 0 */ | |
483 | timeout = jiffies + msecs_to_jiffies(500); | |
484 | while ((readl(port->mmio + PORT_CMD) & PORT_CMD_LIST_ON) | |
485 | && time_before(jiffies, timeout)) | |
486 | ; | |
487 | ||
8a857a88 | 488 | if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &port->dd->dd_flag)) |
45038367 AT |
489 | return; |
490 | ||
88523a61 SB |
491 | /* |
492 | * Chip quirk: escalate to hba reset if | |
493 | * PxCMD.CR not clear after 500 ms | |
494 | */ | |
495 | if (readl(port->mmio + PORT_CMD) & PORT_CMD_LIST_ON) { | |
496 | dev_warn(&port->dd->pdev->dev, | |
497 | "PxCMD.CR not clear, escalating reset\n"); | |
498 | ||
d0d096b1 | 499 | if (mtip_hba_reset(port->dd)) |
88523a61 SB |
500 | dev_err(&port->dd->pdev->dev, |
501 | "HBA reset escalation failed.\n"); | |
502 | ||
503 | /* 30 ms delay before com reset to quiesce chip */ | |
504 | mdelay(30); | |
505 | } | |
506 | ||
507 | dev_warn(&port->dd->pdev->dev, "Issuing COM reset\n"); | |
508 | ||
509 | /* Set PxSCTL.DET */ | |
510 | writel(readl(port->mmio + PORT_SCR_CTL) | | |
511 | 1, port->mmio + PORT_SCR_CTL); | |
512 | readl(port->mmio + PORT_SCR_CTL); | |
513 | ||
514 | /* Wait 1 ms to quiesce chip function */ | |
515 | timeout = jiffies + msecs_to_jiffies(1); | |
516 | while (time_before(jiffies, timeout)) | |
517 | ; | |
518 | ||
8a857a88 | 519 | if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &port->dd->dd_flag)) |
45038367 AT |
520 | return; |
521 | ||
88523a61 SB |
522 | /* Clear PxSCTL.DET */ |
523 | writel(readl(port->mmio + PORT_SCR_CTL) & ~1, | |
524 | port->mmio + PORT_SCR_CTL); | |
525 | readl(port->mmio + PORT_SCR_CTL); | |
526 | ||
527 | /* Wait 500 ms for bit 0 of PORT_SCR_STS to be set */ | |
528 | timeout = jiffies + msecs_to_jiffies(500); | |
529 | while (((readl(port->mmio + PORT_SCR_STAT) & 0x01) == 0) | |
530 | && time_before(jiffies, timeout)) | |
531 | ; | |
532 | ||
8a857a88 | 533 | if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &port->dd->dd_flag)) |
45038367 AT |
534 | return; |
535 | ||
88523a61 SB |
536 | if ((readl(port->mmio + PORT_SCR_STAT) & 0x01) == 0) |
537 | dev_warn(&port->dd->pdev->dev, | |
538 | "COM reset failed\n"); | |
539 | ||
22be2e6e AT |
540 | mtip_init_port(port); |
541 | mtip_start_port(port); | |
88523a61 | 542 | |
88523a61 SB |
543 | } |
544 | ||
d0d096b1 AT |
545 | static int mtip_device_reset(struct driver_data *dd) |
546 | { | |
547 | int rv = 0; | |
548 | ||
549 | if (mtip_check_surprise_removal(dd->pdev)) | |
550 | return 0; | |
551 | ||
552 | if (mtip_hba_reset(dd) < 0) | |
553 | rv = -EFAULT; | |
554 | ||
555 | mdelay(1); | |
556 | mtip_init_port(dd->port); | |
557 | mtip_start_port(dd->port); | |
558 | ||
559 | /* Enable interrupts on the HBA. */ | |
560 | writel(readl(dd->mmio + HOST_CTL) | HOST_IRQ_EN, | |
561 | dd->mmio + HOST_CTL); | |
562 | return rv; | |
563 | } | |
564 | ||
95fea2f1 AT |
565 | /* |
566 | * Helper function for tag logging | |
567 | */ | |
568 | static void print_tags(struct driver_data *dd, | |
569 | char *msg, | |
570 | unsigned long *tagbits, | |
571 | int cnt) | |
572 | { | |
573 | unsigned char tagmap[128]; | |
574 | int group, tagmap_len = 0; | |
575 | ||
576 | memset(tagmap, 0, sizeof(tagmap)); | |
577 | for (group = SLOTBITS_IN_LONGS; group > 0; group--) | |
ffc771b3 | 578 | tagmap_len += sprintf(tagmap + tagmap_len, "%016lX ", |
95fea2f1 AT |
579 | tagbits[group-1]); |
580 | dev_warn(&dd->pdev->dev, | |
581 | "%d command(s) %s: tagmap [%s]", cnt, msg, tagmap); | |
582 | } | |
583 | ||
6316668f JA |
584 | /* |
585 | * Internal command completion callback function. | |
586 | * | |
587 | * This function is normally called by the driver ISR when an internal | |
588 | * command completed. This function signals the command completion by | |
589 | * calling complete(). | |
590 | * | |
591 | * @port Pointer to the port data structure. | |
592 | * @tag Tag of the command that has completed. | |
593 | * @data Pointer to a completion structure. | |
594 | * @status Completion status. | |
595 | * | |
596 | * return value | |
597 | * None | |
598 | */ | |
599 | static void mtip_completion(struct mtip_port *port, | |
ffc771b3 | 600 | int tag, struct mtip_cmd *command, int status) |
6316668f | 601 | { |
ffc771b3 | 602 | struct completion *waiting = command->comp_data; |
6316668f JA |
603 | if (unlikely(status == PORT_IRQ_TF_ERR)) |
604 | dev_warn(&port->dd->pdev->dev, | |
605 | "Internal command %d completed with TFE\n", tag); | |
606 | ||
008e56d2 ATS |
607 | command->comp_func = NULL; |
608 | command->comp_data = NULL; | |
6316668f JA |
609 | complete(waiting); |
610 | } | |
611 | ||
f6587217 AT |
612 | static int mtip_read_log_page(struct mtip_port *port, u8 page, u16 *buffer, |
613 | dma_addr_t buffer_dma, unsigned int sectors); | |
614 | static int mtip_get_smart_attr(struct mtip_port *port, unsigned int id, | |
615 | struct smart_attr *attrib); | |
88523a61 SB |
616 | /* |
617 | * Handle an error. | |
618 | * | |
619 | * @dd Pointer to the DRIVER_DATA structure. | |
620 | * | |
621 | * return value | |
622 | * None | |
623 | */ | |
624 | static void mtip_handle_tfe(struct driver_data *dd) | |
625 | { | |
f6587217 | 626 | int group, tag, bit, reissue, rv; |
88523a61 | 627 | struct mtip_port *port; |
f6587217 | 628 | struct mtip_cmd *cmd; |
88523a61 SB |
629 | u32 completed; |
630 | struct host_to_dev_fis *fis; | |
631 | unsigned long tagaccum[SLOTBITS_IN_LONGS]; | |
95fea2f1 | 632 | unsigned int cmd_cnt = 0; |
f6587217 AT |
633 | unsigned char *buf; |
634 | char *fail_reason = NULL; | |
635 | int fail_all_ncq_write = 0, fail_all_ncq_cmds = 0; | |
88523a61 SB |
636 | |
637 | dev_warn(&dd->pdev->dev, "Taskfile error\n"); | |
638 | ||
639 | port = dd->port; | |
640 | ||
a7806fad | 641 | if (test_bit(MTIP_PF_IC_ACTIVE_BIT, &port->flags)) { |
ffc771b3 | 642 | cmd = mtip_cmd_from_tag(dd, MTIP_TAG_INTERNAL); |
d02e1f0a AT |
643 | dbg_printk(MTIP_DRV_NAME " TFE for the internal command\n"); |
644 | ||
d02e1f0a AT |
645 | if (cmd->comp_data && cmd->comp_func) { |
646 | cmd->comp_func(port, MTIP_TAG_INTERNAL, | |
ffc771b3 | 647 | cmd, PORT_IRQ_TF_ERR); |
d02e1f0a | 648 | } |
e35b9473 | 649 | return; |
d02e1f0a | 650 | } |
88523a61 | 651 | |
95fea2f1 AT |
652 | /* clear the tag accumulator */ |
653 | memset(tagaccum, 0, SLOTBITS_IN_LONGS * sizeof(long)); | |
654 | ||
88523a61 SB |
655 | /* Loop through all the groups */ |
656 | for (group = 0; group < dd->slot_groups; group++) { | |
657 | completed = readl(port->completed[group]); | |
658 | ||
ffc771b3 JA |
659 | dev_warn(&dd->pdev->dev, "g=%u, comp=%x\n", group, completed); |
660 | ||
88523a61 SB |
661 | /* clear completed status register in the hardware.*/ |
662 | writel(completed, port->completed[group]); | |
663 | ||
88523a61 SB |
664 | /* Process successfully completed commands */ |
665 | for (bit = 0; bit < 32 && completed; bit++) { | |
666 | if (!(completed & (1<<bit))) | |
667 | continue; | |
668 | tag = (group << 5) + bit; | |
669 | ||
670 | /* Skip the internal command slot */ | |
671 | if (tag == MTIP_TAG_INTERNAL) | |
672 | continue; | |
673 | ||
ffc771b3 | 674 | cmd = mtip_cmd_from_tag(dd, tag); |
f6587217 | 675 | if (likely(cmd->comp_func)) { |
88523a61 | 676 | set_bit(tag, tagaccum); |
95fea2f1 | 677 | cmd_cnt++; |
ffc771b3 | 678 | cmd->comp_func(port, tag, cmd, 0); |
88523a61 SB |
679 | } else { |
680 | dev_err(&port->dd->pdev->dev, | |
681 | "Missing completion func for tag %d", | |
682 | tag); | |
683 | if (mtip_check_surprise_removal(dd->pdev)) { | |
88523a61 SB |
684 | /* don't proceed further */ |
685 | return; | |
686 | } | |
687 | } | |
688 | } | |
689 | } | |
95fea2f1 AT |
690 | |
691 | print_tags(dd, "completed (TFE)", tagaccum, cmd_cnt); | |
88523a61 SB |
692 | |
693 | /* Restart the port */ | |
694 | mdelay(20); | |
695 | mtip_restart_port(port); | |
696 | ||
f6587217 AT |
697 | /* Trying to determine the cause of the error */ |
698 | rv = mtip_read_log_page(dd->port, ATA_LOG_SATA_NCQ, | |
699 | dd->port->log_buf, | |
700 | dd->port->log_buf_dma, 1); | |
701 | if (rv) { | |
702 | dev_warn(&dd->pdev->dev, | |
703 | "Error in READ LOG EXT (10h) command\n"); | |
704 | /* non-critical error, don't fail the load */ | |
705 | } else { | |
706 | buf = (unsigned char *)dd->port->log_buf; | |
707 | if (buf[259] & 0x1) { | |
708 | dev_info(&dd->pdev->dev, | |
709 | "Write protect bit is set.\n"); | |
8a857a88 | 710 | set_bit(MTIP_DDF_WRITE_PROTECT_BIT, &dd->dd_flag); |
f6587217 AT |
711 | fail_all_ncq_write = 1; |
712 | fail_reason = "write protect"; | |
713 | } | |
714 | if (buf[288] == 0xF7) { | |
715 | dev_info(&dd->pdev->dev, | |
716 | "Exceeded Tmax, drive in thermal shutdown.\n"); | |
8a857a88 | 717 | set_bit(MTIP_DDF_OVER_TEMP_BIT, &dd->dd_flag); |
f6587217 AT |
718 | fail_all_ncq_cmds = 1; |
719 | fail_reason = "thermal shutdown"; | |
720 | } | |
721 | if (buf[288] == 0xBF) { | |
aae4a033 | 722 | set_bit(MTIP_DDF_REBUILD_FAILED_BIT, &dd->dd_flag); |
f6587217 | 723 | dev_info(&dd->pdev->dev, |
26d58057 | 724 | "Drive indicates rebuild has failed. Secure erase required.\n"); |
f6587217 AT |
725 | fail_all_ncq_cmds = 1; |
726 | fail_reason = "rebuild failed"; | |
727 | } | |
728 | } | |
729 | ||
88523a61 SB |
730 | /* clear the tag accumulator */ |
731 | memset(tagaccum, 0, SLOTBITS_IN_LONGS * sizeof(long)); | |
732 | ||
733 | /* Loop through all the groups */ | |
734 | for (group = 0; group < dd->slot_groups; group++) { | |
735 | for (bit = 0; bit < 32; bit++) { | |
736 | reissue = 1; | |
737 | tag = (group << 5) + bit; | |
ffc771b3 | 738 | cmd = mtip_cmd_from_tag(dd, tag); |
88523a61 | 739 | |
f6587217 | 740 | fis = (struct host_to_dev_fis *)cmd->command; |
88523a61 SB |
741 | |
742 | /* Should re-issue? */ | |
743 | if (tag == MTIP_TAG_INTERNAL || | |
744 | fis->command == ATA_CMD_SET_FEATURES) | |
745 | reissue = 0; | |
f6587217 AT |
746 | else { |
747 | if (fail_all_ncq_cmds || | |
748 | (fail_all_ncq_write && | |
749 | fis->command == ATA_CMD_FPDMA_WRITE)) { | |
750 | dev_warn(&dd->pdev->dev, | |
751 | " Fail: %s w/tag %d [%s].\n", | |
752 | fis->command == ATA_CMD_FPDMA_WRITE ? | |
753 | "write" : "read", | |
754 | tag, | |
755 | fail_reason != NULL ? | |
756 | fail_reason : "unknown"); | |
f6587217 AT |
757 | if (cmd->comp_func) { |
758 | cmd->comp_func(port, tag, | |
ffc771b3 | 759 | cmd, -ENODATA); |
f6587217 AT |
760 | } |
761 | continue; | |
762 | } | |
763 | } | |
88523a61 SB |
764 | |
765 | /* | |
766 | * First check if this command has | |
767 | * exceeded its retries. | |
768 | */ | |
f6587217 | 769 | if (reissue && (cmd->retries-- > 0)) { |
88523a61 SB |
770 | |
771 | set_bit(tag, tagaccum); | |
772 | ||
88523a61 SB |
773 | /* Re-issue the command. */ |
774 | mtip_issue_ncq_command(port, tag); | |
775 | ||
776 | continue; | |
777 | } | |
778 | ||
779 | /* Retire a command that will not be reissued */ | |
780 | dev_warn(&port->dd->pdev->dev, | |
781 | "retiring tag %d\n", tag); | |
88523a61 | 782 | |
f6587217 | 783 | if (cmd->comp_func) |
ffc771b3 | 784 | cmd->comp_func(port, tag, cmd, PORT_IRQ_TF_ERR); |
88523a61 SB |
785 | else |
786 | dev_warn(&port->dd->pdev->dev, | |
787 | "Bad completion for tag %d\n", | |
788 | tag); | |
789 | } | |
790 | } | |
95fea2f1 | 791 | print_tags(dd, "reissued (TFE)", tagaccum, cmd_cnt); |
88523a61 SB |
792 | } |
793 | ||
794 | /* | |
795 | * Handle a set device bits interrupt | |
796 | */ | |
16c906e5 AT |
797 | static inline void mtip_workq_sdbfx(struct mtip_port *port, int group, |
798 | u32 completed) | |
88523a61 | 799 | { |
16c906e5 AT |
800 | struct driver_data *dd = port->dd; |
801 | int tag, bit; | |
88523a61 SB |
802 | struct mtip_cmd *command; |
803 | ||
16c906e5 AT |
804 | if (!completed) { |
805 | WARN_ON_ONCE(!completed); | |
806 | return; | |
807 | } | |
808 | /* clear completed status register in the hardware.*/ | |
809 | writel(completed, port->completed[group]); | |
88523a61 | 810 | |
16c906e5 AT |
811 | /* Process completed commands. */ |
812 | for (bit = 0; (bit < 32) && completed; bit++) { | |
813 | if (completed & 0x01) { | |
814 | tag = (group << 5) | bit; | |
88523a61 | 815 | |
16c906e5 AT |
816 | /* skip internal command slot. */ |
817 | if (unlikely(tag == MTIP_TAG_INTERNAL)) | |
818 | continue; | |
88523a61 | 819 | |
ffc771b3 JA |
820 | command = mtip_cmd_from_tag(dd, tag); |
821 | if (likely(command->comp_func)) | |
822 | command->comp_func(port, tag, command, 0); | |
823 | else { | |
8f8b8995 AT |
824 | dev_dbg(&dd->pdev->dev, |
825 | "Null completion for tag %d", | |
16c906e5 | 826 | tag); |
88523a61 | 827 | |
16c906e5 AT |
828 | if (mtip_check_surprise_removal( |
829 | dd->pdev)) { | |
16c906e5 | 830 | return; |
88523a61 SB |
831 | } |
832 | } | |
833 | } | |
16c906e5 | 834 | completed >>= 1; |
88523a61 | 835 | } |
16c906e5 AT |
836 | |
837 | /* If last, re-enable interrupts */ | |
838 | if (atomic_dec_return(&dd->irq_workers_active) == 0) | |
839 | writel(0xffffffff, dd->mmio + HOST_IRQ_STAT); | |
88523a61 SB |
840 | } |
841 | ||
842 | /* | |
843 | * Process legacy pio and d2h interrupts | |
844 | */ | |
845 | static inline void mtip_process_legacy(struct driver_data *dd, u32 port_stat) | |
846 | { | |
847 | struct mtip_port *port = dd->port; | |
ffc771b3 | 848 | struct mtip_cmd *cmd = mtip_cmd_from_tag(dd, MTIP_TAG_INTERNAL); |
88523a61 | 849 | |
8a857a88 | 850 | if (test_bit(MTIP_PF_IC_ACTIVE_BIT, &port->flags) && |
60ec0eec | 851 | (cmd != NULL) && !(readl(port->cmd_issue[MTIP_TAG_INTERNAL]) |
88523a61 SB |
852 | & (1 << MTIP_TAG_INTERNAL))) { |
853 | if (cmd->comp_func) { | |
ffc771b3 | 854 | cmd->comp_func(port, MTIP_TAG_INTERNAL, cmd, 0); |
88523a61 SB |
855 | return; |
856 | } | |
857 | } | |
858 | ||
88523a61 SB |
859 | return; |
860 | } | |
861 | ||
862 | /* | |
863 | * Demux and handle errors | |
864 | */ | |
865 | static inline void mtip_process_errors(struct driver_data *dd, u32 port_stat) | |
866 | { | |
88523a61 SB |
867 | |
868 | if (unlikely(port_stat & PORT_IRQ_CONNECT)) { | |
869 | dev_warn(&dd->pdev->dev, | |
870 | "Clearing PxSERR.DIAG.x\n"); | |
871 | writel((1 << 26), dd->port->mmio + PORT_SCR_ERR); | |
872 | } | |
873 | ||
874 | if (unlikely(port_stat & PORT_IRQ_PHYRDY)) { | |
875 | dev_warn(&dd->pdev->dev, | |
876 | "Clearing PxSERR.DIAG.n\n"); | |
877 | writel((1 << 16), dd->port->mmio + PORT_SCR_ERR); | |
878 | } | |
879 | ||
880 | if (unlikely(port_stat & ~PORT_IRQ_HANDLED)) { | |
881 | dev_warn(&dd->pdev->dev, | |
882 | "Port stat errors %x unhandled\n", | |
883 | (port_stat & ~PORT_IRQ_HANDLED)); | |
9b204fbf AT |
884 | if (mtip_check_surprise_removal(dd->pdev)) |
885 | return; | |
886 | } | |
887 | if (likely(port_stat & (PORT_IRQ_TF_ERR | PORT_IRQ_IF_ERR))) { | |
888 | set_bit(MTIP_PF_EH_ACTIVE_BIT, &dd->port->flags); | |
889 | wake_up_interruptible(&dd->port->svc_wait); | |
88523a61 SB |
890 | } |
891 | } | |
892 | ||
893 | static inline irqreturn_t mtip_handle_irq(struct driver_data *data) | |
894 | { | |
895 | struct driver_data *dd = (struct driver_data *) data; | |
896 | struct mtip_port *port = dd->port; | |
897 | u32 hba_stat, port_stat; | |
898 | int rv = IRQ_NONE; | |
16c906e5 AT |
899 | int do_irq_enable = 1, i, workers; |
900 | struct mtip_work *twork; | |
88523a61 SB |
901 | |
902 | hba_stat = readl(dd->mmio + HOST_IRQ_STAT); | |
903 | if (hba_stat) { | |
904 | rv = IRQ_HANDLED; | |
905 | ||
906 | /* Acknowledge the interrupt status on the port.*/ | |
907 | port_stat = readl(port->mmio + PORT_IRQ_STAT); | |
2132a544 ATS |
908 | if (unlikely(port_stat == 0xFFFFFFFF)) { |
909 | mtip_check_surprise_removal(dd->pdev); | |
910 | return IRQ_HANDLED; | |
911 | } | |
88523a61 SB |
912 | writel(port_stat, port->mmio + PORT_IRQ_STAT); |
913 | ||
914 | /* Demux port status */ | |
16c906e5 AT |
915 | if (likely(port_stat & PORT_IRQ_SDB_FIS)) { |
916 | do_irq_enable = 0; | |
917 | WARN_ON_ONCE(atomic_read(&dd->irq_workers_active) != 0); | |
918 | ||
919 | /* Start at 1: group zero is always local? */ | |
920 | for (i = 0, workers = 0; i < MTIP_MAX_SLOT_GROUPS; | |
921 | i++) { | |
922 | twork = &dd->work[i]; | |
923 | twork->completed = readl(port->completed[i]); | |
924 | if (twork->completed) | |
925 | workers++; | |
926 | } | |
927 | ||
928 | atomic_set(&dd->irq_workers_active, workers); | |
929 | if (workers) { | |
930 | for (i = 1; i < MTIP_MAX_SLOT_GROUPS; i++) { | |
931 | twork = &dd->work[i]; | |
932 | if (twork->completed) | |
933 | queue_work_on( | |
934 | twork->cpu_binding, | |
935 | dd->isr_workq, | |
936 | &twork->work); | |
937 | } | |
938 | ||
939 | if (likely(dd->work[0].completed)) | |
940 | mtip_workq_sdbfx(port, 0, | |
941 | dd->work[0].completed); | |
942 | ||
943 | } else { | |
944 | /* | |
945 | * Chip quirk: SDB interrupt but nothing | |
946 | * to complete | |
947 | */ | |
948 | do_irq_enable = 1; | |
949 | } | |
950 | } | |
88523a61 SB |
951 | |
952 | if (unlikely(port_stat & PORT_IRQ_ERR)) { | |
953 | if (unlikely(mtip_check_surprise_removal(dd->pdev))) { | |
88523a61 SB |
954 | /* don't proceed further */ |
955 | return IRQ_HANDLED; | |
956 | } | |
8a857a88 | 957 | if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT, |
45038367 AT |
958 | &dd->dd_flag)) |
959 | return rv; | |
88523a61 SB |
960 | |
961 | mtip_process_errors(dd, port_stat & PORT_IRQ_ERR); | |
962 | } | |
963 | ||
964 | if (unlikely(port_stat & PORT_IRQ_LEGACY)) | |
965 | mtip_process_legacy(dd, port_stat & PORT_IRQ_LEGACY); | |
966 | } | |
967 | ||
968 | /* acknowledge interrupt */ | |
16c906e5 AT |
969 | if (unlikely(do_irq_enable)) |
970 | writel(hba_stat, dd->mmio + HOST_IRQ_STAT); | |
88523a61 SB |
971 | |
972 | return rv; | |
973 | } | |
974 | ||
88523a61 SB |
975 | /* |
976 | * HBA interrupt subroutine. | |
977 | * | |
978 | * @irq IRQ number. | |
979 | * @instance Pointer to the driver data structure. | |
980 | * | |
981 | * return value | |
982 | * IRQ_HANDLED A HBA interrupt was pending and handled. | |
983 | * IRQ_NONE This interrupt was not for the HBA. | |
984 | */ | |
985 | static irqreturn_t mtip_irq_handler(int irq, void *instance) | |
986 | { | |
987 | struct driver_data *dd = instance; | |
16c906e5 AT |
988 | |
989 | return mtip_handle_irq(dd); | |
88523a61 SB |
990 | } |
991 | ||
992 | static void mtip_issue_non_ncq_command(struct mtip_port *port, int tag) | |
993 | { | |
88523a61 SB |
994 | writel(1 << MTIP_TAG_BIT(tag), |
995 | port->cmd_issue[MTIP_TAG_INDEX(tag)]); | |
996 | } | |
997 | ||
c74b0f58 AT |
998 | static bool mtip_pause_ncq(struct mtip_port *port, |
999 | struct host_to_dev_fis *fis) | |
1000 | { | |
1001 | struct host_to_dev_fis *reply; | |
1002 | unsigned long task_file_data; | |
1003 | ||
1004 | reply = port->rxfis + RX_FIS_D2H_REG; | |
1005 | task_file_data = readl(port->mmio+PORT_TFDATA); | |
1006 | ||
12a166c9 | 1007 | if ((task_file_data & 1)) |
c74b0f58 AT |
1008 | return false; |
1009 | ||
1010 | if (fis->command == ATA_CMD_SEC_ERASE_PREP) { | |
c74b0f58 AT |
1011 | port->ic_pause_timer = jiffies; |
1012 | return true; | |
1013 | } else if ((fis->command == ATA_CMD_DOWNLOAD_MICRO) && | |
1014 | (fis->features == 0x03)) { | |
1015 | set_bit(MTIP_PF_DM_ACTIVE_BIT, &port->flags); | |
1016 | port->ic_pause_timer = jiffies; | |
1017 | return true; | |
1018 | } else if ((fis->command == ATA_CMD_SEC_ERASE_UNIT) || | |
1019 | ((fis->command == 0xFC) && | |
1020 | (fis->features == 0x27 || fis->features == 0x72 || | |
1021 | fis->features == 0x62 || fis->features == 0x26))) { | |
ee04bed6 | 1022 | clear_bit(MTIP_DDF_SEC_LOCK_BIT, &port->dd->dd_flag); |
aae4a033 | 1023 | clear_bit(MTIP_DDF_REBUILD_FAILED_BIT, &port->dd->dd_flag); |
c74b0f58 AT |
1024 | /* Com reset after secure erase or lowlevel format */ |
1025 | mtip_restart_port(port); | |
686d8e0b | 1026 | clear_bit(MTIP_PF_SE_ACTIVE_BIT, &port->flags); |
c74b0f58 AT |
1027 | return false; |
1028 | } | |
1029 | ||
1030 | return false; | |
1031 | } | |
1032 | ||
88523a61 SB |
1033 | /* |
1034 | * Wait for port to quiesce | |
1035 | * | |
1036 | * @port Pointer to port data structure | |
1037 | * @timeout Max duration to wait (ms) | |
1038 | * | |
1039 | * return value | |
1040 | * 0 Success | |
1041 | * -EBUSY Commands still active | |
1042 | */ | |
8afdd94c | 1043 | static int mtip_quiesce_io(struct mtip_port *port, unsigned long timeout) |
88523a61 SB |
1044 | { |
1045 | unsigned long to; | |
3e54a3d1 DC |
1046 | unsigned int n; |
1047 | unsigned int active = 1; | |
88523a61 | 1048 | |
9acf03cf JA |
1049 | blk_mq_stop_hw_queues(port->dd->queue); |
1050 | ||
88523a61 SB |
1051 | to = jiffies + msecs_to_jiffies(timeout); |
1052 | do { | |
8a857a88 | 1053 | if (test_bit(MTIP_PF_SVC_THD_ACTIVE_BIT, &port->flags) && |
8afdd94c | 1054 | test_bit(MTIP_PF_ISSUE_CMDS_BIT, &port->flags)) { |
60ec0eec AT |
1055 | msleep(20); |
1056 | continue; /* svc thd is actively issuing commands */ | |
1057 | } | |
9b204fbf | 1058 | |
8afdd94c | 1059 | msleep(100); |
008e56d2 | 1060 | |
9b204fbf AT |
1061 | if (mtip_check_surprise_removal(port->dd->pdev)) |
1062 | goto err_fault; | |
9b204fbf | 1063 | |
88523a61 SB |
1064 | /* |
1065 | * Ignore s_active bit 0 of array element 0. | |
1066 | * This bit will always be set | |
1067 | */ | |
60ec0eec | 1068 | active = readl(port->s_active[0]) & 0xFFFFFFFE; |
88523a61 SB |
1069 | for (n = 1; n < port->dd->slot_groups; n++) |
1070 | active |= readl(port->s_active[n]); | |
1071 | ||
1072 | if (!active) | |
1073 | break; | |
88523a61 SB |
1074 | } while (time_before(jiffies, to)); |
1075 | ||
9acf03cf | 1076 | blk_mq_start_stopped_hw_queues(port->dd->queue, true); |
88523a61 | 1077 | return active ? -EBUSY : 0; |
9acf03cf JA |
1078 | err_fault: |
1079 | blk_mq_start_stopped_hw_queues(port->dd->queue, true); | |
1080 | return -EFAULT; | |
88523a61 SB |
1081 | } |
1082 | ||
1083 | /* | |
1084 | * Execute an internal command and wait for the completion. | |
1085 | * | |
1086 | * @port Pointer to the port data structure. | |
1087 | * @fis Pointer to the FIS that describes the command. | |
60ec0eec | 1088 | * @fis_len Length in WORDS of the FIS. |
88523a61 | 1089 | * @buffer DMA accessible for command data. |
60ec0eec | 1090 | * @buf_len Length, in bytes, of the data buffer. |
88523a61 SB |
1091 | * @opts Command header options, excluding the FIS length |
1092 | * and the number of PRD entries. | |
1093 | * @timeout Time in ms to wait for the command to complete. | |
1094 | * | |
1095 | * return value | |
1096 | * 0 Command completed successfully. | |
1097 | * -EFAULT The buffer address is not correctly aligned. | |
1098 | * -EBUSY Internal command or other IO in progress. | |
1099 | * -EAGAIN Time out waiting for command to complete. | |
1100 | */ | |
1101 | static int mtip_exec_internal_command(struct mtip_port *port, | |
8182b495 | 1102 | struct host_to_dev_fis *fis, |
60ec0eec | 1103 | int fis_len, |
88523a61 | 1104 | dma_addr_t buffer, |
60ec0eec | 1105 | int buf_len, |
88523a61 | 1106 | u32 opts, |
88523a61 SB |
1107 | unsigned long timeout) |
1108 | { | |
1109 | struct mtip_cmd_sg *command_sg; | |
1110 | DECLARE_COMPLETION_ONSTACK(wait); | |
ffc771b3 | 1111 | struct mtip_cmd *int_cmd; |
d0d096b1 | 1112 | struct driver_data *dd = port->dd; |
ffc771b3 | 1113 | int rv = 0; |
5b7e0a8a | 1114 | unsigned long start; |
88523a61 SB |
1115 | |
1116 | /* Make sure the buffer is 8 byte aligned. This is asic specific. */ | |
1117 | if (buffer & 0x00000007) { | |
d0d096b1 | 1118 | dev_err(&dd->pdev->dev, "SG buffer is not 8 byte aligned\n"); |
88523a61 SB |
1119 | return -EFAULT; |
1120 | } | |
1121 | ||
ffc771b3 | 1122 | int_cmd = mtip_get_int_command(dd); |
008e56d2 ATS |
1123 | if (!int_cmd) { |
1124 | dbg_printk(MTIP_DRV_NAME "Unable to allocate tag for PIO cmd\n"); | |
1125 | return -EFAULT; | |
1126 | } | |
ffc771b3 | 1127 | |
8a857a88 | 1128 | set_bit(MTIP_PF_IC_ACTIVE_BIT, &port->flags); |
c74b0f58 | 1129 | |
686d8e0b ATS |
1130 | if (fis->command == ATA_CMD_SEC_ERASE_PREP) |
1131 | set_bit(MTIP_PF_SE_ACTIVE_BIT, &port->flags); | |
1132 | ||
d0d096b1 | 1133 | clear_bit(MTIP_PF_DM_ACTIVE_BIT, &port->flags); |
88523a61 | 1134 | |
0f6422a2 JA |
1135 | if (fis->command != ATA_CMD_STANDBYNOW1) { |
1136 | /* wait for io to complete if non atomic */ | |
8afdd94c | 1137 | if (mtip_quiesce_io(port, MTIP_QUIESCE_IO_TIMEOUT_MS) < 0) { |
0f6422a2 JA |
1138 | dev_warn(&dd->pdev->dev, "Failed to quiesce IO\n"); |
1139 | mtip_put_int_command(dd, int_cmd); | |
1140 | clear_bit(MTIP_PF_IC_ACTIVE_BIT, &port->flags); | |
1141 | wake_up_interruptible(&port->svc_wait); | |
1142 | return -EBUSY; | |
88523a61 | 1143 | } |
88523a61 SB |
1144 | } |
1145 | ||
0f6422a2 JA |
1146 | /* Set the completion function and data for the command. */ |
1147 | int_cmd->comp_data = &wait; | |
1148 | int_cmd->comp_func = mtip_completion; | |
1149 | ||
88523a61 | 1150 | /* Copy the command to the command table */ |
60ec0eec | 1151 | memcpy(int_cmd->command, fis, fis_len*4); |
88523a61 SB |
1152 | |
1153 | /* Populate the SG list */ | |
1154 | int_cmd->command_header->opts = | |
60ec0eec AT |
1155 | __force_bit2int cpu_to_le32(opts | fis_len); |
1156 | if (buf_len) { | |
88523a61 SB |
1157 | command_sg = int_cmd->command + AHCI_CMD_TBL_HDR_SZ; |
1158 | ||
60ec0eec AT |
1159 | command_sg->info = |
1160 | __force_bit2int cpu_to_le32((buf_len-1) & 0x3FFFFF); | |
1161 | command_sg->dba = | |
1162 | __force_bit2int cpu_to_le32(buffer & 0xFFFFFFFF); | |
1163 | command_sg->dba_upper = | |
1164 | __force_bit2int cpu_to_le32((buffer >> 16) >> 16); | |
88523a61 | 1165 | |
60ec0eec AT |
1166 | int_cmd->command_header->opts |= |
1167 | __force_bit2int cpu_to_le32((1 << 16)); | |
88523a61 SB |
1168 | } |
1169 | ||
1170 | /* Populate the command header */ | |
1171 | int_cmd->command_header->byte_count = 0; | |
1172 | ||
5b7e0a8a ATS |
1173 | start = jiffies; |
1174 | ||
88523a61 SB |
1175 | /* Issue the command to the hardware */ |
1176 | mtip_issue_non_ncq_command(port, MTIP_TAG_INTERNAL); | |
1177 | ||
0f6422a2 JA |
1178 | /* Wait for the command to complete or timeout. */ |
1179 | rv = wait_for_completion_interruptible_timeout(&wait, | |
1180 | msecs_to_jiffies(timeout)); | |
1181 | if (rv <= 0) { | |
1182 | if (rv == -ERESTARTSYS) { /* interrupted */ | |
1183 | dev_err(&dd->pdev->dev, | |
1184 | "Internal command [%02X] was interrupted after %u ms\n", | |
1185 | fis->command, | |
1186 | jiffies_to_msecs(jiffies - start)); | |
1187 | rv = -EINTR; | |
d0d096b1 | 1188 | goto exec_ic_exit; |
0f6422a2 JA |
1189 | } else if (rv == 0) /* timeout */ |
1190 | dev_err(&dd->pdev->dev, | |
1191 | "Internal command did not complete [%02X] within timeout of %lu ms\n", | |
1192 | fis->command, timeout); | |
1193 | else | |
1194 | dev_err(&dd->pdev->dev, | |
1195 | "Internal command [%02X] wait returned code [%d] after %lu ms - unhandled\n", | |
1196 | fis->command, rv, timeout); | |
d0d096b1 | 1197 | |
0f6422a2 JA |
1198 | if (mtip_check_surprise_removal(dd->pdev) || |
1199 | test_bit(MTIP_DDF_REMOVE_PENDING_BIT, | |
1200 | &dd->dd_flag)) { | |
1201 | dev_err(&dd->pdev->dev, | |
1202 | "Internal command [%02X] wait returned due to SR\n", | |
1203 | fis->command); | |
1204 | rv = -ENXIO; | |
1205 | goto exec_ic_exit; | |
45038367 | 1206 | } |
0f6422a2 JA |
1207 | mtip_device_reset(dd); /* recover from timeout issue */ |
1208 | rv = -EAGAIN; | |
1209 | goto exec_ic_exit; | |
d02e1f0a | 1210 | } |
88523a61 | 1211 | |
0f6422a2 | 1212 | rv = 0; |
d02e1f0a | 1213 | if (readl(port->cmd_issue[MTIP_TAG_INTERNAL]) |
88523a61 | 1214 | & (1 << MTIP_TAG_INTERNAL)) { |
d02e1f0a | 1215 | rv = -ENXIO; |
d0d096b1 AT |
1216 | if (!test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag)) { |
1217 | mtip_device_reset(dd); | |
88523a61 SB |
1218 | rv = -EAGAIN; |
1219 | } | |
1220 | } | |
45038367 | 1221 | exec_ic_exit: |
88523a61 | 1222 | /* Clear the allocated and active bits for the internal command. */ |
ffc771b3 | 1223 | mtip_put_int_command(dd, int_cmd); |
686d8e0b | 1224 | clear_bit(MTIP_PF_IC_ACTIVE_BIT, &port->flags); |
c74b0f58 AT |
1225 | if (rv >= 0 && mtip_pause_ncq(port, fis)) { |
1226 | /* NCQ paused */ | |
1227 | return rv; | |
1228 | } | |
60ec0eec | 1229 | wake_up_interruptible(&port->svc_wait); |
88523a61 SB |
1230 | |
1231 | return rv; | |
1232 | } | |
1233 | ||
1234 | /* | |
1235 | * Byte-swap ATA ID strings. | |
1236 | * | |
1237 | * ATA identify data contains strings in byte-swapped 16-bit words. | |
1238 | * They must be swapped (on all architectures) to be usable as C strings. | |
1239 | * This function swaps bytes in-place. | |
1240 | * | |
1241 | * @buf The buffer location of the string | |
1242 | * @len The number of bytes to swap | |
1243 | * | |
1244 | * return value | |
1245 | * None | |
1246 | */ | |
1247 | static inline void ata_swap_string(u16 *buf, unsigned int len) | |
1248 | { | |
1249 | int i; | |
1250 | for (i = 0; i < (len/2); i++) | |
1251 | be16_to_cpus(&buf[i]); | |
1252 | } | |
1253 | ||
670a6414 AT |
1254 | static void mtip_set_timeout(struct driver_data *dd, |
1255 | struct host_to_dev_fis *fis, | |
1256 | unsigned int *timeout, u8 erasemode) | |
1257 | { | |
1258 | switch (fis->command) { | |
1259 | case ATA_CMD_DOWNLOAD_MICRO: | |
1260 | *timeout = 120000; /* 2 minutes */ | |
1261 | break; | |
1262 | case ATA_CMD_SEC_ERASE_UNIT: | |
1263 | case 0xFC: | |
1264 | if (erasemode) | |
1265 | *timeout = ((*(dd->port->identify + 90) * 2) * 60000); | |
1266 | else | |
1267 | *timeout = ((*(dd->port->identify + 89) * 2) * 60000); | |
1268 | break; | |
1269 | case ATA_CMD_STANDBYNOW1: | |
1270 | *timeout = 120000; /* 2 minutes */ | |
1271 | break; | |
1272 | case 0xF7: | |
1273 | case 0xFA: | |
1274 | *timeout = 60000; /* 60 seconds */ | |
1275 | break; | |
1276 | case ATA_CMD_SMART: | |
1277 | *timeout = 15000; /* 15 seconds */ | |
1278 | break; | |
1279 | default: | |
9b204fbf | 1280 | *timeout = MTIP_IOCTL_CMD_TIMEOUT_MS; |
670a6414 AT |
1281 | break; |
1282 | } | |
1283 | } | |
1284 | ||
88523a61 SB |
1285 | /* |
1286 | * Request the device identity information. | |
1287 | * | |
1288 | * If a user space buffer is not specified, i.e. is NULL, the | |
1289 | * identify information is still read from the drive and placed | |
1290 | * into the identify data buffer (@e port->identify) in the | |
1291 | * port data structure. | |
1292 | * When the identify buffer contains valid identify information @e | |
1293 | * port->identify_valid is non-zero. | |
1294 | * | |
1295 | * @port Pointer to the port structure. | |
1296 | * @user_buffer A user space buffer where the identify data should be | |
1297 | * copied. | |
1298 | * | |
1299 | * return value | |
1300 | * 0 Command completed successfully. | |
1301 | * -EFAULT An error occurred while coping data to the user buffer. | |
1302 | * -1 Command failed. | |
1303 | */ | |
1304 | static int mtip_get_identify(struct mtip_port *port, void __user *user_buffer) | |
1305 | { | |
1306 | int rv = 0; | |
1307 | struct host_to_dev_fis fis; | |
1308 | ||
8a857a88 | 1309 | if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &port->dd->dd_flag)) |
45038367 AT |
1310 | return -EFAULT; |
1311 | ||
88523a61 SB |
1312 | /* Build the FIS. */ |
1313 | memset(&fis, 0, sizeof(struct host_to_dev_fis)); | |
1314 | fis.type = 0x27; | |
1315 | fis.opts = 1 << 7; | |
1316 | fis.command = ATA_CMD_ID_ATA; | |
1317 | ||
1318 | /* Set the identify information as invalid. */ | |
1319 | port->identify_valid = 0; | |
1320 | ||
1321 | /* Clear the identify information. */ | |
1322 | memset(port->identify, 0, sizeof(u16) * ATA_ID_WORDS); | |
1323 | ||
1324 | /* Execute the command. */ | |
1325 | if (mtip_exec_internal_command(port, | |
1326 | &fis, | |
1327 | 5, | |
1328 | port->identify_dma, | |
1329 | sizeof(u16) * ATA_ID_WORDS, | |
1330 | 0, | |
9b204fbf | 1331 | MTIP_INT_CMD_TIMEOUT_MS) |
88523a61 SB |
1332 | < 0) { |
1333 | rv = -1; | |
1334 | goto out; | |
1335 | } | |
1336 | ||
1337 | /* | |
1338 | * Perform any necessary byte-swapping. Yes, the kernel does in fact | |
1339 | * perform field-sensitive swapping on the string fields. | |
1340 | * See the kernel use of ata_id_string() for proof of this. | |
1341 | */ | |
1342 | #ifdef __LITTLE_ENDIAN | |
1343 | ata_swap_string(port->identify + 27, 40); /* model string*/ | |
1344 | ata_swap_string(port->identify + 23, 8); /* firmware string*/ | |
1345 | ata_swap_string(port->identify + 10, 20); /* serial# string*/ | |
1346 | #else | |
1347 | { | |
1348 | int i; | |
1349 | for (i = 0; i < ATA_ID_WORDS; i++) | |
1350 | port->identify[i] = le16_to_cpu(port->identify[i]); | |
1351 | } | |
1352 | #endif | |
1353 | ||
26d58057 SB |
1354 | /* Check security locked state */ |
1355 | if (port->identify[128] & 0x4) | |
1356 | set_bit(MTIP_DDF_SEC_LOCK_BIT, &port->dd->dd_flag); | |
1357 | else | |
1358 | clear_bit(MTIP_DDF_SEC_LOCK_BIT, &port->dd->dd_flag); | |
1359 | ||
68466cbf | 1360 | #ifdef MTIP_TRIM /* Disabling TRIM support temporarily */ |
15283469 AT |
1361 | /* Demux ID.DRAT & ID.RZAT to determine trim support */ |
1362 | if (port->identify[69] & (1 << 14) && port->identify[69] & (1 << 5)) | |
1363 | port->dd->trim_supp = true; | |
1364 | else | |
68466cbf | 1365 | #endif |
15283469 AT |
1366 | port->dd->trim_supp = false; |
1367 | ||
88523a61 SB |
1368 | /* Set the identify buffer as valid. */ |
1369 | port->identify_valid = 1; | |
1370 | ||
1371 | if (user_buffer) { | |
1372 | if (copy_to_user( | |
1373 | user_buffer, | |
1374 | port->identify, | |
1375 | ATA_ID_WORDS * sizeof(u16))) { | |
1376 | rv = -EFAULT; | |
1377 | goto out; | |
1378 | } | |
1379 | } | |
1380 | ||
1381 | out: | |
88523a61 SB |
1382 | return rv; |
1383 | } | |
1384 | ||
1385 | /* | |
1386 | * Issue a standby immediate command to the device. | |
1387 | * | |
1388 | * @port Pointer to the port structure. | |
1389 | * | |
1390 | * return value | |
1391 | * 0 Command was executed successfully. | |
1392 | * -1 An error occurred while executing the command. | |
1393 | */ | |
1394 | static int mtip_standby_immediate(struct mtip_port *port) | |
1395 | { | |
1396 | int rv; | |
1397 | struct host_to_dev_fis fis; | |
f6587217 | 1398 | unsigned long start; |
670a6414 | 1399 | unsigned int timeout; |
88523a61 | 1400 | |
88523a61 SB |
1401 | /* Build the FIS. */ |
1402 | memset(&fis, 0, sizeof(struct host_to_dev_fis)); | |
1403 | fis.type = 0x27; | |
1404 | fis.opts = 1 << 7; | |
1405 | fis.command = ATA_CMD_STANDBYNOW1; | |
1406 | ||
670a6414 AT |
1407 | mtip_set_timeout(port->dd, &fis, &timeout, 0); |
1408 | ||
f6587217 | 1409 | start = jiffies; |
88523a61 SB |
1410 | rv = mtip_exec_internal_command(port, |
1411 | &fis, | |
1412 | 5, | |
1413 | 0, | |
1414 | 0, | |
1415 | 0, | |
670a6414 | 1416 | timeout); |
f6587217 AT |
1417 | dbg_printk(MTIP_DRV_NAME "Time taken to complete standby cmd: %d ms\n", |
1418 | jiffies_to_msecs(jiffies - start)); | |
1419 | if (rv) | |
1420 | dev_warn(&port->dd->pdev->dev, | |
1421 | "STANDBY IMMEDIATE command failed.\n"); | |
1422 | ||
1423 | return rv; | |
1424 | } | |
1425 | ||
1426 | /* | |
1427 | * Issue a READ LOG EXT command to the device. | |
1428 | * | |
1429 | * @port pointer to the port structure. | |
1430 | * @page page number to fetch | |
1431 | * @buffer pointer to buffer | |
1432 | * @buffer_dma dma address corresponding to @buffer | |
1433 | * @sectors page length to fetch, in sectors | |
1434 | * | |
1435 | * return value | |
1436 | * @rv return value from mtip_exec_internal_command() | |
1437 | */ | |
1438 | static int mtip_read_log_page(struct mtip_port *port, u8 page, u16 *buffer, | |
1439 | dma_addr_t buffer_dma, unsigned int sectors) | |
1440 | { | |
1441 | struct host_to_dev_fis fis; | |
1442 | ||
1443 | memset(&fis, 0, sizeof(struct host_to_dev_fis)); | |
1444 | fis.type = 0x27; | |
1445 | fis.opts = 1 << 7; | |
1446 | fis.command = ATA_CMD_READ_LOG_EXT; | |
1447 | fis.sect_count = sectors & 0xFF; | |
1448 | fis.sect_cnt_ex = (sectors >> 8) & 0xFF; | |
1449 | fis.lba_low = page; | |
1450 | fis.lba_mid = 0; | |
1451 | fis.device = ATA_DEVICE_OBS; | |
1452 | ||
1453 | memset(buffer, 0, sectors * ATA_SECT_SIZE); | |
1454 | ||
1455 | return mtip_exec_internal_command(port, | |
1456 | &fis, | |
1457 | 5, | |
1458 | buffer_dma, | |
1459 | sectors * ATA_SECT_SIZE, | |
1460 | 0, | |
9b204fbf | 1461 | MTIP_INT_CMD_TIMEOUT_MS); |
f6587217 AT |
1462 | } |
1463 | ||
1464 | /* | |
1465 | * Issue a SMART READ DATA command to the device. | |
1466 | * | |
1467 | * @port pointer to the port structure. | |
1468 | * @buffer pointer to buffer | |
1469 | * @buffer_dma dma address corresponding to @buffer | |
1470 | * | |
1471 | * return value | |
1472 | * @rv return value from mtip_exec_internal_command() | |
1473 | */ | |
1474 | static int mtip_get_smart_data(struct mtip_port *port, u8 *buffer, | |
1475 | dma_addr_t buffer_dma) | |
1476 | { | |
1477 | struct host_to_dev_fis fis; | |
1478 | ||
1479 | memset(&fis, 0, sizeof(struct host_to_dev_fis)); | |
1480 | fis.type = 0x27; | |
1481 | fis.opts = 1 << 7; | |
1482 | fis.command = ATA_CMD_SMART; | |
1483 | fis.features = 0xD0; | |
1484 | fis.sect_count = 1; | |
1485 | fis.lba_mid = 0x4F; | |
1486 | fis.lba_hi = 0xC2; | |
1487 | fis.device = ATA_DEVICE_OBS; | |
1488 | ||
1489 | return mtip_exec_internal_command(port, | |
1490 | &fis, | |
1491 | 5, | |
1492 | buffer_dma, | |
1493 | ATA_SECT_SIZE, | |
1494 | 0, | |
88523a61 | 1495 | 15000); |
f6587217 AT |
1496 | } |
1497 | ||
1498 | /* | |
1499 | * Get the value of a smart attribute | |
1500 | * | |
1501 | * @port pointer to the port structure | |
1502 | * @id attribute number | |
1503 | * @attrib pointer to return attrib information corresponding to @id | |
1504 | * | |
1505 | * return value | |
1506 | * -EINVAL NULL buffer passed or unsupported attribute @id. | |
1507 | * -EPERM Identify data not valid, SMART not supported or not enabled | |
1508 | */ | |
1509 | static int mtip_get_smart_attr(struct mtip_port *port, unsigned int id, | |
1510 | struct smart_attr *attrib) | |
1511 | { | |
1512 | int rv, i; | |
1513 | struct smart_attr *pattr; | |
1514 | ||
1515 | if (!attrib) | |
1516 | return -EINVAL; | |
1517 | ||
1518 | if (!port->identify_valid) { | |
1519 | dev_warn(&port->dd->pdev->dev, "IDENTIFY DATA not valid\n"); | |
1520 | return -EPERM; | |
1521 | } | |
1522 | if (!(port->identify[82] & 0x1)) { | |
1523 | dev_warn(&port->dd->pdev->dev, "SMART not supported\n"); | |
1524 | return -EPERM; | |
1525 | } | |
1526 | if (!(port->identify[85] & 0x1)) { | |
1527 | dev_warn(&port->dd->pdev->dev, "SMART not enabled\n"); | |
1528 | return -EPERM; | |
1529 | } | |
1530 | ||
1531 | memset(port->smart_buf, 0, ATA_SECT_SIZE); | |
1532 | rv = mtip_get_smart_data(port, port->smart_buf, port->smart_buf_dma); | |
1533 | if (rv) { | |
1534 | dev_warn(&port->dd->pdev->dev, "Failed to ge SMART data\n"); | |
1535 | return rv; | |
1536 | } | |
1537 | ||
1538 | pattr = (struct smart_attr *)(port->smart_buf + 2); | |
1539 | for (i = 0; i < 29; i++, pattr++) | |
1540 | if (pattr->attr_id == id) { | |
1541 | memcpy(attrib, pattr, sizeof(struct smart_attr)); | |
1542 | break; | |
1543 | } | |
1544 | ||
1545 | if (i == 29) { | |
1546 | dev_warn(&port->dd->pdev->dev, | |
1547 | "Query for invalid SMART attribute ID\n"); | |
1548 | rv = -EINVAL; | |
1549 | } | |
88523a61 | 1550 | |
88523a61 SB |
1551 | return rv; |
1552 | } | |
1553 | ||
15283469 AT |
1554 | /* |
1555 | * Trim unused sectors | |
1556 | * | |
1557 | * @dd pointer to driver_data structure | |
1558 | * @lba starting lba | |
1559 | * @len # of 512b sectors to trim | |
1560 | * | |
1561 | * return value | |
1562 | * -ENOMEM Out of dma memory | |
1563 | * -EINVAL Invalid parameters passed in, trim not supported | |
1564 | * -EIO Error submitting trim request to hw | |
1565 | */ | |
d0d096b1 AT |
1566 | static int mtip_send_trim(struct driver_data *dd, unsigned int lba, |
1567 | unsigned int len) | |
15283469 AT |
1568 | { |
1569 | int i, rv = 0; | |
1570 | u64 tlba, tlen, sect_left; | |
1571 | struct mtip_trim_entry *buf; | |
1572 | dma_addr_t dma_addr; | |
1573 | struct host_to_dev_fis fis; | |
1574 | ||
1575 | if (!len || dd->trim_supp == false) | |
1576 | return -EINVAL; | |
1577 | ||
1578 | /* Trim request too big */ | |
1579 | WARN_ON(len > (MTIP_MAX_TRIM_ENTRY_LEN * MTIP_MAX_TRIM_ENTRIES)); | |
1580 | ||
1581 | /* Trim request not aligned on 4k boundary */ | |
1582 | WARN_ON(len % 8 != 0); | |
1583 | ||
1584 | /* Warn if vu_trim structure is too big */ | |
1585 | WARN_ON(sizeof(struct mtip_trim) > ATA_SECT_SIZE); | |
1586 | ||
1587 | /* Allocate a DMA buffer for the trim structure */ | |
1588 | buf = dmam_alloc_coherent(&dd->pdev->dev, ATA_SECT_SIZE, &dma_addr, | |
1589 | GFP_KERNEL); | |
1590 | if (!buf) | |
1591 | return -ENOMEM; | |
1592 | memset(buf, 0, ATA_SECT_SIZE); | |
1593 | ||
1594 | for (i = 0, sect_left = len, tlba = lba; | |
1595 | i < MTIP_MAX_TRIM_ENTRIES && sect_left; | |
1596 | i++) { | |
1597 | tlen = (sect_left >= MTIP_MAX_TRIM_ENTRY_LEN ? | |
1598 | MTIP_MAX_TRIM_ENTRY_LEN : | |
1599 | sect_left); | |
1600 | buf[i].lba = __force_bit2int cpu_to_le32(tlba); | |
1601 | buf[i].range = __force_bit2int cpu_to_le16(tlen); | |
1602 | tlba += tlen; | |
1603 | sect_left -= tlen; | |
1604 | } | |
1605 | WARN_ON(sect_left != 0); | |
1606 | ||
1607 | /* Build the fis */ | |
1608 | memset(&fis, 0, sizeof(struct host_to_dev_fis)); | |
1609 | fis.type = 0x27; | |
1610 | fis.opts = 1 << 7; | |
1611 | fis.command = 0xfb; | |
1612 | fis.features = 0x60; | |
1613 | fis.sect_count = 1; | |
1614 | fis.device = ATA_DEVICE_OBS; | |
1615 | ||
1616 | if (mtip_exec_internal_command(dd->port, | |
1617 | &fis, | |
1618 | 5, | |
1619 | dma_addr, | |
1620 | ATA_SECT_SIZE, | |
1621 | 0, | |
15283469 AT |
1622 | MTIP_TRIM_TIMEOUT_MS) < 0) |
1623 | rv = -EIO; | |
1624 | ||
1625 | dmam_free_coherent(&dd->pdev->dev, ATA_SECT_SIZE, buf, dma_addr); | |
1626 | return rv; | |
1627 | } | |
1628 | ||
88523a61 SB |
1629 | /* |
1630 | * Get the drive capacity. | |
1631 | * | |
1632 | * @dd Pointer to the device data structure. | |
1633 | * @sectors Pointer to the variable that will receive the sector count. | |
1634 | * | |
1635 | * return value | |
1636 | * 1 Capacity was returned successfully. | |
1637 | * 0 The identify information is invalid. | |
1638 | */ | |
6316668f | 1639 | static bool mtip_hw_get_capacity(struct driver_data *dd, sector_t *sectors) |
88523a61 SB |
1640 | { |
1641 | struct mtip_port *port = dd->port; | |
1642 | u64 total, raw0, raw1, raw2, raw3; | |
1643 | raw0 = port->identify[100]; | |
1644 | raw1 = port->identify[101]; | |
1645 | raw2 = port->identify[102]; | |
1646 | raw3 = port->identify[103]; | |
1647 | total = raw0 | raw1<<16 | raw2<<32 | raw3<<48; | |
1648 | *sectors = total; | |
1649 | return (bool) !!port->identify_valid; | |
1650 | } | |
1651 | ||
88523a61 SB |
1652 | /* |
1653 | * Display the identify command data. | |
1654 | * | |
1655 | * @port Pointer to the port data structure. | |
1656 | * | |
1657 | * return value | |
1658 | * None | |
1659 | */ | |
1660 | static void mtip_dump_identify(struct mtip_port *port) | |
1661 | { | |
1662 | sector_t sectors; | |
1663 | unsigned short revid; | |
1664 | char cbuf[42]; | |
1665 | ||
1666 | if (!port->identify_valid) | |
1667 | return; | |
1668 | ||
1669 | strlcpy(cbuf, (char *)(port->identify+10), 21); | |
1670 | dev_info(&port->dd->pdev->dev, | |
1671 | "Serial No.: %s\n", cbuf); | |
1672 | ||
1673 | strlcpy(cbuf, (char *)(port->identify+23), 9); | |
1674 | dev_info(&port->dd->pdev->dev, | |
1675 | "Firmware Ver.: %s\n", cbuf); | |
1676 | ||
1677 | strlcpy(cbuf, (char *)(port->identify+27), 41); | |
1678 | dev_info(&port->dd->pdev->dev, "Model: %s\n", cbuf); | |
1679 | ||
26d58057 SB |
1680 | dev_info(&port->dd->pdev->dev, "Security: %04x %s\n", |
1681 | port->identify[128], | |
1682 | port->identify[128] & 0x4 ? "(LOCKED)" : ""); | |
1683 | ||
88523a61 SB |
1684 | if (mtip_hw_get_capacity(port->dd, §ors)) |
1685 | dev_info(&port->dd->pdev->dev, | |
1686 | "Capacity: %llu sectors (%llu MB)\n", | |
1687 | (u64)sectors, | |
1688 | ((u64)sectors) * ATA_SECT_SIZE >> 20); | |
1689 | ||
1690 | pci_read_config_word(port->dd->pdev, PCI_REVISION_ID, &revid); | |
60ec0eec | 1691 | switch (revid & 0xFF) { |
88523a61 SB |
1692 | case 0x1: |
1693 | strlcpy(cbuf, "A0", 3); | |
1694 | break; | |
1695 | case 0x3: | |
1696 | strlcpy(cbuf, "A2", 3); | |
1697 | break; | |
1698 | default: | |
1699 | strlcpy(cbuf, "?", 2); | |
1700 | break; | |
1701 | } | |
1702 | dev_info(&port->dd->pdev->dev, | |
1703 | "Card Type: %s\n", cbuf); | |
1704 | } | |
1705 | ||
1706 | /* | |
1707 | * Map the commands scatter list into the command table. | |
1708 | * | |
1709 | * @command Pointer to the command. | |
1710 | * @nents Number of scatter list entries. | |
1711 | * | |
1712 | * return value | |
1713 | * None | |
1714 | */ | |
1715 | static inline void fill_command_sg(struct driver_data *dd, | |
1716 | struct mtip_cmd *command, | |
1717 | int nents) | |
1718 | { | |
1719 | int n; | |
1720 | unsigned int dma_len; | |
1721 | struct mtip_cmd_sg *command_sg; | |
1722 | struct scatterlist *sg = command->sg; | |
1723 | ||
1724 | command_sg = command->command + AHCI_CMD_TBL_HDR_SZ; | |
1725 | ||
1726 | for (n = 0; n < nents; n++) { | |
1727 | dma_len = sg_dma_len(sg); | |
1728 | if (dma_len > 0x400000) | |
1729 | dev_err(&dd->pdev->dev, | |
1730 | "DMA segment length truncated\n"); | |
60ec0eec AT |
1731 | command_sg->info = __force_bit2int |
1732 | cpu_to_le32((dma_len-1) & 0x3FFFFF); | |
1733 | command_sg->dba = __force_bit2int | |
1734 | cpu_to_le32(sg_dma_address(sg)); | |
1735 | command_sg->dba_upper = __force_bit2int | |
1736 | cpu_to_le32((sg_dma_address(sg) >> 16) >> 16); | |
88523a61 SB |
1737 | command_sg++; |
1738 | sg++; | |
1739 | } | |
1740 | } | |
1741 | ||
1742 | /* | |
1743 | * @brief Execute a drive command. | |
1744 | * | |
1745 | * return value 0 The command completed successfully. | |
1746 | * return value -1 An error occurred while executing the command. | |
1747 | */ | |
6316668f | 1748 | static int exec_drive_task(struct mtip_port *port, u8 *command) |
88523a61 SB |
1749 | { |
1750 | struct host_to_dev_fis fis; | |
1751 | struct host_to_dev_fis *reply = (port->rxfis + RX_FIS_D2H_REG); | |
9b204fbf | 1752 | unsigned int to; |
88523a61 | 1753 | |
88523a61 SB |
1754 | /* Build the FIS. */ |
1755 | memset(&fis, 0, sizeof(struct host_to_dev_fis)); | |
1756 | fis.type = 0x27; | |
1757 | fis.opts = 1 << 7; | |
1758 | fis.command = command[0]; | |
1759 | fis.features = command[1]; | |
1760 | fis.sect_count = command[2]; | |
1761 | fis.sector = command[3]; | |
1762 | fis.cyl_low = command[4]; | |
1763 | fis.cyl_hi = command[5]; | |
1764 | fis.device = command[6] & ~0x10; /* Clear the dev bit*/ | |
1765 | ||
9b204fbf AT |
1766 | mtip_set_timeout(port->dd, &fis, &to, 0); |
1767 | ||
c74b0f58 | 1768 | dbg_printk(MTIP_DRV_NAME " %s: User Command: cmd %x, feat %x, nsect %x, sect %x, lcyl %x, hcyl %x, sel %x\n", |
88523a61 SB |
1769 | __func__, |
1770 | command[0], | |
1771 | command[1], | |
1772 | command[2], | |
1773 | command[3], | |
1774 | command[4], | |
1775 | command[5], | |
1776 | command[6]); | |
1777 | ||
1778 | /* Execute the command. */ | |
1779 | if (mtip_exec_internal_command(port, | |
1780 | &fis, | |
1781 | 5, | |
1782 | 0, | |
1783 | 0, | |
1784 | 0, | |
9b204fbf | 1785 | to) < 0) { |
88523a61 SB |
1786 | return -1; |
1787 | } | |
1788 | ||
1789 | command[0] = reply->command; /* Status*/ | |
1790 | command[1] = reply->features; /* Error*/ | |
1791 | command[4] = reply->cyl_low; | |
1792 | command[5] = reply->cyl_hi; | |
1793 | ||
c74b0f58 | 1794 | dbg_printk(MTIP_DRV_NAME " %s: Completion Status: stat %x, err %x , cyl_lo %x cyl_hi %x\n", |
88523a61 SB |
1795 | __func__, |
1796 | command[0], | |
1797 | command[1], | |
1798 | command[4], | |
1799 | command[5]); | |
1800 | ||
88523a61 SB |
1801 | return 0; |
1802 | } | |
1803 | ||
1804 | /* | |
1805 | * @brief Execute a drive command. | |
1806 | * | |
1807 | * @param port Pointer to the port data structure. | |
1808 | * @param command Pointer to the user specified command parameters. | |
1809 | * @param user_buffer Pointer to the user space buffer where read sector | |
1810 | * data should be copied. | |
1811 | * | |
1812 | * return value 0 The command completed successfully. | |
1813 | * return value -EFAULT An error occurred while copying the completion | |
1814 | * data to the user space buffer. | |
1815 | * return value -1 An error occurred while executing the command. | |
1816 | */ | |
6316668f JA |
1817 | static int exec_drive_command(struct mtip_port *port, u8 *command, |
1818 | void __user *user_buffer) | |
88523a61 SB |
1819 | { |
1820 | struct host_to_dev_fis fis; | |
e602878f AT |
1821 | struct host_to_dev_fis *reply; |
1822 | u8 *buf = NULL; | |
1823 | dma_addr_t dma_addr = 0; | |
1824 | int rv = 0, xfer_sz = command[3]; | |
9b204fbf | 1825 | unsigned int to; |
e602878f AT |
1826 | |
1827 | if (xfer_sz) { | |
97651ea6 | 1828 | if (!user_buffer) |
e602878f AT |
1829 | return -EFAULT; |
1830 | ||
1831 | buf = dmam_alloc_coherent(&port->dd->pdev->dev, | |
1832 | ATA_SECT_SIZE * xfer_sz, | |
1833 | &dma_addr, | |
1834 | GFP_KERNEL); | |
1835 | if (!buf) { | |
1836 | dev_err(&port->dd->pdev->dev, | |
1837 | "Memory allocation failed (%d bytes)\n", | |
1838 | ATA_SECT_SIZE * xfer_sz); | |
1839 | return -ENOMEM; | |
1840 | } | |
1841 | memset(buf, 0, ATA_SECT_SIZE * xfer_sz); | |
1842 | } | |
88523a61 | 1843 | |
88523a61 SB |
1844 | /* Build the FIS. */ |
1845 | memset(&fis, 0, sizeof(struct host_to_dev_fis)); | |
e602878f AT |
1846 | fis.type = 0x27; |
1847 | fis.opts = 1 << 7; | |
1848 | fis.command = command[0]; | |
88523a61 SB |
1849 | fis.features = command[2]; |
1850 | fis.sect_count = command[3]; | |
1851 | if (fis.command == ATA_CMD_SMART) { | |
1852 | fis.sector = command[1]; | |
60ec0eec AT |
1853 | fis.cyl_low = 0x4F; |
1854 | fis.cyl_hi = 0xC2; | |
88523a61 SB |
1855 | } |
1856 | ||
9b204fbf AT |
1857 | mtip_set_timeout(port->dd, &fis, &to, 0); |
1858 | ||
e602878f AT |
1859 | if (xfer_sz) |
1860 | reply = (port->rxfis + RX_FIS_PIO_SETUP); | |
1861 | else | |
1862 | reply = (port->rxfis + RX_FIS_D2H_REG); | |
1863 | ||
88523a61 | 1864 | dbg_printk(MTIP_DRV_NAME |
c74b0f58 | 1865 | " %s: User Command: cmd %x, sect %x, " |
88523a61 SB |
1866 | "feat %x, sectcnt %x\n", |
1867 | __func__, | |
1868 | command[0], | |
1869 | command[1], | |
1870 | command[2], | |
1871 | command[3]); | |
1872 | ||
88523a61 SB |
1873 | /* Execute the command. */ |
1874 | if (mtip_exec_internal_command(port, | |
1875 | &fis, | |
1876 | 5, | |
e602878f AT |
1877 | (xfer_sz ? dma_addr : 0), |
1878 | (xfer_sz ? ATA_SECT_SIZE * xfer_sz : 0), | |
88523a61 | 1879 | 0, |
9b204fbf | 1880 | to) |
88523a61 | 1881 | < 0) { |
e602878f AT |
1882 | rv = -EFAULT; |
1883 | goto exit_drive_command; | |
88523a61 SB |
1884 | } |
1885 | ||
1886 | /* Collect the completion status. */ | |
1887 | command[0] = reply->command; /* Status*/ | |
1888 | command[1] = reply->features; /* Error*/ | |
e602878f | 1889 | command[2] = reply->sect_count; |
88523a61 SB |
1890 | |
1891 | dbg_printk(MTIP_DRV_NAME | |
c74b0f58 | 1892 | " %s: Completion Status: stat %x, " |
e602878f | 1893 | "err %x, nsect %x\n", |
88523a61 SB |
1894 | __func__, |
1895 | command[0], | |
1896 | command[1], | |
1897 | command[2]); | |
1898 | ||
e602878f | 1899 | if (xfer_sz) { |
88523a61 | 1900 | if (copy_to_user(user_buffer, |
e602878f | 1901 | buf, |
88523a61 | 1902 | ATA_SECT_SIZE * command[3])) { |
e602878f AT |
1903 | rv = -EFAULT; |
1904 | goto exit_drive_command; | |
88523a61 SB |
1905 | } |
1906 | } | |
e602878f AT |
1907 | exit_drive_command: |
1908 | if (buf) | |
1909 | dmam_free_coherent(&port->dd->pdev->dev, | |
1910 | ATA_SECT_SIZE * xfer_sz, buf, dma_addr); | |
1911 | return rv; | |
88523a61 SB |
1912 | } |
1913 | ||
1914 | /* | |
1915 | * Indicates whether a command has a single sector payload. | |
1916 | * | |
1917 | * @command passed to the device to perform the certain event. | |
1918 | * @features passed to the device to perform the certain event. | |
1919 | * | |
1920 | * return value | |
1921 | * 1 command is one that always has a single sector payload, | |
1922 | * regardless of the value in the Sector Count field. | |
1923 | * 0 otherwise | |
1924 | * | |
1925 | */ | |
1926 | static unsigned int implicit_sector(unsigned char command, | |
1927 | unsigned char features) | |
1928 | { | |
1929 | unsigned int rv = 0; | |
1930 | ||
1931 | /* list of commands that have an implicit sector count of 1 */ | |
1932 | switch (command) { | |
60ec0eec AT |
1933 | case ATA_CMD_SEC_SET_PASS: |
1934 | case ATA_CMD_SEC_UNLOCK: | |
1935 | case ATA_CMD_SEC_ERASE_PREP: | |
1936 | case ATA_CMD_SEC_ERASE_UNIT: | |
1937 | case ATA_CMD_SEC_FREEZE_LOCK: | |
1938 | case ATA_CMD_SEC_DISABLE_PASS: | |
1939 | case ATA_CMD_PMP_READ: | |
1940 | case ATA_CMD_PMP_WRITE: | |
88523a61 SB |
1941 | rv = 1; |
1942 | break; | |
60ec0eec AT |
1943 | case ATA_CMD_SET_MAX: |
1944 | if (features == ATA_SET_MAX_UNLOCK) | |
88523a61 SB |
1945 | rv = 1; |
1946 | break; | |
60ec0eec AT |
1947 | case ATA_CMD_SMART: |
1948 | if ((features == ATA_SMART_READ_VALUES) || | |
1949 | (features == ATA_SMART_READ_THRESHOLDS)) | |
88523a61 SB |
1950 | rv = 1; |
1951 | break; | |
60ec0eec AT |
1952 | case ATA_CMD_CONF_OVERLAY: |
1953 | if ((features == ATA_DCO_IDENTIFY) || | |
1954 | (features == ATA_DCO_SET)) | |
88523a61 SB |
1955 | rv = 1; |
1956 | break; | |
1957 | } | |
1958 | return rv; | |
1959 | } | |
2df7aa96 | 1960 | |
88523a61 SB |
1961 | /* |
1962 | * Executes a taskfile | |
1963 | * See ide_taskfile_ioctl() for derivation | |
1964 | */ | |
1965 | static int exec_drive_taskfile(struct driver_data *dd, | |
ef0f1587 JA |
1966 | void __user *buf, |
1967 | ide_task_request_t *req_task, | |
1968 | int outtotal) | |
88523a61 SB |
1969 | { |
1970 | struct host_to_dev_fis fis; | |
1971 | struct host_to_dev_fis *reply; | |
88523a61 SB |
1972 | u8 *outbuf = NULL; |
1973 | u8 *inbuf = NULL; | |
16d02c04 JA |
1974 | dma_addr_t outbuf_dma = 0; |
1975 | dma_addr_t inbuf_dma = 0; | |
1976 | dma_addr_t dma_buffer = 0; | |
88523a61 | 1977 | int err = 0; |
88523a61 SB |
1978 | unsigned int taskin = 0; |
1979 | unsigned int taskout = 0; | |
1980 | u8 nsect = 0; | |
2df7aa96 | 1981 | unsigned int timeout; |
88523a61 SB |
1982 | unsigned int force_single_sector; |
1983 | unsigned int transfer_size; | |
1984 | unsigned long task_file_data; | |
ef0f1587 | 1985 | int intotal = outtotal + req_task->out_size; |
4453bc88 | 1986 | int erasemode = 0; |
88523a61 SB |
1987 | |
1988 | taskout = req_task->out_size; | |
1989 | taskin = req_task->in_size; | |
1990 | /* 130560 = 512 * 0xFF*/ | |
b425b020 SS |
1991 | if (taskin > 130560 || taskout > 130560) |
1992 | return -EINVAL; | |
88523a61 SB |
1993 | |
1994 | if (taskout) { | |
8ed6010d | 1995 | outbuf = memdup_user(buf + outtotal, taskout); |
b425b020 SS |
1996 | if (IS_ERR(outbuf)) |
1997 | return PTR_ERR(outbuf); | |
1998 | ||
88523a61 SB |
1999 | outbuf_dma = pci_map_single(dd->pdev, |
2000 | outbuf, | |
2001 | taskout, | |
2002 | DMA_TO_DEVICE); | |
5173cb81 | 2003 | if (pci_dma_mapping_error(dd->pdev, outbuf_dma)) { |
88523a61 SB |
2004 | err = -ENOMEM; |
2005 | goto abort; | |
2006 | } | |
2007 | dma_buffer = outbuf_dma; | |
2008 | } | |
2009 | ||
2010 | if (taskin) { | |
8ed6010d AV |
2011 | inbuf = memdup_user(buf + intotal, taskin); |
2012 | if (IS_ERR(inbuf)) { | |
2013 | err = PTR_ERR(inbuf); | |
2014 | inbuf = NULL; | |
88523a61 SB |
2015 | goto abort; |
2016 | } | |
2017 | inbuf_dma = pci_map_single(dd->pdev, | |
2018 | inbuf, | |
2019 | taskin, DMA_FROM_DEVICE); | |
5173cb81 | 2020 | if (pci_dma_mapping_error(dd->pdev, inbuf_dma)) { |
88523a61 SB |
2021 | err = -ENOMEM; |
2022 | goto abort; | |
2023 | } | |
2024 | dma_buffer = inbuf_dma; | |
2025 | } | |
2026 | ||
2027 | /* only supports PIO and non-data commands from this ioctl. */ | |
2028 | switch (req_task->data_phase) { | |
2029 | case TASKFILE_OUT: | |
2030 | nsect = taskout / ATA_SECT_SIZE; | |
2031 | reply = (dd->port->rxfis + RX_FIS_PIO_SETUP); | |
2032 | break; | |
2033 | case TASKFILE_IN: | |
2034 | reply = (dd->port->rxfis + RX_FIS_PIO_SETUP); | |
2035 | break; | |
2036 | case TASKFILE_NO_DATA: | |
2037 | reply = (dd->port->rxfis + RX_FIS_D2H_REG); | |
2038 | break; | |
2039 | default: | |
2040 | err = -EINVAL; | |
2041 | goto abort; | |
2042 | } | |
2043 | ||
88523a61 SB |
2044 | /* Build the FIS. */ |
2045 | memset(&fis, 0, sizeof(struct host_to_dev_fis)); | |
2046 | ||
2047 | fis.type = 0x27; | |
2048 | fis.opts = 1 << 7; | |
2049 | fis.command = req_task->io_ports[7]; | |
2050 | fis.features = req_task->io_ports[1]; | |
2051 | fis.sect_count = req_task->io_ports[2]; | |
2052 | fis.lba_low = req_task->io_ports[3]; | |
2053 | fis.lba_mid = req_task->io_ports[4]; | |
2054 | fis.lba_hi = req_task->io_ports[5]; | |
2055 | /* Clear the dev bit*/ | |
2056 | fis.device = req_task->io_ports[6] & ~0x10; | |
2057 | ||
2058 | if ((req_task->in_flags.all == 0) && (req_task->out_flags.all & 1)) { | |
2059 | req_task->in_flags.all = | |
2060 | IDE_TASKFILE_STD_IN_FLAGS | | |
2061 | (IDE_HOB_STD_IN_FLAGS << 8); | |
2062 | fis.lba_low_ex = req_task->hob_ports[3]; | |
2063 | fis.lba_mid_ex = req_task->hob_ports[4]; | |
2064 | fis.lba_hi_ex = req_task->hob_ports[5]; | |
2065 | fis.features_ex = req_task->hob_ports[1]; | |
2066 | fis.sect_cnt_ex = req_task->hob_ports[2]; | |
2067 | ||
2068 | } else { | |
2069 | req_task->in_flags.all = IDE_TASKFILE_STD_IN_FLAGS; | |
2070 | } | |
2071 | ||
2072 | force_single_sector = implicit_sector(fis.command, fis.features); | |
2073 | ||
2074 | if ((taskin || taskout) && (!fis.sect_count)) { | |
2075 | if (nsect) | |
2076 | fis.sect_count = nsect; | |
2077 | else { | |
2078 | if (!force_single_sector) { | |
2079 | dev_warn(&dd->pdev->dev, | |
2080 | "data movement but " | |
2081 | "sect_count is 0\n"); | |
88523a61 SB |
2082 | err = -EINVAL; |
2083 | goto abort; | |
2084 | } | |
2085 | } | |
2086 | } | |
2087 | ||
2088 | dbg_printk(MTIP_DRV_NAME | |
c74b0f58 | 2089 | " %s: cmd %x, feat %x, nsect %x," |
88523a61 SB |
2090 | " sect/lbal %x, lcyl/lbam %x, hcyl/lbah %x," |
2091 | " head/dev %x\n", | |
c74b0f58 | 2092 | __func__, |
88523a61 SB |
2093 | fis.command, |
2094 | fis.features, | |
2095 | fis.sect_count, | |
2096 | fis.lba_low, | |
2097 | fis.lba_mid, | |
2098 | fis.lba_hi, | |
2099 | fis.device); | |
2100 | ||
4453bc88 | 2101 | /* check for erase mode support during secure erase.*/ |
3208795e SM |
2102 | if ((fis.command == ATA_CMD_SEC_ERASE_UNIT) && outbuf && |
2103 | (outbuf[0] & MTIP_SEC_ERASE_MODE)) { | |
4453bc88 SM |
2104 | erasemode = 1; |
2105 | } | |
2106 | ||
2107 | mtip_set_timeout(dd, &fis, &timeout, erasemode); | |
88523a61 SB |
2108 | |
2109 | /* Determine the correct transfer size.*/ | |
2110 | if (force_single_sector) | |
2111 | transfer_size = ATA_SECT_SIZE; | |
2112 | else | |
2113 | transfer_size = ATA_SECT_SIZE * fis.sect_count; | |
2114 | ||
2115 | /* Execute the command.*/ | |
2116 | if (mtip_exec_internal_command(dd->port, | |
2117 | &fis, | |
2118 | 5, | |
2119 | dma_buffer, | |
2120 | transfer_size, | |
2121 | 0, | |
88523a61 | 2122 | timeout) < 0) { |
88523a61 SB |
2123 | err = -EIO; |
2124 | goto abort; | |
2125 | } | |
2126 | ||
2127 | task_file_data = readl(dd->port->mmio+PORT_TFDATA); | |
2128 | ||
2129 | if ((req_task->data_phase == TASKFILE_IN) && !(task_file_data & 1)) { | |
2130 | reply = dd->port->rxfis + RX_FIS_PIO_SETUP; | |
2131 | req_task->io_ports[7] = reply->control; | |
2132 | } else { | |
2133 | reply = dd->port->rxfis + RX_FIS_D2H_REG; | |
2134 | req_task->io_ports[7] = reply->command; | |
2135 | } | |
2136 | ||
2137 | /* reclaim the DMA buffers.*/ | |
2138 | if (inbuf_dma) | |
2139 | pci_unmap_single(dd->pdev, inbuf_dma, | |
2140 | taskin, DMA_FROM_DEVICE); | |
2141 | if (outbuf_dma) | |
2142 | pci_unmap_single(dd->pdev, outbuf_dma, | |
2143 | taskout, DMA_TO_DEVICE); | |
16d02c04 JA |
2144 | inbuf_dma = 0; |
2145 | outbuf_dma = 0; | |
88523a61 SB |
2146 | |
2147 | /* return the ATA registers to the caller.*/ | |
2148 | req_task->io_ports[1] = reply->features; | |
2149 | req_task->io_ports[2] = reply->sect_count; | |
2150 | req_task->io_ports[3] = reply->lba_low; | |
2151 | req_task->io_ports[4] = reply->lba_mid; | |
2152 | req_task->io_ports[5] = reply->lba_hi; | |
2153 | req_task->io_ports[6] = reply->device; | |
2154 | ||
2155 | if (req_task->out_flags.all & 1) { | |
2156 | ||
2157 | req_task->hob_ports[3] = reply->lba_low_ex; | |
2158 | req_task->hob_ports[4] = reply->lba_mid_ex; | |
2159 | req_task->hob_ports[5] = reply->lba_hi_ex; | |
2160 | req_task->hob_ports[1] = reply->features_ex; | |
2161 | req_task->hob_ports[2] = reply->sect_cnt_ex; | |
2162 | } | |
88523a61 | 2163 | dbg_printk(MTIP_DRV_NAME |
c74b0f58 | 2164 | " %s: Completion: stat %x," |
88523a61 SB |
2165 | "err %x, sect_cnt %x, lbalo %x," |
2166 | "lbamid %x, lbahi %x, dev %x\n", | |
2167 | __func__, | |
2168 | req_task->io_ports[7], | |
2169 | req_task->io_ports[1], | |
2170 | req_task->io_ports[2], | |
2171 | req_task->io_ports[3], | |
2172 | req_task->io_ports[4], | |
2173 | req_task->io_ports[5], | |
2174 | req_task->io_ports[6]); | |
2175 | ||
88523a61 SB |
2176 | if (taskout) { |
2177 | if (copy_to_user(buf + outtotal, outbuf, taskout)) { | |
2178 | err = -EFAULT; | |
2179 | goto abort; | |
2180 | } | |
2181 | } | |
2182 | if (taskin) { | |
2183 | if (copy_to_user(buf + intotal, inbuf, taskin)) { | |
2184 | err = -EFAULT; | |
2185 | goto abort; | |
2186 | } | |
2187 | } | |
2188 | abort: | |
2189 | if (inbuf_dma) | |
2190 | pci_unmap_single(dd->pdev, inbuf_dma, | |
2191 | taskin, DMA_FROM_DEVICE); | |
2192 | if (outbuf_dma) | |
2193 | pci_unmap_single(dd->pdev, outbuf_dma, | |
2194 | taskout, DMA_TO_DEVICE); | |
88523a61 SB |
2195 | kfree(outbuf); |
2196 | kfree(inbuf); | |
2197 | ||
2198 | return err; | |
2199 | } | |
2200 | ||
2201 | /* | |
2202 | * Handle IOCTL calls from the Block Layer. | |
2203 | * | |
2204 | * This function is called by the Block Layer when it receives an IOCTL | |
2205 | * command that it does not understand. If the IOCTL command is not supported | |
2206 | * this function returns -ENOTTY. | |
2207 | * | |
2208 | * @dd Pointer to the driver data structure. | |
2209 | * @cmd IOCTL command passed from the Block Layer. | |
2210 | * @arg IOCTL argument passed from the Block Layer. | |
2211 | * | |
2212 | * return value | |
2213 | * 0 The IOCTL completed successfully. | |
2214 | * -ENOTTY The specified command is not supported. | |
2215 | * -EFAULT An error occurred copying data to a user space buffer. | |
2216 | * -EIO An error occurred while executing the command. | |
2217 | */ | |
ef0f1587 JA |
2218 | static int mtip_hw_ioctl(struct driver_data *dd, unsigned int cmd, |
2219 | unsigned long arg) | |
88523a61 SB |
2220 | { |
2221 | switch (cmd) { | |
2222 | case HDIO_GET_IDENTITY: | |
971890f2 AT |
2223 | { |
2224 | if (copy_to_user((void __user *)arg, dd->port->identify, | |
2225 | sizeof(u16) * ATA_ID_WORDS)) | |
2226 | return -EFAULT; | |
88523a61 | 2227 | break; |
971890f2 | 2228 | } |
88523a61 SB |
2229 | case HDIO_DRIVE_CMD: |
2230 | { | |
2231 | u8 drive_command[4]; | |
2232 | ||
2233 | /* Copy the user command info to our buffer. */ | |
2234 | if (copy_from_user(drive_command, | |
2235 | (void __user *) arg, | |
2236 | sizeof(drive_command))) | |
2237 | return -EFAULT; | |
2238 | ||
2239 | /* Execute the drive command. */ | |
2240 | if (exec_drive_command(dd->port, | |
2241 | drive_command, | |
2242 | (void __user *) (arg+4))) | |
2243 | return -EIO; | |
2244 | ||
2245 | /* Copy the status back to the users buffer. */ | |
2246 | if (copy_to_user((void __user *) arg, | |
2247 | drive_command, | |
2248 | sizeof(drive_command))) | |
2249 | return -EFAULT; | |
2250 | ||
2251 | break; | |
2252 | } | |
2253 | case HDIO_DRIVE_TASK: | |
2254 | { | |
2255 | u8 drive_command[7]; | |
2256 | ||
2257 | /* Copy the user command info to our buffer. */ | |
2258 | if (copy_from_user(drive_command, | |
2259 | (void __user *) arg, | |
2260 | sizeof(drive_command))) | |
2261 | return -EFAULT; | |
2262 | ||
2263 | /* Execute the drive command. */ | |
2264 | if (exec_drive_task(dd->port, drive_command)) | |
2265 | return -EIO; | |
2266 | ||
2267 | /* Copy the status back to the users buffer. */ | |
2268 | if (copy_to_user((void __user *) arg, | |
2269 | drive_command, | |
2270 | sizeof(drive_command))) | |
2271 | return -EFAULT; | |
2272 | ||
2273 | break; | |
2274 | } | |
ef0f1587 JA |
2275 | case HDIO_DRIVE_TASKFILE: { |
2276 | ide_task_request_t req_task; | |
2277 | int ret, outtotal; | |
2278 | ||
2279 | if (copy_from_user(&req_task, (void __user *) arg, | |
2280 | sizeof(req_task))) | |
2281 | return -EFAULT; | |
2282 | ||
2283 | outtotal = sizeof(req_task); | |
2284 | ||
2285 | ret = exec_drive_taskfile(dd, (void __user *) arg, | |
2286 | &req_task, outtotal); | |
2287 | ||
60ec0eec AT |
2288 | if (copy_to_user((void __user *) arg, &req_task, |
2289 | sizeof(req_task))) | |
ef0f1587 JA |
2290 | return -EFAULT; |
2291 | ||
2292 | return ret; | |
2293 | } | |
88523a61 SB |
2294 | |
2295 | default: | |
2296 | return -EINVAL; | |
2297 | } | |
2298 | return 0; | |
2299 | } | |
2300 | ||
2301 | /* | |
2302 | * Submit an IO to the hw | |
2303 | * | |
2304 | * This function is called by the block layer to issue an io | |
2305 | * to the device. Upon completion, the callback function will | |
2306 | * be called with the data parameter passed as the callback data. | |
2307 | * | |
2308 | * @dd Pointer to the driver data structure. | |
2309 | * @start First sector to read. | |
2310 | * @nsect Number of sectors to read. | |
2311 | * @nents Number of entries in scatter list for the read command. | |
2312 | * @tag The tag of this read command. | |
2313 | * @callback Pointer to the function that should be called | |
2314 | * when the read completes. | |
2315 | * @data Callback data passed to the callback function | |
2316 | * when the read completes. | |
88523a61 SB |
2317 | * @dir Direction (read or write) |
2318 | * | |
2319 | * return value | |
2320 | * None | |
2321 | */ | |
ffc771b3 JA |
2322 | static void mtip_hw_submit_io(struct driver_data *dd, struct request *rq, |
2323 | struct mtip_cmd *command, int nents, | |
2324 | struct blk_mq_hw_ctx *hctx) | |
88523a61 SB |
2325 | { |
2326 | struct host_to_dev_fis *fis; | |
2327 | struct mtip_port *port = dd->port; | |
ffc771b3 JA |
2328 | int dma_dir = rq_data_dir(rq) == READ ? DMA_FROM_DEVICE : DMA_TO_DEVICE; |
2329 | u64 start = blk_rq_pos(rq); | |
2330 | unsigned int nsect = blk_rq_sectors(rq); | |
88523a61 SB |
2331 | |
2332 | /* Map the scatter list for DMA access */ | |
45038367 | 2333 | nents = dma_map_sg(&dd->pdev->dev, command->sg, nents, dma_dir); |
88523a61 | 2334 | |
f45c40a9 SB |
2335 | prefetch(&port->flags); |
2336 | ||
88523a61 SB |
2337 | command->scatter_ents = nents; |
2338 | ||
2339 | /* | |
2340 | * The number of retries for this command before it is | |
2341 | * reported as a failure to the upper layers. | |
2342 | */ | |
2343 | command->retries = MTIP_MAX_RETRIES; | |
2344 | ||
2345 | /* Fill out fis */ | |
2346 | fis = command->command; | |
2347 | fis->type = 0x27; | |
2348 | fis->opts = 1 << 7; | |
f45c40a9 | 2349 | if (dma_dir == DMA_FROM_DEVICE) |
ffc771b3 JA |
2350 | fis->command = ATA_CMD_FPDMA_READ; |
2351 | else | |
2352 | fis->command = ATA_CMD_FPDMA_WRITE; | |
eda45314 SM |
2353 | fis->lba_low = start & 0xFF; |
2354 | fis->lba_mid = (start >> 8) & 0xFF; | |
2355 | fis->lba_hi = (start >> 16) & 0xFF; | |
2356 | fis->lba_low_ex = (start >> 24) & 0xFF; | |
2357 | fis->lba_mid_ex = (start >> 32) & 0xFF; | |
2358 | fis->lba_hi_ex = (start >> 40) & 0xFF; | |
88523a61 | 2359 | fis->device = 1 << 6; |
60ec0eec AT |
2360 | fis->features = nsect & 0xFF; |
2361 | fis->features_ex = (nsect >> 8) & 0xFF; | |
ffc771b3 | 2362 | fis->sect_count = ((rq->tag << 3) | (rq->tag >> 5)); |
88523a61 SB |
2363 | fis->sect_cnt_ex = 0; |
2364 | fis->control = 0; | |
2365 | fis->res2 = 0; | |
2366 | fis->res3 = 0; | |
2367 | fill_command_sg(dd, command, nents); | |
2368 | ||
f45c40a9 | 2369 | if (unlikely(command->unaligned)) |
2077d947 AT |
2370 | fis->device |= 1 << 7; |
2371 | ||
88523a61 | 2372 | /* Populate the command header */ |
60ec0eec AT |
2373 | command->command_header->opts = |
2374 | __force_bit2int cpu_to_le32( | |
2375 | (nents << 16) | 5 | AHCI_CMD_PREFETCH); | |
88523a61 SB |
2376 | command->command_header->byte_count = 0; |
2377 | ||
2378 | /* | |
2379 | * Set the completion function and data for the command | |
2380 | * within this layer. | |
2381 | */ | |
2382 | command->comp_data = dd; | |
2383 | command->comp_func = mtip_async_complete; | |
45038367 | 2384 | command->direction = dma_dir; |
88523a61 | 2385 | |
88523a61 | 2386 | /* |
60ec0eec AT |
2387 | * To prevent this command from being issued |
2388 | * if an internal command is in progress or error handling is active. | |
88523a61 | 2389 | */ |
f45c40a9 | 2390 | if (unlikely(port->flags & MTIP_PF_PAUSE_IO)) { |
ffc771b3 | 2391 | set_bit(rq->tag, port->cmds_to_issue); |
8a857a88 | 2392 | set_bit(MTIP_PF_ISSUE_CMDS_BIT, &port->flags); |
60ec0eec AT |
2393 | return; |
2394 | } | |
88523a61 SB |
2395 | |
2396 | /* Issue the command to the hardware */ | |
ffc771b3 | 2397 | mtip_issue_ncq_command(port, rq->tag); |
88523a61 SB |
2398 | } |
2399 | ||
2400 | /* | |
7412ff13 | 2401 | * Sysfs status dump. |
88523a61 SB |
2402 | * |
2403 | * @dev Pointer to the device structure, passed by the kernrel. | |
2404 | * @attr Pointer to the device_attribute structure passed by the kernel. | |
2405 | * @buf Pointer to the char buffer that will receive the stats info. | |
2406 | * | |
2407 | * return value | |
2408 | * The size, in bytes, of the data copied into buf. | |
2409 | */ | |
f6587217 AT |
2410 | static ssize_t mtip_hw_show_status(struct device *dev, |
2411 | struct device_attribute *attr, | |
2412 | char *buf) | |
2413 | { | |
2414 | struct driver_data *dd = dev_to_disk(dev)->private_data; | |
2415 | int size = 0; | |
2416 | ||
8a857a88 | 2417 | if (test_bit(MTIP_DDF_OVER_TEMP_BIT, &dd->dd_flag)) |
f6587217 | 2418 | size += sprintf(buf, "%s", "thermal_shutdown\n"); |
8a857a88 | 2419 | else if (test_bit(MTIP_DDF_WRITE_PROTECT_BIT, &dd->dd_flag)) |
f6587217 AT |
2420 | size += sprintf(buf, "%s", "write_protect\n"); |
2421 | else | |
2422 | size += sprintf(buf, "%s", "online\n"); | |
2423 | ||
2424 | return size; | |
2425 | } | |
2426 | ||
f6587217 | 2427 | static DEVICE_ATTR(status, S_IRUGO, mtip_hw_show_status, NULL); |
88523a61 | 2428 | |
0caff003 AT |
2429 | /* debugsfs entries */ |
2430 | ||
2431 | static ssize_t show_device_status(struct device_driver *drv, char *buf) | |
2432 | { | |
2433 | int size = 0; | |
2434 | struct driver_data *dd, *tmp; | |
2435 | unsigned long flags; | |
2436 | char id_buf[42]; | |
2437 | u16 status = 0; | |
2438 | ||
2439 | spin_lock_irqsave(&dev_lock, flags); | |
2440 | size += sprintf(&buf[size], "Devices Present:\n"); | |
2441 | list_for_each_entry_safe(dd, tmp, &online_list, online_list) { | |
c66bb3f0 | 2442 | if (dd->pdev) { |
0caff003 AT |
2443 | if (dd->port && |
2444 | dd->port->identify && | |
2445 | dd->port->identify_valid) { | |
2446 | strlcpy(id_buf, | |
2447 | (char *) (dd->port->identify + 10), 21); | |
2448 | status = *(dd->port->identify + 141); | |
2449 | } else { | |
2450 | memset(id_buf, 0, 42); | |
2451 | status = 0; | |
2452 | } | |
2453 | ||
2454 | if (dd->port && | |
2455 | test_bit(MTIP_PF_REBUILD_BIT, &dd->port->flags)) { | |
2456 | size += sprintf(&buf[size], | |
2457 | " device %s %s (ftl rebuild %d %%)\n", | |
2458 | dev_name(&dd->pdev->dev), | |
2459 | id_buf, | |
2460 | status); | |
2461 | } else { | |
2462 | size += sprintf(&buf[size], | |
2463 | " device %s %s\n", | |
2464 | dev_name(&dd->pdev->dev), | |
2465 | id_buf); | |
2466 | } | |
2467 | } | |
2468 | } | |
2469 | ||
2470 | size += sprintf(&buf[size], "Devices Being Removed:\n"); | |
2471 | list_for_each_entry_safe(dd, tmp, &removing_list, remove_list) { | |
c66bb3f0 | 2472 | if (dd->pdev) { |
0caff003 AT |
2473 | if (dd->port && |
2474 | dd->port->identify && | |
2475 | dd->port->identify_valid) { | |
2476 | strlcpy(id_buf, | |
2477 | (char *) (dd->port->identify+10), 21); | |
2478 | status = *(dd->port->identify + 141); | |
2479 | } else { | |
2480 | memset(id_buf, 0, 42); | |
2481 | status = 0; | |
2482 | } | |
2483 | ||
2484 | if (dd->port && | |
2485 | test_bit(MTIP_PF_REBUILD_BIT, &dd->port->flags)) { | |
2486 | size += sprintf(&buf[size], | |
2487 | " device %s %s (ftl rebuild %d %%)\n", | |
2488 | dev_name(&dd->pdev->dev), | |
2489 | id_buf, | |
2490 | status); | |
2491 | } else { | |
2492 | size += sprintf(&buf[size], | |
2493 | " device %s %s\n", | |
2494 | dev_name(&dd->pdev->dev), | |
2495 | id_buf); | |
2496 | } | |
2497 | } | |
2498 | } | |
2499 | spin_unlock_irqrestore(&dev_lock, flags); | |
2500 | ||
2501 | return size; | |
2502 | } | |
2503 | ||
2504 | static ssize_t mtip_hw_read_device_status(struct file *f, char __user *ubuf, | |
2505 | size_t len, loff_t *offset) | |
2506 | { | |
c8afd0dc | 2507 | struct driver_data *dd = (struct driver_data *)f->private_data; |
0caff003 | 2508 | int size = *offset; |
c8afd0dc DM |
2509 | char *buf; |
2510 | int rv = 0; | |
0caff003 AT |
2511 | |
2512 | if (!len || *offset) | |
2513 | return 0; | |
2514 | ||
c8afd0dc DM |
2515 | buf = kzalloc(MTIP_DFS_MAX_BUF_SIZE, GFP_KERNEL); |
2516 | if (!buf) { | |
2517 | dev_err(&dd->pdev->dev, | |
2518 | "Memory allocation: status buffer\n"); | |
2519 | return -ENOMEM; | |
2520 | } | |
2521 | ||
0caff003 AT |
2522 | size += show_device_status(NULL, buf); |
2523 | ||
2524 | *offset = size <= len ? size : len; | |
2525 | size = copy_to_user(ubuf, buf, *offset); | |
2526 | if (size) | |
c8afd0dc | 2527 | rv = -EFAULT; |
0caff003 | 2528 | |
c8afd0dc DM |
2529 | kfree(buf); |
2530 | return rv ? rv : *offset; | |
0caff003 AT |
2531 | } |
2532 | ||
7b421d24 AT |
2533 | static ssize_t mtip_hw_read_registers(struct file *f, char __user *ubuf, |
2534 | size_t len, loff_t *offset) | |
2535 | { | |
2536 | struct driver_data *dd = (struct driver_data *)f->private_data; | |
c8afd0dc | 2537 | char *buf; |
7b421d24 AT |
2538 | u32 group_allocated; |
2539 | int size = *offset; | |
c8afd0dc | 2540 | int n, rv = 0; |
7b421d24 AT |
2541 | |
2542 | if (!len || size) | |
2543 | return 0; | |
2544 | ||
c8afd0dc DM |
2545 | buf = kzalloc(MTIP_DFS_MAX_BUF_SIZE, GFP_KERNEL); |
2546 | if (!buf) { | |
2547 | dev_err(&dd->pdev->dev, | |
2548 | "Memory allocation: register buffer\n"); | |
2549 | return -ENOMEM; | |
2550 | } | |
2551 | ||
7b421d24 AT |
2552 | size += sprintf(&buf[size], "H/ S ACTive : [ 0x"); |
2553 | ||
2554 | for (n = dd->slot_groups-1; n >= 0; n--) | |
2555 | size += sprintf(&buf[size], "%08X ", | |
2556 | readl(dd->port->s_active[n])); | |
2557 | ||
2558 | size += sprintf(&buf[size], "]\n"); | |
2559 | size += sprintf(&buf[size], "H/ Command Issue : [ 0x"); | |
2560 | ||
2561 | for (n = dd->slot_groups-1; n >= 0; n--) | |
2562 | size += sprintf(&buf[size], "%08X ", | |
2563 | readl(dd->port->cmd_issue[n])); | |
2564 | ||
2565 | size += sprintf(&buf[size], "]\n"); | |
2566 | size += sprintf(&buf[size], "H/ Completed : [ 0x"); | |
2567 | ||
2568 | for (n = dd->slot_groups-1; n >= 0; n--) | |
2569 | size += sprintf(&buf[size], "%08X ", | |
2570 | readl(dd->port->completed[n])); | |
2571 | ||
2572 | size += sprintf(&buf[size], "]\n"); | |
2573 | size += sprintf(&buf[size], "H/ PORT IRQ STAT : [ 0x%08X ]\n", | |
2574 | readl(dd->port->mmio + PORT_IRQ_STAT)); | |
2575 | size += sprintf(&buf[size], "H/ HOST IRQ STAT : [ 0x%08X ]\n", | |
2576 | readl(dd->mmio + HOST_IRQ_STAT)); | |
2577 | size += sprintf(&buf[size], "\n"); | |
2578 | ||
7b421d24 AT |
2579 | size += sprintf(&buf[size], "L/ Commands in Q : [ 0x"); |
2580 | ||
2581 | for (n = dd->slot_groups-1; n >= 0; n--) { | |
2582 | if (sizeof(long) > sizeof(u32)) | |
2583 | group_allocated = | |
2584 | dd->port->cmds_to_issue[n/2] >> (32*(n&1)); | |
2585 | else | |
2586 | group_allocated = dd->port->cmds_to_issue[n]; | |
2587 | size += sprintf(&buf[size], "%08X ", group_allocated); | |
2588 | } | |
2589 | size += sprintf(&buf[size], "]\n"); | |
2590 | ||
2591 | *offset = size <= len ? size : len; | |
2592 | size = copy_to_user(ubuf, buf, *offset); | |
2593 | if (size) | |
c8afd0dc | 2594 | rv = -EFAULT; |
7b421d24 | 2595 | |
c8afd0dc DM |
2596 | kfree(buf); |
2597 | return rv ? rv : *offset; | |
7b421d24 AT |
2598 | } |
2599 | ||
2600 | static ssize_t mtip_hw_read_flags(struct file *f, char __user *ubuf, | |
2601 | size_t len, loff_t *offset) | |
2602 | { | |
2603 | struct driver_data *dd = (struct driver_data *)f->private_data; | |
c8afd0dc | 2604 | char *buf; |
7b421d24 | 2605 | int size = *offset; |
c8afd0dc | 2606 | int rv = 0; |
7b421d24 AT |
2607 | |
2608 | if (!len || size) | |
2609 | return 0; | |
2610 | ||
c8afd0dc DM |
2611 | buf = kzalloc(MTIP_DFS_MAX_BUF_SIZE, GFP_KERNEL); |
2612 | if (!buf) { | |
2613 | dev_err(&dd->pdev->dev, | |
2614 | "Memory allocation: flag buffer\n"); | |
2615 | return -ENOMEM; | |
2616 | } | |
2617 | ||
7b421d24 AT |
2618 | size += sprintf(&buf[size], "Flag-port : [ %08lX ]\n", |
2619 | dd->port->flags); | |
2620 | size += sprintf(&buf[size], "Flag-dd : [ %08lX ]\n", | |
2621 | dd->dd_flag); | |
2622 | ||
2623 | *offset = size <= len ? size : len; | |
2624 | size = copy_to_user(ubuf, buf, *offset); | |
2625 | if (size) | |
c8afd0dc | 2626 | rv = -EFAULT; |
7b421d24 | 2627 | |
c8afd0dc DM |
2628 | kfree(buf); |
2629 | return rv ? rv : *offset; | |
7b421d24 AT |
2630 | } |
2631 | ||
0caff003 AT |
2632 | static const struct file_operations mtip_device_status_fops = { |
2633 | .owner = THIS_MODULE, | |
2634 | .open = simple_open, | |
2635 | .read = mtip_hw_read_device_status, | |
2636 | .llseek = no_llseek, | |
2637 | }; | |
2638 | ||
7b421d24 AT |
2639 | static const struct file_operations mtip_regs_fops = { |
2640 | .owner = THIS_MODULE, | |
2641 | .open = simple_open, | |
2642 | .read = mtip_hw_read_registers, | |
2643 | .llseek = no_llseek, | |
2644 | }; | |
2645 | ||
2646 | static const struct file_operations mtip_flags_fops = { | |
2647 | .owner = THIS_MODULE, | |
2648 | .open = simple_open, | |
2649 | .read = mtip_hw_read_flags, | |
2650 | .llseek = no_llseek, | |
2651 | }; | |
2652 | ||
88523a61 SB |
2653 | /* |
2654 | * Create the sysfs related attributes. | |
2655 | * | |
2656 | * @dd Pointer to the driver data structure. | |
2657 | * @kobj Pointer to the kobj for the block device. | |
2658 | * | |
2659 | * return value | |
2660 | * 0 Operation completed successfully. | |
2661 | * -EINVAL Invalid parameter. | |
2662 | */ | |
6316668f | 2663 | static int mtip_hw_sysfs_init(struct driver_data *dd, struct kobject *kobj) |
88523a61 SB |
2664 | { |
2665 | if (!kobj || !dd) | |
2666 | return -EINVAL; | |
2667 | ||
f6587217 AT |
2668 | if (sysfs_create_file(kobj, &dev_attr_status.attr)) |
2669 | dev_warn(&dd->pdev->dev, | |
2670 | "Error creating 'status' sysfs entry\n"); | |
88523a61 SB |
2671 | return 0; |
2672 | } | |
2673 | ||
2674 | /* | |
2675 | * Remove the sysfs related attributes. | |
2676 | * | |
2677 | * @dd Pointer to the driver data structure. | |
2678 | * @kobj Pointer to the kobj for the block device. | |
2679 | * | |
2680 | * return value | |
2681 | * 0 Operation completed successfully. | |
2682 | * -EINVAL Invalid parameter. | |
2683 | */ | |
6316668f | 2684 | static int mtip_hw_sysfs_exit(struct driver_data *dd, struct kobject *kobj) |
88523a61 SB |
2685 | { |
2686 | if (!kobj || !dd) | |
2687 | return -EINVAL; | |
2688 | ||
f6587217 | 2689 | sysfs_remove_file(kobj, &dev_attr_status.attr); |
88523a61 SB |
2690 | |
2691 | return 0; | |
2692 | } | |
2693 | ||
7b421d24 AT |
2694 | static int mtip_hw_debugfs_init(struct driver_data *dd) |
2695 | { | |
2696 | if (!dfs_parent) | |
2697 | return -1; | |
2698 | ||
2699 | dd->dfs_node = debugfs_create_dir(dd->disk->disk_name, dfs_parent); | |
2700 | if (IS_ERR_OR_NULL(dd->dfs_node)) { | |
2701 | dev_warn(&dd->pdev->dev, | |
2702 | "Error creating node %s under debugfs\n", | |
2703 | dd->disk->disk_name); | |
2704 | dd->dfs_node = NULL; | |
2705 | return -1; | |
2706 | } | |
2707 | ||
2708 | debugfs_create_file("flags", S_IRUGO, dd->dfs_node, dd, | |
2709 | &mtip_flags_fops); | |
2710 | debugfs_create_file("registers", S_IRUGO, dd->dfs_node, dd, | |
2711 | &mtip_regs_fops); | |
2712 | ||
2713 | return 0; | |
2714 | } | |
2715 | ||
2716 | static void mtip_hw_debugfs_exit(struct driver_data *dd) | |
2717 | { | |
974a51a2 SB |
2718 | if (dd->dfs_node) |
2719 | debugfs_remove_recursive(dd->dfs_node); | |
7b421d24 AT |
2720 | } |
2721 | ||
88523a61 SB |
2722 | /* |
2723 | * Perform any init/resume time hardware setup | |
2724 | * | |
2725 | * @dd Pointer to the driver data structure. | |
2726 | * | |
2727 | * return value | |
2728 | * None | |
2729 | */ | |
2730 | static inline void hba_setup(struct driver_data *dd) | |
2731 | { | |
2732 | u32 hwdata; | |
2733 | hwdata = readl(dd->mmio + HOST_HSORG); | |
2734 | ||
2735 | /* interrupt bug workaround: use only 1 IS bit.*/ | |
2736 | writel(hwdata | | |
2737 | HSORG_DISABLE_SLOTGRP_INTR | | |
2738 | HSORG_DISABLE_SLOTGRP_PXIS, | |
2739 | dd->mmio + HOST_HSORG); | |
2740 | } | |
2741 | ||
2077d947 AT |
2742 | static int mtip_device_unaligned_constrained(struct driver_data *dd) |
2743 | { | |
2744 | return (dd->pdev->device == P420M_DEVICE_ID ? 1 : 0); | |
2745 | } | |
2746 | ||
88523a61 SB |
2747 | /* |
2748 | * Detect the details of the product, and store anything needed | |
2749 | * into the driver data structure. This includes product type and | |
2750 | * version and number of slot groups. | |
2751 | * | |
2752 | * @dd Pointer to the driver data structure. | |
2753 | * | |
2754 | * return value | |
2755 | * None | |
2756 | */ | |
2757 | static void mtip_detect_product(struct driver_data *dd) | |
2758 | { | |
2759 | u32 hwdata; | |
2760 | unsigned int rev, slotgroups; | |
2761 | ||
2762 | /* | |
2763 | * HBA base + 0xFC [15:0] - vendor-specific hardware interface | |
2764 | * info register: | |
2765 | * [15:8] hardware/software interface rev# | |
2766 | * [ 3] asic-style interface | |
2767 | * [ 2:0] number of slot groups, minus 1 (only valid for asic-style). | |
2768 | */ | |
2769 | hwdata = readl(dd->mmio + HOST_HSORG); | |
2770 | ||
2771 | dd->product_type = MTIP_PRODUCT_UNKNOWN; | |
2772 | dd->slot_groups = 1; | |
2773 | ||
2774 | if (hwdata & 0x8) { | |
2775 | dd->product_type = MTIP_PRODUCT_ASICFPGA; | |
2776 | rev = (hwdata & HSORG_HWREV) >> 8; | |
2777 | slotgroups = (hwdata & HSORG_SLOTGROUPS) + 1; | |
2778 | dev_info(&dd->pdev->dev, | |
2779 | "ASIC-FPGA design, HS rev 0x%x, " | |
2780 | "%i slot groups [%i slots]\n", | |
2781 | rev, | |
2782 | slotgroups, | |
2783 | slotgroups * 32); | |
2784 | ||
2785 | if (slotgroups > MTIP_MAX_SLOT_GROUPS) { | |
2786 | dev_warn(&dd->pdev->dev, | |
2787 | "Warning: driver only supports " | |
2788 | "%i slot groups.\n", MTIP_MAX_SLOT_GROUPS); | |
2789 | slotgroups = MTIP_MAX_SLOT_GROUPS; | |
2790 | } | |
2791 | dd->slot_groups = slotgroups; | |
2792 | return; | |
2793 | } | |
2794 | ||
2795 | dev_warn(&dd->pdev->dev, "Unrecognized product id\n"); | |
2796 | } | |
2797 | ||
2798 | /* | |
2799 | * Blocking wait for FTL rebuild to complete | |
2800 | * | |
2801 | * @dd Pointer to the DRIVER_DATA structure. | |
2802 | * | |
2803 | * return value | |
2804 | * 0 FTL rebuild completed successfully | |
2805 | * -EFAULT FTL rebuild error/timeout/interruption | |
2806 | */ | |
2807 | static int mtip_ftl_rebuild_poll(struct driver_data *dd) | |
2808 | { | |
2809 | unsigned long timeout, cnt = 0, start; | |
2810 | ||
2811 | dev_warn(&dd->pdev->dev, | |
2812 | "FTL rebuild in progress. Polling for completion.\n"); | |
2813 | ||
2814 | start = jiffies; | |
88523a61 SB |
2815 | timeout = jiffies + msecs_to_jiffies(MTIP_FTL_REBUILD_TIMEOUT_MS); |
2816 | ||
2817 | do { | |
8a857a88 | 2818 | if (unlikely(test_bit(MTIP_DDF_REMOVE_PENDING_BIT, |
45038367 AT |
2819 | &dd->dd_flag))) |
2820 | return -EFAULT; | |
88523a61 SB |
2821 | if (mtip_check_surprise_removal(dd->pdev)) |
2822 | return -EFAULT; | |
60ec0eec | 2823 | |
88523a61 SB |
2824 | if (mtip_get_identify(dd->port, NULL) < 0) |
2825 | return -EFAULT; | |
2826 | ||
2827 | if (*(dd->port->identify + MTIP_FTL_REBUILD_OFFSET) == | |
2828 | MTIP_FTL_REBUILD_MAGIC) { | |
2829 | ssleep(1); | |
2830 | /* Print message every 3 minutes */ | |
2831 | if (cnt++ >= 180) { | |
2832 | dev_warn(&dd->pdev->dev, | |
2833 | "FTL rebuild in progress (%d secs).\n", | |
2834 | jiffies_to_msecs(jiffies - start) / 1000); | |
2835 | cnt = 0; | |
2836 | } | |
2837 | } else { | |
2838 | dev_warn(&dd->pdev->dev, | |
2839 | "FTL rebuild complete (%d secs).\n", | |
2840 | jiffies_to_msecs(jiffies - start) / 1000); | |
62ee8c13 | 2841 | mtip_block_initialize(dd); |
45038367 | 2842 | return 0; |
88523a61 | 2843 | } |
88523a61 SB |
2844 | } while (time_before(jiffies, timeout)); |
2845 | ||
2846 | /* Check for timeout */ | |
45038367 | 2847 | dev_err(&dd->pdev->dev, |
88523a61 SB |
2848 | "Timed out waiting for FTL rebuild to complete (%d secs).\n", |
2849 | jiffies_to_msecs(jiffies - start) / 1000); | |
45038367 | 2850 | return -EFAULT; |
88523a61 SB |
2851 | } |
2852 | ||
abb0ccd1 ATS |
2853 | static void mtip_softirq_done_fn(struct request *rq) |
2854 | { | |
2855 | struct mtip_cmd *cmd = blk_mq_rq_to_pdu(rq); | |
2856 | struct driver_data *dd = rq->q->queuedata; | |
2857 | ||
2858 | /* Unmap the DMA scatter list entries */ | |
2859 | dma_unmap_sg(&dd->pdev->dev, cmd->sg, cmd->scatter_ents, | |
2860 | cmd->direction); | |
2861 | ||
2862 | if (unlikely(cmd->unaligned)) | |
2863 | up(&dd->port->cmd_slot_unal); | |
2864 | ||
4dda4735 | 2865 | blk_mq_end_request(rq, cmd->status); |
abb0ccd1 ATS |
2866 | } |
2867 | ||
2868 | static void mtip_abort_cmd(struct request *req, void *data, | |
2869 | bool reserved) | |
2870 | { | |
4dda4735 | 2871 | struct mtip_cmd *cmd = blk_mq_rq_to_pdu(req); |
abb0ccd1 ATS |
2872 | struct driver_data *dd = data; |
2873 | ||
2874 | dbg_printk(MTIP_DRV_NAME " Aborting request, tag = %d\n", req->tag); | |
2875 | ||
2876 | clear_bit(req->tag, dd->port->cmds_to_issue); | |
4dda4735 | 2877 | cmd->status = -EIO; |
abb0ccd1 ATS |
2878 | mtip_softirq_done_fn(req); |
2879 | } | |
2880 | ||
2881 | static void mtip_queue_cmd(struct request *req, void *data, | |
2882 | bool reserved) | |
2883 | { | |
2884 | struct driver_data *dd = data; | |
2885 | ||
2886 | set_bit(req->tag, dd->port->cmds_to_issue); | |
2887 | blk_abort_request(req); | |
2888 | } | |
2889 | ||
60ec0eec AT |
2890 | /* |
2891 | * service thread to issue queued commands | |
2892 | * | |
2893 | * @data Pointer to the driver data structure. | |
2894 | * | |
2895 | * return value | |
2896 | * 0 | |
2897 | */ | |
2898 | ||
2899 | static int mtip_service_thread(void *data) | |
2900 | { | |
2901 | struct driver_data *dd = (struct driver_data *)data; | |
abb0ccd1 | 2902 | unsigned long slot, slot_start, slot_wrap, to; |
60ec0eec AT |
2903 | unsigned int num_cmd_slots = dd->slot_groups * 32; |
2904 | struct mtip_port *port = dd->port; | |
2905 | ||
2906 | while (1) { | |
9b204fbf AT |
2907 | if (kthread_should_stop() || |
2908 | test_bit(MTIP_PF_SVC_THD_STOP_BIT, &port->flags)) | |
2909 | goto st_out; | |
2910 | clear_bit(MTIP_PF_SVC_THD_ACTIVE_BIT, &port->flags); | |
2911 | ||
60ec0eec AT |
2912 | /* |
2913 | * the condition is to check neither an internal command is | |
2914 | * is in progress nor error handling is active | |
2915 | */ | |
2916 | wait_event_interruptible(port->svc_wait, (port->flags) && | |
cfc05bd3 | 2917 | (port->flags & MTIP_PF_SVC_THD_WORK)); |
8f8b8995 | 2918 | |
9b204fbf AT |
2919 | if (kthread_should_stop() || |
2920 | test_bit(MTIP_PF_SVC_THD_STOP_BIT, &port->flags)) | |
2921 | goto st_out; | |
2922 | ||
8a857a88 | 2923 | if (unlikely(test_bit(MTIP_DDF_REMOVE_PENDING_BIT, |
45038367 | 2924 | &dd->dd_flag))) |
8f8b8995 | 2925 | goto st_out; |
c74b0f58 | 2926 | |
cfc05bd3 ATS |
2927 | set_bit(MTIP_PF_SVC_THD_ACTIVE_BIT, &port->flags); |
2928 | ||
9b204fbf AT |
2929 | restart_eh: |
2930 | /* Demux bits: start with error handling */ | |
2931 | if (test_bit(MTIP_PF_EH_ACTIVE_BIT, &port->flags)) { | |
2932 | mtip_handle_tfe(dd); | |
2933 | clear_bit(MTIP_PF_EH_ACTIVE_BIT, &port->flags); | |
2934 | } | |
2935 | ||
2936 | if (test_bit(MTIP_PF_EH_ACTIVE_BIT, &port->flags)) | |
2937 | goto restart_eh; | |
2938 | ||
abb0ccd1 ATS |
2939 | if (test_bit(MTIP_PF_TO_ACTIVE_BIT, &port->flags)) { |
2940 | to = jiffies + msecs_to_jiffies(5000); | |
2941 | ||
2942 | do { | |
2943 | mdelay(100); | |
2944 | } while (atomic_read(&dd->irq_workers_active) != 0 && | |
2945 | time_before(jiffies, to)); | |
2946 | ||
2947 | if (atomic_read(&dd->irq_workers_active) != 0) | |
2948 | dev_warn(&dd->pdev->dev, | |
2949 | "Completion workers still active!"); | |
2950 | ||
2951 | spin_lock(dd->queue->queue_lock); | |
6d125de4 | 2952 | blk_mq_tagset_busy_iter(&dd->tags, |
abb0ccd1 ATS |
2953 | mtip_queue_cmd, dd); |
2954 | spin_unlock(dd->queue->queue_lock); | |
2955 | ||
2956 | set_bit(MTIP_PF_ISSUE_CMDS_BIT, &dd->port->flags); | |
2957 | ||
2958 | if (mtip_device_reset(dd)) | |
6d125de4 | 2959 | blk_mq_tagset_busy_iter(&dd->tags, |
abb0ccd1 ATS |
2960 | mtip_abort_cmd, dd); |
2961 | ||
2962 | clear_bit(MTIP_PF_TO_ACTIVE_BIT, &dd->port->flags); | |
2963 | } | |
2964 | ||
8a857a88 | 2965 | if (test_bit(MTIP_PF_ISSUE_CMDS_BIT, &port->flags)) { |
60ec0eec AT |
2966 | slot = 1; |
2967 | /* used to restrict the loop to one iteration */ | |
2968 | slot_start = num_cmd_slots; | |
2969 | slot_wrap = 0; | |
2970 | while (1) { | |
2971 | slot = find_next_bit(port->cmds_to_issue, | |
2972 | num_cmd_slots, slot); | |
2973 | if (slot_wrap == 1) { | |
2974 | if ((slot_start >= slot) || | |
2975 | (slot >= num_cmd_slots)) | |
2976 | break; | |
2977 | } | |
2978 | if (unlikely(slot_start == num_cmd_slots)) | |
2979 | slot_start = slot; | |
2980 | ||
2981 | if (unlikely(slot == num_cmd_slots)) { | |
2982 | slot = 1; | |
2983 | slot_wrap = 1; | |
2984 | continue; | |
2985 | } | |
2986 | ||
2987 | /* Issue the command to the hardware */ | |
2988 | mtip_issue_ncq_command(port, slot); | |
2989 | ||
60ec0eec AT |
2990 | clear_bit(slot, port->cmds_to_issue); |
2991 | } | |
2992 | ||
8a857a88 | 2993 | clear_bit(MTIP_PF_ISSUE_CMDS_BIT, &port->flags); |
9b204fbf AT |
2994 | } |
2995 | ||
2996 | if (test_bit(MTIP_PF_REBUILD_BIT, &port->flags)) { | |
59cf70e2 ATS |
2997 | if (mtip_ftl_rebuild_poll(dd) == 0) |
2998 | clear_bit(MTIP_PF_REBUILD_BIT, &port->flags); | |
60ec0eec | 2999 | } |
8f8b8995 AT |
3000 | } |
3001 | ||
8f8b8995 | 3002 | st_out: |
60ec0eec AT |
3003 | return 0; |
3004 | } | |
3005 | ||
188b9f49 SB |
3006 | /* |
3007 | * DMA region teardown | |
3008 | * | |
3009 | * @dd Pointer to driver_data structure | |
3010 | * | |
3011 | * return value | |
3012 | * None | |
3013 | */ | |
3014 | static void mtip_dma_free(struct driver_data *dd) | |
3015 | { | |
188b9f49 SB |
3016 | struct mtip_port *port = dd->port; |
3017 | ||
3018 | if (port->block1) | |
3019 | dmam_free_coherent(&dd->pdev->dev, BLOCK_DMA_ALLOC_SZ, | |
3020 | port->block1, port->block1_dma); | |
3021 | ||
3022 | if (port->command_list) { | |
3023 | dmam_free_coherent(&dd->pdev->dev, AHCI_CMD_TBL_SZ, | |
3024 | port->command_list, port->command_list_dma); | |
3025 | } | |
188b9f49 SB |
3026 | } |
3027 | ||
3028 | /* | |
3029 | * DMA region setup | |
3030 | * | |
3031 | * @dd Pointer to driver_data structure | |
3032 | * | |
3033 | * return value | |
3034 | * -ENOMEM Not enough free DMA region space to initialize driver | |
3035 | */ | |
3036 | static int mtip_dma_alloc(struct driver_data *dd) | |
3037 | { | |
3038 | struct mtip_port *port = dd->port; | |
188b9f49 SB |
3039 | |
3040 | /* Allocate dma memory for RX Fis, Identify, and Sector Bufffer */ | |
3041 | port->block1 = | |
3042 | dmam_alloc_coherent(&dd->pdev->dev, BLOCK_DMA_ALLOC_SZ, | |
3043 | &port->block1_dma, GFP_KERNEL); | |
3044 | if (!port->block1) | |
3045 | return -ENOMEM; | |
3046 | memset(port->block1, 0, BLOCK_DMA_ALLOC_SZ); | |
3047 | ||
3048 | /* Allocate dma memory for command list */ | |
3049 | port->command_list = | |
3050 | dmam_alloc_coherent(&dd->pdev->dev, AHCI_CMD_TBL_SZ, | |
3051 | &port->command_list_dma, GFP_KERNEL); | |
3052 | if (!port->command_list) { | |
3053 | dmam_free_coherent(&dd->pdev->dev, BLOCK_DMA_ALLOC_SZ, | |
3054 | port->block1, port->block1_dma); | |
3055 | port->block1 = NULL; | |
3056 | port->block1_dma = 0; | |
3057 | return -ENOMEM; | |
3058 | } | |
3059 | memset(port->command_list, 0, AHCI_CMD_TBL_SZ); | |
3060 | ||
3061 | /* Setup all pointers into first DMA region */ | |
3062 | port->rxfis = port->block1 + AHCI_RX_FIS_OFFSET; | |
3063 | port->rxfis_dma = port->block1_dma + AHCI_RX_FIS_OFFSET; | |
3064 | port->identify = port->block1 + AHCI_IDFY_OFFSET; | |
3065 | port->identify_dma = port->block1_dma + AHCI_IDFY_OFFSET; | |
3066 | port->log_buf = port->block1 + AHCI_SECTBUF_OFFSET; | |
3067 | port->log_buf_dma = port->block1_dma + AHCI_SECTBUF_OFFSET; | |
3068 | port->smart_buf = port->block1 + AHCI_SMARTBUF_OFFSET; | |
3069 | port->smart_buf_dma = port->block1_dma + AHCI_SMARTBUF_OFFSET; | |
3070 | ||
ffc771b3 JA |
3071 | return 0; |
3072 | } | |
188b9f49 | 3073 | |
ffc771b3 JA |
3074 | static int mtip_hw_get_identify(struct driver_data *dd) |
3075 | { | |
3076 | struct smart_attr attr242; | |
3077 | unsigned char *buf; | |
3078 | int rv; | |
188b9f49 | 3079 | |
ffc771b3 JA |
3080 | if (mtip_get_identify(dd->port, NULL) < 0) |
3081 | return -EFAULT; | |
188b9f49 | 3082 | |
ffc771b3 JA |
3083 | if (*(dd->port->identify + MTIP_FTL_REBUILD_OFFSET) == |
3084 | MTIP_FTL_REBUILD_MAGIC) { | |
3085 | set_bit(MTIP_PF_REBUILD_BIT, &dd->port->flags); | |
3086 | return MTIP_FTL_REBUILD_MAGIC; | |
3087 | } | |
3088 | mtip_dump_identify(dd->port); | |
188b9f49 | 3089 | |
ffc771b3 JA |
3090 | /* check write protect, over temp and rebuild statuses */ |
3091 | rv = mtip_read_log_page(dd->port, ATA_LOG_SATA_NCQ, | |
3092 | dd->port->log_buf, | |
3093 | dd->port->log_buf_dma, 1); | |
3094 | if (rv) { | |
3095 | dev_warn(&dd->pdev->dev, | |
3096 | "Error in READ LOG EXT (10h) command\n"); | |
3097 | /* non-critical error, don't fail the load */ | |
3098 | } else { | |
3099 | buf = (unsigned char *)dd->port->log_buf; | |
3100 | if (buf[259] & 0x1) { | |
3101 | dev_info(&dd->pdev->dev, | |
3102 | "Write protect bit is set.\n"); | |
3103 | set_bit(MTIP_DDF_WRITE_PROTECT_BIT, &dd->dd_flag); | |
3104 | } | |
3105 | if (buf[288] == 0xF7) { | |
3106 | dev_info(&dd->pdev->dev, | |
3107 | "Exceeded Tmax, drive in thermal shutdown.\n"); | |
3108 | set_bit(MTIP_DDF_OVER_TEMP_BIT, &dd->dd_flag); | |
3109 | } | |
3110 | if (buf[288] == 0xBF) { | |
3111 | dev_info(&dd->pdev->dev, | |
3112 | "Drive indicates rebuild has failed.\n"); | |
aae4a033 | 3113 | set_bit(MTIP_DDF_REBUILD_FAILED_BIT, &dd->dd_flag); |
ffc771b3 | 3114 | } |
188b9f49 | 3115 | } |
ffc771b3 JA |
3116 | |
3117 | /* get write protect progess */ | |
3118 | memset(&attr242, 0, sizeof(struct smart_attr)); | |
3119 | if (mtip_get_smart_attr(dd->port, 242, &attr242)) | |
3120 | dev_warn(&dd->pdev->dev, | |
3121 | "Unable to check write protect progress\n"); | |
3122 | else | |
3123 | dev_info(&dd->pdev->dev, | |
3124 | "Write protect progress: %u%% (%u blocks)\n", | |
3125 | attr242.cur, le32_to_cpu(attr242.data)); | |
3126 | ||
3127 | return rv; | |
188b9f49 SB |
3128 | } |
3129 | ||
88523a61 SB |
3130 | /* |
3131 | * Called once for each card. | |
3132 | * | |
3133 | * @dd Pointer to the driver data structure. | |
3134 | * | |
3135 | * return value | |
3136 | * 0 on success, else an error code. | |
3137 | */ | |
6316668f | 3138 | static int mtip_hw_init(struct driver_data *dd) |
88523a61 SB |
3139 | { |
3140 | int i; | |
3141 | int rv; | |
3142 | unsigned int num_command_slots; | |
45038367 | 3143 | unsigned long timeout, timetaken; |
88523a61 SB |
3144 | |
3145 | dd->mmio = pcim_iomap_table(dd->pdev)[MTIP_ABAR]; | |
3146 | ||
3147 | mtip_detect_product(dd); | |
3148 | if (dd->product_type == MTIP_PRODUCT_UNKNOWN) { | |
3149 | rv = -EIO; | |
3150 | goto out1; | |
3151 | } | |
3152 | num_command_slots = dd->slot_groups * 32; | |
3153 | ||
3154 | hba_setup(dd); | |
3155 | ||
16c906e5 AT |
3156 | dd->port = kzalloc_node(sizeof(struct mtip_port), GFP_KERNEL, |
3157 | dd->numa_node); | |
88523a61 SB |
3158 | if (!dd->port) { |
3159 | dev_err(&dd->pdev->dev, | |
3160 | "Memory allocation: port structure\n"); | |
3161 | return -ENOMEM; | |
3162 | } | |
3163 | ||
16c906e5 AT |
3164 | /* Continue workqueue setup */ |
3165 | for (i = 0; i < MTIP_MAX_SLOT_GROUPS; i++) | |
3166 | dd->work[i].port = dd->port; | |
3167 | ||
2077d947 AT |
3168 | /* Enable unaligned IO constraints for some devices */ |
3169 | if (mtip_device_unaligned_constrained(dd)) | |
3170 | dd->unal_qdepth = MTIP_MAX_UNALIGNED_SLOTS; | |
3171 | else | |
3172 | dd->unal_qdepth = 0; | |
3173 | ||
2077d947 | 3174 | sema_init(&dd->port->cmd_slot_unal, dd->unal_qdepth); |
88523a61 SB |
3175 | |
3176 | /* Spinlock to prevent concurrent issue */ | |
16c906e5 AT |
3177 | for (i = 0; i < MTIP_MAX_SLOT_GROUPS; i++) |
3178 | spin_lock_init(&dd->port->cmd_issue_lock[i]); | |
88523a61 SB |
3179 | |
3180 | /* Set the port mmio base address. */ | |
3181 | dd->port->mmio = dd->mmio + PORT_OFFSET; | |
3182 | dd->port->dd = dd; | |
3183 | ||
188b9f49 SB |
3184 | /* DMA allocations */ |
3185 | rv = mtip_dma_alloc(dd); | |
3186 | if (rv < 0) | |
88523a61 | 3187 | goto out1; |
88523a61 SB |
3188 | |
3189 | /* Setup the pointers to the extended s_active and CI registers. */ | |
3190 | for (i = 0; i < dd->slot_groups; i++) { | |
3191 | dd->port->s_active[i] = | |
3192 | dd->port->mmio + i*0x80 + PORT_SCR_ACT; | |
3193 | dd->port->cmd_issue[i] = | |
3194 | dd->port->mmio + i*0x80 + PORT_COMMAND_ISSUE; | |
3195 | dd->port->completed[i] = | |
3196 | dd->port->mmio + i*0x80 + PORT_SDBV; | |
3197 | } | |
3198 | ||
45038367 AT |
3199 | timetaken = jiffies; |
3200 | timeout = jiffies + msecs_to_jiffies(30000); | |
3201 | while (((readl(dd->port->mmio + PORT_SCR_STAT) & 0x0F) != 0x03) && | |
3202 | time_before(jiffies, timeout)) { | |
3203 | mdelay(100); | |
3204 | } | |
3205 | if (unlikely(mtip_check_surprise_removal(dd->pdev))) { | |
3206 | timetaken = jiffies - timetaken; | |
3207 | dev_warn(&dd->pdev->dev, | |
3208 | "Surprise removal detected at %u ms\n", | |
3209 | jiffies_to_msecs(timetaken)); | |
3210 | rv = -ENODEV; | |
3211 | goto out2 ; | |
3212 | } | |
8a857a88 | 3213 | if (unlikely(test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag))) { |
45038367 AT |
3214 | timetaken = jiffies - timetaken; |
3215 | dev_warn(&dd->pdev->dev, | |
3216 | "Removal detected at %u ms\n", | |
3217 | jiffies_to_msecs(timetaken)); | |
3218 | rv = -EFAULT; | |
88523a61 SB |
3219 | goto out2; |
3220 | } | |
3221 | ||
45038367 AT |
3222 | /* Conditionally reset the HBA. */ |
3223 | if (!(readl(dd->mmio + HOST_CAP) & HOST_CAP_NZDMA)) { | |
3224 | if (mtip_hba_reset(dd) < 0) { | |
3225 | dev_err(&dd->pdev->dev, | |
3226 | "Card did not reset within timeout\n"); | |
3227 | rv = -EIO; | |
3228 | goto out2; | |
3229 | } | |
3230 | } else { | |
3231 | /* Clear any pending interrupts on the HBA */ | |
3232 | writel(readl(dd->mmio + HOST_IRQ_STAT), | |
3233 | dd->mmio + HOST_IRQ_STAT); | |
3234 | } | |
3235 | ||
88523a61 SB |
3236 | mtip_init_port(dd->port); |
3237 | mtip_start_port(dd->port); | |
3238 | ||
3239 | /* Setup the ISR and enable interrupts. */ | |
3240 | rv = devm_request_irq(&dd->pdev->dev, | |
3241 | dd->pdev->irq, | |
3242 | mtip_irq_handler, | |
3243 | IRQF_SHARED, | |
3244 | dev_driver_string(&dd->pdev->dev), | |
3245 | dd); | |
3246 | ||
3247 | if (rv) { | |
3248 | dev_err(&dd->pdev->dev, | |
3249 | "Unable to allocate IRQ %d\n", dd->pdev->irq); | |
3250 | goto out2; | |
3251 | } | |
16c906e5 | 3252 | irq_set_affinity_hint(dd->pdev->irq, get_cpu_mask(dd->isr_binding)); |
88523a61 SB |
3253 | |
3254 | /* Enable interrupts on the HBA. */ | |
3255 | writel(readl(dd->mmio + HOST_CTL) | HOST_IRQ_EN, | |
3256 | dd->mmio + HOST_CTL); | |
3257 | ||
60ec0eec AT |
3258 | init_waitqueue_head(&dd->port->svc_wait); |
3259 | ||
8a857a88 | 3260 | if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag)) { |
45038367 AT |
3261 | rv = -EFAULT; |
3262 | goto out3; | |
3263 | } | |
3264 | ||
88523a61 SB |
3265 | return rv; |
3266 | ||
3267 | out3: | |
88523a61 SB |
3268 | /* Disable interrupts on the HBA. */ |
3269 | writel(readl(dd->mmio + HOST_CTL) & ~HOST_IRQ_EN, | |
3270 | dd->mmio + HOST_CTL); | |
3271 | ||
16c906e5 AT |
3272 | /* Release the IRQ. */ |
3273 | irq_set_affinity_hint(dd->pdev->irq, NULL); | |
88523a61 SB |
3274 | devm_free_irq(&dd->pdev->dev, dd->pdev->irq, dd); |
3275 | ||
3276 | out2: | |
3277 | mtip_deinit_port(dd->port); | |
188b9f49 | 3278 | mtip_dma_free(dd); |
88523a61 | 3279 | |
88523a61 SB |
3280 | out1: |
3281 | /* Free the memory allocated for the for structure. */ | |
3282 | kfree(dd->port); | |
3283 | ||
3284 | return rv; | |
3285 | } | |
3286 | ||
d8a18d2d | 3287 | static int mtip_standby_drive(struct driver_data *dd) |
ffc771b3 | 3288 | { |
d8a18d2d | 3289 | int rv = 0; |
ffc771b3 | 3290 | |
d8a18d2d ATS |
3291 | if (dd->sr || !dd->port) |
3292 | return -ENODEV; | |
ffc771b3 JA |
3293 | /* |
3294 | * Send standby immediate (E0h) to the drive so that it | |
3295 | * saves its state. | |
3296 | */ | |
3297 | if (!test_bit(MTIP_PF_REBUILD_BIT, &dd->port->flags) && | |
d8a18d2d ATS |
3298 | !test_bit(MTIP_DDF_REBUILD_FAILED_BIT, &dd->dd_flag) && |
3299 | !test_bit(MTIP_DDF_SEC_LOCK_BIT, &dd->dd_flag)) { | |
3300 | rv = mtip_standby_immediate(dd->port); | |
3301 | if (rv) | |
ffc771b3 JA |
3302 | dev_warn(&dd->pdev->dev, |
3303 | "STANDBY IMMEDIATE failed\n"); | |
d8a18d2d ATS |
3304 | } |
3305 | return rv; | |
ffc771b3 JA |
3306 | } |
3307 | ||
88523a61 SB |
3308 | /* |
3309 | * Called to deinitialize an interface. | |
3310 | * | |
3311 | * @dd Pointer to the driver data structure. | |
3312 | * | |
3313 | * return value | |
3314 | * 0 | |
3315 | */ | |
6316668f | 3316 | static int mtip_hw_exit(struct driver_data *dd) |
88523a61 | 3317 | { |
8f8b8995 | 3318 | if (!dd->sr) { |
88523a61 SB |
3319 | /* de-initialize the port. */ |
3320 | mtip_deinit_port(dd->port); | |
3321 | ||
3322 | /* Disable interrupts on the HBA. */ | |
3323 | writel(readl(dd->mmio + HOST_CTL) & ~HOST_IRQ_EN, | |
3324 | dd->mmio + HOST_CTL); | |
3325 | } | |
3326 | ||
88523a61 | 3327 | /* Release the IRQ. */ |
16c906e5 | 3328 | irq_set_affinity_hint(dd->pdev->irq, NULL); |
88523a61 | 3329 | devm_free_irq(&dd->pdev->dev, dd->pdev->irq, dd); |
2132a544 | 3330 | msleep(1000); |
88523a61 | 3331 | |
188b9f49 SB |
3332 | /* Free dma regions */ |
3333 | mtip_dma_free(dd); | |
3334 | ||
88523a61 SB |
3335 | /* Free the memory allocated for the for structure. */ |
3336 | kfree(dd->port); | |
8f8b8995 | 3337 | dd->port = NULL; |
88523a61 SB |
3338 | |
3339 | return 0; | |
3340 | } | |
3341 | ||
3342 | /* | |
3343 | * Issue a Standby Immediate command to the device. | |
3344 | * | |
3345 | * This function is called by the Block Layer just before the | |
3346 | * system powers off during a shutdown. | |
3347 | * | |
3348 | * @dd Pointer to the driver data structure. | |
3349 | * | |
3350 | * return value | |
3351 | * 0 | |
3352 | */ | |
6316668f | 3353 | static int mtip_hw_shutdown(struct driver_data *dd) |
88523a61 SB |
3354 | { |
3355 | /* | |
3356 | * Send standby immediate (E0h) to the drive so that it | |
3357 | * saves its state. | |
3358 | */ | |
d8a18d2d | 3359 | mtip_standby_drive(dd); |
88523a61 SB |
3360 | |
3361 | return 0; | |
3362 | } | |
3363 | ||
3364 | /* | |
3365 | * Suspend function | |
3366 | * | |
3367 | * This function is called by the Block Layer just before the | |
3368 | * system hibernates. | |
3369 | * | |
3370 | * @dd Pointer to the driver data structure. | |
3371 | * | |
3372 | * return value | |
3373 | * 0 Suspend was successful | |
3374 | * -EFAULT Suspend was not successful | |
3375 | */ | |
6316668f | 3376 | static int mtip_hw_suspend(struct driver_data *dd) |
88523a61 SB |
3377 | { |
3378 | /* | |
3379 | * Send standby immediate (E0h) to the drive | |
3380 | * so that it saves its state. | |
3381 | */ | |
d8a18d2d | 3382 | if (mtip_standby_drive(dd) != 0) { |
88523a61 SB |
3383 | dev_err(&dd->pdev->dev, |
3384 | "Failed standby-immediate command\n"); | |
3385 | return -EFAULT; | |
3386 | } | |
3387 | ||
3388 | /* Disable interrupts on the HBA.*/ | |
3389 | writel(readl(dd->mmio + HOST_CTL) & ~HOST_IRQ_EN, | |
3390 | dd->mmio + HOST_CTL); | |
3391 | mtip_deinit_port(dd->port); | |
3392 | ||
3393 | return 0; | |
3394 | } | |
3395 | ||
3396 | /* | |
3397 | * Resume function | |
3398 | * | |
3399 | * This function is called by the Block Layer as the | |
3400 | * system resumes. | |
3401 | * | |
3402 | * @dd Pointer to the driver data structure. | |
3403 | * | |
3404 | * return value | |
3405 | * 0 Resume was successful | |
3406 | * -EFAULT Resume was not successful | |
3407 | */ | |
6316668f | 3408 | static int mtip_hw_resume(struct driver_data *dd) |
88523a61 SB |
3409 | { |
3410 | /* Perform any needed hardware setup steps */ | |
3411 | hba_setup(dd); | |
3412 | ||
3413 | /* Reset the HBA */ | |
3414 | if (mtip_hba_reset(dd) != 0) { | |
3415 | dev_err(&dd->pdev->dev, | |
3416 | "Unable to reset the HBA\n"); | |
3417 | return -EFAULT; | |
3418 | } | |
3419 | ||
3420 | /* | |
3421 | * Enable the port, DMA engine, and FIS reception specific | |
3422 | * h/w in controller. | |
3423 | */ | |
3424 | mtip_init_port(dd->port); | |
3425 | mtip_start_port(dd->port); | |
3426 | ||
3427 | /* Enable interrupts on the HBA.*/ | |
3428 | writel(readl(dd->mmio + HOST_CTL) | HOST_IRQ_EN, | |
3429 | dd->mmio + HOST_CTL); | |
3430 | ||
3431 | return 0; | |
3432 | } | |
3433 | ||
88523a61 SB |
3434 | /* |
3435 | * Helper function for reusing disk name | |
3436 | * upon hot insertion. | |
3437 | */ | |
3438 | static int rssd_disk_name_format(char *prefix, | |
3439 | int index, | |
3440 | char *buf, | |
3441 | int buflen) | |
3442 | { | |
3443 | const int base = 'z' - 'a' + 1; | |
3444 | char *begin = buf + strlen(prefix); | |
3445 | char *end = buf + buflen; | |
3446 | char *p; | |
3447 | int unit; | |
3448 | ||
3449 | p = end - 1; | |
3450 | *p = '\0'; | |
3451 | unit = base; | |
3452 | do { | |
3453 | if (p == begin) | |
3454 | return -EINVAL; | |
3455 | *--p = 'a' + (index % unit); | |
3456 | index = (index / unit) - 1; | |
3457 | } while (index >= 0); | |
3458 | ||
3459 | memmove(begin, p, end - p); | |
3460 | memcpy(buf, prefix, strlen(prefix)); | |
3461 | ||
3462 | return 0; | |
3463 | } | |
3464 | ||
3465 | /* | |
3466 | * Block layer IOCTL handler. | |
3467 | * | |
3468 | * @dev Pointer to the block_device structure. | |
3469 | * @mode ignored | |
3470 | * @cmd IOCTL command passed from the user application. | |
3471 | * @arg Argument passed from the user application. | |
3472 | * | |
3473 | * return value | |
3474 | * 0 IOCTL completed successfully. | |
3475 | * -ENOTTY IOCTL not supported or invalid driver data | |
3476 | * structure pointer. | |
3477 | */ | |
3478 | static int mtip_block_ioctl(struct block_device *dev, | |
3479 | fmode_t mode, | |
3480 | unsigned cmd, | |
3481 | unsigned long arg) | |
3482 | { | |
3483 | struct driver_data *dd = dev->bd_disk->private_data; | |
3484 | ||
3485 | if (!capable(CAP_SYS_ADMIN)) | |
3486 | return -EACCES; | |
3487 | ||
3488 | if (!dd) | |
3489 | return -ENOTTY; | |
3490 | ||
8a857a88 | 3491 | if (unlikely(test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag))) |
45038367 AT |
3492 | return -ENOTTY; |
3493 | ||
88523a61 SB |
3494 | switch (cmd) { |
3495 | case BLKFLSBUF: | |
60ec0eec | 3496 | return -ENOTTY; |
88523a61 | 3497 | default: |
ef0f1587 | 3498 | return mtip_hw_ioctl(dd, cmd, arg); |
88523a61 SB |
3499 | } |
3500 | } | |
3501 | ||
16d02c04 | 3502 | #ifdef CONFIG_COMPAT |
88523a61 SB |
3503 | /* |
3504 | * Block layer compat IOCTL handler. | |
3505 | * | |
3506 | * @dev Pointer to the block_device structure. | |
3507 | * @mode ignored | |
3508 | * @cmd IOCTL command passed from the user application. | |
3509 | * @arg Argument passed from the user application. | |
3510 | * | |
3511 | * return value | |
3512 | * 0 IOCTL completed successfully. | |
3513 | * -ENOTTY IOCTL not supported or invalid driver data | |
3514 | * structure pointer. | |
3515 | */ | |
3516 | static int mtip_block_compat_ioctl(struct block_device *dev, | |
3517 | fmode_t mode, | |
3518 | unsigned cmd, | |
3519 | unsigned long arg) | |
3520 | { | |
3521 | struct driver_data *dd = dev->bd_disk->private_data; | |
3522 | ||
3523 | if (!capable(CAP_SYS_ADMIN)) | |
3524 | return -EACCES; | |
3525 | ||
3526 | if (!dd) | |
3527 | return -ENOTTY; | |
3528 | ||
8a857a88 | 3529 | if (unlikely(test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag))) |
45038367 AT |
3530 | return -ENOTTY; |
3531 | ||
88523a61 SB |
3532 | switch (cmd) { |
3533 | case BLKFLSBUF: | |
60ec0eec | 3534 | return -ENOTTY; |
ef0f1587 | 3535 | case HDIO_DRIVE_TASKFILE: { |
60ec0eec | 3536 | struct mtip_compat_ide_task_request_s __user *compat_req_task; |
ef0f1587 JA |
3537 | ide_task_request_t req_task; |
3538 | int compat_tasksize, outtotal, ret; | |
3539 | ||
60ec0eec AT |
3540 | compat_tasksize = |
3541 | sizeof(struct mtip_compat_ide_task_request_s); | |
ef0f1587 JA |
3542 | |
3543 | compat_req_task = | |
3544 | (struct mtip_compat_ide_task_request_s __user *) arg; | |
3545 | ||
3546 | if (copy_from_user(&req_task, (void __user *) arg, | |
60ec0eec | 3547 | compat_tasksize - (2 * sizeof(compat_long_t)))) |
ef0f1587 JA |
3548 | return -EFAULT; |
3549 | ||
3550 | if (get_user(req_task.out_size, &compat_req_task->out_size)) | |
3551 | return -EFAULT; | |
3552 | ||
3553 | if (get_user(req_task.in_size, &compat_req_task->in_size)) | |
3554 | return -EFAULT; | |
3555 | ||
3556 | outtotal = sizeof(struct mtip_compat_ide_task_request_s); | |
3557 | ||
3558 | ret = exec_drive_taskfile(dd, (void __user *) arg, | |
3559 | &req_task, outtotal); | |
3560 | ||
3561 | if (copy_to_user((void __user *) arg, &req_task, | |
3562 | compat_tasksize - | |
3563 | (2 * sizeof(compat_long_t)))) | |
3564 | return -EFAULT; | |
3565 | ||
3566 | if (put_user(req_task.out_size, &compat_req_task->out_size)) | |
3567 | return -EFAULT; | |
3568 | ||
3569 | if (put_user(req_task.in_size, &compat_req_task->in_size)) | |
3570 | return -EFAULT; | |
3571 | ||
3572 | return ret; | |
3573 | } | |
88523a61 | 3574 | default: |
ef0f1587 | 3575 | return mtip_hw_ioctl(dd, cmd, arg); |
88523a61 SB |
3576 | } |
3577 | } | |
16d02c04 | 3578 | #endif |
88523a61 SB |
3579 | |
3580 | /* | |
3581 | * Obtain the geometry of the device. | |
3582 | * | |
3583 | * You may think that this function is obsolete, but some applications, | |
3584 | * fdisk for example still used CHS values. This function describes the | |
3585 | * device as having 224 heads and 56 sectors per cylinder. These values are | |
3586 | * chosen so that each cylinder is aligned on a 4KB boundary. Since a | |
3587 | * partition is described in terms of a start and end cylinder this means | |
3588 | * that each partition is also 4KB aligned. Non-aligned partitions adversely | |
3589 | * affects performance. | |
3590 | * | |
3591 | * @dev Pointer to the block_device strucutre. | |
3592 | * @geo Pointer to a hd_geometry structure. | |
3593 | * | |
3594 | * return value | |
3595 | * 0 Operation completed successfully. | |
3596 | * -ENOTTY An error occurred while reading the drive capacity. | |
3597 | */ | |
3598 | static int mtip_block_getgeo(struct block_device *dev, | |
3599 | struct hd_geometry *geo) | |
3600 | { | |
3601 | struct driver_data *dd = dev->bd_disk->private_data; | |
3602 | sector_t capacity; | |
3603 | ||
3604 | if (!dd) | |
3605 | return -ENOTTY; | |
3606 | ||
3607 | if (!(mtip_hw_get_capacity(dd, &capacity))) { | |
3608 | dev_warn(&dd->pdev->dev, | |
3609 | "Could not get drive capacity.\n"); | |
3610 | return -ENOTTY; | |
3611 | } | |
3612 | ||
3613 | geo->heads = 224; | |
3614 | geo->sectors = 56; | |
60ec0eec | 3615 | sector_div(capacity, (geo->heads * geo->sectors)); |
88523a61 | 3616 | geo->cylinders = capacity; |
88523a61 SB |
3617 | return 0; |
3618 | } | |
3619 | ||
51c6570e ATS |
3620 | static int mtip_block_open(struct block_device *dev, fmode_t mode) |
3621 | { | |
3622 | struct driver_data *dd; | |
3623 | ||
3624 | if (dev && dev->bd_disk) { | |
3625 | dd = (struct driver_data *) dev->bd_disk->private_data; | |
3626 | ||
3627 | if (dd) { | |
3628 | if (test_bit(MTIP_DDF_REMOVAL_BIT, | |
3629 | &dd->dd_flag)) { | |
3630 | return -ENODEV; | |
3631 | } | |
3632 | return 0; | |
3633 | } | |
3634 | } | |
3635 | return -ENODEV; | |
3636 | } | |
3637 | ||
99e6b87e | 3638 | static void mtip_block_release(struct gendisk *disk, fmode_t mode) |
51c6570e ATS |
3639 | { |
3640 | } | |
3641 | ||
88523a61 SB |
3642 | /* |
3643 | * Block device operation function. | |
3644 | * | |
3645 | * This structure contains pointers to the functions required by the block | |
3646 | * layer. | |
3647 | */ | |
3648 | static const struct block_device_operations mtip_block_ops = { | |
51c6570e ATS |
3649 | .open = mtip_block_open, |
3650 | .release = mtip_block_release, | |
88523a61 | 3651 | .ioctl = mtip_block_ioctl, |
16d02c04 | 3652 | #ifdef CONFIG_COMPAT |
88523a61 | 3653 | .compat_ioctl = mtip_block_compat_ioctl, |
16d02c04 | 3654 | #endif |
88523a61 SB |
3655 | .getgeo = mtip_block_getgeo, |
3656 | .owner = THIS_MODULE | |
3657 | }; | |
3658 | ||
686d8e0b ATS |
3659 | static inline bool is_se_active(struct driver_data *dd) |
3660 | { | |
3661 | if (unlikely(test_bit(MTIP_PF_SE_ACTIVE_BIT, &dd->port->flags))) { | |
3662 | if (dd->port->ic_pause_timer) { | |
3663 | unsigned long to = dd->port->ic_pause_timer + | |
3664 | msecs_to_jiffies(1000); | |
3665 | if (time_after(jiffies, to)) { | |
3666 | clear_bit(MTIP_PF_SE_ACTIVE_BIT, | |
3667 | &dd->port->flags); | |
3668 | clear_bit(MTIP_DDF_SEC_LOCK_BIT, &dd->dd_flag); | |
3669 | dd->port->ic_pause_timer = 0; | |
3670 | wake_up_interruptible(&dd->port->svc_wait); | |
3671 | return false; | |
3672 | } | |
3673 | } | |
3674 | return true; | |
3675 | } | |
3676 | return false; | |
3677 | } | |
3678 | ||
88523a61 SB |
3679 | /* |
3680 | * Block layer make request function. | |
3681 | * | |
3682 | * This function is called by the kernel to process a BIO for | |
3683 | * the P320 device. | |
3684 | * | |
3685 | * @queue Pointer to the request queue. Unused other than to obtain | |
3686 | * the driver data structure. | |
ffc771b3 | 3687 | * @rq Pointer to the request. |
88523a61 | 3688 | * |
88523a61 | 3689 | */ |
ffc771b3 | 3690 | static int mtip_submit_request(struct blk_mq_hw_ctx *hctx, struct request *rq) |
88523a61 | 3691 | { |
ffc771b3 JA |
3692 | struct driver_data *dd = hctx->queue->queuedata; |
3693 | struct mtip_cmd *cmd = blk_mq_rq_to_pdu(rq); | |
3694 | unsigned int nents; | |
88523a61 | 3695 | |
686d8e0b ATS |
3696 | if (is_se_active(dd)) |
3697 | return -ENODATA; | |
3698 | ||
c74b0f58 AT |
3699 | if (unlikely(dd->dd_flag & MTIP_DDF_STOP_IO)) { |
3700 | if (unlikely(test_bit(MTIP_DDF_REMOVE_PENDING_BIT, | |
3701 | &dd->dd_flag))) { | |
ffc771b3 | 3702 | return -ENXIO; |
c74b0f58 AT |
3703 | } |
3704 | if (unlikely(test_bit(MTIP_DDF_OVER_TEMP_BIT, &dd->dd_flag))) { | |
ffc771b3 | 3705 | return -ENODATA; |
c74b0f58 AT |
3706 | } |
3707 | if (unlikely(test_bit(MTIP_DDF_WRITE_PROTECT_BIT, | |
3708 | &dd->dd_flag) && | |
ffc771b3 JA |
3709 | rq_data_dir(rq))) { |
3710 | return -ENODATA; | |
8f8b8995 | 3711 | } |
aae4a033 ATS |
3712 | if (unlikely(test_bit(MTIP_DDF_SEC_LOCK_BIT, &dd->dd_flag) || |
3713 | test_bit(MTIP_DDF_REBUILD_FAILED_BIT, &dd->dd_flag))) | |
ffc771b3 | 3714 | return -ENODATA; |
45038367 AT |
3715 | } |
3716 | ||
c2df40df | 3717 | if (req_op(rq) == REQ_OP_DISCARD) { |
ffc771b3 | 3718 | int err; |
15283469 | 3719 | |
ffc771b3 | 3720 | err = mtip_send_trim(dd, blk_rq_pos(rq), blk_rq_sectors(rq)); |
c8a446ad | 3721 | blk_mq_end_request(rq, err); |
ffc771b3 | 3722 | return 0; |
88523a61 SB |
3723 | } |
3724 | ||
ffc771b3 JA |
3725 | /* Create the scatter list for this request. */ |
3726 | nents = blk_rq_map_sg(hctx->queue, rq, cmd->sg); | |
3727 | ||
3728 | /* Issue the read/write. */ | |
3729 | mtip_hw_submit_io(dd, rq, cmd, nents, hctx); | |
3730 | return 0; | |
3731 | } | |
3732 | ||
3733 | static bool mtip_check_unal_depth(struct blk_mq_hw_ctx *hctx, | |
3734 | struct request *rq) | |
3735 | { | |
3736 | struct driver_data *dd = hctx->queue->queuedata; | |
3737 | struct mtip_cmd *cmd = blk_mq_rq_to_pdu(rq); | |
3738 | ||
f45c40a9 | 3739 | if (rq_data_dir(rq) == READ || !dd->unal_qdepth) |
ffc771b3 JA |
3740 | return false; |
3741 | ||
3742 | /* | |
3743 | * If unaligned depth must be limited on this controller, mark it | |
3744 | * as unaligned if the IO isn't on a 4k boundary (start of length). | |
3745 | */ | |
3746 | if (blk_rq_sectors(rq) <= 64) { | |
3747 | if ((blk_rq_pos(rq) & 7) || (blk_rq_sectors(rq) & 7)) | |
3748 | cmd->unaligned = 1; | |
2077d947 AT |
3749 | } |
3750 | ||
ffc771b3 JA |
3751 | if (cmd->unaligned && down_trylock(&dd->port->cmd_slot_unal)) |
3752 | return true; | |
88523a61 | 3753 | |
ffc771b3 JA |
3754 | return false; |
3755 | } | |
88523a61 | 3756 | |
74c45052 JA |
3757 | static int mtip_queue_rq(struct blk_mq_hw_ctx *hctx, |
3758 | const struct blk_mq_queue_data *bd) | |
ffc771b3 | 3759 | { |
74c45052 | 3760 | struct request *rq = bd->rq; |
ffc771b3 | 3761 | int ret; |
88523a61 | 3762 | |
a4e84aae ML |
3763 | mtip_init_cmd_header(rq); |
3764 | ||
f45c40a9 | 3765 | if (unlikely(mtip_check_unal_depth(hctx, rq))) |
ffc771b3 JA |
3766 | return BLK_MQ_RQ_QUEUE_BUSY; |
3767 | ||
e2490073 CH |
3768 | blk_mq_start_request(rq); |
3769 | ||
ffc771b3 | 3770 | ret = mtip_submit_request(hctx, rq); |
f45c40a9 | 3771 | if (likely(!ret)) |
ffc771b3 JA |
3772 | return BLK_MQ_RQ_QUEUE_OK; |
3773 | ||
ffc771b3 | 3774 | return BLK_MQ_RQ_QUEUE_ERROR; |
88523a61 SB |
3775 | } |
3776 | ||
ffc771b3 JA |
3777 | static void mtip_free_cmd(void *data, struct request *rq, |
3778 | unsigned int hctx_idx, unsigned int request_idx) | |
3779 | { | |
3780 | struct driver_data *dd = data; | |
3781 | struct mtip_cmd *cmd = blk_mq_rq_to_pdu(rq); | |
3782 | ||
3783 | if (!cmd->command) | |
3784 | return; | |
3785 | ||
3786 | dmam_free_coherent(&dd->pdev->dev, CMD_DMA_ALLOC_SZ, | |
3787 | cmd->command, cmd->command_dma); | |
3788 | } | |
3789 | ||
3790 | static int mtip_init_cmd(void *data, struct request *rq, unsigned int hctx_idx, | |
3791 | unsigned int request_idx, unsigned int numa_node) | |
3792 | { | |
3793 | struct driver_data *dd = data; | |
3794 | struct mtip_cmd *cmd = blk_mq_rq_to_pdu(rq); | |
ffc771b3 | 3795 | |
74c9c913 JM |
3796 | /* |
3797 | * For flush requests, request_idx starts at the end of the | |
3798 | * tag space. Since we don't support FLUSH/FUA, simply return | |
3799 | * 0 as there's nothing to be done. | |
3800 | */ | |
3801 | if (request_idx >= MTIP_MAX_COMMAND_SLOTS) | |
3802 | return 0; | |
3803 | ||
ffc771b3 JA |
3804 | cmd->command = dmam_alloc_coherent(&dd->pdev->dev, CMD_DMA_ALLOC_SZ, |
3805 | &cmd->command_dma, GFP_KERNEL); | |
3806 | if (!cmd->command) | |
3807 | return -ENOMEM; | |
3808 | ||
3809 | memset(cmd->command, 0, CMD_DMA_ALLOC_SZ); | |
3810 | ||
ffc771b3 JA |
3811 | sg_init_table(cmd->sg, MTIP_MAX_SG); |
3812 | return 0; | |
3813 | } | |
3814 | ||
abb0ccd1 ATS |
3815 | static enum blk_eh_timer_return mtip_cmd_timeout(struct request *req, |
3816 | bool reserved) | |
3817 | { | |
3818 | struct driver_data *dd = req->q->queuedata; | |
abb0ccd1 ATS |
3819 | |
3820 | if (reserved) | |
3821 | goto exit_handler; | |
3822 | ||
3823 | if (test_bit(req->tag, dd->port->cmds_to_issue)) | |
3824 | goto exit_handler; | |
3825 | ||
3826 | if (test_and_set_bit(MTIP_PF_TO_ACTIVE_BIT, &dd->port->flags)) | |
3827 | goto exit_handler; | |
3828 | ||
3829 | wake_up_interruptible(&dd->port->svc_wait); | |
3830 | exit_handler: | |
90beb2e7 | 3831 | return BLK_EH_RESET_TIMER; |
abb0ccd1 ATS |
3832 | } |
3833 | ||
f363b089 | 3834 | static const struct blk_mq_ops mtip_mq_ops = { |
ffc771b3 | 3835 | .queue_rq = mtip_queue_rq, |
ffc771b3 JA |
3836 | .init_request = mtip_init_cmd, |
3837 | .exit_request = mtip_free_cmd, | |
abb0ccd1 ATS |
3838 | .complete = mtip_softirq_done_fn, |
3839 | .timeout = mtip_cmd_timeout, | |
ffc771b3 JA |
3840 | }; |
3841 | ||
88523a61 SB |
3842 | /* |
3843 | * Block layer initialization function. | |
3844 | * | |
3845 | * This function is called once by the PCI layer for each P320 | |
3846 | * device that is connected to the system. | |
3847 | * | |
3848 | * @dd Pointer to the driver data structure. | |
3849 | * | |
3850 | * return value | |
3851 | * 0 on success else an error code. | |
3852 | */ | |
6316668f | 3853 | static int mtip_block_initialize(struct driver_data *dd) |
88523a61 | 3854 | { |
62ee8c13 | 3855 | int rv = 0, wait_for_rebuild = 0; |
88523a61 SB |
3856 | sector_t capacity; |
3857 | unsigned int index = 0; | |
3858 | struct kobject *kobj; | |
3859 | ||
62ee8c13 AT |
3860 | if (dd->disk) |
3861 | goto skip_create_disk; /* hw init done, before rebuild */ | |
3862 | ||
ffc771b3 | 3863 | if (mtip_hw_init(dd)) { |
88523a61 SB |
3864 | rv = -EINVAL; |
3865 | goto protocol_init_error; | |
3866 | } | |
3867 | ||
16c906e5 | 3868 | dd->disk = alloc_disk_node(MTIP_MAX_MINORS, dd->numa_node); |
88523a61 SB |
3869 | if (dd->disk == NULL) { |
3870 | dev_err(&dd->pdev->dev, | |
3871 | "Unable to allocate gendisk structure\n"); | |
3872 | rv = -EINVAL; | |
3873 | goto alloc_disk_error; | |
3874 | } | |
3875 | ||
3876 | /* Generate the disk name, implemented same as in sd.c */ | |
3877 | do { | |
5b0e34e1 PB |
3878 | if (!ida_pre_get(&rssd_index_ida, GFP_KERNEL)) { |
3879 | rv = -ENOMEM; | |
88523a61 | 3880 | goto ida_get_error; |
5b0e34e1 | 3881 | } |
88523a61 SB |
3882 | |
3883 | spin_lock(&rssd_index_lock); | |
3884 | rv = ida_get_new(&rssd_index_ida, &index); | |
3885 | spin_unlock(&rssd_index_lock); | |
3886 | } while (rv == -EAGAIN); | |
3887 | ||
3888 | if (rv) | |
3889 | goto ida_get_error; | |
3890 | ||
3891 | rv = rssd_disk_name_format("rssd", | |
3892 | index, | |
3893 | dd->disk->disk_name, | |
3894 | DISK_NAME_LEN); | |
3895 | if (rv) | |
3896 | goto disk_index_error; | |
3897 | ||
88523a61 | 3898 | dd->disk->major = dd->major; |
75787265 ATS |
3899 | dd->disk->first_minor = index * MTIP_MAX_MINORS; |
3900 | dd->disk->minors = MTIP_MAX_MINORS; | |
88523a61 | 3901 | dd->disk->fops = &mtip_block_ops; |
88523a61 | 3902 | dd->disk->private_data = dd; |
88523a61 SB |
3903 | dd->index = index; |
3904 | ||
8f8b8995 AT |
3905 | mtip_hw_debugfs_init(dd); |
3906 | ||
ffc771b3 JA |
3907 | memset(&dd->tags, 0, sizeof(dd->tags)); |
3908 | dd->tags.ops = &mtip_mq_ops; | |
3909 | dd->tags.nr_hw_queues = 1; | |
3910 | dd->tags.queue_depth = MTIP_MAX_COMMAND_SLOTS; | |
3911 | dd->tags.reserved_tags = 1; | |
3912 | dd->tags.cmd_size = sizeof(struct mtip_cmd); | |
3913 | dd->tags.numa_node = dd->numa_node; | |
4981d04d | 3914 | dd->tags.flags = BLK_MQ_F_SHOULD_MERGE | BLK_MQ_F_NO_SCHED; |
ffc771b3 | 3915 | dd->tags.driver_data = dd; |
abb0ccd1 | 3916 | dd->tags.timeout = MTIP_NCQ_CMD_TIMEOUT_MS; |
ffc771b3 JA |
3917 | |
3918 | rv = blk_mq_alloc_tag_set(&dd->tags); | |
3919 | if (rv) { | |
3920 | dev_err(&dd->pdev->dev, | |
3921 | "Unable to allocate request queue\n"); | |
008e56d2 | 3922 | goto block_queue_alloc_tag_error; |
ffc771b3 JA |
3923 | } |
3924 | ||
62ee8c13 | 3925 | /* Allocate the request queue. */ |
ffc771b3 | 3926 | dd->queue = blk_mq_init_queue(&dd->tags); |
a8a642cc | 3927 | if (IS_ERR(dd->queue)) { |
62ee8c13 AT |
3928 | dev_err(&dd->pdev->dev, |
3929 | "Unable to allocate request queue\n"); | |
3930 | rv = -ENOMEM; | |
3931 | goto block_queue_alloc_init_error; | |
3932 | } | |
3933 | ||
62ee8c13 AT |
3934 | dd->disk->queue = dd->queue; |
3935 | dd->queue->queuedata = dd; | |
3936 | ||
59cf70e2 | 3937 | skip_create_disk: |
ffc771b3 JA |
3938 | /* Initialize the protocol layer. */ |
3939 | wait_for_rebuild = mtip_hw_get_identify(dd); | |
3940 | if (wait_for_rebuild < 0) { | |
3941 | dev_err(&dd->pdev->dev, | |
3942 | "Protocol layer initialization failed\n"); | |
3943 | rv = -EINVAL; | |
3944 | goto init_hw_cmds_error; | |
3945 | } | |
3946 | ||
3947 | /* | |
3948 | * if rebuild pending, start the service thread, and delay the block | |
0d52c756 | 3949 | * queue creation and device_add_disk() |
ffc771b3 JA |
3950 | */ |
3951 | if (wait_for_rebuild == MTIP_FTL_REBUILD_MAGIC) | |
3952 | goto start_service_thread; | |
3953 | ||
62ee8c13 AT |
3954 | /* Set device limits. */ |
3955 | set_bit(QUEUE_FLAG_NONROT, &dd->queue->queue_flags); | |
b277da0a | 3956 | clear_bit(QUEUE_FLAG_ADD_RANDOM, &dd->queue->queue_flags); |
62ee8c13 AT |
3957 | blk_queue_max_segments(dd->queue, MTIP_MAX_SG); |
3958 | blk_queue_physical_block_size(dd->queue, 4096); | |
6c8ab698 AT |
3959 | blk_queue_max_hw_sectors(dd->queue, 0xffff); |
3960 | blk_queue_max_segment_size(dd->queue, 0x400000); | |
62ee8c13 | 3961 | blk_queue_io_min(dd->queue, 4096); |
1044b1bb | 3962 | blk_queue_bounce_limit(dd->queue, dd->pdev->dma_mask); |
6c8ab698 | 3963 | |
15283469 AT |
3964 | /* Signal trim support */ |
3965 | if (dd->trim_supp == true) { | |
3966 | set_bit(QUEUE_FLAG_DISCARD, &dd->queue->queue_flags); | |
3967 | dd->queue->limits.discard_granularity = 4096; | |
3968 | blk_queue_max_discard_sectors(dd->queue, | |
3969 | MTIP_MAX_TRIM_ENTRY_LEN * MTIP_MAX_TRIM_ENTRIES); | |
15283469 AT |
3970 | } |
3971 | ||
88523a61 SB |
3972 | /* Set the capacity of the device in 512 byte sectors. */ |
3973 | if (!(mtip_hw_get_capacity(dd, &capacity))) { | |
3974 | dev_warn(&dd->pdev->dev, | |
3975 | "Could not read drive capacity\n"); | |
3976 | rv = -EIO; | |
3977 | goto read_capacity_error; | |
3978 | } | |
3979 | set_capacity(dd->disk, capacity); | |
3980 | ||
3981 | /* Enable the block device and add it to /dev */ | |
0d52c756 | 3982 | device_add_disk(&dd->pdev->dev, dd->disk); |
88523a61 | 3983 | |
8f8b8995 | 3984 | dd->bdev = bdget_disk(dd->disk, 0); |
88523a61 SB |
3985 | /* |
3986 | * Now that the disk is active, initialize any sysfs attributes | |
3987 | * managed by the protocol layer. | |
3988 | */ | |
3989 | kobj = kobject_get(&disk_to_dev(dd->disk)->kobj); | |
3990 | if (kobj) { | |
3991 | mtip_hw_sysfs_init(dd, kobj); | |
3992 | kobject_put(kobj); | |
3993 | } | |
3994 | ||
45038367 | 3995 | if (dd->mtip_svc_handler) { |
8a857a88 | 3996 | set_bit(MTIP_DDF_INIT_DONE_BIT, &dd->dd_flag); |
62ee8c13 | 3997 | return rv; /* service thread created for handling rebuild */ |
45038367 | 3998 | } |
62ee8c13 AT |
3999 | |
4000 | start_service_thread: | |
16c906e5 | 4001 | dd->mtip_svc_handler = kthread_create_on_node(mtip_service_thread, |
8aeea031 RV |
4002 | dd, dd->numa_node, |
4003 | "mtip_svc_thd_%02d", index); | |
60ec0eec AT |
4004 | |
4005 | if (IS_ERR(dd->mtip_svc_handler)) { | |
c74b0f58 | 4006 | dev_err(&dd->pdev->dev, "service thread failed to start\n"); |
60ec0eec AT |
4007 | dd->mtip_svc_handler = NULL; |
4008 | rv = -EFAULT; | |
62ee8c13 | 4009 | goto kthread_run_error; |
60ec0eec | 4010 | } |
16c906e5 | 4011 | wake_up_process(dd->mtip_svc_handler); |
45038367 AT |
4012 | if (wait_for_rebuild == MTIP_FTL_REBUILD_MAGIC) |
4013 | rv = wait_for_rebuild; | |
4014 | ||
88523a61 SB |
4015 | return rv; |
4016 | ||
62ee8c13 | 4017 | kthread_run_error: |
8f8b8995 AT |
4018 | bdput(dd->bdev); |
4019 | dd->bdev = NULL; | |
7b421d24 | 4020 | |
62ee8c13 | 4021 | /* Delete our gendisk. This also removes the device from /dev */ |
88523a61 SB |
4022 | del_gendisk(dd->disk); |
4023 | ||
62ee8c13 | 4024 | read_capacity_error: |
ffc771b3 | 4025 | init_hw_cmds_error: |
62ee8c13 | 4026 | blk_cleanup_queue(dd->queue); |
62ee8c13 | 4027 | block_queue_alloc_init_error: |
008e56d2 ATS |
4028 | blk_mq_free_tag_set(&dd->tags); |
4029 | block_queue_alloc_tag_error: | |
8f8b8995 | 4030 | mtip_hw_debugfs_exit(dd); |
88523a61 SB |
4031 | disk_index_error: |
4032 | spin_lock(&rssd_index_lock); | |
4033 | ida_remove(&rssd_index_ida, index); | |
4034 | spin_unlock(&rssd_index_lock); | |
4035 | ||
4036 | ida_get_error: | |
4037 | put_disk(dd->disk); | |
4038 | ||
4039 | alloc_disk_error: | |
62ee8c13 | 4040 | mtip_hw_exit(dd); /* De-initialize the protocol layer. */ |
88523a61 SB |
4041 | |
4042 | protocol_init_error: | |
4043 | return rv; | |
4044 | } | |
4045 | ||
008e56d2 ATS |
4046 | static void mtip_no_dev_cleanup(struct request *rq, void *data, bool reserv) |
4047 | { | |
4048 | struct driver_data *dd = (struct driver_data *)data; | |
4049 | struct mtip_cmd *cmd; | |
4050 | ||
4dda4735 | 4051 | if (likely(!reserv)) { |
95c55ff4 | 4052 | cmd = blk_mq_rq_to_pdu(rq); |
4dda4735 | 4053 | cmd->status = -ENODEV; |
08e0029a | 4054 | blk_mq_complete_request(rq); |
4dda4735 | 4055 | } else if (test_bit(MTIP_PF_IC_ACTIVE_BIT, &dd->port->flags)) { |
008e56d2 ATS |
4056 | |
4057 | cmd = mtip_cmd_from_tag(dd, MTIP_TAG_INTERNAL); | |
4058 | if (cmd->comp_func) | |
4059 | cmd->comp_func(dd->port, MTIP_TAG_INTERNAL, | |
4060 | cmd, -ENODEV); | |
4061 | } | |
4062 | } | |
4063 | ||
88523a61 SB |
4064 | /* |
4065 | * Block layer deinitialization function. | |
4066 | * | |
4067 | * Called by the PCI layer as each P320 device is removed. | |
4068 | * | |
4069 | * @dd Pointer to the driver data structure. | |
4070 | * | |
4071 | * return value | |
4072 | * 0 | |
4073 | */ | |
6316668f | 4074 | static int mtip_block_remove(struct driver_data *dd) |
88523a61 SB |
4075 | { |
4076 | struct kobject *kobj; | |
60ec0eec | 4077 | |
2132a544 | 4078 | mtip_hw_debugfs_exit(dd); |
60ec0eec | 4079 | |
2132a544 ATS |
4080 | if (dd->mtip_svc_handler) { |
4081 | set_bit(MTIP_PF_SVC_THD_STOP_BIT, &dd->port->flags); | |
4082 | wake_up_interruptible(&dd->port->svc_wait); | |
4083 | kthread_stop(dd->mtip_svc_handler); | |
4084 | } | |
88523a61 | 4085 | |
2132a544 ATS |
4086 | /* Clean up the sysfs attributes, if created */ |
4087 | if (test_bit(MTIP_DDF_INIT_DONE_BIT, &dd->dd_flag)) { | |
4088 | kobj = kobject_get(&disk_to_dev(dd->disk)->kobj); | |
4089 | if (kobj) { | |
4090 | mtip_hw_sysfs_exit(dd, kobj); | |
4091 | kobject_put(kobj); | |
8f8b8995 | 4092 | } |
2132a544 | 4093 | } |
ffc771b3 | 4094 | |
008e56d2 ATS |
4095 | if (!dd->sr) { |
4096 | /* | |
4097 | * Explicitly wait here for IOs to quiesce, | |
4098 | * as mtip_standby_drive usually won't wait for IOs. | |
4099 | */ | |
8afdd94c | 4100 | if (!mtip_quiesce_io(dd->port, MTIP_QUIESCE_IO_TIMEOUT_MS)) |
008e56d2 ATS |
4101 | mtip_standby_drive(dd); |
4102 | } | |
2132a544 | 4103 | else |
8f8b8995 AT |
4104 | dev_info(&dd->pdev->dev, "device %s surprise removal\n", |
4105 | dd->disk->disk_name); | |
2132a544 | 4106 | |
1671d522 | 4107 | blk_freeze_queue_start(dd->queue); |
008e56d2 | 4108 | blk_mq_stop_hw_queues(dd->queue); |
6d125de4 | 4109 | blk_mq_tagset_busy_iter(&dd->tags, mtip_no_dev_cleanup, dd); |
008e56d2 | 4110 | |
2132a544 ATS |
4111 | /* |
4112 | * Delete our gendisk structure. This also removes the device | |
4113 | * from /dev | |
4114 | */ | |
4115 | if (dd->bdev) { | |
4116 | bdput(dd->bdev); | |
4117 | dd->bdev = NULL; | |
4118 | } | |
4119 | if (dd->disk) { | |
59cf70e2 ATS |
4120 | if (test_bit(MTIP_DDF_INIT_DONE_BIT, &dd->dd_flag)) |
4121 | del_gendisk(dd->disk); | |
2132a544 ATS |
4122 | if (dd->disk->queue) { |
4123 | blk_cleanup_queue(dd->queue); | |
4124 | blk_mq_free_tag_set(&dd->tags); | |
4125 | dd->queue = NULL; | |
4126 | } | |
4127 | put_disk(dd->disk); | |
8f8b8995 | 4128 | } |
2132a544 ATS |
4129 | dd->disk = NULL; |
4130 | ||
4131 | spin_lock(&rssd_index_lock); | |
4132 | ida_remove(&rssd_index_ida, dd->index); | |
4133 | spin_unlock(&rssd_index_lock); | |
88523a61 SB |
4134 | |
4135 | /* De-initialize the protocol layer. */ | |
4136 | mtip_hw_exit(dd); | |
4137 | ||
4138 | return 0; | |
4139 | } | |
4140 | ||
4141 | /* | |
4142 | * Function called by the PCI layer when just before the | |
4143 | * machine shuts down. | |
4144 | * | |
4145 | * If a protocol layer shutdown function is present it will be called | |
4146 | * by this function. | |
4147 | * | |
4148 | * @dd Pointer to the driver data structure. | |
4149 | * | |
4150 | * return value | |
4151 | * 0 | |
4152 | */ | |
6316668f | 4153 | static int mtip_block_shutdown(struct driver_data *dd) |
88523a61 | 4154 | { |
ffc771b3 JA |
4155 | mtip_hw_shutdown(dd); |
4156 | ||
88523a61 | 4157 | /* Delete our gendisk structure, and cleanup the blk queue. */ |
58c49df3 | 4158 | if (dd->disk) { |
5a79e1ac AT |
4159 | dev_info(&dd->pdev->dev, |
4160 | "Shutting down %s ...\n", dd->disk->disk_name); | |
4161 | ||
59cf70e2 ATS |
4162 | if (test_bit(MTIP_DDF_INIT_DONE_BIT, &dd->dd_flag)) |
4163 | del_gendisk(dd->disk); | |
5a79e1ac | 4164 | if (dd->disk->queue) { |
5a79e1ac | 4165 | blk_cleanup_queue(dd->queue); |
ffc771b3 | 4166 | blk_mq_free_tag_set(&dd->tags); |
02b48265 ATS |
4167 | } |
4168 | put_disk(dd->disk); | |
5a79e1ac AT |
4169 | dd->disk = NULL; |
4170 | dd->queue = NULL; | |
58c49df3 AT |
4171 | } |
4172 | ||
8182b495 AT |
4173 | spin_lock(&rssd_index_lock); |
4174 | ida_remove(&rssd_index_ida, dd->index); | |
4175 | spin_unlock(&rssd_index_lock); | |
88523a61 SB |
4176 | return 0; |
4177 | } | |
4178 | ||
6316668f | 4179 | static int mtip_block_suspend(struct driver_data *dd) |
88523a61 SB |
4180 | { |
4181 | dev_info(&dd->pdev->dev, | |
4182 | "Suspending %s ...\n", dd->disk->disk_name); | |
4183 | mtip_hw_suspend(dd); | |
4184 | return 0; | |
4185 | } | |
4186 | ||
6316668f | 4187 | static int mtip_block_resume(struct driver_data *dd) |
88523a61 SB |
4188 | { |
4189 | dev_info(&dd->pdev->dev, "Resuming %s ...\n", | |
4190 | dd->disk->disk_name); | |
4191 | mtip_hw_resume(dd); | |
4192 | return 0; | |
4193 | } | |
4194 | ||
16c906e5 AT |
4195 | static void drop_cpu(int cpu) |
4196 | { | |
4197 | cpu_use[cpu]--; | |
4198 | } | |
4199 | ||
4200 | static int get_least_used_cpu_on_node(int node) | |
4201 | { | |
4202 | int cpu, least_used_cpu, least_cnt; | |
4203 | const struct cpumask *node_mask; | |
4204 | ||
4205 | node_mask = cpumask_of_node(node); | |
4206 | least_used_cpu = cpumask_first(node_mask); | |
4207 | least_cnt = cpu_use[least_used_cpu]; | |
4208 | cpu = least_used_cpu; | |
4209 | ||
4210 | for_each_cpu(cpu, node_mask) { | |
4211 | if (cpu_use[cpu] < least_cnt) { | |
4212 | least_used_cpu = cpu; | |
4213 | least_cnt = cpu_use[cpu]; | |
4214 | } | |
4215 | } | |
4216 | cpu_use[least_used_cpu]++; | |
4217 | return least_used_cpu; | |
4218 | } | |
4219 | ||
4220 | /* Helper for selecting a node in round robin mode */ | |
4221 | static inline int mtip_get_next_rr_node(void) | |
4222 | { | |
4223 | static int next_node = -1; | |
4224 | ||
4225 | if (next_node == -1) { | |
4226 | next_node = first_online_node; | |
4227 | return next_node; | |
4228 | } | |
4229 | ||
4230 | next_node = next_online_node(next_node); | |
4231 | if (next_node == MAX_NUMNODES) | |
4232 | next_node = first_online_node; | |
4233 | return next_node; | |
4234 | } | |
4235 | ||
25bac122 FW |
4236 | static DEFINE_HANDLER(0); |
4237 | static DEFINE_HANDLER(1); | |
4238 | static DEFINE_HANDLER(2); | |
4239 | static DEFINE_HANDLER(3); | |
4240 | static DEFINE_HANDLER(4); | |
4241 | static DEFINE_HANDLER(5); | |
4242 | static DEFINE_HANDLER(6); | |
4243 | static DEFINE_HANDLER(7); | |
16c906e5 | 4244 | |
d1e714db AT |
4245 | static void mtip_disable_link_opts(struct driver_data *dd, struct pci_dev *pdev) |
4246 | { | |
4247 | int pos; | |
4248 | unsigned short pcie_dev_ctrl; | |
4249 | ||
4250 | pos = pci_find_capability(pdev, PCI_CAP_ID_EXP); | |
4251 | if (pos) { | |
4252 | pci_read_config_word(pdev, | |
4253 | pos + PCI_EXP_DEVCTL, | |
4254 | &pcie_dev_ctrl); | |
4255 | if (pcie_dev_ctrl & (1 << 11) || | |
4256 | pcie_dev_ctrl & (1 << 4)) { | |
4257 | dev_info(&dd->pdev->dev, | |
4258 | "Disabling ERO/No-Snoop on bridge device %04x:%04x\n", | |
4259 | pdev->vendor, pdev->device); | |
4260 | pcie_dev_ctrl &= ~(PCI_EXP_DEVCTL_NOSNOOP_EN | | |
4261 | PCI_EXP_DEVCTL_RELAX_EN); | |
4262 | pci_write_config_word(pdev, | |
4263 | pos + PCI_EXP_DEVCTL, | |
4264 | pcie_dev_ctrl); | |
4265 | } | |
4266 | } | |
4267 | } | |
4268 | ||
4269 | static void mtip_fix_ero_nosnoop(struct driver_data *dd, struct pci_dev *pdev) | |
4270 | { | |
4271 | /* | |
4272 | * This workaround is specific to AMD/ATI chipset with a PCI upstream | |
4273 | * device with device id 0x5aXX | |
4274 | */ | |
4275 | if (pdev->bus && pdev->bus->self) { | |
4276 | if (pdev->bus->self->vendor == PCI_VENDOR_ID_ATI && | |
4277 | ((pdev->bus->self->device & 0xff00) == 0x5a00)) { | |
4278 | mtip_disable_link_opts(dd, pdev->bus->self); | |
4279 | } else { | |
4280 | /* Check further up the topology */ | |
4281 | struct pci_dev *parent_dev = pdev->bus->self; | |
4282 | if (parent_dev->bus && | |
4283 | parent_dev->bus->parent && | |
4284 | parent_dev->bus->parent->self && | |
4285 | parent_dev->bus->parent->self->vendor == | |
4286 | PCI_VENDOR_ID_ATI && | |
4287 | (parent_dev->bus->parent->self->device & | |
4288 | 0xff00) == 0x5a00) { | |
4289 | mtip_disable_link_opts(dd, | |
4290 | parent_dev->bus->parent->self); | |
4291 | } | |
4292 | } | |
4293 | } | |
4294 | } | |
4295 | ||
88523a61 SB |
4296 | /* |
4297 | * Called for each supported PCI device detected. | |
4298 | * | |
4299 | * This function allocates the private data structure, enables the | |
4300 | * PCI device and then calls the block layer initialization function. | |
4301 | * | |
4302 | * return value | |
4303 | * 0 on success else an error code. | |
4304 | */ | |
4305 | static int mtip_pci_probe(struct pci_dev *pdev, | |
4306 | const struct pci_device_id *ent) | |
4307 | { | |
4308 | int rv = 0; | |
4309 | struct driver_data *dd = NULL; | |
16c906e5 AT |
4310 | char cpu_list[256]; |
4311 | const struct cpumask *node_mask; | |
4312 | int cpu, i = 0, j = 0; | |
4313 | int my_node = NUMA_NO_NODE; | |
0caff003 | 4314 | unsigned long flags; |
88523a61 SB |
4315 | |
4316 | /* Allocate memory for this devices private data. */ | |
16c906e5 AT |
4317 | my_node = pcibus_to_node(pdev->bus); |
4318 | if (my_node != NUMA_NO_NODE) { | |
4319 | if (!node_online(my_node)) | |
4320 | my_node = mtip_get_next_rr_node(); | |
4321 | } else { | |
4322 | dev_info(&pdev->dev, "Kernel not reporting proximity, choosing a node\n"); | |
4323 | my_node = mtip_get_next_rr_node(); | |
4324 | } | |
4325 | dev_info(&pdev->dev, "NUMA node %d (closest: %d,%d, probe on %d:%d)\n", | |
4326 | my_node, pcibus_to_node(pdev->bus), dev_to_node(&pdev->dev), | |
7f328908 | 4327 | cpu_to_node(raw_smp_processor_id()), raw_smp_processor_id()); |
16c906e5 AT |
4328 | |
4329 | dd = kzalloc_node(sizeof(struct driver_data), GFP_KERNEL, my_node); | |
88523a61 SB |
4330 | if (dd == NULL) { |
4331 | dev_err(&pdev->dev, | |
4332 | "Unable to allocate memory for driver data\n"); | |
4333 | return -ENOMEM; | |
4334 | } | |
4335 | ||
88523a61 SB |
4336 | /* Attach the private data to this PCI device. */ |
4337 | pci_set_drvdata(pdev, dd); | |
4338 | ||
4339 | rv = pcim_enable_device(pdev); | |
4340 | if (rv < 0) { | |
4341 | dev_err(&pdev->dev, "Unable to enable device\n"); | |
4342 | goto iomap_err; | |
4343 | } | |
4344 | ||
4345 | /* Map BAR5 to memory. */ | |
4346 | rv = pcim_iomap_regions(pdev, 1 << MTIP_ABAR, MTIP_DRV_NAME); | |
4347 | if (rv < 0) { | |
4348 | dev_err(&pdev->dev, "Unable to map regions\n"); | |
4349 | goto iomap_err; | |
4350 | } | |
4351 | ||
4352 | if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(64))) { | |
4353 | rv = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64)); | |
4354 | ||
4355 | if (rv) { | |
4356 | rv = pci_set_consistent_dma_mask(pdev, | |
4357 | DMA_BIT_MASK(32)); | |
4358 | if (rv) { | |
4359 | dev_warn(&pdev->dev, | |
4360 | "64-bit DMA enable failed\n"); | |
4361 | goto setmask_err; | |
4362 | } | |
4363 | } | |
4364 | } | |
4365 | ||
16c906e5 AT |
4366 | /* Copy the info we may need later into the private data structure. */ |
4367 | dd->major = mtip_major; | |
4368 | dd->instance = instance; | |
4369 | dd->pdev = pdev; | |
4370 | dd->numa_node = my_node; | |
4371 | ||
0caff003 AT |
4372 | INIT_LIST_HEAD(&dd->online_list); |
4373 | INIT_LIST_HEAD(&dd->remove_list); | |
4374 | ||
16c906e5 AT |
4375 | memset(dd->workq_name, 0, 32); |
4376 | snprintf(dd->workq_name, 31, "mtipq%d", dd->instance); | |
88523a61 | 4377 | |
16c906e5 AT |
4378 | dd->isr_workq = create_workqueue(dd->workq_name); |
4379 | if (!dd->isr_workq) { | |
4380 | dev_warn(&pdev->dev, "Can't create wq %d\n", dd->instance); | |
d137c830 | 4381 | rv = -ENOMEM; |
16c906e5 AT |
4382 | goto block_initialize_err; |
4383 | } | |
4384 | ||
4385 | memset(cpu_list, 0, sizeof(cpu_list)); | |
4386 | ||
4387 | node_mask = cpumask_of_node(dd->numa_node); | |
4388 | if (!cpumask_empty(node_mask)) { | |
4389 | for_each_cpu(cpu, node_mask) | |
4390 | { | |
4391 | snprintf(&cpu_list[j], 256 - j, "%d ", cpu); | |
4392 | j = strlen(cpu_list); | |
4393 | } | |
4394 | ||
4395 | dev_info(&pdev->dev, "Node %d on package %d has %d cpu(s): %s\n", | |
4396 | dd->numa_node, | |
4397 | topology_physical_package_id(cpumask_first(node_mask)), | |
4398 | nr_cpus_node(dd->numa_node), | |
4399 | cpu_list); | |
4400 | } else | |
4401 | dev_dbg(&pdev->dev, "mtip32xx: node_mask empty\n"); | |
4402 | ||
4403 | dd->isr_binding = get_least_used_cpu_on_node(dd->numa_node); | |
4404 | dev_info(&pdev->dev, "Initial IRQ binding node:cpu %d:%d\n", | |
4405 | cpu_to_node(dd->isr_binding), dd->isr_binding); | |
4406 | ||
4407 | /* first worker context always runs in ISR */ | |
4408 | dd->work[0].cpu_binding = dd->isr_binding; | |
4409 | dd->work[1].cpu_binding = get_least_used_cpu_on_node(dd->numa_node); | |
4410 | dd->work[2].cpu_binding = get_least_used_cpu_on_node(dd->numa_node); | |
4411 | dd->work[3].cpu_binding = dd->work[0].cpu_binding; | |
4412 | dd->work[4].cpu_binding = dd->work[1].cpu_binding; | |
4413 | dd->work[5].cpu_binding = dd->work[2].cpu_binding; | |
4414 | dd->work[6].cpu_binding = dd->work[2].cpu_binding; | |
4415 | dd->work[7].cpu_binding = dd->work[1].cpu_binding; | |
4416 | ||
4417 | /* Log the bindings */ | |
4418 | for_each_present_cpu(cpu) { | |
4419 | memset(cpu_list, 0, sizeof(cpu_list)); | |
4420 | for (i = 0, j = 0; i < MTIP_MAX_SLOT_GROUPS; i++) { | |
4421 | if (dd->work[i].cpu_binding == cpu) { | |
4422 | snprintf(&cpu_list[j], 256 - j, "%d ", i); | |
4423 | j = strlen(cpu_list); | |
4424 | } | |
4425 | } | |
4426 | if (j) | |
4427 | dev_info(&pdev->dev, "CPU %d: WQs %s\n", cpu, cpu_list); | |
4428 | } | |
4429 | ||
4430 | INIT_WORK(&dd->work[0].work, mtip_workq_sdbf0); | |
4431 | INIT_WORK(&dd->work[1].work, mtip_workq_sdbf1); | |
4432 | INIT_WORK(&dd->work[2].work, mtip_workq_sdbf2); | |
4433 | INIT_WORK(&dd->work[3].work, mtip_workq_sdbf3); | |
4434 | INIT_WORK(&dd->work[4].work, mtip_workq_sdbf4); | |
4435 | INIT_WORK(&dd->work[5].work, mtip_workq_sdbf5); | |
4436 | INIT_WORK(&dd->work[6].work, mtip_workq_sdbf6); | |
4437 | INIT_WORK(&dd->work[7].work, mtip_workq_sdbf7); | |
4438 | ||
4439 | pci_set_master(pdev); | |
d137c830 WY |
4440 | rv = pci_enable_msi(pdev); |
4441 | if (rv) { | |
88523a61 SB |
4442 | dev_warn(&pdev->dev, |
4443 | "Unable to enable MSI interrupt.\n"); | |
cf91f39b | 4444 | goto msi_initialize_err; |
88523a61 SB |
4445 | } |
4446 | ||
d1e714db AT |
4447 | mtip_fix_ero_nosnoop(dd, pdev); |
4448 | ||
88523a61 SB |
4449 | /* Initialize the block layer. */ |
4450 | rv = mtip_block_initialize(dd); | |
4451 | if (rv < 0) { | |
4452 | dev_err(&pdev->dev, | |
4453 | "Unable to initialize block layer\n"); | |
4454 | goto block_initialize_err; | |
4455 | } | |
4456 | ||
4457 | /* | |
4458 | * Increment the instance count so that each device has a unique | |
4459 | * instance number. | |
4460 | */ | |
4461 | instance++; | |
45038367 | 4462 | if (rv != MTIP_FTL_REBUILD_MAGIC) |
8a857a88 | 4463 | set_bit(MTIP_DDF_INIT_DONE_BIT, &dd->dd_flag); |
6b06d35f AT |
4464 | else |
4465 | rv = 0; /* device in rebuild state, return 0 from probe */ | |
0caff003 AT |
4466 | |
4467 | /* Add to online list even if in ftl rebuild */ | |
4468 | spin_lock_irqsave(&dev_lock, flags); | |
4469 | list_add(&dd->online_list, &online_list); | |
4470 | spin_unlock_irqrestore(&dev_lock, flags); | |
4471 | ||
88523a61 SB |
4472 | goto done; |
4473 | ||
4474 | block_initialize_err: | |
4475 | pci_disable_msi(pdev); | |
cf91f39b AG |
4476 | |
4477 | msi_initialize_err: | |
16c906e5 AT |
4478 | if (dd->isr_workq) { |
4479 | flush_workqueue(dd->isr_workq); | |
4480 | destroy_workqueue(dd->isr_workq); | |
4481 | drop_cpu(dd->work[0].cpu_binding); | |
4482 | drop_cpu(dd->work[1].cpu_binding); | |
4483 | drop_cpu(dd->work[2].cpu_binding); | |
4484 | } | |
88523a61 SB |
4485 | setmask_err: |
4486 | pcim_iounmap_regions(pdev, 1 << MTIP_ABAR); | |
4487 | ||
4488 | iomap_err: | |
4489 | kfree(dd); | |
4490 | pci_set_drvdata(pdev, NULL); | |
4491 | return rv; | |
4492 | done: | |
88523a61 SB |
4493 | return rv; |
4494 | } | |
4495 | ||
4496 | /* | |
4497 | * Called for each probed device when the device is removed or the | |
4498 | * driver is unloaded. | |
4499 | * | |
4500 | * return value | |
4501 | * None | |
4502 | */ | |
4503 | static void mtip_pci_remove(struct pci_dev *pdev) | |
4504 | { | |
4505 | struct driver_data *dd = pci_get_drvdata(pdev); | |
8f8b8995 | 4506 | unsigned long flags, to; |
88523a61 | 4507 | |
51c6570e | 4508 | set_bit(MTIP_DDF_REMOVAL_BIT, &dd->dd_flag); |
45038367 | 4509 | |
0caff003 AT |
4510 | spin_lock_irqsave(&dev_lock, flags); |
4511 | list_del_init(&dd->online_list); | |
4512 | list_add(&dd->remove_list, &removing_list); | |
4513 | spin_unlock_irqrestore(&dev_lock, flags); | |
4514 | ||
8f8b8995 AT |
4515 | mtip_check_surprise_removal(pdev); |
4516 | synchronize_irq(dd->pdev->irq); | |
4517 | ||
4518 | /* Spin until workers are done */ | |
4519 | to = jiffies + msecs_to_jiffies(4000); | |
4520 | do { | |
4521 | msleep(20); | |
4522 | } while (atomic_read(&dd->irq_workers_active) != 0 && | |
4523 | time_before(jiffies, to)); | |
4524 | ||
008e56d2 ATS |
4525 | if (!dd->sr) |
4526 | fsync_bdev(dd->bdev); | |
51c6570e | 4527 | |
8f8b8995 AT |
4528 | if (atomic_read(&dd->irq_workers_active) != 0) { |
4529 | dev_warn(&dd->pdev->dev, | |
4530 | "Completion workers still active!\n"); | |
88523a61 | 4531 | } |
88523a61 | 4532 | |
008e56d2 | 4533 | blk_set_queue_dying(dd->queue); |
51c6570e ATS |
4534 | set_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag); |
4535 | ||
88523a61 SB |
4536 | /* Clean up the block layer. */ |
4537 | mtip_block_remove(dd); | |
4538 | ||
16c906e5 AT |
4539 | if (dd->isr_workq) { |
4540 | flush_workqueue(dd->isr_workq); | |
4541 | destroy_workqueue(dd->isr_workq); | |
4542 | drop_cpu(dd->work[0].cpu_binding); | |
4543 | drop_cpu(dd->work[1].cpu_binding); | |
4544 | drop_cpu(dd->work[2].cpu_binding); | |
4545 | } | |
4546 | ||
88523a61 SB |
4547 | pci_disable_msi(pdev); |
4548 | ||
0caff003 AT |
4549 | spin_lock_irqsave(&dev_lock, flags); |
4550 | list_del_init(&dd->remove_list); | |
4551 | spin_unlock_irqrestore(&dev_lock, flags); | |
4552 | ||
2132a544 | 4553 | kfree(dd); |
8f8b8995 | 4554 | |
88523a61 | 4555 | pcim_iounmap_regions(pdev, 1 << MTIP_ABAR); |
8f8b8995 | 4556 | pci_set_drvdata(pdev, NULL); |
88523a61 SB |
4557 | } |
4558 | ||
4559 | /* | |
4560 | * Called for each probed device when the device is suspended. | |
4561 | * | |
4562 | * return value | |
4563 | * 0 Success | |
4564 | * <0 Error | |
4565 | */ | |
4566 | static int mtip_pci_suspend(struct pci_dev *pdev, pm_message_t mesg) | |
4567 | { | |
4568 | int rv = 0; | |
4569 | struct driver_data *dd = pci_get_drvdata(pdev); | |
4570 | ||
4571 | if (!dd) { | |
4572 | dev_err(&pdev->dev, | |
4573 | "Driver private datastructure is NULL\n"); | |
4574 | return -EFAULT; | |
4575 | } | |
4576 | ||
8a857a88 | 4577 | set_bit(MTIP_DDF_RESUME_BIT, &dd->dd_flag); |
88523a61 SB |
4578 | |
4579 | /* Disable ports & interrupts then send standby immediate */ | |
4580 | rv = mtip_block_suspend(dd); | |
4581 | if (rv < 0) { | |
4582 | dev_err(&pdev->dev, | |
4583 | "Failed to suspend controller\n"); | |
4584 | return rv; | |
4585 | } | |
4586 | ||
4587 | /* | |
4588 | * Save the pci config space to pdev structure & | |
4589 | * disable the device | |
4590 | */ | |
4591 | pci_save_state(pdev); | |
4592 | pci_disable_device(pdev); | |
4593 | ||
4594 | /* Move to Low power state*/ | |
4595 | pci_set_power_state(pdev, PCI_D3hot); | |
4596 | ||
4597 | return rv; | |
4598 | } | |
4599 | ||
4600 | /* | |
4601 | * Called for each probed device when the device is resumed. | |
4602 | * | |
4603 | * return value | |
4604 | * 0 Success | |
4605 | * <0 Error | |
4606 | */ | |
4607 | static int mtip_pci_resume(struct pci_dev *pdev) | |
4608 | { | |
4609 | int rv = 0; | |
4610 | struct driver_data *dd; | |
4611 | ||
4612 | dd = pci_get_drvdata(pdev); | |
4613 | if (!dd) { | |
4614 | dev_err(&pdev->dev, | |
4615 | "Driver private datastructure is NULL\n"); | |
4616 | return -EFAULT; | |
4617 | } | |
4618 | ||
4619 | /* Move the device to active State */ | |
4620 | pci_set_power_state(pdev, PCI_D0); | |
4621 | ||
4622 | /* Restore PCI configuration space */ | |
4623 | pci_restore_state(pdev); | |
4624 | ||
4625 | /* Enable the PCI device*/ | |
4626 | rv = pcim_enable_device(pdev); | |
4627 | if (rv < 0) { | |
4628 | dev_err(&pdev->dev, | |
4629 | "Failed to enable card during resume\n"); | |
4630 | goto err; | |
4631 | } | |
4632 | pci_set_master(pdev); | |
4633 | ||
4634 | /* | |
4635 | * Calls hbaReset, initPort, & startPort function | |
4636 | * then enables interrupts | |
4637 | */ | |
4638 | rv = mtip_block_resume(dd); | |
4639 | if (rv < 0) | |
4640 | dev_err(&pdev->dev, "Unable to resume\n"); | |
4641 | ||
4642 | err: | |
8a857a88 | 4643 | clear_bit(MTIP_DDF_RESUME_BIT, &dd->dd_flag); |
88523a61 SB |
4644 | |
4645 | return rv; | |
4646 | } | |
4647 | ||
4648 | /* | |
4649 | * Shutdown routine | |
4650 | * | |
4651 | * return value | |
4652 | * None | |
4653 | */ | |
4654 | static void mtip_pci_shutdown(struct pci_dev *pdev) | |
4655 | { | |
4656 | struct driver_data *dd = pci_get_drvdata(pdev); | |
4657 | if (dd) | |
4658 | mtip_block_shutdown(dd); | |
4659 | } | |
4660 | ||
88523a61 | 4661 | /* Table of device ids supported by this driver. */ |
9baa3c34 | 4662 | static const struct pci_device_id mtip_pci_tbl[] = { |
1a131458 AT |
4663 | { PCI_DEVICE(PCI_VENDOR_ID_MICRON, P320H_DEVICE_ID) }, |
4664 | { PCI_DEVICE(PCI_VENDOR_ID_MICRON, P320M_DEVICE_ID) }, | |
4665 | { PCI_DEVICE(PCI_VENDOR_ID_MICRON, P320S_DEVICE_ID) }, | |
4666 | { PCI_DEVICE(PCI_VENDOR_ID_MICRON, P325M_DEVICE_ID) }, | |
4667 | { PCI_DEVICE(PCI_VENDOR_ID_MICRON, P420H_DEVICE_ID) }, | |
4668 | { PCI_DEVICE(PCI_VENDOR_ID_MICRON, P420M_DEVICE_ID) }, | |
4669 | { PCI_DEVICE(PCI_VENDOR_ID_MICRON, P425M_DEVICE_ID) }, | |
88523a61 SB |
4670 | { 0 } |
4671 | }; | |
4672 | ||
4673 | /* Structure that describes the PCI driver functions. */ | |
3ff147d3 | 4674 | static struct pci_driver mtip_pci_driver = { |
88523a61 SB |
4675 | .name = MTIP_DRV_NAME, |
4676 | .id_table = mtip_pci_tbl, | |
4677 | .probe = mtip_pci_probe, | |
4678 | .remove = mtip_pci_remove, | |
4679 | .suspend = mtip_pci_suspend, | |
4680 | .resume = mtip_pci_resume, | |
4681 | .shutdown = mtip_pci_shutdown, | |
4682 | }; | |
4683 | ||
4684 | MODULE_DEVICE_TABLE(pci, mtip_pci_tbl); | |
4685 | ||
4686 | /* | |
4687 | * Module initialization function. | |
4688 | * | |
4689 | * Called once when the module is loaded. This function allocates a major | |
4690 | * block device number to the Cyclone devices and registers the PCI layer | |
4691 | * of the driver. | |
4692 | * | |
4693 | * Return value | |
4694 | * 0 on success else error code. | |
4695 | */ | |
4696 | static int __init mtip_init(void) | |
4697 | { | |
6d27f09a RS |
4698 | int error; |
4699 | ||
45422e74 | 4700 | pr_info(MTIP_DRV_NAME " Version " MTIP_DRV_VERSION "\n"); |
88523a61 | 4701 | |
0caff003 AT |
4702 | spin_lock_init(&dev_lock); |
4703 | ||
4704 | INIT_LIST_HEAD(&online_list); | |
4705 | INIT_LIST_HEAD(&removing_list); | |
4706 | ||
88523a61 | 4707 | /* Allocate a major block device number to use with this driver. */ |
6d27f09a RS |
4708 | error = register_blkdev(0, MTIP_DRV_NAME); |
4709 | if (error <= 0) { | |
45422e74 | 4710 | pr_err("Unable to register block device (%d)\n", |
6d27f09a | 4711 | error); |
88523a61 SB |
4712 | return -EBUSY; |
4713 | } | |
6d27f09a | 4714 | mtip_major = error; |
88523a61 | 4715 | |
0caff003 AT |
4716 | dfs_parent = debugfs_create_dir("rssd", NULL); |
4717 | if (IS_ERR_OR_NULL(dfs_parent)) { | |
4718 | pr_warn("Error creating debugfs parent\n"); | |
4719 | dfs_parent = NULL; | |
4720 | } | |
4721 | if (dfs_parent) { | |
4722 | dfs_device_status = debugfs_create_file("device_status", | |
4723 | S_IRUGO, dfs_parent, NULL, | |
4724 | &mtip_device_status_fops); | |
4725 | if (IS_ERR_OR_NULL(dfs_device_status)) { | |
4726 | pr_err("Error creating device_status node\n"); | |
4727 | dfs_device_status = NULL; | |
7b421d24 AT |
4728 | } |
4729 | } | |
4730 | ||
88523a61 | 4731 | /* Register our PCI operations. */ |
6d27f09a | 4732 | error = pci_register_driver(&mtip_pci_driver); |
7b421d24 AT |
4733 | if (error) { |
4734 | debugfs_remove(dfs_parent); | |
6d27f09a | 4735 | unregister_blkdev(mtip_major, MTIP_DRV_NAME); |
7b421d24 | 4736 | } |
6d27f09a RS |
4737 | |
4738 | return error; | |
88523a61 SB |
4739 | } |
4740 | ||
4741 | /* | |
4742 | * Module de-initialization function. | |
4743 | * | |
4744 | * Called once when the module is unloaded. This function deallocates | |
4745 | * the major block device number allocated by mtip_init() and | |
4746 | * unregisters the PCI layer of the driver. | |
4747 | * | |
4748 | * Return value | |
4749 | * none | |
4750 | */ | |
4751 | static void __exit mtip_exit(void) | |
4752 | { | |
4753 | /* Release the allocated major block device number. */ | |
4754 | unregister_blkdev(mtip_major, MTIP_DRV_NAME); | |
4755 | ||
4756 | /* Unregister the PCI driver. */ | |
4757 | pci_unregister_driver(&mtip_pci_driver); | |
af5ded8c AT |
4758 | |
4759 | debugfs_remove_recursive(dfs_parent); | |
88523a61 SB |
4760 | } |
4761 | ||
4762 | MODULE_AUTHOR("Micron Technology, Inc"); | |
4763 | MODULE_DESCRIPTION("Micron RealSSD PCIe Block Driver"); | |
4764 | MODULE_LICENSE("GPL"); | |
4765 | MODULE_VERSION(MTIP_DRV_VERSION); | |
4766 | ||
4767 | module_init(mtip_init); | |
4768 | module_exit(mtip_exit); |