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88523a61 SB |
1 | /* |
2 | * Driver for the Micron P320 SSD | |
3 | * Copyright (C) 2011 Micron Technology, Inc. | |
4 | * | |
5 | * Portions of this code were derived from works subjected to the | |
6 | * following copyright: | |
7 | * Copyright (C) 2009 Integrated Device Technology, Inc. | |
8 | * | |
9 | * This program is free software; you can redistribute it and/or modify | |
10 | * it under the terms of the GNU General Public License as published by | |
11 | * the Free Software Foundation; either version 2 of the License, or | |
12 | * (at your option) any later version. | |
13 | * | |
14 | * This program is distributed in the hope that it will be useful, | |
15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
17 | * GNU General Public License for more details. | |
18 | * | |
19 | */ | |
20 | ||
21 | #include <linux/pci.h> | |
22 | #include <linux/interrupt.h> | |
23 | #include <linux/ata.h> | |
24 | #include <linux/delay.h> | |
25 | #include <linux/hdreg.h> | |
26 | #include <linux/uaccess.h> | |
27 | #include <linux/random.h> | |
28 | #include <linux/smp.h> | |
29 | #include <linux/compat.h> | |
30 | #include <linux/fs.h> | |
31 | #include <linux/genhd.h> | |
32 | #include <linux/blkdev.h> | |
33 | #include <linux/bio.h> | |
34 | #include <linux/dma-mapping.h> | |
35 | #include <linux/idr.h> | |
36 | #include <../drivers/ata/ahci.h> | |
37 | #include "mtip32xx.h" | |
38 | ||
39 | #define HW_CMD_SLOT_SZ (MTIP_MAX_COMMAND_SLOTS * 32) | |
40 | #define HW_CMD_TBL_SZ (AHCI_CMD_TBL_HDR_SZ + (MTIP_MAX_SG * 16)) | |
41 | #define HW_CMD_TBL_AR_SZ (HW_CMD_TBL_SZ * MTIP_MAX_COMMAND_SLOTS) | |
42 | #define HW_PORT_PRIV_DMA_SZ \ | |
43 | (HW_CMD_SLOT_SZ + HW_CMD_TBL_AR_SZ + AHCI_RX_FIS_SZ) | |
44 | ||
45 | #define HOST_HSORG 0xFC | |
46 | #define HSORG_DISABLE_SLOTGRP_INTR (1<<24) | |
47 | #define HSORG_DISABLE_SLOTGRP_PXIS (1<<16) | |
48 | #define HSORG_HWREV 0xFF00 | |
49 | #define HSORG_STYLE 0x8 | |
50 | #define HSORG_SLOTGROUPS 0x7 | |
51 | ||
52 | #define PORT_COMMAND_ISSUE 0x38 | |
53 | #define PORT_SDBV 0x7C | |
54 | ||
55 | #define PORT_OFFSET 0x100 | |
56 | #define PORT_MEM_SIZE 0x80 | |
57 | ||
58 | #define PORT_IRQ_ERR \ | |
59 | (PORT_IRQ_HBUS_ERR | PORT_IRQ_IF_ERR | PORT_IRQ_CONNECT | \ | |
60 | PORT_IRQ_PHYRDY | PORT_IRQ_UNK_FIS | PORT_IRQ_BAD_PMP | \ | |
61 | PORT_IRQ_TF_ERR | PORT_IRQ_HBUS_DATA_ERR | PORT_IRQ_IF_NONFATAL | \ | |
62 | PORT_IRQ_OVERFLOW) | |
63 | #define PORT_IRQ_LEGACY \ | |
64 | (PORT_IRQ_PIOS_FIS | PORT_IRQ_D2H_REG_FIS) | |
65 | #define PORT_IRQ_HANDLED \ | |
66 | (PORT_IRQ_SDB_FIS | PORT_IRQ_LEGACY | \ | |
67 | PORT_IRQ_TF_ERR | PORT_IRQ_IF_ERR | \ | |
68 | PORT_IRQ_CONNECT | PORT_IRQ_PHYRDY) | |
69 | #define DEF_PORT_IRQ \ | |
70 | (PORT_IRQ_ERR | PORT_IRQ_LEGACY | PORT_IRQ_SDB_FIS) | |
71 | ||
72 | /* product numbers */ | |
73 | #define MTIP_PRODUCT_UNKNOWN 0x00 | |
74 | #define MTIP_PRODUCT_ASICFPGA 0x11 | |
75 | ||
76 | /* Device instance number, incremented each time a device is probed. */ | |
77 | static int instance; | |
78 | ||
79 | /* | |
80 | * Global variable used to hold the major block device number | |
81 | * allocated in mtip_init(). | |
82 | */ | |
83 | int mtip_major; | |
84 | ||
85 | static DEFINE_SPINLOCK(rssd_index_lock); | |
86 | static DEFINE_IDA(rssd_index_ida); | |
87 | ||
16d02c04 | 88 | #ifdef CONFIG_COMPAT |
88523a61 SB |
89 | struct mtip_compat_ide_task_request_s { |
90 | __u8 io_ports[8]; | |
91 | __u8 hob_ports[8]; | |
92 | ide_reg_valid_t out_flags; | |
93 | ide_reg_valid_t in_flags; | |
94 | int data_phase; | |
95 | int req_cmd; | |
96 | compat_ulong_t out_size; | |
97 | compat_ulong_t in_size; | |
98 | }; | |
16d02c04 | 99 | #endif |
88523a61 SB |
100 | |
101 | static int mtip_exec_internal_command(struct mtip_port *port, | |
102 | void *fis, | |
103 | int fisLen, | |
104 | dma_addr_t buffer, | |
105 | int bufLen, | |
106 | u32 opts, | |
107 | gfp_t atomic, | |
108 | unsigned long timeout); | |
109 | ||
110 | /* | |
111 | * Obtain an empty command slot. | |
112 | * | |
113 | * This function needs to be reentrant since it could be called | |
114 | * at the same time on multiple CPUs. The allocation of the | |
115 | * command slot must be atomic. | |
116 | * | |
117 | * @port Pointer to the port data structure. | |
118 | * | |
119 | * return value | |
120 | * >= 0 Index of command slot obtained. | |
121 | * -1 No command slots available. | |
122 | */ | |
123 | static int get_slot(struct mtip_port *port) | |
124 | { | |
125 | int slot, i; | |
126 | unsigned int num_command_slots = port->dd->slot_groups * 32; | |
127 | ||
128 | /* | |
129 | * Try 10 times, because there is a small race here. | |
130 | * that's ok, because it's still cheaper than a lock. | |
131 | * | |
132 | * Race: Since this section is not protected by lock, same bit | |
133 | * could be chosen by different process contexts running in | |
134 | * different processor. So instead of costly lock, we are going | |
135 | * with loop. | |
136 | */ | |
137 | for (i = 0; i < 10; i++) { | |
138 | slot = find_next_zero_bit(port->allocated, | |
139 | num_command_slots, 1); | |
140 | if ((slot < num_command_slots) && | |
141 | (!test_and_set_bit(slot, port->allocated))) | |
142 | return slot; | |
143 | } | |
144 | dev_warn(&port->dd->pdev->dev, "Failed to get a tag.\n"); | |
145 | ||
146 | if (mtip_check_surprise_removal(port->dd->pdev)) { | |
147 | /* Device not present, clean outstanding commands */ | |
148 | mtip_command_cleanup(port->dd); | |
149 | } | |
150 | return -1; | |
151 | } | |
152 | ||
153 | /* | |
154 | * Release a command slot. | |
155 | * | |
156 | * @port Pointer to the port data structure. | |
157 | * @tag Tag of command to release | |
158 | * | |
159 | * return value | |
160 | * None | |
161 | */ | |
162 | static inline void release_slot(struct mtip_port *port, int tag) | |
163 | { | |
164 | smp_mb__before_clear_bit(); | |
165 | clear_bit(tag, port->allocated); | |
166 | smp_mb__after_clear_bit(); | |
167 | } | |
168 | ||
169 | /* | |
170 | * Issue a command to the hardware. | |
171 | * | |
172 | * Set the appropriate bit in the s_active and Command Issue hardware | |
173 | * registers, causing hardware command processing to begin. | |
174 | * | |
175 | * @port Pointer to the port structure. | |
176 | * @tag The tag of the command to be issued. | |
177 | * | |
178 | * return value | |
179 | * None | |
180 | */ | |
181 | static inline void mtip_issue_ncq_command(struct mtip_port *port, int tag) | |
182 | { | |
183 | unsigned long flags = 0; | |
184 | ||
185 | atomic_set(&port->commands[tag].active, 1); | |
186 | ||
187 | spin_lock_irqsave(&port->cmd_issue_lock, flags); | |
188 | ||
189 | writel((1 << MTIP_TAG_BIT(tag)), | |
190 | port->s_active[MTIP_TAG_INDEX(tag)]); | |
191 | writel((1 << MTIP_TAG_BIT(tag)), | |
192 | port->cmd_issue[MTIP_TAG_INDEX(tag)]); | |
193 | ||
194 | spin_unlock_irqrestore(&port->cmd_issue_lock, flags); | |
195 | } | |
196 | ||
197 | /* | |
198 | * Called periodically to see if any read/write commands are | |
199 | * taking too long to complete. | |
200 | * | |
201 | * @data Pointer to the PORT data structure. | |
202 | * | |
203 | * return value | |
204 | * None | |
205 | */ | |
206 | void mtip_timeout_function(unsigned long int data) | |
207 | { | |
208 | struct mtip_port *port = (struct mtip_port *) data; | |
209 | struct host_to_dev_fis *fis; | |
210 | struct mtip_cmd *command; | |
211 | int tag, cmdto_cnt = 0; | |
212 | unsigned int bit, group; | |
213 | unsigned int num_command_slots = port->dd->slot_groups * 32; | |
214 | ||
215 | if (unlikely(!port)) | |
216 | return; | |
217 | ||
218 | if (atomic_read(&port->dd->resumeflag) == true) { | |
219 | mod_timer(&port->cmd_timer, | |
220 | jiffies + msecs_to_jiffies(30000)); | |
221 | return; | |
222 | } | |
223 | ||
224 | for (tag = 0; tag < num_command_slots; tag++) { | |
225 | /* | |
226 | * Skip internal command slot as it has | |
227 | * its own timeout mechanism | |
228 | */ | |
229 | if (tag == MTIP_TAG_INTERNAL) | |
230 | continue; | |
231 | ||
232 | if (atomic_read(&port->commands[tag].active) && | |
233 | (time_after(jiffies, port->commands[tag].comp_time))) { | |
234 | group = tag >> 5; | |
235 | bit = tag & 0x1f; | |
236 | ||
237 | command = &port->commands[tag]; | |
238 | fis = (struct host_to_dev_fis *) command->command; | |
239 | ||
240 | dev_warn(&port->dd->pdev->dev, | |
241 | "Timeout for command tag %d\n", tag); | |
242 | ||
243 | cmdto_cnt++; | |
244 | if (cmdto_cnt == 1) | |
245 | atomic_inc(&port->dd->eh_active); | |
246 | ||
247 | /* | |
248 | * Clear the completed bit. This should prevent | |
249 | * any interrupt handlers from trying to retire | |
250 | * the command. | |
251 | */ | |
252 | writel(1 << bit, port->completed[group]); | |
253 | ||
254 | /* Call the async completion callback. */ | |
255 | if (likely(command->async_callback)) | |
256 | command->async_callback(command->async_data, | |
257 | -EIO); | |
258 | command->async_callback = NULL; | |
259 | command->comp_func = NULL; | |
260 | ||
261 | /* Unmap the DMA scatter list entries */ | |
262 | dma_unmap_sg(&port->dd->pdev->dev, | |
263 | command->sg, | |
264 | command->scatter_ents, | |
265 | command->direction); | |
266 | ||
267 | /* | |
268 | * Clear the allocated bit and active tag for the | |
269 | * command. | |
270 | */ | |
271 | atomic_set(&port->commands[tag].active, 0); | |
272 | release_slot(port, tag); | |
273 | ||
274 | up(&port->cmd_slot); | |
275 | } | |
276 | } | |
277 | ||
278 | if (cmdto_cnt) { | |
279 | dev_warn(&port->dd->pdev->dev, | |
280 | "%d commands timed out: restarting port", | |
281 | cmdto_cnt); | |
282 | mtip_restart_port(port); | |
283 | atomic_dec(&port->dd->eh_active); | |
284 | } | |
285 | ||
286 | /* Restart the timer */ | |
287 | mod_timer(&port->cmd_timer, | |
288 | jiffies + msecs_to_jiffies(MTIP_TIMEOUT_CHECK_PERIOD)); | |
289 | } | |
290 | ||
291 | /* | |
292 | * IO completion function. | |
293 | * | |
294 | * This completion function is called by the driver ISR when a | |
295 | * command that was issued by the kernel completes. It first calls the | |
296 | * asynchronous completion function which normally calls back into the block | |
297 | * layer passing the asynchronous callback data, then unmaps the | |
298 | * scatter list associated with the completed command, and finally | |
299 | * clears the allocated bit associated with the completed command. | |
300 | * | |
301 | * @port Pointer to the port data structure. | |
302 | * @tag Tag of the command. | |
303 | * @data Pointer to driver_data. | |
304 | * @status Completion status. | |
305 | * | |
306 | * return value | |
307 | * None | |
308 | */ | |
309 | static void mtip_async_complete(struct mtip_port *port, | |
310 | int tag, | |
311 | void *data, | |
312 | int status) | |
313 | { | |
314 | struct mtip_cmd *command; | |
315 | struct driver_data *dd = data; | |
316 | int cb_status = status ? -EIO : 0; | |
317 | ||
318 | if (unlikely(!dd) || unlikely(!port)) | |
319 | return; | |
320 | ||
321 | command = &port->commands[tag]; | |
322 | ||
323 | if (unlikely(status == PORT_IRQ_TF_ERR)) { | |
324 | dev_warn(&port->dd->pdev->dev, | |
325 | "Command tag %d failed due to TFE\n", tag); | |
326 | } | |
327 | ||
328 | /* Upper layer callback */ | |
329 | if (likely(command->async_callback)) | |
330 | command->async_callback(command->async_data, cb_status); | |
331 | ||
332 | command->async_callback = NULL; | |
333 | command->comp_func = NULL; | |
334 | ||
335 | /* Unmap the DMA scatter list entries */ | |
336 | dma_unmap_sg(&dd->pdev->dev, | |
337 | command->sg, | |
338 | command->scatter_ents, | |
339 | command->direction); | |
340 | ||
341 | /* Clear the allocated and active bits for the command */ | |
342 | atomic_set(&port->commands[tag].active, 0); | |
343 | release_slot(port, tag); | |
344 | ||
345 | up(&port->cmd_slot); | |
346 | } | |
347 | ||
348 | /* | |
349 | * Internal command completion callback function. | |
350 | * | |
351 | * This function is normally called by the driver ISR when an internal | |
352 | * command completed. This function signals the command completion by | |
353 | * calling complete(). | |
354 | * | |
355 | * @port Pointer to the port data structure. | |
356 | * @tag Tag of the command that has completed. | |
357 | * @data Pointer to a completion structure. | |
358 | * @status Completion status. | |
359 | * | |
360 | * return value | |
361 | * None | |
362 | */ | |
363 | static void mtip_completion(struct mtip_port *port, | |
364 | int tag, | |
365 | void *data, | |
366 | int status) | |
367 | { | |
368 | struct mtip_cmd *command = &port->commands[tag]; | |
369 | struct completion *waiting = data; | |
370 | if (unlikely(status == PORT_IRQ_TF_ERR)) | |
371 | dev_warn(&port->dd->pdev->dev, | |
372 | "Internal command %d completed with TFE\n", tag); | |
373 | ||
374 | command->async_callback = NULL; | |
375 | command->comp_func = NULL; | |
376 | ||
377 | complete(waiting); | |
378 | } | |
379 | ||
380 | /* | |
381 | * Enable/disable the reception of FIS | |
382 | * | |
383 | * @port Pointer to the port data structure | |
384 | * @enable 1 to enable, 0 to disable | |
385 | * | |
386 | * return value | |
387 | * Previous state: 1 enabled, 0 disabled | |
388 | */ | |
389 | static int mtip_enable_fis(struct mtip_port *port, int enable) | |
390 | { | |
391 | u32 tmp; | |
392 | ||
393 | /* enable FIS reception */ | |
394 | tmp = readl(port->mmio + PORT_CMD); | |
395 | if (enable) | |
396 | writel(tmp | PORT_CMD_FIS_RX, port->mmio + PORT_CMD); | |
397 | else | |
398 | writel(tmp & ~PORT_CMD_FIS_RX, port->mmio + PORT_CMD); | |
399 | ||
400 | /* Flush */ | |
401 | readl(port->mmio + PORT_CMD); | |
402 | ||
403 | return (((tmp & PORT_CMD_FIS_RX) == PORT_CMD_FIS_RX)); | |
404 | } | |
405 | ||
406 | /* | |
407 | * Enable/disable the DMA engine | |
408 | * | |
409 | * @port Pointer to the port data structure | |
410 | * @enable 1 to enable, 0 to disable | |
411 | * | |
412 | * return value | |
413 | * Previous state: 1 enabled, 0 disabled. | |
414 | */ | |
415 | static int mtip_enable_engine(struct mtip_port *port, int enable) | |
416 | { | |
417 | u32 tmp; | |
418 | ||
419 | /* enable FIS reception */ | |
420 | tmp = readl(port->mmio + PORT_CMD); | |
421 | if (enable) | |
422 | writel(tmp | PORT_CMD_START, port->mmio + PORT_CMD); | |
423 | else | |
424 | writel(tmp & ~PORT_CMD_START, port->mmio + PORT_CMD); | |
425 | ||
426 | readl(port->mmio + PORT_CMD); | |
427 | return (((tmp & PORT_CMD_START) == PORT_CMD_START)); | |
428 | } | |
429 | ||
430 | /* | |
431 | * Enables the port DMA engine and FIS reception. | |
432 | * | |
433 | * return value | |
434 | * None | |
435 | */ | |
436 | static inline void mtip_start_port(struct mtip_port *port) | |
437 | { | |
438 | /* Enable FIS reception */ | |
439 | mtip_enable_fis(port, 1); | |
440 | ||
441 | /* Enable the DMA engine */ | |
442 | mtip_enable_engine(port, 1); | |
443 | } | |
444 | ||
445 | /* | |
446 | * Deinitialize a port by disabling port interrupts, the DMA engine, | |
447 | * and FIS reception. | |
448 | * | |
449 | * @port Pointer to the port structure | |
450 | * | |
451 | * return value | |
452 | * None | |
453 | */ | |
454 | static inline void mtip_deinit_port(struct mtip_port *port) | |
455 | { | |
456 | /* Disable interrupts on this port */ | |
457 | writel(0, port->mmio + PORT_IRQ_MASK); | |
458 | ||
459 | /* Disable the DMA engine */ | |
460 | mtip_enable_engine(port, 0); | |
461 | ||
462 | /* Disable FIS reception */ | |
463 | mtip_enable_fis(port, 0); | |
464 | } | |
465 | ||
466 | /* | |
467 | * Initialize a port. | |
468 | * | |
469 | * This function deinitializes the port by calling mtip_deinit_port() and | |
470 | * then initializes it by setting the command header and RX FIS addresses, | |
471 | * clearing the SError register and any pending port interrupts before | |
472 | * re-enabling the default set of port interrupts. | |
473 | * | |
474 | * @port Pointer to the port structure. | |
475 | * | |
476 | * return value | |
477 | * None | |
478 | */ | |
479 | static void mtip_init_port(struct mtip_port *port) | |
480 | { | |
481 | int i; | |
482 | mtip_deinit_port(port); | |
483 | ||
484 | /* Program the command list base and FIS base addresses */ | |
485 | if (readl(port->dd->mmio + HOST_CAP) & HOST_CAP_64) { | |
486 | writel((port->command_list_dma >> 16) >> 16, | |
487 | port->mmio + PORT_LST_ADDR_HI); | |
488 | writel((port->rxfis_dma >> 16) >> 16, | |
489 | port->mmio + PORT_FIS_ADDR_HI); | |
490 | } | |
491 | ||
492 | writel(port->command_list_dma & 0xffffffff, | |
493 | port->mmio + PORT_LST_ADDR); | |
494 | writel(port->rxfis_dma & 0xffffffff, port->mmio + PORT_FIS_ADDR); | |
495 | ||
496 | /* Clear SError */ | |
497 | writel(readl(port->mmio + PORT_SCR_ERR), port->mmio + PORT_SCR_ERR); | |
498 | ||
499 | /* reset the completed registers.*/ | |
500 | for (i = 0; i < port->dd->slot_groups; i++) | |
501 | writel(0xFFFFFFFF, port->completed[i]); | |
502 | ||
503 | /* Clear any pending interrupts for this port */ | |
504 | writel(readl(port->mmio + PORT_IRQ_STAT), port->mmio + PORT_IRQ_STAT); | |
505 | ||
506 | /* Enable port interrupts */ | |
507 | writel(DEF_PORT_IRQ, port->mmio + PORT_IRQ_MASK); | |
508 | } | |
509 | ||
510 | /* | |
511 | * Reset the HBA (without sleeping) | |
512 | * | |
513 | * Just like hba_reset, except does not call sleep, so can be | |
514 | * run from interrupt/tasklet context. | |
515 | * | |
516 | * @dd Pointer to the driver data structure. | |
517 | * | |
518 | * return value | |
519 | * 0 The reset was successful. | |
520 | * -1 The HBA Reset bit did not clear. | |
521 | */ | |
522 | int hba_reset_nosleep(struct driver_data *dd) | |
523 | { | |
524 | unsigned long timeout; | |
525 | ||
526 | /* Chip quirk: quiesce any chip function */ | |
527 | mdelay(10); | |
528 | ||
529 | /* Set the reset bit */ | |
530 | writel(HOST_RESET, dd->mmio + HOST_CTL); | |
531 | ||
532 | /* Flush */ | |
533 | readl(dd->mmio + HOST_CTL); | |
534 | ||
535 | /* | |
536 | * Wait 10ms then spin for up to 1 second | |
537 | * waiting for reset acknowledgement | |
538 | */ | |
539 | timeout = jiffies + msecs_to_jiffies(1000); | |
540 | mdelay(10); | |
541 | while ((readl(dd->mmio + HOST_CTL) & HOST_RESET) | |
542 | && time_before(jiffies, timeout)) | |
543 | mdelay(1); | |
544 | ||
545 | if (readl(dd->mmio + HOST_CTL) & HOST_RESET) | |
546 | return -1; | |
547 | ||
548 | return 0; | |
549 | } | |
550 | ||
551 | /* | |
552 | * Restart a port | |
553 | * | |
554 | * @port Pointer to the port data structure. | |
555 | * | |
556 | * return value | |
557 | * None | |
558 | */ | |
559 | void mtip_restart_port(struct mtip_port *port) | |
560 | { | |
561 | unsigned long timeout; | |
562 | ||
563 | /* Disable the DMA engine */ | |
564 | mtip_enable_engine(port, 0); | |
565 | ||
566 | /* Chip quirk: wait up to 500ms for PxCMD.CR == 0 */ | |
567 | timeout = jiffies + msecs_to_jiffies(500); | |
568 | while ((readl(port->mmio + PORT_CMD) & PORT_CMD_LIST_ON) | |
569 | && time_before(jiffies, timeout)) | |
570 | ; | |
571 | ||
572 | /* | |
573 | * Chip quirk: escalate to hba reset if | |
574 | * PxCMD.CR not clear after 500 ms | |
575 | */ | |
576 | if (readl(port->mmio + PORT_CMD) & PORT_CMD_LIST_ON) { | |
577 | dev_warn(&port->dd->pdev->dev, | |
578 | "PxCMD.CR not clear, escalating reset\n"); | |
579 | ||
580 | if (hba_reset_nosleep(port->dd)) | |
581 | dev_err(&port->dd->pdev->dev, | |
582 | "HBA reset escalation failed.\n"); | |
583 | ||
584 | /* 30 ms delay before com reset to quiesce chip */ | |
585 | mdelay(30); | |
586 | } | |
587 | ||
588 | dev_warn(&port->dd->pdev->dev, "Issuing COM reset\n"); | |
589 | ||
590 | /* Set PxSCTL.DET */ | |
591 | writel(readl(port->mmio + PORT_SCR_CTL) | | |
592 | 1, port->mmio + PORT_SCR_CTL); | |
593 | readl(port->mmio + PORT_SCR_CTL); | |
594 | ||
595 | /* Wait 1 ms to quiesce chip function */ | |
596 | timeout = jiffies + msecs_to_jiffies(1); | |
597 | while (time_before(jiffies, timeout)) | |
598 | ; | |
599 | ||
600 | /* Clear PxSCTL.DET */ | |
601 | writel(readl(port->mmio + PORT_SCR_CTL) & ~1, | |
602 | port->mmio + PORT_SCR_CTL); | |
603 | readl(port->mmio + PORT_SCR_CTL); | |
604 | ||
605 | /* Wait 500 ms for bit 0 of PORT_SCR_STS to be set */ | |
606 | timeout = jiffies + msecs_to_jiffies(500); | |
607 | while (((readl(port->mmio + PORT_SCR_STAT) & 0x01) == 0) | |
608 | && time_before(jiffies, timeout)) | |
609 | ; | |
610 | ||
611 | if ((readl(port->mmio + PORT_SCR_STAT) & 0x01) == 0) | |
612 | dev_warn(&port->dd->pdev->dev, | |
613 | "COM reset failed\n"); | |
614 | ||
615 | /* Clear SError, the PxSERR.DIAG.x should be set so clear it */ | |
616 | writel(readl(port->mmio + PORT_SCR_ERR), port->mmio + PORT_SCR_ERR); | |
617 | ||
618 | /* Enable the DMA engine */ | |
619 | mtip_enable_engine(port, 1); | |
620 | } | |
621 | ||
622 | /* | |
623 | * Helper function for tag logging | |
624 | */ | |
625 | static void print_tags(struct driver_data *dd, | |
626 | char *msg, | |
627 | unsigned long *tagbits) | |
628 | { | |
629 | unsigned int tag, count = 0; | |
630 | ||
631 | for (tag = 0; tag < (dd->slot_groups) * 32; tag++) { | |
632 | if (test_bit(tag, tagbits)) | |
633 | count++; | |
634 | } | |
635 | if (count) | |
636 | dev_info(&dd->pdev->dev, "%s [%i tags]\n", msg, count); | |
637 | } | |
638 | ||
639 | /* | |
640 | * Handle an error. | |
641 | * | |
642 | * @dd Pointer to the DRIVER_DATA structure. | |
643 | * | |
644 | * return value | |
645 | * None | |
646 | */ | |
647 | static void mtip_handle_tfe(struct driver_data *dd) | |
648 | { | |
649 | int group, tag, bit, reissue; | |
650 | struct mtip_port *port; | |
651 | struct mtip_cmd *command; | |
652 | u32 completed; | |
653 | struct host_to_dev_fis *fis; | |
654 | unsigned long tagaccum[SLOTBITS_IN_LONGS]; | |
655 | ||
656 | dev_warn(&dd->pdev->dev, "Taskfile error\n"); | |
657 | ||
658 | port = dd->port; | |
659 | ||
660 | /* Stop the timer to prevent command timeouts. */ | |
661 | del_timer(&port->cmd_timer); | |
662 | ||
663 | /* Set eh_active */ | |
664 | atomic_inc(&dd->eh_active); | |
665 | ||
666 | /* Loop through all the groups */ | |
667 | for (group = 0; group < dd->slot_groups; group++) { | |
668 | completed = readl(port->completed[group]); | |
669 | ||
670 | /* clear completed status register in the hardware.*/ | |
671 | writel(completed, port->completed[group]); | |
672 | ||
673 | /* clear the tag accumulator */ | |
674 | memset(tagaccum, 0, SLOTBITS_IN_LONGS * sizeof(long)); | |
675 | ||
676 | /* Process successfully completed commands */ | |
677 | for (bit = 0; bit < 32 && completed; bit++) { | |
678 | if (!(completed & (1<<bit))) | |
679 | continue; | |
680 | tag = (group << 5) + bit; | |
681 | ||
682 | /* Skip the internal command slot */ | |
683 | if (tag == MTIP_TAG_INTERNAL) | |
684 | continue; | |
685 | ||
686 | command = &port->commands[tag]; | |
687 | if (likely(command->comp_func)) { | |
688 | set_bit(tag, tagaccum); | |
689 | atomic_set(&port->commands[tag].active, 0); | |
690 | command->comp_func(port, | |
691 | tag, | |
692 | command->comp_data, | |
693 | 0); | |
694 | } else { | |
695 | dev_err(&port->dd->pdev->dev, | |
696 | "Missing completion func for tag %d", | |
697 | tag); | |
698 | if (mtip_check_surprise_removal(dd->pdev)) { | |
699 | mtip_command_cleanup(dd); | |
700 | /* don't proceed further */ | |
701 | return; | |
702 | } | |
703 | } | |
704 | } | |
705 | } | |
706 | print_tags(dd, "TFE tags completed:", tagaccum); | |
707 | ||
708 | /* Restart the port */ | |
709 | mdelay(20); | |
710 | mtip_restart_port(port); | |
711 | ||
712 | /* clear the tag accumulator */ | |
713 | memset(tagaccum, 0, SLOTBITS_IN_LONGS * sizeof(long)); | |
714 | ||
715 | /* Loop through all the groups */ | |
716 | for (group = 0; group < dd->slot_groups; group++) { | |
717 | for (bit = 0; bit < 32; bit++) { | |
718 | reissue = 1; | |
719 | tag = (group << 5) + bit; | |
720 | ||
721 | /* If the active bit is set re-issue the command */ | |
722 | if (atomic_read(&port->commands[tag].active) == 0) | |
723 | continue; | |
724 | ||
725 | fis = (struct host_to_dev_fis *) | |
726 | port->commands[tag].command; | |
727 | ||
728 | /* Should re-issue? */ | |
729 | if (tag == MTIP_TAG_INTERNAL || | |
730 | fis->command == ATA_CMD_SET_FEATURES) | |
731 | reissue = 0; | |
732 | ||
733 | /* | |
734 | * First check if this command has | |
735 | * exceeded its retries. | |
736 | */ | |
737 | if (reissue && | |
738 | (port->commands[tag].retries-- > 0)) { | |
739 | ||
740 | set_bit(tag, tagaccum); | |
741 | ||
742 | /* Update the timeout value. */ | |
743 | port->commands[tag].comp_time = | |
744 | jiffies + msecs_to_jiffies( | |
745 | MTIP_NCQ_COMMAND_TIMEOUT_MS); | |
746 | /* Re-issue the command. */ | |
747 | mtip_issue_ncq_command(port, tag); | |
748 | ||
749 | continue; | |
750 | } | |
751 | ||
752 | /* Retire a command that will not be reissued */ | |
753 | dev_warn(&port->dd->pdev->dev, | |
754 | "retiring tag %d\n", tag); | |
755 | atomic_set(&port->commands[tag].active, 0); | |
756 | ||
757 | if (port->commands[tag].comp_func) | |
758 | port->commands[tag].comp_func( | |
759 | port, | |
760 | tag, | |
761 | port->commands[tag].comp_data, | |
762 | PORT_IRQ_TF_ERR); | |
763 | else | |
764 | dev_warn(&port->dd->pdev->dev, | |
765 | "Bad completion for tag %d\n", | |
766 | tag); | |
767 | } | |
768 | } | |
769 | print_tags(dd, "TFE tags reissued:", tagaccum); | |
770 | ||
771 | /* Decrement eh_active */ | |
772 | atomic_dec(&dd->eh_active); | |
773 | ||
774 | mod_timer(&port->cmd_timer, | |
775 | jiffies + msecs_to_jiffies(MTIP_TIMEOUT_CHECK_PERIOD)); | |
776 | } | |
777 | ||
778 | /* | |
779 | * Handle a set device bits interrupt | |
780 | */ | |
781 | static inline void mtip_process_sdbf(struct driver_data *dd) | |
782 | { | |
783 | struct mtip_port *port = dd->port; | |
784 | int group, tag, bit; | |
785 | u32 completed; | |
786 | struct mtip_cmd *command; | |
787 | ||
788 | /* walk all bits in all slot groups */ | |
789 | for (group = 0; group < dd->slot_groups; group++) { | |
790 | completed = readl(port->completed[group]); | |
791 | ||
792 | /* clear completed status register in the hardware.*/ | |
793 | writel(completed, port->completed[group]); | |
794 | ||
795 | /* Process completed commands. */ | |
796 | for (bit = 0; | |
797 | (bit < 32) && completed; | |
798 | bit++, completed >>= 1) { | |
799 | if (completed & 0x01) { | |
800 | tag = (group << 5) | bit; | |
801 | ||
802 | /* skip internal command slot. */ | |
803 | if (unlikely(tag == MTIP_TAG_INTERNAL)) | |
804 | continue; | |
805 | ||
806 | command = &port->commands[tag]; | |
807 | ||
808 | /* make internal callback */ | |
809 | if (likely(command->comp_func)) { | |
810 | command->comp_func( | |
811 | port, | |
812 | tag, | |
813 | command->comp_data, | |
814 | 0); | |
815 | } else { | |
816 | dev_warn(&dd->pdev->dev, | |
817 | "Null completion " | |
818 | "for tag %d", | |
819 | tag); | |
820 | ||
821 | if (mtip_check_surprise_removal( | |
822 | dd->pdev)) { | |
823 | mtip_command_cleanup(dd); | |
824 | return; | |
825 | } | |
826 | } | |
827 | } | |
828 | } | |
829 | } | |
830 | } | |
831 | ||
832 | /* | |
833 | * Process legacy pio and d2h interrupts | |
834 | */ | |
835 | static inline void mtip_process_legacy(struct driver_data *dd, u32 port_stat) | |
836 | { | |
837 | struct mtip_port *port = dd->port; | |
838 | struct mtip_cmd *cmd = &port->commands[MTIP_TAG_INTERNAL]; | |
839 | ||
840 | if (port->internal_cmd_in_progress && | |
841 | cmd != NULL && | |
842 | !(readl(port->cmd_issue[MTIP_TAG_INTERNAL]) | |
843 | & (1 << MTIP_TAG_INTERNAL))) { | |
844 | if (cmd->comp_func) { | |
845 | cmd->comp_func(port, | |
846 | MTIP_TAG_INTERNAL, | |
847 | cmd->comp_data, | |
848 | 0); | |
849 | return; | |
850 | } | |
851 | } | |
852 | ||
853 | dev_warn(&dd->pdev->dev, "IRQ status 0x%x ignored.\n", port_stat); | |
854 | ||
855 | return; | |
856 | } | |
857 | ||
858 | /* | |
859 | * Demux and handle errors | |
860 | */ | |
861 | static inline void mtip_process_errors(struct driver_data *dd, u32 port_stat) | |
862 | { | |
863 | if (likely(port_stat & (PORT_IRQ_TF_ERR | PORT_IRQ_IF_ERR))) | |
864 | mtip_handle_tfe(dd); | |
865 | ||
866 | if (unlikely(port_stat & PORT_IRQ_CONNECT)) { | |
867 | dev_warn(&dd->pdev->dev, | |
868 | "Clearing PxSERR.DIAG.x\n"); | |
869 | writel((1 << 26), dd->port->mmio + PORT_SCR_ERR); | |
870 | } | |
871 | ||
872 | if (unlikely(port_stat & PORT_IRQ_PHYRDY)) { | |
873 | dev_warn(&dd->pdev->dev, | |
874 | "Clearing PxSERR.DIAG.n\n"); | |
875 | writel((1 << 16), dd->port->mmio + PORT_SCR_ERR); | |
876 | } | |
877 | ||
878 | if (unlikely(port_stat & ~PORT_IRQ_HANDLED)) { | |
879 | dev_warn(&dd->pdev->dev, | |
880 | "Port stat errors %x unhandled\n", | |
881 | (port_stat & ~PORT_IRQ_HANDLED)); | |
882 | } | |
883 | } | |
884 | ||
885 | static inline irqreturn_t mtip_handle_irq(struct driver_data *data) | |
886 | { | |
887 | struct driver_data *dd = (struct driver_data *) data; | |
888 | struct mtip_port *port = dd->port; | |
889 | u32 hba_stat, port_stat; | |
890 | int rv = IRQ_NONE; | |
891 | ||
892 | hba_stat = readl(dd->mmio + HOST_IRQ_STAT); | |
893 | if (hba_stat) { | |
894 | rv = IRQ_HANDLED; | |
895 | ||
896 | /* Acknowledge the interrupt status on the port.*/ | |
897 | port_stat = readl(port->mmio + PORT_IRQ_STAT); | |
898 | writel(port_stat, port->mmio + PORT_IRQ_STAT); | |
899 | ||
900 | /* Demux port status */ | |
901 | if (likely(port_stat & PORT_IRQ_SDB_FIS)) | |
902 | mtip_process_sdbf(dd); | |
903 | ||
904 | if (unlikely(port_stat & PORT_IRQ_ERR)) { | |
905 | if (unlikely(mtip_check_surprise_removal(dd->pdev))) { | |
906 | mtip_command_cleanup(dd); | |
907 | /* don't proceed further */ | |
908 | return IRQ_HANDLED; | |
909 | } | |
910 | ||
911 | mtip_process_errors(dd, port_stat & PORT_IRQ_ERR); | |
912 | } | |
913 | ||
914 | if (unlikely(port_stat & PORT_IRQ_LEGACY)) | |
915 | mtip_process_legacy(dd, port_stat & PORT_IRQ_LEGACY); | |
916 | } | |
917 | ||
918 | /* acknowledge interrupt */ | |
919 | writel(hba_stat, dd->mmio + HOST_IRQ_STAT); | |
920 | ||
921 | return rv; | |
922 | } | |
923 | ||
924 | /* | |
925 | * Wrapper for mtip_handle_irq | |
926 | * (ignores return code) | |
927 | */ | |
928 | static void mtip_tasklet(unsigned long data) | |
929 | { | |
930 | mtip_handle_irq((struct driver_data *) data); | |
931 | } | |
932 | ||
933 | /* | |
934 | * HBA interrupt subroutine. | |
935 | * | |
936 | * @irq IRQ number. | |
937 | * @instance Pointer to the driver data structure. | |
938 | * | |
939 | * return value | |
940 | * IRQ_HANDLED A HBA interrupt was pending and handled. | |
941 | * IRQ_NONE This interrupt was not for the HBA. | |
942 | */ | |
943 | static irqreturn_t mtip_irq_handler(int irq, void *instance) | |
944 | { | |
945 | struct driver_data *dd = instance; | |
946 | tasklet_schedule(&dd->tasklet); | |
947 | return IRQ_HANDLED; | |
948 | } | |
949 | ||
950 | static void mtip_issue_non_ncq_command(struct mtip_port *port, int tag) | |
951 | { | |
952 | atomic_set(&port->commands[tag].active, 1); | |
953 | writel(1 << MTIP_TAG_BIT(tag), | |
954 | port->cmd_issue[MTIP_TAG_INDEX(tag)]); | |
955 | } | |
956 | ||
957 | /* | |
958 | * Wait for port to quiesce | |
959 | * | |
960 | * @port Pointer to port data structure | |
961 | * @timeout Max duration to wait (ms) | |
962 | * | |
963 | * return value | |
964 | * 0 Success | |
965 | * -EBUSY Commands still active | |
966 | */ | |
967 | static int mtip_quiesce_io(struct mtip_port *port, unsigned long timeout) | |
968 | { | |
969 | unsigned long to; | |
970 | unsigned int n, active; | |
971 | ||
972 | to = jiffies + msecs_to_jiffies(timeout); | |
973 | do { | |
974 | /* | |
975 | * Ignore s_active bit 0 of array element 0. | |
976 | * This bit will always be set | |
977 | */ | |
978 | active = readl(port->s_active[0]) & 0xfffffffe; | |
979 | for (n = 1; n < port->dd->slot_groups; n++) | |
980 | active |= readl(port->s_active[n]); | |
981 | ||
982 | if (!active) | |
983 | break; | |
984 | ||
985 | msleep(20); | |
986 | } while (time_before(jiffies, to)); | |
987 | ||
988 | return active ? -EBUSY : 0; | |
989 | } | |
990 | ||
991 | /* | |
992 | * Execute an internal command and wait for the completion. | |
993 | * | |
994 | * @port Pointer to the port data structure. | |
995 | * @fis Pointer to the FIS that describes the command. | |
996 | * @fisLen Length in WORDS of the FIS. | |
997 | * @buffer DMA accessible for command data. | |
998 | * @bufLen Length, in bytes, of the data buffer. | |
999 | * @opts Command header options, excluding the FIS length | |
1000 | * and the number of PRD entries. | |
1001 | * @timeout Time in ms to wait for the command to complete. | |
1002 | * | |
1003 | * return value | |
1004 | * 0 Command completed successfully. | |
1005 | * -EFAULT The buffer address is not correctly aligned. | |
1006 | * -EBUSY Internal command or other IO in progress. | |
1007 | * -EAGAIN Time out waiting for command to complete. | |
1008 | */ | |
1009 | static int mtip_exec_internal_command(struct mtip_port *port, | |
1010 | void *fis, | |
1011 | int fisLen, | |
1012 | dma_addr_t buffer, | |
1013 | int bufLen, | |
1014 | u32 opts, | |
1015 | gfp_t atomic, | |
1016 | unsigned long timeout) | |
1017 | { | |
1018 | struct mtip_cmd_sg *command_sg; | |
1019 | DECLARE_COMPLETION_ONSTACK(wait); | |
1020 | int rv = 0; | |
1021 | struct mtip_cmd *int_cmd = &port->commands[MTIP_TAG_INTERNAL]; | |
1022 | ||
1023 | /* Make sure the buffer is 8 byte aligned. This is asic specific. */ | |
1024 | if (buffer & 0x00000007) { | |
1025 | dev_err(&port->dd->pdev->dev, | |
1026 | "SG buffer is not 8 byte aligned\n"); | |
1027 | return -EFAULT; | |
1028 | } | |
1029 | ||
1030 | /* Only one internal command should be running at a time */ | |
1031 | if (test_and_set_bit(MTIP_TAG_INTERNAL, port->allocated)) { | |
1032 | dev_warn(&port->dd->pdev->dev, | |
1033 | "Internal command already active\n"); | |
1034 | return -EBUSY; | |
1035 | } | |
1036 | port->internal_cmd_in_progress = 1; | |
1037 | ||
1038 | if (atomic == GFP_KERNEL) { | |
1039 | /* wait for io to complete if non atomic */ | |
1040 | if (mtip_quiesce_io(port, 5000) < 0) { | |
1041 | dev_warn(&port->dd->pdev->dev, | |
1042 | "Failed to quiesce IO\n"); | |
1043 | release_slot(port, MTIP_TAG_INTERNAL); | |
1044 | port->internal_cmd_in_progress = 0; | |
1045 | return -EBUSY; | |
1046 | } | |
1047 | ||
1048 | /* Set the completion function and data for the command. */ | |
1049 | int_cmd->comp_data = &wait; | |
1050 | int_cmd->comp_func = mtip_completion; | |
1051 | ||
1052 | } else { | |
1053 | /* Clear completion - we're going to poll */ | |
1054 | int_cmd->comp_data = NULL; | |
1055 | int_cmd->comp_func = NULL; | |
1056 | } | |
1057 | ||
1058 | /* Copy the command to the command table */ | |
1059 | memcpy(int_cmd->command, fis, fisLen*4); | |
1060 | ||
1061 | /* Populate the SG list */ | |
1062 | int_cmd->command_header->opts = | |
1063 | cpu_to_le32(opts | fisLen); | |
1064 | if (bufLen) { | |
1065 | command_sg = int_cmd->command + AHCI_CMD_TBL_HDR_SZ; | |
1066 | ||
1067 | command_sg->info = cpu_to_le32((bufLen-1) & 0x3fffff); | |
1068 | command_sg->dba = cpu_to_le32(buffer & 0xffffffff); | |
1069 | command_sg->dba_upper = cpu_to_le32((buffer >> 16) >> 16); | |
1070 | ||
1071 | int_cmd->command_header->opts |= cpu_to_le32((1 << 16)); | |
1072 | } | |
1073 | ||
1074 | /* Populate the command header */ | |
1075 | int_cmd->command_header->byte_count = 0; | |
1076 | ||
1077 | /* Issue the command to the hardware */ | |
1078 | mtip_issue_non_ncq_command(port, MTIP_TAG_INTERNAL); | |
1079 | ||
1080 | /* Poll if atomic, wait_for_completion otherwise */ | |
1081 | if (atomic == GFP_KERNEL) { | |
1082 | /* Wait for the command to complete or timeout. */ | |
1083 | if (wait_for_completion_timeout( | |
1084 | &wait, | |
1085 | msecs_to_jiffies(timeout)) == 0) { | |
1086 | dev_err(&port->dd->pdev->dev, | |
1087 | "Internal command did not complete [%d]\n", | |
1088 | atomic); | |
1089 | rv = -EAGAIN; | |
1090 | } | |
1091 | ||
1092 | if (readl(port->cmd_issue[MTIP_TAG_INTERNAL]) | |
1093 | & (1 << MTIP_TAG_INTERNAL)) { | |
1094 | dev_warn(&port->dd->pdev->dev, | |
1095 | "Retiring internal command but CI is 1.\n"); | |
1096 | } | |
1097 | ||
1098 | } else { | |
1099 | /* Spin for <timeout> checking if command still outstanding */ | |
1100 | timeout = jiffies + msecs_to_jiffies(timeout); | |
1101 | ||
1102 | while ((readl( | |
1103 | port->cmd_issue[MTIP_TAG_INTERNAL]) | |
1104 | & (1 << MTIP_TAG_INTERNAL)) | |
1105 | && time_before(jiffies, timeout)) | |
1106 | ; | |
1107 | ||
1108 | if (readl(port->cmd_issue[MTIP_TAG_INTERNAL]) | |
1109 | & (1 << MTIP_TAG_INTERNAL)) { | |
1110 | dev_err(&port->dd->pdev->dev, | |
1111 | "Internal command did not complete [%d]\n", | |
1112 | atomic); | |
1113 | rv = -EAGAIN; | |
1114 | } | |
1115 | } | |
1116 | ||
1117 | /* Clear the allocated and active bits for the internal command. */ | |
1118 | atomic_set(&int_cmd->active, 0); | |
1119 | release_slot(port, MTIP_TAG_INTERNAL); | |
1120 | port->internal_cmd_in_progress = 0; | |
1121 | ||
1122 | return rv; | |
1123 | } | |
1124 | ||
1125 | /* | |
1126 | * Byte-swap ATA ID strings. | |
1127 | * | |
1128 | * ATA identify data contains strings in byte-swapped 16-bit words. | |
1129 | * They must be swapped (on all architectures) to be usable as C strings. | |
1130 | * This function swaps bytes in-place. | |
1131 | * | |
1132 | * @buf The buffer location of the string | |
1133 | * @len The number of bytes to swap | |
1134 | * | |
1135 | * return value | |
1136 | * None | |
1137 | */ | |
1138 | static inline void ata_swap_string(u16 *buf, unsigned int len) | |
1139 | { | |
1140 | int i; | |
1141 | for (i = 0; i < (len/2); i++) | |
1142 | be16_to_cpus(&buf[i]); | |
1143 | } | |
1144 | ||
1145 | /* | |
1146 | * Request the device identity information. | |
1147 | * | |
1148 | * If a user space buffer is not specified, i.e. is NULL, the | |
1149 | * identify information is still read from the drive and placed | |
1150 | * into the identify data buffer (@e port->identify) in the | |
1151 | * port data structure. | |
1152 | * When the identify buffer contains valid identify information @e | |
1153 | * port->identify_valid is non-zero. | |
1154 | * | |
1155 | * @port Pointer to the port structure. | |
1156 | * @user_buffer A user space buffer where the identify data should be | |
1157 | * copied. | |
1158 | * | |
1159 | * return value | |
1160 | * 0 Command completed successfully. | |
1161 | * -EFAULT An error occurred while coping data to the user buffer. | |
1162 | * -1 Command failed. | |
1163 | */ | |
1164 | static int mtip_get_identify(struct mtip_port *port, void __user *user_buffer) | |
1165 | { | |
1166 | int rv = 0; | |
1167 | struct host_to_dev_fis fis; | |
1168 | ||
1169 | down_write(&port->dd->internal_sem); | |
1170 | ||
1171 | /* Build the FIS. */ | |
1172 | memset(&fis, 0, sizeof(struct host_to_dev_fis)); | |
1173 | fis.type = 0x27; | |
1174 | fis.opts = 1 << 7; | |
1175 | fis.command = ATA_CMD_ID_ATA; | |
1176 | ||
1177 | /* Set the identify information as invalid. */ | |
1178 | port->identify_valid = 0; | |
1179 | ||
1180 | /* Clear the identify information. */ | |
1181 | memset(port->identify, 0, sizeof(u16) * ATA_ID_WORDS); | |
1182 | ||
1183 | /* Execute the command. */ | |
1184 | if (mtip_exec_internal_command(port, | |
1185 | &fis, | |
1186 | 5, | |
1187 | port->identify_dma, | |
1188 | sizeof(u16) * ATA_ID_WORDS, | |
1189 | 0, | |
1190 | GFP_KERNEL, | |
1191 | MTIP_INTERNAL_COMMAND_TIMEOUT_MS) | |
1192 | < 0) { | |
1193 | rv = -1; | |
1194 | goto out; | |
1195 | } | |
1196 | ||
1197 | /* | |
1198 | * Perform any necessary byte-swapping. Yes, the kernel does in fact | |
1199 | * perform field-sensitive swapping on the string fields. | |
1200 | * See the kernel use of ata_id_string() for proof of this. | |
1201 | */ | |
1202 | #ifdef __LITTLE_ENDIAN | |
1203 | ata_swap_string(port->identify + 27, 40); /* model string*/ | |
1204 | ata_swap_string(port->identify + 23, 8); /* firmware string*/ | |
1205 | ata_swap_string(port->identify + 10, 20); /* serial# string*/ | |
1206 | #else | |
1207 | { | |
1208 | int i; | |
1209 | for (i = 0; i < ATA_ID_WORDS; i++) | |
1210 | port->identify[i] = le16_to_cpu(port->identify[i]); | |
1211 | } | |
1212 | #endif | |
1213 | ||
1214 | /* Set the identify buffer as valid. */ | |
1215 | port->identify_valid = 1; | |
1216 | ||
1217 | if (user_buffer) { | |
1218 | if (copy_to_user( | |
1219 | user_buffer, | |
1220 | port->identify, | |
1221 | ATA_ID_WORDS * sizeof(u16))) { | |
1222 | rv = -EFAULT; | |
1223 | goto out; | |
1224 | } | |
1225 | } | |
1226 | ||
1227 | out: | |
1228 | up_write(&port->dd->internal_sem); | |
1229 | return rv; | |
1230 | } | |
1231 | ||
1232 | /* | |
1233 | * Issue a standby immediate command to the device. | |
1234 | * | |
1235 | * @port Pointer to the port structure. | |
1236 | * | |
1237 | * return value | |
1238 | * 0 Command was executed successfully. | |
1239 | * -1 An error occurred while executing the command. | |
1240 | */ | |
1241 | static int mtip_standby_immediate(struct mtip_port *port) | |
1242 | { | |
1243 | int rv; | |
1244 | struct host_to_dev_fis fis; | |
1245 | ||
1246 | down_write(&port->dd->internal_sem); | |
1247 | ||
1248 | /* Build the FIS. */ | |
1249 | memset(&fis, 0, sizeof(struct host_to_dev_fis)); | |
1250 | fis.type = 0x27; | |
1251 | fis.opts = 1 << 7; | |
1252 | fis.command = ATA_CMD_STANDBYNOW1; | |
1253 | ||
1254 | /* Execute the command. Use a 15-second timeout for large drives. */ | |
1255 | rv = mtip_exec_internal_command(port, | |
1256 | &fis, | |
1257 | 5, | |
1258 | 0, | |
1259 | 0, | |
1260 | 0, | |
1261 | GFP_KERNEL, | |
1262 | 15000); | |
1263 | ||
1264 | up_write(&port->dd->internal_sem); | |
1265 | ||
1266 | return rv; | |
1267 | } | |
1268 | ||
1269 | /* | |
1270 | * Get the drive capacity. | |
1271 | * | |
1272 | * @dd Pointer to the device data structure. | |
1273 | * @sectors Pointer to the variable that will receive the sector count. | |
1274 | * | |
1275 | * return value | |
1276 | * 1 Capacity was returned successfully. | |
1277 | * 0 The identify information is invalid. | |
1278 | */ | |
1279 | bool mtip_hw_get_capacity(struct driver_data *dd, sector_t *sectors) | |
1280 | { | |
1281 | struct mtip_port *port = dd->port; | |
1282 | u64 total, raw0, raw1, raw2, raw3; | |
1283 | raw0 = port->identify[100]; | |
1284 | raw1 = port->identify[101]; | |
1285 | raw2 = port->identify[102]; | |
1286 | raw3 = port->identify[103]; | |
1287 | total = raw0 | raw1<<16 | raw2<<32 | raw3<<48; | |
1288 | *sectors = total; | |
1289 | return (bool) !!port->identify_valid; | |
1290 | } | |
1291 | ||
1292 | /* | |
1293 | * Reset the HBA. | |
1294 | * | |
1295 | * Resets the HBA by setting the HBA Reset bit in the Global | |
1296 | * HBA Control register. After setting the HBA Reset bit the | |
1297 | * function waits for 1 second before reading the HBA Reset | |
1298 | * bit to make sure it has cleared. If HBA Reset is not clear | |
1299 | * an error is returned. Cannot be used in non-blockable | |
1300 | * context. | |
1301 | * | |
1302 | * @dd Pointer to the driver data structure. | |
1303 | * | |
1304 | * return value | |
1305 | * 0 The reset was successful. | |
1306 | * -1 The HBA Reset bit did not clear. | |
1307 | */ | |
1308 | static int mtip_hba_reset(struct driver_data *dd) | |
1309 | { | |
1310 | mtip_deinit_port(dd->port); | |
1311 | ||
1312 | /* Set the reset bit */ | |
1313 | writel(HOST_RESET, dd->mmio + HOST_CTL); | |
1314 | ||
1315 | /* Flush */ | |
1316 | readl(dd->mmio + HOST_CTL); | |
1317 | ||
1318 | /* Wait for reset to clear */ | |
1319 | ssleep(1); | |
1320 | ||
1321 | /* Check the bit has cleared */ | |
1322 | if (readl(dd->mmio + HOST_CTL) & HOST_RESET) { | |
1323 | dev_err(&dd->pdev->dev, | |
1324 | "Reset bit did not clear.\n"); | |
1325 | return -1; | |
1326 | } | |
1327 | ||
1328 | return 0; | |
1329 | } | |
1330 | ||
1331 | /* | |
1332 | * Display the identify command data. | |
1333 | * | |
1334 | * @port Pointer to the port data structure. | |
1335 | * | |
1336 | * return value | |
1337 | * None | |
1338 | */ | |
1339 | static void mtip_dump_identify(struct mtip_port *port) | |
1340 | { | |
1341 | sector_t sectors; | |
1342 | unsigned short revid; | |
1343 | char cbuf[42]; | |
1344 | ||
1345 | if (!port->identify_valid) | |
1346 | return; | |
1347 | ||
1348 | strlcpy(cbuf, (char *)(port->identify+10), 21); | |
1349 | dev_info(&port->dd->pdev->dev, | |
1350 | "Serial No.: %s\n", cbuf); | |
1351 | ||
1352 | strlcpy(cbuf, (char *)(port->identify+23), 9); | |
1353 | dev_info(&port->dd->pdev->dev, | |
1354 | "Firmware Ver.: %s\n", cbuf); | |
1355 | ||
1356 | strlcpy(cbuf, (char *)(port->identify+27), 41); | |
1357 | dev_info(&port->dd->pdev->dev, "Model: %s\n", cbuf); | |
1358 | ||
1359 | if (mtip_hw_get_capacity(port->dd, §ors)) | |
1360 | dev_info(&port->dd->pdev->dev, | |
1361 | "Capacity: %llu sectors (%llu MB)\n", | |
1362 | (u64)sectors, | |
1363 | ((u64)sectors) * ATA_SECT_SIZE >> 20); | |
1364 | ||
1365 | pci_read_config_word(port->dd->pdev, PCI_REVISION_ID, &revid); | |
1366 | switch (revid & 0xff) { | |
1367 | case 0x1: | |
1368 | strlcpy(cbuf, "A0", 3); | |
1369 | break; | |
1370 | case 0x3: | |
1371 | strlcpy(cbuf, "A2", 3); | |
1372 | break; | |
1373 | default: | |
1374 | strlcpy(cbuf, "?", 2); | |
1375 | break; | |
1376 | } | |
1377 | dev_info(&port->dd->pdev->dev, | |
1378 | "Card Type: %s\n", cbuf); | |
1379 | } | |
1380 | ||
1381 | /* | |
1382 | * Map the commands scatter list into the command table. | |
1383 | * | |
1384 | * @command Pointer to the command. | |
1385 | * @nents Number of scatter list entries. | |
1386 | * | |
1387 | * return value | |
1388 | * None | |
1389 | */ | |
1390 | static inline void fill_command_sg(struct driver_data *dd, | |
1391 | struct mtip_cmd *command, | |
1392 | int nents) | |
1393 | { | |
1394 | int n; | |
1395 | unsigned int dma_len; | |
1396 | struct mtip_cmd_sg *command_sg; | |
1397 | struct scatterlist *sg = command->sg; | |
1398 | ||
1399 | command_sg = command->command + AHCI_CMD_TBL_HDR_SZ; | |
1400 | ||
1401 | for (n = 0; n < nents; n++) { | |
1402 | dma_len = sg_dma_len(sg); | |
1403 | if (dma_len > 0x400000) | |
1404 | dev_err(&dd->pdev->dev, | |
1405 | "DMA segment length truncated\n"); | |
1406 | command_sg->info = cpu_to_le32((dma_len-1) & 0x3fffff); | |
1407 | #if (BITS_PER_LONG == 64) | |
1408 | *((unsigned long *) &command_sg->dba) = | |
1409 | cpu_to_le64(sg_dma_address(sg)); | |
1410 | #else | |
1411 | command_sg->dba = cpu_to_le32(sg_dma_address(sg)); | |
1412 | command_sg->dba_upper = | |
1413 | cpu_to_le32((sg_dma_address(sg) >> 16) >> 16); | |
1414 | #endif | |
1415 | command_sg++; | |
1416 | sg++; | |
1417 | } | |
1418 | } | |
1419 | ||
1420 | /* | |
1421 | * @brief Execute a drive command. | |
1422 | * | |
1423 | * return value 0 The command completed successfully. | |
1424 | * return value -1 An error occurred while executing the command. | |
1425 | */ | |
1426 | int exec_drive_task(struct mtip_port *port, u8 *command) | |
1427 | { | |
1428 | struct host_to_dev_fis fis; | |
1429 | struct host_to_dev_fis *reply = (port->rxfis + RX_FIS_D2H_REG); | |
1430 | ||
1431 | /* Lock the internal command semaphore. */ | |
1432 | down_write(&port->dd->internal_sem); | |
1433 | ||
1434 | /* Build the FIS. */ | |
1435 | memset(&fis, 0, sizeof(struct host_to_dev_fis)); | |
1436 | fis.type = 0x27; | |
1437 | fis.opts = 1 << 7; | |
1438 | fis.command = command[0]; | |
1439 | fis.features = command[1]; | |
1440 | fis.sect_count = command[2]; | |
1441 | fis.sector = command[3]; | |
1442 | fis.cyl_low = command[4]; | |
1443 | fis.cyl_hi = command[5]; | |
1444 | fis.device = command[6] & ~0x10; /* Clear the dev bit*/ | |
1445 | ||
1446 | ||
1447 | dbg_printk(MTIP_DRV_NAME "%s: User Command: cmd %x, feat %x, " | |
1448 | "nsect %x, sect %x, lcyl %x, " | |
1449 | "hcyl %x, sel %x\n", | |
1450 | __func__, | |
1451 | command[0], | |
1452 | command[1], | |
1453 | command[2], | |
1454 | command[3], | |
1455 | command[4], | |
1456 | command[5], | |
1457 | command[6]); | |
1458 | ||
1459 | /* Execute the command. */ | |
1460 | if (mtip_exec_internal_command(port, | |
1461 | &fis, | |
1462 | 5, | |
1463 | 0, | |
1464 | 0, | |
1465 | 0, | |
1466 | GFP_KERNEL, | |
1467 | MTIP_IOCTL_COMMAND_TIMEOUT_MS) < 0) { | |
1468 | up_write(&port->dd->internal_sem); | |
1469 | return -1; | |
1470 | } | |
1471 | ||
1472 | command[0] = reply->command; /* Status*/ | |
1473 | command[1] = reply->features; /* Error*/ | |
1474 | command[4] = reply->cyl_low; | |
1475 | command[5] = reply->cyl_hi; | |
1476 | ||
1477 | dbg_printk(MTIP_DRV_NAME "%s: Completion Status: stat %x, " | |
1478 | "err %x , cyl_lo %x cyl_hi %x\n", | |
1479 | __func__, | |
1480 | command[0], | |
1481 | command[1], | |
1482 | command[4], | |
1483 | command[5]); | |
1484 | ||
1485 | up_write(&port->dd->internal_sem); | |
1486 | return 0; | |
1487 | } | |
1488 | ||
1489 | /* | |
1490 | * @brief Execute a drive command. | |
1491 | * | |
1492 | * @param port Pointer to the port data structure. | |
1493 | * @param command Pointer to the user specified command parameters. | |
1494 | * @param user_buffer Pointer to the user space buffer where read sector | |
1495 | * data should be copied. | |
1496 | * | |
1497 | * return value 0 The command completed successfully. | |
1498 | * return value -EFAULT An error occurred while copying the completion | |
1499 | * data to the user space buffer. | |
1500 | * return value -1 An error occurred while executing the command. | |
1501 | */ | |
1502 | int exec_drive_command(struct mtip_port *port, u8 *command, | |
1503 | void __user *user_buffer) | |
1504 | { | |
1505 | struct host_to_dev_fis fis; | |
1506 | struct host_to_dev_fis *reply = (port->rxfis + RX_FIS_D2H_REG); | |
1507 | ||
1508 | /* Lock the internal command semaphore. */ | |
1509 | down_write(&port->dd->internal_sem); | |
1510 | ||
1511 | /* Build the FIS. */ | |
1512 | memset(&fis, 0, sizeof(struct host_to_dev_fis)); | |
1513 | fis.type = 0x27; | |
1514 | fis.opts = 1 << 7; | |
1515 | fis.command = command[0]; | |
1516 | fis.features = command[2]; | |
1517 | fis.sect_count = command[3]; | |
1518 | if (fis.command == ATA_CMD_SMART) { | |
1519 | fis.sector = command[1]; | |
1520 | fis.cyl_low = 0x4f; | |
1521 | fis.cyl_hi = 0xc2; | |
1522 | } | |
1523 | ||
1524 | dbg_printk(MTIP_DRV_NAME | |
1525 | "%s: User Command: cmd %x, sect %x, " | |
1526 | "feat %x, sectcnt %x\n", | |
1527 | __func__, | |
1528 | command[0], | |
1529 | command[1], | |
1530 | command[2], | |
1531 | command[3]); | |
1532 | ||
1533 | memset(port->sector_buffer, 0x00, ATA_SECT_SIZE); | |
1534 | ||
1535 | /* Execute the command. */ | |
1536 | if (mtip_exec_internal_command(port, | |
1537 | &fis, | |
1538 | 5, | |
1539 | port->sector_buffer_dma, | |
1540 | (command[3] != 0) ? ATA_SECT_SIZE : 0, | |
1541 | 0, | |
1542 | GFP_KERNEL, | |
1543 | MTIP_IOCTL_COMMAND_TIMEOUT_MS) | |
1544 | < 0) { | |
1545 | up_write(&port->dd->internal_sem); | |
1546 | return -1; | |
1547 | } | |
1548 | ||
1549 | /* Collect the completion status. */ | |
1550 | command[0] = reply->command; /* Status*/ | |
1551 | command[1] = reply->features; /* Error*/ | |
1552 | command[2] = command[3]; | |
1553 | ||
1554 | dbg_printk(MTIP_DRV_NAME | |
1555 | "%s: Completion Status: stat %x, " | |
1556 | "err %x, cmd %x\n", | |
1557 | __func__, | |
1558 | command[0], | |
1559 | command[1], | |
1560 | command[2]); | |
1561 | ||
1562 | if (user_buffer && command[3]) { | |
1563 | if (copy_to_user(user_buffer, | |
1564 | port->sector_buffer, | |
1565 | ATA_SECT_SIZE * command[3])) { | |
1566 | up_write(&port->dd->internal_sem); | |
1567 | return -EFAULT; | |
1568 | } | |
1569 | } | |
1570 | ||
1571 | up_write(&port->dd->internal_sem); | |
1572 | return 0; | |
1573 | } | |
1574 | ||
1575 | /* | |
1576 | * Indicates whether a command has a single sector payload. | |
1577 | * | |
1578 | * @command passed to the device to perform the certain event. | |
1579 | * @features passed to the device to perform the certain event. | |
1580 | * | |
1581 | * return value | |
1582 | * 1 command is one that always has a single sector payload, | |
1583 | * regardless of the value in the Sector Count field. | |
1584 | * 0 otherwise | |
1585 | * | |
1586 | */ | |
1587 | static unsigned int implicit_sector(unsigned char command, | |
1588 | unsigned char features) | |
1589 | { | |
1590 | unsigned int rv = 0; | |
1591 | ||
1592 | /* list of commands that have an implicit sector count of 1 */ | |
1593 | switch (command) { | |
1594 | case 0xF1: | |
1595 | case 0xF2: | |
1596 | case 0xF3: | |
1597 | case 0xF4: | |
1598 | case 0xF5: | |
1599 | case 0xF6: | |
1600 | case 0xE4: | |
1601 | case 0xE8: | |
1602 | rv = 1; | |
1603 | break; | |
1604 | case 0xF9: | |
1605 | if (features == 0x03) | |
1606 | rv = 1; | |
1607 | break; | |
1608 | case 0xB0: | |
1609 | if ((features == 0xD0) || (features == 0xD1)) | |
1610 | rv = 1; | |
1611 | break; | |
1612 | case 0xB1: | |
1613 | if ((features == 0xC2) || (features == 0xC3)) | |
1614 | rv = 1; | |
1615 | break; | |
1616 | } | |
1617 | return rv; | |
1618 | } | |
1619 | ||
1620 | /* | |
1621 | * Executes a taskfile | |
1622 | * See ide_taskfile_ioctl() for derivation | |
1623 | */ | |
1624 | static int exec_drive_taskfile(struct driver_data *dd, | |
ef0f1587 JA |
1625 | void __user *buf, |
1626 | ide_task_request_t *req_task, | |
1627 | int outtotal) | |
88523a61 SB |
1628 | { |
1629 | struct host_to_dev_fis fis; | |
1630 | struct host_to_dev_fis *reply; | |
88523a61 SB |
1631 | u8 *outbuf = NULL; |
1632 | u8 *inbuf = NULL; | |
16d02c04 JA |
1633 | dma_addr_t outbuf_dma = 0; |
1634 | dma_addr_t inbuf_dma = 0; | |
1635 | dma_addr_t dma_buffer = 0; | |
88523a61 | 1636 | int err = 0; |
88523a61 SB |
1637 | unsigned int taskin = 0; |
1638 | unsigned int taskout = 0; | |
1639 | u8 nsect = 0; | |
88523a61 SB |
1640 | unsigned int timeout = MTIP_IOCTL_COMMAND_TIMEOUT_MS; |
1641 | unsigned int force_single_sector; | |
1642 | unsigned int transfer_size; | |
1643 | unsigned long task_file_data; | |
ef0f1587 | 1644 | int intotal = outtotal + req_task->out_size; |
88523a61 SB |
1645 | |
1646 | taskout = req_task->out_size; | |
1647 | taskin = req_task->in_size; | |
1648 | /* 130560 = 512 * 0xFF*/ | |
1649 | if (taskin > 130560 || taskout > 130560) { | |
1650 | err = -EINVAL; | |
1651 | goto abort; | |
1652 | } | |
1653 | ||
1654 | if (taskout) { | |
1655 | outbuf = kzalloc(taskout, GFP_KERNEL); | |
1656 | if (outbuf == NULL) { | |
1657 | err = -ENOMEM; | |
1658 | goto abort; | |
1659 | } | |
1660 | if (copy_from_user(outbuf, buf + outtotal, taskout)) { | |
1661 | err = -EFAULT; | |
1662 | goto abort; | |
1663 | } | |
1664 | outbuf_dma = pci_map_single(dd->pdev, | |
1665 | outbuf, | |
1666 | taskout, | |
1667 | DMA_TO_DEVICE); | |
16d02c04 | 1668 | if (outbuf_dma == 0) { |
88523a61 SB |
1669 | err = -ENOMEM; |
1670 | goto abort; | |
1671 | } | |
1672 | dma_buffer = outbuf_dma; | |
1673 | } | |
1674 | ||
1675 | if (taskin) { | |
1676 | inbuf = kzalloc(taskin, GFP_KERNEL); | |
1677 | if (inbuf == NULL) { | |
1678 | err = -ENOMEM; | |
1679 | goto abort; | |
1680 | } | |
1681 | ||
1682 | if (copy_from_user(inbuf, buf + intotal, taskin)) { | |
1683 | err = -EFAULT; | |
1684 | goto abort; | |
1685 | } | |
1686 | inbuf_dma = pci_map_single(dd->pdev, | |
1687 | inbuf, | |
1688 | taskin, DMA_FROM_DEVICE); | |
16d02c04 | 1689 | if (inbuf_dma == 0) { |
88523a61 SB |
1690 | err = -ENOMEM; |
1691 | goto abort; | |
1692 | } | |
1693 | dma_buffer = inbuf_dma; | |
1694 | } | |
1695 | ||
1696 | /* only supports PIO and non-data commands from this ioctl. */ | |
1697 | switch (req_task->data_phase) { | |
1698 | case TASKFILE_OUT: | |
1699 | nsect = taskout / ATA_SECT_SIZE; | |
1700 | reply = (dd->port->rxfis + RX_FIS_PIO_SETUP); | |
1701 | break; | |
1702 | case TASKFILE_IN: | |
1703 | reply = (dd->port->rxfis + RX_FIS_PIO_SETUP); | |
1704 | break; | |
1705 | case TASKFILE_NO_DATA: | |
1706 | reply = (dd->port->rxfis + RX_FIS_D2H_REG); | |
1707 | break; | |
1708 | default: | |
1709 | err = -EINVAL; | |
1710 | goto abort; | |
1711 | } | |
1712 | ||
1713 | /* Lock the internal command semaphore. */ | |
1714 | down_write(&dd->internal_sem); | |
1715 | ||
1716 | /* Build the FIS. */ | |
1717 | memset(&fis, 0, sizeof(struct host_to_dev_fis)); | |
1718 | ||
1719 | fis.type = 0x27; | |
1720 | fis.opts = 1 << 7; | |
1721 | fis.command = req_task->io_ports[7]; | |
1722 | fis.features = req_task->io_ports[1]; | |
1723 | fis.sect_count = req_task->io_ports[2]; | |
1724 | fis.lba_low = req_task->io_ports[3]; | |
1725 | fis.lba_mid = req_task->io_ports[4]; | |
1726 | fis.lba_hi = req_task->io_ports[5]; | |
1727 | /* Clear the dev bit*/ | |
1728 | fis.device = req_task->io_ports[6] & ~0x10; | |
1729 | ||
1730 | if ((req_task->in_flags.all == 0) && (req_task->out_flags.all & 1)) { | |
1731 | req_task->in_flags.all = | |
1732 | IDE_TASKFILE_STD_IN_FLAGS | | |
1733 | (IDE_HOB_STD_IN_FLAGS << 8); | |
1734 | fis.lba_low_ex = req_task->hob_ports[3]; | |
1735 | fis.lba_mid_ex = req_task->hob_ports[4]; | |
1736 | fis.lba_hi_ex = req_task->hob_ports[5]; | |
1737 | fis.features_ex = req_task->hob_ports[1]; | |
1738 | fis.sect_cnt_ex = req_task->hob_ports[2]; | |
1739 | ||
1740 | } else { | |
1741 | req_task->in_flags.all = IDE_TASKFILE_STD_IN_FLAGS; | |
1742 | } | |
1743 | ||
1744 | force_single_sector = implicit_sector(fis.command, fis.features); | |
1745 | ||
1746 | if ((taskin || taskout) && (!fis.sect_count)) { | |
1747 | if (nsect) | |
1748 | fis.sect_count = nsect; | |
1749 | else { | |
1750 | if (!force_single_sector) { | |
1751 | dev_warn(&dd->pdev->dev, | |
1752 | "data movement but " | |
1753 | "sect_count is 0\n"); | |
1754 | up_write(&dd->internal_sem); | |
1755 | err = -EINVAL; | |
1756 | goto abort; | |
1757 | } | |
1758 | } | |
1759 | } | |
1760 | ||
1761 | dbg_printk(MTIP_DRV_NAME | |
1762 | "taskfile: cmd %x, feat %x, nsect %x," | |
1763 | " sect/lbal %x, lcyl/lbam %x, hcyl/lbah %x," | |
1764 | " head/dev %x\n", | |
1765 | fis.command, | |
1766 | fis.features, | |
1767 | fis.sect_count, | |
1768 | fis.lba_low, | |
1769 | fis.lba_mid, | |
1770 | fis.lba_hi, | |
1771 | fis.device); | |
1772 | ||
1773 | switch (fis.command) { | |
1774 | case 0x92: /* Change timeout for Download Microcode to 60 seconds.*/ | |
1775 | timeout = 60000; | |
1776 | break; | |
1777 | case 0xf4: /* Change timeout for Security Erase Unit to 4 minutes.*/ | |
1778 | timeout = 240000; | |
1779 | break; | |
1780 | case 0xe0: /* Change timeout for standby immediate to 10 seconds.*/ | |
1781 | timeout = 10000; | |
1782 | break; | |
1783 | case 0xf7: /* Change timeout for vendor unique command to 10 secs */ | |
1784 | timeout = 10000; | |
1785 | break; | |
1786 | case 0xfa: /* Change timeout for vendor unique command to 10 secs */ | |
1787 | timeout = 10000; | |
1788 | break; | |
1789 | default: | |
1790 | timeout = MTIP_IOCTL_COMMAND_TIMEOUT_MS; | |
1791 | break; | |
1792 | } | |
1793 | ||
1794 | /* Determine the correct transfer size.*/ | |
1795 | if (force_single_sector) | |
1796 | transfer_size = ATA_SECT_SIZE; | |
1797 | else | |
1798 | transfer_size = ATA_SECT_SIZE * fis.sect_count; | |
1799 | ||
1800 | /* Execute the command.*/ | |
1801 | if (mtip_exec_internal_command(dd->port, | |
1802 | &fis, | |
1803 | 5, | |
1804 | dma_buffer, | |
1805 | transfer_size, | |
1806 | 0, | |
1807 | GFP_KERNEL, | |
1808 | timeout) < 0) { | |
1809 | up_write(&dd->internal_sem); | |
1810 | err = -EIO; | |
1811 | goto abort; | |
1812 | } | |
1813 | ||
1814 | task_file_data = readl(dd->port->mmio+PORT_TFDATA); | |
1815 | ||
1816 | if ((req_task->data_phase == TASKFILE_IN) && !(task_file_data & 1)) { | |
1817 | reply = dd->port->rxfis + RX_FIS_PIO_SETUP; | |
1818 | req_task->io_ports[7] = reply->control; | |
1819 | } else { | |
1820 | reply = dd->port->rxfis + RX_FIS_D2H_REG; | |
1821 | req_task->io_ports[7] = reply->command; | |
1822 | } | |
1823 | ||
1824 | /* reclaim the DMA buffers.*/ | |
1825 | if (inbuf_dma) | |
1826 | pci_unmap_single(dd->pdev, inbuf_dma, | |
1827 | taskin, DMA_FROM_DEVICE); | |
1828 | if (outbuf_dma) | |
1829 | pci_unmap_single(dd->pdev, outbuf_dma, | |
1830 | taskout, DMA_TO_DEVICE); | |
16d02c04 JA |
1831 | inbuf_dma = 0; |
1832 | outbuf_dma = 0; | |
88523a61 SB |
1833 | |
1834 | /* return the ATA registers to the caller.*/ | |
1835 | req_task->io_ports[1] = reply->features; | |
1836 | req_task->io_ports[2] = reply->sect_count; | |
1837 | req_task->io_ports[3] = reply->lba_low; | |
1838 | req_task->io_ports[4] = reply->lba_mid; | |
1839 | req_task->io_ports[5] = reply->lba_hi; | |
1840 | req_task->io_ports[6] = reply->device; | |
1841 | ||
1842 | if (req_task->out_flags.all & 1) { | |
1843 | ||
1844 | req_task->hob_ports[3] = reply->lba_low_ex; | |
1845 | req_task->hob_ports[4] = reply->lba_mid_ex; | |
1846 | req_task->hob_ports[5] = reply->lba_hi_ex; | |
1847 | req_task->hob_ports[1] = reply->features_ex; | |
1848 | req_task->hob_ports[2] = reply->sect_cnt_ex; | |
1849 | } | |
1850 | ||
1851 | /* Com rest after secure erase or lowlevel format */ | |
1852 | if (((fis.command == 0xF4) || | |
1853 | ((fis.command == 0xFC) && | |
1854 | (fis.features == 0x27 || fis.features == 0x72 || | |
1855 | fis.features == 0x62 || fis.features == 0x26))) && | |
1856 | !(reply->command & 1)) { | |
1857 | mtip_restart_port(dd->port); | |
1858 | } | |
1859 | ||
1860 | dbg_printk(MTIP_DRV_NAME | |
1861 | "%s: Completion: stat %x," | |
1862 | "err %x, sect_cnt %x, lbalo %x," | |
1863 | "lbamid %x, lbahi %x, dev %x\n", | |
1864 | __func__, | |
1865 | req_task->io_ports[7], | |
1866 | req_task->io_ports[1], | |
1867 | req_task->io_ports[2], | |
1868 | req_task->io_ports[3], | |
1869 | req_task->io_ports[4], | |
1870 | req_task->io_ports[5], | |
1871 | req_task->io_ports[6]); | |
1872 | ||
1873 | up_write(&dd->internal_sem); | |
1874 | ||
88523a61 SB |
1875 | if (taskout) { |
1876 | if (copy_to_user(buf + outtotal, outbuf, taskout)) { | |
1877 | err = -EFAULT; | |
1878 | goto abort; | |
1879 | } | |
1880 | } | |
1881 | if (taskin) { | |
1882 | if (copy_to_user(buf + intotal, inbuf, taskin)) { | |
1883 | err = -EFAULT; | |
1884 | goto abort; | |
1885 | } | |
1886 | } | |
1887 | abort: | |
1888 | if (inbuf_dma) | |
1889 | pci_unmap_single(dd->pdev, inbuf_dma, | |
1890 | taskin, DMA_FROM_DEVICE); | |
1891 | if (outbuf_dma) | |
1892 | pci_unmap_single(dd->pdev, outbuf_dma, | |
1893 | taskout, DMA_TO_DEVICE); | |
88523a61 SB |
1894 | kfree(outbuf); |
1895 | kfree(inbuf); | |
1896 | ||
1897 | return err; | |
1898 | } | |
1899 | ||
1900 | /* | |
1901 | * Handle IOCTL calls from the Block Layer. | |
1902 | * | |
1903 | * This function is called by the Block Layer when it receives an IOCTL | |
1904 | * command that it does not understand. If the IOCTL command is not supported | |
1905 | * this function returns -ENOTTY. | |
1906 | * | |
1907 | * @dd Pointer to the driver data structure. | |
1908 | * @cmd IOCTL command passed from the Block Layer. | |
1909 | * @arg IOCTL argument passed from the Block Layer. | |
1910 | * | |
1911 | * return value | |
1912 | * 0 The IOCTL completed successfully. | |
1913 | * -ENOTTY The specified command is not supported. | |
1914 | * -EFAULT An error occurred copying data to a user space buffer. | |
1915 | * -EIO An error occurred while executing the command. | |
1916 | */ | |
ef0f1587 JA |
1917 | static int mtip_hw_ioctl(struct driver_data *dd, unsigned int cmd, |
1918 | unsigned long arg) | |
88523a61 SB |
1919 | { |
1920 | switch (cmd) { | |
1921 | case HDIO_GET_IDENTITY: | |
1922 | if (mtip_get_identify(dd->port, (void __user *) arg) < 0) { | |
1923 | dev_warn(&dd->pdev->dev, | |
1924 | "Unable to read identity\n"); | |
1925 | return -EIO; | |
1926 | } | |
1927 | ||
1928 | break; | |
1929 | case HDIO_DRIVE_CMD: | |
1930 | { | |
1931 | u8 drive_command[4]; | |
1932 | ||
1933 | /* Copy the user command info to our buffer. */ | |
1934 | if (copy_from_user(drive_command, | |
1935 | (void __user *) arg, | |
1936 | sizeof(drive_command))) | |
1937 | return -EFAULT; | |
1938 | ||
1939 | /* Execute the drive command. */ | |
1940 | if (exec_drive_command(dd->port, | |
1941 | drive_command, | |
1942 | (void __user *) (arg+4))) | |
1943 | return -EIO; | |
1944 | ||
1945 | /* Copy the status back to the users buffer. */ | |
1946 | if (copy_to_user((void __user *) arg, | |
1947 | drive_command, | |
1948 | sizeof(drive_command))) | |
1949 | return -EFAULT; | |
1950 | ||
1951 | break; | |
1952 | } | |
1953 | case HDIO_DRIVE_TASK: | |
1954 | { | |
1955 | u8 drive_command[7]; | |
1956 | ||
1957 | /* Copy the user command info to our buffer. */ | |
1958 | if (copy_from_user(drive_command, | |
1959 | (void __user *) arg, | |
1960 | sizeof(drive_command))) | |
1961 | return -EFAULT; | |
1962 | ||
1963 | /* Execute the drive command. */ | |
1964 | if (exec_drive_task(dd->port, drive_command)) | |
1965 | return -EIO; | |
1966 | ||
1967 | /* Copy the status back to the users buffer. */ | |
1968 | if (copy_to_user((void __user *) arg, | |
1969 | drive_command, | |
1970 | sizeof(drive_command))) | |
1971 | return -EFAULT; | |
1972 | ||
1973 | break; | |
1974 | } | |
ef0f1587 JA |
1975 | case HDIO_DRIVE_TASKFILE: { |
1976 | ide_task_request_t req_task; | |
1977 | int ret, outtotal; | |
1978 | ||
1979 | if (copy_from_user(&req_task, (void __user *) arg, | |
1980 | sizeof(req_task))) | |
1981 | return -EFAULT; | |
1982 | ||
1983 | outtotal = sizeof(req_task); | |
1984 | ||
1985 | ret = exec_drive_taskfile(dd, (void __user *) arg, | |
1986 | &req_task, outtotal); | |
1987 | ||
1988 | if (copy_to_user((void __user *) arg, &req_task, sizeof(req_task))) | |
1989 | return -EFAULT; | |
1990 | ||
1991 | return ret; | |
1992 | } | |
88523a61 SB |
1993 | |
1994 | default: | |
1995 | return -EINVAL; | |
1996 | } | |
1997 | return 0; | |
1998 | } | |
1999 | ||
2000 | /* | |
2001 | * Submit an IO to the hw | |
2002 | * | |
2003 | * This function is called by the block layer to issue an io | |
2004 | * to the device. Upon completion, the callback function will | |
2005 | * be called with the data parameter passed as the callback data. | |
2006 | * | |
2007 | * @dd Pointer to the driver data structure. | |
2008 | * @start First sector to read. | |
2009 | * @nsect Number of sectors to read. | |
2010 | * @nents Number of entries in scatter list for the read command. | |
2011 | * @tag The tag of this read command. | |
2012 | * @callback Pointer to the function that should be called | |
2013 | * when the read completes. | |
2014 | * @data Callback data passed to the callback function | |
2015 | * when the read completes. | |
2016 | * @barrier If non-zero, this command must be completed before | |
2017 | * issuing any other commands. | |
2018 | * @dir Direction (read or write) | |
2019 | * | |
2020 | * return value | |
2021 | * None | |
2022 | */ | |
2023 | void mtip_hw_submit_io(struct driver_data *dd, | |
2024 | sector_t start, | |
2025 | int nsect, | |
2026 | int nents, | |
2027 | int tag, | |
2028 | void *callback, | |
2029 | void *data, | |
2030 | int barrier, | |
2031 | int dir) | |
2032 | { | |
2033 | struct host_to_dev_fis *fis; | |
2034 | struct mtip_port *port = dd->port; | |
2035 | struct mtip_cmd *command = &port->commands[tag]; | |
2036 | ||
2037 | /* Map the scatter list for DMA access */ | |
2038 | if (dir == READ) | |
2039 | nents = dma_map_sg(&dd->pdev->dev, command->sg, | |
2040 | nents, DMA_FROM_DEVICE); | |
2041 | else | |
2042 | nents = dma_map_sg(&dd->pdev->dev, command->sg, | |
2043 | nents, DMA_TO_DEVICE); | |
2044 | ||
2045 | command->scatter_ents = nents; | |
2046 | ||
2047 | /* | |
2048 | * The number of retries for this command before it is | |
2049 | * reported as a failure to the upper layers. | |
2050 | */ | |
2051 | command->retries = MTIP_MAX_RETRIES; | |
2052 | ||
2053 | /* Fill out fis */ | |
2054 | fis = command->command; | |
2055 | fis->type = 0x27; | |
2056 | fis->opts = 1 << 7; | |
2057 | fis->command = | |
2058 | (dir == READ ? ATA_CMD_FPDMA_READ : ATA_CMD_FPDMA_WRITE); | |
2059 | *((unsigned int *) &fis->lba_low) = (start & 0xffffff); | |
2060 | *((unsigned int *) &fis->lba_low_ex) = ((start >> 24) & 0xffffff); | |
2061 | fis->device = 1 << 6; | |
2062 | if (barrier) | |
2063 | fis->device |= FUA_BIT; | |
2064 | fis->features = nsect & 0xff; | |
2065 | fis->features_ex = (nsect >> 8) & 0xff; | |
2066 | fis->sect_count = ((tag << 3) | (tag >> 5)); | |
2067 | fis->sect_cnt_ex = 0; | |
2068 | fis->control = 0; | |
2069 | fis->res2 = 0; | |
2070 | fis->res3 = 0; | |
2071 | fill_command_sg(dd, command, nents); | |
2072 | ||
2073 | /* Populate the command header */ | |
2074 | command->command_header->opts = cpu_to_le32( | |
2075 | (nents << 16) | 5 | AHCI_CMD_PREFETCH); | |
2076 | command->command_header->byte_count = 0; | |
2077 | ||
2078 | /* | |
2079 | * Set the completion function and data for the command | |
2080 | * within this layer. | |
2081 | */ | |
2082 | command->comp_data = dd; | |
2083 | command->comp_func = mtip_async_complete; | |
2084 | command->direction = (dir == READ ? DMA_FROM_DEVICE : DMA_TO_DEVICE); | |
2085 | ||
2086 | /* | |
2087 | * Set the completion function and data for the command passed | |
2088 | * from the upper layer. | |
2089 | */ | |
2090 | command->async_data = data; | |
2091 | command->async_callback = callback; | |
2092 | ||
2093 | /* | |
2094 | * Lock used to prevent this command from being issued | |
2095 | * if an internal command is in progress. | |
2096 | */ | |
2097 | down_read(&port->dd->internal_sem); | |
2098 | ||
2099 | /* Issue the command to the hardware */ | |
2100 | mtip_issue_ncq_command(port, tag); | |
2101 | ||
2102 | /* Set the command's timeout value.*/ | |
2103 | port->commands[tag].comp_time = jiffies + msecs_to_jiffies( | |
2104 | MTIP_NCQ_COMMAND_TIMEOUT_MS); | |
2105 | ||
2106 | up_read(&port->dd->internal_sem); | |
2107 | } | |
2108 | ||
2109 | /* | |
2110 | * Release a command slot. | |
2111 | * | |
2112 | * @dd Pointer to the driver data structure. | |
2113 | * @tag Slot tag | |
2114 | * | |
2115 | * return value | |
2116 | * None | |
2117 | */ | |
2118 | void mtip_hw_release_scatterlist(struct driver_data *dd, int tag) | |
2119 | { | |
2120 | release_slot(dd->port, tag); | |
2121 | } | |
2122 | ||
2123 | /* | |
2124 | * Obtain a command slot and return its associated scatter list. | |
2125 | * | |
2126 | * @dd Pointer to the driver data structure. | |
2127 | * @tag Pointer to an int that will receive the allocated command | |
2128 | * slot tag. | |
2129 | * | |
2130 | * return value | |
2131 | * Pointer to the scatter list for the allocated command slot | |
2132 | * or NULL if no command slots are available. | |
2133 | */ | |
2134 | struct scatterlist *mtip_hw_get_scatterlist(struct driver_data *dd, | |
2135 | int *tag) | |
2136 | { | |
2137 | /* | |
2138 | * It is possible that, even with this semaphore, a thread | |
2139 | * may think that no command slots are available. Therefore, we | |
2140 | * need to make an attempt to get_slot(). | |
2141 | */ | |
2142 | down(&dd->port->cmd_slot); | |
2143 | *tag = get_slot(dd->port); | |
2144 | ||
2145 | if (unlikely(*tag < 0)) | |
2146 | return NULL; | |
2147 | ||
2148 | return dd->port->commands[*tag].sg; | |
2149 | } | |
2150 | ||
2151 | /* | |
2152 | * Sysfs register/status dump. | |
2153 | * | |
2154 | * @dev Pointer to the device structure, passed by the kernrel. | |
2155 | * @attr Pointer to the device_attribute structure passed by the kernel. | |
2156 | * @buf Pointer to the char buffer that will receive the stats info. | |
2157 | * | |
2158 | * return value | |
2159 | * The size, in bytes, of the data copied into buf. | |
2160 | */ | |
2161 | static ssize_t hw_show_registers(struct device *dev, | |
2162 | struct device_attribute *attr, | |
2163 | char *buf) | |
2164 | { | |
2165 | u32 group_allocated; | |
2166 | struct driver_data *dd = dev_to_disk(dev)->private_data; | |
2167 | int size = 0; | |
2168 | int n; | |
2169 | ||
2170 | size += sprintf(&buf[size], "%s:\ns_active:\n", __func__); | |
2171 | ||
2172 | for (n = 0; n < dd->slot_groups; n++) | |
2173 | size += sprintf(&buf[size], "0x%08x\n", | |
2174 | readl(dd->port->s_active[n])); | |
2175 | ||
2176 | size += sprintf(&buf[size], "Command Issue:\n"); | |
2177 | ||
2178 | for (n = 0; n < dd->slot_groups; n++) | |
2179 | size += sprintf(&buf[size], "0x%08x\n", | |
2180 | readl(dd->port->cmd_issue[n])); | |
2181 | ||
2182 | size += sprintf(&buf[size], "Allocated:\n"); | |
2183 | ||
2184 | for (n = 0; n < dd->slot_groups; n++) { | |
2185 | if (sizeof(long) > sizeof(u32)) | |
2186 | group_allocated = | |
2187 | dd->port->allocated[n/2] >> (32*(n&1)); | |
2188 | else | |
2189 | group_allocated = dd->port->allocated[n]; | |
2190 | size += sprintf(&buf[size], "0x%08x\n", | |
2191 | group_allocated); | |
2192 | } | |
2193 | ||
2194 | size += sprintf(&buf[size], "completed:\n"); | |
2195 | ||
2196 | for (n = 0; n < dd->slot_groups; n++) | |
2197 | size += sprintf(&buf[size], "0x%08x\n", | |
2198 | readl(dd->port->completed[n])); | |
2199 | ||
2200 | size += sprintf(&buf[size], "PORT_IRQ_STAT 0x%08x\n", | |
2201 | readl(dd->port->mmio + PORT_IRQ_STAT)); | |
2202 | size += sprintf(&buf[size], "HOST_IRQ_STAT 0x%08x\n", | |
2203 | readl(dd->mmio + HOST_IRQ_STAT)); | |
2204 | ||
2205 | return size; | |
2206 | } | |
2207 | static DEVICE_ATTR(registers, S_IRUGO, hw_show_registers, NULL); | |
2208 | ||
2209 | /* | |
2210 | * Create the sysfs related attributes. | |
2211 | * | |
2212 | * @dd Pointer to the driver data structure. | |
2213 | * @kobj Pointer to the kobj for the block device. | |
2214 | * | |
2215 | * return value | |
2216 | * 0 Operation completed successfully. | |
2217 | * -EINVAL Invalid parameter. | |
2218 | */ | |
2219 | int mtip_hw_sysfs_init(struct driver_data *dd, struct kobject *kobj) | |
2220 | { | |
2221 | if (!kobj || !dd) | |
2222 | return -EINVAL; | |
2223 | ||
2224 | if (sysfs_create_file(kobj, &dev_attr_registers.attr)) | |
2225 | dev_warn(&dd->pdev->dev, | |
2226 | "Error creating registers sysfs entry\n"); | |
2227 | return 0; | |
2228 | } | |
2229 | ||
2230 | /* | |
2231 | * Remove the sysfs related attributes. | |
2232 | * | |
2233 | * @dd Pointer to the driver data structure. | |
2234 | * @kobj Pointer to the kobj for the block device. | |
2235 | * | |
2236 | * return value | |
2237 | * 0 Operation completed successfully. | |
2238 | * -EINVAL Invalid parameter. | |
2239 | */ | |
2240 | int mtip_hw_sysfs_exit(struct driver_data *dd, struct kobject *kobj) | |
2241 | { | |
2242 | if (!kobj || !dd) | |
2243 | return -EINVAL; | |
2244 | ||
2245 | sysfs_remove_file(kobj, &dev_attr_registers.attr); | |
2246 | ||
2247 | return 0; | |
2248 | } | |
2249 | ||
2250 | /* | |
2251 | * Perform any init/resume time hardware setup | |
2252 | * | |
2253 | * @dd Pointer to the driver data structure. | |
2254 | * | |
2255 | * return value | |
2256 | * None | |
2257 | */ | |
2258 | static inline void hba_setup(struct driver_data *dd) | |
2259 | { | |
2260 | u32 hwdata; | |
2261 | hwdata = readl(dd->mmio + HOST_HSORG); | |
2262 | ||
2263 | /* interrupt bug workaround: use only 1 IS bit.*/ | |
2264 | writel(hwdata | | |
2265 | HSORG_DISABLE_SLOTGRP_INTR | | |
2266 | HSORG_DISABLE_SLOTGRP_PXIS, | |
2267 | dd->mmio + HOST_HSORG); | |
2268 | } | |
2269 | ||
2270 | /* | |
2271 | * Detect the details of the product, and store anything needed | |
2272 | * into the driver data structure. This includes product type and | |
2273 | * version and number of slot groups. | |
2274 | * | |
2275 | * @dd Pointer to the driver data structure. | |
2276 | * | |
2277 | * return value | |
2278 | * None | |
2279 | */ | |
2280 | static void mtip_detect_product(struct driver_data *dd) | |
2281 | { | |
2282 | u32 hwdata; | |
2283 | unsigned int rev, slotgroups; | |
2284 | ||
2285 | /* | |
2286 | * HBA base + 0xFC [15:0] - vendor-specific hardware interface | |
2287 | * info register: | |
2288 | * [15:8] hardware/software interface rev# | |
2289 | * [ 3] asic-style interface | |
2290 | * [ 2:0] number of slot groups, minus 1 (only valid for asic-style). | |
2291 | */ | |
2292 | hwdata = readl(dd->mmio + HOST_HSORG); | |
2293 | ||
2294 | dd->product_type = MTIP_PRODUCT_UNKNOWN; | |
2295 | dd->slot_groups = 1; | |
2296 | ||
2297 | if (hwdata & 0x8) { | |
2298 | dd->product_type = MTIP_PRODUCT_ASICFPGA; | |
2299 | rev = (hwdata & HSORG_HWREV) >> 8; | |
2300 | slotgroups = (hwdata & HSORG_SLOTGROUPS) + 1; | |
2301 | dev_info(&dd->pdev->dev, | |
2302 | "ASIC-FPGA design, HS rev 0x%x, " | |
2303 | "%i slot groups [%i slots]\n", | |
2304 | rev, | |
2305 | slotgroups, | |
2306 | slotgroups * 32); | |
2307 | ||
2308 | if (slotgroups > MTIP_MAX_SLOT_GROUPS) { | |
2309 | dev_warn(&dd->pdev->dev, | |
2310 | "Warning: driver only supports " | |
2311 | "%i slot groups.\n", MTIP_MAX_SLOT_GROUPS); | |
2312 | slotgroups = MTIP_MAX_SLOT_GROUPS; | |
2313 | } | |
2314 | dd->slot_groups = slotgroups; | |
2315 | return; | |
2316 | } | |
2317 | ||
2318 | dev_warn(&dd->pdev->dev, "Unrecognized product id\n"); | |
2319 | } | |
2320 | ||
2321 | /* | |
2322 | * Blocking wait for FTL rebuild to complete | |
2323 | * | |
2324 | * @dd Pointer to the DRIVER_DATA structure. | |
2325 | * | |
2326 | * return value | |
2327 | * 0 FTL rebuild completed successfully | |
2328 | * -EFAULT FTL rebuild error/timeout/interruption | |
2329 | */ | |
2330 | static int mtip_ftl_rebuild_poll(struct driver_data *dd) | |
2331 | { | |
2332 | unsigned long timeout, cnt = 0, start; | |
2333 | ||
2334 | dev_warn(&dd->pdev->dev, | |
2335 | "FTL rebuild in progress. Polling for completion.\n"); | |
2336 | ||
2337 | start = jiffies; | |
2338 | dd->ftlrebuildflag = 1; | |
2339 | timeout = jiffies + msecs_to_jiffies(MTIP_FTL_REBUILD_TIMEOUT_MS); | |
2340 | ||
2341 | do { | |
2342 | #ifdef CONFIG_HOTPLUG | |
2343 | if (mtip_check_surprise_removal(dd->pdev)) | |
2344 | return -EFAULT; | |
2345 | #endif | |
2346 | if (mtip_get_identify(dd->port, NULL) < 0) | |
2347 | return -EFAULT; | |
2348 | ||
2349 | if (*(dd->port->identify + MTIP_FTL_REBUILD_OFFSET) == | |
2350 | MTIP_FTL_REBUILD_MAGIC) { | |
2351 | ssleep(1); | |
2352 | /* Print message every 3 minutes */ | |
2353 | if (cnt++ >= 180) { | |
2354 | dev_warn(&dd->pdev->dev, | |
2355 | "FTL rebuild in progress (%d secs).\n", | |
2356 | jiffies_to_msecs(jiffies - start) / 1000); | |
2357 | cnt = 0; | |
2358 | } | |
2359 | } else { | |
2360 | dev_warn(&dd->pdev->dev, | |
2361 | "FTL rebuild complete (%d secs).\n", | |
2362 | jiffies_to_msecs(jiffies - start) / 1000); | |
2363 | dd->ftlrebuildflag = 0; | |
2364 | break; | |
2365 | } | |
2366 | ssleep(10); | |
2367 | } while (time_before(jiffies, timeout)); | |
2368 | ||
2369 | /* Check for timeout */ | |
2370 | if (dd->ftlrebuildflag) { | |
2371 | dev_err(&dd->pdev->dev, | |
2372 | "Timed out waiting for FTL rebuild to complete (%d secs).\n", | |
2373 | jiffies_to_msecs(jiffies - start) / 1000); | |
2374 | return -EFAULT; | |
2375 | } | |
2376 | ||
2377 | return 0; | |
2378 | } | |
2379 | ||
2380 | /* | |
2381 | * Called once for each card. | |
2382 | * | |
2383 | * @dd Pointer to the driver data structure. | |
2384 | * | |
2385 | * return value | |
2386 | * 0 on success, else an error code. | |
2387 | */ | |
2388 | int mtip_hw_init(struct driver_data *dd) | |
2389 | { | |
2390 | int i; | |
2391 | int rv; | |
2392 | unsigned int num_command_slots; | |
2393 | ||
2394 | dd->mmio = pcim_iomap_table(dd->pdev)[MTIP_ABAR]; | |
2395 | ||
2396 | mtip_detect_product(dd); | |
2397 | if (dd->product_type == MTIP_PRODUCT_UNKNOWN) { | |
2398 | rv = -EIO; | |
2399 | goto out1; | |
2400 | } | |
2401 | num_command_slots = dd->slot_groups * 32; | |
2402 | ||
2403 | hba_setup(dd); | |
2404 | ||
2405 | /* | |
2406 | * Initialize the internal semaphore | |
2407 | * Use a rw semaphore to enable prioritization of | |
2408 | * mgmnt ioctl traffic during heavy IO load | |
2409 | */ | |
2410 | init_rwsem(&dd->internal_sem); | |
2411 | ||
2412 | tasklet_init(&dd->tasklet, mtip_tasklet, (unsigned long)dd); | |
2413 | ||
2414 | dd->port = kzalloc(sizeof(struct mtip_port), GFP_KERNEL); | |
2415 | if (!dd->port) { | |
2416 | dev_err(&dd->pdev->dev, | |
2417 | "Memory allocation: port structure\n"); | |
2418 | return -ENOMEM; | |
2419 | } | |
2420 | ||
2421 | /* Counting semaphore to track command slot usage */ | |
2422 | sema_init(&dd->port->cmd_slot, num_command_slots - 1); | |
2423 | ||
2424 | /* Spinlock to prevent concurrent issue */ | |
2425 | spin_lock_init(&dd->port->cmd_issue_lock); | |
2426 | ||
2427 | /* Set the port mmio base address. */ | |
2428 | dd->port->mmio = dd->mmio + PORT_OFFSET; | |
2429 | dd->port->dd = dd; | |
2430 | ||
2431 | /* Allocate memory for the command list. */ | |
2432 | dd->port->command_list = | |
2433 | dmam_alloc_coherent(&dd->pdev->dev, | |
2434 | HW_PORT_PRIV_DMA_SZ + (ATA_SECT_SIZE * 2), | |
2435 | &dd->port->command_list_dma, | |
2436 | GFP_KERNEL); | |
2437 | if (!dd->port->command_list) { | |
2438 | dev_err(&dd->pdev->dev, | |
2439 | "Memory allocation: command list\n"); | |
2440 | rv = -ENOMEM; | |
2441 | goto out1; | |
2442 | } | |
2443 | ||
2444 | /* Clear the memory we have allocated. */ | |
2445 | memset(dd->port->command_list, | |
2446 | 0, | |
2447 | HW_PORT_PRIV_DMA_SZ + (ATA_SECT_SIZE * 2)); | |
2448 | ||
2449 | /* Setup the addresse of the RX FIS. */ | |
2450 | dd->port->rxfis = dd->port->command_list + HW_CMD_SLOT_SZ; | |
2451 | dd->port->rxfis_dma = dd->port->command_list_dma + HW_CMD_SLOT_SZ; | |
2452 | ||
2453 | /* Setup the address of the command tables. */ | |
2454 | dd->port->command_table = dd->port->rxfis + AHCI_RX_FIS_SZ; | |
2455 | dd->port->command_tbl_dma = dd->port->rxfis_dma + AHCI_RX_FIS_SZ; | |
2456 | ||
2457 | /* Setup the address of the identify data. */ | |
2458 | dd->port->identify = dd->port->command_table + | |
2459 | HW_CMD_TBL_AR_SZ; | |
2460 | dd->port->identify_dma = dd->port->command_tbl_dma + | |
2461 | HW_CMD_TBL_AR_SZ; | |
2462 | ||
2463 | /* Setup the address of the sector buffer. */ | |
2464 | dd->port->sector_buffer = (void *) dd->port->identify + ATA_SECT_SIZE; | |
2465 | dd->port->sector_buffer_dma = dd->port->identify_dma + ATA_SECT_SIZE; | |
2466 | ||
2467 | /* Point the command headers at the command tables. */ | |
2468 | for (i = 0; i < num_command_slots; i++) { | |
2469 | dd->port->commands[i].command_header = | |
2470 | dd->port->command_list + | |
2471 | (sizeof(struct mtip_cmd_hdr) * i); | |
2472 | dd->port->commands[i].command_header_dma = | |
2473 | dd->port->command_list_dma + | |
2474 | (sizeof(struct mtip_cmd_hdr) * i); | |
2475 | ||
2476 | dd->port->commands[i].command = | |
2477 | dd->port->command_table + (HW_CMD_TBL_SZ * i); | |
2478 | dd->port->commands[i].command_dma = | |
2479 | dd->port->command_tbl_dma + (HW_CMD_TBL_SZ * i); | |
2480 | ||
2481 | if (readl(dd->mmio + HOST_CAP) & HOST_CAP_64) | |
2482 | dd->port->commands[i].command_header->ctbau = | |
2483 | cpu_to_le32( | |
2484 | (dd->port->commands[i].command_dma >> 16) >> 16); | |
2485 | dd->port->commands[i].command_header->ctba = cpu_to_le32( | |
2486 | dd->port->commands[i].command_dma & 0xffffffff); | |
2487 | ||
2488 | /* | |
2489 | * If this is not done, a bug is reported by the stock | |
2490 | * FC11 i386. Due to the fact that it has lots of kernel | |
2491 | * debugging enabled. | |
2492 | */ | |
2493 | sg_init_table(dd->port->commands[i].sg, MTIP_MAX_SG); | |
2494 | ||
2495 | /* Mark all commands as currently inactive.*/ | |
2496 | atomic_set(&dd->port->commands[i].active, 0); | |
2497 | } | |
2498 | ||
2499 | /* Setup the pointers to the extended s_active and CI registers. */ | |
2500 | for (i = 0; i < dd->slot_groups; i++) { | |
2501 | dd->port->s_active[i] = | |
2502 | dd->port->mmio + i*0x80 + PORT_SCR_ACT; | |
2503 | dd->port->cmd_issue[i] = | |
2504 | dd->port->mmio + i*0x80 + PORT_COMMAND_ISSUE; | |
2505 | dd->port->completed[i] = | |
2506 | dd->port->mmio + i*0x80 + PORT_SDBV; | |
2507 | } | |
2508 | ||
2509 | /* Reset the HBA. */ | |
2510 | if (mtip_hba_reset(dd) < 0) { | |
2511 | dev_err(&dd->pdev->dev, | |
2512 | "Card did not reset within timeout\n"); | |
2513 | rv = -EIO; | |
2514 | goto out2; | |
2515 | } | |
2516 | ||
2517 | mtip_init_port(dd->port); | |
2518 | mtip_start_port(dd->port); | |
2519 | ||
2520 | /* Setup the ISR and enable interrupts. */ | |
2521 | rv = devm_request_irq(&dd->pdev->dev, | |
2522 | dd->pdev->irq, | |
2523 | mtip_irq_handler, | |
2524 | IRQF_SHARED, | |
2525 | dev_driver_string(&dd->pdev->dev), | |
2526 | dd); | |
2527 | ||
2528 | if (rv) { | |
2529 | dev_err(&dd->pdev->dev, | |
2530 | "Unable to allocate IRQ %d\n", dd->pdev->irq); | |
2531 | goto out2; | |
2532 | } | |
2533 | ||
2534 | /* Enable interrupts on the HBA. */ | |
2535 | writel(readl(dd->mmio + HOST_CTL) | HOST_IRQ_EN, | |
2536 | dd->mmio + HOST_CTL); | |
2537 | ||
2538 | init_timer(&dd->port->cmd_timer); | |
2539 | dd->port->cmd_timer.data = (unsigned long int) dd->port; | |
2540 | dd->port->cmd_timer.function = mtip_timeout_function; | |
2541 | mod_timer(&dd->port->cmd_timer, | |
2542 | jiffies + msecs_to_jiffies(MTIP_TIMEOUT_CHECK_PERIOD)); | |
2543 | ||
2544 | if (mtip_get_identify(dd->port, NULL) < 0) { | |
2545 | rv = -EFAULT; | |
2546 | goto out3; | |
2547 | } | |
2548 | mtip_dump_identify(dd->port); | |
2549 | ||
2550 | if (*(dd->port->identify + MTIP_FTL_REBUILD_OFFSET) == | |
2551 | MTIP_FTL_REBUILD_MAGIC) { | |
2552 | return mtip_ftl_rebuild_poll(dd); | |
2553 | } | |
2554 | return rv; | |
2555 | ||
2556 | out3: | |
2557 | del_timer_sync(&dd->port->cmd_timer); | |
2558 | ||
2559 | /* Disable interrupts on the HBA. */ | |
2560 | writel(readl(dd->mmio + HOST_CTL) & ~HOST_IRQ_EN, | |
2561 | dd->mmio + HOST_CTL); | |
2562 | ||
2563 | /*Release the IRQ. */ | |
2564 | devm_free_irq(&dd->pdev->dev, dd->pdev->irq, dd); | |
2565 | ||
2566 | out2: | |
2567 | mtip_deinit_port(dd->port); | |
2568 | ||
2569 | /* Free the command/command header memory. */ | |
2570 | dmam_free_coherent(&dd->pdev->dev, | |
2571 | HW_PORT_PRIV_DMA_SZ + (ATA_SECT_SIZE * 2), | |
2572 | dd->port->command_list, | |
2573 | dd->port->command_list_dma); | |
2574 | out1: | |
2575 | /* Free the memory allocated for the for structure. */ | |
2576 | kfree(dd->port); | |
2577 | ||
2578 | return rv; | |
2579 | } | |
2580 | ||
2581 | /* | |
2582 | * Called to deinitialize an interface. | |
2583 | * | |
2584 | * @dd Pointer to the driver data structure. | |
2585 | * | |
2586 | * return value | |
2587 | * 0 | |
2588 | */ | |
2589 | int mtip_hw_exit(struct driver_data *dd) | |
2590 | { | |
2591 | /* | |
2592 | * Send standby immediate (E0h) to the drive so that it | |
2593 | * saves its state. | |
2594 | */ | |
2595 | if (atomic_read(&dd->drv_cleanup_done) != true) { | |
2596 | ||
2597 | mtip_standby_immediate(dd->port); | |
2598 | ||
2599 | /* de-initialize the port. */ | |
2600 | mtip_deinit_port(dd->port); | |
2601 | ||
2602 | /* Disable interrupts on the HBA. */ | |
2603 | writel(readl(dd->mmio + HOST_CTL) & ~HOST_IRQ_EN, | |
2604 | dd->mmio + HOST_CTL); | |
2605 | } | |
2606 | ||
2607 | del_timer_sync(&dd->port->cmd_timer); | |
2608 | ||
2609 | /* Stop the bottom half tasklet. */ | |
2610 | tasklet_kill(&dd->tasklet); | |
2611 | ||
2612 | /* Release the IRQ. */ | |
2613 | devm_free_irq(&dd->pdev->dev, dd->pdev->irq, dd); | |
2614 | ||
2615 | /* Free the command/command header memory. */ | |
2616 | dmam_free_coherent(&dd->pdev->dev, | |
2617 | HW_PORT_PRIV_DMA_SZ + (ATA_SECT_SIZE * 2), | |
2618 | dd->port->command_list, | |
2619 | dd->port->command_list_dma); | |
2620 | /* Free the memory allocated for the for structure. */ | |
2621 | kfree(dd->port); | |
2622 | ||
2623 | return 0; | |
2624 | } | |
2625 | ||
2626 | /* | |
2627 | * Issue a Standby Immediate command to the device. | |
2628 | * | |
2629 | * This function is called by the Block Layer just before the | |
2630 | * system powers off during a shutdown. | |
2631 | * | |
2632 | * @dd Pointer to the driver data structure. | |
2633 | * | |
2634 | * return value | |
2635 | * 0 | |
2636 | */ | |
2637 | int mtip_hw_shutdown(struct driver_data *dd) | |
2638 | { | |
2639 | /* | |
2640 | * Send standby immediate (E0h) to the drive so that it | |
2641 | * saves its state. | |
2642 | */ | |
2643 | mtip_standby_immediate(dd->port); | |
2644 | ||
2645 | return 0; | |
2646 | } | |
2647 | ||
2648 | /* | |
2649 | * Suspend function | |
2650 | * | |
2651 | * This function is called by the Block Layer just before the | |
2652 | * system hibernates. | |
2653 | * | |
2654 | * @dd Pointer to the driver data structure. | |
2655 | * | |
2656 | * return value | |
2657 | * 0 Suspend was successful | |
2658 | * -EFAULT Suspend was not successful | |
2659 | */ | |
2660 | int mtip_hw_suspend(struct driver_data *dd) | |
2661 | { | |
2662 | /* | |
2663 | * Send standby immediate (E0h) to the drive | |
2664 | * so that it saves its state. | |
2665 | */ | |
2666 | if (mtip_standby_immediate(dd->port) != 0) { | |
2667 | dev_err(&dd->pdev->dev, | |
2668 | "Failed standby-immediate command\n"); | |
2669 | return -EFAULT; | |
2670 | } | |
2671 | ||
2672 | /* Disable interrupts on the HBA.*/ | |
2673 | writel(readl(dd->mmio + HOST_CTL) & ~HOST_IRQ_EN, | |
2674 | dd->mmio + HOST_CTL); | |
2675 | mtip_deinit_port(dd->port); | |
2676 | ||
2677 | return 0; | |
2678 | } | |
2679 | ||
2680 | /* | |
2681 | * Resume function | |
2682 | * | |
2683 | * This function is called by the Block Layer as the | |
2684 | * system resumes. | |
2685 | * | |
2686 | * @dd Pointer to the driver data structure. | |
2687 | * | |
2688 | * return value | |
2689 | * 0 Resume was successful | |
2690 | * -EFAULT Resume was not successful | |
2691 | */ | |
2692 | int mtip_hw_resume(struct driver_data *dd) | |
2693 | { | |
2694 | /* Perform any needed hardware setup steps */ | |
2695 | hba_setup(dd); | |
2696 | ||
2697 | /* Reset the HBA */ | |
2698 | if (mtip_hba_reset(dd) != 0) { | |
2699 | dev_err(&dd->pdev->dev, | |
2700 | "Unable to reset the HBA\n"); | |
2701 | return -EFAULT; | |
2702 | } | |
2703 | ||
2704 | /* | |
2705 | * Enable the port, DMA engine, and FIS reception specific | |
2706 | * h/w in controller. | |
2707 | */ | |
2708 | mtip_init_port(dd->port); | |
2709 | mtip_start_port(dd->port); | |
2710 | ||
2711 | /* Enable interrupts on the HBA.*/ | |
2712 | writel(readl(dd->mmio + HOST_CTL) | HOST_IRQ_EN, | |
2713 | dd->mmio + HOST_CTL); | |
2714 | ||
2715 | return 0; | |
2716 | } | |
2717 | ||
2718 | /* | |
2719 | * This function is called for clean the pending command in the | |
2720 | * command slot during the surprise removal of device and return | |
2721 | * error to the upper layer. | |
2722 | * | |
2723 | * @dd Pointer to the DRIVER_DATA structure. | |
2724 | * | |
2725 | * return value | |
2726 | * None | |
2727 | */ | |
2728 | void mtip_command_cleanup(struct driver_data *dd) | |
2729 | { | |
2730 | int group = 0, commandslot = 0, commandindex = 0; | |
2731 | struct mtip_cmd *command; | |
2732 | struct mtip_port *port = dd->port; | |
2733 | ||
2734 | for (group = 0; group < 4; group++) { | |
2735 | for (commandslot = 0; commandslot < 32; commandslot++) { | |
2736 | if (!(port->allocated[group] & (1 << commandslot))) | |
2737 | continue; | |
2738 | ||
2739 | commandindex = group << 5 | commandslot; | |
2740 | command = &port->commands[commandindex]; | |
2741 | ||
2742 | if (atomic_read(&command->active) | |
2743 | && (command->async_callback)) { | |
2744 | command->async_callback(command->async_data, | |
2745 | -ENODEV); | |
2746 | command->async_callback = NULL; | |
2747 | command->async_data = NULL; | |
2748 | } | |
2749 | ||
2750 | dma_unmap_sg(&port->dd->pdev->dev, | |
2751 | command->sg, | |
2752 | command->scatter_ents, | |
2753 | command->direction); | |
2754 | } | |
2755 | } | |
2756 | ||
2757 | up(&port->cmd_slot); | |
2758 | ||
2759 | atomic_set(&dd->drv_cleanup_done, true); | |
2760 | } | |
2761 | ||
2762 | /* | |
2763 | * Helper function for reusing disk name | |
2764 | * upon hot insertion. | |
2765 | */ | |
2766 | static int rssd_disk_name_format(char *prefix, | |
2767 | int index, | |
2768 | char *buf, | |
2769 | int buflen) | |
2770 | { | |
2771 | const int base = 'z' - 'a' + 1; | |
2772 | char *begin = buf + strlen(prefix); | |
2773 | char *end = buf + buflen; | |
2774 | char *p; | |
2775 | int unit; | |
2776 | ||
2777 | p = end - 1; | |
2778 | *p = '\0'; | |
2779 | unit = base; | |
2780 | do { | |
2781 | if (p == begin) | |
2782 | return -EINVAL; | |
2783 | *--p = 'a' + (index % unit); | |
2784 | index = (index / unit) - 1; | |
2785 | } while (index >= 0); | |
2786 | ||
2787 | memmove(begin, p, end - p); | |
2788 | memcpy(buf, prefix, strlen(prefix)); | |
2789 | ||
2790 | return 0; | |
2791 | } | |
2792 | ||
2793 | /* | |
2794 | * Block layer IOCTL handler. | |
2795 | * | |
2796 | * @dev Pointer to the block_device structure. | |
2797 | * @mode ignored | |
2798 | * @cmd IOCTL command passed from the user application. | |
2799 | * @arg Argument passed from the user application. | |
2800 | * | |
2801 | * return value | |
2802 | * 0 IOCTL completed successfully. | |
2803 | * -ENOTTY IOCTL not supported or invalid driver data | |
2804 | * structure pointer. | |
2805 | */ | |
2806 | static int mtip_block_ioctl(struct block_device *dev, | |
2807 | fmode_t mode, | |
2808 | unsigned cmd, | |
2809 | unsigned long arg) | |
2810 | { | |
2811 | struct driver_data *dd = dev->bd_disk->private_data; | |
2812 | ||
2813 | if (!capable(CAP_SYS_ADMIN)) | |
2814 | return -EACCES; | |
2815 | ||
2816 | if (!dd) | |
2817 | return -ENOTTY; | |
2818 | ||
2819 | switch (cmd) { | |
2820 | case BLKFLSBUF: | |
2821 | return 0; | |
2822 | default: | |
ef0f1587 | 2823 | return mtip_hw_ioctl(dd, cmd, arg); |
88523a61 SB |
2824 | } |
2825 | } | |
2826 | ||
16d02c04 | 2827 | #ifdef CONFIG_COMPAT |
88523a61 SB |
2828 | /* |
2829 | * Block layer compat IOCTL handler. | |
2830 | * | |
2831 | * @dev Pointer to the block_device structure. | |
2832 | * @mode ignored | |
2833 | * @cmd IOCTL command passed from the user application. | |
2834 | * @arg Argument passed from the user application. | |
2835 | * | |
2836 | * return value | |
2837 | * 0 IOCTL completed successfully. | |
2838 | * -ENOTTY IOCTL not supported or invalid driver data | |
2839 | * structure pointer. | |
2840 | */ | |
2841 | static int mtip_block_compat_ioctl(struct block_device *dev, | |
2842 | fmode_t mode, | |
2843 | unsigned cmd, | |
2844 | unsigned long arg) | |
2845 | { | |
2846 | struct driver_data *dd = dev->bd_disk->private_data; | |
2847 | ||
2848 | if (!capable(CAP_SYS_ADMIN)) | |
2849 | return -EACCES; | |
2850 | ||
2851 | if (!dd) | |
2852 | return -ENOTTY; | |
2853 | ||
2854 | switch (cmd) { | |
2855 | case BLKFLSBUF: | |
2856 | return 0; | |
ef0f1587 JA |
2857 | case HDIO_DRIVE_TASKFILE: { |
2858 | struct mtip_compat_ide_task_request_s *compat_req_task; | |
2859 | ide_task_request_t req_task; | |
2860 | int compat_tasksize, outtotal, ret; | |
2861 | ||
2862 | compat_tasksize = sizeof(struct mtip_compat_ide_task_request_s); | |
2863 | ||
2864 | compat_req_task = | |
2865 | (struct mtip_compat_ide_task_request_s __user *) arg; | |
2866 | ||
2867 | if (copy_from_user(&req_task, (void __user *) arg, | |
2868 | compat_tasksize - (2 * sizeof(compat_long_t)))) | |
2869 | return -EFAULT; | |
2870 | ||
2871 | if (get_user(req_task.out_size, &compat_req_task->out_size)) | |
2872 | return -EFAULT; | |
2873 | ||
2874 | if (get_user(req_task.in_size, &compat_req_task->in_size)) | |
2875 | return -EFAULT; | |
2876 | ||
2877 | outtotal = sizeof(struct mtip_compat_ide_task_request_s); | |
2878 | ||
2879 | ret = exec_drive_taskfile(dd, (void __user *) arg, | |
2880 | &req_task, outtotal); | |
2881 | ||
2882 | if (copy_to_user((void __user *) arg, &req_task, | |
2883 | compat_tasksize - | |
2884 | (2 * sizeof(compat_long_t)))) | |
2885 | return -EFAULT; | |
2886 | ||
2887 | if (put_user(req_task.out_size, &compat_req_task->out_size)) | |
2888 | return -EFAULT; | |
2889 | ||
2890 | if (put_user(req_task.in_size, &compat_req_task->in_size)) | |
2891 | return -EFAULT; | |
2892 | ||
2893 | return ret; | |
2894 | } | |
88523a61 | 2895 | default: |
ef0f1587 | 2896 | return mtip_hw_ioctl(dd, cmd, arg); |
88523a61 SB |
2897 | } |
2898 | } | |
16d02c04 | 2899 | #endif |
88523a61 SB |
2900 | |
2901 | /* | |
2902 | * Obtain the geometry of the device. | |
2903 | * | |
2904 | * You may think that this function is obsolete, but some applications, | |
2905 | * fdisk for example still used CHS values. This function describes the | |
2906 | * device as having 224 heads and 56 sectors per cylinder. These values are | |
2907 | * chosen so that each cylinder is aligned on a 4KB boundary. Since a | |
2908 | * partition is described in terms of a start and end cylinder this means | |
2909 | * that each partition is also 4KB aligned. Non-aligned partitions adversely | |
2910 | * affects performance. | |
2911 | * | |
2912 | * @dev Pointer to the block_device strucutre. | |
2913 | * @geo Pointer to a hd_geometry structure. | |
2914 | * | |
2915 | * return value | |
2916 | * 0 Operation completed successfully. | |
2917 | * -ENOTTY An error occurred while reading the drive capacity. | |
2918 | */ | |
2919 | static int mtip_block_getgeo(struct block_device *dev, | |
2920 | struct hd_geometry *geo) | |
2921 | { | |
2922 | struct driver_data *dd = dev->bd_disk->private_data; | |
2923 | sector_t capacity; | |
2924 | ||
2925 | if (!dd) | |
2926 | return -ENOTTY; | |
2927 | ||
2928 | if (!(mtip_hw_get_capacity(dd, &capacity))) { | |
2929 | dev_warn(&dd->pdev->dev, | |
2930 | "Could not get drive capacity.\n"); | |
2931 | return -ENOTTY; | |
2932 | } | |
2933 | ||
2934 | geo->heads = 224; | |
2935 | geo->sectors = 56; | |
2936 | #if BITS_PER_LONG == 64 | |
2937 | geo->cylinders = capacity / (geo->heads * geo->sectors); | |
2938 | #else | |
2939 | do_div(capacity, (geo->heads * geo->sectors)); | |
2940 | geo->cylinders = capacity; | |
2941 | #endif | |
2942 | return 0; | |
2943 | } | |
2944 | ||
2945 | /* | |
2946 | * Block device operation function. | |
2947 | * | |
2948 | * This structure contains pointers to the functions required by the block | |
2949 | * layer. | |
2950 | */ | |
2951 | static const struct block_device_operations mtip_block_ops = { | |
2952 | .ioctl = mtip_block_ioctl, | |
16d02c04 | 2953 | #ifdef CONFIG_COMPAT |
88523a61 | 2954 | .compat_ioctl = mtip_block_compat_ioctl, |
16d02c04 | 2955 | #endif |
88523a61 SB |
2956 | .getgeo = mtip_block_getgeo, |
2957 | .owner = THIS_MODULE | |
2958 | }; | |
2959 | ||
2960 | /* | |
2961 | * Block layer make request function. | |
2962 | * | |
2963 | * This function is called by the kernel to process a BIO for | |
2964 | * the P320 device. | |
2965 | * | |
2966 | * @queue Pointer to the request queue. Unused other than to obtain | |
2967 | * the driver data structure. | |
2968 | * @bio Pointer to the BIO. | |
2969 | * | |
2970 | * return value | |
2971 | * 0 | |
2972 | */ | |
2973 | static int mtip_make_request(struct request_queue *queue, struct bio *bio) | |
2974 | { | |
2975 | struct driver_data *dd = queue->queuedata; | |
2976 | struct scatterlist *sg; | |
2977 | struct bio_vec *bvec; | |
2978 | int nents = 0; | |
2979 | int tag = 0; | |
2980 | ||
2981 | if (unlikely(!bio_has_data(bio))) { | |
2982 | blk_queue_flush(queue, 0); | |
2983 | bio_endio(bio, 0); | |
2984 | return 0; | |
2985 | } | |
2986 | ||
2987 | if (unlikely(atomic_read(&dd->eh_active))) { | |
2988 | bio_endio(bio, -EBUSY); | |
2989 | return 0; | |
2990 | } | |
2991 | ||
2992 | sg = mtip_hw_get_scatterlist(dd, &tag); | |
2993 | if (likely(sg != NULL)) { | |
2994 | blk_queue_bounce(queue, &bio); | |
2995 | ||
2996 | if (unlikely((bio)->bi_vcnt > MTIP_MAX_SG)) { | |
2997 | dev_warn(&dd->pdev->dev, | |
2998 | "Maximum number of SGL entries exceeded"); | |
2999 | bio_io_error(bio); | |
3000 | mtip_hw_release_scatterlist(dd, tag); | |
3001 | return 0; | |
3002 | } | |
3003 | ||
3004 | /* Create the scatter list for this bio. */ | |
3005 | bio_for_each_segment(bvec, bio, nents) { | |
3006 | sg_set_page(&sg[nents], | |
3007 | bvec->bv_page, | |
3008 | bvec->bv_len, | |
3009 | bvec->bv_offset); | |
3010 | } | |
3011 | ||
3012 | /* Issue the read/write. */ | |
3013 | mtip_hw_submit_io(dd, | |
3014 | bio->bi_sector, | |
3015 | bio_sectors(bio), | |
3016 | nents, | |
3017 | tag, | |
3018 | bio_endio, | |
3019 | bio, | |
3020 | bio->bi_rw & REQ_FLUSH, | |
3021 | bio_data_dir(bio)); | |
3022 | } else { | |
3023 | bio_io_error(bio); | |
3024 | } | |
3025 | ||
3026 | return 0; | |
3027 | } | |
3028 | ||
3029 | /* | |
3030 | * Block layer initialization function. | |
3031 | * | |
3032 | * This function is called once by the PCI layer for each P320 | |
3033 | * device that is connected to the system. | |
3034 | * | |
3035 | * @dd Pointer to the driver data structure. | |
3036 | * | |
3037 | * return value | |
3038 | * 0 on success else an error code. | |
3039 | */ | |
3040 | int mtip_block_initialize(struct driver_data *dd) | |
3041 | { | |
3042 | int rv = 0; | |
3043 | sector_t capacity; | |
3044 | unsigned int index = 0; | |
3045 | struct kobject *kobj; | |
3046 | ||
3047 | /* Initialize the protocol layer. */ | |
3048 | rv = mtip_hw_init(dd); | |
3049 | if (rv < 0) { | |
3050 | dev_err(&dd->pdev->dev, | |
3051 | "Protocol layer initialization failed\n"); | |
3052 | rv = -EINVAL; | |
3053 | goto protocol_init_error; | |
3054 | } | |
3055 | ||
3056 | /* Allocate the request queue. */ | |
3057 | dd->queue = blk_alloc_queue(GFP_KERNEL); | |
3058 | if (dd->queue == NULL) { | |
3059 | dev_err(&dd->pdev->dev, | |
3060 | "Unable to allocate request queue\n"); | |
3061 | rv = -ENOMEM; | |
3062 | goto block_queue_alloc_init_error; | |
3063 | } | |
3064 | ||
3065 | /* Attach our request function to the request queue. */ | |
3066 | blk_queue_make_request(dd->queue, mtip_make_request); | |
3067 | ||
3068 | /* Set device limits. */ | |
3069 | set_bit(QUEUE_FLAG_NONROT, &dd->queue->queue_flags); | |
3070 | blk_queue_max_segments(dd->queue, MTIP_MAX_SG); | |
3071 | blk_queue_physical_block_size(dd->queue, 4096); | |
3072 | blk_queue_io_min(dd->queue, 4096); | |
3073 | ||
3074 | dd->disk = alloc_disk(MTIP_MAX_MINORS); | |
3075 | if (dd->disk == NULL) { | |
3076 | dev_err(&dd->pdev->dev, | |
3077 | "Unable to allocate gendisk structure\n"); | |
3078 | rv = -EINVAL; | |
3079 | goto alloc_disk_error; | |
3080 | } | |
3081 | ||
3082 | /* Generate the disk name, implemented same as in sd.c */ | |
3083 | do { | |
3084 | if (!ida_pre_get(&rssd_index_ida, GFP_KERNEL)) | |
3085 | goto ida_get_error; | |
3086 | ||
3087 | spin_lock(&rssd_index_lock); | |
3088 | rv = ida_get_new(&rssd_index_ida, &index); | |
3089 | spin_unlock(&rssd_index_lock); | |
3090 | } while (rv == -EAGAIN); | |
3091 | ||
3092 | if (rv) | |
3093 | goto ida_get_error; | |
3094 | ||
3095 | rv = rssd_disk_name_format("rssd", | |
3096 | index, | |
3097 | dd->disk->disk_name, | |
3098 | DISK_NAME_LEN); | |
3099 | if (rv) | |
3100 | goto disk_index_error; | |
3101 | ||
3102 | dd->disk->driverfs_dev = &dd->pdev->dev; | |
3103 | dd->disk->major = dd->major; | |
3104 | dd->disk->first_minor = dd->instance * MTIP_MAX_MINORS; | |
3105 | dd->disk->fops = &mtip_block_ops; | |
3106 | dd->disk->queue = dd->queue; | |
3107 | dd->disk->private_data = dd; | |
3108 | dd->queue->queuedata = dd; | |
3109 | dd->index = index; | |
3110 | ||
3111 | /* Set the capacity of the device in 512 byte sectors. */ | |
3112 | if (!(mtip_hw_get_capacity(dd, &capacity))) { | |
3113 | dev_warn(&dd->pdev->dev, | |
3114 | "Could not read drive capacity\n"); | |
3115 | rv = -EIO; | |
3116 | goto read_capacity_error; | |
3117 | } | |
3118 | set_capacity(dd->disk, capacity); | |
3119 | ||
3120 | /* Enable the block device and add it to /dev */ | |
3121 | add_disk(dd->disk); | |
3122 | ||
3123 | /* | |
3124 | * Now that the disk is active, initialize any sysfs attributes | |
3125 | * managed by the protocol layer. | |
3126 | */ | |
3127 | kobj = kobject_get(&disk_to_dev(dd->disk)->kobj); | |
3128 | if (kobj) { | |
3129 | mtip_hw_sysfs_init(dd, kobj); | |
3130 | kobject_put(kobj); | |
3131 | } | |
3132 | ||
3133 | return rv; | |
3134 | ||
3135 | read_capacity_error: | |
3136 | /* | |
3137 | * Delete our gendisk structure. This also removes the device | |
3138 | * from /dev | |
3139 | */ | |
3140 | del_gendisk(dd->disk); | |
3141 | ||
3142 | disk_index_error: | |
3143 | spin_lock(&rssd_index_lock); | |
3144 | ida_remove(&rssd_index_ida, index); | |
3145 | spin_unlock(&rssd_index_lock); | |
3146 | ||
3147 | ida_get_error: | |
3148 | put_disk(dd->disk); | |
3149 | ||
3150 | alloc_disk_error: | |
3151 | blk_cleanup_queue(dd->queue); | |
3152 | ||
3153 | block_queue_alloc_init_error: | |
3154 | /* De-initialize the protocol layer. */ | |
3155 | mtip_hw_exit(dd); | |
3156 | ||
3157 | protocol_init_error: | |
3158 | return rv; | |
3159 | } | |
3160 | ||
3161 | /* | |
3162 | * Block layer deinitialization function. | |
3163 | * | |
3164 | * Called by the PCI layer as each P320 device is removed. | |
3165 | * | |
3166 | * @dd Pointer to the driver data structure. | |
3167 | * | |
3168 | * return value | |
3169 | * 0 | |
3170 | */ | |
3171 | int mtip_block_remove(struct driver_data *dd) | |
3172 | { | |
3173 | struct kobject *kobj; | |
3174 | /* Clean up the sysfs attributes managed by the protocol layer. */ | |
3175 | kobj = kobject_get(&disk_to_dev(dd->disk)->kobj); | |
3176 | if (kobj) { | |
3177 | mtip_hw_sysfs_exit(dd, kobj); | |
3178 | kobject_put(kobj); | |
3179 | } | |
3180 | ||
3181 | /* | |
3182 | * Delete our gendisk structure. This also removes the device | |
3183 | * from /dev | |
3184 | */ | |
3185 | del_gendisk(dd->disk); | |
3186 | blk_cleanup_queue(dd->queue); | |
3187 | dd->disk = NULL; | |
3188 | dd->queue = NULL; | |
3189 | ||
3190 | /* De-initialize the protocol layer. */ | |
3191 | mtip_hw_exit(dd); | |
3192 | ||
3193 | return 0; | |
3194 | } | |
3195 | ||
3196 | /* | |
3197 | * Function called by the PCI layer when just before the | |
3198 | * machine shuts down. | |
3199 | * | |
3200 | * If a protocol layer shutdown function is present it will be called | |
3201 | * by this function. | |
3202 | * | |
3203 | * @dd Pointer to the driver data structure. | |
3204 | * | |
3205 | * return value | |
3206 | * 0 | |
3207 | */ | |
3208 | int mtip_block_shutdown(struct driver_data *dd) | |
3209 | { | |
3210 | dev_info(&dd->pdev->dev, | |
3211 | "Shutting down %s ...\n", dd->disk->disk_name); | |
3212 | ||
3213 | /* Delete our gendisk structure, and cleanup the blk queue. */ | |
3214 | del_gendisk(dd->disk); | |
3215 | blk_cleanup_queue(dd->queue); | |
3216 | dd->disk = NULL; | |
3217 | dd->queue = NULL; | |
3218 | ||
3219 | mtip_hw_shutdown(dd); | |
3220 | return 0; | |
3221 | } | |
3222 | ||
3223 | int mtip_block_suspend(struct driver_data *dd) | |
3224 | { | |
3225 | dev_info(&dd->pdev->dev, | |
3226 | "Suspending %s ...\n", dd->disk->disk_name); | |
3227 | mtip_hw_suspend(dd); | |
3228 | return 0; | |
3229 | } | |
3230 | ||
3231 | int mtip_block_resume(struct driver_data *dd) | |
3232 | { | |
3233 | dev_info(&dd->pdev->dev, "Resuming %s ...\n", | |
3234 | dd->disk->disk_name); | |
3235 | mtip_hw_resume(dd); | |
3236 | return 0; | |
3237 | } | |
3238 | ||
3239 | /* | |
3240 | * Called for each supported PCI device detected. | |
3241 | * | |
3242 | * This function allocates the private data structure, enables the | |
3243 | * PCI device and then calls the block layer initialization function. | |
3244 | * | |
3245 | * return value | |
3246 | * 0 on success else an error code. | |
3247 | */ | |
3248 | static int mtip_pci_probe(struct pci_dev *pdev, | |
3249 | const struct pci_device_id *ent) | |
3250 | { | |
3251 | int rv = 0; | |
3252 | struct driver_data *dd = NULL; | |
3253 | ||
3254 | /* Allocate memory for this devices private data. */ | |
3255 | dd = kzalloc(sizeof(struct driver_data), GFP_KERNEL); | |
3256 | if (dd == NULL) { | |
3257 | dev_err(&pdev->dev, | |
3258 | "Unable to allocate memory for driver data\n"); | |
3259 | return -ENOMEM; | |
3260 | } | |
3261 | ||
3262 | /* Set the atomic variable as 1 in case of SRSI */ | |
3263 | atomic_set(&dd->drv_cleanup_done, true); | |
3264 | ||
3265 | atomic_set(&dd->resumeflag, false); | |
3266 | atomic_set(&dd->eh_active, 0); | |
3267 | ||
3268 | /* Attach the private data to this PCI device. */ | |
3269 | pci_set_drvdata(pdev, dd); | |
3270 | ||
3271 | rv = pcim_enable_device(pdev); | |
3272 | if (rv < 0) { | |
3273 | dev_err(&pdev->dev, "Unable to enable device\n"); | |
3274 | goto iomap_err; | |
3275 | } | |
3276 | ||
3277 | /* Map BAR5 to memory. */ | |
3278 | rv = pcim_iomap_regions(pdev, 1 << MTIP_ABAR, MTIP_DRV_NAME); | |
3279 | if (rv < 0) { | |
3280 | dev_err(&pdev->dev, "Unable to map regions\n"); | |
3281 | goto iomap_err; | |
3282 | } | |
3283 | ||
3284 | if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(64))) { | |
3285 | rv = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64)); | |
3286 | ||
3287 | if (rv) { | |
3288 | rv = pci_set_consistent_dma_mask(pdev, | |
3289 | DMA_BIT_MASK(32)); | |
3290 | if (rv) { | |
3291 | dev_warn(&pdev->dev, | |
3292 | "64-bit DMA enable failed\n"); | |
3293 | goto setmask_err; | |
3294 | } | |
3295 | } | |
3296 | } | |
3297 | ||
3298 | pci_set_master(pdev); | |
3299 | ||
3300 | if (pci_enable_msi(pdev)) { | |
3301 | dev_warn(&pdev->dev, | |
3302 | "Unable to enable MSI interrupt.\n"); | |
3303 | goto block_initialize_err; | |
3304 | } | |
3305 | ||
3306 | /* Copy the info we may need later into the private data structure. */ | |
3307 | dd->major = mtip_major; | |
3308 | dd->protocol = ent->driver_data; | |
3309 | dd->instance = instance; | |
3310 | dd->pdev = pdev; | |
3311 | ||
3312 | /* Initialize the block layer. */ | |
3313 | rv = mtip_block_initialize(dd); | |
3314 | if (rv < 0) { | |
3315 | dev_err(&pdev->dev, | |
3316 | "Unable to initialize block layer\n"); | |
3317 | goto block_initialize_err; | |
3318 | } | |
3319 | ||
3320 | /* | |
3321 | * Increment the instance count so that each device has a unique | |
3322 | * instance number. | |
3323 | */ | |
3324 | instance++; | |
3325 | ||
3326 | goto done; | |
3327 | ||
3328 | block_initialize_err: | |
3329 | pci_disable_msi(pdev); | |
3330 | ||
3331 | setmask_err: | |
3332 | pcim_iounmap_regions(pdev, 1 << MTIP_ABAR); | |
3333 | ||
3334 | iomap_err: | |
3335 | kfree(dd); | |
3336 | pci_set_drvdata(pdev, NULL); | |
3337 | return rv; | |
3338 | done: | |
3339 | /* Set the atomic variable as 0 in case of SRSI */ | |
3340 | atomic_set(&dd->drv_cleanup_done, true); | |
3341 | ||
3342 | return rv; | |
3343 | } | |
3344 | ||
3345 | /* | |
3346 | * Called for each probed device when the device is removed or the | |
3347 | * driver is unloaded. | |
3348 | * | |
3349 | * return value | |
3350 | * None | |
3351 | */ | |
3352 | static void mtip_pci_remove(struct pci_dev *pdev) | |
3353 | { | |
3354 | struct driver_data *dd = pci_get_drvdata(pdev); | |
3355 | int counter = 0; | |
3356 | ||
3357 | if (mtip_check_surprise_removal(pdev)) { | |
3358 | while (atomic_read(&dd->drv_cleanup_done) == false) { | |
3359 | counter++; | |
3360 | msleep(20); | |
3361 | if (counter == 10) { | |
3362 | /* Cleanup the outstanding commands */ | |
3363 | mtip_command_cleanup(dd); | |
3364 | break; | |
3365 | } | |
3366 | } | |
3367 | } | |
3368 | /* Set the atomic variable as 1 in case of SRSI */ | |
3369 | atomic_set(&dd->drv_cleanup_done, true); | |
3370 | ||
3371 | /* Clean up the block layer. */ | |
3372 | mtip_block_remove(dd); | |
3373 | ||
3374 | pci_disable_msi(pdev); | |
3375 | ||
3376 | kfree(dd); | |
3377 | pcim_iounmap_regions(pdev, 1 << MTIP_ABAR); | |
3378 | } | |
3379 | ||
3380 | /* | |
3381 | * Called for each probed device when the device is suspended. | |
3382 | * | |
3383 | * return value | |
3384 | * 0 Success | |
3385 | * <0 Error | |
3386 | */ | |
3387 | static int mtip_pci_suspend(struct pci_dev *pdev, pm_message_t mesg) | |
3388 | { | |
3389 | int rv = 0; | |
3390 | struct driver_data *dd = pci_get_drvdata(pdev); | |
3391 | ||
3392 | if (!dd) { | |
3393 | dev_err(&pdev->dev, | |
3394 | "Driver private datastructure is NULL\n"); | |
3395 | return -EFAULT; | |
3396 | } | |
3397 | ||
3398 | atomic_set(&dd->resumeflag, true); | |
3399 | ||
3400 | /* Disable ports & interrupts then send standby immediate */ | |
3401 | rv = mtip_block_suspend(dd); | |
3402 | if (rv < 0) { | |
3403 | dev_err(&pdev->dev, | |
3404 | "Failed to suspend controller\n"); | |
3405 | return rv; | |
3406 | } | |
3407 | ||
3408 | /* | |
3409 | * Save the pci config space to pdev structure & | |
3410 | * disable the device | |
3411 | */ | |
3412 | pci_save_state(pdev); | |
3413 | pci_disable_device(pdev); | |
3414 | ||
3415 | /* Move to Low power state*/ | |
3416 | pci_set_power_state(pdev, PCI_D3hot); | |
3417 | ||
3418 | return rv; | |
3419 | } | |
3420 | ||
3421 | /* | |
3422 | * Called for each probed device when the device is resumed. | |
3423 | * | |
3424 | * return value | |
3425 | * 0 Success | |
3426 | * <0 Error | |
3427 | */ | |
3428 | static int mtip_pci_resume(struct pci_dev *pdev) | |
3429 | { | |
3430 | int rv = 0; | |
3431 | struct driver_data *dd; | |
3432 | ||
3433 | dd = pci_get_drvdata(pdev); | |
3434 | if (!dd) { | |
3435 | dev_err(&pdev->dev, | |
3436 | "Driver private datastructure is NULL\n"); | |
3437 | return -EFAULT; | |
3438 | } | |
3439 | ||
3440 | /* Move the device to active State */ | |
3441 | pci_set_power_state(pdev, PCI_D0); | |
3442 | ||
3443 | /* Restore PCI configuration space */ | |
3444 | pci_restore_state(pdev); | |
3445 | ||
3446 | /* Enable the PCI device*/ | |
3447 | rv = pcim_enable_device(pdev); | |
3448 | if (rv < 0) { | |
3449 | dev_err(&pdev->dev, | |
3450 | "Failed to enable card during resume\n"); | |
3451 | goto err; | |
3452 | } | |
3453 | pci_set_master(pdev); | |
3454 | ||
3455 | /* | |
3456 | * Calls hbaReset, initPort, & startPort function | |
3457 | * then enables interrupts | |
3458 | */ | |
3459 | rv = mtip_block_resume(dd); | |
3460 | if (rv < 0) | |
3461 | dev_err(&pdev->dev, "Unable to resume\n"); | |
3462 | ||
3463 | err: | |
3464 | atomic_set(&dd->resumeflag, false); | |
3465 | ||
3466 | return rv; | |
3467 | } | |
3468 | ||
3469 | /* | |
3470 | * Shutdown routine | |
3471 | * | |
3472 | * return value | |
3473 | * None | |
3474 | */ | |
3475 | static void mtip_pci_shutdown(struct pci_dev *pdev) | |
3476 | { | |
3477 | struct driver_data *dd = pci_get_drvdata(pdev); | |
3478 | if (dd) | |
3479 | mtip_block_shutdown(dd); | |
3480 | } | |
3481 | ||
3482 | /* | |
3483 | * This function check_for_surprise_removal is called | |
3484 | * while card is removed from the system and it will | |
3485 | * read the vendor id from the configration space | |
3486 | * | |
3487 | * @pdev Pointer to the pci_dev structure. | |
3488 | * | |
3489 | * return value | |
3490 | * true if device removed, else false | |
3491 | */ | |
3492 | bool mtip_check_surprise_removal(struct pci_dev *pdev) | |
3493 | { | |
3494 | u16 vendor_id = 0; | |
3495 | ||
3496 | /* Read the vendorID from the configuration space */ | |
3497 | pci_read_config_word(pdev, 0x00, &vendor_id); | |
3498 | if (vendor_id == 0xFFFF) | |
3499 | return true; /* device removed */ | |
3500 | ||
3501 | return false; /* device present */ | |
3502 | } | |
3503 | ||
3504 | /* Table of device ids supported by this driver. */ | |
3505 | static DEFINE_PCI_DEVICE_TABLE(mtip_pci_tbl) = { | |
3506 | { PCI_DEVICE(PCI_VENDOR_ID_MICRON, P320_DEVICE_ID) }, | |
3507 | { 0 } | |
3508 | }; | |
3509 | ||
3510 | /* Structure that describes the PCI driver functions. */ | |
3511 | struct pci_driver mtip_pci_driver = { | |
3512 | .name = MTIP_DRV_NAME, | |
3513 | .id_table = mtip_pci_tbl, | |
3514 | .probe = mtip_pci_probe, | |
3515 | .remove = mtip_pci_remove, | |
3516 | .suspend = mtip_pci_suspend, | |
3517 | .resume = mtip_pci_resume, | |
3518 | .shutdown = mtip_pci_shutdown, | |
3519 | }; | |
3520 | ||
3521 | MODULE_DEVICE_TABLE(pci, mtip_pci_tbl); | |
3522 | ||
3523 | /* | |
3524 | * Module initialization function. | |
3525 | * | |
3526 | * Called once when the module is loaded. This function allocates a major | |
3527 | * block device number to the Cyclone devices and registers the PCI layer | |
3528 | * of the driver. | |
3529 | * | |
3530 | * Return value | |
3531 | * 0 on success else error code. | |
3532 | */ | |
3533 | static int __init mtip_init(void) | |
3534 | { | |
3535 | printk(KERN_INFO MTIP_DRV_NAME " Version " MTIP_DRV_VERSION "\n"); | |
3536 | ||
3537 | /* Allocate a major block device number to use with this driver. */ | |
3538 | mtip_major = register_blkdev(0, MTIP_DRV_NAME); | |
3539 | if (mtip_major < 0) { | |
3540 | printk(KERN_ERR "Unable to register block device (%d)\n", | |
3541 | mtip_major); | |
3542 | return -EBUSY; | |
3543 | } | |
3544 | ||
3545 | /* Register our PCI operations. */ | |
3546 | return pci_register_driver(&mtip_pci_driver); | |
3547 | } | |
3548 | ||
3549 | /* | |
3550 | * Module de-initialization function. | |
3551 | * | |
3552 | * Called once when the module is unloaded. This function deallocates | |
3553 | * the major block device number allocated by mtip_init() and | |
3554 | * unregisters the PCI layer of the driver. | |
3555 | * | |
3556 | * Return value | |
3557 | * none | |
3558 | */ | |
3559 | static void __exit mtip_exit(void) | |
3560 | { | |
3561 | /* Release the allocated major block device number. */ | |
3562 | unregister_blkdev(mtip_major, MTIP_DRV_NAME); | |
3563 | ||
3564 | /* Unregister the PCI driver. */ | |
3565 | pci_unregister_driver(&mtip_pci_driver); | |
3566 | } | |
3567 | ||
3568 | MODULE_AUTHOR("Micron Technology, Inc"); | |
3569 | MODULE_DESCRIPTION("Micron RealSSD PCIe Block Driver"); | |
3570 | MODULE_LICENSE("GPL"); | |
3571 | MODULE_VERSION(MTIP_DRV_VERSION); | |
3572 | ||
3573 | module_init(mtip_init); | |
3574 | module_exit(mtip_exit); |