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skd: Remove several local variables
[mirror_ubuntu-bionic-kernel.git] / drivers / block / skd_main.c
CommitLineData
bec9e8ac
BVA		 1/*
2 * Driver for sTec s1120 PCIe SSDs. sTec was acquired in 2013 by HGST and HGST
3 * was acquired by Western Digital in 2012.
e67f86b3 4 *
bec9e8ac
BVA		 5 * Copyright 2012 sTec, Inc.
6 * Copyright (c) 2017 Western Digital Corporation or its affiliates.
7 *
8 * This file is part of the Linux kernel, and is made available under
9 * the terms of the GNU General Public License version 2.
e67f86b3
AB		 10 */
11
12#include <linux/kernel.h>
13#include <linux/module.h>
14#include <linux/init.h>
15#include <linux/pci.h>
16#include <linux/slab.h>
17#include <linux/spinlock.h>
18#include <linux/blkdev.h>
f18c17c8 19#include <linux/blk-mq.h>
e67f86b3
AB		 20#include <linux/sched.h>
21#include <linux/interrupt.h>
22#include <linux/compiler.h>
23#include <linux/workqueue.h>
e67f86b3
AB		 24#include <linux/delay.h>
25#include <linux/time.h>
26#include <linux/hdreg.h>
27#include <linux/dma-mapping.h>
28#include <linux/completion.h>
29#include <linux/scatterlist.h>
30#include <linux/version.h>
31#include <linux/err.h>
e67f86b3 32#include <linux/aer.h>
e67f86b3 33#include <linux/wait.h>
2da7b403 34#include <linux/stringify.h>
a3db102d 35#include <linux/slab_def.h>
e67f86b3 36#include <scsi/scsi.h>
e67f86b3
AB		 37#include <scsi/sg.h>
38#include <linux/io.h>
39#include <linux/uaccess.h>
4ca90b53 40#include <asm/unaligned.h>
e67f86b3
AB		 41
42#include "skd_s1120.h"
43
44static int skd_dbg_level;
45static int skd_isr_comp_limit = 4;
46
e67f86b3
AB		 47#define SKD_ASSERT(expr) \
48 do { \
49 if (unlikely(!(expr))) { \
50 pr_err("Assertion failed! %s,%s,%s,line=%d\n", \
51 # expr, __FILE__, __func__, __LINE__); \
52 } \
53 } while (0)
54
e67f86b3
AB		 55#define DRV_NAME "skd"
56#define DRV_VERSION "2.2.1"
57#define DRV_BUILD_ID "0260"
58#define PFX DRV_NAME ": "
e67f86b3 59
bec9e8ac 60MODULE_LICENSE("GPL");
e67f86b3 61
38d4a1bb 62MODULE_DESCRIPTION("STEC s1120 PCIe SSD block driver (b" DRV_BUILD_ID ")");
e67f86b3
AB		 63MODULE_VERSION(DRV_VERSION "-" DRV_BUILD_ID);
64
65#define PCI_VENDOR_ID_STEC 0x1B39
66#define PCI_DEVICE_ID_S1120 0x0001
67
68#define SKD_FUA_NV (1 << 1)
69#define SKD_MINORS_PER_DEVICE 16
70
71#define SKD_MAX_QUEUE_DEPTH 200u
72
73#define SKD_PAUSE_TIMEOUT (5 * 1000)
74
75#define SKD_N_FITMSG_BYTES (512u)
2da7b403 76#define SKD_MAX_REQ_PER_MSG 14
e67f86b3 77
e67f86b3
AB		 78#define SKD_N_SPECIAL_FITMSG_BYTES (128u)
79
80/* SG elements are 32 bytes, so we can make this 4096 and still be under the
81 * 128KB limit. That allows 4096*4K = 16M xfer size
82 */
83#define SKD_N_SG_PER_REQ_DEFAULT 256u
e67f86b3
AB		 84
85#define SKD_N_COMPLETION_ENTRY 256u
86#define SKD_N_READ_CAP_BYTES (8u)
87
88#define SKD_N_INTERNAL_BYTES (512u)
89
6f7c7675
BVA		 90#define SKD_SKCOMP_SIZE \
91 ((sizeof(struct fit_completion_entry_v1) + \
92 sizeof(struct fit_comp_error_info)) * SKD_N_COMPLETION_ENTRY)
93
e67f86b3
AB		 94/* 5 bits of uniqifier, 0xF800 */
95#define SKD_ID_INCR (0x400)
96#define SKD_ID_TABLE_MASK (3u << 8u)
97#define SKD_ID_RW_REQUEST (0u << 8u)
98#define SKD_ID_INTERNAL (1u << 8u)
e67f86b3
AB		 99#define SKD_ID_FIT_MSG (3u << 8u)
100#define SKD_ID_SLOT_MASK 0x00FFu
101#define SKD_ID_SLOT_AND_TABLE_MASK 0x03FFu
102
e67f86b3
AB		 103#define SKD_N_MAX_SECTORS 2048u
104
105#define SKD_MAX_RETRIES 2u
106
107#define SKD_TIMER_SECONDS(seconds) (seconds)
108#define SKD_TIMER_MINUTES(minutes) ((minutes) * (60))
109
110#define INQ_STD_NBYTES 36
e67f86b3
AB		 111
112enum skd_drvr_state {
113 SKD_DRVR_STATE_LOAD,
114 SKD_DRVR_STATE_IDLE,
115 SKD_DRVR_STATE_BUSY,
116 SKD_DRVR_STATE_STARTING,
117 SKD_DRVR_STATE_ONLINE,
118 SKD_DRVR_STATE_PAUSING,
119 SKD_DRVR_STATE_PAUSED,
e67f86b3
AB		 120 SKD_DRVR_STATE_RESTARTING,
121 SKD_DRVR_STATE_RESUMING,
122 SKD_DRVR_STATE_STOPPING,
123 SKD_DRVR_STATE_FAULT,
124 SKD_DRVR_STATE_DISAPPEARED,
125 SKD_DRVR_STATE_PROTOCOL_MISMATCH,
126 SKD_DRVR_STATE_BUSY_ERASE,
127 SKD_DRVR_STATE_BUSY_SANITIZE,
128 SKD_DRVR_STATE_BUSY_IMMINENT,
129 SKD_DRVR_STATE_WAIT_BOOT,
130 SKD_DRVR_STATE_SYNCING,
131};
132
133#define SKD_WAIT_BOOT_TIMO SKD_TIMER_SECONDS(90u)
134#define SKD_STARTING_TIMO SKD_TIMER_SECONDS(8u)
135#define SKD_RESTARTING_TIMO SKD_TIMER_MINUTES(4u)
e67f86b3
AB		 136#define SKD_BUSY_TIMO SKD_TIMER_MINUTES(20u)
137#define SKD_STARTED_BUSY_TIMO SKD_TIMER_SECONDS(60u)
138#define SKD_START_WAIT_SECONDS 90u
139
140enum skd_req_state {
141 SKD_REQ_STATE_IDLE,
142 SKD_REQ_STATE_SETUP,
143 SKD_REQ_STATE_BUSY,
144 SKD_REQ_STATE_COMPLETED,
145 SKD_REQ_STATE_TIMEOUT,
e67f86b3
AB		 146};
147
e67f86b3
AB		 148enum skd_check_status_action {
149 SKD_CHECK_STATUS_REPORT_GOOD,
150 SKD_CHECK_STATUS_REPORT_SMART_ALERT,
151 SKD_CHECK_STATUS_REQUEUE_REQUEST,
152 SKD_CHECK_STATUS_REPORT_ERROR,
153 SKD_CHECK_STATUS_BUSY_IMMINENT,
154};
155
d891fe60
BVA		 156struct skd_msg_buf {
157 struct fit_msg_hdr fmh;
158 struct skd_scsi_request scsi[SKD_MAX_REQ_PER_MSG];
159};
160
e67f86b3 161struct skd_fitmsg_context {
e67f86b3 162 u32 id;
e67f86b3
AB		 163
164 u32 length;
e67f86b3 165
d891fe60 166 struct skd_msg_buf *msg_buf;
e67f86b3
AB		 167 dma_addr_t mb_dma_address;
168};
169
170struct skd_request_context {
171 enum skd_req_state state;
172
e67f86b3
AB		 173 u16 id;
174 u32 fitmsg_id;
175
e67f86b3 176 u8 flush_cmd;
e67f86b3 177
b1824eef 178 enum dma_data_direction data_dir;
e67f86b3
AB		 179 struct scatterlist *sg;
180 u32 n_sg;
181 u32 sg_byte_count;
182
183 struct fit_sg_descriptor *sksg_list;
184 dma_addr_t sksg_dma_address;
185
186 struct fit_completion_entry_v1 completion;
187
188 struct fit_comp_error_info err_info;
189
190};
e67f86b3
AB		 191
192struct skd_special_context {
193 struct skd_request_context req;
194
e67f86b3
AB		 195 void *data_buf;
196 dma_addr_t db_dma_address;
197
d891fe60 198 struct skd_msg_buf *msg_buf;
e67f86b3
AB		 199 dma_addr_t mb_dma_address;
200};
201
e67f86b3
AB		 202typedef enum skd_irq_type {
203 SKD_IRQ_LEGACY,
204 SKD_IRQ_MSI,
205 SKD_IRQ_MSIX
206} skd_irq_type_t;
207
208#define SKD_MAX_BARS 2
209
210struct skd_device {
85e34112 211 void __iomem *mem_map[SKD_MAX_BARS];
e67f86b3
AB		 212 resource_size_t mem_phys[SKD_MAX_BARS];
213 u32 mem_size[SKD_MAX_BARS];
214
e67f86b3
AB		 215 struct skd_msix_entry *msix_entries;
216
217 struct pci_dev *pdev;
218 int pcie_error_reporting_is_enabled;
219
220 spinlock_t lock;
221 struct gendisk *disk;
ca33dd92 222 struct blk_mq_tag_set tag_set;
e67f86b3 223 struct request_queue *queue;
91f85da4 224 struct skd_fitmsg_context *skmsg;
e67f86b3
AB		 225 struct device *class_dev;
226 int gendisk_on;
227 int sync_done;
228
e67f86b3
AB		 229 u32 devno;
230 u32 major;
e67f86b3
AB		 231 char isr_name[30];
232
233 enum skd_drvr_state state;
234 u32 drive_state;
235
e67f86b3
AB		 236 u32 cur_max_queue_depth;
237 u32 queue_low_water_mark;
238 u32 dev_max_queue_depth;
239
240 u32 num_fitmsg_context;
241 u32 num_req_context;
242
e67f86b3
AB		 243 struct skd_fitmsg_context *skmsg_table;
244
e67f86b3
AB		 245 struct skd_special_context internal_skspcl;
246 u32 read_cap_blocksize;
247 u32 read_cap_last_lba;
248 int read_cap_is_valid;
249 int inquiry_is_valid;
250 u8 inq_serial_num[13]; /*12 chars plus null term */
e67f86b3
AB		 251
252 u8 skcomp_cycle;
253 u32 skcomp_ix;
a3db102d
BVA		 254 struct kmem_cache *msgbuf_cache;
255 struct kmem_cache *sglist_cache;
256 struct kmem_cache *databuf_cache;
e67f86b3
AB		 257 struct fit_completion_entry_v1 *skcomp_table;
258 struct fit_comp_error_info *skerr_table;
259 dma_addr_t cq_dma_address;
260
261 wait_queue_head_t waitq;
262
263 struct timer_list timer;
264 u32 timer_countdown;
265 u32 timer_substate;
266
e67f86b3
AB		 267 int sgs_per_request;
268 u32 last_mtd;
269
270 u32 proto_ver;
271
272 int dbg_level;
273 u32 connect_time_stamp;
274 int connect_retries;
275#define SKD_MAX_CONNECT_RETRIES 16
276 u32 drive_jiffies;
277
278 u32 timo_slot;
279
ca33dd92 280 struct work_struct start_queue;
38d4a1bb 281 struct work_struct completion_worker;
e67f86b3
AB		 282};
283
284#define SKD_WRITEL(DEV, VAL, OFF) skd_reg_write32(DEV, VAL, OFF)
285#define SKD_READL(DEV, OFF) skd_reg_read32(DEV, OFF)
286#define SKD_WRITEQ(DEV, VAL, OFF) skd_reg_write64(DEV, VAL, OFF)
287
288static inline u32 skd_reg_read32(struct skd_device *skdev, u32 offset)
289{
14262a4b 290 u32 val = readl(skdev->mem_map[1] + offset);
e67f86b3 291
14262a4b 292 if (unlikely(skdev->dbg_level >= 2))
f98806d6 293 dev_dbg(&skdev->pdev->dev, "offset %x = %x\n", offset, val);
14262a4b 294 return val;
e67f86b3
AB		 295}
296
297static inline void skd_reg_write32(struct skd_device *skdev, u32 val,
298 u32 offset)
299{
14262a4b
BVA		 300 writel(val, skdev->mem_map[1] + offset);
301 if (unlikely(skdev->dbg_level >= 2))
f98806d6 302 dev_dbg(&skdev->pdev->dev, "offset %x = %x\n", offset, val);
e67f86b3
AB		 303}
304
305static inline void skd_reg_write64(struct skd_device *skdev, u64 val,
306 u32 offset)
307{
14262a4b
BVA		 308 writeq(val, skdev->mem_map[1] + offset);
309 if (unlikely(skdev->dbg_level >= 2))
f98806d6
BVA		 310 dev_dbg(&skdev->pdev->dev, "offset %x = %016llx\n", offset,
311 val);
e67f86b3
AB		 312}
313
314
315#define SKD_IRQ_DEFAULT SKD_IRQ_MSI
316static int skd_isr_type = SKD_IRQ_DEFAULT;
317
318module_param(skd_isr_type, int, 0444);
319MODULE_PARM_DESC(skd_isr_type, "Interrupt type capability."
320 " (0==legacy, 1==MSI, 2==MSI-X, default==1)");
321
322#define SKD_MAX_REQ_PER_MSG_DEFAULT 1
323static int skd_max_req_per_msg = SKD_MAX_REQ_PER_MSG_DEFAULT;
324
325module_param(skd_max_req_per_msg, int, 0444);
326MODULE_PARM_DESC(skd_max_req_per_msg,
327 "Maximum SCSI requests packed in a single message."
2da7b403 328 " (1-" __stringify(SKD_MAX_REQ_PER_MSG) ", default==1)");
e67f86b3
AB		 329
330#define SKD_MAX_QUEUE_DEPTH_DEFAULT 64
331#define SKD_MAX_QUEUE_DEPTH_DEFAULT_STR "64"
332static int skd_max_queue_depth = SKD_MAX_QUEUE_DEPTH_DEFAULT;
333
334module_param(skd_max_queue_depth, int, 0444);
335MODULE_PARM_DESC(skd_max_queue_depth,
336 "Maximum SCSI requests issued to s1120."
337 " (1-200, default==" SKD_MAX_QUEUE_DEPTH_DEFAULT_STR ")");
338
339static int skd_sgs_per_request = SKD_N_SG_PER_REQ_DEFAULT;
340module_param(skd_sgs_per_request, int, 0444);
341MODULE_PARM_DESC(skd_sgs_per_request,
342 "Maximum SG elements per block request."
343 " (1-4096, default==256)");
344
63214121 345static int skd_max_pass_thru = 1;
e67f86b3
AB		 346module_param(skd_max_pass_thru, int, 0444);
347MODULE_PARM_DESC(skd_max_pass_thru,
63214121 348 "Maximum SCSI pass-thru at a time. IGNORED");
e67f86b3
AB		 349
350module_param(skd_dbg_level, int, 0444);
351MODULE_PARM_DESC(skd_dbg_level, "s1120 debug level (0,1,2)");
352
353module_param(skd_isr_comp_limit, int, 0444);
354MODULE_PARM_DESC(skd_isr_comp_limit, "s1120 isr comp limit (0=none) default=4");
355
e67f86b3
AB		 356/* Major device number dynamically assigned. */
357static u32 skd_major;
358
e67f86b3
AB		 359static void skd_destruct(struct skd_device *skdev);
360static const struct block_device_operations skd_blockdev_ops;
361static void skd_send_fitmsg(struct skd_device *skdev,
362 struct skd_fitmsg_context *skmsg);
363static void skd_send_special_fitmsg(struct skd_device *skdev,
364 struct skd_special_context *skspcl);
f18c17c8
BVA		 365static void skd_end_request(struct skd_device *skdev, struct request *req,
366 blk_status_t status);
2a842aca 367static bool skd_preop_sg_list(struct skd_device *skdev,
e67f86b3
AB		 368 struct skd_request_context *skreq);
369static void skd_postop_sg_list(struct skd_device *skdev,
370 struct skd_request_context *skreq);
371
372static void skd_restart_device(struct skd_device *skdev);
373static int skd_quiesce_dev(struct skd_device *skdev);
374static int skd_unquiesce_dev(struct skd_device *skdev);
e67f86b3
AB		 375static void skd_disable_interrupts(struct skd_device *skdev);
376static void skd_isr_fwstate(struct skd_device *skdev);
79ce12a8 377static void skd_recover_requests(struct skd_device *skdev);
e67f86b3
AB		 378static void skd_soft_reset(struct skd_device *skdev);
379
e67f86b3
AB		 380const char *skd_drive_state_to_str(int state);
381const char *skd_skdev_state_to_str(enum skd_drvr_state state);
382static void skd_log_skdev(struct skd_device *skdev, const char *event);
e67f86b3
AB		 383static void skd_log_skreq(struct skd_device *skdev,
384 struct skd_request_context *skreq, const char *event);
385
e67f86b3
AB		 386/*
387 *****************************************************************************
388 * READ/WRITE REQUESTS
389 *****************************************************************************
390 */
d4d0f5fc
BVA		 391static void skd_inc_in_flight(struct request *rq, void *data, bool reserved)
392{
393 int *count = data;
394
395 count++;
396}
397
398static int skd_in_flight(struct skd_device *skdev)
399{
400 int count = 0;
401
402 blk_mq_tagset_busy_iter(&skdev->tag_set, skd_inc_in_flight, &count);
403
404 return count;
405}
406
e67f86b3
AB		 407static void
408skd_prep_rw_cdb(struct skd_scsi_request *scsi_req,
409 int data_dir, unsigned lba,
410 unsigned count)
411{
412 if (data_dir == READ)
fb4844b8 413 scsi_req->cdb[0] = READ_10;
e67f86b3 414 else
fb4844b8 415 scsi_req->cdb[0] = WRITE_10;
e67f86b3
AB		 416
417 scsi_req->cdb[1] = 0;
418 scsi_req->cdb[2] = (lba & 0xff000000) >> 24;
419 scsi_req->cdb[3] = (lba & 0xff0000) >> 16;
420 scsi_req->cdb[4] = (lba & 0xff00) >> 8;
421 scsi_req->cdb[5] = (lba & 0xff);
422 scsi_req->cdb[6] = 0;
423 scsi_req->cdb[7] = (count & 0xff00) >> 8;
424 scsi_req->cdb[8] = count & 0xff;
425 scsi_req->cdb[9] = 0;
426}
427
428static void
429skd_prep_zerosize_flush_cdb(struct skd_scsi_request *scsi_req,
38d4a1bb 430 struct skd_request_context *skreq)
e67f86b3
AB		 431{
432 skreq->flush_cmd = 1;
433
fb4844b8 434 scsi_req->cdb[0] = SYNCHRONIZE_CACHE;
e67f86b3
AB		 435 scsi_req->cdb[1] = 0;
436 scsi_req->cdb[2] = 0;
437 scsi_req->cdb[3] = 0;
438 scsi_req->cdb[4] = 0;
439 scsi_req->cdb[5] = 0;
440 scsi_req->cdb[6] = 0;
441 scsi_req->cdb[7] = 0;
442 scsi_req->cdb[8] = 0;
443 scsi_req->cdb[9] = 0;
444}
445
3d17a679
BVA		 446/*
447 * Return true if and only if all pending requests should be failed.
448 */
449static bool skd_fail_all(struct request_queue *q)
cb6981b9
BVA		 450{
451 struct skd_device *skdev = q->queuedata;
452
453 SKD_ASSERT(skdev->state != SKD_DRVR_STATE_ONLINE);
454
455 skd_log_skdev(skdev, "req_not_online");
456 switch (skdev->state) {
457 case SKD_DRVR_STATE_PAUSING:
458 case SKD_DRVR_STATE_PAUSED:
459 case SKD_DRVR_STATE_STARTING:
460 case SKD_DRVR_STATE_RESTARTING:
461 case SKD_DRVR_STATE_WAIT_BOOT:
462 /* In case of starting, we haven't started the queue,
463 * so we can't get here... but requests are
464 * possibly hanging out waiting for us because we
465 * reported the dev/skd0 already. They'll wait
466 * forever if connect doesn't complete.
467 * What to do??? delay dev/skd0 ??
468 */
469 case SKD_DRVR_STATE_BUSY:
470 case SKD_DRVR_STATE_BUSY_IMMINENT:
471 case SKD_DRVR_STATE_BUSY_ERASE:
3d17a679 472 return false;
cb6981b9
BVA		 473
474 case SKD_DRVR_STATE_BUSY_SANITIZE:
475 case SKD_DRVR_STATE_STOPPING:
476 case SKD_DRVR_STATE_SYNCING:
477 case SKD_DRVR_STATE_FAULT:
478 case SKD_DRVR_STATE_DISAPPEARED:
479 default:
3d17a679 480 return true;
cb6981b9 481 }
cb6981b9 482}
e67f86b3 483
ca33dd92 484static void skd_process_request(struct request *req, bool last)
e67f86b3 485{
91f85da4 486 struct request_queue *const q = req->q;
e67f86b3 487 struct skd_device *skdev = q->queuedata;
91f85da4
BVA		 488 struct skd_fitmsg_context *skmsg;
489 struct fit_msg_hdr *fmh;
490 const u32 tag = blk_mq_unique_tag(req);
e7278a8b 491 struct skd_request_context *const skreq = blk_mq_rq_to_pdu(req);
e67f86b3 492 struct skd_scsi_request *scsi_req;
ca33dd92 493 unsigned long flags;
e2bb5548
BVA		 494 const u32 lba = blk_rq_pos(req);
495 const u32 count = blk_rq_sectors(req);
496 const int data_dir = rq_data_dir(req);
91f85da4
BVA		 497
498 WARN_ONCE(tag >= skd_max_queue_depth, "%#x > %#x (nr_requests = %lu)\n",
499 tag, skd_max_queue_depth, q->nr_requests);
500
501 SKD_ASSERT(skreq->state == SKD_REQ_STATE_IDLE);
502
91f85da4
BVA		 503 dev_dbg(&skdev->pdev->dev,
504 "new req=%p lba=%u(0x%x) count=%u(0x%x) dir=%d\n", req, lba,
505 lba, count, count, data_dir);
506
507 skreq->id = tag + SKD_ID_RW_REQUEST;
508 skreq->flush_cmd = 0;
509 skreq->n_sg = 0;
510 skreq->sg_byte_count = 0;
511
91f85da4
BVA		 512 skreq->fitmsg_id = 0;
513
514 skreq->data_dir = data_dir == READ ? DMA_FROM_DEVICE : DMA_TO_DEVICE;
515
516 if (req->bio && !skd_preop_sg_list(skdev, skreq)) {
517 dev_dbg(&skdev->pdev->dev, "error Out\n");
e7278a8b
BVA		 518 skd_end_request(skdev, blk_mq_rq_from_pdu(skreq),
519 BLK_STS_RESOURCE);
91f85da4
BVA		 520 return;
521 }
522
a3db102d
BVA		 523 dma_sync_single_for_device(&skdev->pdev->dev, skreq->sksg_dma_address,
524 skreq->n_sg *
525 sizeof(struct fit_sg_descriptor),
526 DMA_TO_DEVICE);
527
ca33dd92 528 spin_lock_irqsave(&skdev->lock, flags);
91f85da4
BVA		 529 /* Either a FIT msg is in progress or we have to start one. */
530 skmsg = skdev->skmsg;
531 if (!skmsg) {
532 skmsg = &skdev->skmsg_table[tag];
533 skdev->skmsg = skmsg;
534
535 /* Initialize the FIT msg header */
536 fmh = &skmsg->msg_buf->fmh;
537 memset(fmh, 0, sizeof(*fmh));
538 fmh->protocol_id = FIT_PROTOCOL_ID_SOFIT;
539 skmsg->length = sizeof(*fmh);
540 } else {
541 fmh = &skmsg->msg_buf->fmh;
542 }
543
544 skreq->fitmsg_id = skmsg->id;
545
546 scsi_req = &skmsg->msg_buf->scsi[fmh->num_protocol_cmds_coalesced];
547 memset(scsi_req, 0, sizeof(*scsi_req));
548
91f85da4 549 scsi_req->hdr.tag = skreq->id;
e2bb5548
BVA		 550 scsi_req->hdr.sg_list_dma_address =
551 cpu_to_be64(skreq->sksg_dma_address);
91f85da4 552
e2bb5548 553 if (req_op(req) == REQ_OP_FLUSH) {
91f85da4
BVA		 554 skd_prep_zerosize_flush_cdb(scsi_req, skreq);
555 SKD_ASSERT(skreq->flush_cmd == 1);
556 } else {
557 skd_prep_rw_cdb(scsi_req, data_dir, lba, count);
558 }
559
e2bb5548 560 if (req->cmd_flags & REQ_FUA)
91f85da4
BVA		 561 scsi_req->cdb[1] |= SKD_FUA_NV;
562
563 scsi_req->hdr.sg_list_len_bytes = cpu_to_be32(skreq->sg_byte_count);
564
565 /* Complete resource allocations. */
566 skreq->state = SKD_REQ_STATE_BUSY;
567
568 skmsg->length += sizeof(struct skd_scsi_request);
569 fmh->num_protocol_cmds_coalesced++;
570
91f85da4 571 dev_dbg(&skdev->pdev->dev, "req=0x%x busy=%d\n", skreq->id,
d4d0f5fc 572 skd_in_flight(skdev));
91f85da4
BVA		 573
574 /*
575 * If the FIT msg buffer is full send it.
576 */
ca33dd92 577 if (last || fmh->num_protocol_cmds_coalesced >= skd_max_req_per_msg) {
91f85da4
BVA		 578 skd_send_fitmsg(skdev, skmsg);
579 skdev->skmsg = NULL;
580 }
ca33dd92 581 spin_unlock_irqrestore(&skdev->lock, flags);
91f85da4
BVA		 582}
583
ca33dd92
BVA		 584static blk_status_t skd_mq_queue_rq(struct blk_mq_hw_ctx *hctx,
585 const struct blk_mq_queue_data *mqd)
91f85da4 586{
ca33dd92
BVA		 587 struct request *req = mqd->rq;
588 struct request_queue *q = req->q;
91f85da4 589 struct skd_device *skdev = q->queuedata;
e67f86b3 590
ca33dd92
BVA		 591 if (skdev->state == SKD_DRVR_STATE_ONLINE) {
592 blk_mq_start_request(req);
593 skd_process_request(req, mqd->last);
91f85da4 594
ca33dd92
BVA		 595 return BLK_STS_OK;
596 } else {
597 return skd_fail_all(q) ? BLK_STS_IOERR : BLK_STS_RESOURCE;
e67f86b3
AB		 598 }
599
ca33dd92 600 return BLK_STS_OK;
e67f86b3
AB		 601}
602
a74d5b76
BVA		 603static enum blk_eh_timer_return skd_timed_out(struct request *req)
604{
605 struct skd_device *skdev = req->q->queuedata;
606
607 dev_err(&skdev->pdev->dev, "request with tag %#x timed out\n",
608 blk_mq_unique_tag(req));
609
610 return BLK_EH_HANDLED;
611}
612
f18c17c8
BVA		 613static void skd_end_request(struct skd_device *skdev, struct request *req,
614 blk_status_t error)
e67f86b3 615{
e67f86b3 616 if (unlikely(error)) {
e67f86b3
AB		 617 char *cmd = (rq_data_dir(req) == READ) ? "read" : "write";
618 u32 lba = (u32)blk_rq_pos(req);
619 u32 count = blk_rq_sectors(req);
620
f98806d6
BVA		 621 dev_err(&skdev->pdev->dev,
622 "Error cmd=%s sect=%u count=%u id=0x%x\n", cmd, lba,
f18c17c8 623 count, req->tag);
e67f86b3 624 } else
f18c17c8 625 dev_dbg(&skdev->pdev->dev, "id=0x%x error=%d\n", req->tag,
f98806d6 626 error);
e67f86b3 627
ca33dd92 628 blk_mq_end_request(req, error);
e67f86b3
AB		 629}
630
a74d5b76
BVA		 631/* Only called in case of a request timeout */
632static void skd_softirq_done(struct request *req)
633{
634 struct skd_device *skdev = req->q->queuedata;
635 struct skd_request_context *skreq = blk_mq_rq_to_pdu(req);
636 unsigned long flags;
637
638 spin_lock_irqsave(&skdev->lock, flags);
639 skd_end_request(skdev, blk_mq_rq_from_pdu(skreq), BLK_STS_TIMEOUT);
640 spin_unlock_irqrestore(&skdev->lock, flags);
641}
642
2a842aca 643static bool skd_preop_sg_list(struct skd_device *skdev,
38d4a1bb 644 struct skd_request_context *skreq)
e67f86b3 645{
e7278a8b 646 struct request *req = blk_mq_rq_from_pdu(skreq);
06f824c4 647 struct scatterlist *sgl = &skreq->sg[0], *sg;
e67f86b3
AB		 648 int n_sg;
649 int i;
650
651 skreq->sg_byte_count = 0;
652
b1824eef
BVA		 653 WARN_ON_ONCE(skreq->data_dir != DMA_TO_DEVICE &&
654 skreq->data_dir != DMA_FROM_DEVICE);
e67f86b3 655
06f824c4 656 n_sg = blk_rq_map_sg(skdev->queue, req, sgl);
e67f86b3 657 if (n_sg <= 0)
2a842aca 658 return false;
e67f86b3
AB		 659
660 /*
661 * Map scatterlist to PCI bus addresses.
662 * Note PCI might change the number of entries.
663 */
06f824c4 664 n_sg = pci_map_sg(skdev->pdev, sgl, n_sg, skreq->data_dir);
e67f86b3 665 if (n_sg <= 0)
2a842aca 666 return false;
e67f86b3
AB		 667
668 SKD_ASSERT(n_sg <= skdev->sgs_per_request);
669
670 skreq->n_sg = n_sg;
671
06f824c4 672 for_each_sg(sgl, sg, n_sg, i) {
e67f86b3 673 struct fit_sg_descriptor *sgd = &skreq->sksg_list[i];
06f824c4
BVA		 674 u32 cnt = sg_dma_len(sg);
675 uint64_t dma_addr = sg_dma_address(sg);
e67f86b3
AB		 676
677 sgd->control = FIT_SGD_CONTROL_NOT_LAST;
678 sgd->byte_count = cnt;
679 skreq->sg_byte_count += cnt;
680 sgd->host_side_addr = dma_addr;
681 sgd->dev_side_addr = 0;
682 }
683
684 skreq->sksg_list[n_sg - 1].next_desc_ptr = 0LL;
685 skreq->sksg_list[n_sg - 1].control = FIT_SGD_CONTROL_LAST;
686
687 if (unlikely(skdev->dbg_level > 1)) {
f98806d6
BVA		 688 dev_dbg(&skdev->pdev->dev,
689 "skreq=%x sksg_list=%p sksg_dma=%llx\n",
690 skreq->id, skreq->sksg_list, skreq->sksg_dma_address);
e67f86b3
AB		 691 for (i = 0; i < n_sg; i++) {
692 struct fit_sg_descriptor *sgd = &skreq->sksg_list[i];
f98806d6
BVA		 693
694 dev_dbg(&skdev->pdev->dev,
695 " sg[%d] count=%u ctrl=0x%x addr=0x%llx next=0x%llx\n",
696 i, sgd->byte_count, sgd->control,
697 sgd->host_side_addr, sgd->next_desc_ptr);
e67f86b3
AB		 698 }
699 }
700
2a842aca 701 return true;
e67f86b3
AB		 702}
703
fcd37eb3 704static void skd_postop_sg_list(struct skd_device *skdev,
38d4a1bb 705 struct skd_request_context *skreq)
e67f86b3 706{
e67f86b3
AB		 707 /*
708 * restore the next ptr for next IO request so we
709 * don't have to set it every time.
710 */
711 skreq->sksg_list[skreq->n_sg - 1].next_desc_ptr =
712 skreq->sksg_dma_address +
713 ((skreq->n_sg) * sizeof(struct fit_sg_descriptor));
b1824eef 714 pci_unmap_sg(skdev->pdev, &skreq->sg[0], skreq->n_sg, skreq->data_dir);
e67f86b3
AB		 715}
716
e67f86b3
AB		 717/*
718 *****************************************************************************
719 * TIMER
720 *****************************************************************************
721 */
722
723static void skd_timer_tick_not_online(struct skd_device *skdev);
724
ca33dd92
BVA		 725static void skd_start_queue(struct work_struct *work)
726{
727 struct skd_device *skdev = container_of(work, typeof(*skdev),
728 start_queue);
729
730 /*
731 * Although it is safe to call blk_start_queue() from interrupt
732 * context, blk_mq_start_hw_queues() must not be called from
733 * interrupt context.
734 */
735 blk_mq_start_hw_queues(skdev->queue);
736}
737
e67f86b3
AB		 738static void skd_timer_tick(ulong arg)
739{
740 struct skd_device *skdev = (struct skd_device *)arg;
e67f86b3
AB		 741 unsigned long reqflags;
742 u32 state;
743
744 if (skdev->state == SKD_DRVR_STATE_FAULT)
745 /* The driver has declared fault, and we want it to
746 * stay that way until driver is reloaded.
747 */
748 return;
749
750 spin_lock_irqsave(&skdev->lock, reqflags);
751
752 state = SKD_READL(skdev, FIT_STATUS);
753 state &= FIT_SR_DRIVE_STATE_MASK;
754 if (state != skdev->drive_state)
755 skd_isr_fwstate(skdev);
756
a74d5b76 757 if (skdev->state != SKD_DRVR_STATE_ONLINE)
e67f86b3 758 skd_timer_tick_not_online(skdev);
e67f86b3 759
e67f86b3
AB		 760 mod_timer(&skdev->timer, (jiffies + HZ));
761
762 spin_unlock_irqrestore(&skdev->lock, reqflags);
763}
764
765static void skd_timer_tick_not_online(struct skd_device *skdev)
766{
767 switch (skdev->state) {
768 case SKD_DRVR_STATE_IDLE:
769 case SKD_DRVR_STATE_LOAD:
770 break;
771 case SKD_DRVR_STATE_BUSY_SANITIZE:
f98806d6
BVA		 772 dev_dbg(&skdev->pdev->dev,
773 "drive busy sanitize[%x], driver[%x]\n",
774 skdev->drive_state, skdev->state);
e67f86b3
AB		 775 /* If we've been in sanitize for 3 seconds, we figure we're not
776 * going to get anymore completions, so recover requests now
777 */
778 if (skdev->timer_countdown > 0) {
779 skdev->timer_countdown--;
780 return;
781 }
79ce12a8 782 skd_recover_requests(skdev);
e67f86b3
AB		 783 break;
784
785 case SKD_DRVR_STATE_BUSY:
786 case SKD_DRVR_STATE_BUSY_IMMINENT:
787 case SKD_DRVR_STATE_BUSY_ERASE:
f98806d6
BVA		 788 dev_dbg(&skdev->pdev->dev, "busy[%x], countdown=%d\n",
789 skdev->state, skdev->timer_countdown);
e67f86b3
AB		 790 if (skdev->timer_countdown > 0) {
791 skdev->timer_countdown--;
792 return;
793 }
f98806d6
BVA		 794 dev_dbg(&skdev->pdev->dev,
795 "busy[%x], timedout=%d, restarting device.",
796 skdev->state, skdev->timer_countdown);
e67f86b3
AB		 797 skd_restart_device(skdev);
798 break;
799
800 case SKD_DRVR_STATE_WAIT_BOOT:
801 case SKD_DRVR_STATE_STARTING:
802 if (skdev->timer_countdown > 0) {
803 skdev->timer_countdown--;
804 return;
805 }
806 /* For now, we fault the drive. Could attempt resets to
807 * revcover at some point. */
808 skdev->state = SKD_DRVR_STATE_FAULT;
809
f98806d6
BVA		 810 dev_err(&skdev->pdev->dev, "DriveFault Connect Timeout (%x)\n",
811 skdev->drive_state);
e67f86b3
AB		 812
813 /*start the queue so we can respond with error to requests */
814 /* wakeup anyone waiting for startup complete */
ca33dd92 815 schedule_work(&skdev->start_queue);
e67f86b3
AB		 816 skdev->gendisk_on = -1;
817 wake_up_interruptible(&skdev->waitq);
818 break;
819
820 case SKD_DRVR_STATE_ONLINE:
821 /* shouldn't get here. */
822 break;
823
824 case SKD_DRVR_STATE_PAUSING:
825 case SKD_DRVR_STATE_PAUSED:
826 break;
827
e67f86b3
AB		 828 case SKD_DRVR_STATE_RESTARTING:
829 if (skdev->timer_countdown > 0) {
830 skdev->timer_countdown--;
831 return;
832 }
833 /* For now, we fault the drive. Could attempt resets to
834 * revcover at some point. */
835 skdev->state = SKD_DRVR_STATE_FAULT;
f98806d6
BVA		 836 dev_err(&skdev->pdev->dev,
837 "DriveFault Reconnect Timeout (%x)\n",
838 skdev->drive_state);
e67f86b3
AB		 839
840 /*
841 * Recovering does two things:
842 * 1. completes IO with error
843 * 2. reclaims dma resources
844 * When is it safe to recover requests?
845 * - if the drive state is faulted
846 * - if the state is still soft reset after out timeout
847 * - if the drive registers are dead (state = FF)
848 * If it is "unsafe", we still need to recover, so we will
849 * disable pci bus mastering and disable our interrupts.
850 */
851
852 if ((skdev->drive_state == FIT_SR_DRIVE_SOFT_RESET) ||
853 (skdev->drive_state == FIT_SR_DRIVE_FAULT) ||
854 (skdev->drive_state == FIT_SR_DRIVE_STATE_MASK))
855 /* It never came out of soft reset. Try to
856 * recover the requests and then let them
857 * fail. This is to mitigate hung processes. */
79ce12a8 858 skd_recover_requests(skdev);
e67f86b3 859 else {
f98806d6
BVA		 860 dev_err(&skdev->pdev->dev, "Disable BusMaster (%x)\n",
861 skdev->drive_state);
e67f86b3
AB		 862 pci_disable_device(skdev->pdev);
863 skd_disable_interrupts(skdev);
79ce12a8 864 skd_recover_requests(skdev);
e67f86b3
AB		 865 }
866
867 /*start the queue so we can respond with error to requests */
868 /* wakeup anyone waiting for startup complete */
ca33dd92 869 schedule_work(&skdev->start_queue);
e67f86b3
AB		 870 skdev->gendisk_on = -1;
871 wake_up_interruptible(&skdev->waitq);
872 break;
873
874 case SKD_DRVR_STATE_RESUMING:
875 case SKD_DRVR_STATE_STOPPING:
876 case SKD_DRVR_STATE_SYNCING:
877 case SKD_DRVR_STATE_FAULT:
878 case SKD_DRVR_STATE_DISAPPEARED:
879 default:
880 break;
881 }
882}
883
884static int skd_start_timer(struct skd_device *skdev)
885{
886 int rc;
887
e67f86b3
AB		 888 setup_timer(&skdev->timer, skd_timer_tick, (ulong)skdev);
889
890 rc = mod_timer(&skdev->timer, (jiffies + HZ));
891 if (rc)
f98806d6 892 dev_err(&skdev->pdev->dev, "failed to start timer %d\n", rc);
e67f86b3
AB		 893 return rc;
894}
895
896static void skd_kill_timer(struct skd_device *skdev)
897{
898 del_timer_sync(&skdev->timer);
899}
900
e67f86b3
AB		 901/*
902 *****************************************************************************
903 * INTERNAL REQUESTS -- generated by driver itself
904 *****************************************************************************
905 */
906
907static int skd_format_internal_skspcl(struct skd_device *skdev)
908{
909 struct skd_special_context *skspcl = &skdev->internal_skspcl;
910 struct fit_sg_descriptor *sgd = &skspcl->req.sksg_list[0];
911 struct fit_msg_hdr *fmh;
912 uint64_t dma_address;
913 struct skd_scsi_request *scsi;
914
d891fe60 915 fmh = &skspcl->msg_buf->fmh;
e67f86b3
AB		 916 fmh->protocol_id = FIT_PROTOCOL_ID_SOFIT;
917 fmh->num_protocol_cmds_coalesced = 1;
918
d891fe60 919 scsi = &skspcl->msg_buf->scsi[0];
e67f86b3
AB		 920 memset(scsi, 0, sizeof(*scsi));
921 dma_address = skspcl->req.sksg_dma_address;
922 scsi->hdr.sg_list_dma_address = cpu_to_be64(dma_address);
32494df9 923 skspcl->req.n_sg = 1;
e67f86b3
AB		 924 sgd->control = FIT_SGD_CONTROL_LAST;
925 sgd->byte_count = 0;
926 sgd->host_side_addr = skspcl->db_dma_address;
927 sgd->dev_side_addr = 0;
928 sgd->next_desc_ptr = 0LL;
929
930 return 1;
931}
932
933#define WR_BUF_SIZE SKD_N_INTERNAL_BYTES
934
935static void skd_send_internal_skspcl(struct skd_device *skdev,
936 struct skd_special_context *skspcl,
937 u8 opcode)
938{
939 struct fit_sg_descriptor *sgd = &skspcl->req.sksg_list[0];
940 struct skd_scsi_request *scsi;
941 unsigned char *buf = skspcl->data_buf;
942 int i;
943
944 if (skspcl->req.state != SKD_REQ_STATE_IDLE)
945 /*
946 * A refresh is already in progress.
947 * Just wait for it to finish.
948 */
949 return;
950
951 SKD_ASSERT((skspcl->req.id & SKD_ID_INCR) == 0);
952 skspcl->req.state = SKD_REQ_STATE_BUSY;
953 skspcl->req.id += SKD_ID_INCR;
954
d891fe60 955 scsi = &skspcl->msg_buf->scsi[0];
e67f86b3
AB		 956 scsi->hdr.tag = skspcl->req.id;
957
958 memset(scsi->cdb, 0, sizeof(scsi->cdb));
959
960 switch (opcode) {
961 case TEST_UNIT_READY:
962 scsi->cdb[0] = TEST_UNIT_READY;
963 sgd->byte_count = 0;
964 scsi->hdr.sg_list_len_bytes = 0;
965 break;
966
967 case READ_CAPACITY:
968 scsi->cdb[0] = READ_CAPACITY;
969 sgd->byte_count = SKD_N_READ_CAP_BYTES;
970 scsi->hdr.sg_list_len_bytes = cpu_to_be32(sgd->byte_count);
971 break;
972
973 case INQUIRY:
974 scsi->cdb[0] = INQUIRY;
975 scsi->cdb[1] = 0x01; /* evpd */
976 scsi->cdb[2] = 0x80; /* serial number page */
977 scsi->cdb[4] = 0x10;
978 sgd->byte_count = 16;
979 scsi->hdr.sg_list_len_bytes = cpu_to_be32(sgd->byte_count);
980 break;
981
982 case SYNCHRONIZE_CACHE:
983 scsi->cdb[0] = SYNCHRONIZE_CACHE;
984 sgd->byte_count = 0;
985 scsi->hdr.sg_list_len_bytes = 0;
986 break;
987
988 case WRITE_BUFFER:
989 scsi->cdb[0] = WRITE_BUFFER;
990 scsi->cdb[1] = 0x02;
991 scsi->cdb[7] = (WR_BUF_SIZE & 0xFF00) >> 8;
992 scsi->cdb[8] = WR_BUF_SIZE & 0xFF;
993 sgd->byte_count = WR_BUF_SIZE;
994 scsi->hdr.sg_list_len_bytes = cpu_to_be32(sgd->byte_count);
995 /* fill incrementing byte pattern */
996 for (i = 0; i < sgd->byte_count; i++)
997 buf[i] = i & 0xFF;
998 break;
999
1000 case READ_BUFFER:
1001 scsi->cdb[0] = READ_BUFFER;
1002 scsi->cdb[1] = 0x02;
1003 scsi->cdb[7] = (WR_BUF_SIZE & 0xFF00) >> 8;
1004 scsi->cdb[8] = WR_BUF_SIZE & 0xFF;
1005 sgd->byte_count = WR_BUF_SIZE;
1006 scsi->hdr.sg_list_len_bytes = cpu_to_be32(sgd->byte_count);
1007 memset(skspcl->data_buf, 0, sgd->byte_count);
1008 break;
1009
1010 default:
1011 SKD_ASSERT("Don't know what to send");
1012 return;
1013
1014 }
1015 skd_send_special_fitmsg(skdev, skspcl);
1016}
1017
1018static void skd_refresh_device_data(struct skd_device *skdev)
1019{
1020 struct skd_special_context *skspcl = &skdev->internal_skspcl;
1021
1022 skd_send_internal_skspcl(skdev, skspcl, TEST_UNIT_READY);
1023}
1024
1025static int skd_chk_read_buf(struct skd_device *skdev,
1026 struct skd_special_context *skspcl)
1027{
1028 unsigned char *buf = skspcl->data_buf;
1029 int i;
1030
1031 /* check for incrementing byte pattern */
1032 for (i = 0; i < WR_BUF_SIZE; i++)
1033 if (buf[i] != (i & 0xFF))
1034 return 1;
1035
1036 return 0;
1037}
1038
1039static void skd_log_check_status(struct skd_device *skdev, u8 status, u8 key,
1040 u8 code, u8 qual, u8 fruc)
1041{
1042 /* If the check condition is of special interest, log a message */
1043 if ((status == SAM_STAT_CHECK_CONDITION) && (key == 0x02)
1044 && (code == 0x04) && (qual == 0x06)) {
f98806d6
BVA		 1045 dev_err(&skdev->pdev->dev,
1046 "*** LOST_WRITE_DATA ERROR *** key/asc/ascq/fruc %02x/%02x/%02x/%02x\n",
1047 key, code, qual, fruc);
e67f86b3
AB		 1048 }
1049}
1050
1051static void skd_complete_internal(struct skd_device *skdev,
85e34112
BVA		 1052 struct fit_completion_entry_v1 *skcomp,
1053 struct fit_comp_error_info *skerr,
e67f86b3
AB		 1054 struct skd_special_context *skspcl)
1055{
1056 u8 *buf = skspcl->data_buf;
1057 u8 status;
1058 int i;
d891fe60 1059 struct skd_scsi_request *scsi = &skspcl->msg_buf->scsi[0];
e67f86b3 1060
760b48ca
BVA		 1061 lockdep_assert_held(&skdev->lock);
1062
e67f86b3
AB		 1063 SKD_ASSERT(skspcl == &skdev->internal_skspcl);
1064
f98806d6 1065 dev_dbg(&skdev->pdev->dev, "complete internal %x\n", scsi->cdb[0]);
e67f86b3 1066
a3db102d
BVA		 1067 dma_sync_single_for_cpu(&skdev->pdev->dev,
1068 skspcl->db_dma_address,
1069 skspcl->req.sksg_list[0].byte_count,
1070 DMA_BIDIRECTIONAL);
1071
e67f86b3
AB		 1072 skspcl->req.completion = *skcomp;
1073 skspcl->req.state = SKD_REQ_STATE_IDLE;
1074 skspcl->req.id += SKD_ID_INCR;
1075
1076 status = skspcl->req.completion.status;
1077
1078 skd_log_check_status(skdev, status, skerr->key, skerr->code,
1079 skerr->qual, skerr->fruc);
1080
1081 switch (scsi->cdb[0]) {
1082 case TEST_UNIT_READY:
1083 if (status == SAM_STAT_GOOD)
1084 skd_send_internal_skspcl(skdev, skspcl, WRITE_BUFFER);
1085 else if ((status == SAM_STAT_CHECK_CONDITION) &&
1086 (skerr->key == MEDIUM_ERROR))
1087 skd_send_internal_skspcl(skdev, skspcl, WRITE_BUFFER);
1088 else {
1089 if (skdev->state == SKD_DRVR_STATE_STOPPING) {
f98806d6
BVA		 1090 dev_dbg(&skdev->pdev->dev,
1091 "TUR failed, don't send anymore state 0x%x\n",
1092 skdev->state);
e67f86b3
AB		 1093 return;
1094 }
f98806d6
BVA		 1095 dev_dbg(&skdev->pdev->dev,
1096 "**** TUR failed, retry skerr\n");
fb4844b8
BVA		 1097 skd_send_internal_skspcl(skdev, skspcl,
1098 TEST_UNIT_READY);
e67f86b3
AB		 1099 }
1100 break;
1101
1102 case WRITE_BUFFER:
1103 if (status == SAM_STAT_GOOD)
1104 skd_send_internal_skspcl(skdev, skspcl, READ_BUFFER);
1105 else {
1106 if (skdev->state == SKD_DRVR_STATE_STOPPING) {
f98806d6
BVA		 1107 dev_dbg(&skdev->pdev->dev,
1108 "write buffer failed, don't send anymore state 0x%x\n",
1109 skdev->state);
e67f86b3
AB		 1110 return;
1111 }
f98806d6
BVA		 1112 dev_dbg(&skdev->pdev->dev,
1113 "**** write buffer failed, retry skerr\n");
fb4844b8
BVA		 1114 skd_send_internal_skspcl(skdev, skspcl,
1115 TEST_UNIT_READY);
e67f86b3
AB		 1116 }
1117 break;
1118
1119 case READ_BUFFER:
1120 if (status == SAM_STAT_GOOD) {
1121 if (skd_chk_read_buf(skdev, skspcl) == 0)
1122 skd_send_internal_skspcl(skdev, skspcl,
1123 READ_CAPACITY);
1124 else {
f98806d6
BVA		 1125 dev_err(&skdev->pdev->dev,
1126 "*** W/R Buffer mismatch %d ***\n",
1127 skdev->connect_retries);
e67f86b3
AB		 1128 if (skdev->connect_retries <
1129 SKD_MAX_CONNECT_RETRIES) {
1130 skdev->connect_retries++;
1131 skd_soft_reset(skdev);
1132 } else {
f98806d6
BVA		 1133 dev_err(&skdev->pdev->dev,
1134 "W/R Buffer Connect Error\n");
e67f86b3
AB		 1135 return;
1136 }
1137 }
1138
1139 } else {
1140 if (skdev->state == SKD_DRVR_STATE_STOPPING) {
f98806d6
BVA		 1141 dev_dbg(&skdev->pdev->dev,
1142 "read buffer failed, don't send anymore state 0x%x\n",
1143 skdev->state);
e67f86b3
AB		 1144 return;
1145 }
f98806d6
BVA		 1146 dev_dbg(&skdev->pdev->dev,
1147 "**** read buffer failed, retry skerr\n");
fb4844b8
BVA		 1148 skd_send_internal_skspcl(skdev, skspcl,
1149 TEST_UNIT_READY);
e67f86b3
AB		 1150 }
1151 break;
1152
1153 case READ_CAPACITY:
1154 skdev->read_cap_is_valid = 0;
1155 if (status == SAM_STAT_GOOD) {
1156 skdev->read_cap_last_lba =
1157 (buf[0] << 24) | (buf[1] << 16) |
1158 (buf[2] << 8) | buf[3];
1159 skdev->read_cap_blocksize =
1160 (buf[4] << 24) | (buf[5] << 16) |
1161 (buf[6] << 8) | buf[7];
1162
f98806d6
BVA		 1163 dev_dbg(&skdev->pdev->dev, "last lba %d, bs %d\n",
1164 skdev->read_cap_last_lba,
1165 skdev->read_cap_blocksize);
e67f86b3
AB		 1166
1167 set_capacity(skdev->disk, skdev->read_cap_last_lba + 1);
1168
1169 skdev->read_cap_is_valid = 1;
1170
1171 skd_send_internal_skspcl(skdev, skspcl, INQUIRY);
1172 } else if ((status == SAM_STAT_CHECK_CONDITION) &&
1173 (skerr->key == MEDIUM_ERROR)) {
1174 skdev->read_cap_last_lba = ~0;
1175 set_capacity(skdev->disk, skdev->read_cap_last_lba + 1);
f98806d6 1176 dev_dbg(&skdev->pdev->dev, "**** MEDIUM ERROR caused READCAP to fail, ignore failure and continue to inquiry\n");
e67f86b3
AB		 1177 skd_send_internal_skspcl(skdev, skspcl, INQUIRY);
1178 } else {
f98806d6 1179 dev_dbg(&skdev->pdev->dev, "**** READCAP failed, retry TUR\n");
e67f86b3
AB		 1180 skd_send_internal_skspcl(skdev, skspcl,
1181 TEST_UNIT_READY);
1182 }
1183 break;
1184
1185 case INQUIRY:
1186 skdev->inquiry_is_valid = 0;
1187 if (status == SAM_STAT_GOOD) {
1188 skdev->inquiry_is_valid = 1;
1189
1190 for (i = 0; i < 12; i++)
1191 skdev->inq_serial_num[i] = buf[i + 4];
1192 skdev->inq_serial_num[12] = 0;
1193 }
1194
1195 if (skd_unquiesce_dev(skdev) < 0)
f98806d6 1196 dev_dbg(&skdev->pdev->dev, "**** failed, to ONLINE device\n");
e67f86b3
AB		 1197 /* connection is complete */
1198 skdev->connect_retries = 0;
1199 break;
1200
1201 case SYNCHRONIZE_CACHE:
1202 if (status == SAM_STAT_GOOD)
1203 skdev->sync_done = 1;
1204 else
1205 skdev->sync_done = -1;
1206 wake_up_interruptible(&skdev->waitq);
1207 break;
1208
1209 default:
1210 SKD_ASSERT("we didn't send this");
1211 }
1212}
1213
1214/*
1215 *****************************************************************************
1216 * FIT MESSAGES
1217 *****************************************************************************
1218 */
1219
1220static void skd_send_fitmsg(struct skd_device *skdev,
1221 struct skd_fitmsg_context *skmsg)
1222{
1223 u64 qcmd;
e67f86b3 1224
f98806d6 1225 dev_dbg(&skdev->pdev->dev, "dma address 0x%llx, busy=%d\n",
d4d0f5fc 1226 skmsg->mb_dma_address, skd_in_flight(skdev));
6507f436 1227 dev_dbg(&skdev->pdev->dev, "msg_buf %p\n", skmsg->msg_buf);
e67f86b3
AB		 1228
1229 qcmd = skmsg->mb_dma_address;
1230 qcmd |= FIT_QCMD_QID_NORMAL;
1231
e67f86b3
AB		 1232 if (unlikely(skdev->dbg_level > 1)) {
1233 u8 *bp = (u8 *)skmsg->msg_buf;
1234 int i;
1235 for (i = 0; i < skmsg->length; i += 8) {
f98806d6
BVA		 1236 dev_dbg(&skdev->pdev->dev, "msg[%2d] %8ph\n", i,
1237 &bp[i]);
e67f86b3
AB		 1238 if (i == 0)
1239 i = 64 - 8;
1240 }
1241 }
1242
1243 if (skmsg->length > 256)
1244 qcmd |= FIT_QCMD_MSGSIZE_512;
1245 else if (skmsg->length > 128)
1246 qcmd |= FIT_QCMD_MSGSIZE_256;
1247 else if (skmsg->length > 64)
1248 qcmd |= FIT_QCMD_MSGSIZE_128;
1249 else
1250 /*
1251 * This makes no sense because the FIT msg header is
1252 * 64 bytes. If the msg is only 64 bytes long it has
1253 * no payload.
1254 */
1255 qcmd |= FIT_QCMD_MSGSIZE_64;
1256
a3db102d
BVA		 1257 dma_sync_single_for_device(&skdev->pdev->dev, skmsg->mb_dma_address,
1258 skmsg->length, DMA_TO_DEVICE);
1259
5fbd545c
BVA		 1260 /* Make sure skd_msg_buf is written before the doorbell is triggered. */
1261 smp_wmb();
1262
e67f86b3 1263 SKD_WRITEQ(skdev, qcmd, FIT_Q_COMMAND);
e67f86b3
AB		 1264}
1265
1266static void skd_send_special_fitmsg(struct skd_device *skdev,
1267 struct skd_special_context *skspcl)
1268{
1269 u64 qcmd;
1270
a3db102d
BVA		 1271 WARN_ON_ONCE(skspcl->req.n_sg != 1);
1272
e67f86b3
AB		 1273 if (unlikely(skdev->dbg_level > 1)) {
1274 u8 *bp = (u8 *)skspcl->msg_buf;
1275 int i;
1276
1277 for (i = 0; i < SKD_N_SPECIAL_FITMSG_BYTES; i += 8) {
f98806d6
BVA		 1278 dev_dbg(&skdev->pdev->dev, " spcl[%2d] %8ph\n", i,
1279 &bp[i]);
e67f86b3
AB		 1280 if (i == 0)
1281 i = 64 - 8;
1282 }
1283
f98806d6
BVA		 1284 dev_dbg(&skdev->pdev->dev,
1285 "skspcl=%p id=%04x sksg_list=%p sksg_dma=%llx\n",
1286 skspcl, skspcl->req.id, skspcl->req.sksg_list,
1287 skspcl->req.sksg_dma_address);
e67f86b3
AB		 1288 for (i = 0; i < skspcl->req.n_sg; i++) {
1289 struct fit_sg_descriptor *sgd =
1290 &skspcl->req.sksg_list[i];
1291
f98806d6
BVA		 1292 dev_dbg(&skdev->pdev->dev,
1293 " sg[%d] count=%u ctrl=0x%x addr=0x%llx next=0x%llx\n",
1294 i, sgd->byte_count, sgd->control,
1295 sgd->host_side_addr, sgd->next_desc_ptr);
e67f86b3
AB		 1296 }
1297 }
1298
1299 /*
1300 * Special FIT msgs are always 128 bytes: a 64-byte FIT hdr
1301 * and one 64-byte SSDI command.
1302 */
1303 qcmd = skspcl->mb_dma_address;
1304 qcmd |= FIT_QCMD_QID_NORMAL + FIT_QCMD_MSGSIZE_128;
1305
a3db102d
BVA		 1306 dma_sync_single_for_device(&skdev->pdev->dev, skspcl->mb_dma_address,
1307 SKD_N_SPECIAL_FITMSG_BYTES, DMA_TO_DEVICE);
1308 dma_sync_single_for_device(&skdev->pdev->dev,
1309 skspcl->req.sksg_dma_address,
1310 1 * sizeof(struct fit_sg_descriptor),
1311 DMA_TO_DEVICE);
1312 dma_sync_single_for_device(&skdev->pdev->dev,
1313 skspcl->db_dma_address,
1314 skspcl->req.sksg_list[0].byte_count,
1315 DMA_BIDIRECTIONAL);
1316
5fbd545c
BVA		 1317 /* Make sure skd_msg_buf is written before the doorbell is triggered. */
1318 smp_wmb();
1319
e67f86b3
AB		 1320 SKD_WRITEQ(skdev, qcmd, FIT_Q_COMMAND);
1321}
1322
1323/*
1324 *****************************************************************************
1325 * COMPLETION QUEUE
1326 *****************************************************************************
1327 */
1328
1329static void skd_complete_other(struct skd_device *skdev,
85e34112
BVA		 1330 struct fit_completion_entry_v1 *skcomp,
1331 struct fit_comp_error_info *skerr);
e67f86b3 1332
e67f86b3
AB		 1333struct sns_info {
1334 u8 type;
1335 u8 stat;
1336 u8 key;
1337 u8 asc;
1338 u8 ascq;
1339 u8 mask;
1340 enum skd_check_status_action action;
1341};
1342
1343static struct sns_info skd_chkstat_table[] = {
1344 /* Good */
1345 { 0x70, 0x02, RECOVERED_ERROR, 0, 0, 0x1c,
1346 SKD_CHECK_STATUS_REPORT_GOOD },
1347
1348 /* Smart alerts */
1349 { 0x70, 0x02, NO_SENSE, 0x0B, 0x00, 0x1E, /* warnings */
1350 SKD_CHECK_STATUS_REPORT_SMART_ALERT },
1351 { 0x70, 0x02, NO_SENSE, 0x5D, 0x00, 0x1E, /* thresholds */
1352 SKD_CHECK_STATUS_REPORT_SMART_ALERT },
1353 { 0x70, 0x02, RECOVERED_ERROR, 0x0B, 0x01, 0x1F, /* temperature over trigger */
1354 SKD_CHECK_STATUS_REPORT_SMART_ALERT },
1355
1356 /* Retry (with limits) */
1357 { 0x70, 0x02, 0x0B, 0, 0, 0x1C, /* This one is for DMA ERROR */
1358 SKD_CHECK_STATUS_REQUEUE_REQUEST },
1359 { 0x70, 0x02, 0x06, 0x0B, 0x00, 0x1E, /* warnings */
1360 SKD_CHECK_STATUS_REQUEUE_REQUEST },
1361 { 0x70, 0x02, 0x06, 0x5D, 0x00, 0x1E, /* thresholds */
1362 SKD_CHECK_STATUS_REQUEUE_REQUEST },
1363 { 0x70, 0x02, 0x06, 0x80, 0x30, 0x1F, /* backup power */
1364 SKD_CHECK_STATUS_REQUEUE_REQUEST },
1365
1366 /* Busy (or about to be) */
1367 { 0x70, 0x02, 0x06, 0x3f, 0x01, 0x1F, /* fw changed */
1368 SKD_CHECK_STATUS_BUSY_IMMINENT },
1369};
1370
1371/*
1372 * Look up status and sense data to decide how to handle the error
1373 * from the device.
1374 * mask says which fields must match e.g., mask=0x18 means check
1375 * type and stat, ignore key, asc, ascq.
1376 */
1377
38d4a1bb
MS		 1378static enum skd_check_status_action
1379skd_check_status(struct skd_device *skdev,
85e34112 1380 u8 cmp_status, struct fit_comp_error_info *skerr)
e67f86b3 1381{
0b2e0c07 1382 int i;
e67f86b3 1383
f98806d6
BVA		 1384 dev_err(&skdev->pdev->dev, "key/asc/ascq/fruc %02x/%02x/%02x/%02x\n",
1385 skerr->key, skerr->code, skerr->qual, skerr->fruc);
e67f86b3 1386
f98806d6
BVA		 1387 dev_dbg(&skdev->pdev->dev,
1388 "stat: t=%02x stat=%02x k=%02x c=%02x q=%02x fruc=%02x\n",
1389 skerr->type, cmp_status, skerr->key, skerr->code, skerr->qual,
1390 skerr->fruc);
e67f86b3
AB		 1391
1392 /* Does the info match an entry in the good category? */
0b2e0c07 1393 for (i = 0; i < ARRAY_SIZE(skd_chkstat_table); i++) {
e67f86b3
AB		 1394 struct sns_info *sns = &skd_chkstat_table[i];
1395
1396 if (sns->mask & 0x10)
1397 if (skerr->type != sns->type)
1398 continue;
1399
1400 if (sns->mask & 0x08)
1401 if (cmp_status != sns->stat)
1402 continue;
1403
1404 if (sns->mask & 0x04)
1405 if (skerr->key != sns->key)
1406 continue;
1407
1408 if (sns->mask & 0x02)
1409 if (skerr->code != sns->asc)
1410 continue;
1411
1412 if (sns->mask & 0x01)
1413 if (skerr->qual != sns->ascq)
1414 continue;
1415
1416 if (sns->action == SKD_CHECK_STATUS_REPORT_SMART_ALERT) {
f98806d6
BVA		 1417 dev_err(&skdev->pdev->dev,
1418 "SMART Alert: sense key/asc/ascq %02x/%02x/%02x\n",
1419 skerr->key, skerr->code, skerr->qual);
e67f86b3
AB		 1420 }
1421 return sns->action;
1422 }
1423
1424 /* No other match, so nonzero status means error,
1425 * zero status means good
1426 */
1427 if (cmp_status) {
f98806d6 1428 dev_dbg(&skdev->pdev->dev, "status check: error\n");
e67f86b3
AB		 1429 return SKD_CHECK_STATUS_REPORT_ERROR;
1430 }
1431
f98806d6 1432 dev_dbg(&skdev->pdev->dev, "status check good default\n");
e67f86b3
AB		 1433 return SKD_CHECK_STATUS_REPORT_GOOD;
1434}
1435
1436static void skd_resolve_req_exception(struct skd_device *skdev,
f18c17c8
BVA		 1437 struct skd_request_context *skreq,
1438 struct request *req)
e67f86b3
AB		 1439{
1440 u8 cmp_status = skreq->completion.status;
1441
1442 switch (skd_check_status(skdev, cmp_status, &skreq->err_info)) {
1443 case SKD_CHECK_STATUS_REPORT_GOOD:
1444 case SKD_CHECK_STATUS_REPORT_SMART_ALERT:
f18c17c8 1445 skd_end_request(skdev, req, BLK_STS_OK);
e67f86b3
AB		 1446 break;
1447
1448 case SKD_CHECK_STATUS_BUSY_IMMINENT:
1449 skd_log_skreq(skdev, skreq, "retry(busy)");
f18c17c8 1450 blk_requeue_request(skdev->queue, req);
f98806d6 1451 dev_info(&skdev->pdev->dev, "drive BUSY imminent\n");
e67f86b3
AB		 1452 skdev->state = SKD_DRVR_STATE_BUSY_IMMINENT;
1453 skdev->timer_countdown = SKD_TIMER_MINUTES(20);
1454 skd_quiesce_dev(skdev);
1455 break;
1456
1457 case SKD_CHECK_STATUS_REQUEUE_REQUEST:
f18c17c8 1458 if ((unsigned long) ++req->special < SKD_MAX_RETRIES) {
fcd37eb3 1459 skd_log_skreq(skdev, skreq, "retry");
f18c17c8 1460 blk_requeue_request(skdev->queue, req);
fcd37eb3 1461 break;
e67f86b3 1462 }
ce6882ba 1463 /* fall through */
e67f86b3
AB		 1464
1465 case SKD_CHECK_STATUS_REPORT_ERROR:
1466 default:
f18c17c8 1467 skd_end_request(skdev, req, BLK_STS_IOERR);
e67f86b3
AB		 1468 break;
1469 }
1470}
1471
e67f86b3
AB		 1472static void skd_release_skreq(struct skd_device *skdev,
1473 struct skd_request_context *skreq)
1474{
e67f86b3
AB		 1475 /*
1476 * Reclaim the skd_request_context
1477 */
1478 skreq->state = SKD_REQ_STATE_IDLE;
1479 skreq->id += SKD_ID_INCR;
f18c17c8
BVA		 1480}
1481
e67f86b3
AB		 1482static int skd_isr_completion_posted(struct skd_device *skdev,
1483 int limit, int *enqueued)
1484{
85e34112
BVA		 1485 struct fit_completion_entry_v1 *skcmp;
1486 struct fit_comp_error_info *skerr;
e67f86b3 1487 u16 req_id;
f18c17c8 1488 u32 tag;
ca33dd92 1489 u16 hwq = 0;
f18c17c8 1490 struct request *rq;
e67f86b3 1491 struct skd_request_context *skreq;
c830da8c
BVA		 1492 u16 cmp_cntxt;
1493 u8 cmp_status;
1494 u8 cmp_cycle;
1495 u32 cmp_bytes;
1496 int rc;
e67f86b3 1497 int processed = 0;
e67f86b3 1498
760b48ca
BVA		 1499 lockdep_assert_held(&skdev->lock);
1500
e67f86b3
AB		 1501 for (;; ) {
1502 SKD_ASSERT(skdev->skcomp_ix < SKD_N_COMPLETION_ENTRY);
1503
1504 skcmp = &skdev->skcomp_table[skdev->skcomp_ix];
1505 cmp_cycle = skcmp->cycle;
1506 cmp_cntxt = skcmp->tag;
1507 cmp_status = skcmp->status;
1508 cmp_bytes = be32_to_cpu(skcmp->num_returned_bytes);
1509
1510 skerr = &skdev->skerr_table[skdev->skcomp_ix];
1511
f98806d6
BVA		 1512 dev_dbg(&skdev->pdev->dev,
1513 "cycle=%d ix=%d got cycle=%d cmdctxt=0x%x stat=%d busy=%d rbytes=0x%x proto=%d\n",
1514 skdev->skcomp_cycle, skdev->skcomp_ix, cmp_cycle,
d4d0f5fc 1515 cmp_cntxt, cmp_status, skd_in_flight(skdev),
6fbb2de5 1516 cmp_bytes, skdev->proto_ver);
e67f86b3
AB		 1517
1518 if (cmp_cycle != skdev->skcomp_cycle) {
f98806d6 1519 dev_dbg(&skdev->pdev->dev, "end of completions\n");
e67f86b3
AB		 1520 break;
1521 }
1522 /*
1523 * Update the completion queue head index and possibly
1524 * the completion cycle count. 8-bit wrap-around.
1525 */
1526 skdev->skcomp_ix++;
1527 if (skdev->skcomp_ix >= SKD_N_COMPLETION_ENTRY) {
1528 skdev->skcomp_ix = 0;
1529 skdev->skcomp_cycle++;
1530 }
1531
1532 /*
1533 * The command context is a unique 32-bit ID. The low order
1534 * bits help locate the request. The request is usually a
1535 * r/w request (see skd_start() above) or a special request.
1536 */
1537 req_id = cmp_cntxt;
f18c17c8 1538 tag = req_id & SKD_ID_SLOT_AND_TABLE_MASK;
e67f86b3
AB		 1539
1540 /* Is this other than a r/w request? */
f18c17c8 1541 if (tag >= skdev->num_req_context) {
e67f86b3
AB		 1542 /*
1543 * This is not a completion for a r/w request.
1544 */
ca33dd92
BVA		 1545 WARN_ON_ONCE(blk_mq_tag_to_rq(skdev->tag_set.tags[hwq],
1546 tag));
e67f86b3
AB		 1547 skd_complete_other(skdev, skcmp, skerr);
1548 continue;
1549 }
1550
ca33dd92 1551 rq = blk_mq_tag_to_rq(skdev->tag_set.tags[hwq], tag);
f18c17c8
BVA		 1552 if (WARN(!rq, "No request for tag %#x -> %#x\n", cmp_cntxt,
1553 tag))
1554 continue;
e7278a8b 1555 skreq = blk_mq_rq_to_pdu(rq);
e67f86b3
AB		 1556
1557 /*
1558 * Make sure the request ID for the slot matches.
1559 */
1560 if (skreq->id != req_id) {
f98806d6
BVA		 1561 dev_dbg(&skdev->pdev->dev,
1562 "mismatch comp_id=0x%x req_id=0x%x\n", req_id,
1563 skreq->id);
e67f86b3
AB		 1564 {
1565 u16 new_id = cmp_cntxt;
f98806d6
BVA		 1566 dev_err(&skdev->pdev->dev,
1567 "Completion mismatch comp_id=0x%04x skreq=0x%04x new=0x%04x\n",
1568 req_id, skreq->id, new_id);
e67f86b3
AB		 1569
1570 continue;
1571 }
1572 }
1573
1574 SKD_ASSERT(skreq->state == SKD_REQ_STATE_BUSY);
1575
e67f86b3
AB		 1576 skreq->completion = *skcmp;
1577 if (unlikely(cmp_status == SAM_STAT_CHECK_CONDITION)) {
1578 skreq->err_info = *skerr;
1579 skd_log_check_status(skdev, cmp_status, skerr->key,
1580 skerr->code, skerr->qual,
1581 skerr->fruc);
1582 }
1583 /* Release DMA resources for the request. */
1584 if (skreq->n_sg > 0)
1585 skd_postop_sg_list(skdev, skreq);
1586
f18c17c8 1587 skd_release_skreq(skdev, skreq);
e67f86b3
AB		 1588
1589 /*
f18c17c8 1590 * Capture the outcome and post it back to the native request.
e67f86b3 1591 */
f18c17c8
BVA		 1592 if (likely(cmp_status == SAM_STAT_GOOD))
1593 skd_end_request(skdev, rq, BLK_STS_OK);
1594 else
1595 skd_resolve_req_exception(skdev, skreq, rq);
e67f86b3
AB		 1596
1597 /* skd_isr_comp_limit equal zero means no limit */
1598 if (limit) {
1599 if (++processed >= limit) {
1600 rc = 1;
1601 break;
1602 }
1603 }
1604 }
1605
6fbb2de5 1606 if (skdev->state == SKD_DRVR_STATE_PAUSING &&
d4d0f5fc 1607 skd_in_flight(skdev) == 0) {
e67f86b3
AB		 1608 skdev->state = SKD_DRVR_STATE_PAUSED;
1609 wake_up_interruptible(&skdev->waitq);
1610 }
1611
1612 return rc;
1613}
1614
1615static void skd_complete_other(struct skd_device *skdev,
85e34112
BVA		 1616 struct fit_completion_entry_v1 *skcomp,
1617 struct fit_comp_error_info *skerr)
e67f86b3
AB		 1618{
1619 u32 req_id = 0;
1620 u32 req_table;
1621 u32 req_slot;
1622 struct skd_special_context *skspcl;
1623
760b48ca
BVA		 1624 lockdep_assert_held(&skdev->lock);
1625
e67f86b3
AB		 1626 req_id = skcomp->tag;
1627 req_table = req_id & SKD_ID_TABLE_MASK;
1628 req_slot = req_id & SKD_ID_SLOT_MASK;
1629
f98806d6
BVA		 1630 dev_dbg(&skdev->pdev->dev, "table=0x%x id=0x%x slot=%d\n", req_table,
1631 req_id, req_slot);
e67f86b3
AB		 1632
1633 /*
1634 * Based on the request id, determine how to dispatch this completion.
1635 * This swich/case is finding the good cases and forwarding the
1636 * completion entry. Errors are reported below the switch.
1637 */
1638 switch (req_table) {
1639 case SKD_ID_RW_REQUEST:
1640 /*
e1d06f2d 1641 * The caller, skd_isr_completion_posted() above,
e67f86b3
AB		 1642 * handles r/w requests. The only way we get here
1643 * is if the req_slot is out of bounds.
1644 */
1645 break;
1646
e67f86b3
AB		 1647 case SKD_ID_INTERNAL:
1648 if (req_slot == 0) {
1649 skspcl = &skdev->internal_skspcl;
1650 if (skspcl->req.id == req_id &&
1651 skspcl->req.state == SKD_REQ_STATE_BUSY) {
1652 skd_complete_internal(skdev,
1653 skcomp, skerr, skspcl);
1654 return;
1655 }
1656 }
1657 break;
1658
1659 case SKD_ID_FIT_MSG:
1660 /*
1661 * These id's should never appear in a completion record.
1662 */
1663 break;
1664
1665 default:
1666 /*
1667 * These id's should never appear anywhere;
1668 */
1669 break;
1670 }
1671
1672 /*
1673 * If we get here it is a bad or stale id.
1674 */
1675}
1676
e67f86b3
AB		 1677static void skd_reset_skcomp(struct skd_device *skdev)
1678{
6f7c7675 1679 memset(skdev->skcomp_table, 0, SKD_SKCOMP_SIZE);
e67f86b3
AB		 1680
1681 skdev->skcomp_ix = 0;
1682 skdev->skcomp_cycle = 1;
1683}
1684
1685/*
1686 *****************************************************************************
1687 * INTERRUPTS
1688 *****************************************************************************
1689 */
1690static void skd_completion_worker(struct work_struct *work)
1691{
1692 struct skd_device *skdev =
1693 container_of(work, struct skd_device, completion_worker);
1694 unsigned long flags;
1695 int flush_enqueued = 0;
1696
1697 spin_lock_irqsave(&skdev->lock, flags);
1698
1699 /*
1700 * pass in limit=0, which means no limit..
1701 * process everything in compq
1702 */
1703 skd_isr_completion_posted(skdev, 0, &flush_enqueued);
ca33dd92 1704 schedule_work(&skdev->start_queue);
e67f86b3
AB		 1705
1706 spin_unlock_irqrestore(&skdev->lock, flags);
1707}
1708
1709static void skd_isr_msg_from_dev(struct skd_device *skdev);
1710
41c9499b
AB		 1711static irqreturn_t
1712skd_isr(int irq, void *ptr)
e67f86b3 1713{
1cd3c1ab 1714 struct skd_device *skdev = ptr;
e67f86b3
AB		 1715 u32 intstat;
1716 u32 ack;
1717 int rc = 0;
1718 int deferred = 0;
1719 int flush_enqueued = 0;
1720
e67f86b3
AB		 1721 spin_lock(&skdev->lock);
1722
1723 for (;; ) {
1724 intstat = SKD_READL(skdev, FIT_INT_STATUS_HOST);
1725
1726 ack = FIT_INT_DEF_MASK;
1727 ack &= intstat;
1728
f98806d6
BVA		 1729 dev_dbg(&skdev->pdev->dev, "intstat=0x%x ack=0x%x\n", intstat,
1730 ack);
e67f86b3
AB		 1731
1732 /* As long as there is an int pending on device, keep
1733 * running loop. When none, get out, but if we've never
1734 * done any processing, call completion handler?
1735 */
1736 if (ack == 0) {
1737 /* No interrupts on device, but run the completion
1738 * processor anyway?
1739 */
1740 if (rc == 0)
1741 if (likely (skdev->state
1742 == SKD_DRVR_STATE_ONLINE))
1743 deferred = 1;
1744 break;
1745 }
1746
1747 rc = IRQ_HANDLED;
1748
1749 SKD_WRITEL(skdev, ack, FIT_INT_STATUS_HOST);
1750
1751 if (likely((skdev->state != SKD_DRVR_STATE_LOAD) &&
1752 (skdev->state != SKD_DRVR_STATE_STOPPING))) {
1753 if (intstat & FIT_ISH_COMPLETION_POSTED) {
1754 /*
1755 * If we have already deferred completion
1756 * processing, don't bother running it again
1757 */
1758 if (deferred == 0)
1759 deferred =
1760 skd_isr_completion_posted(skdev,
1761 skd_isr_comp_limit, &flush_enqueued);
1762 }
1763
1764 if (intstat & FIT_ISH_FW_STATE_CHANGE) {
1765 skd_isr_fwstate(skdev);
1766 if (skdev->state == SKD_DRVR_STATE_FAULT ||
1767 skdev->state ==
1768 SKD_DRVR_STATE_DISAPPEARED) {
1769 spin_unlock(&skdev->lock);
1770 return rc;
1771 }
1772 }
1773
1774 if (intstat & FIT_ISH_MSG_FROM_DEV)
1775 skd_isr_msg_from_dev(skdev);
1776 }
1777 }
1778
1779 if (unlikely(flush_enqueued))
ca33dd92 1780 schedule_work(&skdev->start_queue);
e67f86b3
AB		 1781
1782 if (deferred)
1783 schedule_work(&skdev->completion_worker);
1784 else if (!flush_enqueued)
ca33dd92 1785 schedule_work(&skdev->start_queue);
e67f86b3
AB		 1786
1787 spin_unlock(&skdev->lock);
1788
1789 return rc;
1790}
1791
e67f86b3
AB		 1792static void skd_drive_fault(struct skd_device *skdev)
1793{
1794 skdev->state = SKD_DRVR_STATE_FAULT;
f98806d6 1795 dev_err(&skdev->pdev->dev, "Drive FAULT\n");
e67f86b3
AB		 1796}
1797
1798static void skd_drive_disappeared(struct skd_device *skdev)
1799{
1800 skdev->state = SKD_DRVR_STATE_DISAPPEARED;
f98806d6 1801 dev_err(&skdev->pdev->dev, "Drive DISAPPEARED\n");
e67f86b3
AB		 1802}
1803
1804static void skd_isr_fwstate(struct skd_device *skdev)
1805{
1806 u32 sense;
1807 u32 state;
1808 u32 mtd;
1809 int prev_driver_state = skdev->state;
1810
1811 sense = SKD_READL(skdev, FIT_STATUS);
1812 state = sense & FIT_SR_DRIVE_STATE_MASK;
1813
f98806d6
BVA		 1814 dev_err(&skdev->pdev->dev, "s1120 state %s(%d)=>%s(%d)\n",
1815 skd_drive_state_to_str(skdev->drive_state), skdev->drive_state,
1816 skd_drive_state_to_str(state), state);
e67f86b3
AB		 1817
1818 skdev->drive_state = state;
1819
1820 switch (skdev->drive_state) {
1821 case FIT_SR_DRIVE_INIT:
1822 if (skdev->state == SKD_DRVR_STATE_PROTOCOL_MISMATCH) {
1823 skd_disable_interrupts(skdev);
1824 break;
1825 }
1826 if (skdev->state == SKD_DRVR_STATE_RESTARTING)
79ce12a8 1827 skd_recover_requests(skdev);
e67f86b3
AB		 1828 if (skdev->state == SKD_DRVR_STATE_WAIT_BOOT) {
1829 skdev->timer_countdown = SKD_STARTING_TIMO;
1830 skdev->state = SKD_DRVR_STATE_STARTING;
1831 skd_soft_reset(skdev);
1832 break;
1833 }
1834 mtd = FIT_MXD_CONS(FIT_MTD_FITFW_INIT, 0, 0);
1835 SKD_WRITEL(skdev, mtd, FIT_MSG_TO_DEVICE);
1836 skdev->last_mtd = mtd;
1837 break;
1838
1839 case FIT_SR_DRIVE_ONLINE:
1840 skdev->cur_max_queue_depth = skd_max_queue_depth;
1841 if (skdev->cur_max_queue_depth > skdev->dev_max_queue_depth)
1842 skdev->cur_max_queue_depth = skdev->dev_max_queue_depth;
1843
1844 skdev->queue_low_water_mark =
1845 skdev->cur_max_queue_depth * 2 / 3 + 1;
1846 if (skdev->queue_low_water_mark < 1)
1847 skdev->queue_low_water_mark = 1;
f98806d6
BVA		 1848 dev_info(&skdev->pdev->dev,
1849 "Queue depth limit=%d dev=%d lowat=%d\n",
1850 skdev->cur_max_queue_depth,
1851 skdev->dev_max_queue_depth,
1852 skdev->queue_low_water_mark);
e67f86b3
AB		 1853
1854 skd_refresh_device_data(skdev);
1855 break;
1856
1857 case FIT_SR_DRIVE_BUSY:
1858 skdev->state = SKD_DRVR_STATE_BUSY;
1859 skdev->timer_countdown = SKD_BUSY_TIMO;
1860 skd_quiesce_dev(skdev);
1861 break;
1862 case FIT_SR_DRIVE_BUSY_SANITIZE:
1863 /* set timer for 3 seconds, we'll abort any unfinished
1864 * commands after that expires
1865 */
1866 skdev->state = SKD_DRVR_STATE_BUSY_SANITIZE;
1867 skdev->timer_countdown = SKD_TIMER_SECONDS(3);
ca33dd92 1868 schedule_work(&skdev->start_queue);
e67f86b3
AB		 1869 break;
1870 case FIT_SR_DRIVE_BUSY_ERASE:
1871 skdev->state = SKD_DRVR_STATE_BUSY_ERASE;
1872 skdev->timer_countdown = SKD_BUSY_TIMO;
1873 break;
1874 case FIT_SR_DRIVE_OFFLINE:
1875 skdev->state = SKD_DRVR_STATE_IDLE;
1876 break;
1877 case FIT_SR_DRIVE_SOFT_RESET:
1878 switch (skdev->state) {
1879 case SKD_DRVR_STATE_STARTING:
1880 case SKD_DRVR_STATE_RESTARTING:
1881 /* Expected by a caller of skd_soft_reset() */
1882 break;
1883 default:
1884 skdev->state = SKD_DRVR_STATE_RESTARTING;
1885 break;
1886 }
1887 break;
1888 case FIT_SR_DRIVE_FW_BOOTING:
f98806d6 1889 dev_dbg(&skdev->pdev->dev, "ISR FIT_SR_DRIVE_FW_BOOTING\n");
e67f86b3
AB		 1890 skdev->state = SKD_DRVR_STATE_WAIT_BOOT;
1891 skdev->timer_countdown = SKD_WAIT_BOOT_TIMO;
1892 break;
1893
1894 case FIT_SR_DRIVE_DEGRADED:
1895 case FIT_SR_PCIE_LINK_DOWN:
1896 case FIT_SR_DRIVE_NEED_FW_DOWNLOAD:
1897 break;
1898
1899 case FIT_SR_DRIVE_FAULT:
1900 skd_drive_fault(skdev);
79ce12a8 1901 skd_recover_requests(skdev);
ca33dd92 1902 schedule_work(&skdev->start_queue);
e67f86b3
AB		 1903 break;
1904
1905 /* PCIe bus returned all Fs? */
1906 case 0xFF:
f98806d6
BVA		 1907 dev_info(&skdev->pdev->dev, "state=0x%x sense=0x%x\n", state,
1908 sense);
e67f86b3 1909 skd_drive_disappeared(skdev);
79ce12a8 1910 skd_recover_requests(skdev);
ca33dd92 1911 schedule_work(&skdev->start_queue);
e67f86b3
AB		 1912 break;
1913 default:
1914 /*
1915 * Uknown FW State. Wait for a state we recognize.
1916 */
1917 break;
1918 }
f98806d6
BVA		 1919 dev_err(&skdev->pdev->dev, "Driver state %s(%d)=>%s(%d)\n",
1920 skd_skdev_state_to_str(prev_driver_state), prev_driver_state,
1921 skd_skdev_state_to_str(skdev->state), skdev->state);
e67f86b3
AB		 1922}
1923
ca33dd92 1924static void skd_recover_request(struct request *req, void *data, bool reserved)
e67f86b3 1925{
ca33dd92
BVA		 1926 struct skd_device *const skdev = data;
1927 struct skd_request_context *skreq = blk_mq_rq_to_pdu(req);
e67f86b3 1928
4e54b849
BVA		 1929 if (skreq->state != SKD_REQ_STATE_BUSY)
1930 return;
e67f86b3 1931
4e54b849 1932 skd_log_skreq(skdev, skreq, "recover");
e67f86b3 1933
4e54b849
BVA		 1934 /* Release DMA resources for the request. */
1935 if (skreq->n_sg > 0)
1936 skd_postop_sg_list(skdev, skreq);
e67f86b3 1937
4e54b849 1938 skreq->state = SKD_REQ_STATE_IDLE;
e67f86b3 1939
4e54b849
BVA		 1940 skd_end_request(skdev, req, BLK_STS_IOERR);
1941}
e67f86b3 1942
4e54b849
BVA		 1943static void skd_recover_requests(struct skd_device *skdev)
1944{
ca33dd92 1945 blk_mq_tagset_busy_iter(&skdev->tag_set, skd_recover_request, skdev);
e67f86b3
AB		 1946}
1947
1948static void skd_isr_msg_from_dev(struct skd_device *skdev)
1949{
1950 u32 mfd;
1951 u32 mtd;
1952 u32 data;
1953
1954 mfd = SKD_READL(skdev, FIT_MSG_FROM_DEVICE);
1955
f98806d6
BVA		 1956 dev_dbg(&skdev->pdev->dev, "mfd=0x%x last_mtd=0x%x\n", mfd,
1957 skdev->last_mtd);
e67f86b3
AB		 1958
1959 /* ignore any mtd that is an ack for something we didn't send */
1960 if (FIT_MXD_TYPE(mfd) != FIT_MXD_TYPE(skdev->last_mtd))
1961 return;
1962
1963 switch (FIT_MXD_TYPE(mfd)) {
1964 case FIT_MTD_FITFW_INIT:
1965 skdev->proto_ver = FIT_PROTOCOL_MAJOR_VER(mfd);
1966
1967 if (skdev->proto_ver != FIT_PROTOCOL_VERSION_1) {
f98806d6
BVA		 1968 dev_err(&skdev->pdev->dev, "protocol mismatch\n");
1969 dev_err(&skdev->pdev->dev, " got=%d support=%d\n",
1970 skdev->proto_ver, FIT_PROTOCOL_VERSION_1);
1971 dev_err(&skdev->pdev->dev, " please upgrade driver\n");
e67f86b3
AB		 1972 skdev->state = SKD_DRVR_STATE_PROTOCOL_MISMATCH;
1973 skd_soft_reset(skdev);
1974 break;
1975 }
1976 mtd = FIT_MXD_CONS(FIT_MTD_GET_CMDQ_DEPTH, 0, 0);
1977 SKD_WRITEL(skdev, mtd, FIT_MSG_TO_DEVICE);
1978 skdev->last_mtd = mtd;
1979 break;
1980
1981 case FIT_MTD_GET_CMDQ_DEPTH:
1982 skdev->dev_max_queue_depth = FIT_MXD_DATA(mfd);
1983 mtd = FIT_MXD_CONS(FIT_MTD_SET_COMPQ_DEPTH, 0,
1984 SKD_N_COMPLETION_ENTRY);
1985 SKD_WRITEL(skdev, mtd, FIT_MSG_TO_DEVICE);
1986 skdev->last_mtd = mtd;
1987 break;
1988
1989 case FIT_MTD_SET_COMPQ_DEPTH:
1990 SKD_WRITEQ(skdev, skdev->cq_dma_address, FIT_MSG_TO_DEVICE_ARG);
1991 mtd = FIT_MXD_CONS(FIT_MTD_SET_COMPQ_ADDR, 0, 0);
1992 SKD_WRITEL(skdev, mtd, FIT_MSG_TO_DEVICE);
1993 skdev->last_mtd = mtd;
1994 break;
1995
1996 case FIT_MTD_SET_COMPQ_ADDR:
1997 skd_reset_skcomp(skdev);
1998 mtd = FIT_MXD_CONS(FIT_MTD_CMD_LOG_HOST_ID, 0, skdev->devno);
1999 SKD_WRITEL(skdev, mtd, FIT_MSG_TO_DEVICE);
2000 skdev->last_mtd = mtd;
2001 break;
2002
2003 case FIT_MTD_CMD_LOG_HOST_ID:
2004 skdev->connect_time_stamp = get_seconds();
2005 data = skdev->connect_time_stamp & 0xFFFF;
2006 mtd = FIT_MXD_CONS(FIT_MTD_CMD_LOG_TIME_STAMP_LO, 0, data);
2007 SKD_WRITEL(skdev, mtd, FIT_MSG_TO_DEVICE);
2008 skdev->last_mtd = mtd;
2009 break;
2010
2011 case FIT_MTD_CMD_LOG_TIME_STAMP_LO:
2012 skdev->drive_jiffies = FIT_MXD_DATA(mfd);
2013 data = (skdev->connect_time_stamp >> 16) & 0xFFFF;
2014 mtd = FIT_MXD_CONS(FIT_MTD_CMD_LOG_TIME_STAMP_HI, 0, data);
2015 SKD_WRITEL(skdev, mtd, FIT_MSG_TO_DEVICE);
2016 skdev->last_mtd = mtd;
2017 break;
2018
2019 case FIT_MTD_CMD_LOG_TIME_STAMP_HI:
2020 skdev->drive_jiffies |= (FIT_MXD_DATA(mfd) << 16);
2021 mtd = FIT_MXD_CONS(FIT_MTD_ARM_QUEUE, 0, 0);
2022 SKD_WRITEL(skdev, mtd, FIT_MSG_TO_DEVICE);
2023 skdev->last_mtd = mtd;
2024
f98806d6
BVA		 2025 dev_err(&skdev->pdev->dev, "Time sync driver=0x%x device=0x%x\n",
2026 skdev->connect_time_stamp, skdev->drive_jiffies);
e67f86b3
AB		 2027 break;
2028
2029 case FIT_MTD_ARM_QUEUE:
2030 skdev->last_mtd = 0;
2031 /*
2032 * State should be, or soon will be, FIT_SR_DRIVE_ONLINE.
2033 */
2034 break;
2035
2036 default:
2037 break;
2038 }
2039}
2040
2041static void skd_disable_interrupts(struct skd_device *skdev)
2042{
2043 u32 sense;
2044
2045 sense = SKD_READL(skdev, FIT_CONTROL);
2046 sense &= ~FIT_CR_ENABLE_INTERRUPTS;
2047 SKD_WRITEL(skdev, sense, FIT_CONTROL);
f98806d6 2048 dev_dbg(&skdev->pdev->dev, "sense 0x%x\n", sense);
e67f86b3
AB		 2049
2050 /* Note that the 1s is written. A 1-bit means
2051 * disable, a 0 means enable.
2052 */
2053 SKD_WRITEL(skdev, ~0, FIT_INT_MASK_HOST);
2054}
2055
2056static void skd_enable_interrupts(struct skd_device *skdev)
2057{
2058 u32 val;
2059
2060 /* unmask interrupts first */
2061 val = FIT_ISH_FW_STATE_CHANGE +
2062 FIT_ISH_COMPLETION_POSTED + FIT_ISH_MSG_FROM_DEV;
2063
2064 /* Note that the compliment of mask is written. A 1-bit means
2065 * disable, a 0 means enable. */
2066 SKD_WRITEL(skdev, ~val, FIT_INT_MASK_HOST);
f98806d6 2067 dev_dbg(&skdev->pdev->dev, "interrupt mask=0x%x\n", ~val);
e67f86b3
AB		 2068
2069 val = SKD_READL(skdev, FIT_CONTROL);
2070 val |= FIT_CR_ENABLE_INTERRUPTS;
f98806d6 2071 dev_dbg(&skdev->pdev->dev, "control=0x%x\n", val);
e67f86b3
AB		 2072 SKD_WRITEL(skdev, val, FIT_CONTROL);
2073}
2074
2075/*
2076 *****************************************************************************
2077 * START, STOP, RESTART, QUIESCE, UNQUIESCE
2078 *****************************************************************************
2079 */
2080
2081static void skd_soft_reset(struct skd_device *skdev)
2082{
2083 u32 val;
2084
2085 val = SKD_READL(skdev, FIT_CONTROL);
2086 val |= (FIT_CR_SOFT_RESET);
f98806d6 2087 dev_dbg(&skdev->pdev->dev, "control=0x%x\n", val);
e67f86b3
AB		 2088 SKD_WRITEL(skdev, val, FIT_CONTROL);
2089}
2090
2091static void skd_start_device(struct skd_device *skdev)
2092{
2093 unsigned long flags;
2094 u32 sense;
2095 u32 state;
2096
2097 spin_lock_irqsave(&skdev->lock, flags);
2098
2099 /* ack all ghost interrupts */
2100 SKD_WRITEL(skdev, FIT_INT_DEF_MASK, FIT_INT_STATUS_HOST);
2101
2102 sense = SKD_READL(skdev, FIT_STATUS);
2103
f98806d6 2104 dev_dbg(&skdev->pdev->dev, "initial status=0x%x\n", sense);
e67f86b3
AB		 2105
2106 state = sense & FIT_SR_DRIVE_STATE_MASK;
2107 skdev->drive_state = state;
2108 skdev->last_mtd = 0;
2109
2110 skdev->state = SKD_DRVR_STATE_STARTING;
2111 skdev->timer_countdown = SKD_STARTING_TIMO;
2112
2113 skd_enable_interrupts(skdev);
2114
2115 switch (skdev->drive_state) {
2116 case FIT_SR_DRIVE_OFFLINE:
f98806d6 2117 dev_err(&skdev->pdev->dev, "Drive offline...\n");
e67f86b3
AB		 2118 break;
2119
2120 case FIT_SR_DRIVE_FW_BOOTING:
f98806d6 2121 dev_dbg(&skdev->pdev->dev, "FIT_SR_DRIVE_FW_BOOTING\n");
e67f86b3
AB		 2122 skdev->state = SKD_DRVR_STATE_WAIT_BOOT;
2123 skdev->timer_countdown = SKD_WAIT_BOOT_TIMO;
2124 break;
2125
2126 case FIT_SR_DRIVE_BUSY_SANITIZE:
f98806d6 2127 dev_info(&skdev->pdev->dev, "Start: BUSY_SANITIZE\n");
e67f86b3
AB		 2128 skdev->state = SKD_DRVR_STATE_BUSY_SANITIZE;
2129 skdev->timer_countdown = SKD_STARTED_BUSY_TIMO;
2130 break;
2131
2132 case FIT_SR_DRIVE_BUSY_ERASE:
f98806d6 2133 dev_info(&skdev->pdev->dev, "Start: BUSY_ERASE\n");
e67f86b3
AB		 2134 skdev->state = SKD_DRVR_STATE_BUSY_ERASE;
2135 skdev->timer_countdown = SKD_STARTED_BUSY_TIMO;
2136 break;
2137
2138 case FIT_SR_DRIVE_INIT:
2139 case FIT_SR_DRIVE_ONLINE:
2140 skd_soft_reset(skdev);
2141 break;
2142
2143 case FIT_SR_DRIVE_BUSY:
f98806d6 2144 dev_err(&skdev->pdev->dev, "Drive Busy...\n");
e67f86b3
AB		 2145 skdev->state = SKD_DRVR_STATE_BUSY;
2146 skdev->timer_countdown = SKD_STARTED_BUSY_TIMO;
2147 break;
2148
2149 case FIT_SR_DRIVE_SOFT_RESET:
f98806d6 2150 dev_err(&skdev->pdev->dev, "drive soft reset in prog\n");
e67f86b3
AB		 2151 break;
2152
2153 case FIT_SR_DRIVE_FAULT:
2154 /* Fault state is bad...soft reset won't do it...
2155 * Hard reset, maybe, but does it work on device?
2156 * For now, just fault so the system doesn't hang.
2157 */
2158 skd_drive_fault(skdev);
2159 /*start the queue so we can respond with error to requests */
f98806d6 2160 dev_dbg(&skdev->pdev->dev, "starting queue\n");
ca33dd92 2161 schedule_work(&skdev->start_queue);
e67f86b3
AB		 2162 skdev->gendisk_on = -1;
2163 wake_up_interruptible(&skdev->waitq);
2164 break;
2165
2166 case 0xFF:
2167 /* Most likely the device isn't there or isn't responding
2168 * to the BAR1 addresses. */
2169 skd_drive_disappeared(skdev);
2170 /*start the queue so we can respond with error to requests */
f98806d6
BVA		 2171 dev_dbg(&skdev->pdev->dev,
2172 "starting queue to error-out reqs\n");
ca33dd92 2173 schedule_work(&skdev->start_queue);
e67f86b3
AB		 2174 skdev->gendisk_on = -1;
2175 wake_up_interruptible(&skdev->waitq);
2176 break;
2177
2178 default:
f98806d6
BVA		 2179 dev_err(&skdev->pdev->dev, "Start: unknown state %x\n",
2180 skdev->drive_state);
e67f86b3
AB		 2181 break;
2182 }
2183
2184 state = SKD_READL(skdev, FIT_CONTROL);
f98806d6 2185 dev_dbg(&skdev->pdev->dev, "FIT Control Status=0x%x\n", state);
e67f86b3
AB		 2186
2187 state = SKD_READL(skdev, FIT_INT_STATUS_HOST);
f98806d6 2188 dev_dbg(&skdev->pdev->dev, "Intr Status=0x%x\n", state);
e67f86b3
AB		 2189
2190 state = SKD_READL(skdev, FIT_INT_MASK_HOST);
f98806d6 2191 dev_dbg(&skdev->pdev->dev, "Intr Mask=0x%x\n", state);
e67f86b3
AB		 2192
2193 state = SKD_READL(skdev, FIT_MSG_FROM_DEVICE);
f98806d6 2194 dev_dbg(&skdev->pdev->dev, "Msg from Dev=0x%x\n", state);
e67f86b3
AB		 2195
2196 state = SKD_READL(skdev, FIT_HW_VERSION);
f98806d6 2197 dev_dbg(&skdev->pdev->dev, "HW version=0x%x\n", state);
e67f86b3
AB		 2198
2199 spin_unlock_irqrestore(&skdev->lock, flags);
2200}
2201
2202static void skd_stop_device(struct skd_device *skdev)
2203{
2204 unsigned long flags;
2205 struct skd_special_context *skspcl = &skdev->internal_skspcl;
2206 u32 dev_state;
2207 int i;
2208
2209 spin_lock_irqsave(&skdev->lock, flags);
2210
2211 if (skdev->state != SKD_DRVR_STATE_ONLINE) {
f98806d6 2212 dev_err(&skdev->pdev->dev, "%s not online no sync\n", __func__);
e67f86b3
AB		 2213 goto stop_out;
2214 }
2215
2216 if (skspcl->req.state != SKD_REQ_STATE_IDLE) {
f98806d6 2217 dev_err(&skdev->pdev->dev, "%s no special\n", __func__);
e67f86b3
AB		 2218 goto stop_out;
2219 }
2220
2221 skdev->state = SKD_DRVR_STATE_SYNCING;
2222 skdev->sync_done = 0;
2223
2224 skd_send_internal_skspcl(skdev, skspcl, SYNCHRONIZE_CACHE);
2225
2226 spin_unlock_irqrestore(&skdev->lock, flags);
2227
2228 wait_event_interruptible_timeout(skdev->waitq,
2229 (skdev->sync_done), (10 * HZ));
2230
2231 spin_lock_irqsave(&skdev->lock, flags);
2232
2233 switch (skdev->sync_done) {
2234 case 0:
f98806d6 2235 dev_err(&skdev->pdev->dev, "%s no sync\n", __func__);
e67f86b3
AB		 2236 break;
2237 case 1:
f98806d6 2238 dev_err(&skdev->pdev->dev, "%s sync done\n", __func__);
e67f86b3
AB		 2239 break;
2240 default:
f98806d6 2241 dev_err(&skdev->pdev->dev, "%s sync error\n", __func__);
e67f86b3
AB		 2242 }
2243
2244stop_out:
2245 skdev->state = SKD_DRVR_STATE_STOPPING;
2246 spin_unlock_irqrestore(&skdev->lock, flags);
2247
2248 skd_kill_timer(skdev);
2249
2250 spin_lock_irqsave(&skdev->lock, flags);
2251 skd_disable_interrupts(skdev);
2252
2253 /* ensure all ints on device are cleared */
2254 /* soft reset the device to unload with a clean slate */
2255 SKD_WRITEL(skdev, FIT_INT_DEF_MASK, FIT_INT_STATUS_HOST);
2256 SKD_WRITEL(skdev, FIT_CR_SOFT_RESET, FIT_CONTROL);
2257
2258 spin_unlock_irqrestore(&skdev->lock, flags);
2259
2260 /* poll every 100ms, 1 second timeout */
2261 for (i = 0; i < 10; i++) {
2262 dev_state =
2263 SKD_READL(skdev, FIT_STATUS) & FIT_SR_DRIVE_STATE_MASK;
2264 if (dev_state == FIT_SR_DRIVE_INIT)
2265 break;
2266 set_current_state(TASK_INTERRUPTIBLE);
2267 schedule_timeout(msecs_to_jiffies(100));
2268 }
2269
2270 if (dev_state != FIT_SR_DRIVE_INIT)
f98806d6
BVA		 2271 dev_err(&skdev->pdev->dev, "%s state error 0x%02x\n", __func__,
2272 dev_state);
e67f86b3
AB		 2273}
2274
2275/* assume spinlock is held */
2276static void skd_restart_device(struct skd_device *skdev)
2277{
2278 u32 state;
2279
2280 /* ack all ghost interrupts */
2281 SKD_WRITEL(skdev, FIT_INT_DEF_MASK, FIT_INT_STATUS_HOST);
2282
2283 state = SKD_READL(skdev, FIT_STATUS);
2284
f98806d6 2285 dev_dbg(&skdev->pdev->dev, "drive status=0x%x\n", state);
e67f86b3
AB		 2286
2287 state &= FIT_SR_DRIVE_STATE_MASK;
2288 skdev->drive_state = state;
2289 skdev->last_mtd = 0;
2290
2291 skdev->state = SKD_DRVR_STATE_RESTARTING;
2292 skdev->timer_countdown = SKD_RESTARTING_TIMO;
2293
2294 skd_soft_reset(skdev);
2295}
2296
2297/* assume spinlock is held */
2298static int skd_quiesce_dev(struct skd_device *skdev)
2299{
2300 int rc = 0;
2301
2302 switch (skdev->state) {
2303 case SKD_DRVR_STATE_BUSY:
2304 case SKD_DRVR_STATE_BUSY_IMMINENT:
f98806d6 2305 dev_dbg(&skdev->pdev->dev, "stopping queue\n");
ca33dd92 2306 blk_mq_stop_hw_queues(skdev->queue);
e67f86b3
AB		 2307 break;
2308 case SKD_DRVR_STATE_ONLINE:
2309 case SKD_DRVR_STATE_STOPPING:
2310 case SKD_DRVR_STATE_SYNCING:
2311 case SKD_DRVR_STATE_PAUSING:
2312 case SKD_DRVR_STATE_PAUSED:
2313 case SKD_DRVR_STATE_STARTING:
2314 case SKD_DRVR_STATE_RESTARTING:
2315 case SKD_DRVR_STATE_RESUMING:
2316 default:
2317 rc = -EINVAL;
f98806d6
BVA		 2318 dev_dbg(&skdev->pdev->dev, "state [%d] not implemented\n",
2319 skdev->state);
e67f86b3
AB		 2320 }
2321 return rc;
2322}
2323
2324/* assume spinlock is held */
2325static int skd_unquiesce_dev(struct skd_device *skdev)
2326{
2327 int prev_driver_state = skdev->state;
2328
2329 skd_log_skdev(skdev, "unquiesce");
2330 if (skdev->state == SKD_DRVR_STATE_ONLINE) {
f98806d6 2331 dev_dbg(&skdev->pdev->dev, "**** device already ONLINE\n");
e67f86b3
AB		 2332 return 0;
2333 }
2334 if (skdev->drive_state != FIT_SR_DRIVE_ONLINE) {
2335 /*
2336 * If there has been an state change to other than
2337 * ONLINE, we will rely on controller state change
2338 * to come back online and restart the queue.
2339 * The BUSY state means that driver is ready to
2340 * continue normal processing but waiting for controller
2341 * to become available.
2342 */
2343 skdev->state = SKD_DRVR_STATE_BUSY;
f98806d6 2344 dev_dbg(&skdev->pdev->dev, "drive BUSY state\n");
e67f86b3
AB		 2345 return 0;
2346 }
2347
2348 /*
2349 * Drive has just come online, driver is either in startup,
2350 * paused performing a task, or bust waiting for hardware.
2351 */
2352 switch (skdev->state) {
2353 case SKD_DRVR_STATE_PAUSED:
2354 case SKD_DRVR_STATE_BUSY:
2355 case SKD_DRVR_STATE_BUSY_IMMINENT:
2356 case SKD_DRVR_STATE_BUSY_ERASE:
2357 case SKD_DRVR_STATE_STARTING:
2358 case SKD_DRVR_STATE_RESTARTING:
2359 case SKD_DRVR_STATE_FAULT:
2360 case SKD_DRVR_STATE_IDLE:
2361 case SKD_DRVR_STATE_LOAD:
2362 skdev->state = SKD_DRVR_STATE_ONLINE;
f98806d6
BVA		 2363 dev_err(&skdev->pdev->dev, "Driver state %s(%d)=>%s(%d)\n",
2364 skd_skdev_state_to_str(prev_driver_state),
2365 prev_driver_state, skd_skdev_state_to_str(skdev->state),
2366 skdev->state);
2367 dev_dbg(&skdev->pdev->dev,
2368 "**** device ONLINE...starting block queue\n");
2369 dev_dbg(&skdev->pdev->dev, "starting queue\n");
2370 dev_info(&skdev->pdev->dev, "STEC s1120 ONLINE\n");
ca33dd92 2371 schedule_work(&skdev->start_queue);
e67f86b3
AB		 2372 skdev->gendisk_on = 1;
2373 wake_up_interruptible(&skdev->waitq);
2374 break;
2375
2376 case SKD_DRVR_STATE_DISAPPEARED:
2377 default:
f98806d6
BVA		 2378 dev_dbg(&skdev->pdev->dev,
2379 "**** driver state %d, not implemented\n",
2380 skdev->state);
e67f86b3
AB		 2381 return -EBUSY;
2382 }
2383 return 0;
2384}
2385
2386/*
2387 *****************************************************************************
2388 * PCIe MSI/MSI-X INTERRUPT HANDLERS
2389 *****************************************************************************
2390 */
2391
2392static irqreturn_t skd_reserved_isr(int irq, void *skd_host_data)
2393{
2394 struct skd_device *skdev = skd_host_data;
2395 unsigned long flags;
2396
2397 spin_lock_irqsave(&skdev->lock, flags);
f98806d6
BVA		 2398 dev_dbg(&skdev->pdev->dev, "MSIX = 0x%x\n",
2399 SKD_READL(skdev, FIT_INT_STATUS_HOST));
2400 dev_err(&skdev->pdev->dev, "MSIX reserved irq %d = 0x%x\n", irq,
2401 SKD_READL(skdev, FIT_INT_STATUS_HOST));
e67f86b3
AB		 2402 SKD_WRITEL(skdev, FIT_INT_RESERVED_MASK, FIT_INT_STATUS_HOST);
2403 spin_unlock_irqrestore(&skdev->lock, flags);
2404 return IRQ_HANDLED;
2405}
2406
2407static irqreturn_t skd_statec_isr(int irq, void *skd_host_data)
2408{
2409 struct skd_device *skdev = skd_host_data;
2410 unsigned long flags;
2411
2412 spin_lock_irqsave(&skdev->lock, flags);
f98806d6
BVA		 2413 dev_dbg(&skdev->pdev->dev, "MSIX = 0x%x\n",
2414 SKD_READL(skdev, FIT_INT_STATUS_HOST));
e67f86b3
AB		 2415 SKD_WRITEL(skdev, FIT_ISH_FW_STATE_CHANGE, FIT_INT_STATUS_HOST);
2416 skd_isr_fwstate(skdev);
2417 spin_unlock_irqrestore(&skdev->lock, flags);
2418 return IRQ_HANDLED;
2419}
2420
2421static irqreturn_t skd_comp_q(int irq, void *skd_host_data)
2422{
2423 struct skd_device *skdev = skd_host_data;
2424 unsigned long flags;
2425 int flush_enqueued = 0;
2426 int deferred;
2427
2428 spin_lock_irqsave(&skdev->lock, flags);
f98806d6
BVA		 2429 dev_dbg(&skdev->pdev->dev, "MSIX = 0x%x\n",
2430 SKD_READL(skdev, FIT_INT_STATUS_HOST));
e67f86b3
AB		 2431 SKD_WRITEL(skdev, FIT_ISH_COMPLETION_POSTED, FIT_INT_STATUS_HOST);
2432 deferred = skd_isr_completion_posted(skdev, skd_isr_comp_limit,
2433 &flush_enqueued);
e67f86b3 2434 if (flush_enqueued)
ca33dd92 2435 schedule_work(&skdev->start_queue);
e67f86b3
AB		 2436
2437 if (deferred)
2438 schedule_work(&skdev->completion_worker);
2439 else if (!flush_enqueued)
ca33dd92 2440 schedule_work(&skdev->start_queue);
e67f86b3
AB		 2441
2442 spin_unlock_irqrestore(&skdev->lock, flags);
2443
2444 return IRQ_HANDLED;
2445}
2446
2447static irqreturn_t skd_msg_isr(int irq, void *skd_host_data)
2448{
2449 struct skd_device *skdev = skd_host_data;
2450 unsigned long flags;
2451
2452 spin_lock_irqsave(&skdev->lock, flags);
f98806d6
BVA		 2453 dev_dbg(&skdev->pdev->dev, "MSIX = 0x%x\n",
2454 SKD_READL(skdev, FIT_INT_STATUS_HOST));
e67f86b3
AB		 2455 SKD_WRITEL(skdev, FIT_ISH_MSG_FROM_DEV, FIT_INT_STATUS_HOST);
2456 skd_isr_msg_from_dev(skdev);
2457 spin_unlock_irqrestore(&skdev->lock, flags);
2458 return IRQ_HANDLED;
2459}
2460
2461static irqreturn_t skd_qfull_isr(int irq, void *skd_host_data)
2462{
2463 struct skd_device *skdev = skd_host_data;
2464 unsigned long flags;
2465
2466 spin_lock_irqsave(&skdev->lock, flags);
f98806d6
BVA		 2467 dev_dbg(&skdev->pdev->dev, "MSIX = 0x%x\n",
2468 SKD_READL(skdev, FIT_INT_STATUS_HOST));
e67f86b3
AB		 2469 SKD_WRITEL(skdev, FIT_INT_QUEUE_FULL, FIT_INT_STATUS_HOST);
2470 spin_unlock_irqrestore(&skdev->lock, flags);
2471 return IRQ_HANDLED;
2472}
2473
2474/*
2475 *****************************************************************************
2476 * PCIe MSI/MSI-X SETUP
2477 *****************************************************************************
2478 */
2479
2480struct skd_msix_entry {
e67f86b3
AB		 2481 char isr_name[30];
2482};
2483
2484struct skd_init_msix_entry {
2485 const char *name;
2486 irq_handler_t handler;
2487};
2488
2489#define SKD_MAX_MSIX_COUNT 13
2490#define SKD_MIN_MSIX_COUNT 7
2491#define SKD_BASE_MSIX_IRQ 4
2492
2493static struct skd_init_msix_entry msix_entries[SKD_MAX_MSIX_COUNT] = {
2494 { "(DMA 0)", skd_reserved_isr },
2495 { "(DMA 1)", skd_reserved_isr },
2496 { "(DMA 2)", skd_reserved_isr },
2497 { "(DMA 3)", skd_reserved_isr },
2498 { "(State Change)", skd_statec_isr },
2499 { "(COMPL_Q)", skd_comp_q },
2500 { "(MSG)", skd_msg_isr },
2501 { "(Reserved)", skd_reserved_isr },
2502 { "(Reserved)", skd_reserved_isr },
2503 { "(Queue Full 0)", skd_qfull_isr },
2504 { "(Queue Full 1)", skd_qfull_isr },
2505 { "(Queue Full 2)", skd_qfull_isr },
2506 { "(Queue Full 3)", skd_qfull_isr },
2507};
2508
e67f86b3
AB		 2509static int skd_acquire_msix(struct skd_device *skdev)
2510{
a9df8625 2511 int i, rc;
46817769 2512 struct pci_dev *pdev = skdev->pdev;
e67f86b3 2513
180b0ae7
CH		 2514 rc = pci_alloc_irq_vectors(pdev, SKD_MAX_MSIX_COUNT, SKD_MAX_MSIX_COUNT,
2515 PCI_IRQ_MSIX);
2516 if (rc < 0) {
f98806d6 2517 dev_err(&skdev->pdev->dev, "failed to enable MSI-X %d\n", rc);
3bc8492f 2518 goto out;
e67f86b3 2519 }
46817769 2520
180b0ae7
CH		 2521 skdev->msix_entries = kcalloc(SKD_MAX_MSIX_COUNT,
2522 sizeof(struct skd_msix_entry), GFP_KERNEL);
e67f86b3
AB		 2523 if (!skdev->msix_entries) {
2524 rc = -ENOMEM;
f98806d6 2525 dev_err(&skdev->pdev->dev, "msix table allocation error\n");
3bc8492f 2526 goto out;
e67f86b3
AB		 2527 }
2528
e67f86b3 2529 /* Enable MSI-X vectors for the base queue */
180b0ae7
CH		 2530 for (i = 0; i < SKD_MAX_MSIX_COUNT; i++) {
2531 struct skd_msix_entry *qentry = &skdev->msix_entries[i];
2532
e67f86b3
AB		 2533 snprintf(qentry->isr_name, sizeof(qentry->isr_name),
2534 "%s%d-msix %s", DRV_NAME, skdev->devno,
2535 msix_entries[i].name);
180b0ae7
CH		 2536
2537 rc = devm_request_irq(&skdev->pdev->dev,
2538 pci_irq_vector(skdev->pdev, i),
2539 msix_entries[i].handler, 0,
2540 qentry->isr_name, skdev);
e67f86b3 2541 if (rc) {
f98806d6
BVA		 2542 dev_err(&skdev->pdev->dev,
2543 "Unable to register(%d) MSI-X handler %d: %s\n",
2544 rc, i, qentry->isr_name);
e67f86b3 2545 goto msix_out;
e67f86b3
AB		 2546 }
2547 }
180b0ae7 2548
f98806d6
BVA		 2549 dev_dbg(&skdev->pdev->dev, "%d msix irq(s) enabled\n",
2550 SKD_MAX_MSIX_COUNT);
e67f86b3
AB		 2551 return 0;
2552
2553msix_out:
180b0ae7
CH		 2554 while (--i >= 0)
2555 devm_free_irq(&pdev->dev, pci_irq_vector(pdev, i), skdev);
3bc8492f 2556out:
180b0ae7
CH		 2557 kfree(skdev->msix_entries);
2558 skdev->msix_entries = NULL;
e67f86b3
AB		 2559 return rc;
2560}
2561
2562static int skd_acquire_irq(struct skd_device *skdev)
2563{
180b0ae7
CH		 2564 struct pci_dev *pdev = skdev->pdev;
2565 unsigned int irq_flag = PCI_IRQ_LEGACY;
e67f86b3 2566 int rc;
e67f86b3 2567
180b0ae7 2568 if (skd_isr_type == SKD_IRQ_MSIX) {
e67f86b3
AB		 2569 rc = skd_acquire_msix(skdev);
2570 if (!rc)
180b0ae7
CH		 2571 return 0;
2572
f98806d6
BVA		 2573 dev_err(&skdev->pdev->dev,
2574 "failed to enable MSI-X, re-trying with MSI %d\n", rc);
e67f86b3 2575 }
180b0ae7
CH		 2576
2577 snprintf(skdev->isr_name, sizeof(skdev->isr_name), "%s%d", DRV_NAME,
2578 skdev->devno);
2579
2580 if (skd_isr_type != SKD_IRQ_LEGACY)
2581 irq_flag |= PCI_IRQ_MSI;
2582 rc = pci_alloc_irq_vectors(pdev, 1, 1, irq_flag);
2583 if (rc < 0) {
f98806d6
BVA		 2584 dev_err(&skdev->pdev->dev,
2585 "failed to allocate the MSI interrupt %d\n", rc);
180b0ae7
CH		 2586 return rc;
2587 }
2588
2589 rc = devm_request_irq(&pdev->dev, pdev->irq, skd_isr,
2590 pdev->msi_enabled ? 0 : IRQF_SHARED,
2591 skdev->isr_name, skdev);
2592 if (rc) {
2593 pci_free_irq_vectors(pdev);
f98806d6
BVA		 2594 dev_err(&skdev->pdev->dev, "failed to allocate interrupt %d\n",
2595 rc);
180b0ae7
CH		 2596 return rc;
2597 }
2598
2599 return 0;
e67f86b3
AB		 2600}
2601
2602static void skd_release_irq(struct skd_device *skdev)
2603{
180b0ae7
CH		 2604 struct pci_dev *pdev = skdev->pdev;
2605
2606 if (skdev->msix_entries) {
2607 int i;
2608
2609 for (i = 0; i < SKD_MAX_MSIX_COUNT; i++) {
2610 devm_free_irq(&pdev->dev, pci_irq_vector(pdev, i),
2611 skdev);
2612 }
2613
2614 kfree(skdev->msix_entries);
2615 skdev->msix_entries = NULL;
2616 } else {
2617 devm_free_irq(&pdev->dev, pdev->irq, skdev);
e67f86b3 2618 }
180b0ae7
CH		 2619
2620 pci_free_irq_vectors(pdev);
e67f86b3
AB		 2621}
2622
2623/*
2624 *****************************************************************************
2625 * CONSTRUCT
2626 *****************************************************************************
2627 */
2628
a3db102d
BVA		 2629static void *skd_alloc_dma(struct skd_device *skdev, struct kmem_cache *s,
2630 dma_addr_t *dma_handle, gfp_t gfp,
2631 enum dma_data_direction dir)
2632{
2633 struct device *dev = &skdev->pdev->dev;
2634 void *buf;
2635
2636 buf = kmem_cache_alloc(s, gfp);
2637 if (!buf)
2638 return NULL;
2639 *dma_handle = dma_map_single(dev, buf, s->size, dir);
2640 if (dma_mapping_error(dev, *dma_handle)) {
2641 kfree(buf);
2642 buf = NULL;
2643 }
2644 return buf;
2645}
2646
2647static void skd_free_dma(struct skd_device *skdev, struct kmem_cache *s,
2648 void *vaddr, dma_addr_t dma_handle,
2649 enum dma_data_direction dir)
2650{
2651 if (!vaddr)
2652 return;
2653
2654 dma_unmap_single(&skdev->pdev->dev, dma_handle, s->size, dir);
2655 kmem_cache_free(s, vaddr);
2656}
2657
e67f86b3
AB		 2658static int skd_cons_skcomp(struct skd_device *skdev)
2659{
2660 int rc = 0;
2661 struct fit_completion_entry_v1 *skcomp;
e67f86b3 2662
f98806d6 2663 dev_dbg(&skdev->pdev->dev,
6f7c7675
BVA		 2664 "comp pci_alloc, total bytes %zd entries %d\n",
2665 SKD_SKCOMP_SIZE, SKD_N_COMPLETION_ENTRY);
e67f86b3 2666
6f7c7675 2667 skcomp = pci_zalloc_consistent(skdev->pdev, SKD_SKCOMP_SIZE,
a5bbf616 2668 &skdev->cq_dma_address);
e67f86b3
AB		 2669
2670 if (skcomp == NULL) {
2671 rc = -ENOMEM;
2672 goto err_out;
2673 }
2674
e67f86b3
AB		 2675 skdev->skcomp_table = skcomp;
2676 skdev->skerr_table = (struct fit_comp_error_info *)((char *)skcomp +
2677 sizeof(*skcomp) *
2678 SKD_N_COMPLETION_ENTRY);
2679
2680err_out:
2681 return rc;
2682}
2683
2684static int skd_cons_skmsg(struct skd_device *skdev)
2685{
2686 int rc = 0;
2687 u32 i;
2688
f98806d6 2689 dev_dbg(&skdev->pdev->dev,
01433d0d 2690 "skmsg_table kcalloc, struct %lu, count %u total %lu\n",
f98806d6
BVA		 2691 sizeof(struct skd_fitmsg_context), skdev->num_fitmsg_context,
2692 sizeof(struct skd_fitmsg_context) * skdev->num_fitmsg_context);
e67f86b3 2693
01433d0d
BVA		 2694 skdev->skmsg_table = kcalloc(skdev->num_fitmsg_context,
2695 sizeof(struct skd_fitmsg_context),
2696 GFP_KERNEL);
e67f86b3
AB		 2697 if (skdev->skmsg_table == NULL) {
2698 rc = -ENOMEM;
2699 goto err_out;
2700 }
2701
2702 for (i = 0; i < skdev->num_fitmsg_context; i++) {
2703 struct skd_fitmsg_context *skmsg;
2704
2705 skmsg = &skdev->skmsg_table[i];
2706
2707 skmsg->id = i + SKD_ID_FIT_MSG;
2708
e67f86b3 2709 skmsg->msg_buf = pci_alloc_consistent(skdev->pdev,
6507f436 2710 SKD_N_FITMSG_BYTES,
e67f86b3
AB		 2711 &skmsg->mb_dma_address);
2712
2713 if (skmsg->msg_buf == NULL) {
2714 rc = -ENOMEM;
2715 goto err_out;
2716 }
2717
6507f436
BVA		 2718 WARN(((uintptr_t)skmsg->msg_buf | skmsg->mb_dma_address) &
2719 (FIT_QCMD_ALIGN - 1),
2720 "not aligned: msg_buf %p mb_dma_address %#llx\n",
2721 skmsg->msg_buf, skmsg->mb_dma_address);
e67f86b3 2722 memset(skmsg->msg_buf, 0, SKD_N_FITMSG_BYTES);
e67f86b3
AB		 2723 }
2724
e67f86b3
AB		 2725err_out:
2726 return rc;
2727}
2728
542d7b00
BZ		 2729static struct fit_sg_descriptor *skd_cons_sg_list(struct skd_device *skdev,
2730 u32 n_sg,
2731 dma_addr_t *ret_dma_addr)
2732{
2733 struct fit_sg_descriptor *sg_list;
542d7b00 2734
a3db102d
BVA		 2735 sg_list = skd_alloc_dma(skdev, skdev->sglist_cache, ret_dma_addr,
2736 GFP_DMA | __GFP_ZERO, DMA_TO_DEVICE);
542d7b00
BZ		 2737
2738 if (sg_list != NULL) {
2739 uint64_t dma_address = *ret_dma_addr;
2740 u32 i;
2741
542d7b00
BZ		 2742 for (i = 0; i < n_sg - 1; i++) {
2743 uint64_t ndp_off;
2744 ndp_off = (i + 1) * sizeof(struct fit_sg_descriptor);
2745
2746 sg_list[i].next_desc_ptr = dma_address + ndp_off;
2747 }
2748 sg_list[i].next_desc_ptr = 0LL;
2749 }
2750
2751 return sg_list;
2752}
2753
5d003240 2754static void skd_free_sg_list(struct skd_device *skdev,
a3db102d 2755 struct fit_sg_descriptor *sg_list,
5d003240
BVA		 2756 dma_addr_t dma_addr)
2757{
5d003240
BVA		 2758 if (WARN_ON_ONCE(!sg_list))
2759 return;
2760
a3db102d
BVA		 2761 skd_free_dma(skdev, skdev->sglist_cache, sg_list, dma_addr,
2762 DMA_TO_DEVICE);
5d003240
BVA		 2763}
2764
ca33dd92
BVA		 2765static int skd_init_request(struct blk_mq_tag_set *set, struct request *rq,
2766 unsigned int hctx_idx, unsigned int numa_node)
e67f86b3 2767{
ca33dd92 2768 struct skd_device *skdev = set->driver_data;
e7278a8b 2769 struct skd_request_context *skreq = blk_mq_rq_to_pdu(rq);
e67f86b3 2770
e7278a8b
BVA		 2771 skreq->state = SKD_REQ_STATE_IDLE;
2772 skreq->sg = (void *)(skreq + 1);
2773 sg_init_table(skreq->sg, skd_sgs_per_request);
2774 skreq->sksg_list = skd_cons_sg_list(skdev, skd_sgs_per_request,
2775 &skreq->sksg_dma_address);
e67f86b3 2776
e7278a8b
BVA		 2777 return skreq->sksg_list ? 0 : -ENOMEM;
2778}
e67f86b3 2779
ca33dd92
BVA		 2780static void skd_exit_request(struct blk_mq_tag_set *set, struct request *rq,
2781 unsigned int hctx_idx)
e7278a8b 2782{
ca33dd92 2783 struct skd_device *skdev = set->driver_data;
e7278a8b 2784 struct skd_request_context *skreq = blk_mq_rq_to_pdu(rq);
e67f86b3 2785
a3db102d 2786 skd_free_sg_list(skdev, skreq->sksg_list, skreq->sksg_dma_address);
e67f86b3
AB		 2787}
2788
e67f86b3
AB		 2789static int skd_cons_sksb(struct skd_device *skdev)
2790{
2791 int rc = 0;
2792 struct skd_special_context *skspcl;
e67f86b3
AB		 2793
2794 skspcl = &skdev->internal_skspcl;
2795
2796 skspcl->req.id = 0 + SKD_ID_INTERNAL;
2797 skspcl->req.state = SKD_REQ_STATE_IDLE;
2798
a3db102d
BVA		 2799 skspcl->data_buf = skd_alloc_dma(skdev, skdev->databuf_cache,
2800 &skspcl->db_dma_address,
2801 GFP_DMA | __GFP_ZERO,
2802 DMA_BIDIRECTIONAL);
e67f86b3
AB		 2803 if (skspcl->data_buf == NULL) {
2804 rc = -ENOMEM;
2805 goto err_out;
2806 }
2807
a3db102d
BVA		 2808 skspcl->msg_buf = skd_alloc_dma(skdev, skdev->msgbuf_cache,
2809 &skspcl->mb_dma_address,
2810 GFP_DMA | __GFP_ZERO, DMA_TO_DEVICE);
e67f86b3
AB		 2811 if (skspcl->msg_buf == NULL) {
2812 rc = -ENOMEM;
2813 goto err_out;
2814 }
2815
e67f86b3
AB		 2816 skspcl->req.sksg_list = skd_cons_sg_list(skdev, 1,
2817 &skspcl->req.sksg_dma_address);
2818 if (skspcl->req.sksg_list == NULL) {
2819 rc = -ENOMEM;
2820 goto err_out;
2821 }
2822
2823 if (!skd_format_internal_skspcl(skdev)) {
2824 rc = -EINVAL;
2825 goto err_out;
2826 }
2827
2828err_out:
2829 return rc;
2830}
2831
ca33dd92
BVA		 2832static const struct blk_mq_ops skd_mq_ops = {
2833 .queue_rq = skd_mq_queue_rq,
2834 .init_request = skd_init_request,
2835 .exit_request = skd_exit_request,
2836};
2837
e67f86b3
AB		 2838static int skd_cons_disk(struct skd_device *skdev)
2839{
2840 int rc = 0;
2841 struct gendisk *disk;
2842 struct request_queue *q;
2843 unsigned long flags;
2844
2845 disk = alloc_disk(SKD_MINORS_PER_DEVICE);
2846 if (!disk) {
2847 rc = -ENOMEM;
2848 goto err_out;
2849 }
2850
2851 skdev->disk = disk;
2852 sprintf(disk->disk_name, DRV_NAME "%u", skdev->devno);
2853
2854 disk->major = skdev->major;
2855 disk->first_minor = skdev->devno * SKD_MINORS_PER_DEVICE;
2856 disk->fops = &skd_blockdev_ops;
2857 disk->private_data = skdev;
2858
ca33dd92
BVA		 2859 q = NULL;
2860 memset(&skdev->tag_set, 0, sizeof(skdev->tag_set));
2861 skdev->tag_set.ops = &skd_mq_ops;
2862 skdev->tag_set.nr_hw_queues = 1;
2863 skdev->tag_set.queue_depth = skd_max_queue_depth;
2864 skdev->tag_set.cmd_size = sizeof(struct skd_request_context) +
2865 skdev->sgs_per_request * sizeof(struct scatterlist);
2866 skdev->tag_set.numa_node = NUMA_NO_NODE;
2867 skdev->tag_set.flags = BLK_MQ_F_SHOULD_MERGE |
2868 BLK_MQ_F_SG_MERGE |
2869 BLK_ALLOC_POLICY_TO_MQ_FLAG(BLK_TAG_ALLOC_FIFO);
2870 skdev->tag_set.driver_data = skdev;
2871 if (blk_mq_alloc_tag_set(&skdev->tag_set) >= 0) {
2872 q = blk_mq_init_queue(&skdev->tag_set);
2873 if (!q)
2874 blk_mq_free_tag_set(&skdev->tag_set);
2875 }
e67f86b3
AB		 2876 if (!q) {
2877 rc = -ENOMEM;
2878 goto err_out;
2879 }
8fc45044 2880 blk_queue_bounce_limit(q, BLK_BOUNCE_HIGH);
e7278a8b 2881 q->queuedata = skdev;
f18c17c8 2882 q->nr_requests = skd_max_queue_depth / 2;
e67f86b3
AB		 2883
2884 skdev->queue = q;
2885 disk->queue = q;
e67f86b3 2886
6975f732 2887 blk_queue_write_cache(q, true, true);
e67f86b3
AB		 2888 blk_queue_max_segments(q, skdev->sgs_per_request);
2889 blk_queue_max_hw_sectors(q, SKD_N_MAX_SECTORS);
2890
a5c5b392 2891 /* set optimal I/O size to 8KB */
e67f86b3
AB		 2892 blk_queue_io_opt(q, 8192);
2893
e67f86b3 2894 queue_flag_set_unlocked(QUEUE_FLAG_NONROT, q);
b277da0a 2895 queue_flag_clear_unlocked(QUEUE_FLAG_ADD_RANDOM, q);
e67f86b3 2896
a74d5b76
BVA		 2897 blk_queue_rq_timeout(q, 8 * HZ);
2898 blk_queue_rq_timed_out(q, skd_timed_out);
2899 blk_queue_softirq_done(q, skd_softirq_done);
2900
e67f86b3 2901 spin_lock_irqsave(&skdev->lock, flags);
f98806d6 2902 dev_dbg(&skdev->pdev->dev, "stopping queue\n");
ca33dd92 2903 blk_mq_stop_hw_queues(skdev->queue);
e67f86b3
AB		 2904 spin_unlock_irqrestore(&skdev->lock, flags);
2905
2906err_out:
2907 return rc;
2908}
2909
542d7b00
BZ		 2910#define SKD_N_DEV_TABLE 16u
2911static u32 skd_next_devno;
e67f86b3 2912
542d7b00 2913static struct skd_device *skd_construct(struct pci_dev *pdev)
e67f86b3 2914{
542d7b00
BZ		 2915 struct skd_device *skdev;
2916 int blk_major = skd_major;
a3db102d 2917 size_t size;
542d7b00 2918 int rc;
e67f86b3 2919
542d7b00 2920 skdev = kzalloc(sizeof(*skdev), GFP_KERNEL);
e67f86b3 2921
542d7b00 2922 if (!skdev) {
f98806d6 2923 dev_err(&pdev->dev, "memory alloc failure\n");
542d7b00
BZ		 2924 return NULL;
2925 }
e67f86b3 2926
542d7b00
BZ		 2927 skdev->state = SKD_DRVR_STATE_LOAD;
2928 skdev->pdev = pdev;
2929 skdev->devno = skd_next_devno++;
2930 skdev->major = blk_major;
542d7b00 2931 skdev->dev_max_queue_depth = 0;
e67f86b3 2932
542d7b00
BZ		 2933 skdev->num_req_context = skd_max_queue_depth;
2934 skdev->num_fitmsg_context = skd_max_queue_depth;
542d7b00
BZ		 2935 skdev->cur_max_queue_depth = 1;
2936 skdev->queue_low_water_mark = 1;
2937 skdev->proto_ver = 99;
2938 skdev->sgs_per_request = skd_sgs_per_request;
2939 skdev->dbg_level = skd_dbg_level;
e67f86b3 2940
542d7b00
BZ		 2941 spin_lock_init(&skdev->lock);
2942
ca33dd92 2943 INIT_WORK(&skdev->start_queue, skd_start_queue);
542d7b00 2944 INIT_WORK(&skdev->completion_worker, skd_completion_worker);
e67f86b3 2945
a3db102d
BVA		 2946 size = max(SKD_N_FITMSG_BYTES, SKD_N_SPECIAL_FITMSG_BYTES);
2947 skdev->msgbuf_cache = kmem_cache_create("skd-msgbuf", size, 0,
2948 SLAB_HWCACHE_ALIGN, NULL);
2949 if (!skdev->msgbuf_cache)
2950 goto err_out;
2951 WARN_ONCE(kmem_cache_size(skdev->msgbuf_cache) < size,
2952 "skd-msgbuf: %d < %zd\n",
2953 kmem_cache_size(skdev->msgbuf_cache), size);
2954 size = skd_sgs_per_request * sizeof(struct fit_sg_descriptor);
2955 skdev->sglist_cache = kmem_cache_create("skd-sglist", size, 0,
2956 SLAB_HWCACHE_ALIGN, NULL);
2957 if (!skdev->sglist_cache)
2958 goto err_out;
2959 WARN_ONCE(kmem_cache_size(skdev->sglist_cache) < size,
2960 "skd-sglist: %d < %zd\n",
2961 kmem_cache_size(skdev->sglist_cache), size);
2962 size = SKD_N_INTERNAL_BYTES;
2963 skdev->databuf_cache = kmem_cache_create("skd-databuf", size, 0,
2964 SLAB_HWCACHE_ALIGN, NULL);
2965 if (!skdev->databuf_cache)
2966 goto err_out;
2967 WARN_ONCE(kmem_cache_size(skdev->databuf_cache) < size,
2968 "skd-databuf: %d < %zd\n",
2969 kmem_cache_size(skdev->databuf_cache), size);
2970
f98806d6 2971 dev_dbg(&skdev->pdev->dev, "skcomp\n");
542d7b00
BZ		 2972 rc = skd_cons_skcomp(skdev);
2973 if (rc < 0)
2974 goto err_out;
e67f86b3 2975
f98806d6 2976 dev_dbg(&skdev->pdev->dev, "skmsg\n");
542d7b00
BZ		 2977 rc = skd_cons_skmsg(skdev);
2978 if (rc < 0)
2979 goto err_out;
2980
f98806d6 2981 dev_dbg(&skdev->pdev->dev, "sksb\n");
542d7b00
BZ		 2982 rc = skd_cons_sksb(skdev);
2983 if (rc < 0)
2984 goto err_out;
2985
f98806d6 2986 dev_dbg(&skdev->pdev->dev, "disk\n");
542d7b00
BZ		 2987 rc = skd_cons_disk(skdev);
2988 if (rc < 0)
2989 goto err_out;
2990
f98806d6 2991 dev_dbg(&skdev->pdev->dev, "VICTORY\n");
542d7b00
BZ		 2992 return skdev;
2993
2994err_out:
f98806d6 2995 dev_dbg(&skdev->pdev->dev, "construct failed\n");
542d7b00
BZ		 2996 skd_destruct(skdev);
2997 return NULL;
e67f86b3
AB		 2998}
2999
542d7b00
BZ		 3000/*
3001 *****************************************************************************
3002 * DESTRUCT (FREE)
3003 *****************************************************************************
3004 */
3005
e67f86b3
AB		 3006static void skd_free_skcomp(struct skd_device *skdev)
3007{
7f13bdad
BVA		 3008 if (skdev->skcomp_table)
3009 pci_free_consistent(skdev->pdev, SKD_SKCOMP_SIZE,
e67f86b3 3010 skdev->skcomp_table, skdev->cq_dma_address);
e67f86b3
AB		 3011
3012 skdev->skcomp_table = NULL;
3013 skdev->cq_dma_address = 0;
3014}
3015
3016static void skd_free_skmsg(struct skd_device *skdev)
3017{
3018 u32 i;
3019
3020 if (skdev->skmsg_table == NULL)
3021 return;
3022
3023 for (i = 0; i < skdev->num_fitmsg_context; i++) {
3024 struct skd_fitmsg_context *skmsg;
3025
3026 skmsg = &skdev->skmsg_table[i];
3027
3028 if (skmsg->msg_buf != NULL) {
e67f86b3
AB		 3029 pci_free_consistent(skdev->pdev, SKD_N_FITMSG_BYTES,
3030 skmsg->msg_buf,
3031 skmsg->mb_dma_address);
3032 }
3033 skmsg->msg_buf = NULL;
3034 skmsg->mb_dma_address = 0;
3035 }
3036
3037 kfree(skdev->skmsg_table);
3038 skdev->skmsg_table = NULL;
3039}
3040
e67f86b3
AB		 3041static void skd_free_sksb(struct skd_device *skdev)
3042{
a3db102d 3043 struct skd_special_context *skspcl = &skdev->internal_skspcl;
e67f86b3 3044
a3db102d
BVA		 3045 skd_free_dma(skdev, skdev->databuf_cache, skspcl->data_buf,
3046 skspcl->db_dma_address, DMA_BIDIRECTIONAL);
e67f86b3
AB		 3047
3048 skspcl->data_buf = NULL;
3049 skspcl->db_dma_address = 0;
3050
a3db102d
BVA		 3051 skd_free_dma(skdev, skdev->msgbuf_cache, skspcl->msg_buf,
3052 skspcl->mb_dma_address, DMA_TO_DEVICE);
e67f86b3
AB		 3053
3054 skspcl->msg_buf = NULL;
3055 skspcl->mb_dma_address = 0;
3056
a3db102d 3057 skd_free_sg_list(skdev, skspcl->req.sksg_list,
e67f86b3
AB		 3058 skspcl->req.sksg_dma_address);
3059
3060 skspcl->req.sksg_list = NULL;
3061 skspcl->req.sksg_dma_address = 0;
3062}
3063
e67f86b3
AB		 3064static void skd_free_disk(struct skd_device *skdev)
3065{
3066 struct gendisk *disk = skdev->disk;
3067
7277cc67
BVA		 3068 if (disk && (disk->flags & GENHD_FL_UP))
3069 del_gendisk(disk);
3070
3071 if (skdev->queue) {
3072 blk_cleanup_queue(skdev->queue);
3073 skdev->queue = NULL;
3074 disk->queue = NULL;
e67f86b3 3075 }
7277cc67 3076
ca33dd92
BVA		 3077 if (skdev->tag_set.tags)
3078 blk_mq_free_tag_set(&skdev->tag_set);
3079
7277cc67 3080 put_disk(disk);
e67f86b3
AB		 3081 skdev->disk = NULL;
3082}
3083
542d7b00
BZ		 3084static void skd_destruct(struct skd_device *skdev)
3085{
3086 if (skdev == NULL)
3087 return;
3088
ca33dd92
BVA		 3089 cancel_work_sync(&skdev->start_queue);
3090
f98806d6 3091 dev_dbg(&skdev->pdev->dev, "disk\n");
542d7b00
BZ		 3092 skd_free_disk(skdev);
3093
f98806d6 3094 dev_dbg(&skdev->pdev->dev, "sksb\n");
542d7b00
BZ		 3095 skd_free_sksb(skdev);
3096
f98806d6 3097 dev_dbg(&skdev->pdev->dev, "skmsg\n");
542d7b00 3098 skd_free_skmsg(skdev);
e67f86b3 3099
f98806d6 3100 dev_dbg(&skdev->pdev->dev, "skcomp\n");
542d7b00
BZ		 3101 skd_free_skcomp(skdev);
3102
a3db102d
BVA		 3103 kmem_cache_destroy(skdev->databuf_cache);
3104 kmem_cache_destroy(skdev->sglist_cache);
3105 kmem_cache_destroy(skdev->msgbuf_cache);
3106
f98806d6 3107 dev_dbg(&skdev->pdev->dev, "skdev\n");
542d7b00
BZ		 3108 kfree(skdev);
3109}
e67f86b3
AB		 3110
3111/*
3112 *****************************************************************************
3113 * BLOCK DEVICE (BDEV) GLUE
3114 *****************************************************************************
3115 */
3116
3117static int skd_bdev_getgeo(struct block_device *bdev, struct hd_geometry *geo)
3118{
3119 struct skd_device *skdev;
3120 u64 capacity;
3121
3122 skdev = bdev->bd_disk->private_data;
3123
f98806d6
BVA		 3124 dev_dbg(&skdev->pdev->dev, "%s: CMD[%s] getgeo device\n",
3125 bdev->bd_disk->disk_name, current->comm);
e67f86b3
AB		 3126
3127 if (skdev->read_cap_is_valid) {
3128 capacity = get_capacity(skdev->disk);
3129 geo->heads = 64;
3130 geo->sectors = 255;
3131 geo->cylinders = (capacity) / (255 * 64);
3132
3133 return 0;
3134 }
3135 return -EIO;
3136}
3137
0d52c756 3138static int skd_bdev_attach(struct device *parent, struct skd_device *skdev)
e67f86b3 3139{
f98806d6 3140 dev_dbg(&skdev->pdev->dev, "add_disk\n");
0d52c756 3141 device_add_disk(parent, skdev->disk);
e67f86b3
AB		 3142 return 0;
3143}
3144
3145static const struct block_device_operations skd_blockdev_ops = {
3146 .owner = THIS_MODULE,
e67f86b3
AB		 3147 .getgeo = skd_bdev_getgeo,
3148};
3149
e67f86b3
AB		 3150/*
3151 *****************************************************************************
3152 * PCIe DRIVER GLUE
3153 *****************************************************************************
3154 */
3155
9baa3c34 3156static const struct pci_device_id skd_pci_tbl[] = {
e67f86b3
AB		 3157 { PCI_VENDOR_ID_STEC, PCI_DEVICE_ID_S1120,
3158 PCI_ANY_ID, PCI_ANY_ID, 0, 0, },
3159 { 0 } /* terminate list */
3160};
3161
3162MODULE_DEVICE_TABLE(pci, skd_pci_tbl);
3163
3164static char *skd_pci_info(struct skd_device *skdev, char *str)
3165{
3166 int pcie_reg;
3167
3168 strcpy(str, "PCIe (");
3169 pcie_reg = pci_find_capability(skdev->pdev, PCI_CAP_ID_EXP);
3170
3171 if (pcie_reg) {
3172
3173 char lwstr[6];
3174 uint16_t pcie_lstat, lspeed, lwidth;
3175
3176 pcie_reg += 0x12;
3177 pci_read_config_word(skdev->pdev, pcie_reg, &pcie_lstat);
3178 lspeed = pcie_lstat & (0xF);
3179 lwidth = (pcie_lstat & 0x3F0) >> 4;
3180
3181 if (lspeed == 1)
3182 strcat(str, "2.5GT/s ");
3183 else if (lspeed == 2)
3184 strcat(str, "5.0GT/s ");
3185 else
3186 strcat(str, "<unknown> ");
3187 snprintf(lwstr, sizeof(lwstr), "%dX)", lwidth);
3188 strcat(str, lwstr);
3189 }
3190 return str;
3191}
3192
3193static int skd_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
3194{
3195 int i;
3196 int rc = 0;
3197 char pci_str[32];
3198 struct skd_device *skdev;
3199
f98806d6
BVA		 3200 dev_info(&pdev->dev, "STEC s1120 Driver(%s) version %s-b%s\n",
3201 DRV_NAME, DRV_VERSION, DRV_BUILD_ID);
3202 dev_info(&pdev->dev, "vendor=%04X device=%04x\n", pdev->vendor,
3203 pdev->device);
e67f86b3
AB		 3204
3205 rc = pci_enable_device(pdev);
3206 if (rc)
3207 return rc;
3208 rc = pci_request_regions(pdev, DRV_NAME);
3209 if (rc)
3210 goto err_out;
3211 rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
3212 if (!rc) {
3213 if (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64))) {
f98806d6
BVA		 3214 dev_err(&pdev->dev, "consistent DMA mask error %d\n",
3215 rc);
e67f86b3
AB		 3216 }
3217 } else {
f98806d6 3218 rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
e67f86b3 3219 if (rc) {
f98806d6 3220 dev_err(&pdev->dev, "DMA mask error %d\n", rc);
e67f86b3
AB		 3221 goto err_out_regions;
3222 }
3223 }
3224
b8df6647
BZ		 3225 if (!skd_major) {
3226 rc = register_blkdev(0, DRV_NAME);
3227 if (rc < 0)
3228 goto err_out_regions;
3229 BUG_ON(!rc);
3230 skd_major = rc;
3231 }
3232
e67f86b3 3233 skdev = skd_construct(pdev);
1762b57f
WY		 3234 if (skdev == NULL) {
3235 rc = -ENOMEM;
e67f86b3 3236 goto err_out_regions;
1762b57f 3237 }
e67f86b3
AB		 3238
3239 skd_pci_info(skdev, pci_str);
f98806d6 3240 dev_info(&pdev->dev, "%s 64bit\n", pci_str);
e67f86b3
AB		 3241
3242 pci_set_master(pdev);
3243 rc = pci_enable_pcie_error_reporting(pdev);
3244 if (rc) {
f98806d6
BVA		 3245 dev_err(&pdev->dev,
3246 "bad enable of PCIe error reporting rc=%d\n", rc);
e67f86b3
AB		 3247 skdev->pcie_error_reporting_is_enabled = 0;
3248 } else
3249 skdev->pcie_error_reporting_is_enabled = 1;
3250
e67f86b3 3251 pci_set_drvdata(pdev, skdev);
ebedd16d 3252
e67f86b3
AB		 3253 for (i = 0; i < SKD_MAX_BARS; i++) {
3254 skdev->mem_phys[i] = pci_resource_start(pdev, i);
3255 skdev->mem_size[i] = (u32)pci_resource_len(pdev, i);
3256 skdev->mem_map[i] = ioremap(skdev->mem_phys[i],
3257 skdev->mem_size[i]);
3258 if (!skdev->mem_map[i]) {
f98806d6
BVA		 3259 dev_err(&pdev->dev,
3260 "Unable to map adapter memory!\n");
e67f86b3
AB		 3261 rc = -ENODEV;
3262 goto err_out_iounmap;
3263 }
f98806d6
BVA		 3264 dev_dbg(&pdev->dev, "mem_map=%p, phyd=%016llx, size=%d\n",
3265 skdev->mem_map[i], (uint64_t)skdev->mem_phys[i],
3266 skdev->mem_size[i]);
e67f86b3
AB		 3267 }
3268
3269 rc = skd_acquire_irq(skdev);
3270 if (rc) {
f98806d6 3271 dev_err(&pdev->dev, "interrupt resource error %d\n", rc);
e67f86b3
AB		 3272 goto err_out_iounmap;
3273 }
3274
3275 rc = skd_start_timer(skdev);
3276 if (rc)
3277 goto err_out_timer;
3278
3279 init_waitqueue_head(&skdev->waitq);
3280
3281 skd_start_device(skdev);
3282
3283 rc = wait_event_interruptible_timeout(skdev->waitq,
3284 (skdev->gendisk_on),
3285 (SKD_START_WAIT_SECONDS * HZ));
3286 if (skdev->gendisk_on > 0) {
3287 /* device came on-line after reset */
0d52c756 3288 skd_bdev_attach(&pdev->dev, skdev);
e67f86b3
AB		 3289 rc = 0;
3290 } else {
3291 /* we timed out, something is wrong with the device,
3292 don't add the disk structure */
f98806d6
BVA		 3293 dev_err(&pdev->dev, "error: waiting for s1120 timed out %d!\n",
3294 rc);
e67f86b3
AB		 3295 /* in case of no error; we timeout with ENXIO */
3296 if (!rc)
3297 rc = -ENXIO;
3298 goto err_out_timer;
3299 }
3300
e67f86b3
AB		 3301 return rc;
3302
3303err_out_timer:
3304 skd_stop_device(skdev);
3305 skd_release_irq(skdev);
3306
3307err_out_iounmap:
3308 for (i = 0; i < SKD_MAX_BARS; i++)
3309 if (skdev->mem_map[i])
3310 iounmap(skdev->mem_map[i]);
3311
3312 if (skdev->pcie_error_reporting_is_enabled)
3313 pci_disable_pcie_error_reporting(pdev);
3314
3315 skd_destruct(skdev);
3316
3317err_out_regions:
3318 pci_release_regions(pdev);
3319
3320err_out:
3321 pci_disable_device(pdev);
3322 pci_set_drvdata(pdev, NULL);
3323 return rc;
3324}
3325
3326static void skd_pci_remove(struct pci_dev *pdev)
3327{
3328 int i;
3329 struct skd_device *skdev;
3330
3331 skdev = pci_get_drvdata(pdev);
3332 if (!skdev) {
f98806d6 3333 dev_err(&pdev->dev, "no device data for PCI\n");
e67f86b3
AB		 3334 return;
3335 }
3336 skd_stop_device(skdev);
3337 skd_release_irq(skdev);
3338
3339 for (i = 0; i < SKD_MAX_BARS; i++)
3340 if (skdev->mem_map[i])
4854afe3 3341 iounmap(skdev->mem_map[i]);
e67f86b3
AB		 3342
3343 if (skdev->pcie_error_reporting_is_enabled)
3344 pci_disable_pcie_error_reporting(pdev);
3345
3346 skd_destruct(skdev);
3347
3348 pci_release_regions(pdev);
3349 pci_disable_device(pdev);
3350 pci_set_drvdata(pdev, NULL);
3351
3352 return;
3353}
3354
3355static int skd_pci_suspend(struct pci_dev *pdev, pm_message_t state)
3356{
3357 int i;
3358 struct skd_device *skdev;
3359
3360 skdev = pci_get_drvdata(pdev);
3361 if (!skdev) {
f98806d6 3362 dev_err(&pdev->dev, "no device data for PCI\n");
e67f86b3
AB		 3363 return -EIO;
3364 }
3365
3366 skd_stop_device(skdev);
3367
3368 skd_release_irq(skdev);
3369
3370 for (i = 0; i < SKD_MAX_BARS; i++)
3371 if (skdev->mem_map[i])
4854afe3 3372 iounmap(skdev->mem_map[i]);
e67f86b3
AB		 3373
3374 if (skdev->pcie_error_reporting_is_enabled)
3375 pci_disable_pcie_error_reporting(pdev);
3376
3377 pci_release_regions(pdev);
3378 pci_save_state(pdev);
3379 pci_disable_device(pdev);
3380 pci_set_power_state(pdev, pci_choose_state(pdev, state));
3381 return 0;
3382}
3383
3384static int skd_pci_resume(struct pci_dev *pdev)
3385{
3386 int i;
3387 int rc = 0;
3388 struct skd_device *skdev;
3389
3390 skdev = pci_get_drvdata(pdev);
3391 if (!skdev) {
f98806d6 3392 dev_err(&pdev->dev, "no device data for PCI\n");
e67f86b3
AB		 3393 return -1;
3394 }
3395
3396 pci_set_power_state(pdev, PCI_D0);
3397 pci_enable_wake(pdev, PCI_D0, 0);
3398 pci_restore_state(pdev);
3399
3400 rc = pci_enable_device(pdev);
3401 if (rc)
3402 return rc;
3403 rc = pci_request_regions(pdev, DRV_NAME);
3404 if (rc)
3405 goto err_out;
3406 rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
3407 if (!rc) {
3408 if (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64))) {
3409
f98806d6
BVA		 3410 dev_err(&pdev->dev, "consistent DMA mask error %d\n",
3411 rc);
e67f86b3
AB		 3412 }
3413 } else {
3414 rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
3415 if (rc) {
3416
f98806d6 3417 dev_err(&pdev->dev, "DMA mask error %d\n", rc);
e67f86b3
AB		 3418 goto err_out_regions;
3419 }
3420 }
3421
3422 pci_set_master(pdev);
3423 rc = pci_enable_pcie_error_reporting(pdev);
3424 if (rc) {
f98806d6
BVA		 3425 dev_err(&pdev->dev,
3426 "bad enable of PCIe error reporting rc=%d\n", rc);
e67f86b3
AB		 3427 skdev->pcie_error_reporting_is_enabled = 0;
3428 } else
3429 skdev->pcie_error_reporting_is_enabled = 1;
3430
3431 for (i = 0; i < SKD_MAX_BARS; i++) {
3432
3433 skdev->mem_phys[i] = pci_resource_start(pdev, i);
3434 skdev->mem_size[i] = (u32)pci_resource_len(pdev, i);
3435 skdev->mem_map[i] = ioremap(skdev->mem_phys[i],
3436 skdev->mem_size[i]);
3437 if (!skdev->mem_map[i]) {
f98806d6 3438 dev_err(&pdev->dev, "Unable to map adapter memory!\n");
e67f86b3
AB		 3439 rc = -ENODEV;
3440 goto err_out_iounmap;
3441 }
f98806d6
BVA		 3442 dev_dbg(&pdev->dev, "mem_map=%p, phyd=%016llx, size=%d\n",
3443 skdev->mem_map[i], (uint64_t)skdev->mem_phys[i],
3444 skdev->mem_size[i]);
e67f86b3
AB		 3445 }
3446 rc = skd_acquire_irq(skdev);
3447 if (rc) {
f98806d6 3448 dev_err(&pdev->dev, "interrupt resource error %d\n", rc);
e67f86b3
AB		 3449 goto err_out_iounmap;
3450 }
3451
3452 rc = skd_start_timer(skdev);
3453 if (rc)
3454 goto err_out_timer;
3455
3456 init_waitqueue_head(&skdev->waitq);
3457
3458 skd_start_device(skdev);
3459
3460 return rc;
3461
3462err_out_timer:
3463 skd_stop_device(skdev);
3464 skd_release_irq(skdev);
3465
3466err_out_iounmap:
3467 for (i = 0; i < SKD_MAX_BARS; i++)
3468 if (skdev->mem_map[i])
3469 iounmap(skdev->mem_map[i]);
3470
3471 if (skdev->pcie_error_reporting_is_enabled)
3472 pci_disable_pcie_error_reporting(pdev);
3473
3474err_out_regions:
3475 pci_release_regions(pdev);
3476
3477err_out:
3478 pci_disable_device(pdev);
3479 return rc;
3480}
3481
3482static void skd_pci_shutdown(struct pci_dev *pdev)
3483{
3484 struct skd_device *skdev;
3485
f98806d6 3486 dev_err(&pdev->dev, "%s called\n", __func__);
e67f86b3
AB		 3487
3488 skdev = pci_get_drvdata(pdev);
3489 if (!skdev) {
f98806d6 3490 dev_err(&pdev->dev, "no device data for PCI\n");
e67f86b3
AB		 3491 return;
3492 }
3493
f98806d6 3494 dev_err(&pdev->dev, "calling stop\n");
e67f86b3
AB		 3495 skd_stop_device(skdev);
3496}
3497
3498static struct pci_driver skd_driver = {
3499 .name = DRV_NAME,
3500 .id_table = skd_pci_tbl,
3501 .probe = skd_pci_probe,
3502 .remove = skd_pci_remove,
3503 .suspend = skd_pci_suspend,
3504 .resume = skd_pci_resume,
3505 .shutdown = skd_pci_shutdown,
3506};
3507
3508/*
3509 *****************************************************************************
3510 * LOGGING SUPPORT
3511 *****************************************************************************
3512 */
3513
e67f86b3
AB		 3514const char *skd_drive_state_to_str(int state)
3515{
3516 switch (state) {
3517 case FIT_SR_DRIVE_OFFLINE:
3518 return "OFFLINE";
3519 case FIT_SR_DRIVE_INIT:
3520 return "INIT";
3521 case FIT_SR_DRIVE_ONLINE:
3522 return "ONLINE";
3523 case FIT_SR_DRIVE_BUSY:
3524 return "BUSY";
3525 case FIT_SR_DRIVE_FAULT:
3526 return "FAULT";
3527 case FIT_SR_DRIVE_DEGRADED:
3528 return "DEGRADED";
3529 case FIT_SR_PCIE_LINK_DOWN:
3530 return "INK_DOWN";
3531 case FIT_SR_DRIVE_SOFT_RESET:
3532 return "SOFT_RESET";
3533 case FIT_SR_DRIVE_NEED_FW_DOWNLOAD:
3534 return "NEED_FW";
3535 case FIT_SR_DRIVE_INIT_FAULT:
3536 return "INIT_FAULT";
3537 case FIT_SR_DRIVE_BUSY_SANITIZE:
3538 return "BUSY_SANITIZE";
3539 case FIT_SR_DRIVE_BUSY_ERASE:
3540 return "BUSY_ERASE";
3541 case FIT_SR_DRIVE_FW_BOOTING:
3542 return "FW_BOOTING";
3543 default:
3544 return "???";
3545 }
3546}
3547
3548const char *skd_skdev_state_to_str(enum skd_drvr_state state)
3549{
3550 switch (state) {
3551 case SKD_DRVR_STATE_LOAD:
3552 return "LOAD";
3553 case SKD_DRVR_STATE_IDLE:
3554 return "IDLE";
3555 case SKD_DRVR_STATE_BUSY:
3556 return "BUSY";
3557 case SKD_DRVR_STATE_STARTING:
3558 return "STARTING";
3559 case SKD_DRVR_STATE_ONLINE:
3560 return "ONLINE";
3561 case SKD_DRVR_STATE_PAUSING:
3562 return "PAUSING";
3563 case SKD_DRVR_STATE_PAUSED:
3564 return "PAUSED";
e67f86b3
AB		 3565 case SKD_DRVR_STATE_RESTARTING:
3566 return "RESTARTING";
3567 case SKD_DRVR_STATE_RESUMING:
3568 return "RESUMING";
3569 case SKD_DRVR_STATE_STOPPING:
3570 return "STOPPING";
3571 case SKD_DRVR_STATE_SYNCING:
3572 return "SYNCING";
3573 case SKD_DRVR_STATE_FAULT:
3574 return "FAULT";
3575 case SKD_DRVR_STATE_DISAPPEARED:
3576 return "DISAPPEARED";
3577 case SKD_DRVR_STATE_BUSY_ERASE:
3578 return "BUSY_ERASE";
3579 case SKD_DRVR_STATE_BUSY_SANITIZE:
3580 return "BUSY_SANITIZE";
3581 case SKD_DRVR_STATE_BUSY_IMMINENT:
3582 return "BUSY_IMMINENT";
3583 case SKD_DRVR_STATE_WAIT_BOOT:
3584 return "WAIT_BOOT";
3585
3586 default:
3587 return "???";
3588 }
3589}
3590
a26ba7fa 3591static const char *skd_skreq_state_to_str(enum skd_req_state state)
e67f86b3
AB		 3592{
3593 switch (state) {
3594 case SKD_REQ_STATE_IDLE:
3595 return "IDLE";
3596 case SKD_REQ_STATE_SETUP:
3597 return "SETUP";
3598 case SKD_REQ_STATE_BUSY:
3599 return "BUSY";
3600 case SKD_REQ_STATE_COMPLETED:
3601 return "COMPLETED";
3602 case SKD_REQ_STATE_TIMEOUT:
3603 return "TIMEOUT";
e67f86b3
AB		 3604 default:
3605 return "???";
3606 }
3607}
3608
3609static void skd_log_skdev(struct skd_device *skdev, const char *event)
3610{
f98806d6
BVA		 3611 dev_dbg(&skdev->pdev->dev, "skdev=%p event='%s'\n", skdev, event);
3612 dev_dbg(&skdev->pdev->dev, " drive_state=%s(%d) driver_state=%s(%d)\n",
3613 skd_drive_state_to_str(skdev->drive_state), skdev->drive_state,
3614 skd_skdev_state_to_str(skdev->state), skdev->state);
3615 dev_dbg(&skdev->pdev->dev, " busy=%d limit=%d dev=%d lowat=%d\n",
d4d0f5fc 3616 skd_in_flight(skdev), skdev->cur_max_queue_depth,
f98806d6 3617 skdev->dev_max_queue_depth, skdev->queue_low_water_mark);
a74d5b76
BVA		 3618 dev_dbg(&skdev->pdev->dev, " cycle=%d cycle_ix=%d\n",
3619 skdev->skcomp_cycle, skdev->skcomp_ix);
e67f86b3
AB		 3620}
3621
e67f86b3
AB		 3622static void skd_log_skreq(struct skd_device *skdev,
3623 struct skd_request_context *skreq, const char *event)
3624{
e7278a8b
BVA		 3625 struct request *req = blk_mq_rq_from_pdu(skreq);
3626 u32 lba = blk_rq_pos(req);
3627 u32 count = blk_rq_sectors(req);
3628
f98806d6
BVA		 3629 dev_dbg(&skdev->pdev->dev, "skreq=%p event='%s'\n", skreq, event);
3630 dev_dbg(&skdev->pdev->dev, " state=%s(%d) id=0x%04x fitmsg=0x%04x\n",
3631 skd_skreq_state_to_str(skreq->state), skreq->state, skreq->id,
3632 skreq->fitmsg_id);
a74d5b76
BVA		 3633 dev_dbg(&skdev->pdev->dev, " sg_dir=%d n_sg=%d\n",
3634 skreq->data_dir, skreq->n_sg);
ca33dd92 3635
e7278a8b
BVA		 3636 dev_dbg(&skdev->pdev->dev,
3637 "req=%p lba=%u(0x%x) count=%u(0x%x) dir=%d\n", req, lba, lba,
3638 count, count, (int)rq_data_dir(req));
e67f86b3
AB		 3639}
3640
3641/*
3642 *****************************************************************************
3643 * MODULE GLUE
3644 *****************************************************************************
3645 */
3646
3647static int __init skd_init(void)
3648{
16a70534
BVA		 3649 BUILD_BUG_ON(sizeof(struct fit_completion_entry_v1) != 8);
3650 BUILD_BUG_ON(sizeof(struct fit_comp_error_info) != 32);
3651 BUILD_BUG_ON(sizeof(struct skd_command_header) != 16);
3652 BUILD_BUG_ON(sizeof(struct skd_scsi_request) != 32);
3653 BUILD_BUG_ON(sizeof(struct driver_inquiry_data) != 44);
d891fe60
BVA		 3654 BUILD_BUG_ON(offsetof(struct skd_msg_buf, fmh) != 0);
3655 BUILD_BUG_ON(offsetof(struct skd_msg_buf, scsi) != 64);
3656 BUILD_BUG_ON(sizeof(struct skd_msg_buf) != SKD_N_FITMSG_BYTES);
2da7b403 3657
e67f86b3
AB		 3658 pr_info(PFX " v%s-b%s loaded\n", DRV_VERSION, DRV_BUILD_ID);
3659
3660 switch (skd_isr_type) {
3661 case SKD_IRQ_LEGACY:
3662 case SKD_IRQ_MSI:
3663 case SKD_IRQ_MSIX:
3664 break;
3665 default:
fbed149a 3666 pr_err(PFX "skd_isr_type %d invalid, re-set to %d\n",
e67f86b3
AB		 3667 skd_isr_type, SKD_IRQ_DEFAULT);
3668 skd_isr_type = SKD_IRQ_DEFAULT;
3669 }
3670
fbed149a
BZ		 3671 if (skd_max_queue_depth < 1 ||
3672 skd_max_queue_depth > SKD_MAX_QUEUE_DEPTH) {
3673 pr_err(PFX "skd_max_queue_depth %d invalid, re-set to %d\n",
e67f86b3
AB		 3674 skd_max_queue_depth, SKD_MAX_QUEUE_DEPTH_DEFAULT);
3675 skd_max_queue_depth = SKD_MAX_QUEUE_DEPTH_DEFAULT;
3676 }
3677
2da7b403
BVA		 3678 if (skd_max_req_per_msg < 1 ||
3679 skd_max_req_per_msg > SKD_MAX_REQ_PER_MSG) {
fbed149a 3680 pr_err(PFX "skd_max_req_per_msg %d invalid, re-set to %d\n",
e67f86b3
AB		 3681 skd_max_req_per_msg, SKD_MAX_REQ_PER_MSG_DEFAULT);
3682 skd_max_req_per_msg = SKD_MAX_REQ_PER_MSG_DEFAULT;
3683 }
3684
3685 if (skd_sgs_per_request < 1 || skd_sgs_per_request > 4096) {
fbed149a 3686 pr_err(PFX "skd_sg_per_request %d invalid, re-set to %d\n",
e67f86b3
AB		 3687 skd_sgs_per_request, SKD_N_SG_PER_REQ_DEFAULT);
3688 skd_sgs_per_request = SKD_N_SG_PER_REQ_DEFAULT;
3689 }
3690
3691 if (skd_dbg_level < 0 || skd_dbg_level > 2) {
fbed149a 3692 pr_err(PFX "skd_dbg_level %d invalid, re-set to %d\n",
e67f86b3
AB		 3693 skd_dbg_level, 0);
3694 skd_dbg_level = 0;
3695 }
3696
3697 if (skd_isr_comp_limit < 0) {
fbed149a 3698 pr_err(PFX "skd_isr_comp_limit %d invalid, set to %d\n",
e67f86b3
AB		 3699 skd_isr_comp_limit, 0);
3700 skd_isr_comp_limit = 0;
3701 }
3702
b8df6647 3703 return pci_register_driver(&skd_driver);
e67f86b3
AB		 3704}
3705
3706static void __exit skd_exit(void)
3707{
3708 pr_info(PFX " v%s-b%s unloading\n", DRV_VERSION, DRV_BUILD_ID);
3709
e67f86b3 3710 pci_unregister_driver(&skd_driver);
b8df6647
BZ		 3711
3712 if (skd_major)
3713 unregister_blkdev(skd_major, DRV_NAME);
e67f86b3
AB		 3714}
3715
e67f86b3
AB		 3716module_init(skd_init);
3717module_exit(skd_exit);
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