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Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | * Driver for the SWIM3 (Super Woz Integrated Machine 3) | |
3 | * floppy controller found on Power Macintoshes. | |
4 | * | |
5 | * Copyright (C) 1996 Paul Mackerras. | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or | |
8 | * modify it under the terms of the GNU General Public License | |
9 | * as published by the Free Software Foundation; either version | |
10 | * 2 of the License, or (at your option) any later version. | |
11 | */ | |
12 | ||
13 | /* | |
14 | * TODO: | |
15 | * handle 2 drives | |
16 | * handle GCR disks | |
17 | */ | |
18 | ||
1da177e4 LT |
19 | #include <linux/stddef.h> |
20 | #include <linux/kernel.h> | |
21 | #include <linux/sched.h> | |
22 | #include <linux/timer.h> | |
23 | #include <linux/delay.h> | |
24 | #include <linux/fd.h> | |
25 | #include <linux/ioctl.h> | |
26 | #include <linux/blkdev.h> | |
1da177e4 | 27 | #include <linux/interrupt.h> |
8a6cfeb6 | 28 | #include <linux/smp_lock.h> |
1da177e4 | 29 | #include <linux/module.h> |
515729ec | 30 | #include <linux/spinlock.h> |
1da177e4 LT |
31 | #include <asm/io.h> |
32 | #include <asm/dbdma.h> | |
33 | #include <asm/prom.h> | |
34 | #include <asm/uaccess.h> | |
35 | #include <asm/mediabay.h> | |
36 | #include <asm/machdep.h> | |
37 | #include <asm/pmac_feature.h> | |
38 | ||
39 | static struct request_queue *swim3_queue; | |
40 | static struct gendisk *disks[2]; | |
41 | static struct request *fd_req; | |
42 | ||
43 | #define MAX_FLOPPIES 2 | |
44 | ||
45 | enum swim_state { | |
46 | idle, | |
47 | locating, | |
48 | seeking, | |
49 | settling, | |
50 | do_transfer, | |
51 | jogging, | |
52 | available, | |
53 | revalidating, | |
54 | ejecting | |
55 | }; | |
56 | ||
57 | #define REG(x) unsigned char x; char x ## _pad[15]; | |
58 | ||
59 | /* | |
60 | * The names for these registers mostly represent speculation on my part. | |
61 | * It will be interesting to see how close they are to the names Apple uses. | |
62 | */ | |
63 | struct swim3 { | |
64 | REG(data); | |
65 | REG(timer); /* counts down at 1MHz */ | |
66 | REG(error); | |
67 | REG(mode); | |
68 | REG(select); /* controls CA0, CA1, CA2 and LSTRB signals */ | |
69 | REG(setup); | |
70 | REG(control); /* writing bits clears them */ | |
71 | REG(status); /* writing bits sets them in control */ | |
72 | REG(intr); | |
73 | REG(nseek); /* # tracks to seek */ | |
74 | REG(ctrack); /* current track number */ | |
75 | REG(csect); /* current sector number */ | |
76 | REG(gap3); /* size of gap 3 in track format */ | |
77 | REG(sector); /* sector # to read or write */ | |
78 | REG(nsect); /* # sectors to read or write */ | |
79 | REG(intr_enable); | |
80 | }; | |
81 | ||
82 | #define control_bic control | |
83 | #define control_bis status | |
84 | ||
85 | /* Bits in select register */ | |
86 | #define CA_MASK 7 | |
87 | #define LSTRB 8 | |
88 | ||
89 | /* Bits in control register */ | |
90 | #define DO_SEEK 0x80 | |
91 | #define FORMAT 0x40 | |
92 | #define SELECT 0x20 | |
93 | #define WRITE_SECTORS 0x10 | |
94 | #define DO_ACTION 0x08 | |
95 | #define DRIVE2_ENABLE 0x04 | |
96 | #define DRIVE_ENABLE 0x02 | |
97 | #define INTR_ENABLE 0x01 | |
98 | ||
99 | /* Bits in status register */ | |
100 | #define FIFO_1BYTE 0x80 | |
101 | #define FIFO_2BYTE 0x40 | |
102 | #define ERROR 0x20 | |
103 | #define DATA 0x08 | |
104 | #define RDDATA 0x04 | |
105 | #define INTR_PENDING 0x02 | |
106 | #define MARK_BYTE 0x01 | |
107 | ||
108 | /* Bits in intr and intr_enable registers */ | |
109 | #define ERROR_INTR 0x20 | |
110 | #define DATA_CHANGED 0x10 | |
111 | #define TRANSFER_DONE 0x08 | |
112 | #define SEEN_SECTOR 0x04 | |
113 | #define SEEK_DONE 0x02 | |
114 | #define TIMER_DONE 0x01 | |
115 | ||
116 | /* Bits in error register */ | |
117 | #define ERR_DATA_CRC 0x80 | |
118 | #define ERR_ADDR_CRC 0x40 | |
119 | #define ERR_OVERRUN 0x04 | |
120 | #define ERR_UNDERRUN 0x01 | |
121 | ||
122 | /* Bits in setup register */ | |
123 | #define S_SW_RESET 0x80 | |
124 | #define S_GCR_WRITE 0x40 | |
125 | #define S_IBM_DRIVE 0x20 | |
126 | #define S_TEST_MODE 0x10 | |
127 | #define S_FCLK_DIV2 0x08 | |
128 | #define S_GCR 0x04 | |
129 | #define S_COPY_PROT 0x02 | |
130 | #define S_INV_WDATA 0x01 | |
131 | ||
132 | /* Select values for swim3_action */ | |
133 | #define SEEK_POSITIVE 0 | |
134 | #define SEEK_NEGATIVE 4 | |
135 | #define STEP 1 | |
136 | #define MOTOR_ON 2 | |
137 | #define MOTOR_OFF 6 | |
138 | #define INDEX 3 | |
139 | #define EJECT 7 | |
140 | #define SETMFM 9 | |
141 | #define SETGCR 13 | |
142 | ||
143 | /* Select values for swim3_select and swim3_readbit */ | |
144 | #define STEP_DIR 0 | |
145 | #define STEPPING 1 | |
146 | #define MOTOR_ON 2 | |
147 | #define RELAX 3 /* also eject in progress */ | |
148 | #define READ_DATA_0 4 | |
149 | #define TWOMEG_DRIVE 5 | |
150 | #define SINGLE_SIDED 6 /* drive or diskette is 4MB type? */ | |
151 | #define DRIVE_PRESENT 7 | |
152 | #define DISK_IN 8 | |
153 | #define WRITE_PROT 9 | |
154 | #define TRACK_ZERO 10 | |
155 | #define TACHO 11 | |
156 | #define READ_DATA_1 12 | |
157 | #define MFM_MODE 13 | |
158 | #define SEEK_COMPLETE 14 | |
159 | #define ONEMEG_MEDIA 15 | |
160 | ||
161 | /* Definitions of values used in writing and formatting */ | |
162 | #define DATA_ESCAPE 0x99 | |
163 | #define GCR_SYNC_EXC 0x3f | |
164 | #define GCR_SYNC_CONV 0x80 | |
165 | #define GCR_FIRST_MARK 0xd5 | |
166 | #define GCR_SECOND_MARK 0xaa | |
167 | #define GCR_ADDR_MARK "\xd5\xaa\x00" | |
168 | #define GCR_DATA_MARK "\xd5\xaa\x0b" | |
169 | #define GCR_SLIP_BYTE "\x27\xaa" | |
170 | #define GCR_SELF_SYNC "\x3f\xbf\x1e\x34\x3c\x3f" | |
171 | ||
172 | #define DATA_99 "\x99\x99" | |
173 | #define MFM_ADDR_MARK "\x99\xa1\x99\xa1\x99\xa1\x99\xfe" | |
174 | #define MFM_INDEX_MARK "\x99\xc2\x99\xc2\x99\xc2\x99\xfc" | |
175 | #define MFM_GAP_LEN 12 | |
176 | ||
177 | struct floppy_state { | |
178 | enum swim_state state; | |
515729ec | 179 | spinlock_t lock; |
1da177e4 LT |
180 | struct swim3 __iomem *swim3; /* hardware registers */ |
181 | struct dbdma_regs __iomem *dma; /* DMA controller registers */ | |
182 | int swim3_intr; /* interrupt number for SWIM3 */ | |
183 | int dma_intr; /* interrupt number for DMA channel */ | |
184 | int cur_cyl; /* cylinder head is on, or -1 */ | |
185 | int cur_sector; /* last sector we saw go past */ | |
186 | int req_cyl; /* the cylinder for the current r/w request */ | |
187 | int head; /* head number ditto */ | |
188 | int req_sector; /* sector number ditto */ | |
189 | int scount; /* # sectors we're transferring at present */ | |
190 | int retries; | |
191 | int settle_time; | |
192 | int secpercyl; /* disk geometry information */ | |
193 | int secpertrack; | |
194 | int total_secs; | |
195 | int write_prot; /* 1 if write-protected, 0 if not, -1 dunno */ | |
196 | struct dbdma_cmd *dma_cmd; | |
197 | int ref_count; | |
198 | int expect_cyl; | |
199 | struct timer_list timeout; | |
200 | int timeout_pending; | |
201 | int ejected; | |
202 | wait_queue_head_t wait; | |
203 | int wanted; | |
d58b0c39 | 204 | struct macio_dev *mdev; |
1da177e4 LT |
205 | char dbdma_cmd_space[5 * sizeof(struct dbdma_cmd)]; |
206 | }; | |
207 | ||
208 | static struct floppy_state floppy_states[MAX_FLOPPIES]; | |
209 | static int floppy_count = 0; | |
210 | static DEFINE_SPINLOCK(swim3_lock); | |
211 | ||
212 | static unsigned short write_preamble[] = { | |
213 | 0x4e4e, 0x4e4e, 0x4e4e, 0x4e4e, 0x4e4e, /* gap field */ | |
214 | 0, 0, 0, 0, 0, 0, /* sync field */ | |
215 | 0x99a1, 0x99a1, 0x99a1, 0x99fb, /* data address mark */ | |
216 | 0x990f /* no escape for 512 bytes */ | |
217 | }; | |
218 | ||
219 | static unsigned short write_postamble[] = { | |
220 | 0x9904, /* insert CRC */ | |
221 | 0x4e4e, 0x4e4e, | |
222 | 0x9908, /* stop writing */ | |
223 | 0, 0, 0, 0, 0, 0 | |
224 | }; | |
225 | ||
226 | static void swim3_select(struct floppy_state *fs, int sel); | |
227 | static void swim3_action(struct floppy_state *fs, int action); | |
228 | static int swim3_readbit(struct floppy_state *fs, int bit); | |
165125e1 | 229 | static void do_fd_request(struct request_queue * q); |
1da177e4 LT |
230 | static void start_request(struct floppy_state *fs); |
231 | static void set_timeout(struct floppy_state *fs, int nticks, | |
232 | void (*proc)(unsigned long)); | |
233 | static void scan_track(struct floppy_state *fs); | |
234 | static void seek_track(struct floppy_state *fs, int n); | |
235 | static void init_dma(struct dbdma_cmd *cp, int cmd, void *buf, int count); | |
236 | static void setup_transfer(struct floppy_state *fs); | |
237 | static void act(struct floppy_state *fs); | |
238 | static void scan_timeout(unsigned long data); | |
239 | static void seek_timeout(unsigned long data); | |
240 | static void settle_timeout(unsigned long data); | |
241 | static void xfer_timeout(unsigned long data); | |
7d12e780 DH |
242 | static irqreturn_t swim3_interrupt(int irq, void *dev_id); |
243 | /*static void fd_dma_interrupt(int irq, void *dev_id);*/ | |
1da177e4 LT |
244 | static int grab_drive(struct floppy_state *fs, enum swim_state state, |
245 | int interruptible); | |
246 | static void release_drive(struct floppy_state *fs); | |
247 | static int fd_eject(struct floppy_state *fs); | |
b4d9a442 | 248 | static int floppy_ioctl(struct block_device *bdev, fmode_t mode, |
1da177e4 | 249 | unsigned int cmd, unsigned long param); |
b4d9a442 AV |
250 | static int floppy_open(struct block_device *bdev, fmode_t mode); |
251 | static int floppy_release(struct gendisk *disk, fmode_t mode); | |
1da177e4 LT |
252 | static int floppy_check_change(struct gendisk *disk); |
253 | static int floppy_revalidate(struct gendisk *disk); | |
1da177e4 | 254 | |
f4bd4b90 TH |
255 | static bool swim3_end_request(int err, unsigned int nr_bytes) |
256 | { | |
257 | if (__blk_end_request(fd_req, err, nr_bytes)) | |
258 | return true; | |
259 | ||
260 | fd_req = NULL; | |
261 | return false; | |
262 | } | |
263 | ||
264 | static bool swim3_end_request_cur(int err) | |
265 | { | |
266 | return swim3_end_request(err, blk_rq_cur_bytes(fd_req)); | |
267 | } | |
268 | ||
1da177e4 LT |
269 | static void swim3_select(struct floppy_state *fs, int sel) |
270 | { | |
271 | struct swim3 __iomem *sw = fs->swim3; | |
272 | ||
273 | out_8(&sw->select, RELAX); | |
274 | if (sel & 8) | |
275 | out_8(&sw->control_bis, SELECT); | |
276 | else | |
277 | out_8(&sw->control_bic, SELECT); | |
278 | out_8(&sw->select, sel & CA_MASK); | |
279 | } | |
280 | ||
281 | static void swim3_action(struct floppy_state *fs, int action) | |
282 | { | |
283 | struct swim3 __iomem *sw = fs->swim3; | |
284 | ||
285 | swim3_select(fs, action); | |
286 | udelay(1); | |
287 | out_8(&sw->select, sw->select | LSTRB); | |
288 | udelay(2); | |
289 | out_8(&sw->select, sw->select & ~LSTRB); | |
290 | udelay(1); | |
291 | } | |
292 | ||
293 | static int swim3_readbit(struct floppy_state *fs, int bit) | |
294 | { | |
295 | struct swim3 __iomem *sw = fs->swim3; | |
296 | int stat; | |
297 | ||
298 | swim3_select(fs, bit); | |
299 | udelay(1); | |
300 | stat = in_8(&sw->status); | |
301 | return (stat & DATA) == 0; | |
302 | } | |
303 | ||
165125e1 | 304 | static void do_fd_request(struct request_queue * q) |
1da177e4 LT |
305 | { |
306 | int i; | |
d58b0c39 BH |
307 | |
308 | for(i=0; i<floppy_count; i++) { | |
309 | struct floppy_state *fs = &floppy_states[i]; | |
310 | if (fs->mdev->media_bay && | |
311 | check_media_bay(fs->mdev->media_bay) != MB_FD) | |
1da177e4 | 312 | continue; |
d58b0c39 | 313 | start_request(fs); |
1da177e4 | 314 | } |
1da177e4 LT |
315 | } |
316 | ||
317 | static void start_request(struct floppy_state *fs) | |
318 | { | |
319 | struct request *req; | |
320 | unsigned long x; | |
321 | ||
322 | if (fs->state == idle && fs->wanted) { | |
323 | fs->state = available; | |
324 | wake_up(&fs->wait); | |
325 | return; | |
326 | } | |
f4bd4b90 TH |
327 | while (fs->state == idle) { |
328 | if (!fd_req) { | |
9934c8c0 | 329 | fd_req = blk_fetch_request(swim3_queue); |
f4bd4b90 TH |
330 | if (!fd_req) |
331 | break; | |
f4bd4b90 TH |
332 | } |
333 | req = fd_req; | |
1da177e4 | 334 | #if 0 |
83096ebf | 335 | printk("do_fd_req: dev=%s cmd=%d sec=%ld nr_sec=%u buf=%p\n", |
1da177e4 | 336 | req->rq_disk->disk_name, req->cmd, |
83096ebf TH |
337 | (long)blk_rq_pos(req), blk_rq_sectors(req), req->buffer); |
338 | printk(" errors=%d current_nr_sectors=%u\n", | |
339 | req->errors, blk_rq_cur_sectors(req)); | |
1da177e4 LT |
340 | #endif |
341 | ||
83096ebf | 342 | if (blk_rq_pos(req) >= fs->total_secs) { |
f4bd4b90 | 343 | swim3_end_request_cur(-EIO); |
1da177e4 LT |
344 | continue; |
345 | } | |
1da177e4 | 346 | if (fs->ejected) { |
f4bd4b90 | 347 | swim3_end_request_cur(-EIO); |
1da177e4 LT |
348 | continue; |
349 | } | |
350 | ||
351 | if (rq_data_dir(req) == WRITE) { | |
352 | if (fs->write_prot < 0) | |
353 | fs->write_prot = swim3_readbit(fs, WRITE_PROT); | |
354 | if (fs->write_prot) { | |
f4bd4b90 | 355 | swim3_end_request_cur(-EIO); |
1da177e4 LT |
356 | continue; |
357 | } | |
358 | } | |
359 | ||
83096ebf TH |
360 | /* Do not remove the cast. blk_rq_pos(req) is now a |
361 | * sector_t and can be 64 bits, but it will never go | |
362 | * past 32 bits for this driver anyway, so we can | |
363 | * safely cast it down and not have to do a 64/32 | |
364 | * division | |
1da177e4 | 365 | */ |
83096ebf TH |
366 | fs->req_cyl = ((long)blk_rq_pos(req)) / fs->secpercyl; |
367 | x = ((long)blk_rq_pos(req)) % fs->secpercyl; | |
1da177e4 LT |
368 | fs->head = x / fs->secpertrack; |
369 | fs->req_sector = x % fs->secpertrack + 1; | |
370 | fd_req = req; | |
371 | fs->state = do_transfer; | |
372 | fs->retries = 0; | |
373 | ||
374 | act(fs); | |
375 | } | |
376 | } | |
377 | ||
378 | static void set_timeout(struct floppy_state *fs, int nticks, | |
379 | void (*proc)(unsigned long)) | |
380 | { | |
381 | unsigned long flags; | |
382 | ||
515729ec | 383 | spin_lock_irqsave(&fs->lock, flags); |
1da177e4 LT |
384 | if (fs->timeout_pending) |
385 | del_timer(&fs->timeout); | |
386 | fs->timeout.expires = jiffies + nticks; | |
387 | fs->timeout.function = proc; | |
388 | fs->timeout.data = (unsigned long) fs; | |
389 | add_timer(&fs->timeout); | |
390 | fs->timeout_pending = 1; | |
515729ec | 391 | spin_unlock_irqrestore(&fs->lock, flags); |
1da177e4 LT |
392 | } |
393 | ||
394 | static inline void scan_track(struct floppy_state *fs) | |
395 | { | |
396 | struct swim3 __iomem *sw = fs->swim3; | |
397 | ||
398 | swim3_select(fs, READ_DATA_0); | |
399 | in_8(&sw->intr); /* clear SEEN_SECTOR bit */ | |
400 | in_8(&sw->error); | |
401 | out_8(&sw->intr_enable, SEEN_SECTOR); | |
402 | out_8(&sw->control_bis, DO_ACTION); | |
403 | /* enable intr when track found */ | |
404 | set_timeout(fs, HZ, scan_timeout); /* enable timeout */ | |
405 | } | |
406 | ||
407 | static inline void seek_track(struct floppy_state *fs, int n) | |
408 | { | |
409 | struct swim3 __iomem *sw = fs->swim3; | |
410 | ||
411 | if (n >= 0) { | |
412 | swim3_action(fs, SEEK_POSITIVE); | |
413 | sw->nseek = n; | |
414 | } else { | |
415 | swim3_action(fs, SEEK_NEGATIVE); | |
416 | sw->nseek = -n; | |
417 | } | |
418 | fs->expect_cyl = (fs->cur_cyl >= 0)? fs->cur_cyl + n: -1; | |
419 | swim3_select(fs, STEP); | |
420 | in_8(&sw->error); | |
421 | /* enable intr when seek finished */ | |
422 | out_8(&sw->intr_enable, SEEK_DONE); | |
423 | out_8(&sw->control_bis, DO_SEEK); | |
424 | set_timeout(fs, 3*HZ, seek_timeout); /* enable timeout */ | |
425 | fs->settle_time = 0; | |
426 | } | |
427 | ||
428 | static inline void init_dma(struct dbdma_cmd *cp, int cmd, | |
429 | void *buf, int count) | |
430 | { | |
431 | st_le16(&cp->req_count, count); | |
432 | st_le16(&cp->command, cmd); | |
433 | st_le32(&cp->phy_addr, virt_to_bus(buf)); | |
434 | cp->xfer_status = 0; | |
435 | } | |
436 | ||
437 | static inline void setup_transfer(struct floppy_state *fs) | |
438 | { | |
439 | int n; | |
440 | struct swim3 __iomem *sw = fs->swim3; | |
441 | struct dbdma_cmd *cp = fs->dma_cmd; | |
442 | struct dbdma_regs __iomem *dr = fs->dma; | |
443 | ||
83096ebf | 444 | if (blk_rq_cur_sectors(fd_req) <= 0) { |
1da177e4 LT |
445 | printk(KERN_ERR "swim3: transfer 0 sectors?\n"); |
446 | return; | |
447 | } | |
448 | if (rq_data_dir(fd_req) == WRITE) | |
449 | n = 1; | |
450 | else { | |
451 | n = fs->secpertrack - fs->req_sector + 1; | |
83096ebf TH |
452 | if (n > blk_rq_cur_sectors(fd_req)) |
453 | n = blk_rq_cur_sectors(fd_req); | |
1da177e4 LT |
454 | } |
455 | fs->scount = n; | |
456 | swim3_select(fs, fs->head? READ_DATA_1: READ_DATA_0); | |
457 | out_8(&sw->sector, fs->req_sector); | |
458 | out_8(&sw->nsect, n); | |
459 | out_8(&sw->gap3, 0); | |
460 | out_le32(&dr->cmdptr, virt_to_bus(cp)); | |
461 | if (rq_data_dir(fd_req) == WRITE) { | |
462 | /* Set up 3 dma commands: write preamble, data, postamble */ | |
463 | init_dma(cp, OUTPUT_MORE, write_preamble, sizeof(write_preamble)); | |
464 | ++cp; | |
465 | init_dma(cp, OUTPUT_MORE, fd_req->buffer, 512); | |
466 | ++cp; | |
467 | init_dma(cp, OUTPUT_LAST, write_postamble, sizeof(write_postamble)); | |
468 | } else { | |
469 | init_dma(cp, INPUT_LAST, fd_req->buffer, n * 512); | |
470 | } | |
471 | ++cp; | |
472 | out_le16(&cp->command, DBDMA_STOP); | |
473 | out_8(&sw->control_bic, DO_ACTION | WRITE_SECTORS); | |
474 | in_8(&sw->error); | |
475 | out_8(&sw->control_bic, DO_ACTION | WRITE_SECTORS); | |
476 | if (rq_data_dir(fd_req) == WRITE) | |
477 | out_8(&sw->control_bis, WRITE_SECTORS); | |
478 | in_8(&sw->intr); | |
479 | out_le32(&dr->control, (RUN << 16) | RUN); | |
480 | /* enable intr when transfer complete */ | |
481 | out_8(&sw->intr_enable, TRANSFER_DONE); | |
482 | out_8(&sw->control_bis, DO_ACTION); | |
483 | set_timeout(fs, 2*HZ, xfer_timeout); /* enable timeout */ | |
484 | } | |
485 | ||
486 | static void act(struct floppy_state *fs) | |
487 | { | |
488 | for (;;) { | |
489 | switch (fs->state) { | |
490 | case idle: | |
491 | return; /* XXX shouldn't get here */ | |
492 | ||
493 | case locating: | |
494 | if (swim3_readbit(fs, TRACK_ZERO)) { | |
495 | fs->cur_cyl = 0; | |
496 | if (fs->req_cyl == 0) | |
497 | fs->state = do_transfer; | |
498 | else | |
499 | fs->state = seeking; | |
500 | break; | |
501 | } | |
502 | scan_track(fs); | |
503 | return; | |
504 | ||
505 | case seeking: | |
506 | if (fs->cur_cyl < 0) { | |
507 | fs->expect_cyl = -1; | |
508 | fs->state = locating; | |
509 | break; | |
510 | } | |
511 | if (fs->req_cyl == fs->cur_cyl) { | |
512 | printk("whoops, seeking 0\n"); | |
513 | fs->state = do_transfer; | |
514 | break; | |
515 | } | |
516 | seek_track(fs, fs->req_cyl - fs->cur_cyl); | |
517 | return; | |
518 | ||
519 | case settling: | |
520 | /* check for SEEK_COMPLETE after 30ms */ | |
521 | fs->settle_time = (HZ + 32) / 33; | |
522 | set_timeout(fs, fs->settle_time, settle_timeout); | |
523 | return; | |
524 | ||
525 | case do_transfer: | |
526 | if (fs->cur_cyl != fs->req_cyl) { | |
527 | if (fs->retries > 5) { | |
f4bd4b90 | 528 | swim3_end_request_cur(-EIO); |
1da177e4 LT |
529 | fs->state = idle; |
530 | return; | |
531 | } | |
532 | fs->state = seeking; | |
533 | break; | |
534 | } | |
535 | setup_transfer(fs); | |
536 | return; | |
537 | ||
538 | case jogging: | |
539 | seek_track(fs, -5); | |
540 | return; | |
541 | ||
542 | default: | |
543 | printk(KERN_ERR"swim3: unknown state %d\n", fs->state); | |
544 | return; | |
545 | } | |
546 | } | |
547 | } | |
548 | ||
549 | static void scan_timeout(unsigned long data) | |
550 | { | |
551 | struct floppy_state *fs = (struct floppy_state *) data; | |
552 | struct swim3 __iomem *sw = fs->swim3; | |
553 | ||
554 | fs->timeout_pending = 0; | |
555 | out_8(&sw->control_bic, DO_ACTION | WRITE_SECTORS); | |
556 | out_8(&sw->select, RELAX); | |
557 | out_8(&sw->intr_enable, 0); | |
558 | fs->cur_cyl = -1; | |
559 | if (fs->retries > 5) { | |
f4bd4b90 | 560 | swim3_end_request_cur(-EIO); |
1da177e4 LT |
561 | fs->state = idle; |
562 | start_request(fs); | |
563 | } else { | |
564 | fs->state = jogging; | |
565 | act(fs); | |
566 | } | |
567 | } | |
568 | ||
569 | static void seek_timeout(unsigned long data) | |
570 | { | |
571 | struct floppy_state *fs = (struct floppy_state *) data; | |
572 | struct swim3 __iomem *sw = fs->swim3; | |
573 | ||
574 | fs->timeout_pending = 0; | |
575 | out_8(&sw->control_bic, DO_SEEK); | |
576 | out_8(&sw->select, RELAX); | |
577 | out_8(&sw->intr_enable, 0); | |
578 | printk(KERN_ERR "swim3: seek timeout\n"); | |
f4bd4b90 | 579 | swim3_end_request_cur(-EIO); |
1da177e4 LT |
580 | fs->state = idle; |
581 | start_request(fs); | |
582 | } | |
583 | ||
584 | static void settle_timeout(unsigned long data) | |
585 | { | |
586 | struct floppy_state *fs = (struct floppy_state *) data; | |
587 | struct swim3 __iomem *sw = fs->swim3; | |
588 | ||
589 | fs->timeout_pending = 0; | |
590 | if (swim3_readbit(fs, SEEK_COMPLETE)) { | |
591 | out_8(&sw->select, RELAX); | |
592 | fs->state = locating; | |
593 | act(fs); | |
594 | return; | |
595 | } | |
596 | out_8(&sw->select, RELAX); | |
597 | if (fs->settle_time < 2*HZ) { | |
598 | ++fs->settle_time; | |
599 | set_timeout(fs, 1, settle_timeout); | |
600 | return; | |
601 | } | |
602 | printk(KERN_ERR "swim3: seek settle timeout\n"); | |
f4bd4b90 | 603 | swim3_end_request_cur(-EIO); |
1da177e4 LT |
604 | fs->state = idle; |
605 | start_request(fs); | |
606 | } | |
607 | ||
608 | static void xfer_timeout(unsigned long data) | |
609 | { | |
610 | struct floppy_state *fs = (struct floppy_state *) data; | |
611 | struct swim3 __iomem *sw = fs->swim3; | |
612 | struct dbdma_regs __iomem *dr = fs->dma; | |
1da177e4 LT |
613 | int n; |
614 | ||
615 | fs->timeout_pending = 0; | |
616 | out_le32(&dr->control, RUN << 16); | |
617 | /* We must wait a bit for dbdma to stop */ | |
618 | for (n = 0; (in_le32(&dr->status) & ACTIVE) && n < 1000; n++) | |
619 | udelay(1); | |
620 | out_8(&sw->intr_enable, 0); | |
621 | out_8(&sw->control_bic, WRITE_SECTORS | DO_ACTION); | |
622 | out_8(&sw->select, RELAX); | |
1da177e4 | 623 | printk(KERN_ERR "swim3: timeout %sing sector %ld\n", |
83096ebf TH |
624 | (rq_data_dir(fd_req)==WRITE? "writ": "read"), |
625 | (long)blk_rq_pos(fd_req)); | |
f4bd4b90 | 626 | swim3_end_request_cur(-EIO); |
1da177e4 LT |
627 | fs->state = idle; |
628 | start_request(fs); | |
629 | } | |
630 | ||
7d12e780 | 631 | static irqreturn_t swim3_interrupt(int irq, void *dev_id) |
1da177e4 LT |
632 | { |
633 | struct floppy_state *fs = (struct floppy_state *) dev_id; | |
634 | struct swim3 __iomem *sw = fs->swim3; | |
635 | int intr, err, n; | |
636 | int stat, resid; | |
637 | struct dbdma_regs __iomem *dr; | |
638 | struct dbdma_cmd *cp; | |
639 | ||
640 | intr = in_8(&sw->intr); | |
641 | err = (intr & ERROR_INTR)? in_8(&sw->error): 0; | |
642 | if ((intr & ERROR_INTR) && fs->state != do_transfer) | |
14b1ffb5 | 643 | printk(KERN_ERR "swim3_interrupt, state=%d, dir=%x, intr=%x, err=%x\n", |
1da177e4 LT |
644 | fs->state, rq_data_dir(fd_req), intr, err); |
645 | switch (fs->state) { | |
646 | case locating: | |
647 | if (intr & SEEN_SECTOR) { | |
648 | out_8(&sw->control_bic, DO_ACTION | WRITE_SECTORS); | |
649 | out_8(&sw->select, RELAX); | |
650 | out_8(&sw->intr_enable, 0); | |
651 | del_timer(&fs->timeout); | |
652 | fs->timeout_pending = 0; | |
653 | if (sw->ctrack == 0xff) { | |
654 | printk(KERN_ERR "swim3: seen sector but cyl=ff?\n"); | |
655 | fs->cur_cyl = -1; | |
656 | if (fs->retries > 5) { | |
f4bd4b90 | 657 | swim3_end_request_cur(-EIO); |
1da177e4 LT |
658 | fs->state = idle; |
659 | start_request(fs); | |
660 | } else { | |
661 | fs->state = jogging; | |
662 | act(fs); | |
663 | } | |
664 | break; | |
665 | } | |
666 | fs->cur_cyl = sw->ctrack; | |
667 | fs->cur_sector = sw->csect; | |
668 | if (fs->expect_cyl != -1 && fs->expect_cyl != fs->cur_cyl) | |
669 | printk(KERN_ERR "swim3: expected cyl %d, got %d\n", | |
670 | fs->expect_cyl, fs->cur_cyl); | |
671 | fs->state = do_transfer; | |
672 | act(fs); | |
673 | } | |
674 | break; | |
675 | case seeking: | |
676 | case jogging: | |
677 | if (sw->nseek == 0) { | |
678 | out_8(&sw->control_bic, DO_SEEK); | |
679 | out_8(&sw->select, RELAX); | |
680 | out_8(&sw->intr_enable, 0); | |
681 | del_timer(&fs->timeout); | |
682 | fs->timeout_pending = 0; | |
683 | if (fs->state == seeking) | |
684 | ++fs->retries; | |
685 | fs->state = settling; | |
686 | act(fs); | |
687 | } | |
688 | break; | |
689 | case settling: | |
690 | out_8(&sw->intr_enable, 0); | |
691 | del_timer(&fs->timeout); | |
692 | fs->timeout_pending = 0; | |
693 | act(fs); | |
694 | break; | |
695 | case do_transfer: | |
696 | if ((intr & (ERROR_INTR | TRANSFER_DONE)) == 0) | |
697 | break; | |
698 | out_8(&sw->intr_enable, 0); | |
699 | out_8(&sw->control_bic, WRITE_SECTORS | DO_ACTION); | |
700 | out_8(&sw->select, RELAX); | |
701 | del_timer(&fs->timeout); | |
702 | fs->timeout_pending = 0; | |
703 | dr = fs->dma; | |
704 | cp = fs->dma_cmd; | |
705 | if (rq_data_dir(fd_req) == WRITE) | |
706 | ++cp; | |
707 | /* | |
708 | * Check that the main data transfer has finished. | |
709 | * On writing, the swim3 sometimes doesn't use | |
710 | * up all the bytes of the postamble, so we can still | |
711 | * see DMA active here. That doesn't matter as long | |
712 | * as all the sector data has been transferred. | |
713 | */ | |
714 | if ((intr & ERROR_INTR) == 0 && cp->xfer_status == 0) { | |
715 | /* wait a little while for DMA to complete */ | |
716 | for (n = 0; n < 100; ++n) { | |
717 | if (cp->xfer_status != 0) | |
718 | break; | |
719 | udelay(1); | |
720 | barrier(); | |
721 | } | |
722 | } | |
723 | /* turn off DMA */ | |
724 | out_le32(&dr->control, (RUN | PAUSE) << 16); | |
725 | stat = ld_le16(&cp->xfer_status); | |
726 | resid = ld_le16(&cp->res_count); | |
727 | if (intr & ERROR_INTR) { | |
728 | n = fs->scount - 1 - resid / 512; | |
729 | if (n > 0) { | |
467ca759 | 730 | blk_update_request(fd_req, 0, n << 9); |
1da177e4 LT |
731 | fs->req_sector += n; |
732 | } | |
733 | if (fs->retries < 5) { | |
734 | ++fs->retries; | |
735 | act(fs); | |
736 | } else { | |
737 | printk("swim3: error %sing block %ld (err=%x)\n", | |
738 | rq_data_dir(fd_req) == WRITE? "writ": "read", | |
83096ebf | 739 | (long)blk_rq_pos(fd_req), err); |
f4bd4b90 | 740 | swim3_end_request_cur(-EIO); |
1da177e4 LT |
741 | fs->state = idle; |
742 | } | |
743 | } else { | |
744 | if ((stat & ACTIVE) == 0 || resid != 0) { | |
745 | /* musta been an error */ | |
746 | printk(KERN_ERR "swim3: fd dma: stat=%x resid=%d\n", stat, resid); | |
14b1ffb5 | 747 | printk(KERN_ERR " state=%d, dir=%x, intr=%x, err=%x\n", |
1da177e4 | 748 | fs->state, rq_data_dir(fd_req), intr, err); |
f4bd4b90 | 749 | swim3_end_request_cur(-EIO); |
1da177e4 LT |
750 | fs->state = idle; |
751 | start_request(fs); | |
752 | break; | |
753 | } | |
f4bd4b90 | 754 | if (swim3_end_request(0, fs->scount << 9)) { |
1da177e4 LT |
755 | fs->req_sector += fs->scount; |
756 | if (fs->req_sector > fs->secpertrack) { | |
757 | fs->req_sector -= fs->secpertrack; | |
758 | if (++fs->head > 1) { | |
759 | fs->head = 0; | |
760 | ++fs->req_cyl; | |
761 | } | |
762 | } | |
763 | act(fs); | |
467ca759 TH |
764 | } else |
765 | fs->state = idle; | |
1da177e4 LT |
766 | } |
767 | if (fs->state == idle) | |
768 | start_request(fs); | |
769 | break; | |
770 | default: | |
771 | printk(KERN_ERR "swim3: don't know what to do in state %d\n", fs->state); | |
772 | } | |
773 | return IRQ_HANDLED; | |
774 | } | |
775 | ||
776 | /* | |
7d12e780 | 777 | static void fd_dma_interrupt(int irq, void *dev_id) |
1da177e4 LT |
778 | { |
779 | } | |
780 | */ | |
781 | ||
782 | static int grab_drive(struct floppy_state *fs, enum swim_state state, | |
783 | int interruptible) | |
784 | { | |
785 | unsigned long flags; | |
786 | ||
515729ec | 787 | spin_lock_irqsave(&fs->lock, flags); |
1da177e4 LT |
788 | if (fs->state != idle) { |
789 | ++fs->wanted; | |
790 | while (fs->state != available) { | |
791 | if (interruptible && signal_pending(current)) { | |
792 | --fs->wanted; | |
515729ec | 793 | spin_unlock_irqrestore(&fs->lock, flags); |
1da177e4 LT |
794 | return -EINTR; |
795 | } | |
796 | interruptible_sleep_on(&fs->wait); | |
797 | } | |
798 | --fs->wanted; | |
799 | } | |
800 | fs->state = state; | |
515729ec | 801 | spin_unlock_irqrestore(&fs->lock, flags); |
1da177e4 LT |
802 | return 0; |
803 | } | |
804 | ||
805 | static void release_drive(struct floppy_state *fs) | |
806 | { | |
807 | unsigned long flags; | |
808 | ||
515729ec | 809 | spin_lock_irqsave(&fs->lock, flags); |
1da177e4 LT |
810 | fs->state = idle; |
811 | start_request(fs); | |
515729ec | 812 | spin_unlock_irqrestore(&fs->lock, flags); |
1da177e4 LT |
813 | } |
814 | ||
815 | static int fd_eject(struct floppy_state *fs) | |
816 | { | |
817 | int err, n; | |
818 | ||
819 | err = grab_drive(fs, ejecting, 1); | |
820 | if (err) | |
821 | return err; | |
822 | swim3_action(fs, EJECT); | |
823 | for (n = 20; n > 0; --n) { | |
824 | if (signal_pending(current)) { | |
825 | err = -EINTR; | |
826 | break; | |
827 | } | |
828 | swim3_select(fs, RELAX); | |
86e84862 | 829 | schedule_timeout_interruptible(1); |
1da177e4 LT |
830 | if (swim3_readbit(fs, DISK_IN) == 0) |
831 | break; | |
832 | } | |
833 | swim3_select(fs, RELAX); | |
834 | udelay(150); | |
835 | fs->ejected = 1; | |
836 | release_drive(fs); | |
837 | return err; | |
838 | } | |
839 | ||
840 | static struct floppy_struct floppy_type = | |
841 | { 2880,18,2,80,0,0x1B,0x00,0xCF,0x6C,NULL }; /* 7 1.44MB 3.5" */ | |
842 | ||
8a6cfeb6 | 843 | static int floppy_locked_ioctl(struct block_device *bdev, fmode_t mode, |
1da177e4 LT |
844 | unsigned int cmd, unsigned long param) |
845 | { | |
b4d9a442 | 846 | struct floppy_state *fs = bdev->bd_disk->private_data; |
1da177e4 LT |
847 | int err; |
848 | ||
849 | if ((cmd & 0x80) && !capable(CAP_SYS_ADMIN)) | |
850 | return -EPERM; | |
851 | ||
d58b0c39 BH |
852 | if (fs->mdev->media_bay && |
853 | check_media_bay(fs->mdev->media_bay) != MB_FD) | |
1da177e4 LT |
854 | return -ENXIO; |
855 | ||
856 | switch (cmd) { | |
857 | case FDEJECT: | |
858 | if (fs->ref_count != 1) | |
859 | return -EBUSY; | |
860 | err = fd_eject(fs); | |
861 | return err; | |
862 | case FDGETPRM: | |
863 | if (copy_to_user((void __user *) param, &floppy_type, | |
864 | sizeof(struct floppy_struct))) | |
865 | return -EFAULT; | |
866 | return 0; | |
867 | } | |
868 | return -ENOTTY; | |
869 | } | |
870 | ||
8a6cfeb6 AB |
871 | static int floppy_ioctl(struct block_device *bdev, fmode_t mode, |
872 | unsigned int cmd, unsigned long param) | |
873 | { | |
874 | int ret; | |
875 | ||
876 | lock_kernel(); | |
877 | ret = floppy_locked_ioctl(bdev, mode, cmd, param); | |
878 | unlock_kernel(); | |
879 | ||
880 | return ret; | |
881 | } | |
882 | ||
b4d9a442 | 883 | static int floppy_open(struct block_device *bdev, fmode_t mode) |
1da177e4 | 884 | { |
b4d9a442 | 885 | struct floppy_state *fs = bdev->bd_disk->private_data; |
1da177e4 LT |
886 | struct swim3 __iomem *sw = fs->swim3; |
887 | int n, err = 0; | |
888 | ||
889 | if (fs->ref_count == 0) { | |
d58b0c39 BH |
890 | if (fs->mdev->media_bay && |
891 | check_media_bay(fs->mdev->media_bay) != MB_FD) | |
1da177e4 LT |
892 | return -ENXIO; |
893 | out_8(&sw->setup, S_IBM_DRIVE | S_FCLK_DIV2); | |
894 | out_8(&sw->control_bic, 0xff); | |
895 | out_8(&sw->mode, 0x95); | |
896 | udelay(10); | |
897 | out_8(&sw->intr_enable, 0); | |
898 | out_8(&sw->control_bis, DRIVE_ENABLE | INTR_ENABLE); | |
899 | swim3_action(fs, MOTOR_ON); | |
900 | fs->write_prot = -1; | |
901 | fs->cur_cyl = -1; | |
902 | for (n = 0; n < 2 * HZ; ++n) { | |
903 | if (n >= HZ/30 && swim3_readbit(fs, SEEK_COMPLETE)) | |
904 | break; | |
905 | if (signal_pending(current)) { | |
906 | err = -EINTR; | |
907 | break; | |
908 | } | |
909 | swim3_select(fs, RELAX); | |
86e84862 | 910 | schedule_timeout_interruptible(1); |
1da177e4 LT |
911 | } |
912 | if (err == 0 && (swim3_readbit(fs, SEEK_COMPLETE) == 0 | |
913 | || swim3_readbit(fs, DISK_IN) == 0)) | |
914 | err = -ENXIO; | |
915 | swim3_action(fs, SETMFM); | |
916 | swim3_select(fs, RELAX); | |
917 | ||
b4d9a442 | 918 | } else if (fs->ref_count == -1 || mode & FMODE_EXCL) |
1da177e4 LT |
919 | return -EBUSY; |
920 | ||
b4d9a442 AV |
921 | if (err == 0 && (mode & FMODE_NDELAY) == 0 |
922 | && (mode & (FMODE_READ|FMODE_WRITE))) { | |
923 | check_disk_change(bdev); | |
1da177e4 LT |
924 | if (fs->ejected) |
925 | err = -ENXIO; | |
926 | } | |
927 | ||
b4d9a442 | 928 | if (err == 0 && (mode & FMODE_WRITE)) { |
1da177e4 LT |
929 | if (fs->write_prot < 0) |
930 | fs->write_prot = swim3_readbit(fs, WRITE_PROT); | |
931 | if (fs->write_prot) | |
932 | err = -EROFS; | |
933 | } | |
934 | ||
935 | if (err) { | |
936 | if (fs->ref_count == 0) { | |
937 | swim3_action(fs, MOTOR_OFF); | |
938 | out_8(&sw->control_bic, DRIVE_ENABLE | INTR_ENABLE); | |
939 | swim3_select(fs, RELAX); | |
940 | } | |
941 | return err; | |
942 | } | |
943 | ||
b4d9a442 | 944 | if (mode & FMODE_EXCL) |
1da177e4 LT |
945 | fs->ref_count = -1; |
946 | else | |
947 | ++fs->ref_count; | |
948 | ||
949 | return 0; | |
950 | } | |
951 | ||
6e9624b8 AB |
952 | static int floppy_unlocked_open(struct block_device *bdev, fmode_t mode) |
953 | { | |
954 | int ret; | |
955 | ||
956 | lock_kernel(); | |
957 | ret = floppy_open(bdev, mode); | |
958 | unlock_kernel(); | |
959 | ||
960 | return ret; | |
961 | } | |
962 | ||
b4d9a442 | 963 | static int floppy_release(struct gendisk *disk, fmode_t mode) |
1da177e4 | 964 | { |
b4d9a442 | 965 | struct floppy_state *fs = disk->private_data; |
1da177e4 | 966 | struct swim3 __iomem *sw = fs->swim3; |
6e9624b8 | 967 | lock_kernel(); |
1da177e4 LT |
968 | if (fs->ref_count > 0 && --fs->ref_count == 0) { |
969 | swim3_action(fs, MOTOR_OFF); | |
970 | out_8(&sw->control_bic, 0xff); | |
971 | swim3_select(fs, RELAX); | |
972 | } | |
6e9624b8 | 973 | unlock_kernel(); |
1da177e4 LT |
974 | return 0; |
975 | } | |
976 | ||
977 | static int floppy_check_change(struct gendisk *disk) | |
978 | { | |
979 | struct floppy_state *fs = disk->private_data; | |
980 | return fs->ejected; | |
981 | } | |
982 | ||
983 | static int floppy_revalidate(struct gendisk *disk) | |
984 | { | |
985 | struct floppy_state *fs = disk->private_data; | |
986 | struct swim3 __iomem *sw; | |
987 | int ret, n; | |
988 | ||
d58b0c39 BH |
989 | if (fs->mdev->media_bay && |
990 | check_media_bay(fs->mdev->media_bay) != MB_FD) | |
1da177e4 LT |
991 | return -ENXIO; |
992 | ||
993 | sw = fs->swim3; | |
994 | grab_drive(fs, revalidating, 0); | |
995 | out_8(&sw->intr_enable, 0); | |
996 | out_8(&sw->control_bis, DRIVE_ENABLE); | |
997 | swim3_action(fs, MOTOR_ON); /* necessary? */ | |
998 | fs->write_prot = -1; | |
999 | fs->cur_cyl = -1; | |
1000 | mdelay(1); | |
1001 | for (n = HZ; n > 0; --n) { | |
1002 | if (swim3_readbit(fs, SEEK_COMPLETE)) | |
1003 | break; | |
1004 | if (signal_pending(current)) | |
1005 | break; | |
1006 | swim3_select(fs, RELAX); | |
86e84862 | 1007 | schedule_timeout_interruptible(1); |
1da177e4 LT |
1008 | } |
1009 | ret = swim3_readbit(fs, SEEK_COMPLETE) == 0 | |
1010 | || swim3_readbit(fs, DISK_IN) == 0; | |
1011 | if (ret) | |
1012 | swim3_action(fs, MOTOR_OFF); | |
1013 | else { | |
1014 | fs->ejected = 0; | |
1015 | swim3_action(fs, SETMFM); | |
1016 | } | |
1017 | swim3_select(fs, RELAX); | |
1018 | ||
1019 | release_drive(fs); | |
1020 | return ret; | |
1021 | } | |
1022 | ||
83d5cde4 | 1023 | static const struct block_device_operations floppy_fops = { |
6e9624b8 | 1024 | .open = floppy_unlocked_open, |
b4d9a442 | 1025 | .release = floppy_release, |
8a6cfeb6 | 1026 | .ioctl = floppy_ioctl, |
1da177e4 LT |
1027 | .media_changed = floppy_check_change, |
1028 | .revalidate_disk= floppy_revalidate, | |
1029 | }; | |
1030 | ||
3e9a6927 | 1031 | static int swim3_add_device(struct macio_dev *mdev, int index) |
1da177e4 | 1032 | { |
61c7a080 | 1033 | struct device_node *swim = mdev->ofdev.dev.of_node; |
3e9a6927 BH |
1034 | struct floppy_state *fs = &floppy_states[index]; |
1035 | int rc = -EBUSY; | |
1da177e4 | 1036 | |
3e9a6927 BH |
1037 | /* Check & Request resources */ |
1038 | if (macio_resource_count(mdev) < 2) { | |
1039 | printk(KERN_WARNING "ifd%d: no address for %s\n", | |
1040 | index, swim->full_name); | |
1041 | return -ENXIO; | |
1da177e4 | 1042 | } |
3e9a6927 BH |
1043 | if (macio_irq_count(mdev) < 2) { |
1044 | printk(KERN_WARNING "fd%d: no intrs for device %s\n", | |
1045 | index, swim->full_name); | |
cc5d0189 | 1046 | } |
3e9a6927 BH |
1047 | if (macio_request_resource(mdev, 0, "swim3 (mmio)")) { |
1048 | printk(KERN_ERR "fd%d: can't request mmio resource for %s\n", | |
1049 | index, swim->full_name); | |
1050 | return -EBUSY; | |
1da177e4 | 1051 | } |
3e9a6927 BH |
1052 | if (macio_request_resource(mdev, 1, "swim3 (dma)")) { |
1053 | printk(KERN_ERR "fd%d: can't request dma resource for %s\n", | |
1054 | index, swim->full_name); | |
1055 | macio_release_resource(mdev, 0); | |
1056 | return -EBUSY; | |
1da177e4 | 1057 | } |
3e9a6927 | 1058 | dev_set_drvdata(&mdev->ofdev.dev, fs); |
1da177e4 | 1059 | |
d58b0c39 | 1060 | if (mdev->media_bay == NULL) |
1da177e4 LT |
1061 | pmac_call_feature(PMAC_FTR_SWIM3_ENABLE, swim, 0, 1); |
1062 | ||
1063 | memset(fs, 0, sizeof(*fs)); | |
515729ec | 1064 | spin_lock_init(&fs->lock); |
1da177e4 | 1065 | fs->state = idle; |
3e9a6927 BH |
1066 | fs->swim3 = (struct swim3 __iomem *) |
1067 | ioremap(macio_resource_start(mdev, 0), 0x200); | |
1068 | if (fs->swim3 == NULL) { | |
1069 | printk("fd%d: couldn't map registers for %s\n", | |
1070 | index, swim->full_name); | |
1071 | rc = -ENOMEM; | |
1072 | goto out_release; | |
1073 | } | |
1074 | fs->dma = (struct dbdma_regs __iomem *) | |
1075 | ioremap(macio_resource_start(mdev, 1), 0x200); | |
1076 | if (fs->dma == NULL) { | |
1077 | printk("fd%d: couldn't map DMA for %s\n", | |
1078 | index, swim->full_name); | |
1079 | iounmap(fs->swim3); | |
1080 | rc = -ENOMEM; | |
1081 | goto out_release; | |
1082 | } | |
1083 | fs->swim3_intr = macio_irq(mdev, 0); | |
a419aef8 | 1084 | fs->dma_intr = macio_irq(mdev, 1); |
1da177e4 LT |
1085 | fs->cur_cyl = -1; |
1086 | fs->cur_sector = -1; | |
1087 | fs->secpercyl = 36; | |
1088 | fs->secpertrack = 18; | |
1089 | fs->total_secs = 2880; | |
d58b0c39 | 1090 | fs->mdev = mdev; |
1da177e4 LT |
1091 | init_waitqueue_head(&fs->wait); |
1092 | ||
1093 | fs->dma_cmd = (struct dbdma_cmd *) DBDMA_ALIGN(fs->dbdma_cmd_space); | |
1094 | memset(fs->dma_cmd, 0, 2 * sizeof(struct dbdma_cmd)); | |
1095 | st_le16(&fs->dma_cmd[1].command, DBDMA_STOP); | |
1096 | ||
1097 | if (request_irq(fs->swim3_intr, swim3_interrupt, 0, "SWIM3", fs)) { | |
3e9a6927 BH |
1098 | printk(KERN_ERR "fd%d: couldn't request irq %d for %s\n", |
1099 | index, fs->swim3_intr, swim->full_name); | |
1da177e4 | 1100 | pmac_call_feature(PMAC_FTR_SWIM3_ENABLE, swim, 0, 0); |
3e9a6927 | 1101 | goto out_unmap; |
1da177e4 LT |
1102 | return -EBUSY; |
1103 | } | |
1104 | /* | |
1105 | if (request_irq(fs->dma_intr, fd_dma_interrupt, 0, "SWIM3-dma", fs)) { | |
1106 | printk(KERN_ERR "Couldn't get irq %d for SWIM3 DMA", | |
1107 | fs->dma_intr); | |
1da177e4 LT |
1108 | return -EBUSY; |
1109 | } | |
1110 | */ | |
1111 | ||
1112 | init_timer(&fs->timeout); | |
1113 | ||
1114 | printk(KERN_INFO "fd%d: SWIM3 floppy controller %s\n", floppy_count, | |
d58b0c39 | 1115 | mdev->media_bay ? "in media bay" : ""); |
1da177e4 | 1116 | |
3e9a6927 BH |
1117 | return 0; |
1118 | ||
1119 | out_unmap: | |
1120 | iounmap(fs->dma); | |
1121 | iounmap(fs->swim3); | |
1122 | ||
1123 | out_release: | |
1124 | macio_release_resource(mdev, 0); | |
1125 | macio_release_resource(mdev, 1); | |
1126 | ||
1127 | return rc; | |
1128 | } | |
1129 | ||
1130 | static int __devinit swim3_attach(struct macio_dev *mdev, const struct of_device_id *match) | |
1131 | { | |
1132 | int i, rc; | |
1133 | struct gendisk *disk; | |
1134 | ||
1135 | /* Add the drive */ | |
1136 | rc = swim3_add_device(mdev, floppy_count); | |
1137 | if (rc) | |
1138 | return rc; | |
1139 | ||
1140 | /* Now create the queue if not there yet */ | |
1141 | if (swim3_queue == NULL) { | |
1142 | /* If we failed, there isn't much we can do as the driver is still | |
1143 | * too dumb to remove the device, just bail out | |
1144 | */ | |
1145 | if (register_blkdev(FLOPPY_MAJOR, "fd")) | |
1146 | return 0; | |
1147 | swim3_queue = blk_init_queue(do_fd_request, &swim3_lock); | |
1148 | if (swim3_queue == NULL) { | |
1149 | unregister_blkdev(FLOPPY_MAJOR, "fd"); | |
1150 | return 0; | |
1151 | } | |
1152 | } | |
1153 | ||
1154 | /* Now register that disk. Same comment about failure handling */ | |
1155 | i = floppy_count++; | |
1156 | disk = disks[i] = alloc_disk(1); | |
1157 | if (disk == NULL) | |
1158 | return 0; | |
1159 | ||
1160 | disk->major = FLOPPY_MAJOR; | |
1161 | disk->first_minor = i; | |
1162 | disk->fops = &floppy_fops; | |
1163 | disk->private_data = &floppy_states[i]; | |
1164 | disk->queue = swim3_queue; | |
1165 | disk->flags |= GENHD_FL_REMOVABLE; | |
1166 | sprintf(disk->disk_name, "fd%d", i); | |
1167 | set_capacity(disk, 2880); | |
1168 | add_disk(disk); | |
1169 | ||
1170 | return 0; | |
1171 | } | |
1172 | ||
1173 | static struct of_device_id swim3_match[] = | |
1174 | { | |
1175 | { | |
1176 | .name = "swim3", | |
1177 | }, | |
1178 | { | |
1179 | .compatible = "ohare-swim3" | |
1180 | }, | |
1181 | { | |
1182 | .compatible = "swim3" | |
1183 | }, | |
1184 | }; | |
1185 | ||
1186 | static struct macio_driver swim3_driver = | |
1187 | { | |
c2cdf6ab BH |
1188 | .driver = { |
1189 | .name = "swim3", | |
1190 | .of_match_table = swim3_match, | |
1191 | }, | |
3e9a6927 BH |
1192 | .probe = swim3_attach, |
1193 | #if 0 | |
1194 | .suspend = swim3_suspend, | |
1195 | .resume = swim3_resume, | |
1196 | #endif | |
1197 | }; | |
1198 | ||
1199 | ||
1200 | int swim3_init(void) | |
1201 | { | |
1202 | macio_register_driver(&swim3_driver); | |
1da177e4 LT |
1203 | return 0; |
1204 | } | |
1205 | ||
1206 | module_init(swim3_init) | |
1207 | ||
1208 | MODULE_LICENSE("GPL"); | |
1209 | MODULE_AUTHOR("Paul Mackerras"); | |
1210 | MODULE_ALIAS_BLOCKDEV_MAJOR(FLOPPY_MAJOR); |