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1949739a 1// SPDX-License-Identifier: GPL-2.0-only
1da177e4
LT
2/*
3 * mm.c - Micro Memory(tm) PCI memory board block device driver - v2.3
4 *
5 * (C) 2001 San Mehat <nettwerk@valinux.com>
6 * (C) 2001 Johannes Erdfelt <jerdfelt@valinux.com>
7 * (C) 2001 NeilBrown <neilb@cse.unsw.edu.au>
8 *
9 * This driver for the Micro Memory PCI Memory Module with Battery Backup
10 * is Copyright Micro Memory Inc 2001-2002. All rights reserved.
11 *
1da177e4
LT
12 * This driver provides a standard block device interface for Micro Memory(tm)
13 * PCI based RAM boards.
14 * 10/05/01: Phap Nguyen - Rebuilt the driver
15 * 10/22/01: Phap Nguyen - v2.1 Added disk partitioning
16 * 29oct2001:NeilBrown - Use make_request_fn instead of request_fn
17 * - use stand disk partitioning (so fdisk works).
18 * 08nov2001:NeilBrown - change driver name from "mm" to "umem"
19 * - incorporate into main kernel
20 * 08apr2002:NeilBrown - Move some of interrupt handle to tasklet
21 * - use spin_lock_bh instead of _irq
22 * - Never block on make_request. queue
23 * bh's instead.
24 * - unregister umem from devfs at mod unload
25 * - Change version to 2.3
26 * 07Nov2001:Phap Nguyen - Select pci read command: 06, 12, 15 (Decimal)
27 * 07Jan2002: P. Nguyen - Used PCI Memory Write & Invalidate for DMA
28 * 15May2002:NeilBrown - convert to bio for 2.5
29 * 17May2002:NeilBrown - remove init_mem initialisation. Instead detect
30 * - a sequence of writes that cover the card, and
31 * - set initialised bit then.
32 */
33
458cf5e9 34#undef DEBUG /* #define DEBUG if you want debugging info (pr_debug) */
1da177e4
LT
35#include <linux/fs.h>
36#include <linux/bio.h>
37#include <linux/kernel.h>
38#include <linux/mm.h>
39#include <linux/mman.h>
5a0e3ad6 40#include <linux/gfp.h>
1da177e4
LT
41#include <linux/ioctl.h>
42#include <linux/module.h>
43#include <linux/init.h>
44#include <linux/interrupt.h>
1da177e4
LT
45#include <linux/timer.h>
46#include <linux/pci.h>
910638ae 47#include <linux/dma-mapping.h>
1da177e4
LT
48
49#include <linux/fcntl.h> /* O_ACCMODE */
50#include <linux/hdreg.h> /* HDIO_GETGEO */
51
3084f0c6 52#include "umem.h"
1da177e4 53
7c0f6ba6 54#include <linux/uaccess.h>
1da177e4
LT
55#include <asm/io.h>
56
1da177e4
LT
57#define MM_MAXCARDS 4
58#define MM_RAHEAD 2 /* two sectors */
59#define MM_BLKSIZE 1024 /* 1k blocks */
60#define MM_HARDSECT 512 /* 512-byte hardware sectors */
61#define MM_SHIFT 6 /* max 64 partitions on 4 cards */
62
63/*
64 * Version Information
65 */
66
ee4a7b68
JG
67#define DRIVER_NAME "umem"
68#define DRIVER_VERSION "v2.3"
69#define DRIVER_AUTHOR "San Mehat, Johannes Erdfelt, NeilBrown"
70#define DRIVER_DESC "Micro Memory(tm) PCI memory board block driver"
1da177e4
LT
71
72static int debug;
73/* #define HW_TRACE(x) writeb(x,cards[0].csr_remap + MEMCTRLSTATUS_MAGIC) */
74#define HW_TRACE(x)
75
76#define DEBUG_LED_ON_TRANSFER 0x01
77#define DEBUG_BATTERY_POLLING 0x02
78
79module_param(debug, int, 0644);
80MODULE_PARM_DESC(debug, "Debug bitmask");
81
82static int pci_read_cmd = 0x0C; /* Read Multiple */
83module_param(pci_read_cmd, int, 0);
84MODULE_PARM_DESC(pci_read_cmd, "PCI read command");
85
86static int pci_write_cmd = 0x0F; /* Write and Invalidate */
87module_param(pci_write_cmd, int, 0);
88MODULE_PARM_DESC(pci_write_cmd, "PCI write command");
89
90static int pci_cmds;
91
92static int major_nr;
93
94#include <linux/blkdev.h>
95#include <linux/blkpg.h>
96
97struct cardinfo {
1da177e4
LT
98 struct pci_dev *dev;
99
1da177e4 100 unsigned char __iomem *csr_remap;
1da177e4
LT
101 unsigned int mm_size; /* size in kbytes */
102
103 unsigned int init_size; /* initial segment, in sectors,
104 * that we know to
105 * have been written
106 */
107 struct bio *bio, *currentbio, **biotail;
003b5c57 108 struct bvec_iter current_iter;
1da177e4 109
165125e1 110 struct request_queue *queue;
1da177e4
LT
111
112 struct mm_page {
113 dma_addr_t page_dma;
114 struct mm_dma_desc *desc;
115 int cnt, headcnt;
116 struct bio *bio, **biotail;
003b5c57 117 struct bvec_iter iter;
1da177e4
LT
118 } mm_pages[2];
119#define DESC_PER_PAGE ((PAGE_SIZE*2)/sizeof(struct mm_dma_desc))
120
121 int Active, Ready;
122
123 struct tasklet_struct tasklet;
124 unsigned int dma_status;
125
126 struct {
127 int good;
128 int warned;
129 unsigned long last_change;
130 } battery[2];
131
132 spinlock_t lock;
133 int check_batteries;
134
135 int flags;
136};
137
138static struct cardinfo cards[MM_MAXCARDS];
1da177e4
LT
139static struct timer_list battery_timer;
140
458cf5e9 141static int num_cards;
1da177e4
LT
142
143static struct gendisk *mm_gendisk[MM_MAXCARDS];
144
145static void check_batteries(struct cardinfo *card);
146
1da177e4
LT
147static int get_userbit(struct cardinfo *card, int bit)
148{
149 unsigned char led;
150
151 led = readb(card->csr_remap + MEMCTRLCMD_LEDCTRL);
152 return led & bit;
153}
458cf5e9 154
1da177e4
LT
155static int set_userbit(struct cardinfo *card, int bit, unsigned char state)
156{
157 unsigned char led;
158
159 led = readb(card->csr_remap + MEMCTRLCMD_LEDCTRL);
160 if (state)
161 led |= bit;
162 else
163 led &= ~bit;
164 writeb(led, card->csr_remap + MEMCTRLCMD_LEDCTRL);
165
166 return 0;
167}
458cf5e9 168
1da177e4
LT
169/*
170 * NOTE: For the power LED, use the LED_POWER_* macros since they differ
171 */
172static void set_led(struct cardinfo *card, int shift, unsigned char state)
173{
174 unsigned char led;
175
176 led = readb(card->csr_remap + MEMCTRLCMD_LEDCTRL);
177 if (state == LED_FLIP)
178 led ^= (1<<shift);
179 else {
180 led &= ~(0x03 << shift);
181 led |= (state << shift);
182 }
183 writeb(led, card->csr_remap + MEMCTRLCMD_LEDCTRL);
184
185}
186
187#ifdef MM_DIAG
1da177e4
LT
188static void dump_regs(struct cardinfo *card)
189{
190 unsigned char *p;
191 int i, i1;
192
193 p = card->csr_remap;
194 for (i = 0; i < 8; i++) {
195 printk(KERN_DEBUG "%p ", p);
196
197 for (i1 = 0; i1 < 16; i1++)
198 printk("%02x ", *p++);
199
200 printk("\n");
201 }
202}
203#endif
458cf5e9 204
1da177e4
LT
205static void dump_dmastat(struct cardinfo *card, unsigned int dmastat)
206{
4e0af881 207 dev_printk(KERN_DEBUG, &card->dev->dev, "DMAstat - ");
1da177e4 208 if (dmastat & DMASCR_ANY_ERR)
458cf5e9 209 printk(KERN_CONT "ANY_ERR ");
1da177e4 210 if (dmastat & DMASCR_MBE_ERR)
458cf5e9 211 printk(KERN_CONT "MBE_ERR ");
1da177e4 212 if (dmastat & DMASCR_PARITY_ERR_REP)
458cf5e9 213 printk(KERN_CONT "PARITY_ERR_REP ");
1da177e4 214 if (dmastat & DMASCR_PARITY_ERR_DET)
458cf5e9 215 printk(KERN_CONT "PARITY_ERR_DET ");
1da177e4 216 if (dmastat & DMASCR_SYSTEM_ERR_SIG)
458cf5e9 217 printk(KERN_CONT "SYSTEM_ERR_SIG ");
1da177e4 218 if (dmastat & DMASCR_TARGET_ABT)
458cf5e9 219 printk(KERN_CONT "TARGET_ABT ");
1da177e4 220 if (dmastat & DMASCR_MASTER_ABT)
458cf5e9 221 printk(KERN_CONT "MASTER_ABT ");
1da177e4 222 if (dmastat & DMASCR_CHAIN_COMPLETE)
458cf5e9 223 printk(KERN_CONT "CHAIN_COMPLETE ");
1da177e4 224 if (dmastat & DMASCR_DMA_COMPLETE)
458cf5e9 225 printk(KERN_CONT "DMA_COMPLETE ");
1da177e4
LT
226 printk("\n");
227}
228
229/*
230 * Theory of request handling
231 *
232 * Each bio is assigned to one mm_dma_desc - which may not be enough FIXME
233 * We have two pages of mm_dma_desc, holding about 64 descriptors
234 * each. These are allocated at init time.
235 * One page is "Ready" and is either full, or can have request added.
236 * The other page might be "Active", which DMA is happening on it.
237 *
238 * Whenever IO on the active page completes, the Ready page is activated
239 * and the ex-Active page is clean out and made Ready.
7eaceacc 240 * Otherwise the Ready page is only activated when it becomes full.
1da177e4
LT
241 *
242 * If a request arrives while both pages a full, it is queued, and b_rdev is
243 * overloaded to record whether it was a read or a write.
244 *
245 * The interrupt handler only polls the device to clear the interrupt.
246 * The processing of the result is done in a tasklet.
247 */
248
249static void mm_start_io(struct cardinfo *card)
250{
251 /* we have the lock, we know there is
252 * no IO active, and we know that card->Active
253 * is set
254 */
255 struct mm_dma_desc *desc;
256 struct mm_page *page;
257 int offset;
258
259 /* make the last descriptor end the chain */
260 page = &card->mm_pages[card->Active];
458cf5e9
RD
261 pr_debug("start_io: %d %d->%d\n",
262 card->Active, page->headcnt, page->cnt - 1);
1da177e4
LT
263 desc = &page->desc[page->cnt-1];
264
265 desc->control_bits |= cpu_to_le32(DMASCR_CHAIN_COMP_EN);
266 desc->control_bits &= ~cpu_to_le32(DMASCR_CHAIN_EN);
267 desc->sem_control_bits = desc->control_bits;
268
4e953a21 269
1da177e4
LT
270 if (debug & DEBUG_LED_ON_TRANSFER)
271 set_led(card, LED_REMOVE, LED_ON);
272
273 desc = &page->desc[page->headcnt];
274 writel(0, card->csr_remap + DMA_PCI_ADDR);
275 writel(0, card->csr_remap + DMA_PCI_ADDR + 4);
276
277 writel(0, card->csr_remap + DMA_LOCAL_ADDR);
278 writel(0, card->csr_remap + DMA_LOCAL_ADDR + 4);
279
280 writel(0, card->csr_remap + DMA_TRANSFER_SIZE);
281 writel(0, card->csr_remap + DMA_TRANSFER_SIZE + 4);
282
283 writel(0, card->csr_remap + DMA_SEMAPHORE_ADDR);
284 writel(0, card->csr_remap + DMA_SEMAPHORE_ADDR + 4);
285
458cf5e9
RD
286 offset = ((char *)desc) - ((char *)page->desc);
287 writel(cpu_to_le32((page->page_dma+offset) & 0xffffffff),
1da177e4
LT
288 card->csr_remap + DMA_DESCRIPTOR_ADDR);
289 /* Force the value to u64 before shifting otherwise >> 32 is undefined C
290 * and on some ports will do nothing ! */
291 writel(cpu_to_le32(((u64)page->page_dma)>>32),
292 card->csr_remap + DMA_DESCRIPTOR_ADDR + 4);
293
294 /* Go, go, go */
295 writel(cpu_to_le32(DMASCR_GO | DMASCR_CHAIN_EN | pci_cmds),
296 card->csr_remap + DMA_STATUS_CTRL);
297}
298
299static int add_bio(struct cardinfo *card);
300
301static void activate(struct cardinfo *card)
302{
4e953a21 303 /* if No page is Active, and Ready is
1da177e4
LT
304 * not empty, then switch Ready page
305 * to active and start IO.
306 * Then add any bh's that are available to Ready
307 */
308
309 do {
310 while (add_bio(card))
311 ;
312
313 if (card->Active == -1 &&
314 card->mm_pages[card->Ready].cnt > 0) {
315 card->Active = card->Ready;
316 card->Ready = 1-card->Ready;
317 mm_start_io(card);
318 }
319
320 } while (card->Active == -1 && add_bio(card));
321}
322
323static inline void reset_page(struct mm_page *page)
324{
325 page->cnt = 0;
326 page->headcnt = 0;
327 page->bio = NULL;
458cf5e9 328 page->biotail = &page->bio;
1da177e4
LT
329}
330
4e953a21 331/*
1da177e4
LT
332 * If there is room on Ready page, take
333 * one bh off list and add it.
334 * return 1 if there was room, else 0.
335 */
336static int add_bio(struct cardinfo *card)
337{
338 struct mm_page *p;
339 struct mm_dma_desc *desc;
340 dma_addr_t dma_handle;
341 int offset;
342 struct bio *bio;
003b5c57 343 struct bio_vec vec;
1da177e4
LT
344
345 bio = card->currentbio;
346 if (!bio && card->bio) {
347 card->currentbio = card->bio;
003b5c57 348 card->current_iter = card->bio->bi_iter;
1da177e4
LT
349 card->bio = card->bio->bi_next;
350 if (card->bio == NULL)
351 card->biotail = &card->bio;
352 card->currentbio->bi_next = NULL;
353 return 1;
354 }
355 if (!bio)
356 return 0;
357
1da177e4
LT
358 if (card->mm_pages[card->Ready].cnt >= DESC_PER_PAGE)
359 return 0;
360
003b5c57
KO
361 vec = bio_iter_iovec(bio, card->current_iter);
362
b46d40da 363 dma_handle = dma_map_page(&card->dev->dev,
003b5c57
KO
364 vec.bv_page,
365 vec.bv_offset,
366 vec.bv_len,
70246286 367 bio_op(bio) == REQ_OP_READ ?
b46d40da 368 DMA_FROM_DEVICE : DMA_TO_DEVICE);
1da177e4
LT
369
370 p = &card->mm_pages[card->Ready];
371 desc = &p->desc[p->cnt];
372 p->cnt++;
eea9befa 373 if (p->bio == NULL)
003b5c57 374 p->iter = card->current_iter;
1da177e4
LT
375 if ((p->biotail) != &bio->bi_next) {
376 *(p->biotail) = bio;
377 p->biotail = &(bio->bi_next);
378 bio->bi_next = NULL;
379 }
380
381 desc->data_dma_handle = dma_handle;
382
383 desc->pci_addr = cpu_to_le64((u64)desc->data_dma_handle);
003b5c57
KO
384 desc->local_addr = cpu_to_le64(card->current_iter.bi_sector << 9);
385 desc->transfer_size = cpu_to_le32(vec.bv_len);
458cf5e9 386 offset = (((char *)&desc->sem_control_bits) - ((char *)p->desc));
1da177e4
LT
387 desc->sem_addr = cpu_to_le64((u64)(p->page_dma+offset));
388 desc->zero1 = desc->zero2 = 0;
458cf5e9 389 offset = (((char *)(desc+1)) - ((char *)p->desc));
1da177e4
LT
390 desc->next_desc_addr = cpu_to_le64(p->page_dma+offset);
391 desc->control_bits = cpu_to_le32(DMASCR_GO|DMASCR_ERR_INT_EN|
392 DMASCR_PARITY_INT_EN|
393 DMASCR_CHAIN_EN |
394 DMASCR_SEM_EN |
395 pci_cmds);
70246286 396 if (bio_op(bio) == REQ_OP_WRITE)
1da177e4
LT
397 desc->control_bits |= cpu_to_le32(DMASCR_TRANSFER_READ);
398 desc->sem_control_bits = desc->control_bits;
399
003b5c57
KO
400
401 bio_advance_iter(bio, &card->current_iter, vec.bv_len);
402 if (!card->current_iter.bi_size)
1da177e4
LT
403 card->currentbio = NULL;
404
405 return 1;
406}
407
408static void process_page(unsigned long data)
409{
410 /* check if any of the requests in the page are DMA_COMPLETE,
411 * and deal with them appropriately.
412 * If we find a descriptor without DMA_COMPLETE in the semaphore, then
458cf5e9
RD
413 * dma must have hit an error on that descriptor, so use dma_status
414 * instead and assume that all following descriptors must be re-tried.
1da177e4
LT
415 */
416 struct mm_page *page;
458cf5e9 417 struct bio *return_bio = NULL;
1da177e4
LT
418 struct cardinfo *card = (struct cardinfo *)data;
419 unsigned int dma_status = card->dma_status;
420
902d5391 421 spin_lock(&card->lock);
1da177e4
LT
422 if (card->Active < 0)
423 goto out_unlock;
424 page = &card->mm_pages[card->Active];
4e953a21 425
1da177e4
LT
426 while (page->headcnt < page->cnt) {
427 struct bio *bio = page->bio;
428 struct mm_dma_desc *desc = &page->desc[page->headcnt];
429 int control = le32_to_cpu(desc->sem_control_bits);
458cf5e9 430 int last = 0;
003b5c57 431 struct bio_vec vec;
1da177e4
LT
432
433 if (!(control & DMASCR_DMA_COMPLETE)) {
434 control = dma_status;
458cf5e9 435 last = 1;
1da177e4 436 }
003b5c57 437
1da177e4 438 page->headcnt++;
003b5c57
KO
439 vec = bio_iter_iovec(bio, page->iter);
440 bio_advance_iter(bio, &page->iter, vec.bv_len);
441
442 if (!page->iter.bi_size) {
1da177e4 443 page->bio = bio->bi_next;
794e64d5 444 if (page->bio)
003b5c57 445 page->iter = page->bio->bi_iter;
eea9befa 446 }
1da177e4 447
b46d40da 448 dma_unmap_page(&card->dev->dev, desc->data_dma_handle,
003b5c57 449 vec.bv_len,
458cf5e9 450 (control & DMASCR_TRANSFER_READ) ?
b46d40da 451 DMA_TO_DEVICE : DMA_FROM_DEVICE);
1da177e4
LT
452 if (control & DMASCR_HARD_ERROR) {
453 /* error */
4e4cbee9 454 bio->bi_status = BLK_STS_IOERR;
4e0af881
JG
455 dev_printk(KERN_WARNING, &card->dev->dev,
456 "I/O error on sector %d/%d\n",
457 le32_to_cpu(desc->local_addr)>>9,
458 le32_to_cpu(desc->transfer_size));
1da177e4 459 dump_dmastat(card, control);
a8ebb056 460 } else if (op_is_write(bio_op(bio)) &&
458cf5e9
RD
461 le32_to_cpu(desc->local_addr) >> 9 ==
462 card->init_size) {
463 card->init_size += le32_to_cpu(desc->transfer_size) >> 9;
464 if (card->init_size >> 1 >= card->mm_size) {
4e0af881
JG
465 dev_printk(KERN_INFO, &card->dev->dev,
466 "memory now initialised\n");
1da177e4
LT
467 set_userbit(card, MEMORY_INITIALIZED, 1);
468 }
469 }
470 if (bio != page->bio) {
471 bio->bi_next = return_bio;
472 return_bio = bio;
473 }
474
458cf5e9
RD
475 if (last)
476 break;
1da177e4
LT
477 }
478
479 if (debug & DEBUG_LED_ON_TRANSFER)
480 set_led(card, LED_REMOVE, LED_OFF);
481
482 if (card->check_batteries) {
483 card->check_batteries = 0;
484 check_batteries(card);
485 }
486 if (page->headcnt >= page->cnt) {
487 reset_page(page);
488 card->Active = -1;
489 activate(card);
490 } else {
491 /* haven't finished with this one yet */
46308c0b 492 pr_debug("do some more\n");
1da177e4
LT
493 mm_start_io(card);
494 }
495 out_unlock:
902d5391 496 spin_unlock(&card->lock);
1da177e4 497
458cf5e9 498 while (return_bio) {
1da177e4
LT
499 struct bio *bio = return_bio;
500
501 return_bio = bio->bi_next;
502 bio->bi_next = NULL;
4246a0b6 503 bio_endio(bio);
1da177e4
LT
504 }
505}
506
74018dc3 507static void mm_unplug(struct blk_plug_cb *cb, bool from_schedule)
32587371 508{
9cbb1750 509 struct cardinfo *card = cb->data;
32587371 510
9cbb1750
N
511 spin_lock_irq(&card->lock);
512 activate(card);
513 spin_unlock_irq(&card->lock);
514 kfree(cb);
32587371
TG
515}
516
517static int mm_check_plugged(struct cardinfo *card)
518{
9cbb1750 519 return !!blk_check_plugged(mm_unplug, card, sizeof(struct blk_plug_cb));
32587371
TG
520}
521
c62b37d9 522static blk_qc_t mm_submit_bio(struct bio *bio)
1da177e4 523{
6c2eddd6
CH
524 struct cardinfo *card = bio->bi_disk->private_data;
525
f2b9ecc4 526 pr_debug("mm_make_request %llu %u\n",
4f024f37
KO
527 (unsigned long long)bio->bi_iter.bi_sector,
528 bio->bi_iter.bi_size);
1da177e4 529
f695ca38 530 blk_queue_split(&bio);
54efd50b 531
1da177e4
LT
532 spin_lock_irq(&card->lock);
533 *card->biotail = bio;
534 bio->bi_next = NULL;
535 card->biotail = &bio->bi_next;
03ea4afa 536 if (op_is_sync(bio->bi_opf) || !mm_check_plugged(card))
32587371 537 activate(card);
1da177e4
LT
538 spin_unlock_irq(&card->lock);
539
dece1635 540 return BLK_QC_T_NONE;
1da177e4
LT
541}
542
7d12e780 543static irqreturn_t mm_interrupt(int irq, void *__card)
1da177e4
LT
544{
545 struct cardinfo *card = (struct cardinfo *) __card;
546 unsigned int dma_status;
547 unsigned short cfg_status;
548
549HW_TRACE(0x30);
550
551 dma_status = le32_to_cpu(readl(card->csr_remap + DMA_STATUS_CTRL));
552
553 if (!(dma_status & (DMASCR_ERROR_MASK | DMASCR_CHAIN_COMPLETE))) {
554 /* interrupt wasn't for me ... */
555 return IRQ_NONE;
458cf5e9 556 }
1da177e4
LT
557
558 /* clear COMPLETION interrupts */
559 if (card->flags & UM_FLAG_NO_BYTE_STATUS)
560 writel(cpu_to_le32(DMASCR_DMA_COMPLETE|DMASCR_CHAIN_COMPLETE),
458cf5e9 561 card->csr_remap + DMA_STATUS_CTRL);
1da177e4
LT
562 else
563 writeb((DMASCR_DMA_COMPLETE|DMASCR_CHAIN_COMPLETE) >> 16,
458cf5e9 564 card->csr_remap + DMA_STATUS_CTRL + 2);
4e953a21 565
1da177e4
LT
566 /* log errors and clear interrupt status */
567 if (dma_status & DMASCR_ANY_ERR) {
568 unsigned int data_log1, data_log2;
569 unsigned int addr_log1, addr_log2;
570 unsigned char stat, count, syndrome, check;
571
572 stat = readb(card->csr_remap + MEMCTRLCMD_ERRSTATUS);
573
458cf5e9
RD
574 data_log1 = le32_to_cpu(readl(card->csr_remap +
575 ERROR_DATA_LOG));
576 data_log2 = le32_to_cpu(readl(card->csr_remap +
577 ERROR_DATA_LOG + 4));
578 addr_log1 = le32_to_cpu(readl(card->csr_remap +
579 ERROR_ADDR_LOG));
1da177e4
LT
580 addr_log2 = readb(card->csr_remap + ERROR_ADDR_LOG + 4);
581
582 count = readb(card->csr_remap + ERROR_COUNT);
583 syndrome = readb(card->csr_remap + ERROR_SYNDROME);
584 check = readb(card->csr_remap + ERROR_CHECK);
585
586 dump_dmastat(card, dma_status);
587
588 if (stat & 0x01)
4e0af881
JG
589 dev_printk(KERN_ERR, &card->dev->dev,
590 "Memory access error detected (err count %d)\n",
591 count);
1da177e4 592 if (stat & 0x02)
4e0af881
JG
593 dev_printk(KERN_ERR, &card->dev->dev,
594 "Multi-bit EDC error\n");
1da177e4 595
4e0af881
JG
596 dev_printk(KERN_ERR, &card->dev->dev,
597 "Fault Address 0x%02x%08x, Fault Data 0x%08x%08x\n",
598 addr_log2, addr_log1, data_log2, data_log1);
599 dev_printk(KERN_ERR, &card->dev->dev,
600 "Fault Check 0x%02x, Fault Syndrome 0x%02x\n",
601 check, syndrome);
1da177e4
LT
602
603 writeb(0, card->csr_remap + ERROR_COUNT);
604 }
605
606 if (dma_status & DMASCR_PARITY_ERR_REP) {
4e0af881
JG
607 dev_printk(KERN_ERR, &card->dev->dev,
608 "PARITY ERROR REPORTED\n");
1da177e4
LT
609 pci_read_config_word(card->dev, PCI_STATUS, &cfg_status);
610 pci_write_config_word(card->dev, PCI_STATUS, cfg_status);
611 }
612
613 if (dma_status & DMASCR_PARITY_ERR_DET) {
4e0af881
JG
614 dev_printk(KERN_ERR, &card->dev->dev,
615 "PARITY ERROR DETECTED\n");
1da177e4
LT
616 pci_read_config_word(card->dev, PCI_STATUS, &cfg_status);
617 pci_write_config_word(card->dev, PCI_STATUS, cfg_status);
618 }
619
620 if (dma_status & DMASCR_SYSTEM_ERR_SIG) {
4e0af881 621 dev_printk(KERN_ERR, &card->dev->dev, "SYSTEM ERROR\n");
1da177e4
LT
622 pci_read_config_word(card->dev, PCI_STATUS, &cfg_status);
623 pci_write_config_word(card->dev, PCI_STATUS, cfg_status);
624 }
625
626 if (dma_status & DMASCR_TARGET_ABT) {
4e0af881 627 dev_printk(KERN_ERR, &card->dev->dev, "TARGET ABORT\n");
1da177e4
LT
628 pci_read_config_word(card->dev, PCI_STATUS, &cfg_status);
629 pci_write_config_word(card->dev, PCI_STATUS, cfg_status);
630 }
631
632 if (dma_status & DMASCR_MASTER_ABT) {
4e0af881 633 dev_printk(KERN_ERR, &card->dev->dev, "MASTER ABORT\n");
1da177e4
LT
634 pci_read_config_word(card->dev, PCI_STATUS, &cfg_status);
635 pci_write_config_word(card->dev, PCI_STATUS, cfg_status);
636 }
637
638 /* and process the DMA descriptors */
639 card->dma_status = dma_status;
640 tasklet_schedule(&card->tasklet);
641
642HW_TRACE(0x36);
643
4e953a21 644 return IRQ_HANDLED;
1da177e4 645}
458cf5e9 646
1da177e4
LT
647/*
648 * If both batteries are good, no LED
649 * If either battery has been warned, solid LED
650 * If both batteries are bad, flash the LED quickly
651 * If either battery is bad, flash the LED semi quickly
652 */
653static void set_fault_to_battery_status(struct cardinfo *card)
654{
655 if (card->battery[0].good && card->battery[1].good)
656 set_led(card, LED_FAULT, LED_OFF);
657 else if (card->battery[0].warned || card->battery[1].warned)
658 set_led(card, LED_FAULT, LED_ON);
659 else if (!card->battery[0].good && !card->battery[1].good)
660 set_led(card, LED_FAULT, LED_FLASH_7_0);
661 else
662 set_led(card, LED_FAULT, LED_FLASH_3_5);
663}
664
665static void init_battery_timer(void);
666
1da177e4
LT
667static int check_battery(struct cardinfo *card, int battery, int status)
668{
669 if (status != card->battery[battery].good) {
670 card->battery[battery].good = !card->battery[battery].good;
671 card->battery[battery].last_change = jiffies;
672
673 if (card->battery[battery].good) {
4e0af881
JG
674 dev_printk(KERN_ERR, &card->dev->dev,
675 "Battery %d now good\n", battery + 1);
1da177e4
LT
676 card->battery[battery].warned = 0;
677 } else
4e0af881
JG
678 dev_printk(KERN_ERR, &card->dev->dev,
679 "Battery %d now FAILED\n", battery + 1);
1da177e4
LT
680
681 return 1;
682 } else if (!card->battery[battery].good &&
683 !card->battery[battery].warned &&
684 time_after_eq(jiffies, card->battery[battery].last_change +
685 (HZ * 60 * 60 * 5))) {
4e0af881
JG
686 dev_printk(KERN_ERR, &card->dev->dev,
687 "Battery %d still FAILED after 5 hours\n", battery + 1);
1da177e4
LT
688 card->battery[battery].warned = 1;
689
690 return 1;
691 }
692
693 return 0;
694}
458cf5e9 695
1da177e4
LT
696static void check_batteries(struct cardinfo *card)
697{
698 /* NOTE: this must *never* be called while the card
699 * is doing (bus-to-card) DMA, or you will need the
700 * reset switch
701 */
702 unsigned char status;
703 int ret1, ret2;
704
705 status = readb(card->csr_remap + MEMCTRLSTATUS_BATTERY);
706 if (debug & DEBUG_BATTERY_POLLING)
4e0af881
JG
707 dev_printk(KERN_DEBUG, &card->dev->dev,
708 "checking battery status, 1 = %s, 2 = %s\n",
1da177e4
LT
709 (status & BATTERY_1_FAILURE) ? "FAILURE" : "OK",
710 (status & BATTERY_2_FAILURE) ? "FAILURE" : "OK");
711
712 ret1 = check_battery(card, 0, !(status & BATTERY_1_FAILURE));
713 ret2 = check_battery(card, 1, !(status & BATTERY_2_FAILURE));
714
715 if (ret1 || ret2)
716 set_fault_to_battery_status(card);
717}
718
e99e88a9 719static void check_all_batteries(struct timer_list *unused)
1da177e4
LT
720{
721 int i;
722
4e953a21 723 for (i = 0; i < num_cards; i++)
1da177e4
LT
724 if (!(cards[i].flags & UM_FLAG_NO_BATT)) {
725 struct cardinfo *card = &cards[i];
726 spin_lock_bh(&card->lock);
727 if (card->Active >= 0)
728 card->check_batteries = 1;
729 else
730 check_batteries(card);
731 spin_unlock_bh(&card->lock);
732 }
733
734 init_battery_timer();
735}
458cf5e9 736
1da177e4
LT
737static void init_battery_timer(void)
738{
e99e88a9 739 timer_setup(&battery_timer, check_all_batteries, 0);
1da177e4
LT
740 battery_timer.expires = jiffies + (HZ * 60);
741 add_timer(&battery_timer);
742}
458cf5e9 743
1da177e4
LT
744static void del_battery_timer(void)
745{
746 del_timer(&battery_timer);
747}
458cf5e9 748
1da177e4
LT
749/*
750 * Note no locks taken out here. In a worst case scenario, we could drop
751 * a chunk of system memory. But that should never happen, since validation
752 * happens at open or mount time, when locks are held.
753 *
754 * That's crap, since doing that while some partitions are opened
755 * or mounted will give you really nasty results.
756 */
757static int mm_revalidate(struct gendisk *disk)
758{
759 struct cardinfo *card = disk->private_data;
760 set_capacity(disk, card->mm_size << 1);
761 return 0;
762}
a885c8c4
CH
763
764static int mm_getgeo(struct block_device *bdev, struct hd_geometry *geo)
1da177e4 765{
a885c8c4
CH
766 struct cardinfo *card = bdev->bd_disk->private_data;
767 int size = card->mm_size * (1024 / MM_HARDSECT);
1da177e4 768
a885c8c4
CH
769 /*
770 * get geometry: we have to fake one... trim the size to a
771 * multiple of 2048 (1M): tell we have 32 sectors, 64 heads,
772 * whatever cylinders.
773 */
774 geo->heads = 64;
775 geo->sectors = 32;
776 geo->cylinders = size / (geo->heads * geo->sectors);
777 return 0;
1da177e4 778}
a885c8c4 779
83d5cde4 780static const struct block_device_operations mm_fops = {
1da177e4 781 .owner = THIS_MODULE,
c62b37d9 782 .submit_bio = mm_submit_bio,
a885c8c4 783 .getgeo = mm_getgeo,
458cf5e9 784 .revalidate_disk = mm_revalidate,
1da177e4 785};
458cf5e9 786
8d85fce7 787static int mm_pci_probe(struct pci_dev *dev, const struct pci_device_id *id)
1da177e4 788{
9a6a5738 789 int ret;
1da177e4
LT
790 struct cardinfo *card = &cards[num_cards];
791 unsigned char mem_present;
792 unsigned char batt_status;
793 unsigned int saved_bar, data;
ee4a7b68
JG
794 unsigned long csr_base;
795 unsigned long csr_len;
1da177e4 796 int magic_number;
4e0af881
JG
797 static int printed_version;
798
799 if (!printed_version++)
800 printk(KERN_INFO DRIVER_VERSION " : " DRIVER_DESC "\n");
1da177e4 801
ee4a7b68
JG
802 ret = pci_enable_device(dev);
803 if (ret)
804 return ret;
1da177e4
LT
805
806 pci_write_config_byte(dev, PCI_LATENCY_TIMER, 0xF8);
807 pci_set_master(dev);
808
809 card->dev = dev;
1da177e4 810
ee4a7b68
JG
811 csr_base = pci_resource_start(dev, 0);
812 csr_len = pci_resource_len(dev, 0);
813 if (!csr_base || !csr_len)
814 return -ENODEV;
1da177e4 815
4e0af881 816 dev_printk(KERN_INFO, &dev->dev,
458cf5e9 817 "Micro Memory(tm) controller found (PCI Mem Module (Battery Backup))\n");
1da177e4 818
b46d40da
CH
819 if (dma_set_mask(&dev->dev, DMA_BIT_MASK(64)) &&
820 dma_set_mask(&dev->dev, DMA_BIT_MASK(32))) {
4e0af881 821 dev_printk(KERN_WARNING, &dev->dev, "NO suitable DMA found\n");
1da177e4
LT
822 return -ENOMEM;
823 }
ee4a7b68
JG
824
825 ret = pci_request_regions(dev, DRIVER_NAME);
826 if (ret) {
4e0af881
JG
827 dev_printk(KERN_ERR, &card->dev->dev,
828 "Unable to request memory region\n");
1da177e4
LT
829 goto failed_req_csr;
830 }
831
4bdc0d67 832 card->csr_remap = ioremap(csr_base, csr_len);
1da177e4 833 if (!card->csr_remap) {
4e0af881
JG
834 dev_printk(KERN_ERR, &card->dev->dev,
835 "Unable to remap memory region\n");
1da177e4
LT
836 ret = -ENOMEM;
837
838 goto failed_remap_csr;
839 }
840
4e0af881
JG
841 dev_printk(KERN_INFO, &card->dev->dev,
842 "CSR 0x%08lx -> 0x%p (0x%lx)\n",
ee4a7b68 843 csr_base, card->csr_remap, csr_len);
1da177e4 844
458cf5e9 845 switch (card->dev->device) {
1da177e4
LT
846 case 0x5415:
847 card->flags |= UM_FLAG_NO_BYTE_STATUS | UM_FLAG_NO_BATTREG;
848 magic_number = 0x59;
849 break;
850
851 case 0x5425:
852 card->flags |= UM_FLAG_NO_BYTE_STATUS;
853 magic_number = 0x5C;
854 break;
855
856 case 0x6155:
458cf5e9
RD
857 card->flags |= UM_FLAG_NO_BYTE_STATUS |
858 UM_FLAG_NO_BATTREG | UM_FLAG_NO_BATT;
1da177e4
LT
859 magic_number = 0x99;
860 break;
861
862 default:
863 magic_number = 0x100;
864 break;
865 }
866
867 if (readb(card->csr_remap + MEMCTRLSTATUS_MAGIC) != magic_number) {
4e0af881 868 dev_printk(KERN_ERR, &card->dev->dev, "Magic number invalid\n");
1da177e4
LT
869 ret = -ENOMEM;
870 goto failed_magic;
871 }
872
b46d40da
CH
873 card->mm_pages[0].desc = dma_alloc_coherent(&card->dev->dev,
874 PAGE_SIZE * 2, &card->mm_pages[0].page_dma, GFP_KERNEL);
875 card->mm_pages[1].desc = dma_alloc_coherent(&card->dev->dev,
876 PAGE_SIZE * 2, &card->mm_pages[1].page_dma, GFP_KERNEL);
1da177e4
LT
877 if (card->mm_pages[0].desc == NULL ||
878 card->mm_pages[1].desc == NULL) {
4e0af881 879 dev_printk(KERN_ERR, &card->dev->dev, "alloc failed\n");
1da177e4
LT
880 goto failed_alloc;
881 }
882 reset_page(&card->mm_pages[0]);
883 reset_page(&card->mm_pages[1]);
884 card->Ready = 0; /* page 0 is ready */
885 card->Active = -1; /* no page is active */
886 card->bio = NULL;
887 card->biotail = &card->bio;
498f6650 888 spin_lock_init(&card->lock);
1da177e4 889
c62b37d9 890 card->queue = blk_alloc_queue(NUMA_NO_NODE);
1da177e4
LT
891 if (!card->queue)
892 goto failed_alloc;
1da177e4
LT
893
894 tasklet_init(&card->tasklet, process_page, (unsigned long)card);
895
896 card->check_batteries = 0;
4e953a21 897
1da177e4
LT
898 mem_present = readb(card->csr_remap + MEMCTRLSTATUS_MEMORY);
899 switch (mem_present) {
900 case MEM_128_MB:
901 card->mm_size = 1024 * 128;
902 break;
903 case MEM_256_MB:
904 card->mm_size = 1024 * 256;
905 break;
906 case MEM_512_MB:
907 card->mm_size = 1024 * 512;
908 break;
909 case MEM_1_GB:
910 card->mm_size = 1024 * 1024;
911 break;
912 case MEM_2_GB:
913 card->mm_size = 1024 * 2048;
914 break;
915 default:
916 card->mm_size = 0;
917 break;
918 }
919
920 /* Clear the LED's we control */
921 set_led(card, LED_REMOVE, LED_OFF);
922 set_led(card, LED_FAULT, LED_OFF);
923
924 batt_status = readb(card->csr_remap + MEMCTRLSTATUS_BATTERY);
925
926 card->battery[0].good = !(batt_status & BATTERY_1_FAILURE);
927 card->battery[1].good = !(batt_status & BATTERY_2_FAILURE);
928 card->battery[0].last_change = card->battery[1].last_change = jiffies;
929
4e953a21 930 if (card->flags & UM_FLAG_NO_BATT)
4e0af881
JG
931 dev_printk(KERN_INFO, &card->dev->dev,
932 "Size %d KB\n", card->mm_size);
1da177e4 933 else {
4e0af881
JG
934 dev_printk(KERN_INFO, &card->dev->dev,
935 "Size %d KB, Battery 1 %s (%s), Battery 2 %s (%s)\n",
936 card->mm_size,
458cf5e9 937 batt_status & BATTERY_1_DISABLED ? "Disabled" : "Enabled",
1da177e4 938 card->battery[0].good ? "OK" : "FAILURE",
458cf5e9 939 batt_status & BATTERY_2_DISABLED ? "Disabled" : "Enabled",
1da177e4
LT
940 card->battery[1].good ? "OK" : "FAILURE");
941
942 set_fault_to_battery_status(card);
943 }
944
945 pci_read_config_dword(dev, PCI_BASE_ADDRESS_1, &saved_bar);
946 data = 0xffffffff;
947 pci_write_config_dword(dev, PCI_BASE_ADDRESS_1, data);
948 pci_read_config_dword(dev, PCI_BASE_ADDRESS_1, &data);
949 pci_write_config_dword(dev, PCI_BASE_ADDRESS_1, saved_bar);
950 data &= 0xfffffff0;
951 data = ~data;
952 data += 1;
953
458cf5e9
RD
954 if (request_irq(dev->irq, mm_interrupt, IRQF_SHARED, DRIVER_NAME,
955 card)) {
4e0af881
JG
956 dev_printk(KERN_ERR, &card->dev->dev,
957 "Unable to allocate IRQ\n");
1da177e4 958 ret = -ENODEV;
1da177e4
LT
959 goto failed_req_irq;
960 }
961
4e0af881 962 dev_printk(KERN_INFO, &card->dev->dev,
ee4a7b68 963 "Window size %d bytes, IRQ %d\n", data, dev->irq);
1da177e4 964
1da177e4
LT
965 pci_set_drvdata(dev, card);
966
967 if (pci_write_cmd != 0x0F) /* If not Memory Write & Invalidate */
968 pci_write_cmd = 0x07; /* then Memory Write command */
969
970 if (pci_write_cmd & 0x08) { /* use Memory Write and Invalidate */
971 unsigned short cfg_command;
972 pci_read_config_word(dev, PCI_COMMAND, &cfg_command);
973 cfg_command |= 0x10; /* Memory Write & Invalidate Enable */
974 pci_write_config_word(dev, PCI_COMMAND, cfg_command);
975 }
976 pci_cmds = (pci_read_cmd << 28) | (pci_write_cmd << 24);
977
978 num_cards++;
979
980 if (!get_userbit(card, MEMORY_INITIALIZED)) {
4e0af881 981 dev_printk(KERN_INFO, &card->dev->dev,
458cf5e9 982 "memory NOT initialized. Consider over-writing whole device.\n");
1da177e4
LT
983 card->init_size = 0;
984 } else {
4e0af881
JG
985 dev_printk(KERN_INFO, &card->dev->dev,
986 "memory already initialized\n");
1da177e4
LT
987 card->init_size = card->mm_size;
988 }
989
990 /* Enable ECC */
991 writeb(EDC_STORE_CORRECT, card->csr_remap + MEMCTRLCMD_ERRCTRL);
992
993 return 0;
994
995 failed_req_irq:
996 failed_alloc:
997 if (card->mm_pages[0].desc)
b46d40da
CH
998 dma_free_coherent(&card->dev->dev, PAGE_SIZE * 2,
999 card->mm_pages[0].desc,
1000 card->mm_pages[0].page_dma);
1da177e4 1001 if (card->mm_pages[1].desc)
b46d40da
CH
1002 dma_free_coherent(&card->dev->dev, PAGE_SIZE * 2,
1003 card->mm_pages[1].desc,
1004 card->mm_pages[1].page_dma);
1da177e4 1005 failed_magic:
1da177e4
LT
1006 iounmap(card->csr_remap);
1007 failed_remap_csr:
ee4a7b68 1008 pci_release_regions(dev);
1da177e4
LT
1009 failed_req_csr:
1010
1011 return ret;
1012}
458cf5e9 1013
1da177e4
LT
1014static void mm_pci_remove(struct pci_dev *dev)
1015{
1016 struct cardinfo *card = pci_get_drvdata(dev);
1017
1018 tasklet_kill(&card->tasklet);
ee4a7b68 1019 free_irq(dev->irq, card);
1da177e4 1020 iounmap(card->csr_remap);
1da177e4
LT
1021
1022 if (card->mm_pages[0].desc)
b46d40da 1023 dma_free_coherent(&card->dev->dev, PAGE_SIZE * 2,
1da177e4
LT
1024 card->mm_pages[0].desc,
1025 card->mm_pages[0].page_dma);
1026 if (card->mm_pages[1].desc)
b46d40da 1027 dma_free_coherent(&card->dev->dev, PAGE_SIZE * 2,
1da177e4
LT
1028 card->mm_pages[1].desc,
1029 card->mm_pages[1].page_dma);
1312f40e 1030 blk_cleanup_queue(card->queue);
ee4a7b68
JG
1031
1032 pci_release_regions(dev);
1033 pci_disable_device(dev);
1da177e4
LT
1034}
1035
5874c18b 1036static const struct pci_device_id mm_pci_ids[] = {
458cf5e9
RD
1037 {PCI_DEVICE(PCI_VENDOR_ID_MICRO_MEMORY, PCI_DEVICE_ID_MICRO_MEMORY_5415CN)},
1038 {PCI_DEVICE(PCI_VENDOR_ID_MICRO_MEMORY, PCI_DEVICE_ID_MICRO_MEMORY_5425CN)},
1039 {PCI_DEVICE(PCI_VENDOR_ID_MICRO_MEMORY, PCI_DEVICE_ID_MICRO_MEMORY_6155)},
5874c18b 1040 {
1da177e4
LT
1041 .vendor = 0x8086,
1042 .device = 0xB555,
458cf5e9
RD
1043 .subvendor = 0x1332,
1044 .subdevice = 0x5460,
1045 .class = 0x050000,
1046 .class_mask = 0,
5874c18b 1047 }, { /* end: all zeroes */ }
1da177e4
LT
1048};
1049
1050MODULE_DEVICE_TABLE(pci, mm_pci_ids);
1051
1052static struct pci_driver mm_pci_driver = {
ee4a7b68
JG
1053 .name = DRIVER_NAME,
1054 .id_table = mm_pci_ids,
1055 .probe = mm_pci_probe,
1056 .remove = mm_pci_remove,
1da177e4 1057};
ee4a7b68 1058
1da177e4
LT
1059static int __init mm_init(void)
1060{
1061 int retval, i;
1062 int err;
1063
9bfab8ce 1064 retval = pci_register_driver(&mm_pci_driver);
1da177e4
LT
1065 if (retval)
1066 return -ENOMEM;
1067
cb3503ca 1068 err = major_nr = register_blkdev(0, DRIVER_NAME);
5a243e0e
N
1069 if (err < 0) {
1070 pci_unregister_driver(&mm_pci_driver);
1da177e4 1071 return -EIO;
5a243e0e 1072 }
1da177e4
LT
1073
1074 for (i = 0; i < num_cards; i++) {
1075 mm_gendisk[i] = alloc_disk(1 << MM_SHIFT);
1076 if (!mm_gendisk[i])
1077 goto out;
1078 }
1079
1080 for (i = 0; i < num_cards; i++) {
1081 struct gendisk *disk = mm_gendisk[i];
1082 sprintf(disk->disk_name, "umem%c", 'a'+i);
1da177e4
LT
1083 spin_lock_init(&cards[i].lock);
1084 disk->major = major_nr;
1085 disk->first_minor = i << MM_SHIFT;
1086 disk->fops = &mm_fops;
1087 disk->private_data = &cards[i];
1088 disk->queue = cards[i].queue;
1089 set_capacity(disk, cards[i].mm_size << 1);
1090 add_disk(disk);
1091 }
1092
1093 init_battery_timer();
4e0af881 1094 printk(KERN_INFO "MM: desc_per_page = %ld\n", DESC_PER_PAGE);
1da177e4
LT
1095/* printk("mm_init: Done. 10-19-01 9:00\n"); */
1096 return 0;
1097
1098out:
5a243e0e 1099 pci_unregister_driver(&mm_pci_driver);
cb3503ca 1100 unregister_blkdev(major_nr, DRIVER_NAME);
1da177e4
LT
1101 while (i--)
1102 put_disk(mm_gendisk[i]);
1103 return -ENOMEM;
1104}
458cf5e9 1105
1da177e4
LT
1106static void __exit mm_cleanup(void)
1107{
1108 int i;
1109
1110 del_battery_timer();
1111
458cf5e9 1112 for (i = 0; i < num_cards ; i++) {
1da177e4
LT
1113 del_gendisk(mm_gendisk[i]);
1114 put_disk(mm_gendisk[i]);
1115 }
1116
1117 pci_unregister_driver(&mm_pci_driver);
1118
cb3503ca 1119 unregister_blkdev(major_nr, DRIVER_NAME);
1da177e4
LT
1120}
1121
1122module_init(mm_init);
1123module_exit(mm_cleanup);
1124
1125MODULE_AUTHOR(DRIVER_AUTHOR);
1126MODULE_DESCRIPTION(DRIVER_DESC);
1127MODULE_LICENSE("GPL");