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Commit | Line | Data |
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1949739a | 1 | // SPDX-License-Identifier: GPL-2.0-only |
1da177e4 LT |
2 | /* |
3 | * mm.c - Micro Memory(tm) PCI memory board block device driver - v2.3 | |
4 | * | |
5 | * (C) 2001 San Mehat <nettwerk@valinux.com> | |
6 | * (C) 2001 Johannes Erdfelt <jerdfelt@valinux.com> | |
7 | * (C) 2001 NeilBrown <neilb@cse.unsw.edu.au> | |
8 | * | |
9 | * This driver for the Micro Memory PCI Memory Module with Battery Backup | |
10 | * is Copyright Micro Memory Inc 2001-2002. All rights reserved. | |
11 | * | |
1da177e4 LT |
12 | * This driver provides a standard block device interface for Micro Memory(tm) |
13 | * PCI based RAM boards. | |
14 | * 10/05/01: Phap Nguyen - Rebuilt the driver | |
15 | * 10/22/01: Phap Nguyen - v2.1 Added disk partitioning | |
16 | * 29oct2001:NeilBrown - Use make_request_fn instead of request_fn | |
17 | * - use stand disk partitioning (so fdisk works). | |
18 | * 08nov2001:NeilBrown - change driver name from "mm" to "umem" | |
19 | * - incorporate into main kernel | |
20 | * 08apr2002:NeilBrown - Move some of interrupt handle to tasklet | |
21 | * - use spin_lock_bh instead of _irq | |
22 | * - Never block on make_request. queue | |
23 | * bh's instead. | |
24 | * - unregister umem from devfs at mod unload | |
25 | * - Change version to 2.3 | |
26 | * 07Nov2001:Phap Nguyen - Select pci read command: 06, 12, 15 (Decimal) | |
27 | * 07Jan2002: P. Nguyen - Used PCI Memory Write & Invalidate for DMA | |
28 | * 15May2002:NeilBrown - convert to bio for 2.5 | |
29 | * 17May2002:NeilBrown - remove init_mem initialisation. Instead detect | |
30 | * - a sequence of writes that cover the card, and | |
31 | * - set initialised bit then. | |
32 | */ | |
33 | ||
458cf5e9 | 34 | #undef DEBUG /* #define DEBUG if you want debugging info (pr_debug) */ |
1da177e4 LT |
35 | #include <linux/fs.h> |
36 | #include <linux/bio.h> | |
37 | #include <linux/kernel.h> | |
38 | #include <linux/mm.h> | |
39 | #include <linux/mman.h> | |
5a0e3ad6 | 40 | #include <linux/gfp.h> |
1da177e4 LT |
41 | #include <linux/ioctl.h> |
42 | #include <linux/module.h> | |
43 | #include <linux/init.h> | |
44 | #include <linux/interrupt.h> | |
1da177e4 LT |
45 | #include <linux/timer.h> |
46 | #include <linux/pci.h> | |
910638ae | 47 | #include <linux/dma-mapping.h> |
1da177e4 LT |
48 | |
49 | #include <linux/fcntl.h> /* O_ACCMODE */ | |
50 | #include <linux/hdreg.h> /* HDIO_GETGEO */ | |
51 | ||
3084f0c6 | 52 | #include "umem.h" |
1da177e4 | 53 | |
7c0f6ba6 | 54 | #include <linux/uaccess.h> |
1da177e4 LT |
55 | #include <asm/io.h> |
56 | ||
1da177e4 LT |
57 | #define MM_MAXCARDS 4 |
58 | #define MM_RAHEAD 2 /* two sectors */ | |
59 | #define MM_BLKSIZE 1024 /* 1k blocks */ | |
60 | #define MM_HARDSECT 512 /* 512-byte hardware sectors */ | |
61 | #define MM_SHIFT 6 /* max 64 partitions on 4 cards */ | |
62 | ||
63 | /* | |
64 | * Version Information | |
65 | */ | |
66 | ||
ee4a7b68 JG |
67 | #define DRIVER_NAME "umem" |
68 | #define DRIVER_VERSION "v2.3" | |
69 | #define DRIVER_AUTHOR "San Mehat, Johannes Erdfelt, NeilBrown" | |
70 | #define DRIVER_DESC "Micro Memory(tm) PCI memory board block driver" | |
1da177e4 LT |
71 | |
72 | static int debug; | |
73 | /* #define HW_TRACE(x) writeb(x,cards[0].csr_remap + MEMCTRLSTATUS_MAGIC) */ | |
74 | #define HW_TRACE(x) | |
75 | ||
76 | #define DEBUG_LED_ON_TRANSFER 0x01 | |
77 | #define DEBUG_BATTERY_POLLING 0x02 | |
78 | ||
79 | module_param(debug, int, 0644); | |
80 | MODULE_PARM_DESC(debug, "Debug bitmask"); | |
81 | ||
82 | static int pci_read_cmd = 0x0C; /* Read Multiple */ | |
83 | module_param(pci_read_cmd, int, 0); | |
84 | MODULE_PARM_DESC(pci_read_cmd, "PCI read command"); | |
85 | ||
86 | static int pci_write_cmd = 0x0F; /* Write and Invalidate */ | |
87 | module_param(pci_write_cmd, int, 0); | |
88 | MODULE_PARM_DESC(pci_write_cmd, "PCI write command"); | |
89 | ||
90 | static int pci_cmds; | |
91 | ||
92 | static int major_nr; | |
93 | ||
94 | #include <linux/blkdev.h> | |
95 | #include <linux/blkpg.h> | |
96 | ||
97 | struct cardinfo { | |
1da177e4 LT |
98 | struct pci_dev *dev; |
99 | ||
1da177e4 | 100 | unsigned char __iomem *csr_remap; |
1da177e4 LT |
101 | unsigned int mm_size; /* size in kbytes */ |
102 | ||
103 | unsigned int init_size; /* initial segment, in sectors, | |
104 | * that we know to | |
105 | * have been written | |
106 | */ | |
107 | struct bio *bio, *currentbio, **biotail; | |
003b5c57 | 108 | struct bvec_iter current_iter; |
1da177e4 | 109 | |
165125e1 | 110 | struct request_queue *queue; |
1da177e4 LT |
111 | |
112 | struct mm_page { | |
113 | dma_addr_t page_dma; | |
114 | struct mm_dma_desc *desc; | |
115 | int cnt, headcnt; | |
116 | struct bio *bio, **biotail; | |
003b5c57 | 117 | struct bvec_iter iter; |
1da177e4 LT |
118 | } mm_pages[2]; |
119 | #define DESC_PER_PAGE ((PAGE_SIZE*2)/sizeof(struct mm_dma_desc)) | |
120 | ||
121 | int Active, Ready; | |
122 | ||
123 | struct tasklet_struct tasklet; | |
124 | unsigned int dma_status; | |
125 | ||
126 | struct { | |
127 | int good; | |
128 | int warned; | |
129 | unsigned long last_change; | |
130 | } battery[2]; | |
131 | ||
132 | spinlock_t lock; | |
133 | int check_batteries; | |
134 | ||
135 | int flags; | |
136 | }; | |
137 | ||
138 | static struct cardinfo cards[MM_MAXCARDS]; | |
1da177e4 LT |
139 | static struct timer_list battery_timer; |
140 | ||
458cf5e9 | 141 | static int num_cards; |
1da177e4 LT |
142 | |
143 | static struct gendisk *mm_gendisk[MM_MAXCARDS]; | |
144 | ||
145 | static void check_batteries(struct cardinfo *card); | |
146 | ||
1da177e4 LT |
147 | static int get_userbit(struct cardinfo *card, int bit) |
148 | { | |
149 | unsigned char led; | |
150 | ||
151 | led = readb(card->csr_remap + MEMCTRLCMD_LEDCTRL); | |
152 | return led & bit; | |
153 | } | |
458cf5e9 | 154 | |
1da177e4 LT |
155 | static int set_userbit(struct cardinfo *card, int bit, unsigned char state) |
156 | { | |
157 | unsigned char led; | |
158 | ||
159 | led = readb(card->csr_remap + MEMCTRLCMD_LEDCTRL); | |
160 | if (state) | |
161 | led |= bit; | |
162 | else | |
163 | led &= ~bit; | |
164 | writeb(led, card->csr_remap + MEMCTRLCMD_LEDCTRL); | |
165 | ||
166 | return 0; | |
167 | } | |
458cf5e9 | 168 | |
1da177e4 LT |
169 | /* |
170 | * NOTE: For the power LED, use the LED_POWER_* macros since they differ | |
171 | */ | |
172 | static void set_led(struct cardinfo *card, int shift, unsigned char state) | |
173 | { | |
174 | unsigned char led; | |
175 | ||
176 | led = readb(card->csr_remap + MEMCTRLCMD_LEDCTRL); | |
177 | if (state == LED_FLIP) | |
178 | led ^= (1<<shift); | |
179 | else { | |
180 | led &= ~(0x03 << shift); | |
181 | led |= (state << shift); | |
182 | } | |
183 | writeb(led, card->csr_remap + MEMCTRLCMD_LEDCTRL); | |
184 | ||
185 | } | |
186 | ||
187 | #ifdef MM_DIAG | |
1da177e4 LT |
188 | static void dump_regs(struct cardinfo *card) |
189 | { | |
190 | unsigned char *p; | |
191 | int i, i1; | |
192 | ||
193 | p = card->csr_remap; | |
194 | for (i = 0; i < 8; i++) { | |
195 | printk(KERN_DEBUG "%p ", p); | |
196 | ||
197 | for (i1 = 0; i1 < 16; i1++) | |
198 | printk("%02x ", *p++); | |
199 | ||
200 | printk("\n"); | |
201 | } | |
202 | } | |
203 | #endif | |
458cf5e9 | 204 | |
1da177e4 LT |
205 | static void dump_dmastat(struct cardinfo *card, unsigned int dmastat) |
206 | { | |
4e0af881 | 207 | dev_printk(KERN_DEBUG, &card->dev->dev, "DMAstat - "); |
1da177e4 | 208 | if (dmastat & DMASCR_ANY_ERR) |
458cf5e9 | 209 | printk(KERN_CONT "ANY_ERR "); |
1da177e4 | 210 | if (dmastat & DMASCR_MBE_ERR) |
458cf5e9 | 211 | printk(KERN_CONT "MBE_ERR "); |
1da177e4 | 212 | if (dmastat & DMASCR_PARITY_ERR_REP) |
458cf5e9 | 213 | printk(KERN_CONT "PARITY_ERR_REP "); |
1da177e4 | 214 | if (dmastat & DMASCR_PARITY_ERR_DET) |
458cf5e9 | 215 | printk(KERN_CONT "PARITY_ERR_DET "); |
1da177e4 | 216 | if (dmastat & DMASCR_SYSTEM_ERR_SIG) |
458cf5e9 | 217 | printk(KERN_CONT "SYSTEM_ERR_SIG "); |
1da177e4 | 218 | if (dmastat & DMASCR_TARGET_ABT) |
458cf5e9 | 219 | printk(KERN_CONT "TARGET_ABT "); |
1da177e4 | 220 | if (dmastat & DMASCR_MASTER_ABT) |
458cf5e9 | 221 | printk(KERN_CONT "MASTER_ABT "); |
1da177e4 | 222 | if (dmastat & DMASCR_CHAIN_COMPLETE) |
458cf5e9 | 223 | printk(KERN_CONT "CHAIN_COMPLETE "); |
1da177e4 | 224 | if (dmastat & DMASCR_DMA_COMPLETE) |
458cf5e9 | 225 | printk(KERN_CONT "DMA_COMPLETE "); |
1da177e4 LT |
226 | printk("\n"); |
227 | } | |
228 | ||
229 | /* | |
230 | * Theory of request handling | |
231 | * | |
232 | * Each bio is assigned to one mm_dma_desc - which may not be enough FIXME | |
233 | * We have two pages of mm_dma_desc, holding about 64 descriptors | |
234 | * each. These are allocated at init time. | |
235 | * One page is "Ready" and is either full, or can have request added. | |
236 | * The other page might be "Active", which DMA is happening on it. | |
237 | * | |
238 | * Whenever IO on the active page completes, the Ready page is activated | |
239 | * and the ex-Active page is clean out and made Ready. | |
7eaceacc | 240 | * Otherwise the Ready page is only activated when it becomes full. |
1da177e4 LT |
241 | * |
242 | * If a request arrives while both pages a full, it is queued, and b_rdev is | |
243 | * overloaded to record whether it was a read or a write. | |
244 | * | |
245 | * The interrupt handler only polls the device to clear the interrupt. | |
246 | * The processing of the result is done in a tasklet. | |
247 | */ | |
248 | ||
249 | static void mm_start_io(struct cardinfo *card) | |
250 | { | |
251 | /* we have the lock, we know there is | |
252 | * no IO active, and we know that card->Active | |
253 | * is set | |
254 | */ | |
255 | struct mm_dma_desc *desc; | |
256 | struct mm_page *page; | |
257 | int offset; | |
258 | ||
259 | /* make the last descriptor end the chain */ | |
260 | page = &card->mm_pages[card->Active]; | |
458cf5e9 RD |
261 | pr_debug("start_io: %d %d->%d\n", |
262 | card->Active, page->headcnt, page->cnt - 1); | |
1da177e4 LT |
263 | desc = &page->desc[page->cnt-1]; |
264 | ||
265 | desc->control_bits |= cpu_to_le32(DMASCR_CHAIN_COMP_EN); | |
266 | desc->control_bits &= ~cpu_to_le32(DMASCR_CHAIN_EN); | |
267 | desc->sem_control_bits = desc->control_bits; | |
268 | ||
4e953a21 | 269 | |
1da177e4 LT |
270 | if (debug & DEBUG_LED_ON_TRANSFER) |
271 | set_led(card, LED_REMOVE, LED_ON); | |
272 | ||
273 | desc = &page->desc[page->headcnt]; | |
274 | writel(0, card->csr_remap + DMA_PCI_ADDR); | |
275 | writel(0, card->csr_remap + DMA_PCI_ADDR + 4); | |
276 | ||
277 | writel(0, card->csr_remap + DMA_LOCAL_ADDR); | |
278 | writel(0, card->csr_remap + DMA_LOCAL_ADDR + 4); | |
279 | ||
280 | writel(0, card->csr_remap + DMA_TRANSFER_SIZE); | |
281 | writel(0, card->csr_remap + DMA_TRANSFER_SIZE + 4); | |
282 | ||
283 | writel(0, card->csr_remap + DMA_SEMAPHORE_ADDR); | |
284 | writel(0, card->csr_remap + DMA_SEMAPHORE_ADDR + 4); | |
285 | ||
458cf5e9 RD |
286 | offset = ((char *)desc) - ((char *)page->desc); |
287 | writel(cpu_to_le32((page->page_dma+offset) & 0xffffffff), | |
1da177e4 LT |
288 | card->csr_remap + DMA_DESCRIPTOR_ADDR); |
289 | /* Force the value to u64 before shifting otherwise >> 32 is undefined C | |
290 | * and on some ports will do nothing ! */ | |
291 | writel(cpu_to_le32(((u64)page->page_dma)>>32), | |
292 | card->csr_remap + DMA_DESCRIPTOR_ADDR + 4); | |
293 | ||
294 | /* Go, go, go */ | |
295 | writel(cpu_to_le32(DMASCR_GO | DMASCR_CHAIN_EN | pci_cmds), | |
296 | card->csr_remap + DMA_STATUS_CTRL); | |
297 | } | |
298 | ||
299 | static int add_bio(struct cardinfo *card); | |
300 | ||
301 | static void activate(struct cardinfo *card) | |
302 | { | |
4e953a21 | 303 | /* if No page is Active, and Ready is |
1da177e4 LT |
304 | * not empty, then switch Ready page |
305 | * to active and start IO. | |
306 | * Then add any bh's that are available to Ready | |
307 | */ | |
308 | ||
309 | do { | |
310 | while (add_bio(card)) | |
311 | ; | |
312 | ||
313 | if (card->Active == -1 && | |
314 | card->mm_pages[card->Ready].cnt > 0) { | |
315 | card->Active = card->Ready; | |
316 | card->Ready = 1-card->Ready; | |
317 | mm_start_io(card); | |
318 | } | |
319 | ||
320 | } while (card->Active == -1 && add_bio(card)); | |
321 | } | |
322 | ||
323 | static inline void reset_page(struct mm_page *page) | |
324 | { | |
325 | page->cnt = 0; | |
326 | page->headcnt = 0; | |
327 | page->bio = NULL; | |
458cf5e9 | 328 | page->biotail = &page->bio; |
1da177e4 LT |
329 | } |
330 | ||
4e953a21 | 331 | /* |
1da177e4 LT |
332 | * If there is room on Ready page, take |
333 | * one bh off list and add it. | |
334 | * return 1 if there was room, else 0. | |
335 | */ | |
336 | static int add_bio(struct cardinfo *card) | |
337 | { | |
338 | struct mm_page *p; | |
339 | struct mm_dma_desc *desc; | |
340 | dma_addr_t dma_handle; | |
341 | int offset; | |
342 | struct bio *bio; | |
003b5c57 | 343 | struct bio_vec vec; |
1da177e4 LT |
344 | |
345 | bio = card->currentbio; | |
346 | if (!bio && card->bio) { | |
347 | card->currentbio = card->bio; | |
003b5c57 | 348 | card->current_iter = card->bio->bi_iter; |
1da177e4 LT |
349 | card->bio = card->bio->bi_next; |
350 | if (card->bio == NULL) | |
351 | card->biotail = &card->bio; | |
352 | card->currentbio->bi_next = NULL; | |
353 | return 1; | |
354 | } | |
355 | if (!bio) | |
356 | return 0; | |
357 | ||
1da177e4 LT |
358 | if (card->mm_pages[card->Ready].cnt >= DESC_PER_PAGE) |
359 | return 0; | |
360 | ||
003b5c57 KO |
361 | vec = bio_iter_iovec(bio, card->current_iter); |
362 | ||
b46d40da | 363 | dma_handle = dma_map_page(&card->dev->dev, |
003b5c57 KO |
364 | vec.bv_page, |
365 | vec.bv_offset, | |
366 | vec.bv_len, | |
70246286 | 367 | bio_op(bio) == REQ_OP_READ ? |
b46d40da | 368 | DMA_FROM_DEVICE : DMA_TO_DEVICE); |
1da177e4 LT |
369 | |
370 | p = &card->mm_pages[card->Ready]; | |
371 | desc = &p->desc[p->cnt]; | |
372 | p->cnt++; | |
eea9befa | 373 | if (p->bio == NULL) |
003b5c57 | 374 | p->iter = card->current_iter; |
1da177e4 LT |
375 | if ((p->biotail) != &bio->bi_next) { |
376 | *(p->biotail) = bio; | |
377 | p->biotail = &(bio->bi_next); | |
378 | bio->bi_next = NULL; | |
379 | } | |
380 | ||
381 | desc->data_dma_handle = dma_handle; | |
382 | ||
383 | desc->pci_addr = cpu_to_le64((u64)desc->data_dma_handle); | |
003b5c57 KO |
384 | desc->local_addr = cpu_to_le64(card->current_iter.bi_sector << 9); |
385 | desc->transfer_size = cpu_to_le32(vec.bv_len); | |
458cf5e9 | 386 | offset = (((char *)&desc->sem_control_bits) - ((char *)p->desc)); |
1da177e4 LT |
387 | desc->sem_addr = cpu_to_le64((u64)(p->page_dma+offset)); |
388 | desc->zero1 = desc->zero2 = 0; | |
458cf5e9 | 389 | offset = (((char *)(desc+1)) - ((char *)p->desc)); |
1da177e4 LT |
390 | desc->next_desc_addr = cpu_to_le64(p->page_dma+offset); |
391 | desc->control_bits = cpu_to_le32(DMASCR_GO|DMASCR_ERR_INT_EN| | |
392 | DMASCR_PARITY_INT_EN| | |
393 | DMASCR_CHAIN_EN | | |
394 | DMASCR_SEM_EN | | |
395 | pci_cmds); | |
70246286 | 396 | if (bio_op(bio) == REQ_OP_WRITE) |
1da177e4 LT |
397 | desc->control_bits |= cpu_to_le32(DMASCR_TRANSFER_READ); |
398 | desc->sem_control_bits = desc->control_bits; | |
399 | ||
003b5c57 KO |
400 | |
401 | bio_advance_iter(bio, &card->current_iter, vec.bv_len); | |
402 | if (!card->current_iter.bi_size) | |
1da177e4 LT |
403 | card->currentbio = NULL; |
404 | ||
405 | return 1; | |
406 | } | |
407 | ||
408 | static void process_page(unsigned long data) | |
409 | { | |
410 | /* check if any of the requests in the page are DMA_COMPLETE, | |
411 | * and deal with them appropriately. | |
412 | * If we find a descriptor without DMA_COMPLETE in the semaphore, then | |
458cf5e9 RD |
413 | * dma must have hit an error on that descriptor, so use dma_status |
414 | * instead and assume that all following descriptors must be re-tried. | |
1da177e4 LT |
415 | */ |
416 | struct mm_page *page; | |
458cf5e9 | 417 | struct bio *return_bio = NULL; |
1da177e4 LT |
418 | struct cardinfo *card = (struct cardinfo *)data; |
419 | unsigned int dma_status = card->dma_status; | |
420 | ||
902d5391 | 421 | spin_lock(&card->lock); |
1da177e4 LT |
422 | if (card->Active < 0) |
423 | goto out_unlock; | |
424 | page = &card->mm_pages[card->Active]; | |
4e953a21 | 425 | |
1da177e4 LT |
426 | while (page->headcnt < page->cnt) { |
427 | struct bio *bio = page->bio; | |
428 | struct mm_dma_desc *desc = &page->desc[page->headcnt]; | |
429 | int control = le32_to_cpu(desc->sem_control_bits); | |
458cf5e9 | 430 | int last = 0; |
003b5c57 | 431 | struct bio_vec vec; |
1da177e4 LT |
432 | |
433 | if (!(control & DMASCR_DMA_COMPLETE)) { | |
434 | control = dma_status; | |
458cf5e9 | 435 | last = 1; |
1da177e4 | 436 | } |
003b5c57 | 437 | |
1da177e4 | 438 | page->headcnt++; |
003b5c57 KO |
439 | vec = bio_iter_iovec(bio, page->iter); |
440 | bio_advance_iter(bio, &page->iter, vec.bv_len); | |
441 | ||
442 | if (!page->iter.bi_size) { | |
1da177e4 | 443 | page->bio = bio->bi_next; |
794e64d5 | 444 | if (page->bio) |
003b5c57 | 445 | page->iter = page->bio->bi_iter; |
eea9befa | 446 | } |
1da177e4 | 447 | |
b46d40da | 448 | dma_unmap_page(&card->dev->dev, desc->data_dma_handle, |
003b5c57 | 449 | vec.bv_len, |
458cf5e9 | 450 | (control & DMASCR_TRANSFER_READ) ? |
b46d40da | 451 | DMA_TO_DEVICE : DMA_FROM_DEVICE); |
1da177e4 LT |
452 | if (control & DMASCR_HARD_ERROR) { |
453 | /* error */ | |
4e4cbee9 | 454 | bio->bi_status = BLK_STS_IOERR; |
4e0af881 JG |
455 | dev_printk(KERN_WARNING, &card->dev->dev, |
456 | "I/O error on sector %d/%d\n", | |
457 | le32_to_cpu(desc->local_addr)>>9, | |
458 | le32_to_cpu(desc->transfer_size)); | |
1da177e4 | 459 | dump_dmastat(card, control); |
a8ebb056 | 460 | } else if (op_is_write(bio_op(bio)) && |
458cf5e9 RD |
461 | le32_to_cpu(desc->local_addr) >> 9 == |
462 | card->init_size) { | |
463 | card->init_size += le32_to_cpu(desc->transfer_size) >> 9; | |
464 | if (card->init_size >> 1 >= card->mm_size) { | |
4e0af881 JG |
465 | dev_printk(KERN_INFO, &card->dev->dev, |
466 | "memory now initialised\n"); | |
1da177e4 LT |
467 | set_userbit(card, MEMORY_INITIALIZED, 1); |
468 | } | |
469 | } | |
470 | if (bio != page->bio) { | |
471 | bio->bi_next = return_bio; | |
472 | return_bio = bio; | |
473 | } | |
474 | ||
458cf5e9 RD |
475 | if (last) |
476 | break; | |
1da177e4 LT |
477 | } |
478 | ||
479 | if (debug & DEBUG_LED_ON_TRANSFER) | |
480 | set_led(card, LED_REMOVE, LED_OFF); | |
481 | ||
482 | if (card->check_batteries) { | |
483 | card->check_batteries = 0; | |
484 | check_batteries(card); | |
485 | } | |
486 | if (page->headcnt >= page->cnt) { | |
487 | reset_page(page); | |
488 | card->Active = -1; | |
489 | activate(card); | |
490 | } else { | |
491 | /* haven't finished with this one yet */ | |
46308c0b | 492 | pr_debug("do some more\n"); |
1da177e4 LT |
493 | mm_start_io(card); |
494 | } | |
495 | out_unlock: | |
902d5391 | 496 | spin_unlock(&card->lock); |
1da177e4 | 497 | |
458cf5e9 | 498 | while (return_bio) { |
1da177e4 LT |
499 | struct bio *bio = return_bio; |
500 | ||
501 | return_bio = bio->bi_next; | |
502 | bio->bi_next = NULL; | |
4246a0b6 | 503 | bio_endio(bio); |
1da177e4 LT |
504 | } |
505 | } | |
506 | ||
74018dc3 | 507 | static void mm_unplug(struct blk_plug_cb *cb, bool from_schedule) |
32587371 | 508 | { |
9cbb1750 | 509 | struct cardinfo *card = cb->data; |
32587371 | 510 | |
9cbb1750 N |
511 | spin_lock_irq(&card->lock); |
512 | activate(card); | |
513 | spin_unlock_irq(&card->lock); | |
514 | kfree(cb); | |
32587371 TG |
515 | } |
516 | ||
517 | static int mm_check_plugged(struct cardinfo *card) | |
518 | { | |
9cbb1750 | 519 | return !!blk_check_plugged(mm_unplug, card, sizeof(struct blk_plug_cb)); |
32587371 TG |
520 | } |
521 | ||
dece1635 | 522 | static blk_qc_t mm_make_request(struct request_queue *q, struct bio *bio) |
1da177e4 LT |
523 | { |
524 | struct cardinfo *card = q->queuedata; | |
f2b9ecc4 | 525 | pr_debug("mm_make_request %llu %u\n", |
4f024f37 KO |
526 | (unsigned long long)bio->bi_iter.bi_sector, |
527 | bio->bi_iter.bi_size); | |
1da177e4 | 528 | |
af67c31f | 529 | blk_queue_split(q, &bio); |
54efd50b | 530 | |
1da177e4 LT |
531 | spin_lock_irq(&card->lock); |
532 | *card->biotail = bio; | |
533 | bio->bi_next = NULL; | |
534 | card->biotail = &bio->bi_next; | |
03ea4afa | 535 | if (op_is_sync(bio->bi_opf) || !mm_check_plugged(card)) |
32587371 | 536 | activate(card); |
1da177e4 LT |
537 | spin_unlock_irq(&card->lock); |
538 | ||
dece1635 | 539 | return BLK_QC_T_NONE; |
1da177e4 LT |
540 | } |
541 | ||
7d12e780 | 542 | static irqreturn_t mm_interrupt(int irq, void *__card) |
1da177e4 LT |
543 | { |
544 | struct cardinfo *card = (struct cardinfo *) __card; | |
545 | unsigned int dma_status; | |
546 | unsigned short cfg_status; | |
547 | ||
548 | HW_TRACE(0x30); | |
549 | ||
550 | dma_status = le32_to_cpu(readl(card->csr_remap + DMA_STATUS_CTRL)); | |
551 | ||
552 | if (!(dma_status & (DMASCR_ERROR_MASK | DMASCR_CHAIN_COMPLETE))) { | |
553 | /* interrupt wasn't for me ... */ | |
554 | return IRQ_NONE; | |
458cf5e9 | 555 | } |
1da177e4 LT |
556 | |
557 | /* clear COMPLETION interrupts */ | |
558 | if (card->flags & UM_FLAG_NO_BYTE_STATUS) | |
559 | writel(cpu_to_le32(DMASCR_DMA_COMPLETE|DMASCR_CHAIN_COMPLETE), | |
458cf5e9 | 560 | card->csr_remap + DMA_STATUS_CTRL); |
1da177e4 LT |
561 | else |
562 | writeb((DMASCR_DMA_COMPLETE|DMASCR_CHAIN_COMPLETE) >> 16, | |
458cf5e9 | 563 | card->csr_remap + DMA_STATUS_CTRL + 2); |
4e953a21 | 564 | |
1da177e4 LT |
565 | /* log errors and clear interrupt status */ |
566 | if (dma_status & DMASCR_ANY_ERR) { | |
567 | unsigned int data_log1, data_log2; | |
568 | unsigned int addr_log1, addr_log2; | |
569 | unsigned char stat, count, syndrome, check; | |
570 | ||
571 | stat = readb(card->csr_remap + MEMCTRLCMD_ERRSTATUS); | |
572 | ||
458cf5e9 RD |
573 | data_log1 = le32_to_cpu(readl(card->csr_remap + |
574 | ERROR_DATA_LOG)); | |
575 | data_log2 = le32_to_cpu(readl(card->csr_remap + | |
576 | ERROR_DATA_LOG + 4)); | |
577 | addr_log1 = le32_to_cpu(readl(card->csr_remap + | |
578 | ERROR_ADDR_LOG)); | |
1da177e4 LT |
579 | addr_log2 = readb(card->csr_remap + ERROR_ADDR_LOG + 4); |
580 | ||
581 | count = readb(card->csr_remap + ERROR_COUNT); | |
582 | syndrome = readb(card->csr_remap + ERROR_SYNDROME); | |
583 | check = readb(card->csr_remap + ERROR_CHECK); | |
584 | ||
585 | dump_dmastat(card, dma_status); | |
586 | ||
587 | if (stat & 0x01) | |
4e0af881 JG |
588 | dev_printk(KERN_ERR, &card->dev->dev, |
589 | "Memory access error detected (err count %d)\n", | |
590 | count); | |
1da177e4 | 591 | if (stat & 0x02) |
4e0af881 JG |
592 | dev_printk(KERN_ERR, &card->dev->dev, |
593 | "Multi-bit EDC error\n"); | |
1da177e4 | 594 | |
4e0af881 JG |
595 | dev_printk(KERN_ERR, &card->dev->dev, |
596 | "Fault Address 0x%02x%08x, Fault Data 0x%08x%08x\n", | |
597 | addr_log2, addr_log1, data_log2, data_log1); | |
598 | dev_printk(KERN_ERR, &card->dev->dev, | |
599 | "Fault Check 0x%02x, Fault Syndrome 0x%02x\n", | |
600 | check, syndrome); | |
1da177e4 LT |
601 | |
602 | writeb(0, card->csr_remap + ERROR_COUNT); | |
603 | } | |
604 | ||
605 | if (dma_status & DMASCR_PARITY_ERR_REP) { | |
4e0af881 JG |
606 | dev_printk(KERN_ERR, &card->dev->dev, |
607 | "PARITY ERROR REPORTED\n"); | |
1da177e4 LT |
608 | pci_read_config_word(card->dev, PCI_STATUS, &cfg_status); |
609 | pci_write_config_word(card->dev, PCI_STATUS, cfg_status); | |
610 | } | |
611 | ||
612 | if (dma_status & DMASCR_PARITY_ERR_DET) { | |
4e0af881 JG |
613 | dev_printk(KERN_ERR, &card->dev->dev, |
614 | "PARITY ERROR DETECTED\n"); | |
1da177e4 LT |
615 | pci_read_config_word(card->dev, PCI_STATUS, &cfg_status); |
616 | pci_write_config_word(card->dev, PCI_STATUS, cfg_status); | |
617 | } | |
618 | ||
619 | if (dma_status & DMASCR_SYSTEM_ERR_SIG) { | |
4e0af881 | 620 | dev_printk(KERN_ERR, &card->dev->dev, "SYSTEM ERROR\n"); |
1da177e4 LT |
621 | pci_read_config_word(card->dev, PCI_STATUS, &cfg_status); |
622 | pci_write_config_word(card->dev, PCI_STATUS, cfg_status); | |
623 | } | |
624 | ||
625 | if (dma_status & DMASCR_TARGET_ABT) { | |
4e0af881 | 626 | dev_printk(KERN_ERR, &card->dev->dev, "TARGET ABORT\n"); |
1da177e4 LT |
627 | pci_read_config_word(card->dev, PCI_STATUS, &cfg_status); |
628 | pci_write_config_word(card->dev, PCI_STATUS, cfg_status); | |
629 | } | |
630 | ||
631 | if (dma_status & DMASCR_MASTER_ABT) { | |
4e0af881 | 632 | dev_printk(KERN_ERR, &card->dev->dev, "MASTER ABORT\n"); |
1da177e4 LT |
633 | pci_read_config_word(card->dev, PCI_STATUS, &cfg_status); |
634 | pci_write_config_word(card->dev, PCI_STATUS, cfg_status); | |
635 | } | |
636 | ||
637 | /* and process the DMA descriptors */ | |
638 | card->dma_status = dma_status; | |
639 | tasklet_schedule(&card->tasklet); | |
640 | ||
641 | HW_TRACE(0x36); | |
642 | ||
4e953a21 | 643 | return IRQ_HANDLED; |
1da177e4 | 644 | } |
458cf5e9 | 645 | |
1da177e4 LT |
646 | /* |
647 | * If both batteries are good, no LED | |
648 | * If either battery has been warned, solid LED | |
649 | * If both batteries are bad, flash the LED quickly | |
650 | * If either battery is bad, flash the LED semi quickly | |
651 | */ | |
652 | static void set_fault_to_battery_status(struct cardinfo *card) | |
653 | { | |
654 | if (card->battery[0].good && card->battery[1].good) | |
655 | set_led(card, LED_FAULT, LED_OFF); | |
656 | else if (card->battery[0].warned || card->battery[1].warned) | |
657 | set_led(card, LED_FAULT, LED_ON); | |
658 | else if (!card->battery[0].good && !card->battery[1].good) | |
659 | set_led(card, LED_FAULT, LED_FLASH_7_0); | |
660 | else | |
661 | set_led(card, LED_FAULT, LED_FLASH_3_5); | |
662 | } | |
663 | ||
664 | static void init_battery_timer(void); | |
665 | ||
1da177e4 LT |
666 | static int check_battery(struct cardinfo *card, int battery, int status) |
667 | { | |
668 | if (status != card->battery[battery].good) { | |
669 | card->battery[battery].good = !card->battery[battery].good; | |
670 | card->battery[battery].last_change = jiffies; | |
671 | ||
672 | if (card->battery[battery].good) { | |
4e0af881 JG |
673 | dev_printk(KERN_ERR, &card->dev->dev, |
674 | "Battery %d now good\n", battery + 1); | |
1da177e4 LT |
675 | card->battery[battery].warned = 0; |
676 | } else | |
4e0af881 JG |
677 | dev_printk(KERN_ERR, &card->dev->dev, |
678 | "Battery %d now FAILED\n", battery + 1); | |
1da177e4 LT |
679 | |
680 | return 1; | |
681 | } else if (!card->battery[battery].good && | |
682 | !card->battery[battery].warned && | |
683 | time_after_eq(jiffies, card->battery[battery].last_change + | |
684 | (HZ * 60 * 60 * 5))) { | |
4e0af881 JG |
685 | dev_printk(KERN_ERR, &card->dev->dev, |
686 | "Battery %d still FAILED after 5 hours\n", battery + 1); | |
1da177e4 LT |
687 | card->battery[battery].warned = 1; |
688 | ||
689 | return 1; | |
690 | } | |
691 | ||
692 | return 0; | |
693 | } | |
458cf5e9 | 694 | |
1da177e4 LT |
695 | static void check_batteries(struct cardinfo *card) |
696 | { | |
697 | /* NOTE: this must *never* be called while the card | |
698 | * is doing (bus-to-card) DMA, or you will need the | |
699 | * reset switch | |
700 | */ | |
701 | unsigned char status; | |
702 | int ret1, ret2; | |
703 | ||
704 | status = readb(card->csr_remap + MEMCTRLSTATUS_BATTERY); | |
705 | if (debug & DEBUG_BATTERY_POLLING) | |
4e0af881 JG |
706 | dev_printk(KERN_DEBUG, &card->dev->dev, |
707 | "checking battery status, 1 = %s, 2 = %s\n", | |
1da177e4 LT |
708 | (status & BATTERY_1_FAILURE) ? "FAILURE" : "OK", |
709 | (status & BATTERY_2_FAILURE) ? "FAILURE" : "OK"); | |
710 | ||
711 | ret1 = check_battery(card, 0, !(status & BATTERY_1_FAILURE)); | |
712 | ret2 = check_battery(card, 1, !(status & BATTERY_2_FAILURE)); | |
713 | ||
714 | if (ret1 || ret2) | |
715 | set_fault_to_battery_status(card); | |
716 | } | |
717 | ||
e99e88a9 | 718 | static void check_all_batteries(struct timer_list *unused) |
1da177e4 LT |
719 | { |
720 | int i; | |
721 | ||
4e953a21 | 722 | for (i = 0; i < num_cards; i++) |
1da177e4 LT |
723 | if (!(cards[i].flags & UM_FLAG_NO_BATT)) { |
724 | struct cardinfo *card = &cards[i]; | |
725 | spin_lock_bh(&card->lock); | |
726 | if (card->Active >= 0) | |
727 | card->check_batteries = 1; | |
728 | else | |
729 | check_batteries(card); | |
730 | spin_unlock_bh(&card->lock); | |
731 | } | |
732 | ||
733 | init_battery_timer(); | |
734 | } | |
458cf5e9 | 735 | |
1da177e4 LT |
736 | static void init_battery_timer(void) |
737 | { | |
e99e88a9 | 738 | timer_setup(&battery_timer, check_all_batteries, 0); |
1da177e4 LT |
739 | battery_timer.expires = jiffies + (HZ * 60); |
740 | add_timer(&battery_timer); | |
741 | } | |
458cf5e9 | 742 | |
1da177e4 LT |
743 | static void del_battery_timer(void) |
744 | { | |
745 | del_timer(&battery_timer); | |
746 | } | |
458cf5e9 | 747 | |
1da177e4 LT |
748 | /* |
749 | * Note no locks taken out here. In a worst case scenario, we could drop | |
750 | * a chunk of system memory. But that should never happen, since validation | |
751 | * happens at open or mount time, when locks are held. | |
752 | * | |
753 | * That's crap, since doing that while some partitions are opened | |
754 | * or mounted will give you really nasty results. | |
755 | */ | |
756 | static int mm_revalidate(struct gendisk *disk) | |
757 | { | |
758 | struct cardinfo *card = disk->private_data; | |
759 | set_capacity(disk, card->mm_size << 1); | |
760 | return 0; | |
761 | } | |
a885c8c4 CH |
762 | |
763 | static int mm_getgeo(struct block_device *bdev, struct hd_geometry *geo) | |
1da177e4 | 764 | { |
a885c8c4 CH |
765 | struct cardinfo *card = bdev->bd_disk->private_data; |
766 | int size = card->mm_size * (1024 / MM_HARDSECT); | |
1da177e4 | 767 | |
a885c8c4 CH |
768 | /* |
769 | * get geometry: we have to fake one... trim the size to a | |
770 | * multiple of 2048 (1M): tell we have 32 sectors, 64 heads, | |
771 | * whatever cylinders. | |
772 | */ | |
773 | geo->heads = 64; | |
774 | geo->sectors = 32; | |
775 | geo->cylinders = size / (geo->heads * geo->sectors); | |
776 | return 0; | |
1da177e4 | 777 | } |
a885c8c4 | 778 | |
83d5cde4 | 779 | static const struct block_device_operations mm_fops = { |
1da177e4 | 780 | .owner = THIS_MODULE, |
a885c8c4 | 781 | .getgeo = mm_getgeo, |
458cf5e9 | 782 | .revalidate_disk = mm_revalidate, |
1da177e4 | 783 | }; |
458cf5e9 | 784 | |
8d85fce7 | 785 | static int mm_pci_probe(struct pci_dev *dev, const struct pci_device_id *id) |
1da177e4 LT |
786 | { |
787 | int ret = -ENODEV; | |
788 | struct cardinfo *card = &cards[num_cards]; | |
789 | unsigned char mem_present; | |
790 | unsigned char batt_status; | |
791 | unsigned int saved_bar, data; | |
ee4a7b68 JG |
792 | unsigned long csr_base; |
793 | unsigned long csr_len; | |
1da177e4 | 794 | int magic_number; |
4e0af881 JG |
795 | static int printed_version; |
796 | ||
797 | if (!printed_version++) | |
798 | printk(KERN_INFO DRIVER_VERSION " : " DRIVER_DESC "\n"); | |
1da177e4 | 799 | |
ee4a7b68 JG |
800 | ret = pci_enable_device(dev); |
801 | if (ret) | |
802 | return ret; | |
1da177e4 LT |
803 | |
804 | pci_write_config_byte(dev, PCI_LATENCY_TIMER, 0xF8); | |
805 | pci_set_master(dev); | |
806 | ||
807 | card->dev = dev; | |
1da177e4 | 808 | |
ee4a7b68 JG |
809 | csr_base = pci_resource_start(dev, 0); |
810 | csr_len = pci_resource_len(dev, 0); | |
811 | if (!csr_base || !csr_len) | |
812 | return -ENODEV; | |
1da177e4 | 813 | |
4e0af881 | 814 | dev_printk(KERN_INFO, &dev->dev, |
458cf5e9 | 815 | "Micro Memory(tm) controller found (PCI Mem Module (Battery Backup))\n"); |
1da177e4 | 816 | |
b46d40da CH |
817 | if (dma_set_mask(&dev->dev, DMA_BIT_MASK(64)) && |
818 | dma_set_mask(&dev->dev, DMA_BIT_MASK(32))) { | |
4e0af881 | 819 | dev_printk(KERN_WARNING, &dev->dev, "NO suitable DMA found\n"); |
1da177e4 LT |
820 | return -ENOMEM; |
821 | } | |
ee4a7b68 JG |
822 | |
823 | ret = pci_request_regions(dev, DRIVER_NAME); | |
824 | if (ret) { | |
4e0af881 JG |
825 | dev_printk(KERN_ERR, &card->dev->dev, |
826 | "Unable to request memory region\n"); | |
1da177e4 LT |
827 | goto failed_req_csr; |
828 | } | |
829 | ||
4bdc0d67 | 830 | card->csr_remap = ioremap(csr_base, csr_len); |
1da177e4 | 831 | if (!card->csr_remap) { |
4e0af881 JG |
832 | dev_printk(KERN_ERR, &card->dev->dev, |
833 | "Unable to remap memory region\n"); | |
1da177e4 LT |
834 | ret = -ENOMEM; |
835 | ||
836 | goto failed_remap_csr; | |
837 | } | |
838 | ||
4e0af881 JG |
839 | dev_printk(KERN_INFO, &card->dev->dev, |
840 | "CSR 0x%08lx -> 0x%p (0x%lx)\n", | |
ee4a7b68 | 841 | csr_base, card->csr_remap, csr_len); |
1da177e4 | 842 | |
458cf5e9 | 843 | switch (card->dev->device) { |
1da177e4 LT |
844 | case 0x5415: |
845 | card->flags |= UM_FLAG_NO_BYTE_STATUS | UM_FLAG_NO_BATTREG; | |
846 | magic_number = 0x59; | |
847 | break; | |
848 | ||
849 | case 0x5425: | |
850 | card->flags |= UM_FLAG_NO_BYTE_STATUS; | |
851 | magic_number = 0x5C; | |
852 | break; | |
853 | ||
854 | case 0x6155: | |
458cf5e9 RD |
855 | card->flags |= UM_FLAG_NO_BYTE_STATUS | |
856 | UM_FLAG_NO_BATTREG | UM_FLAG_NO_BATT; | |
1da177e4 LT |
857 | magic_number = 0x99; |
858 | break; | |
859 | ||
860 | default: | |
861 | magic_number = 0x100; | |
862 | break; | |
863 | } | |
864 | ||
865 | if (readb(card->csr_remap + MEMCTRLSTATUS_MAGIC) != magic_number) { | |
4e0af881 | 866 | dev_printk(KERN_ERR, &card->dev->dev, "Magic number invalid\n"); |
1da177e4 LT |
867 | ret = -ENOMEM; |
868 | goto failed_magic; | |
869 | } | |
870 | ||
b46d40da CH |
871 | card->mm_pages[0].desc = dma_alloc_coherent(&card->dev->dev, |
872 | PAGE_SIZE * 2, &card->mm_pages[0].page_dma, GFP_KERNEL); | |
873 | card->mm_pages[1].desc = dma_alloc_coherent(&card->dev->dev, | |
874 | PAGE_SIZE * 2, &card->mm_pages[1].page_dma, GFP_KERNEL); | |
1da177e4 LT |
875 | if (card->mm_pages[0].desc == NULL || |
876 | card->mm_pages[1].desc == NULL) { | |
4e0af881 | 877 | dev_printk(KERN_ERR, &card->dev->dev, "alloc failed\n"); |
1da177e4 LT |
878 | goto failed_alloc; |
879 | } | |
880 | reset_page(&card->mm_pages[0]); | |
881 | reset_page(&card->mm_pages[1]); | |
882 | card->Ready = 0; /* page 0 is ready */ | |
883 | card->Active = -1; /* no page is active */ | |
884 | card->bio = NULL; | |
885 | card->biotail = &card->bio; | |
498f6650 | 886 | spin_lock_init(&card->lock); |
1da177e4 | 887 | |
3d745ea5 | 888 | card->queue = blk_alloc_queue(mm_make_request, NUMA_NO_NODE); |
1da177e4 LT |
889 | if (!card->queue) |
890 | goto failed_alloc; | |
1da177e4 | 891 | card->queue->queuedata = card; |
1da177e4 LT |
892 | |
893 | tasklet_init(&card->tasklet, process_page, (unsigned long)card); | |
894 | ||
895 | card->check_batteries = 0; | |
4e953a21 | 896 | |
1da177e4 LT |
897 | mem_present = readb(card->csr_remap + MEMCTRLSTATUS_MEMORY); |
898 | switch (mem_present) { | |
899 | case MEM_128_MB: | |
900 | card->mm_size = 1024 * 128; | |
901 | break; | |
902 | case MEM_256_MB: | |
903 | card->mm_size = 1024 * 256; | |
904 | break; | |
905 | case MEM_512_MB: | |
906 | card->mm_size = 1024 * 512; | |
907 | break; | |
908 | case MEM_1_GB: | |
909 | card->mm_size = 1024 * 1024; | |
910 | break; | |
911 | case MEM_2_GB: | |
912 | card->mm_size = 1024 * 2048; | |
913 | break; | |
914 | default: | |
915 | card->mm_size = 0; | |
916 | break; | |
917 | } | |
918 | ||
919 | /* Clear the LED's we control */ | |
920 | set_led(card, LED_REMOVE, LED_OFF); | |
921 | set_led(card, LED_FAULT, LED_OFF); | |
922 | ||
923 | batt_status = readb(card->csr_remap + MEMCTRLSTATUS_BATTERY); | |
924 | ||
925 | card->battery[0].good = !(batt_status & BATTERY_1_FAILURE); | |
926 | card->battery[1].good = !(batt_status & BATTERY_2_FAILURE); | |
927 | card->battery[0].last_change = card->battery[1].last_change = jiffies; | |
928 | ||
4e953a21 | 929 | if (card->flags & UM_FLAG_NO_BATT) |
4e0af881 JG |
930 | dev_printk(KERN_INFO, &card->dev->dev, |
931 | "Size %d KB\n", card->mm_size); | |
1da177e4 | 932 | else { |
4e0af881 JG |
933 | dev_printk(KERN_INFO, &card->dev->dev, |
934 | "Size %d KB, Battery 1 %s (%s), Battery 2 %s (%s)\n", | |
935 | card->mm_size, | |
458cf5e9 | 936 | batt_status & BATTERY_1_DISABLED ? "Disabled" : "Enabled", |
1da177e4 | 937 | card->battery[0].good ? "OK" : "FAILURE", |
458cf5e9 | 938 | batt_status & BATTERY_2_DISABLED ? "Disabled" : "Enabled", |
1da177e4 LT |
939 | card->battery[1].good ? "OK" : "FAILURE"); |
940 | ||
941 | set_fault_to_battery_status(card); | |
942 | } | |
943 | ||
944 | pci_read_config_dword(dev, PCI_BASE_ADDRESS_1, &saved_bar); | |
945 | data = 0xffffffff; | |
946 | pci_write_config_dword(dev, PCI_BASE_ADDRESS_1, data); | |
947 | pci_read_config_dword(dev, PCI_BASE_ADDRESS_1, &data); | |
948 | pci_write_config_dword(dev, PCI_BASE_ADDRESS_1, saved_bar); | |
949 | data &= 0xfffffff0; | |
950 | data = ~data; | |
951 | data += 1; | |
952 | ||
458cf5e9 RD |
953 | if (request_irq(dev->irq, mm_interrupt, IRQF_SHARED, DRIVER_NAME, |
954 | card)) { | |
4e0af881 JG |
955 | dev_printk(KERN_ERR, &card->dev->dev, |
956 | "Unable to allocate IRQ\n"); | |
1da177e4 | 957 | ret = -ENODEV; |
1da177e4 LT |
958 | goto failed_req_irq; |
959 | } | |
960 | ||
4e0af881 | 961 | dev_printk(KERN_INFO, &card->dev->dev, |
ee4a7b68 | 962 | "Window size %d bytes, IRQ %d\n", data, dev->irq); |
1da177e4 | 963 | |
1da177e4 LT |
964 | pci_set_drvdata(dev, card); |
965 | ||
966 | if (pci_write_cmd != 0x0F) /* If not Memory Write & Invalidate */ | |
967 | pci_write_cmd = 0x07; /* then Memory Write command */ | |
968 | ||
969 | if (pci_write_cmd & 0x08) { /* use Memory Write and Invalidate */ | |
970 | unsigned short cfg_command; | |
971 | pci_read_config_word(dev, PCI_COMMAND, &cfg_command); | |
972 | cfg_command |= 0x10; /* Memory Write & Invalidate Enable */ | |
973 | pci_write_config_word(dev, PCI_COMMAND, cfg_command); | |
974 | } | |
975 | pci_cmds = (pci_read_cmd << 28) | (pci_write_cmd << 24); | |
976 | ||
977 | num_cards++; | |
978 | ||
979 | if (!get_userbit(card, MEMORY_INITIALIZED)) { | |
4e0af881 | 980 | dev_printk(KERN_INFO, &card->dev->dev, |
458cf5e9 | 981 | "memory NOT initialized. Consider over-writing whole device.\n"); |
1da177e4 LT |
982 | card->init_size = 0; |
983 | } else { | |
4e0af881 JG |
984 | dev_printk(KERN_INFO, &card->dev->dev, |
985 | "memory already initialized\n"); | |
1da177e4 LT |
986 | card->init_size = card->mm_size; |
987 | } | |
988 | ||
989 | /* Enable ECC */ | |
990 | writeb(EDC_STORE_CORRECT, card->csr_remap + MEMCTRLCMD_ERRCTRL); | |
991 | ||
992 | return 0; | |
993 | ||
994 | failed_req_irq: | |
995 | failed_alloc: | |
996 | if (card->mm_pages[0].desc) | |
b46d40da CH |
997 | dma_free_coherent(&card->dev->dev, PAGE_SIZE * 2, |
998 | card->mm_pages[0].desc, | |
999 | card->mm_pages[0].page_dma); | |
1da177e4 | 1000 | if (card->mm_pages[1].desc) |
b46d40da CH |
1001 | dma_free_coherent(&card->dev->dev, PAGE_SIZE * 2, |
1002 | card->mm_pages[1].desc, | |
1003 | card->mm_pages[1].page_dma); | |
1da177e4 | 1004 | failed_magic: |
1da177e4 LT |
1005 | iounmap(card->csr_remap); |
1006 | failed_remap_csr: | |
ee4a7b68 | 1007 | pci_release_regions(dev); |
1da177e4 LT |
1008 | failed_req_csr: |
1009 | ||
1010 | return ret; | |
1011 | } | |
458cf5e9 | 1012 | |
1da177e4 LT |
1013 | static void mm_pci_remove(struct pci_dev *dev) |
1014 | { | |
1015 | struct cardinfo *card = pci_get_drvdata(dev); | |
1016 | ||
1017 | tasklet_kill(&card->tasklet); | |
ee4a7b68 | 1018 | free_irq(dev->irq, card); |
1da177e4 | 1019 | iounmap(card->csr_remap); |
1da177e4 LT |
1020 | |
1021 | if (card->mm_pages[0].desc) | |
b46d40da | 1022 | dma_free_coherent(&card->dev->dev, PAGE_SIZE * 2, |
1da177e4 LT |
1023 | card->mm_pages[0].desc, |
1024 | card->mm_pages[0].page_dma); | |
1025 | if (card->mm_pages[1].desc) | |
b46d40da | 1026 | dma_free_coherent(&card->dev->dev, PAGE_SIZE * 2, |
1da177e4 LT |
1027 | card->mm_pages[1].desc, |
1028 | card->mm_pages[1].page_dma); | |
1312f40e | 1029 | blk_cleanup_queue(card->queue); |
ee4a7b68 JG |
1030 | |
1031 | pci_release_regions(dev); | |
1032 | pci_disable_device(dev); | |
1da177e4 LT |
1033 | } |
1034 | ||
5874c18b | 1035 | static const struct pci_device_id mm_pci_ids[] = { |
458cf5e9 RD |
1036 | {PCI_DEVICE(PCI_VENDOR_ID_MICRO_MEMORY, PCI_DEVICE_ID_MICRO_MEMORY_5415CN)}, |
1037 | {PCI_DEVICE(PCI_VENDOR_ID_MICRO_MEMORY, PCI_DEVICE_ID_MICRO_MEMORY_5425CN)}, | |
1038 | {PCI_DEVICE(PCI_VENDOR_ID_MICRO_MEMORY, PCI_DEVICE_ID_MICRO_MEMORY_6155)}, | |
5874c18b | 1039 | { |
1da177e4 LT |
1040 | .vendor = 0x8086, |
1041 | .device = 0xB555, | |
458cf5e9 RD |
1042 | .subvendor = 0x1332, |
1043 | .subdevice = 0x5460, | |
1044 | .class = 0x050000, | |
1045 | .class_mask = 0, | |
5874c18b | 1046 | }, { /* end: all zeroes */ } |
1da177e4 LT |
1047 | }; |
1048 | ||
1049 | MODULE_DEVICE_TABLE(pci, mm_pci_ids); | |
1050 | ||
1051 | static struct pci_driver mm_pci_driver = { | |
ee4a7b68 JG |
1052 | .name = DRIVER_NAME, |
1053 | .id_table = mm_pci_ids, | |
1054 | .probe = mm_pci_probe, | |
1055 | .remove = mm_pci_remove, | |
1da177e4 | 1056 | }; |
ee4a7b68 | 1057 | |
1da177e4 LT |
1058 | static int __init mm_init(void) |
1059 | { | |
1060 | int retval, i; | |
1061 | int err; | |
1062 | ||
9bfab8ce | 1063 | retval = pci_register_driver(&mm_pci_driver); |
1da177e4 LT |
1064 | if (retval) |
1065 | return -ENOMEM; | |
1066 | ||
cb3503ca | 1067 | err = major_nr = register_blkdev(0, DRIVER_NAME); |
5a243e0e N |
1068 | if (err < 0) { |
1069 | pci_unregister_driver(&mm_pci_driver); | |
1da177e4 | 1070 | return -EIO; |
5a243e0e | 1071 | } |
1da177e4 LT |
1072 | |
1073 | for (i = 0; i < num_cards; i++) { | |
1074 | mm_gendisk[i] = alloc_disk(1 << MM_SHIFT); | |
1075 | if (!mm_gendisk[i]) | |
1076 | goto out; | |
1077 | } | |
1078 | ||
1079 | for (i = 0; i < num_cards; i++) { | |
1080 | struct gendisk *disk = mm_gendisk[i]; | |
1081 | sprintf(disk->disk_name, "umem%c", 'a'+i); | |
1da177e4 LT |
1082 | spin_lock_init(&cards[i].lock); |
1083 | disk->major = major_nr; | |
1084 | disk->first_minor = i << MM_SHIFT; | |
1085 | disk->fops = &mm_fops; | |
1086 | disk->private_data = &cards[i]; | |
1087 | disk->queue = cards[i].queue; | |
1088 | set_capacity(disk, cards[i].mm_size << 1); | |
1089 | add_disk(disk); | |
1090 | } | |
1091 | ||
1092 | init_battery_timer(); | |
4e0af881 | 1093 | printk(KERN_INFO "MM: desc_per_page = %ld\n", DESC_PER_PAGE); |
1da177e4 LT |
1094 | /* printk("mm_init: Done. 10-19-01 9:00\n"); */ |
1095 | return 0; | |
1096 | ||
1097 | out: | |
5a243e0e | 1098 | pci_unregister_driver(&mm_pci_driver); |
cb3503ca | 1099 | unregister_blkdev(major_nr, DRIVER_NAME); |
1da177e4 LT |
1100 | while (i--) |
1101 | put_disk(mm_gendisk[i]); | |
1102 | return -ENOMEM; | |
1103 | } | |
458cf5e9 | 1104 | |
1da177e4 LT |
1105 | static void __exit mm_cleanup(void) |
1106 | { | |
1107 | int i; | |
1108 | ||
1109 | del_battery_timer(); | |
1110 | ||
458cf5e9 | 1111 | for (i = 0; i < num_cards ; i++) { |
1da177e4 LT |
1112 | del_gendisk(mm_gendisk[i]); |
1113 | put_disk(mm_gendisk[i]); | |
1114 | } | |
1115 | ||
1116 | pci_unregister_driver(&mm_pci_driver); | |
1117 | ||
cb3503ca | 1118 | unregister_blkdev(major_nr, DRIVER_NAME); |
1da177e4 LT |
1119 | } |
1120 | ||
1121 | module_init(mm_init); | |
1122 | module_exit(mm_cleanup); | |
1123 | ||
1124 | MODULE_AUTHOR(DRIVER_AUTHOR); | |
1125 | MODULE_DESCRIPTION(DRIVER_DESC); | |
1126 | MODULE_LICENSE("GPL"); |