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CommitLineData
1da177e4
LT
1/*
2 * mm.c - Micro Memory(tm) PCI memory board block device driver - v2.3
3 *
4 * (C) 2001 San Mehat <nettwerk@valinux.com>
5 * (C) 2001 Johannes Erdfelt <jerdfelt@valinux.com>
6 * (C) 2001 NeilBrown <neilb@cse.unsw.edu.au>
7 *
8 * This driver for the Micro Memory PCI Memory Module with Battery Backup
9 * is Copyright Micro Memory Inc 2001-2002. All rights reserved.
10 *
11 * This driver is released to the public under the terms of the
12 * GNU GENERAL PUBLIC LICENSE version 2
13 * See the file COPYING for details.
14 *
15 * This driver provides a standard block device interface for Micro Memory(tm)
16 * PCI based RAM boards.
17 * 10/05/01: Phap Nguyen - Rebuilt the driver
18 * 10/22/01: Phap Nguyen - v2.1 Added disk partitioning
19 * 29oct2001:NeilBrown - Use make_request_fn instead of request_fn
20 * - use stand disk partitioning (so fdisk works).
21 * 08nov2001:NeilBrown - change driver name from "mm" to "umem"
22 * - incorporate into main kernel
23 * 08apr2002:NeilBrown - Move some of interrupt handle to tasklet
24 * - use spin_lock_bh instead of _irq
25 * - Never block on make_request. queue
26 * bh's instead.
27 * - unregister umem from devfs at mod unload
28 * - Change version to 2.3
29 * 07Nov2001:Phap Nguyen - Select pci read command: 06, 12, 15 (Decimal)
30 * 07Jan2002: P. Nguyen - Used PCI Memory Write & Invalidate for DMA
31 * 15May2002:NeilBrown - convert to bio for 2.5
32 * 17May2002:NeilBrown - remove init_mem initialisation. Instead detect
33 * - a sequence of writes that cover the card, and
34 * - set initialised bit then.
35 */
36
458cf5e9 37#undef DEBUG /* #define DEBUG if you want debugging info (pr_debug) */
1da177e4
LT
38#include <linux/fs.h>
39#include <linux/bio.h>
40#include <linux/kernel.h>
41#include <linux/mm.h>
42#include <linux/mman.h>
43#include <linux/ioctl.h>
44#include <linux/module.h>
45#include <linux/init.h>
46#include <linux/interrupt.h>
1da177e4
LT
47#include <linux/timer.h>
48#include <linux/pci.h>
49#include <linux/slab.h>
910638ae 50#include <linux/dma-mapping.h>
1da177e4
LT
51
52#include <linux/fcntl.h> /* O_ACCMODE */
53#include <linux/hdreg.h> /* HDIO_GETGEO */
54
3084f0c6 55#include "umem.h"
1da177e4
LT
56
57#include <asm/uaccess.h>
58#include <asm/io.h>
59
1da177e4
LT
60#define MM_MAXCARDS 4
61#define MM_RAHEAD 2 /* two sectors */
62#define MM_BLKSIZE 1024 /* 1k blocks */
63#define MM_HARDSECT 512 /* 512-byte hardware sectors */
64#define MM_SHIFT 6 /* max 64 partitions on 4 cards */
65
66/*
67 * Version Information
68 */
69
ee4a7b68
JG
70#define DRIVER_NAME "umem"
71#define DRIVER_VERSION "v2.3"
72#define DRIVER_AUTHOR "San Mehat, Johannes Erdfelt, NeilBrown"
73#define DRIVER_DESC "Micro Memory(tm) PCI memory board block driver"
1da177e4
LT
74
75static int debug;
76/* #define HW_TRACE(x) writeb(x,cards[0].csr_remap + MEMCTRLSTATUS_MAGIC) */
77#define HW_TRACE(x)
78
79#define DEBUG_LED_ON_TRANSFER 0x01
80#define DEBUG_BATTERY_POLLING 0x02
81
82module_param(debug, int, 0644);
83MODULE_PARM_DESC(debug, "Debug bitmask");
84
85static int pci_read_cmd = 0x0C; /* Read Multiple */
86module_param(pci_read_cmd, int, 0);
87MODULE_PARM_DESC(pci_read_cmd, "PCI read command");
88
89static int pci_write_cmd = 0x0F; /* Write and Invalidate */
90module_param(pci_write_cmd, int, 0);
91MODULE_PARM_DESC(pci_write_cmd, "PCI write command");
92
93static int pci_cmds;
94
95static int major_nr;
96
97#include <linux/blkdev.h>
98#include <linux/blkpg.h>
99
100struct cardinfo {
1da177e4
LT
101 struct pci_dev *dev;
102
1da177e4 103 unsigned char __iomem *csr_remap;
1da177e4
LT
104 unsigned int mm_size; /* size in kbytes */
105
106 unsigned int init_size; /* initial segment, in sectors,
107 * that we know to
108 * have been written
109 */
110 struct bio *bio, *currentbio, **biotail;
eea9befa
N
111 int current_idx;
112 sector_t current_sector;
1da177e4 113
165125e1 114 struct request_queue *queue;
1da177e4
LT
115
116 struct mm_page {
117 dma_addr_t page_dma;
118 struct mm_dma_desc *desc;
119 int cnt, headcnt;
120 struct bio *bio, **biotail;
eea9befa 121 int idx;
1da177e4
LT
122 } mm_pages[2];
123#define DESC_PER_PAGE ((PAGE_SIZE*2)/sizeof(struct mm_dma_desc))
124
125 int Active, Ready;
126
127 struct tasklet_struct tasklet;
128 unsigned int dma_status;
129
130 struct {
131 int good;
132 int warned;
133 unsigned long last_change;
134 } battery[2];
135
136 spinlock_t lock;
137 int check_batteries;
138
139 int flags;
140};
141
142static struct cardinfo cards[MM_MAXCARDS];
1da177e4
LT
143static struct timer_list battery_timer;
144
458cf5e9 145static int num_cards;
1da177e4
LT
146
147static struct gendisk *mm_gendisk[MM_MAXCARDS];
148
149static void check_batteries(struct cardinfo *card);
150
1da177e4
LT
151static int get_userbit(struct cardinfo *card, int bit)
152{
153 unsigned char led;
154
155 led = readb(card->csr_remap + MEMCTRLCMD_LEDCTRL);
156 return led & bit;
157}
458cf5e9 158
1da177e4
LT
159static int set_userbit(struct cardinfo *card, int bit, unsigned char state)
160{
161 unsigned char led;
162
163 led = readb(card->csr_remap + MEMCTRLCMD_LEDCTRL);
164 if (state)
165 led |= bit;
166 else
167 led &= ~bit;
168 writeb(led, card->csr_remap + MEMCTRLCMD_LEDCTRL);
169
170 return 0;
171}
458cf5e9 172
1da177e4
LT
173/*
174 * NOTE: For the power LED, use the LED_POWER_* macros since they differ
175 */
176static void set_led(struct cardinfo *card, int shift, unsigned char state)
177{
178 unsigned char led;
179
180 led = readb(card->csr_remap + MEMCTRLCMD_LEDCTRL);
181 if (state == LED_FLIP)
182 led ^= (1<<shift);
183 else {
184 led &= ~(0x03 << shift);
185 led |= (state << shift);
186 }
187 writeb(led, card->csr_remap + MEMCTRLCMD_LEDCTRL);
188
189}
190
191#ifdef MM_DIAG
1da177e4
LT
192static void dump_regs(struct cardinfo *card)
193{
194 unsigned char *p;
195 int i, i1;
196
197 p = card->csr_remap;
198 for (i = 0; i < 8; i++) {
199 printk(KERN_DEBUG "%p ", p);
200
201 for (i1 = 0; i1 < 16; i1++)
202 printk("%02x ", *p++);
203
204 printk("\n");
205 }
206}
207#endif
458cf5e9 208
1da177e4
LT
209static void dump_dmastat(struct cardinfo *card, unsigned int dmastat)
210{
4e0af881 211 dev_printk(KERN_DEBUG, &card->dev->dev, "DMAstat - ");
1da177e4 212 if (dmastat & DMASCR_ANY_ERR)
458cf5e9 213 printk(KERN_CONT "ANY_ERR ");
1da177e4 214 if (dmastat & DMASCR_MBE_ERR)
458cf5e9 215 printk(KERN_CONT "MBE_ERR ");
1da177e4 216 if (dmastat & DMASCR_PARITY_ERR_REP)
458cf5e9 217 printk(KERN_CONT "PARITY_ERR_REP ");
1da177e4 218 if (dmastat & DMASCR_PARITY_ERR_DET)
458cf5e9 219 printk(KERN_CONT "PARITY_ERR_DET ");
1da177e4 220 if (dmastat & DMASCR_SYSTEM_ERR_SIG)
458cf5e9 221 printk(KERN_CONT "SYSTEM_ERR_SIG ");
1da177e4 222 if (dmastat & DMASCR_TARGET_ABT)
458cf5e9 223 printk(KERN_CONT "TARGET_ABT ");
1da177e4 224 if (dmastat & DMASCR_MASTER_ABT)
458cf5e9 225 printk(KERN_CONT "MASTER_ABT ");
1da177e4 226 if (dmastat & DMASCR_CHAIN_COMPLETE)
458cf5e9 227 printk(KERN_CONT "CHAIN_COMPLETE ");
1da177e4 228 if (dmastat & DMASCR_DMA_COMPLETE)
458cf5e9 229 printk(KERN_CONT "DMA_COMPLETE ");
1da177e4
LT
230 printk("\n");
231}
232
233/*
234 * Theory of request handling
235 *
236 * Each bio is assigned to one mm_dma_desc - which may not be enough FIXME
237 * We have two pages of mm_dma_desc, holding about 64 descriptors
238 * each. These are allocated at init time.
239 * One page is "Ready" and is either full, or can have request added.
240 * The other page might be "Active", which DMA is happening on it.
241 *
242 * Whenever IO on the active page completes, the Ready page is activated
243 * and the ex-Active page is clean out and made Ready.
244 * Otherwise the Ready page is only activated when it becomes full, or
245 * when mm_unplug_device is called via the unplug_io_fn.
246 *
247 * If a request arrives while both pages a full, it is queued, and b_rdev is
248 * overloaded to record whether it was a read or a write.
249 *
250 * The interrupt handler only polls the device to clear the interrupt.
251 * The processing of the result is done in a tasklet.
252 */
253
254static void mm_start_io(struct cardinfo *card)
255{
256 /* we have the lock, we know there is
257 * no IO active, and we know that card->Active
258 * is set
259 */
260 struct mm_dma_desc *desc;
261 struct mm_page *page;
262 int offset;
263
264 /* make the last descriptor end the chain */
265 page = &card->mm_pages[card->Active];
458cf5e9
RD
266 pr_debug("start_io: %d %d->%d\n",
267 card->Active, page->headcnt, page->cnt - 1);
1da177e4
LT
268 desc = &page->desc[page->cnt-1];
269
270 desc->control_bits |= cpu_to_le32(DMASCR_CHAIN_COMP_EN);
271 desc->control_bits &= ~cpu_to_le32(DMASCR_CHAIN_EN);
272 desc->sem_control_bits = desc->control_bits;
273
4e953a21 274
1da177e4
LT
275 if (debug & DEBUG_LED_ON_TRANSFER)
276 set_led(card, LED_REMOVE, LED_ON);
277
278 desc = &page->desc[page->headcnt];
279 writel(0, card->csr_remap + DMA_PCI_ADDR);
280 writel(0, card->csr_remap + DMA_PCI_ADDR + 4);
281
282 writel(0, card->csr_remap + DMA_LOCAL_ADDR);
283 writel(0, card->csr_remap + DMA_LOCAL_ADDR + 4);
284
285 writel(0, card->csr_remap + DMA_TRANSFER_SIZE);
286 writel(0, card->csr_remap + DMA_TRANSFER_SIZE + 4);
287
288 writel(0, card->csr_remap + DMA_SEMAPHORE_ADDR);
289 writel(0, card->csr_remap + DMA_SEMAPHORE_ADDR + 4);
290
458cf5e9
RD
291 offset = ((char *)desc) - ((char *)page->desc);
292 writel(cpu_to_le32((page->page_dma+offset) & 0xffffffff),
1da177e4
LT
293 card->csr_remap + DMA_DESCRIPTOR_ADDR);
294 /* Force the value to u64 before shifting otherwise >> 32 is undefined C
295 * and on some ports will do nothing ! */
296 writel(cpu_to_le32(((u64)page->page_dma)>>32),
297 card->csr_remap + DMA_DESCRIPTOR_ADDR + 4);
298
299 /* Go, go, go */
300 writel(cpu_to_le32(DMASCR_GO | DMASCR_CHAIN_EN | pci_cmds),
301 card->csr_remap + DMA_STATUS_CTRL);
302}
303
304static int add_bio(struct cardinfo *card);
305
306static void activate(struct cardinfo *card)
307{
4e953a21 308 /* if No page is Active, and Ready is
1da177e4
LT
309 * not empty, then switch Ready page
310 * to active and start IO.
311 * Then add any bh's that are available to Ready
312 */
313
314 do {
315 while (add_bio(card))
316 ;
317
318 if (card->Active == -1 &&
319 card->mm_pages[card->Ready].cnt > 0) {
320 card->Active = card->Ready;
321 card->Ready = 1-card->Ready;
322 mm_start_io(card);
323 }
324
325 } while (card->Active == -1 && add_bio(card));
326}
327
328static inline void reset_page(struct mm_page *page)
329{
330 page->cnt = 0;
331 page->headcnt = 0;
332 page->bio = NULL;
458cf5e9 333 page->biotail = &page->bio;
1da177e4
LT
334}
335
165125e1 336static void mm_unplug_device(struct request_queue *q)
1da177e4
LT
337{
338 struct cardinfo *card = q->queuedata;
339 unsigned long flags;
340
341 spin_lock_irqsave(&card->lock, flags);
342 if (blk_remove_plug(q))
343 activate(card);
344 spin_unlock_irqrestore(&card->lock, flags);
345}
346
4e953a21 347/*
1da177e4
LT
348 * If there is room on Ready page, take
349 * one bh off list and add it.
350 * return 1 if there was room, else 0.
351 */
352static int add_bio(struct cardinfo *card)
353{
354 struct mm_page *p;
355 struct mm_dma_desc *desc;
356 dma_addr_t dma_handle;
357 int offset;
358 struct bio *bio;
eea9befa
N
359 struct bio_vec *vec;
360 int idx;
1da177e4
LT
361 int rw;
362 int len;
363
364 bio = card->currentbio;
365 if (!bio && card->bio) {
366 card->currentbio = card->bio;
eea9befa
N
367 card->current_idx = card->bio->bi_idx;
368 card->current_sector = card->bio->bi_sector;
1da177e4
LT
369 card->bio = card->bio->bi_next;
370 if (card->bio == NULL)
371 card->biotail = &card->bio;
372 card->currentbio->bi_next = NULL;
373 return 1;
374 }
375 if (!bio)
376 return 0;
eea9befa 377 idx = card->current_idx;
1da177e4
LT
378
379 rw = bio_rw(bio);
380 if (card->mm_pages[card->Ready].cnt >= DESC_PER_PAGE)
381 return 0;
382
eea9befa
N
383 vec = bio_iovec_idx(bio, idx);
384 len = vec->bv_len;
385 dma_handle = pci_map_page(card->dev,
386 vec->bv_page,
387 vec->bv_offset,
1da177e4 388 len,
458cf5e9 389 (rw == READ) ?
1da177e4
LT
390 PCI_DMA_FROMDEVICE : PCI_DMA_TODEVICE);
391
392 p = &card->mm_pages[card->Ready];
393 desc = &p->desc[p->cnt];
394 p->cnt++;
eea9befa
N
395 if (p->bio == NULL)
396 p->idx = idx;
1da177e4
LT
397 if ((p->biotail) != &bio->bi_next) {
398 *(p->biotail) = bio;
399 p->biotail = &(bio->bi_next);
400 bio->bi_next = NULL;
401 }
402
403 desc->data_dma_handle = dma_handle;
404
405 desc->pci_addr = cpu_to_le64((u64)desc->data_dma_handle);
eea9befa 406 desc->local_addr = cpu_to_le64(card->current_sector << 9);
1da177e4 407 desc->transfer_size = cpu_to_le32(len);
458cf5e9 408 offset = (((char *)&desc->sem_control_bits) - ((char *)p->desc));
1da177e4
LT
409 desc->sem_addr = cpu_to_le64((u64)(p->page_dma+offset));
410 desc->zero1 = desc->zero2 = 0;
458cf5e9 411 offset = (((char *)(desc+1)) - ((char *)p->desc));
1da177e4
LT
412 desc->next_desc_addr = cpu_to_le64(p->page_dma+offset);
413 desc->control_bits = cpu_to_le32(DMASCR_GO|DMASCR_ERR_INT_EN|
414 DMASCR_PARITY_INT_EN|
415 DMASCR_CHAIN_EN |
416 DMASCR_SEM_EN |
417 pci_cmds);
418 if (rw == WRITE)
419 desc->control_bits |= cpu_to_le32(DMASCR_TRANSFER_READ);
420 desc->sem_control_bits = desc->control_bits;
421
eea9befa
N
422 card->current_sector += (len >> 9);
423 idx++;
424 card->current_idx = idx;
425 if (idx >= bio->bi_vcnt)
1da177e4
LT
426 card->currentbio = NULL;
427
428 return 1;
429}
430
431static void process_page(unsigned long data)
432{
433 /* check if any of the requests in the page are DMA_COMPLETE,
434 * and deal with them appropriately.
435 * If we find a descriptor without DMA_COMPLETE in the semaphore, then
458cf5e9
RD
436 * dma must have hit an error on that descriptor, so use dma_status
437 * instead and assume that all following descriptors must be re-tried.
1da177e4
LT
438 */
439 struct mm_page *page;
458cf5e9 440 struct bio *return_bio = NULL;
1da177e4
LT
441 struct cardinfo *card = (struct cardinfo *)data;
442 unsigned int dma_status = card->dma_status;
443
444 spin_lock_bh(&card->lock);
445 if (card->Active < 0)
446 goto out_unlock;
447 page = &card->mm_pages[card->Active];
4e953a21 448
1da177e4
LT
449 while (page->headcnt < page->cnt) {
450 struct bio *bio = page->bio;
451 struct mm_dma_desc *desc = &page->desc[page->headcnt];
452 int control = le32_to_cpu(desc->sem_control_bits);
458cf5e9 453 int last = 0;
1da177e4
LT
454 int idx;
455
456 if (!(control & DMASCR_DMA_COMPLETE)) {
457 control = dma_status;
458cf5e9 458 last = 1;
1da177e4
LT
459 }
460 page->headcnt++;
eea9befa
N
461 idx = page->idx;
462 page->idx++;
463 if (page->idx >= bio->bi_vcnt) {
1da177e4 464 page->bio = bio->bi_next;
794e64d5
NB
465 if (page->bio)
466 page->idx = page->bio->bi_idx;
eea9befa 467 }
1da177e4 468
4e953a21 469 pci_unmap_page(card->dev, desc->data_dma_handle,
458cf5e9
RD
470 bio_iovec_idx(bio, idx)->bv_len,
471 (control & DMASCR_TRANSFER_READ) ?
1da177e4
LT
472 PCI_DMA_TODEVICE : PCI_DMA_FROMDEVICE);
473 if (control & DMASCR_HARD_ERROR) {
474 /* error */
475 clear_bit(BIO_UPTODATE, &bio->bi_flags);
4e0af881
JG
476 dev_printk(KERN_WARNING, &card->dev->dev,
477 "I/O error on sector %d/%d\n",
478 le32_to_cpu(desc->local_addr)>>9,
479 le32_to_cpu(desc->transfer_size));
1da177e4
LT
480 dump_dmastat(card, control);
481 } else if (test_bit(BIO_RW, &bio->bi_rw) &&
458cf5e9
RD
482 le32_to_cpu(desc->local_addr) >> 9 ==
483 card->init_size) {
484 card->init_size += le32_to_cpu(desc->transfer_size) >> 9;
485 if (card->init_size >> 1 >= card->mm_size) {
4e0af881
JG
486 dev_printk(KERN_INFO, &card->dev->dev,
487 "memory now initialised\n");
1da177e4
LT
488 set_userbit(card, MEMORY_INITIALIZED, 1);
489 }
490 }
491 if (bio != page->bio) {
492 bio->bi_next = return_bio;
493 return_bio = bio;
494 }
495
458cf5e9
RD
496 if (last)
497 break;
1da177e4
LT
498 }
499
500 if (debug & DEBUG_LED_ON_TRANSFER)
501 set_led(card, LED_REMOVE, LED_OFF);
502
503 if (card->check_batteries) {
504 card->check_batteries = 0;
505 check_batteries(card);
506 }
507 if (page->headcnt >= page->cnt) {
508 reset_page(page);
509 card->Active = -1;
510 activate(card);
511 } else {
512 /* haven't finished with this one yet */
46308c0b 513 pr_debug("do some more\n");
1da177e4
LT
514 mm_start_io(card);
515 }
516 out_unlock:
517 spin_unlock_bh(&card->lock);
518
458cf5e9 519 while (return_bio) {
1da177e4
LT
520 struct bio *bio = return_bio;
521
522 return_bio = bio->bi_next;
523 bio->bi_next = NULL;
6712ecf8 524 bio_endio(bio, 0);
1da177e4
LT
525 }
526}
527
165125e1 528static int mm_make_request(struct request_queue *q, struct bio *bio)
1da177e4
LT
529{
530 struct cardinfo *card = q->queuedata;
f2b9ecc4
ZB
531 pr_debug("mm_make_request %llu %u\n",
532 (unsigned long long)bio->bi_sector, bio->bi_size);
1da177e4 533
1da177e4
LT
534 spin_lock_irq(&card->lock);
535 *card->biotail = bio;
536 bio->bi_next = NULL;
537 card->biotail = &bio->bi_next;
538 blk_plug_device(q);
539 spin_unlock_irq(&card->lock);
540
541 return 0;
542}
543
7d12e780 544static irqreturn_t mm_interrupt(int irq, void *__card)
1da177e4
LT
545{
546 struct cardinfo *card = (struct cardinfo *) __card;
547 unsigned int dma_status;
548 unsigned short cfg_status;
549
550HW_TRACE(0x30);
551
552 dma_status = le32_to_cpu(readl(card->csr_remap + DMA_STATUS_CTRL));
553
554 if (!(dma_status & (DMASCR_ERROR_MASK | DMASCR_CHAIN_COMPLETE))) {
555 /* interrupt wasn't for me ... */
556 return IRQ_NONE;
458cf5e9 557 }
1da177e4
LT
558
559 /* clear COMPLETION interrupts */
560 if (card->flags & UM_FLAG_NO_BYTE_STATUS)
561 writel(cpu_to_le32(DMASCR_DMA_COMPLETE|DMASCR_CHAIN_COMPLETE),
458cf5e9 562 card->csr_remap + DMA_STATUS_CTRL);
1da177e4
LT
563 else
564 writeb((DMASCR_DMA_COMPLETE|DMASCR_CHAIN_COMPLETE) >> 16,
458cf5e9 565 card->csr_remap + DMA_STATUS_CTRL + 2);
4e953a21 566
1da177e4
LT
567 /* log errors and clear interrupt status */
568 if (dma_status & DMASCR_ANY_ERR) {
569 unsigned int data_log1, data_log2;
570 unsigned int addr_log1, addr_log2;
571 unsigned char stat, count, syndrome, check;
572
573 stat = readb(card->csr_remap + MEMCTRLCMD_ERRSTATUS);
574
458cf5e9
RD
575 data_log1 = le32_to_cpu(readl(card->csr_remap +
576 ERROR_DATA_LOG));
577 data_log2 = le32_to_cpu(readl(card->csr_remap +
578 ERROR_DATA_LOG + 4));
579 addr_log1 = le32_to_cpu(readl(card->csr_remap +
580 ERROR_ADDR_LOG));
1da177e4
LT
581 addr_log2 = readb(card->csr_remap + ERROR_ADDR_LOG + 4);
582
583 count = readb(card->csr_remap + ERROR_COUNT);
584 syndrome = readb(card->csr_remap + ERROR_SYNDROME);
585 check = readb(card->csr_remap + ERROR_CHECK);
586
587 dump_dmastat(card, dma_status);
588
589 if (stat & 0x01)
4e0af881
JG
590 dev_printk(KERN_ERR, &card->dev->dev,
591 "Memory access error detected (err count %d)\n",
592 count);
1da177e4 593 if (stat & 0x02)
4e0af881
JG
594 dev_printk(KERN_ERR, &card->dev->dev,
595 "Multi-bit EDC error\n");
1da177e4 596
4e0af881
JG
597 dev_printk(KERN_ERR, &card->dev->dev,
598 "Fault Address 0x%02x%08x, Fault Data 0x%08x%08x\n",
599 addr_log2, addr_log1, data_log2, data_log1);
600 dev_printk(KERN_ERR, &card->dev->dev,
601 "Fault Check 0x%02x, Fault Syndrome 0x%02x\n",
602 check, syndrome);
1da177e4
LT
603
604 writeb(0, card->csr_remap + ERROR_COUNT);
605 }
606
607 if (dma_status & DMASCR_PARITY_ERR_REP) {
4e0af881
JG
608 dev_printk(KERN_ERR, &card->dev->dev,
609 "PARITY ERROR REPORTED\n");
1da177e4
LT
610 pci_read_config_word(card->dev, PCI_STATUS, &cfg_status);
611 pci_write_config_word(card->dev, PCI_STATUS, cfg_status);
612 }
613
614 if (dma_status & DMASCR_PARITY_ERR_DET) {
4e0af881
JG
615 dev_printk(KERN_ERR, &card->dev->dev,
616 "PARITY ERROR DETECTED\n");
1da177e4
LT
617 pci_read_config_word(card->dev, PCI_STATUS, &cfg_status);
618 pci_write_config_word(card->dev, PCI_STATUS, cfg_status);
619 }
620
621 if (dma_status & DMASCR_SYSTEM_ERR_SIG) {
4e0af881 622 dev_printk(KERN_ERR, &card->dev->dev, "SYSTEM ERROR\n");
1da177e4
LT
623 pci_read_config_word(card->dev, PCI_STATUS, &cfg_status);
624 pci_write_config_word(card->dev, PCI_STATUS, cfg_status);
625 }
626
627 if (dma_status & DMASCR_TARGET_ABT) {
4e0af881 628 dev_printk(KERN_ERR, &card->dev->dev, "TARGET ABORT\n");
1da177e4
LT
629 pci_read_config_word(card->dev, PCI_STATUS, &cfg_status);
630 pci_write_config_word(card->dev, PCI_STATUS, cfg_status);
631 }
632
633 if (dma_status & DMASCR_MASTER_ABT) {
4e0af881 634 dev_printk(KERN_ERR, &card->dev->dev, "MASTER ABORT\n");
1da177e4
LT
635 pci_read_config_word(card->dev, PCI_STATUS, &cfg_status);
636 pci_write_config_word(card->dev, PCI_STATUS, cfg_status);
637 }
638
639 /* and process the DMA descriptors */
640 card->dma_status = dma_status;
641 tasklet_schedule(&card->tasklet);
642
643HW_TRACE(0x36);
644
4e953a21 645 return IRQ_HANDLED;
1da177e4 646}
458cf5e9 647
1da177e4
LT
648/*
649 * If both batteries are good, no LED
650 * If either battery has been warned, solid LED
651 * If both batteries are bad, flash the LED quickly
652 * If either battery is bad, flash the LED semi quickly
653 */
654static void set_fault_to_battery_status(struct cardinfo *card)
655{
656 if (card->battery[0].good && card->battery[1].good)
657 set_led(card, LED_FAULT, LED_OFF);
658 else if (card->battery[0].warned || card->battery[1].warned)
659 set_led(card, LED_FAULT, LED_ON);
660 else if (!card->battery[0].good && !card->battery[1].good)
661 set_led(card, LED_FAULT, LED_FLASH_7_0);
662 else
663 set_led(card, LED_FAULT, LED_FLASH_3_5);
664}
665
666static void init_battery_timer(void);
667
1da177e4
LT
668static int check_battery(struct cardinfo *card, int battery, int status)
669{
670 if (status != card->battery[battery].good) {
671 card->battery[battery].good = !card->battery[battery].good;
672 card->battery[battery].last_change = jiffies;
673
674 if (card->battery[battery].good) {
4e0af881
JG
675 dev_printk(KERN_ERR, &card->dev->dev,
676 "Battery %d now good\n", battery + 1);
1da177e4
LT
677 card->battery[battery].warned = 0;
678 } else
4e0af881
JG
679 dev_printk(KERN_ERR, &card->dev->dev,
680 "Battery %d now FAILED\n", battery + 1);
1da177e4
LT
681
682 return 1;
683 } else if (!card->battery[battery].good &&
684 !card->battery[battery].warned &&
685 time_after_eq(jiffies, card->battery[battery].last_change +
686 (HZ * 60 * 60 * 5))) {
4e0af881
JG
687 dev_printk(KERN_ERR, &card->dev->dev,
688 "Battery %d still FAILED after 5 hours\n", battery + 1);
1da177e4
LT
689 card->battery[battery].warned = 1;
690
691 return 1;
692 }
693
694 return 0;
695}
458cf5e9 696
1da177e4
LT
697static void check_batteries(struct cardinfo *card)
698{
699 /* NOTE: this must *never* be called while the card
700 * is doing (bus-to-card) DMA, or you will need the
701 * reset switch
702 */
703 unsigned char status;
704 int ret1, ret2;
705
706 status = readb(card->csr_remap + MEMCTRLSTATUS_BATTERY);
707 if (debug & DEBUG_BATTERY_POLLING)
4e0af881
JG
708 dev_printk(KERN_DEBUG, &card->dev->dev,
709 "checking battery status, 1 = %s, 2 = %s\n",
1da177e4
LT
710 (status & BATTERY_1_FAILURE) ? "FAILURE" : "OK",
711 (status & BATTERY_2_FAILURE) ? "FAILURE" : "OK");
712
713 ret1 = check_battery(card, 0, !(status & BATTERY_1_FAILURE));
714 ret2 = check_battery(card, 1, !(status & BATTERY_2_FAILURE));
715
716 if (ret1 || ret2)
717 set_fault_to_battery_status(card);
718}
719
720static void check_all_batteries(unsigned long ptr)
721{
722 int i;
723
4e953a21 724 for (i = 0; i < num_cards; i++)
1da177e4
LT
725 if (!(cards[i].flags & UM_FLAG_NO_BATT)) {
726 struct cardinfo *card = &cards[i];
727 spin_lock_bh(&card->lock);
728 if (card->Active >= 0)
729 card->check_batteries = 1;
730 else
731 check_batteries(card);
732 spin_unlock_bh(&card->lock);
733 }
734
735 init_battery_timer();
736}
458cf5e9 737
1da177e4
LT
738static void init_battery_timer(void)
739{
740 init_timer(&battery_timer);
741 battery_timer.function = check_all_batteries;
742 battery_timer.expires = jiffies + (HZ * 60);
743 add_timer(&battery_timer);
744}
458cf5e9 745
1da177e4
LT
746static void del_battery_timer(void)
747{
748 del_timer(&battery_timer);
749}
458cf5e9 750
1da177e4
LT
751/*
752 * Note no locks taken out here. In a worst case scenario, we could drop
753 * a chunk of system memory. But that should never happen, since validation
754 * happens at open or mount time, when locks are held.
755 *
756 * That's crap, since doing that while some partitions are opened
757 * or mounted will give you really nasty results.
758 */
759static int mm_revalidate(struct gendisk *disk)
760{
761 struct cardinfo *card = disk->private_data;
762 set_capacity(disk, card->mm_size << 1);
763 return 0;
764}
a885c8c4
CH
765
766static int mm_getgeo(struct block_device *bdev, struct hd_geometry *geo)
1da177e4 767{
a885c8c4
CH
768 struct cardinfo *card = bdev->bd_disk->private_data;
769 int size = card->mm_size * (1024 / MM_HARDSECT);
1da177e4 770
a885c8c4
CH
771 /*
772 * get geometry: we have to fake one... trim the size to a
773 * multiple of 2048 (1M): tell we have 32 sectors, 64 heads,
774 * whatever cylinders.
775 */
776 geo->heads = 64;
777 geo->sectors = 32;
778 geo->cylinders = size / (geo->heads * geo->sectors);
779 return 0;
1da177e4 780}
a885c8c4 781
1da177e4 782/*
458cf5e9
RD
783 * Future support for removable devices
784 */
1da177e4
LT
785static int mm_check_change(struct gendisk *disk)
786{
787/* struct cardinfo *dev = disk->private_data; */
788 return 0;
789}
458cf5e9 790
83d5cde4 791static const struct block_device_operations mm_fops = {
1da177e4 792 .owner = THIS_MODULE,
a885c8c4 793 .getgeo = mm_getgeo,
458cf5e9 794 .revalidate_disk = mm_revalidate,
1da177e4
LT
795 .media_changed = mm_check_change,
796};
458cf5e9
RD
797
798static int __devinit mm_pci_probe(struct pci_dev *dev,
799 const struct pci_device_id *id)
1da177e4
LT
800{
801 int ret = -ENODEV;
802 struct cardinfo *card = &cards[num_cards];
803 unsigned char mem_present;
804 unsigned char batt_status;
805 unsigned int saved_bar, data;
ee4a7b68
JG
806 unsigned long csr_base;
807 unsigned long csr_len;
1da177e4 808 int magic_number;
4e0af881
JG
809 static int printed_version;
810
811 if (!printed_version++)
812 printk(KERN_INFO DRIVER_VERSION " : " DRIVER_DESC "\n");
1da177e4 813
ee4a7b68
JG
814 ret = pci_enable_device(dev);
815 if (ret)
816 return ret;
1da177e4
LT
817
818 pci_write_config_byte(dev, PCI_LATENCY_TIMER, 0xF8);
819 pci_set_master(dev);
820
821 card->dev = dev;
1da177e4 822
ee4a7b68
JG
823 csr_base = pci_resource_start(dev, 0);
824 csr_len = pci_resource_len(dev, 0);
825 if (!csr_base || !csr_len)
826 return -ENODEV;
1da177e4 827
4e0af881 828 dev_printk(KERN_INFO, &dev->dev,
458cf5e9 829 "Micro Memory(tm) controller found (PCI Mem Module (Battery Backup))\n");
1da177e4 830
6a35528a 831 if (pci_set_dma_mask(dev, DMA_BIT_MASK(64)) &&
284901a9 832 pci_set_dma_mask(dev, DMA_BIT_MASK(32))) {
4e0af881 833 dev_printk(KERN_WARNING, &dev->dev, "NO suitable DMA found\n");
1da177e4
LT
834 return -ENOMEM;
835 }
ee4a7b68
JG
836
837 ret = pci_request_regions(dev, DRIVER_NAME);
838 if (ret) {
4e0af881
JG
839 dev_printk(KERN_ERR, &card->dev->dev,
840 "Unable to request memory region\n");
1da177e4
LT
841 goto failed_req_csr;
842 }
843
ee4a7b68 844 card->csr_remap = ioremap_nocache(csr_base, csr_len);
1da177e4 845 if (!card->csr_remap) {
4e0af881
JG
846 dev_printk(KERN_ERR, &card->dev->dev,
847 "Unable to remap memory region\n");
1da177e4
LT
848 ret = -ENOMEM;
849
850 goto failed_remap_csr;
851 }
852
4e0af881
JG
853 dev_printk(KERN_INFO, &card->dev->dev,
854 "CSR 0x%08lx -> 0x%p (0x%lx)\n",
ee4a7b68 855 csr_base, card->csr_remap, csr_len);
1da177e4 856
458cf5e9 857 switch (card->dev->device) {
1da177e4
LT
858 case 0x5415:
859 card->flags |= UM_FLAG_NO_BYTE_STATUS | UM_FLAG_NO_BATTREG;
860 magic_number = 0x59;
861 break;
862
863 case 0x5425:
864 card->flags |= UM_FLAG_NO_BYTE_STATUS;
865 magic_number = 0x5C;
866 break;
867
868 case 0x6155:
458cf5e9
RD
869 card->flags |= UM_FLAG_NO_BYTE_STATUS |
870 UM_FLAG_NO_BATTREG | UM_FLAG_NO_BATT;
1da177e4
LT
871 magic_number = 0x99;
872 break;
873
874 default:
875 magic_number = 0x100;
876 break;
877 }
878
879 if (readb(card->csr_remap + MEMCTRLSTATUS_MAGIC) != magic_number) {
4e0af881 880 dev_printk(KERN_ERR, &card->dev->dev, "Magic number invalid\n");
1da177e4
LT
881 ret = -ENOMEM;
882 goto failed_magic;
883 }
884
885 card->mm_pages[0].desc = pci_alloc_consistent(card->dev,
458cf5e9
RD
886 PAGE_SIZE * 2,
887 &card->mm_pages[0].page_dma);
1da177e4 888 card->mm_pages[1].desc = pci_alloc_consistent(card->dev,
458cf5e9
RD
889 PAGE_SIZE * 2,
890 &card->mm_pages[1].page_dma);
1da177e4
LT
891 if (card->mm_pages[0].desc == NULL ||
892 card->mm_pages[1].desc == NULL) {
4e0af881 893 dev_printk(KERN_ERR, &card->dev->dev, "alloc failed\n");
1da177e4
LT
894 goto failed_alloc;
895 }
896 reset_page(&card->mm_pages[0]);
897 reset_page(&card->mm_pages[1]);
898 card->Ready = 0; /* page 0 is ready */
899 card->Active = -1; /* no page is active */
900 card->bio = NULL;
901 card->biotail = &card->bio;
902
903 card->queue = blk_alloc_queue(GFP_KERNEL);
904 if (!card->queue)
905 goto failed_alloc;
906
907 blk_queue_make_request(card->queue, mm_make_request);
f3c737de 908 card->queue->queue_lock = &card->lock;
1da177e4
LT
909 card->queue->queuedata = card;
910 card->queue->unplug_fn = mm_unplug_device;
911
912 tasklet_init(&card->tasklet, process_page, (unsigned long)card);
913
914 card->check_batteries = 0;
4e953a21 915
1da177e4
LT
916 mem_present = readb(card->csr_remap + MEMCTRLSTATUS_MEMORY);
917 switch (mem_present) {
918 case MEM_128_MB:
919 card->mm_size = 1024 * 128;
920 break;
921 case MEM_256_MB:
922 card->mm_size = 1024 * 256;
923 break;
924 case MEM_512_MB:
925 card->mm_size = 1024 * 512;
926 break;
927 case MEM_1_GB:
928 card->mm_size = 1024 * 1024;
929 break;
930 case MEM_2_GB:
931 card->mm_size = 1024 * 2048;
932 break;
933 default:
934 card->mm_size = 0;
935 break;
936 }
937
938 /* Clear the LED's we control */
939 set_led(card, LED_REMOVE, LED_OFF);
940 set_led(card, LED_FAULT, LED_OFF);
941
942 batt_status = readb(card->csr_remap + MEMCTRLSTATUS_BATTERY);
943
944 card->battery[0].good = !(batt_status & BATTERY_1_FAILURE);
945 card->battery[1].good = !(batt_status & BATTERY_2_FAILURE);
946 card->battery[0].last_change = card->battery[1].last_change = jiffies;
947
4e953a21 948 if (card->flags & UM_FLAG_NO_BATT)
4e0af881
JG
949 dev_printk(KERN_INFO, &card->dev->dev,
950 "Size %d KB\n", card->mm_size);
1da177e4 951 else {
4e0af881
JG
952 dev_printk(KERN_INFO, &card->dev->dev,
953 "Size %d KB, Battery 1 %s (%s), Battery 2 %s (%s)\n",
954 card->mm_size,
458cf5e9 955 batt_status & BATTERY_1_DISABLED ? "Disabled" : "Enabled",
1da177e4 956 card->battery[0].good ? "OK" : "FAILURE",
458cf5e9 957 batt_status & BATTERY_2_DISABLED ? "Disabled" : "Enabled",
1da177e4
LT
958 card->battery[1].good ? "OK" : "FAILURE");
959
960 set_fault_to_battery_status(card);
961 }
962
963 pci_read_config_dword(dev, PCI_BASE_ADDRESS_1, &saved_bar);
964 data = 0xffffffff;
965 pci_write_config_dword(dev, PCI_BASE_ADDRESS_1, data);
966 pci_read_config_dword(dev, PCI_BASE_ADDRESS_1, &data);
967 pci_write_config_dword(dev, PCI_BASE_ADDRESS_1, saved_bar);
968 data &= 0xfffffff0;
969 data = ~data;
970 data += 1;
971
458cf5e9
RD
972 if (request_irq(dev->irq, mm_interrupt, IRQF_SHARED, DRIVER_NAME,
973 card)) {
4e0af881
JG
974 dev_printk(KERN_ERR, &card->dev->dev,
975 "Unable to allocate IRQ\n");
1da177e4 976 ret = -ENODEV;
1da177e4
LT
977 goto failed_req_irq;
978 }
979
4e0af881 980 dev_printk(KERN_INFO, &card->dev->dev,
ee4a7b68 981 "Window size %d bytes, IRQ %d\n", data, dev->irq);
1da177e4 982
458cf5e9 983 spin_lock_init(&card->lock);
1da177e4
LT
984
985 pci_set_drvdata(dev, card);
986
987 if (pci_write_cmd != 0x0F) /* If not Memory Write & Invalidate */
988 pci_write_cmd = 0x07; /* then Memory Write command */
989
990 if (pci_write_cmd & 0x08) { /* use Memory Write and Invalidate */
991 unsigned short cfg_command;
992 pci_read_config_word(dev, PCI_COMMAND, &cfg_command);
993 cfg_command |= 0x10; /* Memory Write & Invalidate Enable */
994 pci_write_config_word(dev, PCI_COMMAND, cfg_command);
995 }
996 pci_cmds = (pci_read_cmd << 28) | (pci_write_cmd << 24);
997
998 num_cards++;
999
1000 if (!get_userbit(card, MEMORY_INITIALIZED)) {
4e0af881 1001 dev_printk(KERN_INFO, &card->dev->dev,
458cf5e9 1002 "memory NOT initialized. Consider over-writing whole device.\n");
1da177e4
LT
1003 card->init_size = 0;
1004 } else {
4e0af881
JG
1005 dev_printk(KERN_INFO, &card->dev->dev,
1006 "memory already initialized\n");
1da177e4
LT
1007 card->init_size = card->mm_size;
1008 }
1009
1010 /* Enable ECC */
1011 writeb(EDC_STORE_CORRECT, card->csr_remap + MEMCTRLCMD_ERRCTRL);
1012
1013 return 0;
1014
1015 failed_req_irq:
1016 failed_alloc:
1017 if (card->mm_pages[0].desc)
1018 pci_free_consistent(card->dev, PAGE_SIZE*2,
1019 card->mm_pages[0].desc,
1020 card->mm_pages[0].page_dma);
1021 if (card->mm_pages[1].desc)
1022 pci_free_consistent(card->dev, PAGE_SIZE*2,
1023 card->mm_pages[1].desc,
1024 card->mm_pages[1].page_dma);
1025 failed_magic:
1da177e4
LT
1026 iounmap(card->csr_remap);
1027 failed_remap_csr:
ee4a7b68 1028 pci_release_regions(dev);
1da177e4
LT
1029 failed_req_csr:
1030
1031 return ret;
1032}
458cf5e9 1033
1da177e4
LT
1034static void mm_pci_remove(struct pci_dev *dev)
1035{
1036 struct cardinfo *card = pci_get_drvdata(dev);
1037
1038 tasklet_kill(&card->tasklet);
ee4a7b68 1039 free_irq(dev->irq, card);
1da177e4 1040 iounmap(card->csr_remap);
1da177e4
LT
1041
1042 if (card->mm_pages[0].desc)
1043 pci_free_consistent(card->dev, PAGE_SIZE*2,
1044 card->mm_pages[0].desc,
1045 card->mm_pages[0].page_dma);
1046 if (card->mm_pages[1].desc)
1047 pci_free_consistent(card->dev, PAGE_SIZE*2,
1048 card->mm_pages[1].desc,
1049 card->mm_pages[1].page_dma);
1312f40e 1050 blk_cleanup_queue(card->queue);
ee4a7b68
JG
1051
1052 pci_release_regions(dev);
1053 pci_disable_device(dev);
1da177e4
LT
1054}
1055
5874c18b 1056static const struct pci_device_id mm_pci_ids[] = {
458cf5e9
RD
1057 {PCI_DEVICE(PCI_VENDOR_ID_MICRO_MEMORY, PCI_DEVICE_ID_MICRO_MEMORY_5415CN)},
1058 {PCI_DEVICE(PCI_VENDOR_ID_MICRO_MEMORY, PCI_DEVICE_ID_MICRO_MEMORY_5425CN)},
1059 {PCI_DEVICE(PCI_VENDOR_ID_MICRO_MEMORY, PCI_DEVICE_ID_MICRO_MEMORY_6155)},
5874c18b 1060 {
1da177e4
LT
1061 .vendor = 0x8086,
1062 .device = 0xB555,
458cf5e9
RD
1063 .subvendor = 0x1332,
1064 .subdevice = 0x5460,
1065 .class = 0x050000,
1066 .class_mask = 0,
5874c18b 1067 }, { /* end: all zeroes */ }
1da177e4
LT
1068};
1069
1070MODULE_DEVICE_TABLE(pci, mm_pci_ids);
1071
1072static struct pci_driver mm_pci_driver = {
ee4a7b68
JG
1073 .name = DRIVER_NAME,
1074 .id_table = mm_pci_ids,
1075 .probe = mm_pci_probe,
1076 .remove = mm_pci_remove,
1da177e4 1077};
ee4a7b68 1078
1da177e4
LT
1079static int __init mm_init(void)
1080{
1081 int retval, i;
1082 int err;
1083
9bfab8ce 1084 retval = pci_register_driver(&mm_pci_driver);
1da177e4
LT
1085 if (retval)
1086 return -ENOMEM;
1087
cb3503ca 1088 err = major_nr = register_blkdev(0, DRIVER_NAME);
5a243e0e
N
1089 if (err < 0) {
1090 pci_unregister_driver(&mm_pci_driver);
1da177e4 1091 return -EIO;
5a243e0e 1092 }
1da177e4
LT
1093
1094 for (i = 0; i < num_cards; i++) {
1095 mm_gendisk[i] = alloc_disk(1 << MM_SHIFT);
1096 if (!mm_gendisk[i])
1097 goto out;
1098 }
1099
1100 for (i = 0; i < num_cards; i++) {
1101 struct gendisk *disk = mm_gendisk[i];
1102 sprintf(disk->disk_name, "umem%c", 'a'+i);
1da177e4
LT
1103 spin_lock_init(&cards[i].lock);
1104 disk->major = major_nr;
1105 disk->first_minor = i << MM_SHIFT;
1106 disk->fops = &mm_fops;
1107 disk->private_data = &cards[i];
1108 disk->queue = cards[i].queue;
1109 set_capacity(disk, cards[i].mm_size << 1);
1110 add_disk(disk);
1111 }
1112
1113 init_battery_timer();
4e0af881 1114 printk(KERN_INFO "MM: desc_per_page = %ld\n", DESC_PER_PAGE);
1da177e4
LT
1115/* printk("mm_init: Done. 10-19-01 9:00\n"); */
1116 return 0;
1117
1118out:
5a243e0e 1119 pci_unregister_driver(&mm_pci_driver);
cb3503ca 1120 unregister_blkdev(major_nr, DRIVER_NAME);
1da177e4
LT
1121 while (i--)
1122 put_disk(mm_gendisk[i]);
1123 return -ENOMEM;
1124}
458cf5e9 1125
1da177e4
LT
1126static void __exit mm_cleanup(void)
1127{
1128 int i;
1129
1130 del_battery_timer();
1131
458cf5e9 1132 for (i = 0; i < num_cards ; i++) {
1da177e4
LT
1133 del_gendisk(mm_gendisk[i]);
1134 put_disk(mm_gendisk[i]);
1135 }
1136
1137 pci_unregister_driver(&mm_pci_driver);
1138
cb3503ca 1139 unregister_blkdev(major_nr, DRIVER_NAME);
1da177e4
LT
1140}
1141
1142module_init(mm_init);
1143module_exit(mm_cleanup);
1144
1145MODULE_AUTHOR(DRIVER_AUTHOR);
1146MODULE_DESCRIPTION(DRIVER_DESC);
1147MODULE_LICENSE("GPL");