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45051539 | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
83e81961 BYTK |
2 | /* |
3 | * Bluetooth supports for Qualcomm Atheros ROME chips | |
4 | * | |
5 | * Copyright (c) 2015 The Linux Foundation. All rights reserved. | |
83e81961 BYTK |
6 | */ |
7 | ||
8 | #define EDL_PATCH_CMD_OPCODE (0xFC00) | |
9 | #define EDL_NVM_ACCESS_OPCODE (0xFC0B) | |
5c0a1001 | 10 | #define EDL_WRITE_BD_ADDR_OPCODE (0xFC14) |
83e81961 BYTK |
11 | #define EDL_PATCH_CMD_LEN (1) |
12 | #define EDL_PATCH_VER_REQ_CMD (0x19) | |
13 | #define EDL_PATCH_TLV_REQ_CMD (0x1E) | |
14 | #define EDL_NVM_ACCESS_SET_REQ_CMD (0x01) | |
15 | #define MAX_SIZE_PER_TLV_SEGMENT (243) | |
16 | ||
17 | #define EDL_CMD_REQ_RES_EVT (0x00) | |
18 | #define EDL_PATCH_VER_RES_EVT (0x19) | |
19 | #define EDL_APP_VER_RES_EVT (0x02) | |
20 | #define EDL_TVL_DNLD_RES_EVT (0x04) | |
21 | #define EDL_CMD_EXE_STATUS_EVT (0x00) | |
22 | #define EDL_SET_BAUDRATE_RSP_EVT (0x92) | |
23 | #define EDL_NVM_ACCESS_CODE_EVT (0x0B) | |
24 | ||
25 | #define EDL_TAG_ID_HCI (17) | |
26 | #define EDL_TAG_ID_DEEP_SLEEP (27) | |
27 | ||
fa9ad876 BG |
28 | #define QCA_WCN3990_POWERON_PULSE 0xFC |
29 | #define QCA_WCN3990_POWEROFF_PULSE 0xC0 | |
30 | ||
75c98a97 | 31 | enum qca_baudrate { |
83e81961 BYTK |
32 | QCA_BAUDRATE_115200 = 0, |
33 | QCA_BAUDRATE_57600, | |
34 | QCA_BAUDRATE_38400, | |
35 | QCA_BAUDRATE_19200, | |
36 | QCA_BAUDRATE_9600, | |
37 | QCA_BAUDRATE_230400, | |
38 | QCA_BAUDRATE_250000, | |
39 | QCA_BAUDRATE_460800, | |
40 | QCA_BAUDRATE_500000, | |
41 | QCA_BAUDRATE_720000, | |
42 | QCA_BAUDRATE_921600, | |
43 | QCA_BAUDRATE_1000000, | |
44 | QCA_BAUDRATE_1250000, | |
45 | QCA_BAUDRATE_2000000, | |
46 | QCA_BAUDRATE_3000000, | |
47 | QCA_BAUDRATE_4000000, | |
48 | QCA_BAUDRATE_1600000, | |
49 | QCA_BAUDRATE_3200000, | |
50 | QCA_BAUDRATE_3500000, | |
51 | QCA_BAUDRATE_AUTO = 0xFE, | |
52 | QCA_BAUDRATE_RESERVED | |
53 | }; | |
54 | ||
6e03126a LP |
55 | enum rome_tlv_dnld_mode { |
56 | ROME_SKIP_EVT_NONE, | |
57 | ROME_SKIP_EVT_VSE, | |
58 | ROME_SKIP_EVT_CC, | |
59 | ROME_SKIP_EVT_VSE_CC | |
60 | }; | |
61 | ||
83e81961 BYTK |
62 | enum rome_tlv_type { |
63 | TLV_TYPE_PATCH = 1, | |
64 | TLV_TYPE_NVM | |
65 | }; | |
66 | ||
67 | struct rome_config { | |
68 | u8 type; | |
69 | char fwname[64]; | |
70 | uint8_t user_baud_rate; | |
6e03126a | 71 | enum rome_tlv_dnld_mode dnld_mode; |
83e81961 BYTK |
72 | }; |
73 | ||
74 | struct edl_event_hdr { | |
75 | __u8 cresp; | |
76 | __u8 rtype; | |
77 | __u8 data[0]; | |
78 | } __packed; | |
79 | ||
80 | struct rome_version { | |
81 | __le32 product_id; | |
82 | __le16 patch_ver; | |
83 | __le16 rome_ver; | |
84 | __le32 soc_id; | |
85 | } __packed; | |
86 | ||
87 | struct tlv_seg_resp { | |
88 | __u8 result; | |
89 | } __packed; | |
90 | ||
91 | struct tlv_type_patch { | |
92 | __le32 total_size; | |
93 | __le32 data_length; | |
94 | __u8 format_version; | |
95 | __u8 signature; | |
6e03126a LP |
96 | __u8 download_mode; |
97 | __u8 reserved1; | |
83e81961 BYTK |
98 | __le16 product_id; |
99 | __le16 rom_build; | |
100 | __le16 patch_version; | |
101 | __le16 reserved2; | |
102 | __le32 entry; | |
103 | } __packed; | |
104 | ||
105 | struct tlv_type_nvm { | |
106 | __le16 tag_id; | |
107 | __le16 tag_len; | |
108 | __le32 reserve1; | |
109 | __le32 reserve2; | |
110 | __u8 data[0]; | |
111 | } __packed; | |
112 | ||
113 | struct tlv_type_hdr { | |
114 | __le32 type_len; | |
115 | __u8 data[0]; | |
116 | } __packed; | |
117 | ||
aadebac4 BG |
118 | enum qca_btsoc_type { |
119 | QCA_INVALID = -1, | |
120 | QCA_AR3002, | |
121 | QCA_ROME, | |
523760b7 HB |
122 | QCA_WCN3990, |
123 | QCA_WCN3998, | |
aadebac4 BG |
124 | }; |
125 | ||
83e81961 BYTK |
126 | #if IS_ENABLED(CONFIG_BT_QCA) |
127 | ||
128 | int qca_set_bdaddr_rome(struct hci_dev *hdev, const bdaddr_t *bdaddr); | |
aadebac4 BG |
129 | int qca_uart_setup(struct hci_dev *hdev, uint8_t baudrate, |
130 | enum qca_btsoc_type soc_type, u32 soc_ver); | |
ba493d4f | 131 | int qca_read_soc_version(struct hci_dev *hdev, u32 *soc_version); |
5c0a1001 | 132 | int qca_set_bdaddr(struct hci_dev *hdev, const bdaddr_t *bdaddr); |
523760b7 HB |
133 | static inline bool qca_is_wcn399x(enum qca_btsoc_type soc_type) |
134 | { | |
135 | return soc_type == QCA_WCN3990 || soc_type == QCA_WCN3998; | |
136 | } | |
83e81961 BYTK |
137 | #else |
138 | ||
139 | static inline int qca_set_bdaddr_rome(struct hci_dev *hdev, const bdaddr_t *bdaddr) | |
140 | { | |
141 | return -EOPNOTSUPP; | |
142 | } | |
143 | ||
aadebac4 BG |
144 | static inline int qca_uart_setup(struct hci_dev *hdev, uint8_t baudrate, |
145 | enum qca_btsoc_type soc_type, u32 soc_ver) | |
ba493d4f BG |
146 | { |
147 | return -EOPNOTSUPP; | |
148 | } | |
149 | ||
150 | static inline int qca_read_soc_version(struct hci_dev *hdev, u32 *soc_version) | |
83e81961 BYTK |
151 | { |
152 | return -EOPNOTSUPP; | |
153 | } | |
154 | ||
5c0a1001 BG |
155 | static inline int qca_set_bdaddr(struct hci_dev *hdev, const bdaddr_t *bdaddr) |
156 | { | |
157 | return -EOPNOTSUPP; | |
158 | } | |
159 | ||
523760b7 HB |
160 | static inline bool qca_is_wcn399x(enum qca_btsoc_type soc_type) |
161 | { | |
162 | return false; | |
163 | } | |
83e81961 | 164 | #endif |