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Commit | Line | Data |
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16e3887f MH |
1 | /* |
2 | * | |
3 | * Bluetooth HCI UART driver for Intel devices | |
4 | * | |
5 | * Copyright (C) 2015 Intel Corporation | |
6 | * | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License as published by | |
10 | * the Free Software Foundation; either version 2 of the License, or | |
11 | * (at your option) any later version. | |
12 | * | |
13 | * This program is distributed in the hope that it will be useful, | |
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | * GNU General Public License for more details. | |
17 | * | |
18 | * You should have received a copy of the GNU General Public License | |
19 | * along with this program; if not, write to the Free Software | |
20 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
21 | * | |
22 | */ | |
23 | ||
24 | #include <linux/kernel.h> | |
25 | #include <linux/errno.h> | |
26 | #include <linux/skbuff.h> | |
ca93cee5 | 27 | #include <linux/firmware.h> |
1ab1f239 | 28 | #include <linux/module.h> |
ca93cee5 | 29 | #include <linux/wait.h> |
1ab1f239 LP |
30 | #include <linux/tty.h> |
31 | #include <linux/platform_device.h> | |
32 | #include <linux/gpio/consumer.h> | |
33 | #include <linux/acpi.h> | |
765ea3ab | 34 | #include <linux/interrupt.h> |
74cdad37 | 35 | #include <linux/pm_runtime.h> |
16e3887f MH |
36 | |
37 | #include <net/bluetooth/bluetooth.h> | |
38 | #include <net/bluetooth/hci_core.h> | |
39 | ||
40 | #include "hci_uart.h" | |
ca93cee5 LP |
41 | #include "btintel.h" |
42 | ||
43 | #define STATE_BOOTLOADER 0 | |
44 | #define STATE_DOWNLOADING 1 | |
45 | #define STATE_FIRMWARE_LOADED 2 | |
46 | #define STATE_FIRMWARE_FAILED 3 | |
47 | #define STATE_BOOTING 4 | |
b98469f4 LP |
48 | #define STATE_LPM_ENABLED 5 |
49 | #define STATE_TX_ACTIVE 6 | |
89436546 LP |
50 | #define STATE_SUSPENDED 7 |
51 | #define STATE_LPM_TRANSACTION 8 | |
b98469f4 | 52 | |
89436546 | 53 | #define HCI_LPM_WAKE_PKT 0xf0 |
b98469f4 LP |
54 | #define HCI_LPM_PKT 0xf1 |
55 | #define HCI_LPM_MAX_SIZE 10 | |
56 | #define HCI_LPM_HDR_SIZE HCI_EVENT_HDR_SIZE | |
57 | ||
58 | #define LPM_OP_TX_NOTIFY 0x00 | |
89436546 LP |
59 | #define LPM_OP_SUSPEND_ACK 0x02 |
60 | #define LPM_OP_RESUME_ACK 0x03 | |
b98469f4 | 61 | |
74cdad37 LP |
62 | #define LPM_SUSPEND_DELAY_MS 1000 |
63 | ||
b98469f4 LP |
64 | struct hci_lpm_pkt { |
65 | __u8 opcode; | |
66 | __u8 dlen; | |
67 | __u8 data[0]; | |
68 | } __packed; | |
ca93cee5 | 69 | |
1ab1f239 LP |
70 | struct intel_device { |
71 | struct list_head list; | |
72 | struct platform_device *pdev; | |
73 | struct gpio_desc *reset; | |
aa6802df LP |
74 | struct hci_uart *hu; |
75 | struct mutex hu_lock; | |
765ea3ab | 76 | int irq; |
1ab1f239 LP |
77 | }; |
78 | ||
79 | static LIST_HEAD(intel_device_list); | |
67c8bde0 | 80 | static DEFINE_MUTEX(intel_device_list_lock); |
1ab1f239 | 81 | |
ca93cee5 LP |
82 | struct intel_data { |
83 | struct sk_buff *rx_skb; | |
84 | struct sk_buff_head txq; | |
74cdad37 LP |
85 | struct work_struct busy_work; |
86 | struct hci_uart *hu; | |
ca93cee5 LP |
87 | unsigned long flags; |
88 | }; | |
89 | ||
ff289559 LP |
90 | static u8 intel_convert_speed(unsigned int speed) |
91 | { | |
92 | switch (speed) { | |
93 | case 9600: | |
94 | return 0x00; | |
95 | case 19200: | |
96 | return 0x01; | |
97 | case 38400: | |
98 | return 0x02; | |
99 | case 57600: | |
100 | return 0x03; | |
101 | case 115200: | |
102 | return 0x04; | |
103 | case 230400: | |
104 | return 0x05; | |
105 | case 460800: | |
106 | return 0x06; | |
107 | case 921600: | |
108 | return 0x07; | |
109 | case 1843200: | |
110 | return 0x08; | |
111 | case 3250000: | |
112 | return 0x09; | |
113 | case 2000000: | |
114 | return 0x0a; | |
115 | case 3000000: | |
116 | return 0x0b; | |
117 | default: | |
118 | return 0xff; | |
119 | } | |
120 | } | |
121 | ||
1ab1f239 LP |
122 | static int intel_wait_booting(struct hci_uart *hu) |
123 | { | |
124 | struct intel_data *intel = hu->priv; | |
125 | int err; | |
126 | ||
127 | err = wait_on_bit_timeout(&intel->flags, STATE_BOOTING, | |
128 | TASK_INTERRUPTIBLE, | |
129 | msecs_to_jiffies(1000)); | |
130 | ||
f0a70a04 | 131 | if (err == -EINTR) { |
f44e78a5 | 132 | bt_dev_err(hu->hdev, "Device boot interrupted"); |
1ab1f239 LP |
133 | return -EINTR; |
134 | } | |
135 | ||
136 | if (err) { | |
f44e78a5 | 137 | bt_dev_err(hu->hdev, "Device boot timeout"); |
1ab1f239 LP |
138 | return -ETIMEDOUT; |
139 | } | |
140 | ||
141 | return err; | |
142 | } | |
143 | ||
a9cb0fe4 | 144 | #ifdef CONFIG_PM |
89436546 LP |
145 | static int intel_wait_lpm_transaction(struct hci_uart *hu) |
146 | { | |
147 | struct intel_data *intel = hu->priv; | |
148 | int err; | |
149 | ||
150 | err = wait_on_bit_timeout(&intel->flags, STATE_LPM_TRANSACTION, | |
151 | TASK_INTERRUPTIBLE, | |
152 | msecs_to_jiffies(1000)); | |
153 | ||
f0a70a04 | 154 | if (err == -EINTR) { |
89436546 LP |
155 | bt_dev_err(hu->hdev, "LPM transaction interrupted"); |
156 | return -EINTR; | |
157 | } | |
158 | ||
159 | if (err) { | |
160 | bt_dev_err(hu->hdev, "LPM transaction timeout"); | |
161 | return -ETIMEDOUT; | |
162 | } | |
163 | ||
164 | return err; | |
165 | } | |
166 | ||
167 | static int intel_lpm_suspend(struct hci_uart *hu) | |
168 | { | |
169 | static const u8 suspend[] = { 0x01, 0x01, 0x01 }; | |
170 | struct intel_data *intel = hu->priv; | |
171 | struct sk_buff *skb; | |
172 | ||
173 | if (!test_bit(STATE_LPM_ENABLED, &intel->flags) || | |
174 | test_bit(STATE_SUSPENDED, &intel->flags)) | |
175 | return 0; | |
176 | ||
177 | if (test_bit(STATE_TX_ACTIVE, &intel->flags)) | |
178 | return -EAGAIN; | |
179 | ||
180 | bt_dev_dbg(hu->hdev, "Suspending"); | |
181 | ||
182 | skb = bt_skb_alloc(sizeof(suspend), GFP_KERNEL); | |
183 | if (!skb) { | |
184 | bt_dev_err(hu->hdev, "Failed to alloc memory for LPM packet"); | |
185 | return -ENOMEM; | |
186 | } | |
187 | ||
59ae1d12 | 188 | skb_put_data(skb, suspend, sizeof(suspend)); |
618e8bc2 | 189 | hci_skb_pkt_type(skb) = HCI_LPM_PKT; |
89436546 LP |
190 | |
191 | set_bit(STATE_LPM_TRANSACTION, &intel->flags); | |
192 | ||
30e945fb LP |
193 | /* LPM flow is a priority, enqueue packet at list head */ |
194 | skb_queue_head(&intel->txq, skb); | |
89436546 LP |
195 | hci_uart_tx_wakeup(hu); |
196 | ||
197 | intel_wait_lpm_transaction(hu); | |
198 | /* Even in case of failure, continue and test the suspended flag */ | |
199 | ||
200 | clear_bit(STATE_LPM_TRANSACTION, &intel->flags); | |
201 | ||
202 | if (!test_bit(STATE_SUSPENDED, &intel->flags)) { | |
203 | bt_dev_err(hu->hdev, "Device suspend error"); | |
204 | return -EINVAL; | |
205 | } | |
206 | ||
207 | bt_dev_dbg(hu->hdev, "Suspended"); | |
208 | ||
209 | hci_uart_set_flow_control(hu, true); | |
210 | ||
211 | return 0; | |
212 | } | |
213 | ||
214 | static int intel_lpm_resume(struct hci_uart *hu) | |
215 | { | |
216 | struct intel_data *intel = hu->priv; | |
217 | struct sk_buff *skb; | |
218 | ||
219 | if (!test_bit(STATE_LPM_ENABLED, &intel->flags) || | |
220 | !test_bit(STATE_SUSPENDED, &intel->flags)) | |
221 | return 0; | |
222 | ||
223 | bt_dev_dbg(hu->hdev, "Resuming"); | |
224 | ||
225 | hci_uart_set_flow_control(hu, false); | |
226 | ||
227 | skb = bt_skb_alloc(0, GFP_KERNEL); | |
228 | if (!skb) { | |
229 | bt_dev_err(hu->hdev, "Failed to alloc memory for LPM packet"); | |
230 | return -ENOMEM; | |
231 | } | |
232 | ||
618e8bc2 | 233 | hci_skb_pkt_type(skb) = HCI_LPM_WAKE_PKT; |
89436546 LP |
234 | |
235 | set_bit(STATE_LPM_TRANSACTION, &intel->flags); | |
236 | ||
30e945fb LP |
237 | /* LPM flow is a priority, enqueue packet at list head */ |
238 | skb_queue_head(&intel->txq, skb); | |
89436546 LP |
239 | hci_uart_tx_wakeup(hu); |
240 | ||
241 | intel_wait_lpm_transaction(hu); | |
242 | /* Even in case of failure, continue and test the suspended flag */ | |
243 | ||
244 | clear_bit(STATE_LPM_TRANSACTION, &intel->flags); | |
245 | ||
246 | if (test_bit(STATE_SUSPENDED, &intel->flags)) { | |
247 | bt_dev_err(hu->hdev, "Device resume error"); | |
248 | return -EINVAL; | |
249 | } | |
250 | ||
251 | bt_dev_dbg(hu->hdev, "Resumed"); | |
252 | ||
253 | return 0; | |
254 | } | |
a9cb0fe4 | 255 | #endif /* CONFIG_PM */ |
89436546 LP |
256 | |
257 | static int intel_lpm_host_wake(struct hci_uart *hu) | |
258 | { | |
259 | static const u8 lpm_resume_ack[] = { LPM_OP_RESUME_ACK, 0x00 }; | |
260 | struct intel_data *intel = hu->priv; | |
261 | struct sk_buff *skb; | |
262 | ||
263 | hci_uart_set_flow_control(hu, false); | |
264 | ||
265 | clear_bit(STATE_SUSPENDED, &intel->flags); | |
266 | ||
267 | skb = bt_skb_alloc(sizeof(lpm_resume_ack), GFP_KERNEL); | |
268 | if (!skb) { | |
269 | bt_dev_err(hu->hdev, "Failed to alloc memory for LPM packet"); | |
270 | return -ENOMEM; | |
271 | } | |
272 | ||
59ae1d12 | 273 | skb_put_data(skb, lpm_resume_ack, sizeof(lpm_resume_ack)); |
618e8bc2 | 274 | hci_skb_pkt_type(skb) = HCI_LPM_PKT; |
89436546 | 275 | |
30e945fb LP |
276 | /* LPM flow is a priority, enqueue packet at list head */ |
277 | skb_queue_head(&intel->txq, skb); | |
89436546 LP |
278 | hci_uart_tx_wakeup(hu); |
279 | ||
280 | bt_dev_dbg(hu->hdev, "Resumed by controller"); | |
281 | ||
282 | return 0; | |
283 | } | |
284 | ||
765ea3ab LP |
285 | static irqreturn_t intel_irq(int irq, void *dev_id) |
286 | { | |
287 | struct intel_device *idev = dev_id; | |
288 | ||
289 | dev_info(&idev->pdev->dev, "hci_intel irq\n"); | |
290 | ||
aa6802df LP |
291 | mutex_lock(&idev->hu_lock); |
292 | if (idev->hu) | |
293 | intel_lpm_host_wake(idev->hu); | |
294 | mutex_unlock(&idev->hu_lock); | |
295 | ||
74cdad37 LP |
296 | /* Host/Controller are now LPM resumed, trigger a new delayed suspend */ |
297 | pm_runtime_get(&idev->pdev->dev); | |
298 | pm_runtime_mark_last_busy(&idev->pdev->dev); | |
299 | pm_runtime_put_autosuspend(&idev->pdev->dev); | |
300 | ||
765ea3ab LP |
301 | return IRQ_HANDLED; |
302 | } | |
303 | ||
1ab1f239 LP |
304 | static int intel_set_power(struct hci_uart *hu, bool powered) |
305 | { | |
306 | struct list_head *p; | |
307 | int err = -ENODEV; | |
308 | ||
dcb9cfaa JH |
309 | if (!hu->tty->dev) |
310 | return err; | |
311 | ||
67c8bde0 | 312 | mutex_lock(&intel_device_list_lock); |
1ab1f239 LP |
313 | |
314 | list_for_each(p, &intel_device_list) { | |
315 | struct intel_device *idev = list_entry(p, struct intel_device, | |
316 | list); | |
317 | ||
318 | /* tty device and pdev device should share the same parent | |
319 | * which is the UART port. | |
320 | */ | |
321 | if (hu->tty->dev->parent != idev->pdev->dev.parent) | |
322 | continue; | |
323 | ||
324 | if (!idev->reset) { | |
325 | err = -ENOTSUPP; | |
326 | break; | |
327 | } | |
328 | ||
329 | BT_INFO("hu %p, Switching compatible pm device (%s) to %u", | |
330 | hu, dev_name(&idev->pdev->dev), powered); | |
331 | ||
332 | gpiod_set_value(idev->reset, powered); | |
765ea3ab | 333 | |
aa6802df LP |
334 | /* Provide to idev a hu reference which is used to run LPM |
335 | * transactions (lpm suspend/resume) from PM callbacks. | |
336 | * hu needs to be protected against concurrent removing during | |
337 | * these PM ops. | |
338 | */ | |
339 | mutex_lock(&idev->hu_lock); | |
340 | idev->hu = powered ? hu : NULL; | |
341 | mutex_unlock(&idev->hu_lock); | |
342 | ||
765ea3ab LP |
343 | if (idev->irq < 0) |
344 | break; | |
345 | ||
346 | if (powered && device_can_wakeup(&idev->pdev->dev)) { | |
347 | err = devm_request_threaded_irq(&idev->pdev->dev, | |
348 | idev->irq, NULL, | |
349 | intel_irq, | |
350 | IRQF_ONESHOT, | |
351 | "bt-host-wake", idev); | |
352 | if (err) { | |
353 | BT_ERR("hu %p, unable to allocate irq-%d", | |
354 | hu, idev->irq); | |
355 | break; | |
356 | } | |
357 | ||
358 | device_wakeup_enable(&idev->pdev->dev); | |
74cdad37 LP |
359 | |
360 | pm_runtime_set_active(&idev->pdev->dev); | |
361 | pm_runtime_use_autosuspend(&idev->pdev->dev); | |
362 | pm_runtime_set_autosuspend_delay(&idev->pdev->dev, | |
363 | LPM_SUSPEND_DELAY_MS); | |
364 | pm_runtime_enable(&idev->pdev->dev); | |
765ea3ab LP |
365 | } else if (!powered && device_may_wakeup(&idev->pdev->dev)) { |
366 | devm_free_irq(&idev->pdev->dev, idev->irq, idev); | |
367 | device_wakeup_disable(&idev->pdev->dev); | |
74cdad37 LP |
368 | |
369 | pm_runtime_disable(&idev->pdev->dev); | |
765ea3ab | 370 | } |
1ab1f239 LP |
371 | } |
372 | ||
67c8bde0 | 373 | mutex_unlock(&intel_device_list_lock); |
1ab1f239 LP |
374 | |
375 | return err; | |
376 | } | |
377 | ||
74cdad37 LP |
378 | static void intel_busy_work(struct work_struct *work) |
379 | { | |
380 | struct list_head *p; | |
381 | struct intel_data *intel = container_of(work, struct intel_data, | |
382 | busy_work); | |
383 | ||
dcb9cfaa JH |
384 | if (!intel->hu->tty->dev) |
385 | return; | |
386 | ||
74cdad37 LP |
387 | /* Link is busy, delay the suspend */ |
388 | mutex_lock(&intel_device_list_lock); | |
389 | list_for_each(p, &intel_device_list) { | |
390 | struct intel_device *idev = list_entry(p, struct intel_device, | |
391 | list); | |
392 | ||
393 | if (intel->hu->tty->dev->parent == idev->pdev->dev.parent) { | |
394 | pm_runtime_get(&idev->pdev->dev); | |
395 | pm_runtime_mark_last_busy(&idev->pdev->dev); | |
396 | pm_runtime_put_autosuspend(&idev->pdev->dev); | |
397 | break; | |
398 | } | |
399 | } | |
400 | mutex_unlock(&intel_device_list_lock); | |
401 | } | |
402 | ||
ca93cee5 LP |
403 | static int intel_open(struct hci_uart *hu) |
404 | { | |
405 | struct intel_data *intel; | |
406 | ||
407 | BT_DBG("hu %p", hu); | |
408 | ||
409 | intel = kzalloc(sizeof(*intel), GFP_KERNEL); | |
410 | if (!intel) | |
411 | return -ENOMEM; | |
412 | ||
413 | skb_queue_head_init(&intel->txq); | |
74cdad37 LP |
414 | INIT_WORK(&intel->busy_work, intel_busy_work); |
415 | ||
416 | intel->hu = hu; | |
ca93cee5 LP |
417 | |
418 | hu->priv = intel; | |
1ab1f239 LP |
419 | |
420 | if (!intel_set_power(hu, true)) | |
421 | set_bit(STATE_BOOTING, &intel->flags); | |
422 | ||
ca93cee5 LP |
423 | return 0; |
424 | } | |
425 | ||
426 | static int intel_close(struct hci_uart *hu) | |
427 | { | |
428 | struct intel_data *intel = hu->priv; | |
429 | ||
430 | BT_DBG("hu %p", hu); | |
431 | ||
74cdad37 LP |
432 | cancel_work_sync(&intel->busy_work); |
433 | ||
1ab1f239 LP |
434 | intel_set_power(hu, false); |
435 | ||
ca93cee5 LP |
436 | skb_queue_purge(&intel->txq); |
437 | kfree_skb(intel->rx_skb); | |
438 | kfree(intel); | |
439 | ||
440 | hu->priv = NULL; | |
441 | return 0; | |
442 | } | |
443 | ||
444 | static int intel_flush(struct hci_uart *hu) | |
445 | { | |
446 | struct intel_data *intel = hu->priv; | |
447 | ||
448 | BT_DBG("hu %p", hu); | |
449 | ||
450 | skb_queue_purge(&intel->txq); | |
451 | ||
452 | return 0; | |
453 | } | |
454 | ||
455 | static int inject_cmd_complete(struct hci_dev *hdev, __u16 opcode) | |
456 | { | |
457 | struct sk_buff *skb; | |
458 | struct hci_event_hdr *hdr; | |
459 | struct hci_ev_cmd_complete *evt; | |
460 | ||
f6ebfc24 | 461 | skb = bt_skb_alloc(sizeof(*hdr) + sizeof(*evt) + 1, GFP_KERNEL); |
ca93cee5 LP |
462 | if (!skb) |
463 | return -ENOMEM; | |
464 | ||
4df864c1 | 465 | hdr = skb_put(skb, sizeof(*hdr)); |
ca93cee5 LP |
466 | hdr->evt = HCI_EV_CMD_COMPLETE; |
467 | hdr->plen = sizeof(*evt) + 1; | |
468 | ||
4df864c1 | 469 | evt = skb_put(skb, sizeof(*evt)); |
ca93cee5 LP |
470 | evt->ncmd = 0x01; |
471 | evt->opcode = cpu_to_le16(opcode); | |
472 | ||
634fef61 | 473 | skb_put_u8(skb, 0x00); |
ca93cee5 | 474 | |
618e8bc2 | 475 | hci_skb_pkt_type(skb) = HCI_EVENT_PKT; |
ca93cee5 LP |
476 | |
477 | return hci_recv_frame(hdev, skb); | |
478 | } | |
479 | ||
ff289559 LP |
480 | static int intel_set_baudrate(struct hci_uart *hu, unsigned int speed) |
481 | { | |
482 | struct intel_data *intel = hu->priv; | |
483 | struct hci_dev *hdev = hu->hdev; | |
484 | u8 speed_cmd[] = { 0x06, 0xfc, 0x01, 0x00 }; | |
485 | struct sk_buff *skb; | |
1ab1f239 LP |
486 | int err; |
487 | ||
488 | /* This can be the first command sent to the chip, check | |
489 | * that the controller is ready. | |
490 | */ | |
491 | err = intel_wait_booting(hu); | |
492 | ||
493 | clear_bit(STATE_BOOTING, &intel->flags); | |
494 | ||
495 | /* In case of timeout, try to continue anyway */ | |
2be1149e | 496 | if (err && err != -ETIMEDOUT) |
1ab1f239 | 497 | return err; |
ff289559 | 498 | |
f44e78a5 | 499 | bt_dev_info(hdev, "Change controller speed to %d", speed); |
ff289559 LP |
500 | |
501 | speed_cmd[3] = intel_convert_speed(speed); | |
502 | if (speed_cmd[3] == 0xff) { | |
f44e78a5 | 503 | bt_dev_err(hdev, "Unsupported speed"); |
ff289559 LP |
504 | return -EINVAL; |
505 | } | |
506 | ||
507 | /* Device will not accept speed change if Intel version has not been | |
508 | * previously requested. | |
509 | */ | |
a0c38245 | 510 | skb = __hci_cmd_sync(hdev, 0xfc05, 0, NULL, HCI_CMD_TIMEOUT); |
ff289559 | 511 | if (IS_ERR(skb)) { |
f44e78a5 LP |
512 | bt_dev_err(hdev, "Reading Intel version information failed (%ld)", |
513 | PTR_ERR(skb)); | |
ff289559 LP |
514 | return PTR_ERR(skb); |
515 | } | |
516 | kfree_skb(skb); | |
517 | ||
518 | skb = bt_skb_alloc(sizeof(speed_cmd), GFP_KERNEL); | |
519 | if (!skb) { | |
f44e78a5 | 520 | bt_dev_err(hdev, "Failed to alloc memory for baudrate packet"); |
ff289559 LP |
521 | return -ENOMEM; |
522 | } | |
523 | ||
59ae1d12 | 524 | skb_put_data(skb, speed_cmd, sizeof(speed_cmd)); |
618e8bc2 | 525 | hci_skb_pkt_type(skb) = HCI_COMMAND_PKT; |
ff289559 LP |
526 | |
527 | hci_uart_set_flow_control(hu, true); | |
528 | ||
529 | skb_queue_tail(&intel->txq, skb); | |
530 | hci_uart_tx_wakeup(hu); | |
531 | ||
532 | /* wait 100ms to change baudrate on controller side */ | |
533 | msleep(100); | |
534 | ||
535 | hci_uart_set_baudrate(hu, speed); | |
536 | hci_uart_set_flow_control(hu, false); | |
537 | ||
538 | return 0; | |
539 | } | |
540 | ||
ca93cee5 LP |
541 | static int intel_setup(struct hci_uart *hu) |
542 | { | |
ca93cee5 LP |
543 | struct intel_data *intel = hu->priv; |
544 | struct hci_dev *hdev = hu->hdev; | |
545 | struct sk_buff *skb; | |
6c483de1 | 546 | struct intel_version ver; |
faf174d2 | 547 | struct intel_boot_params params; |
b98469f4 | 548 | struct list_head *p; |
ca93cee5 | 549 | const struct firmware *fw; |
ca93cee5 | 550 | char fwname[64]; |
e5889af6 | 551 | u32 boot_param; |
ca93cee5 LP |
552 | ktime_t calltime, delta, rettime; |
553 | unsigned long long duration; | |
ff289559 LP |
554 | unsigned int init_speed, oper_speed; |
555 | int speed_change = 0; | |
ca93cee5 LP |
556 | int err; |
557 | ||
f44e78a5 | 558 | bt_dev_dbg(hdev, "start intel_setup"); |
ca93cee5 | 559 | |
6d2e50d2 | 560 | hu->hdev->set_diag = btintel_set_diag; |
35ab8150 MH |
561 | hu->hdev->set_bdaddr = btintel_set_bdaddr; |
562 | ||
04d729b8 THJA |
563 | /* Set the default boot parameter to 0x0 and it is updated to |
564 | * SKU specific boot parameter after reading Intel_Write_Boot_Params | |
565 | * command while downloading the firmware. | |
566 | */ | |
567 | boot_param = 0x00000000; | |
e5889af6 | 568 | |
ca93cee5 LP |
569 | calltime = ktime_get(); |
570 | ||
ff289559 LP |
571 | if (hu->init_speed) |
572 | init_speed = hu->init_speed; | |
573 | else | |
574 | init_speed = hu->proto->init_speed; | |
575 | ||
576 | if (hu->oper_speed) | |
577 | oper_speed = hu->oper_speed; | |
578 | else | |
579 | oper_speed = hu->proto->oper_speed; | |
580 | ||
581 | if (oper_speed && init_speed && oper_speed != init_speed) | |
582 | speed_change = 1; | |
583 | ||
1ab1f239 LP |
584 | /* Check that the controller is ready */ |
585 | err = intel_wait_booting(hu); | |
586 | ||
587 | clear_bit(STATE_BOOTING, &intel->flags); | |
588 | ||
589 | /* In case of timeout, try to continue anyway */ | |
2be1149e | 590 | if (err && err != -ETIMEDOUT) |
1ab1f239 LP |
591 | return err; |
592 | ||
ca93cee5 LP |
593 | set_bit(STATE_BOOTLOADER, &intel->flags); |
594 | ||
595 | /* Read the Intel version information to determine if the device | |
596 | * is in bootloader mode or if it already has operational firmware | |
597 | * loaded. | |
598 | */ | |
6c483de1 LP |
599 | err = btintel_read_version(hdev, &ver); |
600 | if (err) | |
ca93cee5 | 601 | return err; |
ca93cee5 LP |
602 | |
603 | /* The hardware platform number has a fixed value of 0x37 and | |
604 | * for now only accept this single value. | |
605 | */ | |
6c483de1 | 606 | if (ver.hw_platform != 0x37) { |
f44e78a5 | 607 | bt_dev_err(hdev, "Unsupported Intel hardware platform (%u)", |
6c483de1 | 608 | ver.hw_platform); |
ca93cee5 LP |
609 | return -EINVAL; |
610 | } | |
611 | ||
9268834b THJA |
612 | /* Check for supported iBT hardware variants of this firmware |
613 | * loading method. | |
614 | * | |
615 | * This check has been put in place to ensure correct forward | |
616 | * compatibility options when newer hardware variants come along. | |
617 | */ | |
618 | switch (ver.hw_variant) { | |
619 | case 0x0b: /* LnP */ | |
620 | case 0x0c: /* WsP */ | |
6c7bb7eb | 621 | case 0x12: /* ThP */ |
9268834b THJA |
622 | break; |
623 | default: | |
f44e78a5 | 624 | bt_dev_err(hdev, "Unsupported Intel hardware variant (%u)", |
6c483de1 | 625 | ver.hw_variant); |
ca93cee5 LP |
626 | return -EINVAL; |
627 | } | |
628 | ||
6c483de1 | 629 | btintel_version_info(hdev, &ver); |
ca93cee5 LP |
630 | |
631 | /* The firmware variant determines if the device is in bootloader | |
632 | * mode or is running operational firmware. The value 0x06 identifies | |
633 | * the bootloader and the value 0x23 identifies the operational | |
634 | * firmware. | |
635 | * | |
636 | * When the operational firmware is already present, then only | |
637 | * the check for valid Bluetooth device address is needed. This | |
638 | * determines if the device will be added as configured or | |
639 | * unconfigured controller. | |
640 | * | |
641 | * It is not possible to use the Secure Boot Parameters in this | |
642 | * case since that command is only available in bootloader mode. | |
643 | */ | |
6c483de1 | 644 | if (ver.fw_variant == 0x23) { |
ca93cee5 LP |
645 | clear_bit(STATE_BOOTLOADER, &intel->flags); |
646 | btintel_check_bdaddr(hdev); | |
647 | return 0; | |
648 | } | |
649 | ||
650 | /* If the device is not in bootloader mode, then the only possible | |
651 | * choice is to return an error and abort the device initialization. | |
652 | */ | |
6c483de1 | 653 | if (ver.fw_variant != 0x06) { |
f44e78a5 | 654 | bt_dev_err(hdev, "Unsupported Intel firmware variant (%u)", |
6c483de1 | 655 | ver.fw_variant); |
ca93cee5 LP |
656 | return -ENODEV; |
657 | } | |
658 | ||
ca93cee5 LP |
659 | /* Read the secure boot parameters to identify the operating |
660 | * details of the bootloader. | |
661 | */ | |
faf174d2 THJA |
662 | err = btintel_read_boot_params(hdev, ¶ms); |
663 | if (err) | |
ca93cee5 | 664 | return err; |
ca93cee5 LP |
665 | |
666 | /* It is required that every single firmware fragment is acknowledged | |
667 | * with a command complete event. If the boot parameters indicate | |
668 | * that this bootloader does not send them, then abort the setup. | |
669 | */ | |
faf174d2 | 670 | if (params.limited_cce != 0x00) { |
f44e78a5 | 671 | bt_dev_err(hdev, "Unsupported Intel firmware loading method (%u)", |
faf174d2 | 672 | params.limited_cce); |
ca93cee5 LP |
673 | return -EINVAL; |
674 | } | |
675 | ||
676 | /* If the OTP has no valid Bluetooth device address, then there will | |
677 | * also be no valid address for the operational firmware. | |
678 | */ | |
faf174d2 | 679 | if (!bacmp(¶ms.otp_bdaddr, BDADDR_ANY)) { |
f44e78a5 | 680 | bt_dev_info(hdev, "No device address configured"); |
ca93cee5 LP |
681 | set_bit(HCI_QUIRK_INVALID_BDADDR, &hdev->quirks); |
682 | } | |
683 | ||
684 | /* With this Intel bootloader only the hardware variant and device | |
965651c1 THJA |
685 | * revision information are used to select the right firmware for SfP |
686 | * and WsP. | |
ca93cee5 | 687 | * |
b7da6a69 THJA |
688 | * The firmware filename is ibt-<hw_variant>-<dev_revid>.sfi. |
689 | * | |
690 | * Currently the supported hardware variants are: | |
691 | * 11 (0x0b) for iBT 3.0 (LnP/SfP) | |
965651c1 THJA |
692 | * 12 (0x0c) for iBT 3.5 (WsP) |
693 | * | |
694 | * For ThP/JfP and for future SKU's, the FW name varies based on HW | |
695 | * variant, HW revision and FW revision, as these are dependent on CNVi | |
696 | * and RF Combination. | |
697 | * | |
698 | * 18 (0x12) for iBT3.5 (ThP/JfP) | |
699 | * | |
700 | * The firmware file name for these will be | |
701 | * ibt-<hw_variant>-<hw_revision>-<fw_revision>.sfi. | |
702 | * | |
ca93cee5 | 703 | */ |
965651c1 THJA |
704 | switch (ver.hw_variant) { |
705 | case 0x0b: /* SfP */ | |
706 | case 0x0c: /* WsP */ | |
707 | snprintf(fwname, sizeof(fwname), "intel/ibt-%u-%u.sfi", | |
708 | le16_to_cpu(ver.hw_variant), | |
faf174d2 | 709 | le16_to_cpu(params.dev_revid)); |
965651c1 THJA |
710 | break; |
711 | case 0x12: /* ThP */ | |
712 | snprintf(fwname, sizeof(fwname), "intel/ibt-%u-%u-%u.sfi", | |
713 | le16_to_cpu(ver.hw_variant), | |
714 | le16_to_cpu(ver.hw_revision), | |
715 | le16_to_cpu(ver.fw_revision)); | |
716 | break; | |
717 | default: | |
718 | bt_dev_err(hdev, "Unsupported Intel hardware variant (%u)", | |
719 | ver.hw_variant); | |
720 | return -EINVAL; | |
721 | } | |
ca93cee5 LP |
722 | |
723 | err = request_firmware(&fw, fwname, &hdev->dev); | |
724 | if (err < 0) { | |
f44e78a5 LP |
725 | bt_dev_err(hdev, "Failed to load Intel firmware file (%d)", |
726 | err); | |
ca93cee5 LP |
727 | return err; |
728 | } | |
729 | ||
f44e78a5 | 730 | bt_dev_info(hdev, "Found device firmware: %s", fwname); |
ca93cee5 | 731 | |
1cfbabdd | 732 | /* Save the DDC file name for later */ |
965651c1 THJA |
733 | switch (ver.hw_variant) { |
734 | case 0x0b: /* SfP */ | |
735 | case 0x0c: /* WsP */ | |
736 | snprintf(fwname, sizeof(fwname), "intel/ibt-%u-%u.ddc", | |
737 | le16_to_cpu(ver.hw_variant), | |
faf174d2 | 738 | le16_to_cpu(params.dev_revid)); |
965651c1 THJA |
739 | break; |
740 | case 0x12: /* ThP */ | |
741 | snprintf(fwname, sizeof(fwname), "intel/ibt-%u-%u-%u.ddc", | |
742 | le16_to_cpu(ver.hw_variant), | |
743 | le16_to_cpu(ver.hw_revision), | |
744 | le16_to_cpu(ver.fw_revision)); | |
745 | break; | |
746 | default: | |
747 | bt_dev_err(hdev, "Unsupported Intel hardware variant (%u)", | |
748 | ver.hw_variant); | |
749 | return -EINVAL; | |
750 | } | |
1cfbabdd | 751 | |
ca93cee5 | 752 | if (fw->size < 644) { |
f44e78a5 LP |
753 | bt_dev_err(hdev, "Invalid size of firmware file (%zu)", |
754 | fw->size); | |
ca93cee5 LP |
755 | err = -EBADF; |
756 | goto done; | |
757 | } | |
758 | ||
759 | set_bit(STATE_DOWNLOADING, &intel->flags); | |
760 | ||
fbbe83c5 THJA |
761 | /* Start firmware downloading and get boot parameter */ |
762 | err = btintel_download_firmware(hdev, fw, &boot_param); | |
763 | if (err < 0) | |
ca93cee5 | 764 | goto done; |
ca93cee5 LP |
765 | |
766 | set_bit(STATE_FIRMWARE_LOADED, &intel->flags); | |
767 | ||
f44e78a5 | 768 | bt_dev_info(hdev, "Waiting for firmware download to complete"); |
ca93cee5 LP |
769 | |
770 | /* Before switching the device into operational mode and with that | |
771 | * booting the loaded firmware, wait for the bootloader notification | |
772 | * that all fragments have been successfully received. | |
773 | * | |
774 | * When the event processing receives the notification, then the | |
775 | * STATE_DOWNLOADING flag will be cleared. | |
776 | * | |
777 | * The firmware loading should not take longer than 5 seconds | |
778 | * and thus just timeout if that happens and fail the setup | |
779 | * of this device. | |
780 | */ | |
781 | err = wait_on_bit_timeout(&intel->flags, STATE_DOWNLOADING, | |
782 | TASK_INTERRUPTIBLE, | |
783 | msecs_to_jiffies(5000)); | |
f0a70a04 | 784 | if (err == -EINTR) { |
f44e78a5 | 785 | bt_dev_err(hdev, "Firmware loading interrupted"); |
ca93cee5 LP |
786 | err = -EINTR; |
787 | goto done; | |
788 | } | |
789 | ||
790 | if (err) { | |
f44e78a5 | 791 | bt_dev_err(hdev, "Firmware loading timeout"); |
ca93cee5 LP |
792 | err = -ETIMEDOUT; |
793 | goto done; | |
794 | } | |
795 | ||
796 | if (test_bit(STATE_FIRMWARE_FAILED, &intel->flags)) { | |
f44e78a5 | 797 | bt_dev_err(hdev, "Firmware loading failed"); |
ca93cee5 LP |
798 | err = -ENOEXEC; |
799 | goto done; | |
800 | } | |
801 | ||
802 | rettime = ktime_get(); | |
803 | delta = ktime_sub(rettime, calltime); | |
804 | duration = (unsigned long long) ktime_to_ns(delta) >> 10; | |
805 | ||
f44e78a5 | 806 | bt_dev_info(hdev, "Firmware loaded in %llu usecs", duration); |
ca93cee5 LP |
807 | |
808 | done: | |
809 | release_firmware(fw); | |
810 | ||
811 | if (err < 0) | |
812 | return err; | |
813 | ||
ff289559 LP |
814 | /* We need to restore the default speed before Intel reset */ |
815 | if (speed_change) { | |
816 | err = intel_set_baudrate(hu, init_speed); | |
817 | if (err) | |
818 | return err; | |
819 | } | |
820 | ||
ca93cee5 LP |
821 | calltime = ktime_get(); |
822 | ||
823 | set_bit(STATE_BOOTING, &intel->flags); | |
824 | ||
e5889af6 THJA |
825 | err = btintel_send_intel_reset(hdev, boot_param); |
826 | if (err) | |
827 | return err; | |
ca93cee5 LP |
828 | |
829 | /* The bootloader will not indicate when the device is ready. This | |
830 | * is done by the operational firmware sending bootup notification. | |
831 | * | |
832 | * Booting into operational firmware should not take longer than | |
833 | * 1 second. However if that happens, then just fail the setup | |
834 | * since something went wrong. | |
835 | */ | |
f44e78a5 | 836 | bt_dev_info(hdev, "Waiting for device to boot"); |
ca93cee5 | 837 | |
1ab1f239 LP |
838 | err = intel_wait_booting(hu); |
839 | if (err) | |
840 | return err; | |
ca93cee5 | 841 | |
1ab1f239 | 842 | clear_bit(STATE_BOOTING, &intel->flags); |
ca93cee5 LP |
843 | |
844 | rettime = ktime_get(); | |
845 | delta = ktime_sub(rettime, calltime); | |
846 | duration = (unsigned long long) ktime_to_ns(delta) >> 10; | |
847 | ||
f44e78a5 | 848 | bt_dev_info(hdev, "Device booted in %llu usecs", duration); |
ca93cee5 | 849 | |
31eff267 LP |
850 | /* Enable LPM if matching pdev with wakeup enabled, set TX active |
851 | * until further LPM TX notification. | |
852 | */ | |
67c8bde0 | 853 | mutex_lock(&intel_device_list_lock); |
b98469f4 LP |
854 | list_for_each(p, &intel_device_list) { |
855 | struct intel_device *dev = list_entry(p, struct intel_device, | |
856 | list); | |
dcb9cfaa JH |
857 | if (!hu->tty->dev) |
858 | break; | |
b98469f4 | 859 | if (hu->tty->dev->parent == dev->pdev->dev.parent) { |
31eff267 LP |
860 | if (device_may_wakeup(&dev->pdev->dev)) { |
861 | set_bit(STATE_LPM_ENABLED, &intel->flags); | |
862 | set_bit(STATE_TX_ACTIVE, &intel->flags); | |
863 | } | |
b98469f4 LP |
864 | break; |
865 | } | |
866 | } | |
67c8bde0 | 867 | mutex_unlock(&intel_device_list_lock); |
b98469f4 | 868 | |
1cfbabdd LP |
869 | /* Ignore errors, device can work without DDC parameters */ |
870 | btintel_load_ddc_config(hdev, fwname); | |
871 | ||
ff289559 LP |
872 | skb = __hci_cmd_sync(hdev, HCI_OP_RESET, 0, NULL, HCI_CMD_TIMEOUT); |
873 | if (IS_ERR(skb)) | |
874 | return PTR_ERR(skb); | |
875 | kfree_skb(skb); | |
876 | ||
877 | if (speed_change) { | |
878 | err = intel_set_baudrate(hu, oper_speed); | |
879 | if (err) | |
880 | return err; | |
881 | } | |
882 | ||
f44e78a5 | 883 | bt_dev_info(hdev, "Setup complete"); |
ff289559 | 884 | |
ca93cee5 LP |
885 | clear_bit(STATE_BOOTLOADER, &intel->flags); |
886 | ||
887 | return 0; | |
888 | } | |
889 | ||
890 | static int intel_recv_event(struct hci_dev *hdev, struct sk_buff *skb) | |
891 | { | |
892 | struct hci_uart *hu = hci_get_drvdata(hdev); | |
893 | struct intel_data *intel = hu->priv; | |
894 | struct hci_event_hdr *hdr; | |
895 | ||
1ab1f239 LP |
896 | if (!test_bit(STATE_BOOTLOADER, &intel->flags) && |
897 | !test_bit(STATE_BOOTING, &intel->flags)) | |
ca93cee5 LP |
898 | goto recv; |
899 | ||
900 | hdr = (void *)skb->data; | |
901 | ||
902 | /* When the firmware loading completes the device sends | |
903 | * out a vendor specific event indicating the result of | |
904 | * the firmware loading. | |
905 | */ | |
906 | if (skb->len == 7 && hdr->evt == 0xff && hdr->plen == 0x05 && | |
907 | skb->data[2] == 0x06) { | |
908 | if (skb->data[3] != 0x00) | |
909 | set_bit(STATE_FIRMWARE_FAILED, &intel->flags); | |
910 | ||
911 | if (test_and_clear_bit(STATE_DOWNLOADING, &intel->flags) && | |
912 | test_bit(STATE_FIRMWARE_LOADED, &intel->flags)) { | |
913 | smp_mb__after_atomic(); | |
914 | wake_up_bit(&intel->flags, STATE_DOWNLOADING); | |
915 | } | |
916 | ||
917 | /* When switching to the operational firmware the device | |
918 | * sends a vendor specific event indicating that the bootup | |
919 | * completed. | |
920 | */ | |
921 | } else if (skb->len == 9 && hdr->evt == 0xff && hdr->plen == 0x07 && | |
922 | skb->data[2] == 0x02) { | |
923 | if (test_and_clear_bit(STATE_BOOTING, &intel->flags)) { | |
924 | smp_mb__after_atomic(); | |
925 | wake_up_bit(&intel->flags, STATE_BOOTING); | |
926 | } | |
927 | } | |
928 | recv: | |
929 | return hci_recv_frame(hdev, skb); | |
930 | } | |
931 | ||
b98469f4 LP |
932 | static void intel_recv_lpm_notify(struct hci_dev *hdev, int value) |
933 | { | |
934 | struct hci_uart *hu = hci_get_drvdata(hdev); | |
935 | struct intel_data *intel = hu->priv; | |
936 | ||
f44e78a5 | 937 | bt_dev_dbg(hdev, "TX idle notification (%d)", value); |
b98469f4 | 938 | |
74cdad37 | 939 | if (value) { |
b98469f4 | 940 | set_bit(STATE_TX_ACTIVE, &intel->flags); |
74cdad37 LP |
941 | schedule_work(&intel->busy_work); |
942 | } else { | |
b98469f4 | 943 | clear_bit(STATE_TX_ACTIVE, &intel->flags); |
74cdad37 | 944 | } |
b98469f4 LP |
945 | } |
946 | ||
947 | static int intel_recv_lpm(struct hci_dev *hdev, struct sk_buff *skb) | |
948 | { | |
949 | struct hci_lpm_pkt *lpm = (void *)skb->data; | |
89436546 LP |
950 | struct hci_uart *hu = hci_get_drvdata(hdev); |
951 | struct intel_data *intel = hu->priv; | |
b98469f4 LP |
952 | |
953 | switch (lpm->opcode) { | |
954 | case LPM_OP_TX_NOTIFY: | |
1b197574 LP |
955 | if (lpm->dlen < 1) { |
956 | bt_dev_err(hu->hdev, "Invalid LPM notification packet"); | |
957 | break; | |
958 | } | |
959 | intel_recv_lpm_notify(hdev, lpm->data[0]); | |
b98469f4 | 960 | break; |
89436546 LP |
961 | case LPM_OP_SUSPEND_ACK: |
962 | set_bit(STATE_SUSPENDED, &intel->flags); | |
963 | if (test_and_clear_bit(STATE_LPM_TRANSACTION, &intel->flags)) { | |
964 | smp_mb__after_atomic(); | |
965 | wake_up_bit(&intel->flags, STATE_LPM_TRANSACTION); | |
966 | } | |
967 | break; | |
968 | case LPM_OP_RESUME_ACK: | |
969 | clear_bit(STATE_SUSPENDED, &intel->flags); | |
970 | if (test_and_clear_bit(STATE_LPM_TRANSACTION, &intel->flags)) { | |
971 | smp_mb__after_atomic(); | |
972 | wake_up_bit(&intel->flags, STATE_LPM_TRANSACTION); | |
973 | } | |
974 | break; | |
b98469f4 | 975 | default: |
f44e78a5 | 976 | bt_dev_err(hdev, "Unknown LPM opcode (%02x)", lpm->opcode); |
b98469f4 LP |
977 | break; |
978 | } | |
979 | ||
980 | kfree_skb(skb); | |
981 | ||
982 | return 0; | |
983 | } | |
984 | ||
985 | #define INTEL_RECV_LPM \ | |
986 | .type = HCI_LPM_PKT, \ | |
987 | .hlen = HCI_LPM_HDR_SIZE, \ | |
988 | .loff = 1, \ | |
989 | .lsize = 1, \ | |
990 | .maxlen = HCI_LPM_MAX_SIZE | |
991 | ||
ca93cee5 | 992 | static const struct h4_recv_pkt intel_recv_pkts[] = { |
b98469f4 LP |
993 | { H4_RECV_ACL, .recv = hci_recv_frame }, |
994 | { H4_RECV_SCO, .recv = hci_recv_frame }, | |
995 | { H4_RECV_EVENT, .recv = intel_recv_event }, | |
996 | { INTEL_RECV_LPM, .recv = intel_recv_lpm }, | |
ca93cee5 LP |
997 | }; |
998 | ||
999 | static int intel_recv(struct hci_uart *hu, const void *data, int count) | |
1000 | { | |
1001 | struct intel_data *intel = hu->priv; | |
1002 | ||
1003 | if (!test_bit(HCI_UART_REGISTERED, &hu->flags)) | |
1004 | return -EUNATCH; | |
1005 | ||
1006 | intel->rx_skb = h4_recv_buf(hu->hdev, intel->rx_skb, data, count, | |
1007 | intel_recv_pkts, | |
1008 | ARRAY_SIZE(intel_recv_pkts)); | |
1009 | if (IS_ERR(intel->rx_skb)) { | |
1010 | int err = PTR_ERR(intel->rx_skb); | |
f44e78a5 | 1011 | bt_dev_err(hu->hdev, "Frame reassembly failed (%d)", err); |
ca93cee5 LP |
1012 | intel->rx_skb = NULL; |
1013 | return err; | |
1014 | } | |
1015 | ||
1016 | return count; | |
1017 | } | |
1018 | ||
1019 | static int intel_enqueue(struct hci_uart *hu, struct sk_buff *skb) | |
1020 | { | |
1021 | struct intel_data *intel = hu->priv; | |
74cdad37 | 1022 | struct list_head *p; |
ca93cee5 LP |
1023 | |
1024 | BT_DBG("hu %p skb %p", hu, skb); | |
1025 | ||
dcb9cfaa JH |
1026 | if (!hu->tty->dev) |
1027 | goto out_enqueue; | |
1028 | ||
74cdad37 LP |
1029 | /* Be sure our controller is resumed and potential LPM transaction |
1030 | * completed before enqueuing any packet. | |
1031 | */ | |
1032 | mutex_lock(&intel_device_list_lock); | |
1033 | list_for_each(p, &intel_device_list) { | |
1034 | struct intel_device *idev = list_entry(p, struct intel_device, | |
1035 | list); | |
1036 | ||
1037 | if (hu->tty->dev->parent == idev->pdev->dev.parent) { | |
1038 | pm_runtime_get_sync(&idev->pdev->dev); | |
1039 | pm_runtime_mark_last_busy(&idev->pdev->dev); | |
1040 | pm_runtime_put_autosuspend(&idev->pdev->dev); | |
1041 | break; | |
1042 | } | |
1043 | } | |
1044 | mutex_unlock(&intel_device_list_lock); | |
dcb9cfaa | 1045 | out_enqueue: |
ca93cee5 LP |
1046 | skb_queue_tail(&intel->txq, skb); |
1047 | ||
1048 | return 0; | |
1049 | } | |
1050 | ||
1051 | static struct sk_buff *intel_dequeue(struct hci_uart *hu) | |
1052 | { | |
1053 | struct intel_data *intel = hu->priv; | |
1054 | struct sk_buff *skb; | |
1055 | ||
1056 | skb = skb_dequeue(&intel->txq); | |
1057 | if (!skb) | |
1058 | return skb; | |
1059 | ||
1060 | if (test_bit(STATE_BOOTLOADER, &intel->flags) && | |
618e8bc2 | 1061 | (hci_skb_pkt_type(skb) == HCI_COMMAND_PKT)) { |
ca93cee5 LP |
1062 | struct hci_command_hdr *cmd = (void *)skb->data; |
1063 | __u16 opcode = le16_to_cpu(cmd->opcode); | |
1064 | ||
1065 | /* When the 0xfc01 command is issued to boot into | |
1066 | * the operational firmware, it will actually not | |
1067 | * send a command complete event. To keep the flow | |
1068 | * control working inject that event here. | |
1069 | */ | |
1070 | if (opcode == 0xfc01) | |
1071 | inject_cmd_complete(hu->hdev, opcode); | |
1072 | } | |
1073 | ||
1074 | /* Prepend skb with frame type */ | |
618e8bc2 | 1075 | memcpy(skb_push(skb, 1), &hci_skb_pkt_type(skb), 1); |
ca93cee5 LP |
1076 | |
1077 | return skb; | |
1078 | } | |
1079 | ||
1080 | static const struct hci_uart_proto intel_proto = { | |
1081 | .id = HCI_UART_INTEL, | |
1082 | .name = "Intel", | |
aee61f7a | 1083 | .manufacturer = 2, |
ca93cee5 | 1084 | .init_speed = 115200, |
ff289559 | 1085 | .oper_speed = 3000000, |
ca93cee5 LP |
1086 | .open = intel_open, |
1087 | .close = intel_close, | |
1088 | .flush = intel_flush, | |
1089 | .setup = intel_setup, | |
ff289559 | 1090 | .set_baudrate = intel_set_baudrate, |
ca93cee5 LP |
1091 | .recv = intel_recv, |
1092 | .enqueue = intel_enqueue, | |
1093 | .dequeue = intel_dequeue, | |
1094 | }; | |
1095 | ||
1ab1f239 LP |
1096 | #ifdef CONFIG_ACPI |
1097 | static const struct acpi_device_id intel_acpi_match[] = { | |
1098 | { "INT33E1", 0 }, | |
1099 | { }, | |
1100 | }; | |
1101 | MODULE_DEVICE_TABLE(acpi, intel_acpi_match); | |
1ab1f239 LP |
1102 | #endif |
1103 | ||
74cdad37 | 1104 | #ifdef CONFIG_PM |
f7552473 | 1105 | static int intel_suspend_device(struct device *dev) |
aa6802df LP |
1106 | { |
1107 | struct intel_device *idev = dev_get_drvdata(dev); | |
1108 | ||
aa6802df LP |
1109 | mutex_lock(&idev->hu_lock); |
1110 | if (idev->hu) | |
1111 | intel_lpm_suspend(idev->hu); | |
1112 | mutex_unlock(&idev->hu_lock); | |
1113 | ||
1114 | return 0; | |
1115 | } | |
1116 | ||
f7552473 | 1117 | static int intel_resume_device(struct device *dev) |
aa6802df LP |
1118 | { |
1119 | struct intel_device *idev = dev_get_drvdata(dev); | |
1120 | ||
aa6802df LP |
1121 | mutex_lock(&idev->hu_lock); |
1122 | if (idev->hu) | |
1123 | intel_lpm_resume(idev->hu); | |
1124 | mutex_unlock(&idev->hu_lock); | |
1125 | ||
1126 | return 0; | |
1127 | } | |
1128 | #endif | |
1129 | ||
f7552473 LP |
1130 | #ifdef CONFIG_PM_SLEEP |
1131 | static int intel_suspend(struct device *dev) | |
1132 | { | |
1133 | struct intel_device *idev = dev_get_drvdata(dev); | |
1134 | ||
1135 | if (device_may_wakeup(dev)) | |
1136 | enable_irq_wake(idev->irq); | |
1137 | ||
1138 | return intel_suspend_device(dev); | |
1139 | } | |
1140 | ||
1141 | static int intel_resume(struct device *dev) | |
1142 | { | |
1143 | struct intel_device *idev = dev_get_drvdata(dev); | |
1144 | ||
1145 | if (device_may_wakeup(dev)) | |
1146 | disable_irq_wake(idev->irq); | |
1147 | ||
1148 | return intel_resume_device(dev); | |
1149 | } | |
1150 | #endif | |
1151 | ||
aa6802df LP |
1152 | static const struct dev_pm_ops intel_pm_ops = { |
1153 | SET_SYSTEM_SLEEP_PM_OPS(intel_suspend, intel_resume) | |
f7552473 | 1154 | SET_RUNTIME_PM_OPS(intel_suspend_device, intel_resume_device, NULL) |
aa6802df LP |
1155 | }; |
1156 | ||
4a59d433 AS |
1157 | static const struct acpi_gpio_params reset_gpios = { 0, 0, false }; |
1158 | static const struct acpi_gpio_params host_wake_gpios = { 1, 0, false }; | |
1159 | ||
1160 | static const struct acpi_gpio_mapping acpi_hci_intel_gpios[] = { | |
1161 | { "reset-gpios", &reset_gpios, 1 }, | |
1162 | { "host-wake-gpios", &host_wake_gpios, 1 }, | |
1163 | { }, | |
1164 | }; | |
1165 | ||
1ab1f239 LP |
1166 | static int intel_probe(struct platform_device *pdev) |
1167 | { | |
1168 | struct intel_device *idev; | |
4a59d433 | 1169 | int ret; |
1ab1f239 LP |
1170 | |
1171 | idev = devm_kzalloc(&pdev->dev, sizeof(*idev), GFP_KERNEL); | |
1172 | if (!idev) | |
1173 | return -ENOMEM; | |
1174 | ||
aa6802df LP |
1175 | mutex_init(&idev->hu_lock); |
1176 | ||
1ab1f239 LP |
1177 | idev->pdev = pdev; |
1178 | ||
4a59d433 AS |
1179 | ret = devm_acpi_dev_add_driver_gpios(&pdev->dev, acpi_hci_intel_gpios); |
1180 | if (ret) | |
1181 | dev_dbg(&pdev->dev, "Unable to add GPIO mapping table\n"); | |
1182 | ||
32b9ccbc | 1183 | idev->reset = devm_gpiod_get(&pdev->dev, "reset", GPIOD_OUT_LOW); |
1ab1f239 LP |
1184 | if (IS_ERR(idev->reset)) { |
1185 | dev_err(&pdev->dev, "Unable to retrieve gpio\n"); | |
1186 | return PTR_ERR(idev->reset); | |
1187 | } | |
1188 | ||
765ea3ab LP |
1189 | idev->irq = platform_get_irq(pdev, 0); |
1190 | if (idev->irq < 0) { | |
1191 | struct gpio_desc *host_wake; | |
1192 | ||
1193 | dev_err(&pdev->dev, "No IRQ, falling back to gpio-irq\n"); | |
1194 | ||
32b9ccbc | 1195 | host_wake = devm_gpiod_get(&pdev->dev, "host-wake", GPIOD_IN); |
765ea3ab LP |
1196 | if (IS_ERR(host_wake)) { |
1197 | dev_err(&pdev->dev, "Unable to retrieve IRQ\n"); | |
1198 | goto no_irq; | |
1199 | } | |
1200 | ||
1201 | idev->irq = gpiod_to_irq(host_wake); | |
1202 | if (idev->irq < 0) { | |
1203 | dev_err(&pdev->dev, "No corresponding irq for gpio\n"); | |
1204 | goto no_irq; | |
1205 | } | |
1206 | } | |
1207 | ||
1208 | /* Only enable wake-up/irq when controller is powered */ | |
1209 | device_set_wakeup_capable(&pdev->dev, true); | |
1210 | device_wakeup_disable(&pdev->dev); | |
1211 | ||
1212 | no_irq: | |
1ab1f239 LP |
1213 | platform_set_drvdata(pdev, idev); |
1214 | ||
1215 | /* Place this instance on the device list */ | |
67c8bde0 | 1216 | mutex_lock(&intel_device_list_lock); |
1ab1f239 | 1217 | list_add_tail(&idev->list, &intel_device_list); |
67c8bde0 | 1218 | mutex_unlock(&intel_device_list_lock); |
1ab1f239 | 1219 | |
765ea3ab LP |
1220 | dev_info(&pdev->dev, "registered, gpio(%d)/irq(%d).\n", |
1221 | desc_to_gpio(idev->reset), idev->irq); | |
1ab1f239 LP |
1222 | |
1223 | return 0; | |
1224 | } | |
1225 | ||
1226 | static int intel_remove(struct platform_device *pdev) | |
1227 | { | |
1228 | struct intel_device *idev = platform_get_drvdata(pdev); | |
1229 | ||
765ea3ab LP |
1230 | device_wakeup_disable(&pdev->dev); |
1231 | ||
67c8bde0 | 1232 | mutex_lock(&intel_device_list_lock); |
1ab1f239 | 1233 | list_del(&idev->list); |
67c8bde0 | 1234 | mutex_unlock(&intel_device_list_lock); |
1ab1f239 LP |
1235 | |
1236 | dev_info(&pdev->dev, "unregistered.\n"); | |
1237 | ||
1238 | return 0; | |
1239 | } | |
1240 | ||
1241 | static struct platform_driver intel_driver = { | |
1242 | .probe = intel_probe, | |
1243 | .remove = intel_remove, | |
1244 | .driver = { | |
1245 | .name = "hci_intel", | |
1246 | .acpi_match_table = ACPI_PTR(intel_acpi_match), | |
aa6802df | 1247 | .pm = &intel_pm_ops, |
1ab1f239 LP |
1248 | }, |
1249 | }; | |
1250 | ||
ca93cee5 LP |
1251 | int __init intel_init(void) |
1252 | { | |
1ab1f239 LP |
1253 | platform_driver_register(&intel_driver); |
1254 | ||
ca93cee5 LP |
1255 | return hci_uart_register_proto(&intel_proto); |
1256 | } | |
1257 | ||
1258 | int __exit intel_deinit(void) | |
1259 | { | |
1ab1f239 LP |
1260 | platform_driver_unregister(&intel_driver); |
1261 | ||
ca93cee5 LP |
1262 | return hci_uart_unregister_proto(&intel_proto); |
1263 | } |