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45051539 | 1 | // SPDX-License-Identifier: GPL-2.0-only |
0ff252c1 BYTK |
2 | /* |
3 | * Bluetooth Software UART Qualcomm protocol | |
4 | * | |
5 | * HCI_IBS (HCI In-Band Sleep) is Qualcomm's power management | |
6 | * protocol extension to H4. | |
7 | * | |
8 | * Copyright (C) 2007 Texas Instruments, Inc. | |
fa9ad876 | 9 | * Copyright (c) 2010, 2012, 2018 The Linux Foundation. All rights reserved. |
0ff252c1 BYTK |
10 | * |
11 | * Acknowledgements: | |
12 | * This file is based on hci_ll.c, which was... | |
13 | * Written by Ohad Ben-Cohen <ohad@bencohen.org> | |
14 | * which was in turn based on hci_h4.c, which was written | |
15 | * by Maxim Krasnyansky and Marcel Holtmann. | |
0ff252c1 BYTK |
16 | */ |
17 | ||
18 | #include <linux/kernel.h> | |
05ba533c | 19 | #include <linux/clk.h> |
2faa3f15 | 20 | #include <linux/completion.h> |
0ff252c1 | 21 | #include <linux/debugfs.h> |
fa9ad876 BG |
22 | #include <linux/delay.h> |
23 | #include <linux/device.h> | |
05ba533c TE |
24 | #include <linux/gpio/consumer.h> |
25 | #include <linux/mod_devicetable.h> | |
26 | #include <linux/module.h> | |
fa9ad876 BG |
27 | #include <linux/of_device.h> |
28 | #include <linux/platform_device.h> | |
29 | #include <linux/regulator/consumer.h> | |
05ba533c | 30 | #include <linux/serdev.h> |
c614ca3f | 31 | #include <asm/unaligned.h> |
0ff252c1 BYTK |
32 | |
33 | #include <net/bluetooth/bluetooth.h> | |
34 | #include <net/bluetooth/hci_core.h> | |
35 | ||
36 | #include "hci_uart.h" | |
37 | #include "btqca.h" | |
38 | ||
39 | /* HCI_IBS protocol messages */ | |
40 | #define HCI_IBS_SLEEP_IND 0xFE | |
41 | #define HCI_IBS_WAKE_IND 0xFD | |
42 | #define HCI_IBS_WAKE_ACK 0xFC | |
f81b001a | 43 | #define HCI_MAX_IBS_SIZE 10 |
0ff252c1 | 44 | |
f81b001a MH |
45 | #define IBS_WAKE_RETRANS_TIMEOUT_MS 100 |
46 | #define IBS_TX_IDLE_TIMEOUT_MS 2000 | |
94d66714 | 47 | #define CMD_TRANS_TIMEOUT_MS 100 |
0ff252c1 | 48 | |
05ba533c TE |
49 | /* susclk rate */ |
50 | #define SUSCLK_RATE_32KHZ 32768 | |
51 | ||
c614ca3f BG |
52 | /* Controller debug log header */ |
53 | #define QCA_DEBUG_HANDLE 0x2EDC | |
54 | ||
62a91990 MK |
55 | enum qca_flags { |
56 | QCA_IBS_ENABLED, | |
2faa3f15 | 57 | QCA_DROP_VENDOR_EVENT, |
62a91990 MK |
58 | }; |
59 | ||
0ff252c1 BYTK |
60 | /* HCI_IBS transmit side sleep protocol states */ |
61 | enum tx_ibs_states { | |
62 | HCI_IBS_TX_ASLEEP, | |
63 | HCI_IBS_TX_WAKING, | |
64 | HCI_IBS_TX_AWAKE, | |
65 | }; | |
66 | ||
67 | /* HCI_IBS receive side sleep protocol states */ | |
68 | enum rx_states { | |
69 | HCI_IBS_RX_ASLEEP, | |
70 | HCI_IBS_RX_AWAKE, | |
71 | }; | |
72 | ||
73 | /* HCI_IBS transmit and receive side clock state vote */ | |
74 | enum hci_ibs_clock_state_vote { | |
75 | HCI_IBS_VOTE_STATS_UPDATE, | |
76 | HCI_IBS_TX_VOTE_CLOCK_ON, | |
77 | HCI_IBS_TX_VOTE_CLOCK_OFF, | |
78 | HCI_IBS_RX_VOTE_CLOCK_ON, | |
79 | HCI_IBS_RX_VOTE_CLOCK_OFF, | |
80 | }; | |
81 | ||
82 | struct qca_data { | |
83 | struct hci_uart *hu; | |
84 | struct sk_buff *rx_skb; | |
85 | struct sk_buff_head txq; | |
86 | struct sk_buff_head tx_wait_q; /* HCI_IBS wait queue */ | |
87 | spinlock_t hci_ibs_lock; /* HCI_IBS state lock */ | |
88 | u8 tx_ibs_state; /* HCI_IBS transmit side power state*/ | |
89 | u8 rx_ibs_state; /* HCI_IBS receive side power state */ | |
621a5f7a VK |
90 | bool tx_vote; /* Clock must be on for TX */ |
91 | bool rx_vote; /* Clock must be on for RX */ | |
0ff252c1 BYTK |
92 | struct timer_list tx_idle_timer; |
93 | u32 tx_idle_delay; | |
94 | struct timer_list wake_retrans_timer; | |
95 | u32 wake_retrans; | |
96 | struct workqueue_struct *workqueue; | |
97 | struct work_struct ws_awake_rx; | |
98 | struct work_struct ws_awake_device; | |
99 | struct work_struct ws_rx_vote_off; | |
100 | struct work_struct ws_tx_vote_off; | |
101 | unsigned long flags; | |
2faa3f15 | 102 | struct completion drop_ev_comp; |
0ff252c1 BYTK |
103 | |
104 | /* For debugging purpose */ | |
105 | u64 ibs_sent_wacks; | |
106 | u64 ibs_sent_slps; | |
107 | u64 ibs_sent_wakes; | |
108 | u64 ibs_recv_wacks; | |
109 | u64 ibs_recv_slps; | |
110 | u64 ibs_recv_wakes; | |
111 | u64 vote_last_jif; | |
112 | u32 vote_on_ms; | |
113 | u32 vote_off_ms; | |
114 | u64 tx_votes_on; | |
115 | u64 rx_votes_on; | |
116 | u64 tx_votes_off; | |
117 | u64 rx_votes_off; | |
118 | u64 votes_on; | |
119 | u64 votes_off; | |
120 | }; | |
121 | ||
83d9c5e5 BG |
122 | enum qca_speed_type { |
123 | QCA_INIT_SPEED = 1, | |
124 | QCA_OPER_SPEED | |
125 | }; | |
126 | ||
fa9ad876 BG |
127 | /* |
128 | * Voltage regulator information required for configuring the | |
129 | * QCA Bluetooth chipset | |
130 | */ | |
131 | struct qca_vreg { | |
132 | const char *name; | |
133 | unsigned int min_uV; | |
134 | unsigned int max_uV; | |
135 | unsigned int load_uA; | |
136 | }; | |
137 | ||
138 | struct qca_vreg_data { | |
139 | enum qca_btsoc_type soc_type; | |
140 | struct qca_vreg *vregs; | |
141 | size_t num_vregs; | |
142 | }; | |
143 | ||
144 | /* | |
145 | * Platform data for the QCA Bluetooth power driver. | |
146 | */ | |
147 | struct qca_power { | |
148 | struct device *dev; | |
149 | const struct qca_vreg_data *vreg_data; | |
150 | struct regulator_bulk_data *vreg_bulk; | |
151 | bool vregs_on; | |
152 | }; | |
153 | ||
05ba533c TE |
154 | struct qca_serdev { |
155 | struct hci_uart serdev_hu; | |
156 | struct gpio_desc *bt_en; | |
157 | struct clk *susclk; | |
fa9ad876 BG |
158 | enum qca_btsoc_type btsoc_type; |
159 | struct qca_power *bt_power; | |
160 | u32 init_speed; | |
161 | u32 oper_speed; | |
99c905c6 | 162 | const char *firmware_name; |
05ba533c TE |
163 | }; |
164 | ||
fa9ad876 | 165 | static int qca_power_setup(struct hci_uart *hu, bool on); |
c2d78273 | 166 | static void qca_power_shutdown(struct hci_uart *hu); |
3e4be65e | 167 | static int qca_power_off(struct hci_dev *hdev); |
fa9ad876 | 168 | |
4fdd5a4f MK |
169 | static enum qca_btsoc_type qca_soc_type(struct hci_uart *hu) |
170 | { | |
171 | enum qca_btsoc_type soc_type; | |
172 | ||
173 | if (hu->serdev) { | |
174 | struct qca_serdev *qsd = serdev_device_get_drvdata(hu->serdev); | |
175 | ||
176 | soc_type = qsd->btsoc_type; | |
177 | } else { | |
178 | soc_type = QCA_ROME; | |
179 | } | |
180 | ||
181 | return soc_type; | |
182 | } | |
183 | ||
99c905c6 RL |
184 | static const char *qca_get_firmware_name(struct hci_uart *hu) |
185 | { | |
186 | if (hu->serdev) { | |
187 | struct qca_serdev *qsd = serdev_device_get_drvdata(hu->serdev); | |
188 | ||
189 | return qsd->firmware_name; | |
190 | } else { | |
191 | return NULL; | |
192 | } | |
193 | } | |
194 | ||
0ff252c1 BYTK |
195 | static void __serial_clock_on(struct tty_struct *tty) |
196 | { | |
197 | /* TODO: Some chipset requires to enable UART clock on client | |
198 | * side to save power consumption or manual work is required. | |
199 | * Please put your code to control UART clock here if needed | |
200 | */ | |
201 | } | |
202 | ||
203 | static void __serial_clock_off(struct tty_struct *tty) | |
204 | { | |
205 | /* TODO: Some chipset requires to disable UART clock on client | |
206 | * side to save power consumption or manual work is required. | |
207 | * Please put your code to control UART clock off here if needed | |
208 | */ | |
209 | } | |
210 | ||
211 | /* serial_clock_vote needs to be called with the ibs lock held */ | |
212 | static void serial_clock_vote(unsigned long vote, struct hci_uart *hu) | |
213 | { | |
214 | struct qca_data *qca = hu->priv; | |
215 | unsigned int diff; | |
216 | ||
217 | bool old_vote = (qca->tx_vote | qca->rx_vote); | |
218 | bool new_vote; | |
219 | ||
220 | switch (vote) { | |
221 | case HCI_IBS_VOTE_STATS_UPDATE: | |
222 | diff = jiffies_to_msecs(jiffies - qca->vote_last_jif); | |
223 | ||
224 | if (old_vote) | |
225 | qca->vote_off_ms += diff; | |
226 | else | |
227 | qca->vote_on_ms += diff; | |
228 | return; | |
229 | ||
230 | case HCI_IBS_TX_VOTE_CLOCK_ON: | |
231 | qca->tx_vote = true; | |
232 | qca->tx_votes_on++; | |
233 | new_vote = true; | |
234 | break; | |
235 | ||
236 | case HCI_IBS_RX_VOTE_CLOCK_ON: | |
237 | qca->rx_vote = true; | |
238 | qca->rx_votes_on++; | |
239 | new_vote = true; | |
240 | break; | |
241 | ||
242 | case HCI_IBS_TX_VOTE_CLOCK_OFF: | |
243 | qca->tx_vote = false; | |
244 | qca->tx_votes_off++; | |
245 | new_vote = qca->rx_vote | qca->tx_vote; | |
246 | break; | |
247 | ||
248 | case HCI_IBS_RX_VOTE_CLOCK_OFF: | |
249 | qca->rx_vote = false; | |
250 | qca->rx_votes_off++; | |
251 | new_vote = qca->rx_vote | qca->tx_vote; | |
252 | break; | |
253 | ||
254 | default: | |
255 | BT_ERR("Voting irregularity"); | |
256 | return; | |
257 | } | |
258 | ||
259 | if (new_vote != old_vote) { | |
260 | if (new_vote) | |
261 | __serial_clock_on(hu->tty); | |
262 | else | |
263 | __serial_clock_off(hu->tty); | |
264 | ||
ce26d813 PK |
265 | BT_DBG("Vote serial clock %s(%s)", new_vote ? "true" : "false", |
266 | vote ? "true" : "false"); | |
0ff252c1 BYTK |
267 | |
268 | diff = jiffies_to_msecs(jiffies - qca->vote_last_jif); | |
269 | ||
270 | if (new_vote) { | |
271 | qca->votes_on++; | |
272 | qca->vote_off_ms += diff; | |
273 | } else { | |
274 | qca->votes_off++; | |
275 | qca->vote_on_ms += diff; | |
276 | } | |
277 | qca->vote_last_jif = jiffies; | |
278 | } | |
279 | } | |
280 | ||
281 | /* Builds and sends an HCI_IBS command packet. | |
282 | * These are very simple packets with only 1 cmd byte. | |
283 | */ | |
284 | static int send_hci_ibs_cmd(u8 cmd, struct hci_uart *hu) | |
285 | { | |
286 | int err = 0; | |
287 | struct sk_buff *skb = NULL; | |
288 | struct qca_data *qca = hu->priv; | |
289 | ||
290 | BT_DBG("hu %p send hci ibs cmd 0x%x", hu, cmd); | |
291 | ||
292 | skb = bt_skb_alloc(1, GFP_ATOMIC); | |
293 | if (!skb) { | |
294 | BT_ERR("Failed to allocate memory for HCI_IBS packet"); | |
295 | return -ENOMEM; | |
296 | } | |
297 | ||
298 | /* Assign HCI_IBS type */ | |
634fef61 | 299 | skb_put_u8(skb, cmd); |
0ff252c1 BYTK |
300 | |
301 | skb_queue_tail(&qca->txq, skb); | |
302 | ||
303 | return err; | |
304 | } | |
305 | ||
306 | static void qca_wq_awake_device(struct work_struct *work) | |
307 | { | |
308 | struct qca_data *qca = container_of(work, struct qca_data, | |
309 | ws_awake_device); | |
310 | struct hci_uart *hu = qca->hu; | |
311 | unsigned long retrans_delay; | |
31fb1bbd | 312 | unsigned long flags; |
0ff252c1 BYTK |
313 | |
314 | BT_DBG("hu %p wq awake device", hu); | |
315 | ||
316 | /* Vote for serial clock */ | |
317 | serial_clock_vote(HCI_IBS_TX_VOTE_CLOCK_ON, hu); | |
318 | ||
31fb1bbd | 319 | spin_lock_irqsave(&qca->hci_ibs_lock, flags); |
0ff252c1 BYTK |
320 | |
321 | /* Send wake indication to device */ | |
322 | if (send_hci_ibs_cmd(HCI_IBS_WAKE_IND, hu) < 0) | |
323 | BT_ERR("Failed to send WAKE to device"); | |
324 | ||
325 | qca->ibs_sent_wakes++; | |
326 | ||
327 | /* Start retransmit timer */ | |
328 | retrans_delay = msecs_to_jiffies(qca->wake_retrans); | |
329 | mod_timer(&qca->wake_retrans_timer, jiffies + retrans_delay); | |
330 | ||
31fb1bbd | 331 | spin_unlock_irqrestore(&qca->hci_ibs_lock, flags); |
0ff252c1 BYTK |
332 | |
333 | /* Actually send the packets */ | |
334 | hci_uart_tx_wakeup(hu); | |
335 | } | |
336 | ||
337 | static void qca_wq_awake_rx(struct work_struct *work) | |
338 | { | |
339 | struct qca_data *qca = container_of(work, struct qca_data, | |
340 | ws_awake_rx); | |
341 | struct hci_uart *hu = qca->hu; | |
31fb1bbd | 342 | unsigned long flags; |
0ff252c1 BYTK |
343 | |
344 | BT_DBG("hu %p wq awake rx", hu); | |
345 | ||
346 | serial_clock_vote(HCI_IBS_RX_VOTE_CLOCK_ON, hu); | |
347 | ||
31fb1bbd | 348 | spin_lock_irqsave(&qca->hci_ibs_lock, flags); |
0ff252c1 BYTK |
349 | qca->rx_ibs_state = HCI_IBS_RX_AWAKE; |
350 | ||
351 | /* Always acknowledge device wake up, | |
352 | * sending IBS message doesn't count as TX ON. | |
353 | */ | |
354 | if (send_hci_ibs_cmd(HCI_IBS_WAKE_ACK, hu) < 0) | |
355 | BT_ERR("Failed to acknowledge device wake up"); | |
356 | ||
357 | qca->ibs_sent_wacks++; | |
358 | ||
31fb1bbd | 359 | spin_unlock_irqrestore(&qca->hci_ibs_lock, flags); |
0ff252c1 BYTK |
360 | |
361 | /* Actually send the packets */ | |
362 | hci_uart_tx_wakeup(hu); | |
363 | } | |
364 | ||
365 | static void qca_wq_serial_rx_clock_vote_off(struct work_struct *work) | |
366 | { | |
367 | struct qca_data *qca = container_of(work, struct qca_data, | |
368 | ws_rx_vote_off); | |
369 | struct hci_uart *hu = qca->hu; | |
370 | ||
371 | BT_DBG("hu %p rx clock vote off", hu); | |
372 | ||
373 | serial_clock_vote(HCI_IBS_RX_VOTE_CLOCK_OFF, hu); | |
374 | } | |
375 | ||
376 | static void qca_wq_serial_tx_clock_vote_off(struct work_struct *work) | |
377 | { | |
378 | struct qca_data *qca = container_of(work, struct qca_data, | |
379 | ws_tx_vote_off); | |
380 | struct hci_uart *hu = qca->hu; | |
381 | ||
382 | BT_DBG("hu %p tx clock vote off", hu); | |
383 | ||
384 | /* Run HCI tx handling unlocked */ | |
385 | hci_uart_tx_wakeup(hu); | |
386 | ||
387 | /* Now that message queued to tty driver, vote for tty clocks off. | |
388 | * It is up to the tty driver to pend the clocks off until tx done. | |
389 | */ | |
390 | serial_clock_vote(HCI_IBS_TX_VOTE_CLOCK_OFF, hu); | |
391 | } | |
392 | ||
04356052 | 393 | static void hci_ibs_tx_idle_timeout(struct timer_list *t) |
0ff252c1 | 394 | { |
04356052 KC |
395 | struct qca_data *qca = from_timer(qca, t, tx_idle_timer); |
396 | struct hci_uart *hu = qca->hu; | |
0ff252c1 BYTK |
397 | unsigned long flags; |
398 | ||
399 | BT_DBG("hu %p idle timeout in %d state", hu, qca->tx_ibs_state); | |
400 | ||
401 | spin_lock_irqsave_nested(&qca->hci_ibs_lock, | |
402 | flags, SINGLE_DEPTH_NESTING); | |
403 | ||
404 | switch (qca->tx_ibs_state) { | |
405 | case HCI_IBS_TX_AWAKE: | |
406 | /* TX_IDLE, go to SLEEP */ | |
407 | if (send_hci_ibs_cmd(HCI_IBS_SLEEP_IND, hu) < 0) { | |
408 | BT_ERR("Failed to send SLEEP to device"); | |
409 | break; | |
410 | } | |
411 | qca->tx_ibs_state = HCI_IBS_TX_ASLEEP; | |
412 | qca->ibs_sent_slps++; | |
413 | queue_work(qca->workqueue, &qca->ws_tx_vote_off); | |
414 | break; | |
415 | ||
416 | case HCI_IBS_TX_ASLEEP: | |
417 | case HCI_IBS_TX_WAKING: | |
418 | /* Fall through */ | |
419 | ||
420 | default: | |
e059a465 | 421 | BT_ERR("Spurious timeout tx state %d", qca->tx_ibs_state); |
0ff252c1 BYTK |
422 | break; |
423 | } | |
424 | ||
425 | spin_unlock_irqrestore(&qca->hci_ibs_lock, flags); | |
426 | } | |
427 | ||
04356052 | 428 | static void hci_ibs_wake_retrans_timeout(struct timer_list *t) |
0ff252c1 | 429 | { |
04356052 KC |
430 | struct qca_data *qca = from_timer(qca, t, wake_retrans_timer); |
431 | struct hci_uart *hu = qca->hu; | |
0ff252c1 | 432 | unsigned long flags, retrans_delay; |
a9137188 | 433 | bool retransmit = false; |
0ff252c1 BYTK |
434 | |
435 | BT_DBG("hu %p wake retransmit timeout in %d state", | |
436 | hu, qca->tx_ibs_state); | |
437 | ||
438 | spin_lock_irqsave_nested(&qca->hci_ibs_lock, | |
439 | flags, SINGLE_DEPTH_NESTING); | |
440 | ||
441 | switch (qca->tx_ibs_state) { | |
442 | case HCI_IBS_TX_WAKING: | |
443 | /* No WAKE_ACK, retransmit WAKE */ | |
a9137188 | 444 | retransmit = true; |
0ff252c1 BYTK |
445 | if (send_hci_ibs_cmd(HCI_IBS_WAKE_IND, hu) < 0) { |
446 | BT_ERR("Failed to acknowledge device wake up"); | |
447 | break; | |
448 | } | |
449 | qca->ibs_sent_wakes++; | |
450 | retrans_delay = msecs_to_jiffies(qca->wake_retrans); | |
451 | mod_timer(&qca->wake_retrans_timer, jiffies + retrans_delay); | |
452 | break; | |
453 | ||
454 | case HCI_IBS_TX_ASLEEP: | |
455 | case HCI_IBS_TX_AWAKE: | |
456 | /* Fall through */ | |
457 | ||
458 | default: | |
e059a465 | 459 | BT_ERR("Spurious timeout tx state %d", qca->tx_ibs_state); |
0ff252c1 BYTK |
460 | break; |
461 | } | |
462 | ||
463 | spin_unlock_irqrestore(&qca->hci_ibs_lock, flags); | |
464 | ||
465 | if (retransmit) | |
466 | hci_uart_tx_wakeup(hu); | |
467 | } | |
468 | ||
469 | /* Initialize protocol */ | |
470 | static int qca_open(struct hci_uart *hu) | |
471 | { | |
05ba533c | 472 | struct qca_serdev *qcadev; |
0ff252c1 | 473 | struct qca_data *qca; |
fa9ad876 | 474 | int ret; |
0ff252c1 BYTK |
475 | |
476 | BT_DBG("hu %p qca_open", hu); | |
477 | ||
b36a1552 VD |
478 | if (!hci_uart_has_flow_control(hu)) |
479 | return -EOPNOTSUPP; | |
480 | ||
25a13e38 | 481 | qca = kzalloc(sizeof(struct qca_data), GFP_KERNEL); |
0ff252c1 BYTK |
482 | if (!qca) |
483 | return -ENOMEM; | |
484 | ||
485 | skb_queue_head_init(&qca->txq); | |
486 | skb_queue_head_init(&qca->tx_wait_q); | |
487 | spin_lock_init(&qca->hci_ibs_lock); | |
fac9a602 | 488 | qca->workqueue = alloc_ordered_workqueue("qca_wq", 0); |
0ff252c1 BYTK |
489 | if (!qca->workqueue) { |
490 | BT_ERR("QCA Workqueue not initialized properly"); | |
491 | kfree(qca); | |
492 | return -ENOMEM; | |
493 | } | |
494 | ||
495 | INIT_WORK(&qca->ws_awake_rx, qca_wq_awake_rx); | |
496 | INIT_WORK(&qca->ws_awake_device, qca_wq_awake_device); | |
497 | INIT_WORK(&qca->ws_rx_vote_off, qca_wq_serial_rx_clock_vote_off); | |
498 | INIT_WORK(&qca->ws_tx_vote_off, qca_wq_serial_tx_clock_vote_off); | |
499 | ||
500 | qca->hu = hu; | |
2faa3f15 | 501 | init_completion(&qca->drop_ev_comp); |
0ff252c1 BYTK |
502 | |
503 | /* Assume we start with both sides asleep -- extra wakes OK */ | |
504 | qca->tx_ibs_state = HCI_IBS_TX_ASLEEP; | |
505 | qca->rx_ibs_state = HCI_IBS_RX_ASLEEP; | |
506 | ||
507 | /* clocks actually on, but we start votes off */ | |
508 | qca->tx_vote = false; | |
509 | qca->rx_vote = false; | |
510 | qca->flags = 0; | |
511 | ||
512 | qca->ibs_sent_wacks = 0; | |
513 | qca->ibs_sent_slps = 0; | |
514 | qca->ibs_sent_wakes = 0; | |
515 | qca->ibs_recv_wacks = 0; | |
516 | qca->ibs_recv_slps = 0; | |
517 | qca->ibs_recv_wakes = 0; | |
518 | qca->vote_last_jif = jiffies; | |
519 | qca->vote_on_ms = 0; | |
520 | qca->vote_off_ms = 0; | |
521 | qca->votes_on = 0; | |
522 | qca->votes_off = 0; | |
523 | qca->tx_votes_on = 0; | |
524 | qca->tx_votes_off = 0; | |
525 | qca->rx_votes_on = 0; | |
526 | qca->rx_votes_off = 0; | |
527 | ||
528 | hu->priv = qca; | |
529 | ||
05ba533c | 530 | if (hu->serdev) { |
05ba533c TE |
531 | |
532 | qcadev = serdev_device_get_drvdata(hu->serdev); | |
523760b7 | 533 | if (!qca_is_wcn399x(qcadev->btsoc_type)) { |
fa9ad876 | 534 | gpiod_set_value_cansleep(qcadev->bt_en, 1); |
7f09d5a6 BG |
535 | /* Controller needs time to bootup. */ |
536 | msleep(150); | |
fa9ad876 BG |
537 | } else { |
538 | hu->init_speed = qcadev->init_speed; | |
539 | hu->oper_speed = qcadev->oper_speed; | |
540 | ret = qca_power_setup(hu, true); | |
541 | if (ret) { | |
542 | destroy_workqueue(qca->workqueue); | |
543 | kfree_skb(qca->rx_skb); | |
544 | hu->priv = NULL; | |
545 | kfree(qca); | |
546 | return ret; | |
547 | } | |
548 | } | |
05ba533c TE |
549 | } |
550 | ||
fa9ad876 BG |
551 | timer_setup(&qca->wake_retrans_timer, hci_ibs_wake_retrans_timeout, 0); |
552 | qca->wake_retrans = IBS_WAKE_RETRANS_TIMEOUT_MS; | |
553 | ||
554 | timer_setup(&qca->tx_idle_timer, hci_ibs_tx_idle_timeout, 0); | |
555 | qca->tx_idle_delay = IBS_TX_IDLE_TIMEOUT_MS; | |
556 | ||
0ff252c1 BYTK |
557 | BT_DBG("HCI_UART_QCA open, tx_idle_delay=%u, wake_retrans=%u", |
558 | qca->tx_idle_delay, qca->wake_retrans); | |
559 | ||
560 | return 0; | |
561 | } | |
562 | ||
563 | static void qca_debugfs_init(struct hci_dev *hdev) | |
564 | { | |
565 | struct hci_uart *hu = hci_get_drvdata(hdev); | |
566 | struct qca_data *qca = hu->priv; | |
567 | struct dentry *ibs_dir; | |
568 | umode_t mode; | |
569 | ||
570 | if (!hdev->debugfs) | |
571 | return; | |
572 | ||
573 | ibs_dir = debugfs_create_dir("ibs", hdev->debugfs); | |
574 | ||
575 | /* read only */ | |
576 | mode = S_IRUGO; | |
577 | debugfs_create_u8("tx_ibs_state", mode, ibs_dir, &qca->tx_ibs_state); | |
578 | debugfs_create_u8("rx_ibs_state", mode, ibs_dir, &qca->rx_ibs_state); | |
579 | debugfs_create_u64("ibs_sent_sleeps", mode, ibs_dir, | |
580 | &qca->ibs_sent_slps); | |
581 | debugfs_create_u64("ibs_sent_wakes", mode, ibs_dir, | |
582 | &qca->ibs_sent_wakes); | |
583 | debugfs_create_u64("ibs_sent_wake_acks", mode, ibs_dir, | |
584 | &qca->ibs_sent_wacks); | |
585 | debugfs_create_u64("ibs_recv_sleeps", mode, ibs_dir, | |
586 | &qca->ibs_recv_slps); | |
587 | debugfs_create_u64("ibs_recv_wakes", mode, ibs_dir, | |
588 | &qca->ibs_recv_wakes); | |
589 | debugfs_create_u64("ibs_recv_wake_acks", mode, ibs_dir, | |
590 | &qca->ibs_recv_wacks); | |
10be6c0f | 591 | debugfs_create_bool("tx_vote", mode, ibs_dir, &qca->tx_vote); |
0ff252c1 BYTK |
592 | debugfs_create_u64("tx_votes_on", mode, ibs_dir, &qca->tx_votes_on); |
593 | debugfs_create_u64("tx_votes_off", mode, ibs_dir, &qca->tx_votes_off); | |
10be6c0f | 594 | debugfs_create_bool("rx_vote", mode, ibs_dir, &qca->rx_vote); |
0ff252c1 BYTK |
595 | debugfs_create_u64("rx_votes_on", mode, ibs_dir, &qca->rx_votes_on); |
596 | debugfs_create_u64("rx_votes_off", mode, ibs_dir, &qca->rx_votes_off); | |
597 | debugfs_create_u64("votes_on", mode, ibs_dir, &qca->votes_on); | |
598 | debugfs_create_u64("votes_off", mode, ibs_dir, &qca->votes_off); | |
599 | debugfs_create_u32("vote_on_ms", mode, ibs_dir, &qca->vote_on_ms); | |
600 | debugfs_create_u32("vote_off_ms", mode, ibs_dir, &qca->vote_off_ms); | |
601 | ||
602 | /* read/write */ | |
603 | mode = S_IRUGO | S_IWUSR; | |
604 | debugfs_create_u32("wake_retrans", mode, ibs_dir, &qca->wake_retrans); | |
605 | debugfs_create_u32("tx_idle_delay", mode, ibs_dir, | |
606 | &qca->tx_idle_delay); | |
607 | } | |
608 | ||
609 | /* Flush protocol data */ | |
610 | static int qca_flush(struct hci_uart *hu) | |
611 | { | |
612 | struct qca_data *qca = hu->priv; | |
613 | ||
614 | BT_DBG("hu %p qca flush", hu); | |
615 | ||
616 | skb_queue_purge(&qca->tx_wait_q); | |
617 | skb_queue_purge(&qca->txq); | |
618 | ||
619 | return 0; | |
620 | } | |
621 | ||
622 | /* Close protocol */ | |
623 | static int qca_close(struct hci_uart *hu) | |
624 | { | |
05ba533c | 625 | struct qca_serdev *qcadev; |
0ff252c1 BYTK |
626 | struct qca_data *qca = hu->priv; |
627 | ||
628 | BT_DBG("hu %p qca close", hu); | |
629 | ||
630 | serial_clock_vote(HCI_IBS_VOTE_STATS_UPDATE, hu); | |
631 | ||
632 | skb_queue_purge(&qca->tx_wait_q); | |
633 | skb_queue_purge(&qca->txq); | |
634 | del_timer(&qca->tx_idle_timer); | |
635 | del_timer(&qca->wake_retrans_timer); | |
636 | destroy_workqueue(qca->workqueue); | |
637 | qca->hu = NULL; | |
638 | ||
05ba533c | 639 | if (hu->serdev) { |
05ba533c | 640 | qcadev = serdev_device_get_drvdata(hu->serdev); |
523760b7 | 641 | if (qca_is_wcn399x(qcadev->btsoc_type)) |
c2d78273 | 642 | qca_power_shutdown(hu); |
fa9ad876 BG |
643 | else |
644 | gpiod_set_value_cansleep(qcadev->bt_en, 0); | |
645 | ||
05ba533c TE |
646 | } |
647 | ||
0ff252c1 BYTK |
648 | kfree_skb(qca->rx_skb); |
649 | ||
650 | hu->priv = NULL; | |
651 | ||
652 | kfree(qca); | |
653 | ||
654 | return 0; | |
655 | } | |
656 | ||
657 | /* Called upon a wake-up-indication from the device. | |
658 | */ | |
659 | static void device_want_to_wakeup(struct hci_uart *hu) | |
660 | { | |
661 | unsigned long flags; | |
662 | struct qca_data *qca = hu->priv; | |
663 | ||
664 | BT_DBG("hu %p want to wake up", hu); | |
665 | ||
666 | spin_lock_irqsave(&qca->hci_ibs_lock, flags); | |
667 | ||
668 | qca->ibs_recv_wakes++; | |
669 | ||
670 | switch (qca->rx_ibs_state) { | |
671 | case HCI_IBS_RX_ASLEEP: | |
672 | /* Make sure clock is on - we may have turned clock off since | |
673 | * receiving the wake up indicator awake rx clock. | |
674 | */ | |
675 | queue_work(qca->workqueue, &qca->ws_awake_rx); | |
676 | spin_unlock_irqrestore(&qca->hci_ibs_lock, flags); | |
677 | return; | |
678 | ||
679 | case HCI_IBS_RX_AWAKE: | |
680 | /* Always acknowledge device wake up, | |
681 | * sending IBS message doesn't count as TX ON. | |
682 | */ | |
683 | if (send_hci_ibs_cmd(HCI_IBS_WAKE_ACK, hu) < 0) { | |
684 | BT_ERR("Failed to acknowledge device wake up"); | |
685 | break; | |
686 | } | |
687 | qca->ibs_sent_wacks++; | |
688 | break; | |
689 | ||
690 | default: | |
691 | /* Any other state is illegal */ | |
692 | BT_ERR("Received HCI_IBS_WAKE_IND in rx state %d", | |
693 | qca->rx_ibs_state); | |
694 | break; | |
695 | } | |
696 | ||
697 | spin_unlock_irqrestore(&qca->hci_ibs_lock, flags); | |
698 | ||
699 | /* Actually send the packets */ | |
700 | hci_uart_tx_wakeup(hu); | |
701 | } | |
702 | ||
703 | /* Called upon a sleep-indication from the device. | |
704 | */ | |
705 | static void device_want_to_sleep(struct hci_uart *hu) | |
706 | { | |
707 | unsigned long flags; | |
708 | struct qca_data *qca = hu->priv; | |
709 | ||
6600c080 | 710 | BT_DBG("hu %p want to sleep in %d state", hu, qca->rx_ibs_state); |
0ff252c1 BYTK |
711 | |
712 | spin_lock_irqsave(&qca->hci_ibs_lock, flags); | |
713 | ||
714 | qca->ibs_recv_slps++; | |
715 | ||
716 | switch (qca->rx_ibs_state) { | |
717 | case HCI_IBS_RX_AWAKE: | |
718 | /* Update state */ | |
719 | qca->rx_ibs_state = HCI_IBS_RX_ASLEEP; | |
720 | /* Vote off rx clock under workqueue */ | |
721 | queue_work(qca->workqueue, &qca->ws_rx_vote_off); | |
722 | break; | |
723 | ||
724 | case HCI_IBS_RX_ASLEEP: | |
6600c080 | 725 | break; |
0ff252c1 BYTK |
726 | |
727 | default: | |
728 | /* Any other state is illegal */ | |
729 | BT_ERR("Received HCI_IBS_SLEEP_IND in rx state %d", | |
730 | qca->rx_ibs_state); | |
731 | break; | |
732 | } | |
733 | ||
734 | spin_unlock_irqrestore(&qca->hci_ibs_lock, flags); | |
735 | } | |
736 | ||
737 | /* Called upon wake-up-acknowledgement from the device | |
738 | */ | |
739 | static void device_woke_up(struct hci_uart *hu) | |
740 | { | |
741 | unsigned long flags, idle_delay; | |
742 | struct qca_data *qca = hu->priv; | |
743 | struct sk_buff *skb = NULL; | |
744 | ||
745 | BT_DBG("hu %p woke up", hu); | |
746 | ||
747 | spin_lock_irqsave(&qca->hci_ibs_lock, flags); | |
748 | ||
749 | qca->ibs_recv_wacks++; | |
750 | ||
751 | switch (qca->tx_ibs_state) { | |
752 | case HCI_IBS_TX_AWAKE: | |
753 | /* Expect one if we send 2 WAKEs */ | |
754 | BT_DBG("Received HCI_IBS_WAKE_ACK in tx state %d", | |
755 | qca->tx_ibs_state); | |
756 | break; | |
757 | ||
758 | case HCI_IBS_TX_WAKING: | |
759 | /* Send pending packets */ | |
760 | while ((skb = skb_dequeue(&qca->tx_wait_q))) | |
761 | skb_queue_tail(&qca->txq, skb); | |
762 | ||
763 | /* Switch timers and change state to HCI_IBS_TX_AWAKE */ | |
764 | del_timer(&qca->wake_retrans_timer); | |
765 | idle_delay = msecs_to_jiffies(qca->tx_idle_delay); | |
766 | mod_timer(&qca->tx_idle_timer, jiffies + idle_delay); | |
767 | qca->tx_ibs_state = HCI_IBS_TX_AWAKE; | |
768 | break; | |
769 | ||
770 | case HCI_IBS_TX_ASLEEP: | |
771 | /* Fall through */ | |
772 | ||
773 | default: | |
774 | BT_ERR("Received HCI_IBS_WAKE_ACK in tx state %d", | |
775 | qca->tx_ibs_state); | |
776 | break; | |
777 | } | |
778 | ||
779 | spin_unlock_irqrestore(&qca->hci_ibs_lock, flags); | |
780 | ||
781 | /* Actually send the packets */ | |
782 | hci_uart_tx_wakeup(hu); | |
783 | } | |
784 | ||
785 | /* Enqueue frame for transmittion (padding, crc, etc) may be called from | |
786 | * two simultaneous tasklets. | |
787 | */ | |
788 | static int qca_enqueue(struct hci_uart *hu, struct sk_buff *skb) | |
789 | { | |
790 | unsigned long flags = 0, idle_delay; | |
791 | struct qca_data *qca = hu->priv; | |
792 | ||
793 | BT_DBG("hu %p qca enq skb %p tx_ibs_state %d", hu, skb, | |
794 | qca->tx_ibs_state); | |
795 | ||
796 | /* Prepend skb with frame type */ | |
618e8bc2 | 797 | memcpy(skb_push(skb, 1), &hci_skb_pkt_type(skb), 1); |
0ff252c1 | 798 | |
035a960e BG |
799 | spin_lock_irqsave(&qca->hci_ibs_lock, flags); |
800 | ||
0ff252c1 BYTK |
801 | /* Don't go to sleep in middle of patch download or |
802 | * Out-Of-Band(GPIOs control) sleep is selected. | |
803 | */ | |
62a91990 | 804 | if (!test_bit(QCA_IBS_ENABLED, &qca->flags)) { |
0ff252c1 | 805 | skb_queue_tail(&qca->txq, skb); |
035a960e | 806 | spin_unlock_irqrestore(&qca->hci_ibs_lock, flags); |
0ff252c1 BYTK |
807 | return 0; |
808 | } | |
809 | ||
0ff252c1 BYTK |
810 | /* Act according to current state */ |
811 | switch (qca->tx_ibs_state) { | |
812 | case HCI_IBS_TX_AWAKE: | |
813 | BT_DBG("Device awake, sending normally"); | |
814 | skb_queue_tail(&qca->txq, skb); | |
815 | idle_delay = msecs_to_jiffies(qca->tx_idle_delay); | |
816 | mod_timer(&qca->tx_idle_timer, jiffies + idle_delay); | |
817 | break; | |
818 | ||
819 | case HCI_IBS_TX_ASLEEP: | |
820 | BT_DBG("Device asleep, waking up and queueing packet"); | |
821 | /* Save packet for later */ | |
822 | skb_queue_tail(&qca->tx_wait_q, skb); | |
823 | ||
824 | qca->tx_ibs_state = HCI_IBS_TX_WAKING; | |
825 | /* Schedule a work queue to wake up device */ | |
826 | queue_work(qca->workqueue, &qca->ws_awake_device); | |
827 | break; | |
828 | ||
829 | case HCI_IBS_TX_WAKING: | |
830 | BT_DBG("Device waking up, queueing packet"); | |
831 | /* Transient state; just keep packet for later */ | |
832 | skb_queue_tail(&qca->tx_wait_q, skb); | |
833 | break; | |
834 | ||
835 | default: | |
836 | BT_ERR("Illegal tx state: %d (losing packet)", | |
837 | qca->tx_ibs_state); | |
838 | kfree_skb(skb); | |
839 | break; | |
840 | } | |
841 | ||
842 | spin_unlock_irqrestore(&qca->hci_ibs_lock, flags); | |
843 | ||
844 | return 0; | |
845 | } | |
846 | ||
847 | static int qca_ibs_sleep_ind(struct hci_dev *hdev, struct sk_buff *skb) | |
848 | { | |
849 | struct hci_uart *hu = hci_get_drvdata(hdev); | |
850 | ||
851 | BT_DBG("hu %p recv hci ibs cmd 0x%x", hu, HCI_IBS_SLEEP_IND); | |
852 | ||
853 | device_want_to_sleep(hu); | |
854 | ||
855 | kfree_skb(skb); | |
856 | return 0; | |
857 | } | |
858 | ||
859 | static int qca_ibs_wake_ind(struct hci_dev *hdev, struct sk_buff *skb) | |
860 | { | |
861 | struct hci_uart *hu = hci_get_drvdata(hdev); | |
862 | ||
863 | BT_DBG("hu %p recv hci ibs cmd 0x%x", hu, HCI_IBS_WAKE_IND); | |
864 | ||
865 | device_want_to_wakeup(hu); | |
866 | ||
867 | kfree_skb(skb); | |
868 | return 0; | |
869 | } | |
870 | ||
871 | static int qca_ibs_wake_ack(struct hci_dev *hdev, struct sk_buff *skb) | |
872 | { | |
873 | struct hci_uart *hu = hci_get_drvdata(hdev); | |
874 | ||
875 | BT_DBG("hu %p recv hci ibs cmd 0x%x", hu, HCI_IBS_WAKE_ACK); | |
876 | ||
877 | device_woke_up(hu); | |
878 | ||
879 | kfree_skb(skb); | |
880 | return 0; | |
881 | } | |
882 | ||
c614ca3f BG |
883 | static int qca_recv_acl_data(struct hci_dev *hdev, struct sk_buff *skb) |
884 | { | |
885 | /* We receive debug logs from chip as an ACL packets. | |
886 | * Instead of sending the data to ACL to decode the | |
887 | * received data, we are pushing them to the above layers | |
888 | * as a diagnostic packet. | |
889 | */ | |
890 | if (get_unaligned_le16(skb->data) == QCA_DEBUG_HANDLE) | |
891 | return hci_recv_diag(hdev, skb); | |
892 | ||
893 | return hci_recv_frame(hdev, skb); | |
894 | } | |
895 | ||
2faa3f15 MK |
896 | static int qca_recv_event(struct hci_dev *hdev, struct sk_buff *skb) |
897 | { | |
898 | struct hci_uart *hu = hci_get_drvdata(hdev); | |
899 | struct qca_data *qca = hu->priv; | |
900 | ||
901 | if (test_bit(QCA_DROP_VENDOR_EVENT, &qca->flags)) { | |
902 | struct hci_event_hdr *hdr = (void *)skb->data; | |
903 | ||
904 | /* For the WCN3990 the vendor command for a baudrate change | |
905 | * isn't sent as synchronous HCI command, because the | |
906 | * controller sends the corresponding vendor event with the | |
907 | * new baudrate. The event is received and properly decoded | |
908 | * after changing the baudrate of the host port. It needs to | |
909 | * be dropped, otherwise it can be misinterpreted as | |
910 | * response to a later firmware download command (also a | |
911 | * vendor command). | |
912 | */ | |
913 | ||
914 | if (hdr->evt == HCI_EV_VENDOR) | |
915 | complete(&qca->drop_ev_comp); | |
916 | ||
4974c839 | 917 | kfree_skb(skb); |
2faa3f15 MK |
918 | |
919 | return 0; | |
920 | } | |
921 | ||
922 | return hci_recv_frame(hdev, skb); | |
923 | } | |
924 | ||
0ff252c1 BYTK |
925 | #define QCA_IBS_SLEEP_IND_EVENT \ |
926 | .type = HCI_IBS_SLEEP_IND, \ | |
927 | .hlen = 0, \ | |
928 | .loff = 0, \ | |
929 | .lsize = 0, \ | |
930 | .maxlen = HCI_MAX_IBS_SIZE | |
931 | ||
932 | #define QCA_IBS_WAKE_IND_EVENT \ | |
933 | .type = HCI_IBS_WAKE_IND, \ | |
934 | .hlen = 0, \ | |
935 | .loff = 0, \ | |
936 | .lsize = 0, \ | |
937 | .maxlen = HCI_MAX_IBS_SIZE | |
938 | ||
939 | #define QCA_IBS_WAKE_ACK_EVENT \ | |
940 | .type = HCI_IBS_WAKE_ACK, \ | |
941 | .hlen = 0, \ | |
942 | .loff = 0, \ | |
943 | .lsize = 0, \ | |
944 | .maxlen = HCI_MAX_IBS_SIZE | |
945 | ||
946 | static const struct h4_recv_pkt qca_recv_pkts[] = { | |
c614ca3f | 947 | { H4_RECV_ACL, .recv = qca_recv_acl_data }, |
0ff252c1 | 948 | { H4_RECV_SCO, .recv = hci_recv_frame }, |
2faa3f15 | 949 | { H4_RECV_EVENT, .recv = qca_recv_event }, |
0ff252c1 BYTK |
950 | { QCA_IBS_WAKE_IND_EVENT, .recv = qca_ibs_wake_ind }, |
951 | { QCA_IBS_WAKE_ACK_EVENT, .recv = qca_ibs_wake_ack }, | |
952 | { QCA_IBS_SLEEP_IND_EVENT, .recv = qca_ibs_sleep_ind }, | |
953 | }; | |
954 | ||
955 | static int qca_recv(struct hci_uart *hu, const void *data, int count) | |
956 | { | |
957 | struct qca_data *qca = hu->priv; | |
958 | ||
959 | if (!test_bit(HCI_UART_REGISTERED, &hu->flags)) | |
960 | return -EUNATCH; | |
961 | ||
962 | qca->rx_skb = h4_recv_buf(hu->hdev, qca->rx_skb, data, count, | |
963 | qca_recv_pkts, ARRAY_SIZE(qca_recv_pkts)); | |
964 | if (IS_ERR(qca->rx_skb)) { | |
965 | int err = PTR_ERR(qca->rx_skb); | |
2064ee33 | 966 | bt_dev_err(hu->hdev, "Frame reassembly failed (%d)", err); |
0ff252c1 BYTK |
967 | qca->rx_skb = NULL; |
968 | return err; | |
969 | } | |
970 | ||
971 | return count; | |
972 | } | |
973 | ||
974 | static struct sk_buff *qca_dequeue(struct hci_uart *hu) | |
975 | { | |
976 | struct qca_data *qca = hu->priv; | |
977 | ||
978 | return skb_dequeue(&qca->txq); | |
979 | } | |
980 | ||
981 | static uint8_t qca_get_baudrate_value(int speed) | |
982 | { | |
ce26d813 | 983 | switch (speed) { |
0ff252c1 BYTK |
984 | case 9600: |
985 | return QCA_BAUDRATE_9600; | |
986 | case 19200: | |
987 | return QCA_BAUDRATE_19200; | |
988 | case 38400: | |
989 | return QCA_BAUDRATE_38400; | |
990 | case 57600: | |
991 | return QCA_BAUDRATE_57600; | |
992 | case 115200: | |
993 | return QCA_BAUDRATE_115200; | |
994 | case 230400: | |
995 | return QCA_BAUDRATE_230400; | |
996 | case 460800: | |
997 | return QCA_BAUDRATE_460800; | |
998 | case 500000: | |
999 | return QCA_BAUDRATE_500000; | |
1000 | case 921600: | |
1001 | return QCA_BAUDRATE_921600; | |
1002 | case 1000000: | |
1003 | return QCA_BAUDRATE_1000000; | |
1004 | case 2000000: | |
1005 | return QCA_BAUDRATE_2000000; | |
1006 | case 3000000: | |
1007 | return QCA_BAUDRATE_3000000; | |
be93a497 BG |
1008 | case 3200000: |
1009 | return QCA_BAUDRATE_3200000; | |
0ff252c1 BYTK |
1010 | case 3500000: |
1011 | return QCA_BAUDRATE_3500000; | |
1012 | default: | |
1013 | return QCA_BAUDRATE_115200; | |
1014 | } | |
1015 | } | |
1016 | ||
1017 | static int qca_set_baudrate(struct hci_dev *hdev, uint8_t baudrate) | |
1018 | { | |
1019 | struct hci_uart *hu = hci_get_drvdata(hdev); | |
1020 | struct qca_data *qca = hu->priv; | |
1021 | struct sk_buff *skb; | |
1022 | u8 cmd[] = { 0x01, 0x48, 0xFC, 0x01, 0x00 }; | |
1023 | ||
be93a497 | 1024 | if (baudrate > QCA_BAUDRATE_3200000) |
0ff252c1 BYTK |
1025 | return -EINVAL; |
1026 | ||
1027 | cmd[4] = baudrate; | |
1028 | ||
25a13e38 | 1029 | skb = bt_skb_alloc(sizeof(cmd), GFP_KERNEL); |
0ff252c1 | 1030 | if (!skb) { |
2064ee33 | 1031 | bt_dev_err(hdev, "Failed to allocate baudrate packet"); |
0ff252c1 BYTK |
1032 | return -ENOMEM; |
1033 | } | |
1034 | ||
1035 | /* Assign commands to change baudrate and packet type. */ | |
59ae1d12 | 1036 | skb_put_data(skb, cmd, sizeof(cmd)); |
618e8bc2 | 1037 | hci_skb_pkt_type(skb) = HCI_COMMAND_PKT; |
0ff252c1 BYTK |
1038 | |
1039 | skb_queue_tail(&qca->txq, skb); | |
1040 | hci_uart_tx_wakeup(hu); | |
1041 | ||
94d66714 MK |
1042 | /* Wait for the baudrate change request to be sent */ |
1043 | ||
1044 | while (!skb_queue_empty(&qca->txq)) | |
1045 | usleep_range(100, 200); | |
1046 | ||
ecf2b768 MK |
1047 | if (hu->serdev) |
1048 | serdev_device_wait_until_sent(hu->serdev, | |
94d66714 MK |
1049 | msecs_to_jiffies(CMD_TRANS_TIMEOUT_MS)); |
1050 | ||
1051 | /* Give the controller time to process the request */ | |
523760b7 | 1052 | if (qca_is_wcn399x(qca_soc_type(hu))) |
94d66714 MK |
1053 | msleep(10); |
1054 | else | |
1055 | msleep(300); | |
0ff252c1 BYTK |
1056 | |
1057 | return 0; | |
1058 | } | |
1059 | ||
05ba533c TE |
1060 | static inline void host_set_baudrate(struct hci_uart *hu, unsigned int speed) |
1061 | { | |
1062 | if (hu->serdev) | |
1063 | serdev_device_set_baudrate(hu->serdev, speed); | |
1064 | else | |
1065 | hci_uart_set_baudrate(hu, speed); | |
1066 | } | |
1067 | ||
9836b802 | 1068 | static int qca_send_power_pulse(struct hci_uart *hu, bool on) |
fa9ad876 | 1069 | { |
f9558270 | 1070 | int ret; |
94d66714 | 1071 | int timeout = msecs_to_jiffies(CMD_TRANS_TIMEOUT_MS); |
9836b802 | 1072 | u8 cmd = on ? QCA_WCN3990_POWERON_PULSE : QCA_WCN3990_POWEROFF_PULSE; |
fa9ad876 BG |
1073 | |
1074 | /* These power pulses are single byte command which are sent | |
1075 | * at required baudrate to wcn3990. On wcn3990, we have an external | |
1076 | * circuit at Tx pin which decodes the pulse sent at specific baudrate. | |
1077 | * For example, wcn3990 supports RF COEX antenna for both Wi-Fi/BT | |
1078 | * and also we use the same power inputs to turn on and off for | |
1079 | * Wi-Fi/BT. Powering up the power sources will not enable BT, until | |
1080 | * we send a power on pulse at 115200 bps. This algorithm will help to | |
1081 | * save power. Disabling hardware flow control is mandatory while | |
1082 | * sending power pulses to SoC. | |
1083 | */ | |
f9558270 | 1084 | bt_dev_dbg(hu->hdev, "sending power pulse %02x to controller", cmd); |
fa9ad876 | 1085 | |
f9558270 | 1086 | serdev_device_write_flush(hu->serdev); |
fa9ad876 | 1087 | hci_uart_set_flow_control(hu, true); |
f9558270 BG |
1088 | ret = serdev_device_write_buf(hu->serdev, &cmd, sizeof(cmd)); |
1089 | if (ret < 0) { | |
1090 | bt_dev_err(hu->hdev, "failed to send power pulse %02x", cmd); | |
1091 | return ret; | |
1092 | } | |
fa9ad876 | 1093 | |
f9558270 | 1094 | serdev_device_wait_until_sent(hu->serdev, timeout); |
fa9ad876 BG |
1095 | hci_uart_set_flow_control(hu, false); |
1096 | ||
0ebcddd8 | 1097 | /* Give to controller time to boot/shutdown */ |
ad571d72 MK |
1098 | if (on) |
1099 | msleep(100); | |
0ebcddd8 MK |
1100 | else |
1101 | msleep(10); | |
ad571d72 | 1102 | |
fa9ad876 BG |
1103 | return 0; |
1104 | } | |
1105 | ||
83d9c5e5 BG |
1106 | static unsigned int qca_get_speed(struct hci_uart *hu, |
1107 | enum qca_speed_type speed_type) | |
1108 | { | |
1109 | unsigned int speed = 0; | |
1110 | ||
1111 | if (speed_type == QCA_INIT_SPEED) { | |
1112 | if (hu->init_speed) | |
1113 | speed = hu->init_speed; | |
1114 | else if (hu->proto->init_speed) | |
1115 | speed = hu->proto->init_speed; | |
1116 | } else { | |
1117 | if (hu->oper_speed) | |
1118 | speed = hu->oper_speed; | |
1119 | else if (hu->proto->oper_speed) | |
1120 | speed = hu->proto->oper_speed; | |
1121 | } | |
1122 | ||
1123 | return speed; | |
1124 | } | |
1125 | ||
1126 | static int qca_check_speeds(struct hci_uart *hu) | |
1127 | { | |
523760b7 | 1128 | if (qca_is_wcn399x(qca_soc_type(hu))) { |
fa9ad876 BG |
1129 | if (!qca_get_speed(hu, QCA_INIT_SPEED) && |
1130 | !qca_get_speed(hu, QCA_OPER_SPEED)) | |
1131 | return -EINVAL; | |
1132 | } else { | |
1133 | if (!qca_get_speed(hu, QCA_INIT_SPEED) || | |
1134 | !qca_get_speed(hu, QCA_OPER_SPEED)) | |
1135 | return -EINVAL; | |
1136 | } | |
83d9c5e5 BG |
1137 | |
1138 | return 0; | |
1139 | } | |
1140 | ||
1141 | static int qca_set_speed(struct hci_uart *hu, enum qca_speed_type speed_type) | |
1142 | { | |
1143 | unsigned int speed, qca_baudrate; | |
2faa3f15 | 1144 | struct qca_data *qca = hu->priv; |
78e8fa29 | 1145 | int ret = 0; |
83d9c5e5 BG |
1146 | |
1147 | if (speed_type == QCA_INIT_SPEED) { | |
1148 | speed = qca_get_speed(hu, QCA_INIT_SPEED); | |
1149 | if (speed) | |
1150 | host_set_baudrate(hu, speed); | |
1151 | } else { | |
4fdd5a4f MK |
1152 | enum qca_btsoc_type soc_type = qca_soc_type(hu); |
1153 | ||
83d9c5e5 BG |
1154 | speed = qca_get_speed(hu, QCA_OPER_SPEED); |
1155 | if (!speed) | |
1156 | return 0; | |
1157 | ||
78e8fa29 BG |
1158 | /* Disable flow control for wcn3990 to deassert RTS while |
1159 | * changing the baudrate of chip and host. | |
1160 | */ | |
523760b7 | 1161 | if (qca_is_wcn399x(soc_type)) |
78e8fa29 BG |
1162 | hci_uart_set_flow_control(hu, true); |
1163 | ||
2faa3f15 MK |
1164 | if (soc_type == QCA_WCN3990) { |
1165 | reinit_completion(&qca->drop_ev_comp); | |
1166 | set_bit(QCA_DROP_VENDOR_EVENT, &qca->flags); | |
1167 | } | |
1168 | ||
83d9c5e5 | 1169 | qca_baudrate = qca_get_baudrate_value(speed); |
fa9ad876 | 1170 | bt_dev_dbg(hu->hdev, "Set UART speed to %d", speed); |
83d9c5e5 BG |
1171 | ret = qca_set_baudrate(hu->hdev, qca_baudrate); |
1172 | if (ret) | |
78e8fa29 | 1173 | goto error; |
83d9c5e5 BG |
1174 | |
1175 | host_set_baudrate(hu, speed); | |
78e8fa29 BG |
1176 | |
1177 | error: | |
523760b7 | 1178 | if (qca_is_wcn399x(soc_type)) |
78e8fa29 | 1179 | hci_uart_set_flow_control(hu, false); |
2faa3f15 MK |
1180 | |
1181 | if (soc_type == QCA_WCN3990) { | |
1182 | /* Wait for the controller to send the vendor event | |
1183 | * for the baudrate change command. | |
1184 | */ | |
1185 | if (!wait_for_completion_timeout(&qca->drop_ev_comp, | |
1186 | msecs_to_jiffies(100))) { | |
1187 | bt_dev_err(hu->hdev, | |
1188 | "Failed to change controller baudrate\n"); | |
1189 | ret = -ETIMEDOUT; | |
1190 | } | |
1191 | ||
1192 | clear_bit(QCA_DROP_VENDOR_EVENT, &qca->flags); | |
1193 | } | |
83d9c5e5 BG |
1194 | } |
1195 | ||
78e8fa29 | 1196 | return ret; |
83d9c5e5 BG |
1197 | } |
1198 | ||
fa9ad876 BG |
1199 | static int qca_wcn3990_init(struct hci_uart *hu) |
1200 | { | |
3e4be65e | 1201 | struct qca_serdev *qcadev; |
fa9ad876 BG |
1202 | int ret; |
1203 | ||
3e4be65e BG |
1204 | /* Check for vregs status, may be hci down has turned |
1205 | * off the voltage regulator. | |
1206 | */ | |
1207 | qcadev = serdev_device_get_drvdata(hu->serdev); | |
1208 | if (!qcadev->bt_power->vregs_on) { | |
1209 | serdev_device_close(hu->serdev); | |
1210 | ret = qca_power_setup(hu, true); | |
1211 | if (ret) | |
1212 | return ret; | |
1213 | ||
1214 | ret = serdev_device_open(hu->serdev); | |
1215 | if (ret) { | |
1216 | bt_dev_err(hu->hdev, "failed to open port"); | |
1217 | return ret; | |
1218 | } | |
1219 | } | |
1220 | ||
fa9ad876 BG |
1221 | /* Forcefully enable wcn3990 to enter in to boot mode. */ |
1222 | host_set_baudrate(hu, 2400); | |
9836b802 | 1223 | ret = qca_send_power_pulse(hu, false); |
fa9ad876 BG |
1224 | if (ret) |
1225 | return ret; | |
1226 | ||
1227 | qca_set_speed(hu, QCA_INIT_SPEED); | |
9836b802 | 1228 | ret = qca_send_power_pulse(hu, true); |
fa9ad876 BG |
1229 | if (ret) |
1230 | return ret; | |
1231 | ||
fa9ad876 BG |
1232 | /* Now the device is in ready state to communicate with host. |
1233 | * To sync host with device we need to reopen port. | |
1234 | * Without this, we will have RTS and CTS synchronization | |
1235 | * issues. | |
1236 | */ | |
1237 | serdev_device_close(hu->serdev); | |
1238 | ret = serdev_device_open(hu->serdev); | |
1239 | if (ret) { | |
1240 | bt_dev_err(hu->hdev, "failed to open port"); | |
1241 | return ret; | |
1242 | } | |
1243 | ||
1244 | hci_uart_set_flow_control(hu, false); | |
1245 | ||
1246 | return 0; | |
1247 | } | |
1248 | ||
0ff252c1 BYTK |
1249 | static int qca_setup(struct hci_uart *hu) |
1250 | { | |
1251 | struct hci_dev *hdev = hu->hdev; | |
1252 | struct qca_data *qca = hu->priv; | |
1253 | unsigned int speed, qca_baudrate = QCA_BAUDRATE_115200; | |
4fdd5a4f | 1254 | enum qca_btsoc_type soc_type = qca_soc_type(hu); |
99c905c6 | 1255 | const char *firmware_name = qca_get_firmware_name(hu); |
0ff252c1 | 1256 | int ret; |
aadebac4 | 1257 | int soc_ver = 0; |
0ff252c1 | 1258 | |
83d9c5e5 BG |
1259 | ret = qca_check_speeds(hu); |
1260 | if (ret) | |
1261 | return ret; | |
1262 | ||
0ff252c1 | 1263 | /* Patch downloading has to be done without IBS mode */ |
62a91990 | 1264 | clear_bit(QCA_IBS_ENABLED, &qca->flags); |
0ff252c1 | 1265 | |
523760b7 | 1266 | if (qca_is_wcn399x(soc_type)) { |
fa9ad876 | 1267 | bt_dev_info(hdev, "setting up wcn3990"); |
3e4be65e BG |
1268 | |
1269 | /* Enable NON_PERSISTENT_SETUP QUIRK to ensure to execute | |
1270 | * setup for every hci up. | |
1271 | */ | |
1272 | set_bit(HCI_QUIRK_NON_PERSISTENT_SETUP, &hdev->quirks); | |
5971752d | 1273 | set_bit(HCI_QUIRK_USE_BDADDR_PROPERTY, &hdev->quirks); |
3e4be65e | 1274 | hu->hdev->shutdown = qca_power_off; |
fa9ad876 BG |
1275 | ret = qca_wcn3990_init(hu); |
1276 | if (ret) | |
1277 | return ret; | |
1278 | ||
1279 | ret = qca_read_soc_version(hdev, &soc_ver); | |
1280 | if (ret) | |
1281 | return ret; | |
1282 | } else { | |
1283 | bt_dev_info(hdev, "ROME setup"); | |
1284 | qca_set_speed(hu, QCA_INIT_SPEED); | |
1285 | } | |
0ff252c1 BYTK |
1286 | |
1287 | /* Setup user speed if needed */ | |
83d9c5e5 | 1288 | speed = qca_get_speed(hu, QCA_OPER_SPEED); |
0ff252c1 | 1289 | if (speed) { |
83d9c5e5 BG |
1290 | ret = qca_set_speed(hu, QCA_OPER_SPEED); |
1291 | if (ret) | |
0ff252c1 | 1292 | return ret; |
83d9c5e5 BG |
1293 | |
1294 | qca_baudrate = qca_get_baudrate_value(speed); | |
0ff252c1 BYTK |
1295 | } |
1296 | ||
523760b7 | 1297 | if (!qca_is_wcn399x(soc_type)) { |
fa9ad876 BG |
1298 | /* Get QCA version information */ |
1299 | ret = qca_read_soc_version(hdev, &soc_ver); | |
1300 | if (ret) | |
1301 | return ret; | |
1302 | } | |
aadebac4 BG |
1303 | |
1304 | bt_dev_info(hdev, "QCA controller version 0x%08x", soc_ver); | |
0ff252c1 | 1305 | /* Setup patch / NVM configurations */ |
99c905c6 RL |
1306 | ret = qca_uart_setup(hdev, qca_baudrate, soc_type, soc_ver, |
1307 | firmware_name); | |
0ff252c1 | 1308 | if (!ret) { |
62a91990 | 1309 | set_bit(QCA_IBS_ENABLED, &qca->flags); |
0ff252c1 | 1310 | qca_debugfs_init(hdev); |
ba8f3597 LP |
1311 | } else if (ret == -ENOENT) { |
1312 | /* No patch/nvm-config found, run with original fw/config */ | |
1313 | ret = 0; | |
7dc5fe08 AP |
1314 | } else if (ret == -EAGAIN) { |
1315 | /* | |
1316 | * Userspace firmware loader will return -EAGAIN in case no | |
1317 | * patch/nvm-config is found, so run with original fw/config. | |
1318 | */ | |
1319 | ret = 0; | |
0ff252c1 BYTK |
1320 | } |
1321 | ||
1322 | /* Setup bdaddr */ | |
523760b7 | 1323 | if (qca_is_wcn399x(soc_type)) |
5c0a1001 BG |
1324 | hu->hdev->set_bdaddr = qca_set_bdaddr; |
1325 | else | |
1326 | hu->hdev->set_bdaddr = qca_set_bdaddr_rome; | |
0ff252c1 BYTK |
1327 | |
1328 | return ret; | |
1329 | } | |
1330 | ||
1331 | static struct hci_uart_proto qca_proto = { | |
1332 | .id = HCI_UART_QCA, | |
1333 | .name = "QCA", | |
aee61f7a | 1334 | .manufacturer = 29, |
0ff252c1 BYTK |
1335 | .init_speed = 115200, |
1336 | .oper_speed = 3000000, | |
1337 | .open = qca_open, | |
1338 | .close = qca_close, | |
1339 | .flush = qca_flush, | |
1340 | .setup = qca_setup, | |
1341 | .recv = qca_recv, | |
1342 | .enqueue = qca_enqueue, | |
1343 | .dequeue = qca_dequeue, | |
1344 | }; | |
1345 | ||
523760b7 | 1346 | static const struct qca_vreg_data qca_soc_data_wcn3990 = { |
fa9ad876 BG |
1347 | .soc_type = QCA_WCN3990, |
1348 | .vregs = (struct qca_vreg []) { | |
1349 | { "vddio", 1800000, 1900000, 15000 }, | |
1350 | { "vddxo", 1800000, 1900000, 80000 }, | |
1351 | { "vddrf", 1300000, 1350000, 300000 }, | |
1352 | { "vddch0", 3300000, 3400000, 450000 }, | |
1353 | }, | |
1354 | .num_vregs = 4, | |
1355 | }; | |
1356 | ||
523760b7 HB |
1357 | static const struct qca_vreg_data qca_soc_data_wcn3998 = { |
1358 | .soc_type = QCA_WCN3998, | |
1359 | .vregs = (struct qca_vreg []) { | |
1360 | { "vddio", 1800000, 1900000, 10000 }, | |
1361 | { "vddxo", 1800000, 1900000, 80000 }, | |
1362 | { "vddrf", 1300000, 1352000, 300000 }, | |
1363 | { "vddch0", 3300000, 3300000, 450000 }, | |
1364 | }, | |
1365 | .num_vregs = 4, | |
1366 | }; | |
1367 | ||
c2d78273 | 1368 | static void qca_power_shutdown(struct hci_uart *hu) |
fa9ad876 | 1369 | { |
035a960e BG |
1370 | struct qca_data *qca = hu->priv; |
1371 | unsigned long flags; | |
1372 | ||
1373 | /* From this point we go into power off state. But serial port is | |
1374 | * still open, stop queueing the IBS data and flush all the buffered | |
1375 | * data in skb's. | |
1376 | */ | |
1377 | spin_lock_irqsave(&qca->hci_ibs_lock, flags); | |
62a91990 | 1378 | clear_bit(QCA_IBS_ENABLED, &qca->flags); |
035a960e BG |
1379 | qca_flush(hu); |
1380 | spin_unlock_irqrestore(&qca->hci_ibs_lock, flags); | |
1381 | ||
fa9ad876 | 1382 | host_set_baudrate(hu, 2400); |
9836b802 | 1383 | qca_send_power_pulse(hu, false); |
fa9ad876 BG |
1384 | qca_power_setup(hu, false); |
1385 | } | |
1386 | ||
3e4be65e BG |
1387 | static int qca_power_off(struct hci_dev *hdev) |
1388 | { | |
1389 | struct hci_uart *hu = hci_get_drvdata(hdev); | |
1390 | ||
a2780889 HB |
1391 | /* Perform pre shutdown command */ |
1392 | qca_send_pre_shutdown_cmd(hdev); | |
1393 | ||
3e4be65e BG |
1394 | qca_power_shutdown(hu); |
1395 | return 0; | |
1396 | } | |
1397 | ||
fa9ad876 BG |
1398 | static int qca_enable_regulator(struct qca_vreg vregs, |
1399 | struct regulator *regulator) | |
1400 | { | |
1401 | int ret; | |
1402 | ||
1403 | ret = regulator_set_voltage(regulator, vregs.min_uV, | |
1404 | vregs.max_uV); | |
1405 | if (ret) | |
1406 | return ret; | |
1407 | ||
1408 | if (vregs.load_uA) | |
1409 | ret = regulator_set_load(regulator, | |
1410 | vregs.load_uA); | |
1411 | ||
1412 | if (ret) | |
1413 | return ret; | |
1414 | ||
1415 | return regulator_enable(regulator); | |
1416 | ||
1417 | } | |
1418 | ||
1419 | static void qca_disable_regulator(struct qca_vreg vregs, | |
1420 | struct regulator *regulator) | |
1421 | { | |
1422 | regulator_disable(regulator); | |
1423 | regulator_set_voltage(regulator, 0, vregs.max_uV); | |
1424 | if (vregs.load_uA) | |
1425 | regulator_set_load(regulator, 0); | |
1426 | ||
1427 | } | |
1428 | ||
1429 | static int qca_power_setup(struct hci_uart *hu, bool on) | |
1430 | { | |
1431 | struct qca_vreg *vregs; | |
1432 | struct regulator_bulk_data *vreg_bulk; | |
1433 | struct qca_serdev *qcadev; | |
1434 | int i, num_vregs, ret = 0; | |
1435 | ||
1436 | qcadev = serdev_device_get_drvdata(hu->serdev); | |
1437 | if (!qcadev || !qcadev->bt_power || !qcadev->bt_power->vreg_data || | |
1438 | !qcadev->bt_power->vreg_bulk) | |
1439 | return -EINVAL; | |
1440 | ||
1441 | vregs = qcadev->bt_power->vreg_data->vregs; | |
1442 | vreg_bulk = qcadev->bt_power->vreg_bulk; | |
1443 | num_vregs = qcadev->bt_power->vreg_data->num_vregs; | |
1444 | BT_DBG("on: %d", on); | |
1445 | if (on && !qcadev->bt_power->vregs_on) { | |
1446 | for (i = 0; i < num_vregs; i++) { | |
1447 | ret = qca_enable_regulator(vregs[i], | |
1448 | vreg_bulk[i].consumer); | |
1449 | if (ret) | |
1450 | break; | |
1451 | } | |
1452 | ||
1453 | if (ret) { | |
1454 | BT_ERR("failed to enable regulator:%s", vregs[i].name); | |
1455 | /* turn off regulators which are enabled */ | |
1456 | for (i = i - 1; i >= 0; i--) | |
1457 | qca_disable_regulator(vregs[i], | |
1458 | vreg_bulk[i].consumer); | |
1459 | } else { | |
1460 | qcadev->bt_power->vregs_on = true; | |
1461 | } | |
1462 | } else if (!on && qcadev->bt_power->vregs_on) { | |
1463 | /* turn off regulator in reverse order */ | |
1464 | i = qcadev->bt_power->vreg_data->num_vregs - 1; | |
1465 | for ( ; i >= 0; i--) | |
1466 | qca_disable_regulator(vregs[i], vreg_bulk[i].consumer); | |
1467 | ||
1468 | qcadev->bt_power->vregs_on = false; | |
1469 | } | |
1470 | ||
1471 | return ret; | |
1472 | } | |
1473 | ||
1474 | static int qca_init_regulators(struct qca_power *qca, | |
1475 | const struct qca_vreg *vregs, size_t num_vregs) | |
1476 | { | |
1477 | int i; | |
1478 | ||
329e0989 | 1479 | qca->vreg_bulk = devm_kcalloc(qca->dev, num_vregs, |
fa9ad876 BG |
1480 | sizeof(struct regulator_bulk_data), |
1481 | GFP_KERNEL); | |
1482 | if (!qca->vreg_bulk) | |
1483 | return -ENOMEM; | |
1484 | ||
1485 | for (i = 0; i < num_vregs; i++) | |
1486 | qca->vreg_bulk[i].supply = vregs[i].name; | |
1487 | ||
1488 | return devm_regulator_bulk_get(qca->dev, num_vregs, qca->vreg_bulk); | |
1489 | } | |
1490 | ||
05ba533c TE |
1491 | static int qca_serdev_probe(struct serdev_device *serdev) |
1492 | { | |
1493 | struct qca_serdev *qcadev; | |
fa9ad876 | 1494 | const struct qca_vreg_data *data; |
05ba533c TE |
1495 | int err; |
1496 | ||
1497 | qcadev = devm_kzalloc(&serdev->dev, sizeof(*qcadev), GFP_KERNEL); | |
1498 | if (!qcadev) | |
1499 | return -ENOMEM; | |
1500 | ||
1501 | qcadev->serdev_hu.serdev = serdev; | |
fa9ad876 | 1502 | data = of_device_get_match_data(&serdev->dev); |
05ba533c | 1503 | serdev_device_set_drvdata(serdev, qcadev); |
99c905c6 RL |
1504 | device_property_read_string(&serdev->dev, "firmware-name", |
1505 | &qcadev->firmware_name); | |
523760b7 HB |
1506 | if (data && qca_is_wcn399x(data->soc_type)) { |
1507 | qcadev->btsoc_type = data->soc_type; | |
fa9ad876 BG |
1508 | qcadev->bt_power = devm_kzalloc(&serdev->dev, |
1509 | sizeof(struct qca_power), | |
1510 | GFP_KERNEL); | |
1511 | if (!qcadev->bt_power) | |
1512 | return -ENOMEM; | |
1513 | ||
1514 | qcadev->bt_power->dev = &serdev->dev; | |
1515 | qcadev->bt_power->vreg_data = data; | |
1516 | err = qca_init_regulators(qcadev->bt_power, data->vregs, | |
1517 | data->num_vregs); | |
1518 | if (err) { | |
1519 | BT_ERR("Failed to init regulators:%d", err); | |
1520 | goto out; | |
1521 | } | |
05ba533c | 1522 | |
fa9ad876 | 1523 | qcadev->bt_power->vregs_on = false; |
05ba533c | 1524 | |
fa9ad876 BG |
1525 | device_property_read_u32(&serdev->dev, "max-speed", |
1526 | &qcadev->oper_speed); | |
1527 | if (!qcadev->oper_speed) | |
1528 | BT_DBG("UART will pick default operating speed"); | |
05ba533c | 1529 | |
fa9ad876 BG |
1530 | err = hci_uart_register_device(&qcadev->serdev_hu, &qca_proto); |
1531 | if (err) { | |
1532 | BT_ERR("wcn3990 serdev registration failed"); | |
1533 | goto out; | |
1534 | } | |
1535 | } else { | |
1536 | qcadev->btsoc_type = QCA_ROME; | |
1537 | qcadev->bt_en = devm_gpiod_get(&serdev->dev, "enable", | |
1538 | GPIOD_OUT_LOW); | |
1539 | if (IS_ERR(qcadev->bt_en)) { | |
1540 | dev_err(&serdev->dev, "failed to acquire enable gpio\n"); | |
1541 | return PTR_ERR(qcadev->bt_en); | |
1542 | } | |
05ba533c | 1543 | |
fa9ad876 BG |
1544 | qcadev->susclk = devm_clk_get(&serdev->dev, NULL); |
1545 | if (IS_ERR(qcadev->susclk)) { | |
1546 | dev_err(&serdev->dev, "failed to acquire clk\n"); | |
1547 | return PTR_ERR(qcadev->susclk); | |
1548 | } | |
05ba533c | 1549 | |
fa9ad876 BG |
1550 | err = clk_set_rate(qcadev->susclk, SUSCLK_RATE_32KHZ); |
1551 | if (err) | |
1552 | return err; | |
1553 | ||
1554 | err = clk_prepare_enable(qcadev->susclk); | |
1555 | if (err) | |
1556 | return err; | |
1557 | ||
1558 | err = hci_uart_register_device(&qcadev->serdev_hu, &qca_proto); | |
1559 | if (err) | |
1560 | clk_disable_unprepare(qcadev->susclk); | |
1561 | } | |
1562 | ||
1563 | out: return err; | |
05ba533c | 1564 | |
05ba533c TE |
1565 | } |
1566 | ||
1567 | static void qca_serdev_remove(struct serdev_device *serdev) | |
1568 | { | |
1569 | struct qca_serdev *qcadev = serdev_device_get_drvdata(serdev); | |
1570 | ||
523760b7 | 1571 | if (qca_is_wcn399x(qcadev->btsoc_type)) |
c2d78273 | 1572 | qca_power_shutdown(&qcadev->serdev_hu); |
fa9ad876 BG |
1573 | else |
1574 | clk_disable_unprepare(qcadev->susclk); | |
05ba533c | 1575 | |
fa9ad876 | 1576 | hci_uart_unregister_device(&qcadev->serdev_hu); |
05ba533c TE |
1577 | } |
1578 | ||
1579 | static const struct of_device_id qca_bluetooth_of_match[] = { | |
1580 | { .compatible = "qcom,qca6174-bt" }, | |
523760b7 HB |
1581 | { .compatible = "qcom,wcn3990-bt", .data = &qca_soc_data_wcn3990}, |
1582 | { .compatible = "qcom,wcn3998-bt", .data = &qca_soc_data_wcn3998}, | |
05ba533c TE |
1583 | { /* sentinel */ } |
1584 | }; | |
1585 | MODULE_DEVICE_TABLE(of, qca_bluetooth_of_match); | |
1586 | ||
1587 | static struct serdev_device_driver qca_serdev_driver = { | |
1588 | .probe = qca_serdev_probe, | |
1589 | .remove = qca_serdev_remove, | |
1590 | .driver = { | |
1591 | .name = "hci_uart_qca", | |
1592 | .of_match_table = qca_bluetooth_of_match, | |
1593 | }, | |
1594 | }; | |
1595 | ||
0ff252c1 BYTK |
1596 | int __init qca_init(void) |
1597 | { | |
05ba533c TE |
1598 | serdev_device_driver_register(&qca_serdev_driver); |
1599 | ||
0ff252c1 BYTK |
1600 | return hci_uart_register_proto(&qca_proto); |
1601 | } | |
1602 | ||
1603 | int __exit qca_deinit(void) | |
1604 | { | |
05ba533c TE |
1605 | serdev_device_driver_unregister(&qca_serdev_driver); |
1606 | ||
0ff252c1 BYTK |
1607 | return hci_uart_unregister_proto(&qca_proto); |
1608 | } |