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memory: davinci: add support for da8xx DDR2/mDDR controller
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26a84b3e
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1#
2# Bus Devices
3#
4
5menu "Bus devices"
6
13fbf3c8 7config ARM_CCI
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8 bool
9
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10config ARM_CCI_PMU
11 bool
12 select ARM_CCI
13
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14config ARM_CCI400_COMMON
15 bool
16 select ARM_CCI
17
18config ARM_CCI400_PMU
19 bool "ARM CCI400 PMU support"
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20 depends on (ARM && CPU_V7) || ARM64
21 depends on PERF_EVENTS
47f36e49 22 select ARM_CCI400_COMMON
f4d58938 23 select ARM_CCI_PMU
47f36e49 24 help
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25 Support for PMU events monitoring on the ARM CCI-400 (cache coherent
26 interconnect). CCI-400 supports counting events related to the
27 connected slave/master interfaces.
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28
29config ARM_CCI400_PORT_CTRL
30 bool
13fbf3c8 31 depends on ARM && OF && CPU_V7
47f36e49 32 select ARM_CCI400_COMMON
13fbf3c8 33 help
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34 Low level power management driver for CCI400 cache coherent
35 interconnect for ARM platforms.
13fbf3c8 36
3d2e8701 37config ARM_CCI5xx_PMU
d7dd5fd7 38 bool "ARM CCI-500/CCI-550 PMU support"
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39 depends on (ARM && CPU_V7) || ARM64
40 depends on PERF_EVENTS
41 select ARM_CCI_PMU
42 help
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43 Support for PMU events monitoring on the ARM CCI-500/CCI-550 cache
44 coherent interconnects. Both of them provide 8 independent event counters,
45 which can count events pertaining to the slave/master interfaces as well
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46 as the internal events to the CCI.
47
48 If unsure, say Y
49
13fbf3c8 50config ARM_CCN
5420f9fd 51 tristate "ARM CCN driver support"
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52 depends on ARM || ARM64
53 depends on PERF_EVENTS
54 help
55 PMU (perf) driver supporting the ARM CCN (Cache Coherent Network)
56 interconnect.
57
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58config BRCMSTB_GISB_ARB
59 bool "Broadcom STB GISB bus arbiter"
dd1d78a1 60 depends on ARM || MIPS
b0ec633c 61 default ARCH_BRCMSTB || BMIPS_GENERIC
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62 help
63 Driver for the Broadcom Set Top Box System-on-a-chip internal bus
64 arbiter. This driver provides timeout and target abort error handling
65 and internal bus master decoding.
66
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67config IMX_WEIM
68 bool "Freescale EIM DRIVER"
69 depends on ARCH_MXC
70 help
3f98b6ba 71 Driver for i.MX WEIM controller.
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72 The WEIM(Wireless External Interface Module) works like a bus.
73 You can attach many different devices on it, such as NOR, onenand.
85bf6d4e 74
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75config MIPS_CDMM
76 bool "MIPS Common Device Memory Map (CDMM) Driver"
77 depends on CPU_MIPSR2
78 help
79 Driver needed for the MIPS Common Device Memory Map bus in MIPS
80 cores. This bus is for per-CPU tightly coupled devices such as the
81 Fast Debug Channel (FDC).
82
83 For this to work, either your bootloader needs to enable the CDMM
84 region at an unused physical address on the boot CPU, or else your
85 platform code needs to implement mips_cdmm_phys_base() (see
86 asm/cdmm.h).
87
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88config MVEBU_MBUS
89 bool
90 depends on PLAT_ORION
91 help
92 Driver needed for the MBus configuration on Marvell EBU SoCs
93 (Kirkwood, Dove, Orion5x, MV78XX0 and Armada 370/XP).
94
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95config OMAP_INTERCONNECT
96 tristate "OMAP INTERCONNECT DRIVER"
97 depends on ARCH_OMAP2PLUS
98
99 help
100 Driver to enable OMAP interconnect error handling driver.
ed69bdd8 101
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102config OMAP_OCP2SCP
103 tristate "OMAP OCP2SCP DRIVER"
104 depends on ARCH_OMAP2PLUS
ed69bdd8 105 help
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106 Driver to enable ocp2scp module which transforms ocp interface
107 protocol to scp protocol. In OMAP4, USB PHY is connected via
108 OCP2SCP and in OMAP5, both USB PHY and SATA PHY is connected via
109 OCP2SCP.
3b9334ac 110
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111config QCOM_EBI2
112 bool "Qualcomm External Bus Interface 2 (EBI2)"
d6db68b2 113 depends on HAS_IOMEM
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114 help
115 Say y here to enable support for the Qualcomm External Bus
116 Interface 2, which can be used to connect things like NAND Flash,
117 SRAM, ethernet adapters, FPGAs and LCD displays.
118
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119config SIMPLE_PM_BUS
120 bool "Simple Power-Managed Bus Driver"
121 depends on OF && PM
41feae79 122 depends on ARCH_RENESAS || COMPILE_TEST
a33b0daa 123 help
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124 Driver for transparent busses that don't need a real driver, but
125 where the bus controller is part of a PM domain, or under the control
126 of a functional clock, and thus relies on runtime PM for managing
127 this PM domain and/or clock.
128 An example of such a bus controller is the Renesas Bus State
129 Controller (BSC, sometimes called "LBSC within Bus Bridge", or
130 "External Bus Interface") as found on several Renesas ARM SoCs.
a33b0daa 131
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132config SUNXI_RSB
133 tristate "Allwinner sunXi Reduced Serial Bus Driver"
134 default MACH_SUN8I || MACH_SUN9I
135 depends on ARCH_SUNXI
136 select REGMAP
137 help
138 Say y here to enable support for Allwinner's Reduced Serial Bus
139 (RSB) support. This controller is responsible for communicating
140 with various RSB based devices, such as AXP223, AXP8XX PMICs,
141 and AC100/AC200 ICs.
142
46a88534 143config TEGRA_ACONNECT
2d301c07 144 tristate "Tegra ACONNECT Bus Driver"
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145 depends on ARCH_TEGRA_210_SOC
146 depends on OF && PM
147 select PM_CLK
148 help
149 Driver for the Tegra ACONNECT bus which is used to interface with
150 the devices inside the Audio Processing Engine (APE) for Tegra210.
151
4b7f48d3 152config UNIPHIER_SYSTEM_BUS
047a555f 153 tristate "UniPhier System Bus driver"
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154 depends on ARCH_UNIPHIER && OF
155 default y
156 help
157 Support for UniPhier System Bus, a simple external bus. This is
158 needed to use on-board devices connected to UniPhier SoCs.
159
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160config VEXPRESS_CONFIG
161 bool "Versatile Express configuration bus"
162 default y if ARCH_VEXPRESS
163 depends on ARM || ARM64
b33cdd28 164 depends on OF
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165 select REGMAP
166 help
167 Platform configuration infrastructure for the ARM Ltd.
168 Versatile Express.
26a84b3e 169endmenu