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Commit | Line | Data |
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b2441318 | 1 | # SPDX-License-Identifier: GPL-2.0 |
26a84b3e KVA |
2 | # |
3 | # Bus Devices | |
4 | # | |
5 | ||
6 | menu "Bus devices" | |
7 | ||
13fbf3c8 | 8 | config ARM_CCI |
47f36e49 OJ |
9 | bool |
10 | ||
11 | config ARM_CCI400_COMMON | |
12 | bool | |
13 | select ARM_CCI | |
14 | ||
47f36e49 OJ |
15 | config ARM_CCI400_PORT_CTRL |
16 | bool | |
13fbf3c8 | 17 | depends on ARM && OF && CPU_V7 |
47f36e49 | 18 | select ARM_CCI400_COMMON |
13fbf3c8 | 19 | help |
47f36e49 OJ |
20 | Low level power management driver for CCI400 cache coherent |
21 | interconnect for ARM platforms. | |
13fbf3c8 | 22 | |
44127b77 FF |
23 | config BRCMSTB_GISB_ARB |
24 | bool "Broadcom STB GISB bus arbiter" | |
8c7aa17a | 25 | depends on ARM || ARM64 || MIPS |
b0ec633c | 26 | default ARCH_BRCMSTB || BMIPS_GENERIC |
44127b77 FF |
27 | help |
28 | Driver for the Broadcom Set Top Box System-on-a-chip internal bus | |
29 | arbiter. This driver provides timeout and target abort error handling | |
30 | and internal bus master decoding. | |
31 | ||
63cb7713 SS |
32 | config BT1_AXI |
33 | tristate "Baikal-T1 AXI-bus driver" | |
34 | depends on MIPS_BAIKAL_T1 || COMPILE_TEST | |
35 | select MFD_SYSCON | |
36 | help | |
37 | AXI3-bus is the main communication bus connecting all high-speed | |
38 | peripheral IP-cores with RAM controller and with MIPS P5600 cores on | |
39 | Baikal-T1 SoC. Traffic arbitration is done by means of DW AMBA 3 AXI | |
40 | Interconnect (so called AXI Main Interconnect) routing IO requests | |
41 | from one SoC block to another. This driver provides a way to detect | |
42 | any bus protocol errors and device not responding situations by | |
43 | means of an embedded on top of the interconnect errors handler | |
44 | block (EHB). AXI Interconnect QoS arbitration tuning is currently | |
45 | unsupported. | |
46 | ||
5bc7f990 MB |
47 | config MOXTET |
48 | tristate "CZ.NIC Turris Mox module configuration bus" | |
49 | depends on SPI_MASTER && OF | |
50 | help | |
51 | Say yes here to add support for the module configuration bus found | |
52 | on CZ.NIC's Turris Mox. This is needed for the ability to discover | |
53 | the order in which the modules are connected and to get/set some of | |
54 | their settings. For example the GPIOs on Mox SFP module are | |
55 | configured through this bus. | |
56 | ||
adf38bb0 ZY |
57 | config HISILICON_LPC |
58 | bool "Support for ISA I/O space on HiSilicon Hip06/7" | |
3e5cd20d JG |
59 | depends on (ARM64 && ARCH_HISI) || (COMPILE_TEST && !ALPHA && !HEXAGON && !PARISC && !C6X) |
60 | depends on HAS_IOMEM | |
61 | select INDIRECT_PIO if ARM64 | |
adf38bb0 ZY |
62 | help |
63 | Driver to enable I/O access to devices attached to the Low Pin | |
64 | Count bus on the HiSilicon Hip06/7 SoC. | |
65 | ||
85bf6d4e HS |
66 | config IMX_WEIM |
67 | bool "Freescale EIM DRIVER" | |
68 | depends on ARCH_MXC | |
69 | help | |
3f98b6ba | 70 | Driver for i.MX WEIM controller. |
85bf6d4e HS |
71 | The WEIM(Wireless External Interface Module) works like a bus. |
72 | You can attach many different devices on it, such as NOR, onenand. | |
85bf6d4e | 73 | |
8286ae03 JH |
74 | config MIPS_CDMM |
75 | bool "MIPS Common Device Memory Map (CDMM) Driver" | |
76 | depends on CPU_MIPSR2 | |
77 | help | |
78 | Driver needed for the MIPS Common Device Memory Map bus in MIPS | |
79 | cores. This bus is for per-CPU tightly coupled devices such as the | |
80 | Fast Debug Channel (FDC). | |
81 | ||
82 | For this to work, either your bootloader needs to enable the CDMM | |
83 | region at an unused physical address on the boot CPU, or else your | |
84 | platform code needs to implement mips_cdmm_phys_base() (see | |
85 | asm/cdmm.h). | |
86 | ||
fddddb52 TP |
87 | config MVEBU_MBUS |
88 | bool | |
89 | depends on PLAT_ORION | |
90 | help | |
91 | Driver needed for the MBus configuration on Marvell EBU SoCs | |
92 | (Kirkwood, Dove, Orion5x, MV78XX0 and Armada 370/XP). | |
93 | ||
0ee7261c SS |
94 | config OMAP_INTERCONNECT |
95 | tristate "OMAP INTERCONNECT DRIVER" | |
96 | depends on ARCH_OMAP2PLUS | |
97 | ||
98 | help | |
99 | Driver to enable OMAP interconnect error handling driver. | |
ed69bdd8 | 100 | |
13fbf3c8 GU |
101 | config OMAP_OCP2SCP |
102 | tristate "OMAP OCP2SCP DRIVER" | |
103 | depends on ARCH_OMAP2PLUS | |
ed69bdd8 | 104 | help |
13fbf3c8 GU |
105 | Driver to enable ocp2scp module which transforms ocp interface |
106 | protocol to scp protocol. In OMAP4, USB PHY is connected via | |
107 | OCP2SCP and in OMAP5, both USB PHY and SATA PHY is connected via | |
108 | OCP2SCP. | |
3b9334ac | 109 | |
335a1275 LW |
110 | config QCOM_EBI2 |
111 | bool "Qualcomm External Bus Interface 2 (EBI2)" | |
d6db68b2 | 112 | depends on HAS_IOMEM |
5fac7e84 | 113 | depends on ARCH_QCOM || COMPILE_TEST |
c5d8ccfe | 114 | default ARCH_QCOM |
335a1275 LW |
115 | help |
116 | Say y here to enable support for the Qualcomm External Bus | |
117 | Interface 2, which can be used to connect things like NAND Flash, | |
118 | SRAM, ethernet adapters, FPGAs and LCD displays. | |
119 | ||
89d463ea | 120 | config SIMPLE_PM_BUS |
a248efb3 | 121 | tristate "Simple Power-Managed Bus Driver" |
89d463ea | 122 | depends on OF && PM |
a33b0daa | 123 | help |
89d463ea GU |
124 | Driver for transparent busses that don't need a real driver, but |
125 | where the bus controller is part of a PM domain, or under the control | |
126 | of a functional clock, and thus relies on runtime PM for managing | |
127 | this PM domain and/or clock. | |
128 | An example of such a bus controller is the Renesas Bus State | |
129 | Controller (BSC, sometimes called "LBSC within Bus Bridge", or | |
130 | "External Bus Interface") as found on several Renesas ARM SoCs. | |
a33b0daa | 131 | |
8818e865 IZ |
132 | config SUN50I_DE2_BUS |
133 | bool "Allwinner A64 DE2 Bus Driver" | |
134 | default ARM64 | |
135 | depends on ARCH_SUNXI | |
136 | select SUNXI_SRAM | |
137 | help | |
138 | Say y here to enable support for Allwinner A64 DE2 bus driver. It's | |
139 | mostly transparent, but a SRAM region needs to be claimed in the SRAM | |
140 | controller to make the all blocks in the DE2 part accessible. | |
141 | ||
d787dcdb CYT |
142 | config SUNXI_RSB |
143 | tristate "Allwinner sunXi Reduced Serial Bus Driver" | |
dc1a37b2 | 144 | default MACH_SUN8I || MACH_SUN9I || ARM64 |
d787dcdb CYT |
145 | depends on ARCH_SUNXI |
146 | select REGMAP | |
147 | help | |
148 | Say y here to enable support for Allwinner's Reduced Serial Bus | |
149 | (RSB) support. This controller is responsible for communicating | |
150 | with various RSB based devices, such as AXP223, AXP8XX PMICs, | |
151 | and AC100/AC200 ICs. | |
152 | ||
46a88534 | 153 | config TEGRA_ACONNECT |
2d301c07 | 154 | tristate "Tegra ACONNECT Bus Driver" |
46a88534 JH |
155 | depends on ARCH_TEGRA_210_SOC |
156 | depends on OF && PM | |
46a88534 JH |
157 | help |
158 | Driver for the Tegra ACONNECT bus which is used to interface with | |
159 | the devices inside the Audio Processing Engine (APE) for Tegra210. | |
160 | ||
40eb4776 MK |
161 | config TEGRA_GMI |
162 | tristate "Tegra Generic Memory Interface bus driver" | |
163 | depends on ARCH_TEGRA | |
164 | help | |
165 | Driver for the Tegra Generic Memory Interface bus which can be used | |
166 | to attach devices such as NOR, UART, FPGA and more. | |
167 | ||
7cabf925 DL |
168 | config TI_PWMSS |
169 | bool | |
f213729f | 170 | default y if (ARCH_OMAP2PLUS) && (PWM_TIECAP || PWM_TIEHRPWM || TI_EQEP) |
7cabf925 DL |
171 | help |
172 | PWM Subsystem driver support for AM33xx SOC. | |
173 | ||
174 | PWM submodules require PWM config space access from submodule | |
175 | drivers and require common parent driver support. | |
176 | ||
0eecc636 TL |
177 | config TI_SYSC |
178 | bool "TI sysc interconnect target module driver" | |
179 | depends on ARCH_OMAP2PLUS | |
180 | help | |
181 | Generic driver for Texas Instruments interconnect target module | |
182 | found on many TI SoCs. | |
183 | ||
5b143d2a SB |
184 | config TS_NBUS |
185 | tristate "Technologic Systems NBUS Driver" | |
186 | depends on SOC_IMX28 | |
187 | depends on OF_GPIO && PWM | |
188 | help | |
189 | Driver for the Technologic Systems NBUS which is used to interface | |
190 | with the peripherals in the FPGA of the TS-4600 SoM. | |
191 | ||
4b7f48d3 | 192 | config UNIPHIER_SYSTEM_BUS |
047a555f | 193 | tristate "UniPhier System Bus driver" |
4b7f48d3 MY |
194 | depends on ARCH_UNIPHIER && OF |
195 | default y | |
196 | help | |
197 | Support for UniPhier System Bus, a simple external bus. This is | |
198 | needed to use on-board devices connected to UniPhier SoCs. | |
199 | ||
3b9334ac PM |
200 | config VEXPRESS_CONFIG |
201 | bool "Versatile Express configuration bus" | |
202 | default y if ARCH_VEXPRESS | |
203 | depends on ARM || ARM64 | |
b33cdd28 | 204 | depends on OF |
3b9334ac PM |
205 | select REGMAP |
206 | help | |
207 | Platform configuration infrastructure for the ARM Ltd. | |
208 | Versatile Express. | |
8e7223fc BG |
209 | |
210 | config DA8XX_MSTPRI | |
211 | bool "TI da8xx master peripheral priority driver" | |
212 | depends on ARCH_DAVINCI_DA8XX | |
213 | help | |
214 | Driver for Texas Instruments da8xx master peripheral priority | |
215 | configuration. Allows to adjust the priorities of all master | |
216 | peripherals. | |
217 | ||
6bd067c4 | 218 | source "drivers/bus/fsl-mc/Kconfig" |
0cbf2608 | 219 | source "drivers/bus/mhi/Kconfig" |
6bd067c4 | 220 | |
26a84b3e | 221 | endmenu |