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Merge tag 'gpmc-omap-for-v4.1' of git://github.com/rogerq/linux into next/drivers
[mirror_ubuntu-bionic-kernel.git] / drivers / bus / Kconfig
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1#
2# Bus Devices
3#
4
5menu "Bus devices"
6
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7config ARM_CCI
8 bool "ARM CCI driver support"
9 depends on ARM && OF && CPU_V7
10 help
11 Driver supporting the CCI cache coherent interconnect for ARM
12 platforms.
13
14config ARM_CCN
15 bool "ARM CCN driver support"
16 depends on ARM || ARM64
17 depends on PERF_EVENTS
18 help
19 PMU (perf) driver supporting the ARM CCN (Cache Coherent Network)
20 interconnect.
21
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22config BRCMSTB_GISB_ARB
23 bool "Broadcom STB GISB bus arbiter"
dd1d78a1 24 depends on ARM || MIPS
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25 help
26 Driver for the Broadcom Set Top Box System-on-a-chip internal bus
27 arbiter. This driver provides timeout and target abort error handling
28 and internal bus master decoding.
29
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30config IMX_WEIM
31 bool "Freescale EIM DRIVER"
32 depends on ARCH_MXC
33 help
3f98b6ba 34 Driver for i.MX WEIM controller.
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35 The WEIM(Wireless External Interface Module) works like a bus.
36 You can attach many different devices on it, such as NOR, onenand.
85bf6d4e 37
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38config MVEBU_MBUS
39 bool
40 depends on PLAT_ORION
41 help
42 Driver needed for the MBus configuration on Marvell EBU SoCs
43 (Kirkwood, Dove, Orion5x, MV78XX0 and Armada 370/XP).
44
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45config OMAP_INTERCONNECT
46 tristate "OMAP INTERCONNECT DRIVER"
47 depends on ARCH_OMAP2PLUS
48
49 help
50 Driver to enable OMAP interconnect error handling driver.
ed69bdd8 51
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52config OMAP_OCP2SCP
53 tristate "OMAP OCP2SCP DRIVER"
54 depends on ARCH_OMAP2PLUS
a33b0daa 55 help
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56 Driver to enable ocp2scp module which transforms ocp interface
57 protocol to scp protocol. In OMAP4, USB PHY is connected via
58 OCP2SCP and in OMAP5, both USB PHY and SATA PHY is connected via
59 OCP2SCP.
a33b0daa 60
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61config SIMPLE_PM_BUS
62 bool "Simple Power-Managed Bus Driver"
63 depends on OF && PM
64 depends on ARCH_SHMOBILE || COMPILE_TEST
65 help
66 Driver for transparent busses that don't need a real driver, but
67 where the bus controller is part of a PM domain, or under the control
68 of a functional clock, and thus relies on runtime PM for managing
69 this PM domain and/or clock.
70 An example of such a bus controller is the Renesas Bus State
71 Controller (BSC, sometimes called "LBSC within Bus Bridge", or
72 "External Bus Interface") as found on several Renesas ARM SoCs.
73
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74config VEXPRESS_CONFIG
75 bool "Versatile Express configuration bus"
76 default y if ARCH_VEXPRESS
77 depends on ARM || ARM64
b33cdd28 78 depends on OF
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79 select REGMAP
80 help
81 Platform configuration infrastructure for the ARM Ltd.
82 Versatile Express.
26a84b3e 83endmenu