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77588085 | 1 | /* |
2 | * Copyright (C) 2017 Hisilicon Limited, All Rights Reserved. | |
3 | * Author: Zhichang Yuan <yuanzhichang@hisilicon.com> | |
4 | * Author: Zou Rongrong <zourongrong@huawei.com> | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License version 2 as | |
8 | * published by the Free Software Foundation. | |
9 | * | |
10 | * This program is distributed in the hope that it will be useful, | |
11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
13 | * GNU General Public License for more details. | |
14 | * | |
15 | * You should have received a copy of the GNU General Public License | |
16 | * along with this program. If not, see <http://www.gnu.org/licenses/>. | |
17 | */ | |
18 | ||
19 | #include <linux/acpi.h> | |
20 | #include <linux/console.h> | |
21 | #include <linux/delay.h> | |
22 | #include <linux/io.h> | |
7f175157 | 23 | #include <linux/libio.h> |
77588085 | 24 | #include <linux/module.h> |
25 | #include <linux/of.h> | |
26 | #include <linux/of_address.h> | |
27 | #include <linux/of_platform.h> | |
28 | #include <linux/pci.h> | |
29 | #include <linux/serial_8250.h> | |
30 | #include <linux/slab.h> | |
31 | ||
32 | /* | |
33 | * Setting this bit means each IO operation will target to a | |
34 | * different port address: | |
35 | * 0 means repeatedly IO operations will stick on the same port, | |
36 | * such as BT; | |
37 | */ | |
38 | #define FG_INCRADDR_LPC 0x02 | |
39 | ||
40 | struct lpc_cycle_para { | |
41 | unsigned int opflags; | |
42 | unsigned int csize; /* the data length of each operation */ | |
43 | }; | |
44 | ||
45 | struct hisilpc_dev { | |
46 | spinlock_t cycle_lock; | |
47 | void __iomem *membase; | |
48 | struct libio_range *io_host; | |
49 | }; | |
50 | ||
51 | /* bounds of the LPC bus address range */ | |
52 | #define LPC_MIN_BUS_RANGE 0x0 | |
53 | ||
54 | /* | |
55 | * The default maximal IO size for Hip06/Hip07 LPC bus. | |
56 | * Defining the I/O range size as 0x400 here should be sufficient for | |
57 | * all peripherals under the bus. | |
58 | */ | |
59 | #define LPC_BUS_IO_SIZE 0x400 | |
60 | ||
61 | /* The maximum continuous cycles per burst */ | |
62 | #define LPC_MAX_BURST 16 | |
63 | /* The IO cycle counts supported is four per operation at maximum */ | |
64 | #define LPC_MAX_DULEN 4 | |
65 | #if LPC_MAX_DULEN > LPC_MAX_BURST | |
66 | #error "LPC.. MAX_DULEN must be not bigger than MAX_OPCNT!" | |
67 | #endif | |
68 | ||
69 | #if LPC_MAX_BURST % LPC_MAX_DULEN | |
70 | #error "LPC.. LPC_MAX_BURST must be multiple of LPC_MAX_DULEN!" | |
71 | #endif | |
72 | ||
73 | #define LPC_REG_START 0x00 /* start a new LPC cycle */ | |
74 | #define LPC_REG_OP_STATUS 0x04 /* the current LPC status */ | |
75 | #define LPC_REG_IRQ_ST 0x08 /* interrupt enable&status */ | |
76 | #define LPC_REG_OP_LEN 0x10 /* how many LPC cycles each start */ | |
77 | #define LPC_REG_CMD 0x14 /* command for the required LPC cycle */ | |
78 | #define LPC_REG_ADDR 0x20 /* LPC target address */ | |
79 | #define LPC_REG_WDATA 0x24 /* data to be written */ | |
80 | #define LPC_REG_RDATA 0x28 /* data coming from peer */ | |
81 | ||
82 | ||
83 | /* The command register fields */ | |
84 | #define LPC_CMD_SAMEADDR 0x08 | |
85 | #define LPC_CMD_TYPE_IO 0x00 | |
86 | #define LPC_CMD_WRITE 0x01 | |
87 | #define LPC_CMD_READ 0x00 | |
88 | /* the bit attribute is W1C. 1 represents OK. */ | |
89 | #define LPC_STAT_BYIRQ 0x02 | |
90 | ||
91 | #define LPC_STATUS_IDLE 0x01 | |
92 | #define LPC_OP_FINISHED 0x02 | |
93 | ||
94 | #define START_WORK 0x01 | |
95 | ||
96 | /* | |
97 | * The minimal nanosecond interval for each query on LPC cycle status. | |
98 | */ | |
99 | #define LPC_NSEC_PERWAIT 100 | |
100 | /* | |
101 | * The maximum waiting time is about 128us. | |
102 | * It is specific for stream I/O, such as ins. | |
103 | * The fastest IO cycle time is about 390ns, but the worst case will wait | |
104 | * for extra 256 lpc clocks, so (256 + 13) * 30ns = 8 us. The maximum | |
105 | * burst cycles is 16. So, the maximum waiting time is about 128us under | |
106 | * worst case. | |
107 | * choose 1300 as the maximum. | |
108 | */ | |
109 | #define LPC_MAX_WAITCNT 1300 | |
110 | /* About 10us. This is specific for single IO operation, such as inb. */ | |
111 | #define LPC_PEROP_WAITCNT 100 | |
112 | ||
113 | ||
114 | static inline int wait_lpc_idle(unsigned char *mbase, | |
115 | unsigned int waitcnt) { | |
116 | u32 opstatus; | |
117 | ||
118 | while (waitcnt--) { | |
119 | ndelay(LPC_NSEC_PERWAIT); | |
120 | opstatus = readl(mbase + LPC_REG_OP_STATUS); | |
121 | if (opstatus & LPC_STATUS_IDLE) | |
122 | return (opstatus & LPC_OP_FINISHED) ? 0 : (-EIO); | |
123 | } | |
124 | return -ETIME; | |
125 | } | |
126 | ||
127 | /* | |
128 | * hisilpc_target_in - trigger a series of lpc cycles to read required data | |
129 | * from target peripheral. | |
130 | * @pdev: pointer to hisi lpc device | |
131 | * @para: some parameters used to control the lpc I/O operations | |
132 | * @ptaddr: the lpc I/O target port address | |
133 | * @buf: where the read back data is stored | |
134 | * @opcnt: how many I/O operations required in this calling | |
135 | * | |
136 | * Only one byte data is read each I/O operation. | |
137 | * | |
138 | * Returns 0 on success, non-zero on fail. | |
139 | * | |
140 | */ | |
141 | static int | |
142 | hisilpc_target_in(struct hisilpc_dev *lpcdev, struct lpc_cycle_para *para, | |
143 | unsigned long ptaddr, unsigned char *buf, | |
144 | unsigned long opcnt) | |
145 | { | |
146 | unsigned long cnt_per_trans; | |
147 | unsigned int cmd_word; | |
148 | unsigned int waitcnt; | |
149 | int ret; | |
150 | ||
151 | if (!buf || !opcnt || !para || !para->csize || !lpcdev) | |
152 | return -EINVAL; | |
153 | ||
154 | cmd_word = LPC_CMD_TYPE_IO | LPC_CMD_READ; | |
155 | waitcnt = LPC_PEROP_WAITCNT; | |
156 | if (!(para->opflags & FG_INCRADDR_LPC)) { | |
157 | cmd_word |= LPC_CMD_SAMEADDR; | |
158 | waitcnt = LPC_MAX_WAITCNT; | |
159 | } | |
160 | ||
161 | ret = 0; | |
162 | cnt_per_trans = (para->csize == 1) ? opcnt : para->csize; | |
163 | for (; opcnt && !ret; cnt_per_trans = para->csize) { | |
164 | unsigned long flags; | |
165 | ||
166 | /* whole operation must be atomic */ | |
167 | spin_lock_irqsave(&lpcdev->cycle_lock, flags); | |
168 | ||
169 | writel_relaxed(cnt_per_trans, lpcdev->membase + LPC_REG_OP_LEN); | |
170 | ||
171 | writel_relaxed(cmd_word, lpcdev->membase + LPC_REG_CMD); | |
172 | ||
173 | writel_relaxed(ptaddr, lpcdev->membase + LPC_REG_ADDR); | |
174 | ||
175 | writel(START_WORK, lpcdev->membase + LPC_REG_START); | |
176 | ||
177 | /* whether the operation is finished */ | |
178 | ret = wait_lpc_idle(lpcdev->membase, waitcnt); | |
179 | if (!ret) { | |
180 | opcnt -= cnt_per_trans; | |
181 | for (cnt_per_trans--; cnt_per_trans--; buf++) | |
182 | *buf = readb_relaxed(lpcdev->membase + | |
183 | LPC_REG_RDATA); | |
184 | *buf = readb(lpcdev->membase + LPC_REG_RDATA); | |
185 | } | |
186 | ||
187 | spin_unlock_irqrestore(&lpcdev->cycle_lock, flags); | |
188 | } | |
189 | ||
190 | return ret; | |
191 | } | |
192 | ||
193 | /* | |
194 | * hisilpc_target_out - trigger a series of lpc cycles to write required | |
195 | * data to target peripheral. | |
196 | * @pdev: pointer to hisi lpc device | |
197 | * @para: some parameters used to control the lpc I/O operations | |
198 | * @ptaddr: the lpc I/O target port address | |
199 | * @buf: where the data to be written is stored | |
200 | * @opcnt: how many I/O operations required | |
201 | * | |
202 | * Only one byte data is read each I/O operation. | |
203 | * | |
204 | * Returns 0 on success, non-zero on fail. | |
205 | * | |
206 | */ | |
207 | static int | |
208 | hisilpc_target_out(struct hisilpc_dev *lpcdev, struct lpc_cycle_para *para, | |
209 | unsigned long ptaddr, const unsigned char *buf, | |
210 | unsigned long opcnt) | |
211 | { | |
212 | unsigned long cnt_per_trans; | |
213 | unsigned int cmd_word; | |
214 | unsigned int waitcnt; | |
215 | int ret; | |
216 | ||
217 | if (!buf || !opcnt || !para || !lpcdev) | |
218 | return -EINVAL; | |
219 | ||
220 | /* default is increasing address */ | |
221 | cmd_word = LPC_CMD_TYPE_IO | LPC_CMD_WRITE; | |
222 | waitcnt = LPC_PEROP_WAITCNT; | |
223 | if (!(para->opflags & FG_INCRADDR_LPC)) { | |
224 | cmd_word |= LPC_CMD_SAMEADDR; | |
225 | waitcnt = LPC_MAX_WAITCNT; | |
226 | } | |
227 | ||
228 | ret = 0; | |
229 | cnt_per_trans = (para->csize == 1) ? opcnt : para->csize; | |
230 | for (; opcnt && !ret; cnt_per_trans = para->csize) { | |
231 | unsigned long flags; | |
232 | ||
233 | spin_lock_irqsave(&lpcdev->cycle_lock, flags); | |
234 | ||
235 | writel_relaxed(cnt_per_trans, lpcdev->membase + LPC_REG_OP_LEN); | |
236 | writel_relaxed(cmd_word, lpcdev->membase + LPC_REG_CMD); | |
237 | writel_relaxed(ptaddr, lpcdev->membase + LPC_REG_ADDR); | |
238 | ||
239 | opcnt -= cnt_per_trans; | |
240 | for (; cnt_per_trans--; buf++) | |
241 | writeb_relaxed(*buf, lpcdev->membase + LPC_REG_WDATA); | |
242 | ||
243 | writel(START_WORK, lpcdev->membase + LPC_REG_START); | |
244 | ||
245 | /* whether the operation is finished */ | |
246 | ret = wait_lpc_idle(lpcdev->membase, waitcnt); | |
247 | ||
248 | spin_unlock_irqrestore(&lpcdev->cycle_lock, flags); | |
249 | } | |
250 | ||
251 | return ret; | |
252 | } | |
253 | ||
254 | static inline unsigned long | |
255 | hisi_lpc_pio_to_addr(struct hisilpc_dev *lpcdev, unsigned long pio) | |
256 | { | |
257 | return pio - lpcdev->io_host->io_start + lpcdev->io_host->hw_start; | |
258 | } | |
259 | ||
260 | ||
261 | /** | |
262 | * hisilpc_comm_in - read/input the data from the I/O peripheral | |
263 | * through LPC. | |
264 | * @devobj: pointer to the device information relevant to LPC controller. | |
265 | * @pio: the target I/O port address. | |
266 | * @dlen: the data length required to read from the target I/O port. | |
267 | * | |
268 | * when succeed, the data read back is stored in buffer pointed by inbuf. | |
269 | * For inb, return the data read from I/O or -1 when error occur. | |
270 | */ | |
271 | static u32 hisilpc_comm_in(void *devobj, unsigned long pio, size_t dlen) | |
272 | { | |
273 | int ret = 0; | |
274 | u32 rd_data; | |
275 | unsigned long ptaddr; | |
276 | unsigned char *newbuf; | |
277 | struct lpc_cycle_para iopara; | |
278 | struct hisilpc_dev *lpcdev = devobj; | |
279 | ||
280 | if (!lpcdev || !dlen || dlen > LPC_MAX_DULEN || (dlen & (dlen - 1))) | |
281 | return -1; | |
282 | ||
283 | /* the local buffer must be enough for one data unit */ | |
284 | if (sizeof(rd_data) < dlen) | |
285 | return -1; | |
286 | ||
287 | newbuf = (unsigned char *)&rd_data; | |
288 | ||
289 | ptaddr = hisi_lpc_pio_to_addr(lpcdev, pio); | |
290 | ||
291 | iopara.opflags = FG_INCRADDR_LPC; | |
292 | iopara.csize = dlen; | |
293 | ||
294 | ret = hisilpc_target_in(lpcdev, &iopara, ptaddr, newbuf, dlen); | |
295 | if (ret) | |
296 | return -1; | |
297 | ||
298 | return le32_to_cpu(rd_data); | |
299 | } | |
300 | ||
301 | /** | |
302 | * hisilpc_comm_out - output the data whose maximum length is four bytes | |
303 | to the I/O peripheral through the LPC host. | |
304 | * @devobj: pointer to the device information relevant to LPC controller. | |
305 | * @outval: a value to be outputted from caller, maximum is four bytes. | |
306 | * @pio: the target I/O port address. | |
307 | * @dlen: the data length required writing to the target I/O port. | |
308 | * | |
309 | * This function is corresponding to out(b,w,l) only | |
310 | * | |
311 | */ | |
312 | static void hisilpc_comm_out(void *devobj, unsigned long pio, | |
313 | u32 outval, size_t dlen) | |
314 | { | |
315 | unsigned long ptaddr; | |
316 | struct hisilpc_dev *lpcdev = devobj; | |
317 | struct lpc_cycle_para iopara; | |
318 | const unsigned char *newbuf; | |
319 | ||
320 | if (!lpcdev || !dlen || dlen > LPC_MAX_DULEN) | |
321 | return; | |
322 | ||
323 | if (sizeof(outval) < dlen) | |
324 | return; | |
325 | ||
326 | outval = cpu_to_le32(outval); | |
327 | ||
328 | newbuf = (const unsigned char *)&outval; | |
329 | ptaddr = hisi_lpc_pio_to_addr(lpcdev, pio); | |
330 | ||
331 | iopara.opflags = FG_INCRADDR_LPC; | |
332 | iopara.csize = dlen; | |
333 | ||
334 | hisilpc_target_out(lpcdev, &iopara, ptaddr, newbuf, dlen); | |
335 | } | |
336 | ||
337 | /* | |
338 | * hisilpc_comm_ins - read/input the data in buffer to the I/O | |
339 | * peripheral through LPC, it corresponds to ins(b,w,l) | |
340 | * @devobj: pointer to the device information relevant to LPC controller. | |
341 | * @pio: the target I/O port address. | |
342 | * @inbuf: a buffer where read/input data bytes are stored. | |
343 | * @dlen: the data length required writing to the target I/O port. | |
344 | * @count: how many data units whose length is dlen will be read. | |
345 | * | |
346 | */ | |
347 | static u32 | |
348 | hisilpc_comm_ins(void *devobj, unsigned long pio, void *inbuf, | |
349 | size_t dlen, unsigned int count) | |
350 | { | |
351 | struct hisilpc_dev *lpcdev = devobj; | |
352 | struct lpc_cycle_para iopara; | |
353 | unsigned char *newbuf; | |
354 | unsigned int loopcnt, cntleft; | |
355 | unsigned long ptaddr; | |
356 | ||
357 | if (!lpcdev || !inbuf || !count || !dlen || | |
358 | dlen > LPC_MAX_DULEN || (dlen & (dlen - 1)) || count % dlen) | |
359 | return -EINVAL; | |
360 | ||
361 | iopara.opflags = 0; | |
362 | if (dlen > 1) | |
363 | iopara.opflags |= FG_INCRADDR_LPC; | |
364 | iopara.csize = dlen; | |
365 | ||
366 | ptaddr = hisi_lpc_pio_to_addr(lpcdev, pio); | |
367 | newbuf = (unsigned char *)inbuf; | |
368 | /* | |
369 | * ensure data stream whose length is multiple of dlen to be processed | |
370 | * each IO input | |
371 | */ | |
372 | cntleft = count * dlen; | |
373 | do { | |
374 | int ret; | |
375 | ||
376 | loopcnt = (cntleft >= LPC_MAX_BURST) ? LPC_MAX_BURST : cntleft; | |
377 | ret = hisilpc_target_in(lpcdev, &iopara, ptaddr, | |
378 | newbuf, loopcnt); | |
379 | if (ret) | |
380 | return ret; | |
381 | newbuf += loopcnt; | |
382 | cntleft -= loopcnt; | |
383 | } while (cntleft); | |
384 | ||
385 | return 0; | |
386 | } | |
387 | ||
388 | /* | |
389 | * hisilpc_comm_outs - write/output the data in buffer to the I/O | |
390 | * peripheral through LPC, it corresponds to outs(b,w,l) | |
391 | * @devobj: pointer to the device information relevant to LPC controller. | |
392 | * @pio: the target I/O port address. | |
393 | * @outbuf: a buffer where write/output data bytes are stored. | |
394 | * @dlen: the data length required writing to the target I/O port . | |
395 | * @count: how many data units whose length is dlen will be written. | |
396 | * | |
397 | */ | |
398 | static void | |
399 | hisilpc_comm_outs(void *devobj, unsigned long pio, const void *outbuf, | |
400 | size_t dlen, unsigned int count) | |
401 | { | |
402 | struct hisilpc_dev *lpcdev = devobj; | |
403 | struct lpc_cycle_para iopara; | |
404 | const unsigned char *newbuf; | |
405 | unsigned int loopcnt, cntleft; | |
406 | unsigned long ptaddr; | |
407 | ||
408 | if (!lpcdev || !outbuf || !count || !dlen || | |
409 | dlen > LPC_MAX_DULEN || (dlen & (dlen - 1)) || count % dlen) | |
410 | return; | |
411 | ||
412 | iopara.opflags = 0; | |
413 | if (dlen > 1) | |
414 | iopara.opflags |= FG_INCRADDR_LPC; | |
415 | iopara.csize = dlen; | |
416 | ||
417 | ptaddr = hisi_lpc_pio_to_addr(lpcdev, pio); | |
418 | newbuf = (unsigned char *)outbuf; | |
419 | /* | |
420 | * ensure data stream whose length is multiple of dlen to be processed | |
421 | * each IO input | |
422 | */ | |
423 | cntleft = count * dlen; | |
424 | do { | |
425 | loopcnt = (cntleft >= LPC_MAX_BURST) ? LPC_MAX_BURST : cntleft; | |
426 | if (hisilpc_target_out(lpcdev, &iopara, ptaddr, newbuf, | |
427 | loopcnt)) | |
428 | break; | |
429 | newbuf += loopcnt; | |
430 | cntleft -= loopcnt; | |
431 | } while (cntleft); | |
432 | } | |
433 | ||
434 | static struct libio_ops hisi_lpc_ops = { | |
435 | .pfin = hisilpc_comm_in, | |
436 | .pfout = hisilpc_comm_out, | |
437 | .pfins = hisilpc_comm_ins, | |
438 | .pfouts = hisilpc_comm_outs, | |
439 | }; | |
440 | ||
441 | ||
442 | static int hisilpc_host_io_register(struct device *dev) | |
443 | { | |
444 | struct libio_range *range, *tmprange; | |
445 | ||
446 | /* | |
447 | * indirectIO bus was detected, time to request the linux virtual | |
448 | * IO. | |
449 | */ | |
450 | range = kzalloc(sizeof(*range), GFP_KERNEL); | |
451 | if (!range) | |
452 | return -ENOMEM; | |
453 | range->node = dev->fwnode; | |
454 | range->flags = IO_HOST_INDIRECT; | |
455 | range->size = LPC_BUS_IO_SIZE; | |
456 | range->hw_start = LPC_MIN_BUS_RANGE; | |
457 | ||
458 | tmprange = register_libio_range(range); | |
459 | if (tmprange != range) { | |
460 | kfree(range); | |
461 | if (IS_ERR(tmprange)) | |
462 | return -EFAULT; | |
463 | } | |
464 | ||
7f175157 | 465 | /* |
466 | * For ACPI children, translate the bus-local I/O range to logical | |
467 | * I/O range and set it as the current resource before the children | |
468 | * are enumerated. | |
469 | */ | |
470 | if (has_acpi_companion(dev)) { | |
471 | struct acpi_device *root, *child; | |
472 | ||
473 | root = to_acpi_device_node(dev->fwnode); | |
474 | /* For hisilpc, only care about the sons of host. */ | |
475 | list_for_each_entry(child, &root->children, node) { | |
476 | int ret; | |
477 | ||
478 | ret = acpi_set_libio_resource(&child->dev, &root->dev); | |
479 | if (ret) { | |
480 | dev_err(&child->dev, "set resource failed..\n"); | |
481 | return ret; | |
482 | } | |
483 | } | |
484 | } | |
485 | ||
77588085 | 486 | return 0; |
487 | } | |
488 | ||
489 | /** | |
490 | * hisilpc_probe - the probe callback function for hisi lpc device, | |
491 | * will finish all the initialization. | |
492 | * @pdev: the platform device corresponding to hisi lpc | |
493 | * | |
494 | * Returns 0 on success, non-zero on fail. | |
495 | * | |
496 | */ | |
497 | static int hisilpc_probe(struct platform_device *pdev) | |
498 | { | |
499 | struct device *dev = &pdev->dev; | |
500 | struct resource *res; | |
501 | struct hisilpc_dev *lpcdev; | |
502 | int ret = 0; | |
503 | ||
504 | dev_info(dev, "probing...\n"); | |
505 | ||
506 | lpcdev = devm_kzalloc(dev, sizeof(struct hisilpc_dev), GFP_KERNEL); | |
507 | if (!lpcdev) | |
508 | return -ENOMEM; | |
509 | ||
510 | spin_lock_init(&lpcdev->cycle_lock); | |
511 | ||
512 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | |
513 | if (!res) { | |
514 | dev_err(dev, "no MEM resource\n"); | |
515 | return -ENODEV; | |
516 | } | |
517 | ||
518 | lpcdev->membase = devm_ioremap_resource(dev, res); | |
519 | if (IS_ERR(lpcdev->membase)) { | |
520 | dev_err(dev, "remap failed\n"); | |
521 | return PTR_ERR(lpcdev->membase); | |
522 | } | |
523 | ||
524 | lpcdev->io_host = find_io_range_from_fwnode(dev->fwnode); | |
525 | if (!lpcdev->io_host) { | |
526 | dev_err(dev, "Hisilpc IO hasn't registered!\n"); | |
527 | return -EFAULT; | |
528 | } | |
529 | ||
530 | lpcdev->io_host->devpara = lpcdev; | |
531 | lpcdev->io_host->ops = &hisi_lpc_ops; | |
532 | ||
533 | platform_set_drvdata(pdev, lpcdev); | |
534 | ||
535 | /* | |
536 | * It is time to start the children scannings.... | |
537 | */ | |
538 | if (!has_acpi_companion(dev)) { | |
539 | ret = of_platform_populate(dev->of_node, NULL, NULL, dev); | |
540 | if (ret) | |
541 | dev_err(dev, "OF: enumerate LPC bus fail(%d)\n", ret); | |
542 | } | |
543 | ||
544 | if (!ret) { | |
545 | dev_info(dev, "hslpc end probing. range[%pa - sz:%pa]\n", | |
546 | &lpcdev->io_host->io_start, | |
547 | &lpcdev->io_host->size); | |
548 | } else { | |
549 | dev_info(dev, "hslpc probing is fail(%d)\n", ret); | |
550 | /* | |
551 | * When LPC probing is not completely successful, set 'devpara' | |
552 | * as NULL. This will make all the LPC I/O return failure | |
553 | * directly without any hardware operations. It will block | |
554 | * some peripherals which had not finished the initialization | |
555 | * manipulate I/O for safety. | |
556 | */ | |
557 | lpcdev->io_host->devpara = NULL; | |
558 | } | |
559 | ||
560 | return ret; | |
561 | } | |
562 | ||
563 | static const struct of_device_id hisilpc_of_match[] = { | |
564 | { .compatible = "hisilicon,hip06-lpc", }, | |
565 | { .compatible = "hisilicon,hip07-lpc", }, | |
566 | {}, | |
567 | }; | |
568 | ||
7f175157 | 569 | static const struct acpi_device_id hisilpc_acpi_match[] = { |
570 | {"HISI0191", }, | |
571 | {}, | |
572 | }; | |
573 | ||
77588085 | 574 | static struct platform_driver hisilpc_driver = { |
575 | .driver = { | |
576 | .name = "hisi_lpc", | |
577 | .of_match_table = hisilpc_of_match, | |
7f175157 | 578 | .acpi_match_table = ACPI_PTR(hisilpc_acpi_match), |
77588085 | 579 | }, |
580 | .probe = hisilpc_probe, | |
581 | }; | |
582 | ||
583 | /* | |
584 | * hisilpc_bus_platform_notify -- notify callback function specific for | |
585 | * hisi-lpc bus. Here, will register linux virtual | |
586 | * PIO for the bus detected, then the bus children | |
587 | * can translate their bus-local IO to linux PIO. | |
588 | */ | |
589 | static int hisilpc_bus_platform_notify(struct notifier_block *nb, | |
590 | unsigned long action, void *data) | |
591 | { | |
592 | struct device *dev = data; | |
593 | int ret; | |
594 | ||
595 | if (!is_of_node(dev->fwnode) && !is_acpi_node(dev->fwnode)) | |
596 | return NOTIFY_DONE; | |
597 | ||
598 | if (action != BUS_NOTIFY_ADD_DEVICE) | |
599 | return NOTIFY_DONE; | |
600 | ||
601 | /* whether the device notified is hisi-lpc? */ | |
602 | if (has_acpi_companion(dev)) { | |
603 | if (!acpi_match_device(hisilpc_acpi_match, dev)) | |
604 | return NOTIFY_DONE; | |
605 | } else { | |
606 | if (!of_match_node(hisilpc_of_match, dev->of_node)) | |
607 | return NOTIFY_DONE; | |
608 | } | |
609 | ||
610 | /* register the LPC host PIO resources */ | |
611 | ret = hisilpc_host_io_register(dev); | |
612 | if (ret) { | |
613 | dev_err(dev, "host PIO registration failed!\n"); | |
614 | return NOTIFY_DONE; | |
615 | } | |
616 | ||
617 | dev_info(dev, "hisilpc notifier processes OK!\n"); | |
618 | return NOTIFY_OK; | |
619 | } | |
620 | ||
621 | static struct notifier_block hisilpc_preinit_nb = { | |
622 | .notifier_call = hisilpc_bus_platform_notify, | |
623 | }; | |
624 | ||
625 | static int __init hisilpc_init(void) | |
626 | { | |
627 | int ret; | |
628 | ||
629 | ret = bus_register_notifier(&platform_bus_type, &hisilpc_preinit_nb); | |
630 | if (!ret) | |
631 | ret = platform_driver_register(&hisilpc_driver); | |
632 | ||
633 | return ret; | |
634 | } | |
635 | ||
636 | /* | |
637 | * This initial funtion must be called before the platform bus scanning to make | |
638 | * the lpc-relevant I/O resource is ready for the device enumeration. | |
639 | */ | |
640 | arch_initcall(hisilpc_init); |