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bus: ti-sysc: Fix module register ioremap for larger offsets
[mirror_ubuntu-jammy-kernel.git] / drivers / bus / ti-sysc.c
CommitLineData
0eecc636
TL		 1/*
2 * ti-sysc.c - Texas Instruments sysc interconnect target driver
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 *
8 * This program is distributed "as is" WITHOUT ANY WARRANTY of any
9 * kind, whether express or implied; without even the implied warranty
10 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 */
13
14#include <linux/io.h>
15#include <linux/clk.h>
2c355ff6 16#include <linux/clkdev.h>
a885f0fe 17#include <linux/delay.h>
0eecc636
TL		 18#include <linux/module.h>
19#include <linux/platform_device.h>
a885f0fe 20#include <linux/pm_domain.h>
0eecc636 21#include <linux/pm_runtime.h>
5062236e 22#include <linux/reset.h>
0eecc636
TL		 23#include <linux/of_address.h>
24#include <linux/of_platform.h>
2c355ff6
TL		 25#include <linux/slab.h>
26
70a65240
TL		 27#include <linux/platform_data/ti-sysc.h>
28
29#include <dt-bindings/bus/ti-sysc.h>
0eecc636 30
0eecc636
TL		 31static const char * const reg_names[] = { "rev", "sysc", "syss", };
32
33enum sysc_clocks {
34 SYSC_FCK,
35 SYSC_ICK,
09dfe581
TL		 36 SYSC_OPTFCK0,
37 SYSC_OPTFCK1,
38 SYSC_OPTFCK2,
39 SYSC_OPTFCK3,
40 SYSC_OPTFCK4,
41 SYSC_OPTFCK5,
42 SYSC_OPTFCK6,
43 SYSC_OPTFCK7,
0eecc636
TL		 44 SYSC_MAX_CLOCKS,
45};
46
09dfe581 47static const char * const clock_names[SYSC_ICK + 1] = { "fck", "ick", };
0eecc636 48
c5a2de97
TL		 49#define SYSC_IDLEMODE_MASK 3
50#define SYSC_CLOCKACTIVITY_MASK 3
51
0eecc636
TL		 52/**
53 * struct sysc - TI sysc interconnect target module registers and capabilities
54 * @dev: struct device pointer
55 * @module_pa: physical address of the interconnect target module
56 * @module_size: size of the interconnect target module
57 * @module_va: virtual address of the interconnect target module
58 * @offsets: register offsets from module base
59 * @clocks: clocks used by the interconnect target module
09dfe581
TL		 60 * @clock_roles: clock role names for the found clocks
61 * @nr_clocks: number of clocks used by the interconnect target module
0eecc636 62 * @legacy_mode: configured for legacy mode if set
70a65240
TL		 63 * @cap: interconnect target module capabilities
64 * @cfg: interconnect target module configuration
566a9b05
TL		 65 * @name: name if available
66 * @revision: interconnect target module revision
62020f23 67 * @needs_resume: runtime resume needed on resume from suspend
0eecc636
TL		 68 */
69struct sysc {
70 struct device *dev;
71 u64 module_pa;
72 u32 module_size;
73 void __iomem *module_va;
74 int offsets[SYSC_MAX_REGS];
09dfe581
TL		 75 struct clk **clocks;
76 const char **clock_roles;
77 int nr_clocks;
5062236e 78 struct reset_control *rsts;
0eecc636 79 const char *legacy_mode;
70a65240
TL		 80 const struct sysc_capabilities *cap;
81 struct sysc_config cfg;
ef70b0bd 82 struct ti_sysc_cookie cookie;
566a9b05
TL		 83 const char *name;
84 u32 revision;
62020f23
TL		 85 bool enabled;
86 bool needs_resume;
a885f0fe 87 bool child_needs_resume;
76f0f772 88 struct delayed_work idle_work;
0eecc636
TL		 89};
90
566a9b05
TL		 91static u32 sysc_read(struct sysc *ddata, int offset)
92{
93 if (ddata->cfg.quirks & SYSC_QUIRK_16BIT) {
94 u32 val;
95
96 val = readw_relaxed(ddata->module_va + offset);
97 val |= (readw_relaxed(ddata->module_va + offset + 4) << 16);
98
99 return val;
100 }
101
102 return readl_relaxed(ddata->module_va + offset);
103}
104
09dfe581
TL		 105static bool sysc_opt_clks_needed(struct sysc *ddata)
106{
107 return !!(ddata->cfg.quirks & SYSC_QUIRK_OPT_CLKS_NEEDED);
108}
109
0eecc636
TL		 110static u32 sysc_read_revision(struct sysc *ddata)
111{
566a9b05
TL		 112 int offset = ddata->offsets[SYSC_REVISION];
113
114 if (offset < 0)
115 return 0;
116
117 return sysc_read(ddata, offset);
0eecc636
TL		 118}
119
09dfe581 120static int sysc_get_one_clock(struct sysc *ddata, const char *name)
0eecc636 121{
09dfe581
TL		 122 int error, i, index = -ENODEV;
123
124 if (!strncmp(clock_names[SYSC_FCK], name, 3))
125 index = SYSC_FCK;
126 else if (!strncmp(clock_names[SYSC_ICK], name, 3))
127 index = SYSC_ICK;
128
129 if (index < 0) {
130 for (i = SYSC_OPTFCK0; i < SYSC_MAX_CLOCKS; i++) {
c97c8620 131 if (!ddata->clocks[i]) {
09dfe581
TL		 132 index = i;
133 break;
134 }
135 }
136 }
0eecc636 137
09dfe581
TL		 138 if (index < 0) {
139 dev_err(ddata->dev, "clock %s not added\n", name);
140 return index;
0eecc636 141 }
0eecc636
TL		 142
143 ddata->clocks[index] = devm_clk_get(ddata->dev, name);
144 if (IS_ERR(ddata->clocks[index])) {
145 if (PTR_ERR(ddata->clocks[index]) == -ENOENT)
146 return 0;
147
148 dev_err(ddata->dev, "clock get error for %s: %li\n",
149 name, PTR_ERR(ddata->clocks[index]));
150
151 return PTR_ERR(ddata->clocks[index]);
152 }
153
154 error = clk_prepare(ddata->clocks[index]);
155 if (error) {
156 dev_err(ddata->dev, "clock prepare error for %s: %i\n",
157 name, error);
158
159 return error;
160 }
161
162 return 0;
163}
164
165static int sysc_get_clocks(struct sysc *ddata)
166{
09dfe581
TL		 167 struct device_node *np = ddata->dev->of_node;
168 struct property *prop;
169 const char *name;
170 int nr_fck = 0, nr_ick = 0, i, error = 0;
171
20749051 172 ddata->clock_roles = devm_kcalloc(ddata->dev,
09dfe581 173 SYSC_MAX_CLOCKS,
20749051 174 sizeof(*ddata->clock_roles),
09dfe581
TL		 175 GFP_KERNEL);
176 if (!ddata->clock_roles)
177 return -ENOMEM;
178
179 of_property_for_each_string(np, "clock-names", prop, name) {
180 if (!strncmp(clock_names[SYSC_FCK], name, 3))
181 nr_fck++;
182 if (!strncmp(clock_names[SYSC_ICK], name, 3))
183 nr_ick++;
184 ddata->clock_roles[ddata->nr_clocks] = name;
185 ddata->nr_clocks++;
186 }
187
188 if (ddata->nr_clocks < 1)
189 return 0;
190
191 if (ddata->nr_clocks > SYSC_MAX_CLOCKS) {
192 dev_err(ddata->dev, "too many clocks for %pOF\n", np);
193
194 return -EINVAL;
195 }
196
197 if (nr_fck > 1 || nr_ick > 1) {
198 dev_err(ddata->dev, "max one fck and ick for %pOF\n", np);
0eecc636 199
09dfe581
TL		 200 return -EINVAL;
201 }
202
20749051
KC		 203 ddata->clocks = devm_kcalloc(ddata->dev,
204 ddata->nr_clocks, sizeof(*ddata->clocks),
09dfe581
TL		 205 GFP_KERNEL);
206 if (!ddata->clocks)
207 return -ENOMEM;
208
209 for (i = 0; i < ddata->nr_clocks; i++) {
210 error = sysc_get_one_clock(ddata, ddata->clock_roles[i]);
0eecc636
TL		 211 if (error && error != -ENOENT)
212 return error;
213 }
214
215 return 0;
216}
217
5062236e
TL		 218/**
219 * sysc_init_resets - reset module on init
220 * @ddata: device driver data
221 *
222 * A module can have both OCP softreset control and external rstctrl.
223 * If more complicated rstctrl resets are needed, please handle these
224 * directly from the child device driver and map only the module reset
225 * for the parent interconnect target module device.
226 *
227 * Automatic reset of the module on init can be skipped with the
228 * "ti,no-reset-on-init" device tree property.
229 */
230static int sysc_init_resets(struct sysc *ddata)
231{
232 int error;
233
234 ddata->rsts =
235 devm_reset_control_array_get_optional_exclusive(ddata->dev);
236 if (IS_ERR(ddata->rsts))
237 return PTR_ERR(ddata->rsts);
238
239 if (ddata->cfg.quirks & SYSC_QUIRK_NO_RESET_ON_INIT)
240 goto deassert;
241
242 error = reset_control_assert(ddata->rsts);
243 if (error)
244 return error;
245
246deassert:
247 error = reset_control_deassert(ddata->rsts);
248 if (error)
249 return error;
250
251 return 0;
252}
253
0eecc636
TL		 254/**
255 * sysc_parse_and_check_child_range - parses module IO region from ranges
256 * @ddata: device driver data
257 *
258 * In general we only need rev, syss, and sysc registers and not the whole
259 * module range. But we do want the offsets for these registers from the
260 * module base. This allows us to check them against the legacy hwmod
261 * platform data. Let's also check the ranges are configured properly.
262 */
263static int sysc_parse_and_check_child_range(struct sysc *ddata)
264{
265 struct device_node *np = ddata->dev->of_node;
266 const __be32 *ranges;
267 u32 nr_addr, nr_size;
268 int len, error;
269
270 ranges = of_get_property(np, "ranges", &len);
271 if (!ranges) {
272 dev_err(ddata->dev, "missing ranges for %pOF\n", np);
273
274 return -ENOENT;
275 }
276
277 len /= sizeof(*ranges);
278
279 if (len < 3) {
280 dev_err(ddata->dev, "incomplete ranges for %pOF\n", np);
281
282 return -EINVAL;
283 }
284
285 error = of_property_read_u32(np, "#address-cells", &nr_addr);
286 if (error)
287 return -ENOENT;
288
289 error = of_property_read_u32(np, "#size-cells", &nr_size);
290 if (error)
291 return -ENOENT;
292
293 if (nr_addr != 1 || nr_size != 1) {
294 dev_err(ddata->dev, "invalid ranges for %pOF\n", np);
295
296 return -EINVAL;
297 }
298
299 ranges++;
300 ddata->module_pa = of_translate_address(np, ranges++);
301 ddata->module_size = be32_to_cpup(ranges);
302
0eecc636
TL		 303 return 0;
304}
305
3bb37c8e
TL		 306static struct device_node *stdout_path;
307
308static void sysc_init_stdout_path(struct sysc *ddata)
309{
310 struct device_node *np = NULL;
311 const char *uart;
312
313 if (IS_ERR(stdout_path))
314 return;
315
316 if (stdout_path)
317 return;
318
319 np = of_find_node_by_path("/chosen");
320 if (!np)
321 goto err;
322
323 uart = of_get_property(np, "stdout-path", NULL);
324 if (!uart)
325 goto err;
326
327 np = of_find_node_by_path(uart);
328 if (!np)
329 goto err;
330
331 stdout_path = np;
332
333 return;
334
335err:
336 stdout_path = ERR_PTR(-ENODEV);
337}
338
339static void sysc_check_quirk_stdout(struct sysc *ddata,
340 struct device_node *np)
341{
342 sysc_init_stdout_path(ddata);
343 if (np != stdout_path)
344 return;
345
346 ddata->cfg.quirks |= SYSC_QUIRK_NO_IDLE_ON_INIT |
347 SYSC_QUIRK_NO_RESET_ON_INIT;
348}
349
0eecc636
TL		 350/**
351 * sysc_check_one_child - check child configuration
352 * @ddata: device driver data
353 * @np: child device node
354 *
355 * Let's avoid messy situations where we have new interconnect target
356 * node but children have "ti,hwmods". These belong to the interconnect
357 * target node and are managed by this driver.
358 */
359static int sysc_check_one_child(struct sysc *ddata,
360 struct device_node *np)
361{
362 const char *name;
363
364 name = of_get_property(np, "ti,hwmods", NULL);
365 if (name)
366 dev_warn(ddata->dev, "really a child ti,hwmods property?");
367
3bb37c8e
TL		 368 sysc_check_quirk_stdout(ddata, np);
369
0eecc636
TL		 370 return 0;
371}
372
373static int sysc_check_children(struct sysc *ddata)
374{
375 struct device_node *child;
376 int error;
377
378 for_each_child_of_node(ddata->dev->of_node, child) {
379 error = sysc_check_one_child(ddata, child);
380 if (error)
381 return error;
382 }
383
384 return 0;
385}
386
a7199e2b
TL		 387/*
388 * So far only I2C uses 16-bit read access with clockactivity with revision
389 * in two registers with stride of 4. We can detect this based on the rev
390 * register size to configure things far enough to be able to properly read
391 * the revision register.
392 */
393static void sysc_check_quirk_16bit(struct sysc *ddata, struct resource *res)
394{
dd57ac1e 395 if (resource_size(res) == 8)
a7199e2b 396 ddata->cfg.quirks |= SYSC_QUIRK_16BIT | SYSC_QUIRK_USE_CLOCKACT;
a7199e2b
TL		 397}
398
0eecc636
TL		 399/**
400 * sysc_parse_one - parses the interconnect target module registers
401 * @ddata: device driver data
402 * @reg: register to parse
403 */
404static int sysc_parse_one(struct sysc *ddata, enum sysc_registers reg)
405{
406 struct resource *res;
407 const char *name;
408
409 switch (reg) {
410 case SYSC_REVISION:
411 case SYSC_SYSCONFIG:
412 case SYSC_SYSSTATUS:
413 name = reg_names[reg];
414 break;
415 default:
416 return -EINVAL;
417 }
418
419 res = platform_get_resource_byname(to_platform_device(ddata->dev),
420 IORESOURCE_MEM, name);
421 if (!res) {
0eecc636
TL		 422 ddata->offsets[reg] = -ENODEV;
423
424 return 0;
425 }
426
427 ddata->offsets[reg] = res->start - ddata->module_pa;
a7199e2b
TL		 428 if (reg == SYSC_REVISION)
429 sysc_check_quirk_16bit(ddata, res);
0eecc636
TL		 430
431 return 0;
432}
433
434static int sysc_parse_registers(struct sysc *ddata)
435{
436 int i, error;
437
438 for (i = 0; i < SYSC_MAX_REGS; i++) {
439 error = sysc_parse_one(ddata, i);
440 if (error)
441 return error;
442 }
443
444 return 0;
445}
446
447/**
448 * sysc_check_registers - check for misconfigured register overlaps
449 * @ddata: device driver data
450 */
451static int sysc_check_registers(struct sysc *ddata)
452{
453 int i, j, nr_regs = 0, nr_matches = 0;
454
455 for (i = 0; i < SYSC_MAX_REGS; i++) {
456 if (ddata->offsets[i] < 0)
457 continue;
458
459 if (ddata->offsets[i] > (ddata->module_size - 4)) {
460 dev_err(ddata->dev, "register outside module range");
461
462 return -EINVAL;
463 }
464
465 for (j = 0; j < SYSC_MAX_REGS; j++) {
466 if (ddata->offsets[j] < 0)
467 continue;
468
469 if (ddata->offsets[i] == ddata->offsets[j])
470 nr_matches++;
471 }
472 nr_regs++;
473 }
474
475 if (nr_regs < 1) {
476 dev_err(ddata->dev, "missing registers\n");
477
478 return -EINVAL;
479 }
480
481 if (nr_matches > nr_regs) {
482 dev_err(ddata->dev, "overlapping registers: (%i/%i)",
483 nr_regs, nr_matches);
484
485 return -EINVAL;
486 }
487
488 return 0;
489}
490
491/**
492 * syc_ioremap - ioremap register space for the interconnect target module
0ef8e3bb 493 * @ddata: device driver data
0eecc636
TL		 494 *
495 * Note that the interconnect target module registers can be anywhere
0ef8e3bb
TL		 496 * within the interconnect target module range. For example, SGX has
497 * them at offset 0x1fc00 in the 32MB module address space. And cpsw
498 * has them at offset 0x1200 in the CPSW_WR child. Usually the
499 * the interconnect target module registers are at the beginning of
500 * the module range though.
0eecc636
TL		 501 */
502static int sysc_ioremap(struct sysc *ddata)
503{
0ef8e3bb 504 int size;
0eecc636 505
0ef8e3bb
TL		 506 size = max3(ddata->offsets[SYSC_REVISION],
507 ddata->offsets[SYSC_SYSCONFIG],
508 ddata->offsets[SYSC_SYSSTATUS]);
509
510 if (size < 0 || (size + sizeof(u32)) > ddata->module_size)
511 return -EINVAL;
0eecc636
TL		 512
513 ddata->module_va = devm_ioremap(ddata->dev,
514 ddata->module_pa,
0ef8e3bb 515 size + sizeof(u32));
0eecc636
TL		 516 if (!ddata->module_va)
517 return -EIO;
518
519 return 0;
520}
521
522/**
523 * sysc_map_and_check_registers - ioremap and check device registers
524 * @ddata: device driver data
525 */
526static int sysc_map_and_check_registers(struct sysc *ddata)
527{
528 int error;
529
530 error = sysc_parse_and_check_child_range(ddata);
531 if (error)
532 return error;
533
534 error = sysc_check_children(ddata);
535 if (error)
536 return error;
537
538 error = sysc_parse_registers(ddata);
539 if (error)
540 return error;
541
542 error = sysc_ioremap(ddata);
543 if (error)
544 return error;
545
546 error = sysc_check_registers(ddata);
547 if (error)
548 return error;
549
550 return 0;
551}
552
553/**
554 * sysc_show_rev - read and show interconnect target module revision
555 * @bufp: buffer to print the information to
556 * @ddata: device driver data
557 */
558static int sysc_show_rev(char *bufp, struct sysc *ddata)
559{
566a9b05 560 int len;
0eecc636
TL		 561
562 if (ddata->offsets[SYSC_REVISION] < 0)
563 return sprintf(bufp, ":NA");
564
566a9b05 565 len = sprintf(bufp, ":%08x", ddata->revision);
0eecc636
TL		 566
567 return len;
568}
569
570static int sysc_show_reg(struct sysc *ddata,
571 char *bufp, enum sysc_registers reg)
572{
573 if (ddata->offsets[reg] < 0)
574 return sprintf(bufp, ":NA");
575
576 return sprintf(bufp, ":%x", ddata->offsets[reg]);
577}
578
a885f0fe
TL		 579static int sysc_show_name(char *bufp, struct sysc *ddata)
580{
581 if (!ddata->name)
582 return 0;
583
584 return sprintf(bufp, ":%s", ddata->name);
585}
586
0eecc636
TL		 587/**
588 * sysc_show_registers - show information about interconnect target module
589 * @ddata: device driver data
590 */
591static void sysc_show_registers(struct sysc *ddata)
592{
593 char buf[128];
594 char *bufp = buf;
595 int i;
596
597 for (i = 0; i < SYSC_MAX_REGS; i++)
598 bufp += sysc_show_reg(ddata, bufp, i);
599
600 bufp += sysc_show_rev(bufp, ddata);
a885f0fe 601 bufp += sysc_show_name(bufp, ddata);
0eecc636
TL		 602
603 dev_dbg(ddata->dev, "%llx:%x%s\n",
604 ddata->module_pa, ddata->module_size,
605 buf);
606}
607
a4a5d493 608static int __maybe_unused sysc_runtime_suspend(struct device *dev)
0eecc636 609{
ef70b0bd 610 struct ti_sysc_platform_data *pdata;
0eecc636 611 struct sysc *ddata;
ef70b0bd 612 int error = 0, i;
0eecc636
TL		 613
614 ddata = dev_get_drvdata(dev);
615
ef70b0bd 616 if (!ddata->enabled)
0eecc636
TL		 617 return 0;
618
ef70b0bd
TL		 619 if (ddata->legacy_mode) {
620 pdata = dev_get_platdata(ddata->dev);
621 if (!pdata)
622 return 0;
623
624 if (!pdata->idle_module)
625 return -ENODEV;
626
627 error = pdata->idle_module(dev, &ddata->cookie);
628 if (error)
629 dev_err(dev, "%s: could not idle: %i\n",
630 __func__, error);
631
632 goto idled;
633 }
634
09dfe581 635 for (i = 0; i < ddata->nr_clocks; i++) {
0eecc636
TL		 636 if (IS_ERR_OR_NULL(ddata->clocks[i]))
637 continue;
09dfe581
TL		 638
639 if (i >= SYSC_OPTFCK0 && !sysc_opt_clks_needed(ddata))
640 break;
641
0eecc636
TL		 642 clk_disable(ddata->clocks[i]);
643 }
644
ef70b0bd
TL		 645idled:
646 ddata->enabled = false;
647
648 return error;
0eecc636
TL		 649}
650
a4a5d493 651static int __maybe_unused sysc_runtime_resume(struct device *dev)
0eecc636 652{
ef70b0bd 653 struct ti_sysc_platform_data *pdata;
0eecc636 654 struct sysc *ddata;
ef70b0bd 655 int error = 0, i;
0eecc636
TL		 656
657 ddata = dev_get_drvdata(dev);
658
ef70b0bd 659 if (ddata->enabled)
0eecc636
TL		 660 return 0;
661
ef70b0bd
TL		 662 if (ddata->legacy_mode) {
663 pdata = dev_get_platdata(ddata->dev);
664 if (!pdata)
665 return 0;
666
667 if (!pdata->enable_module)
668 return -ENODEV;
669
670 error = pdata->enable_module(dev, &ddata->cookie);
671 if (error)
672 dev_err(dev, "%s: could not enable: %i\n",
673 __func__, error);
674
675 goto awake;
676 }
677
09dfe581 678 for (i = 0; i < ddata->nr_clocks; i++) {
0eecc636
TL		 679 if (IS_ERR_OR_NULL(ddata->clocks[i]))
680 continue;
09dfe581
TL		 681
682 if (i >= SYSC_OPTFCK0 && !sysc_opt_clks_needed(ddata))
683 break;
684
0eecc636
TL		 685 error = clk_enable(ddata->clocks[i]);
686 if (error)
687 return error;
688 }
689
ef70b0bd
TL		 690awake:
691 ddata->enabled = true;
692
693 return error;
0eecc636
TL		 694}
695
62020f23
TL		 696#ifdef CONFIG_PM_SLEEP
697static int sysc_suspend(struct device *dev)
698{
699 struct sysc *ddata;
ef55f821 700 int error;
62020f23
TL		 701
702 ddata = dev_get_drvdata(dev);
703
e7420c2d
TL		 704 if (ddata->cfg.quirks & (SYSC_QUIRK_RESOURCE_PROVIDER |
705 SYSC_QUIRK_LEGACY_IDLE))
706 return 0;
707
62020f23
TL		 708 if (!ddata->enabled)
709 return 0;
710
ef55f821
TL		 711 dev_dbg(ddata->dev, "%s %s\n", __func__,
712 ddata->name ? ddata->name : "");
713
714 error = pm_runtime_put_sync_suspend(dev);
715 if (error < 0) {
716 dev_warn(ddata->dev, "%s not idle %i %s\n",
717 __func__, error,
718 ddata->name ? ddata->name : "");
719
720 return 0;
721 }
722
62020f23
TL		 723 ddata->needs_resume = true;
724
ef55f821 725 return 0;
62020f23
TL		 726}
727
728static int sysc_resume(struct device *dev)
729{
730 struct sysc *ddata;
ef55f821 731 int error;
62020f23
TL		 732
733 ddata = dev_get_drvdata(dev);
e7420c2d
TL		 734
735 if (ddata->cfg.quirks & (SYSC_QUIRK_RESOURCE_PROVIDER |
736 SYSC_QUIRK_LEGACY_IDLE))
737 return 0;
738
739 if (ddata->needs_resume) {
740 dev_dbg(ddata->dev, "%s %s\n", __func__,
741 ddata->name ? ddata->name : "");
742
ef55f821
TL		 743 error = pm_runtime_get_sync(dev);
744 if (error < 0) {
745 dev_err(ddata->dev, "%s error %i %s\n",
746 __func__, error,
747 ddata->name ? ddata->name : "");
e7420c2d 748
ef55f821
TL		 749 return error;
750 }
751
752 ddata->needs_resume = false;
e7420c2d
TL		 753 }
754
755 return 0;
756}
757
758static int sysc_noirq_suspend(struct device *dev)
759{
760 struct sysc *ddata;
761
762 ddata = dev_get_drvdata(dev);
763
764 if (ddata->cfg.quirks & SYSC_QUIRK_LEGACY_IDLE)
765 return 0;
766
767 if (!(ddata->cfg.quirks & SYSC_QUIRK_RESOURCE_PROVIDER))
768 return 0;
769
770 if (!ddata->enabled)
771 return 0;
772
773 dev_dbg(ddata->dev, "%s %s\n", __func__,
774 ddata->name ? ddata->name : "");
775
776 ddata->needs_resume = true;
777
778 return sysc_runtime_suspend(dev);
779}
780
781static int sysc_noirq_resume(struct device *dev)
782{
783 struct sysc *ddata;
784
785 ddata = dev_get_drvdata(dev);
786
787 if (ddata->cfg.quirks & SYSC_QUIRK_LEGACY_IDLE)
788 return 0;
789
790 if (!(ddata->cfg.quirks & SYSC_QUIRK_RESOURCE_PROVIDER))
791 return 0;
792
62020f23 793 if (ddata->needs_resume) {
ef55f821
TL		 794 dev_dbg(ddata->dev, "%s %s\n", __func__,
795 ddata->name ? ddata->name : "");
796
62020f23
TL		 797 ddata->needs_resume = false;
798
799 return sysc_runtime_resume(dev);
800 }
801
0eecc636
TL		 802 return 0;
803}
62020f23 804#endif
0eecc636
TL		 805
806static const struct dev_pm_ops sysc_pm_ops = {
62020f23 807 SET_SYSTEM_SLEEP_PM_OPS(sysc_suspend, sysc_resume)
e7420c2d 808 SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(sysc_noirq_suspend, sysc_noirq_resume)
0eecc636
TL		 809 SET_RUNTIME_PM_OPS(sysc_runtime_suspend,
810 sysc_runtime_resume,
811 NULL)
812};
813
a885f0fe
TL		 814/* Module revision register based quirks */
815struct sysc_revision_quirk {
816 const char *name;
817 u32 base;
818 int rev_offset;
819 int sysc_offset;
820 int syss_offset;
821 u32 revision;
822 u32 revision_mask;
823 u32 quirks;
824};
825
826#define SYSC_QUIRK(optname, optbase, optrev, optsysc, optsyss, \
827 optrev_val, optrevmask, optquirkmask) \
828 { \
829 .name = (optname), \
830 .base = (optbase), \
831 .rev_offset = (optrev), \
832 .sysc_offset = (optsysc), \
833 .syss_offset = (optsyss), \
834 .revision = (optrev_val), \
835 .revision_mask = (optrevmask), \
836 .quirks = (optquirkmask), \
837 }
838
839static const struct sysc_revision_quirk sysc_revision_quirks[] = {
e7420c2d
TL		 840 /* These need to use noirq_suspend */
841 SYSC_QUIRK("control", 0, 0, 0x10, -1, 0x40000900, 0xffffffff,
842 SYSC_QUIRK_RESOURCE_PROVIDER),
843 SYSC_QUIRK("i2c", 0, 0, 0x10, 0x90, 0x5040000a, 0xffffffff,
844 SYSC_QUIRK_RESOURCE_PROVIDER),
845 SYSC_QUIRK("mcspi", 0, 0, 0x10, -1, 0x40300a0b, 0xffffffff,
846 SYSC_QUIRK_RESOURCE_PROVIDER),
847 SYSC_QUIRK("prcm", 0, 0, -1, -1, 0x40000100, 0xffffffff,
848 SYSC_QUIRK_RESOURCE_PROVIDER),
849 SYSC_QUIRK("ocp2scp", 0, 0, 0x10, 0x14, 0x50060005, 0xffffffff,
850 SYSC_QUIRK_RESOURCE_PROVIDER),
851 SYSC_QUIRK("padconf", 0, 0, 0x10, -1, 0x4fff0800, 0xffffffff,
852 SYSC_QUIRK_RESOURCE_PROVIDER),
853 SYSC_QUIRK("scm", 0, 0, 0x10, -1, 0x40000900, 0xffffffff,
854 SYSC_QUIRK_RESOURCE_PROVIDER),
855 SYSC_QUIRK("scrm", 0, 0, -1, -1, 0x00000010, 0xffffffff,
856 SYSC_QUIRK_RESOURCE_PROVIDER),
857 SYSC_QUIRK("sdma", 0, 0, 0x2c, 0x28, 0x00010900, 0xffffffff,
858 SYSC_QUIRK_RESOURCE_PROVIDER),
859
a885f0fe
TL		 860 /* These drivers need to be fixed to not use pm_runtime_irq_safe() */
861 SYSC_QUIRK("gpio", 0, 0, 0x10, 0x114, 0x50600801, 0xffffffff,
09dfe581 862 SYSC_QUIRK_LEGACY_IDLE | SYSC_QUIRK_OPT_CLKS_IN_RESET),
a885f0fe
TL		 863 SYSC_QUIRK("mmu", 0, 0, 0x10, 0x14, 0x00000020, 0xffffffff,
864 SYSC_QUIRK_LEGACY_IDLE),
865 SYSC_QUIRK("mmu", 0, 0, 0x10, 0x14, 0x00000030, 0xffffffff,
866 SYSC_QUIRK_LEGACY_IDLE),
867 SYSC_QUIRK("sham", 0, 0x100, 0x110, 0x114, 0x40000c03, 0xffffffff,
868 SYSC_QUIRK_LEGACY_IDLE),
869 SYSC_QUIRK("smartreflex", 0, -1, 0x24, -1, 0x00000000, 0xffffffff,
870 SYSC_QUIRK_LEGACY_IDLE),
871 SYSC_QUIRK("smartreflex", 0, -1, 0x38, -1, 0x00000000, 0xffffffff,
872 SYSC_QUIRK_LEGACY_IDLE),
873 SYSC_QUIRK("timer", 0, 0, 0x10, 0x14, 0x00000015, 0xffffffff,
874 SYSC_QUIRK_LEGACY_IDLE),
8cde5d5f
TL		 875 /* Some timers on omap4 and later */
876 SYSC_QUIRK("timer", 0, 0, 0x10, -1, 0x4fff1301, 0xffffffff,
877 SYSC_QUIRK_LEGACY_IDLE),
a885f0fe
TL		 878 SYSC_QUIRK("uart", 0, 0x50, 0x54, 0x58, 0x00000052, 0xffffffff,
879 SYSC_QUIRK_LEGACY_IDLE),
d708bb14
TL		 880 /* Uarts on omap4 and later */
881 SYSC_QUIRK("uart", 0, 0x50, 0x54, 0x58, 0x50411e03, 0xffffffff,
882 SYSC_QUIRK_LEGACY_IDLE),
7e27e5d0
TL		 883
884 /* These devices don't yet suspend properly without legacy setting */
885 SYSC_QUIRK("sdio", 0, 0, 0x10, -1, 0x40202301, 0xffffffff,
886 SYSC_QUIRK_LEGACY_IDLE),
887 SYSC_QUIRK("wdt", 0, 0, 0x10, 0x14, 0x502a0500, 0xffffffff,
888 SYSC_QUIRK_LEGACY_IDLE),
889 SYSC_QUIRK("wdt", 0, 0, 0x10, 0x14, 0x502a0d00, 0xffffffff,
890 SYSC_QUIRK_LEGACY_IDLE),
dc4c85ea
TL		 891
892#ifdef DEBUG
893 SYSC_QUIRK("aess", 0, 0, 0x10, -1, 0x40000000, 0xffffffff, 0),
894 SYSC_QUIRK("gpu", 0, 0x1fc00, 0x1fc10, -1, 0, 0, 0),
895 SYSC_QUIRK("hdq1w", 0, 0, 0x14, 0x18, 0x00000006, 0xffffffff, 0),
896 SYSC_QUIRK("hsi", 0, 0, 0x10, 0x14, 0x50043101, 0xffffffff, 0),
897 SYSC_QUIRK("iss", 0, 0, 0x10, -1, 0x40000101, 0xffffffff, 0),
898 SYSC_QUIRK("mcasp", 0, 0, 0x4, -1, 0x44306302, 0xffffffff, 0),
899 SYSC_QUIRK("mcbsp", 0, -1, 0x8c, -1, 0, 0, 0),
900 SYSC_QUIRK("mailbox", 0, 0, 0x10, -1, 0x00000400, 0xffffffff, 0),
901 SYSC_QUIRK("slimbus", 0, 0, 0x10, -1, 0x40000902, 0xffffffff, 0),
902 SYSC_QUIRK("slimbus", 0, 0, 0x10, -1, 0x40002903, 0xffffffff, 0),
903 SYSC_QUIRK("spinlock", 0, 0, 0x10, -1, 0x50020000, 0xffffffff, 0),
904 SYSC_QUIRK("usbhstll", 0, 0, 0x10, 0x14, 0x00000004, 0xffffffff, 0),
905 SYSC_QUIRK("usb_host_hs", 0, 0, 0x10, 0x14, 0x50700100, 0xffffffff, 0),
906 SYSC_QUIRK("usb_otg_hs", 0, 0x400, 0x404, 0x408, 0x00000050,
907 0xffffffff, 0),
908#endif
a885f0fe
TL		 909};
910
911static void sysc_init_revision_quirks(struct sysc *ddata)
912{
913 const struct sysc_revision_quirk *q;
914 int i;
915
916 for (i = 0; i < ARRAY_SIZE(sysc_revision_quirks); i++) {
917 q = &sysc_revision_quirks[i];
918
919 if (q->base && q->base != ddata->module_pa)
920 continue;
921
922 if (q->rev_offset >= 0 &&
923 q->rev_offset != ddata->offsets[SYSC_REVISION])
924 continue;
925
926 if (q->sysc_offset >= 0 &&
927 q->sysc_offset != ddata->offsets[SYSC_SYSCONFIG])
928 continue;
929
930 if (q->syss_offset >= 0 &&
931 q->syss_offset != ddata->offsets[SYSC_SYSSTATUS])
932 continue;
933
934 if (q->revision == ddata->revision ||
935 (q->revision & q->revision_mask) ==
936 (ddata->revision & q->revision_mask)) {
937 ddata->name = q->name;
938 ddata->cfg.quirks |= q->quirks;
939 }
940 }
941}
942
566a9b05
TL		 943/* At this point the module is configured enough to read the revision */
944static int sysc_init_module(struct sysc *ddata)
945{
946 int error;
947
a885f0fe
TL		 948 if (ddata->cfg.quirks & SYSC_QUIRK_NO_IDLE_ON_INIT) {
949 ddata->revision = sysc_read_revision(ddata);
950 goto rev_quirks;
951 }
952
566a9b05
TL		 953 error = pm_runtime_get_sync(ddata->dev);
954 if (error < 0) {
955 pm_runtime_put_noidle(ddata->dev);
956
957 return 0;
958 }
5062236e 959
566a9b05
TL		 960 ddata->revision = sysc_read_revision(ddata);
961 pm_runtime_put_sync(ddata->dev);
962
a885f0fe
TL		 963rev_quirks:
964 sysc_init_revision_quirks(ddata);
965
566a9b05
TL		 966 return 0;
967}
968
c5a2de97
TL		 969static int sysc_init_sysc_mask(struct sysc *ddata)
970{
971 struct device_node *np = ddata->dev->of_node;
972 int error;
973 u32 val;
974
975 error = of_property_read_u32(np, "ti,sysc-mask", &val);
976 if (error)
977 return 0;
978
979 if (val)
980 ddata->cfg.sysc_val = val & ddata->cap->sysc_mask;
981 else
982 ddata->cfg.sysc_val = ddata->cap->sysc_mask;
983
984 return 0;
985}
986
987static int sysc_init_idlemode(struct sysc *ddata, u8 *idlemodes,
988 const char *name)
989{
990 struct device_node *np = ddata->dev->of_node;
991 struct property *prop;
992 const __be32 *p;
993 u32 val;
994
995 of_property_for_each_u32(np, name, prop, p, val) {
996 if (val >= SYSC_NR_IDLEMODES) {
997 dev_err(ddata->dev, "invalid idlemode: %i\n", val);
998 return -EINVAL;
999 }
1000 *idlemodes |= (1 << val);
1001 }
1002
1003 return 0;
1004}
1005
1006static int sysc_init_idlemodes(struct sysc *ddata)
1007{
1008 int error;
1009
1010 error = sysc_init_idlemode(ddata, &ddata->cfg.midlemodes,
1011 "ti,sysc-midle");
1012 if (error)
1013 return error;
1014
1015 error = sysc_init_idlemode(ddata, &ddata->cfg.sidlemodes,
1016 "ti,sysc-sidle");
1017 if (error)
1018 return error;
1019
1020 return 0;
1021}
1022
1023/*
1024 * Only some devices on omap4 and later have SYSCONFIG reset done
1025 * bit. We can detect this if there is no SYSSTATUS at all, or the
1026 * SYSTATUS bit 0 is not used. Note that some SYSSTATUS registers
1027 * have multiple bits for the child devices like OHCI and EHCI.
1028 * Depends on SYSC being parsed first.
1029 */
1030static int sysc_init_syss_mask(struct sysc *ddata)
1031{
1032 struct device_node *np = ddata->dev->of_node;
1033 int error;
1034 u32 val;
1035
1036 error = of_property_read_u32(np, "ti,syss-mask", &val);
1037 if (error) {
1038 if ((ddata->cap->type == TI_SYSC_OMAP4 ||
1039 ddata->cap->type == TI_SYSC_OMAP4_TIMER) &&
1040 (ddata->cfg.sysc_val & SYSC_OMAP4_SOFTRESET))
1041 ddata->cfg.quirks |= SYSC_QUIRK_RESET_STATUS;
1042
1043 return 0;
1044 }
1045
1046 if (!(val & 1) && (ddata->cfg.sysc_val & SYSC_OMAP4_SOFTRESET))
1047 ddata->cfg.quirks |= SYSC_QUIRK_RESET_STATUS;
1048
1049 ddata->cfg.syss_mask = val;
1050
1051 return 0;
1052}
1053
2c355ff6 1054/*
8b2830ba
TL		 1055 * Many child device drivers need to have fck and opt clocks available
1056 * to get the clock rate for device internal configuration etc.
2c355ff6 1057 */
8b2830ba
TL		 1058static int sysc_child_add_named_clock(struct sysc *ddata,
1059 struct device *child,
1060 const char *name)
2c355ff6 1061{
8b2830ba 1062 struct clk *clk;
2c355ff6 1063 struct clk_lookup *l;
8b2830ba 1064 int error = 0;
2c355ff6 1065
8b2830ba 1066 if (!name)
2c355ff6
TL		 1067 return 0;
1068
8b2830ba
TL		 1069 clk = clk_get(child, name);
1070 if (!IS_ERR(clk)) {
1071 clk_put(clk);
2c355ff6
TL		 1072
1073 return -EEXIST;
1074 }
1075
8b2830ba
TL		 1076 clk = clk_get(ddata->dev, name);
1077 if (IS_ERR(clk))
1078 return -ENODEV;
2c355ff6 1079
8b2830ba
TL		 1080 l = clkdev_create(clk, name, dev_name(child));
1081 if (!l)
1082 error = -ENOMEM;
1083
1084 clk_put(clk);
1085
1086 return error;
2c355ff6
TL		 1087}
1088
09dfe581
TL		 1089static int sysc_child_add_clocks(struct sysc *ddata,
1090 struct device *child)
1091{
1092 int i, error;
1093
1094 for (i = 0; i < ddata->nr_clocks; i++) {
1095 error = sysc_child_add_named_clock(ddata,
1096 child,
1097 ddata->clock_roles[i]);
1098 if (error && error != -EEXIST) {
1099 dev_err(ddata->dev, "could not add child clock %s: %i\n",
1100 ddata->clock_roles[i], error);
1101
1102 return error;
1103 }
1104 }
1105
1106 return 0;
1107}
1108
2c355ff6
TL		 1109static struct device_type sysc_device_type = {
1110};
1111
1112static struct sysc *sysc_child_to_parent(struct device *dev)
1113{
1114 struct device *parent = dev->parent;
1115
1116 if (!parent || parent->type != &sysc_device_type)
1117 return NULL;
1118
1119 return dev_get_drvdata(parent);
1120}
1121
a885f0fe
TL		 1122static int __maybe_unused sysc_child_runtime_suspend(struct device *dev)
1123{
1124 struct sysc *ddata;
1125 int error;
1126
1127 ddata = sysc_child_to_parent(dev);
1128
1129 error = pm_generic_runtime_suspend(dev);
1130 if (error)
1131 return error;
1132
1133 if (!ddata->enabled)
1134 return 0;
1135
1136 return sysc_runtime_suspend(ddata->dev);
1137}
1138
1139static int __maybe_unused sysc_child_runtime_resume(struct device *dev)
1140{
1141 struct sysc *ddata;
1142 int error;
1143
1144 ddata = sysc_child_to_parent(dev);
1145
1146 if (!ddata->enabled) {
1147 error = sysc_runtime_resume(ddata->dev);
1148 if (error < 0)
1149 dev_err(ddata->dev,
1150 "%s error: %i\n", __func__, error);
1151 }
1152
1153 return pm_generic_runtime_resume(dev);
1154}
1155
1156#ifdef CONFIG_PM_SLEEP
1157static int sysc_child_suspend_noirq(struct device *dev)
1158{
1159 struct sysc *ddata;
1160 int error;
1161
1162 ddata = sysc_child_to_parent(dev);
1163
ef55f821
TL		 1164 dev_dbg(ddata->dev, "%s %s\n", __func__,
1165 ddata->name ? ddata->name : "");
1166
a885f0fe 1167 error = pm_generic_suspend_noirq(dev);
ef55f821
TL		 1168 if (error) {
1169 dev_err(dev, "%s error at %i: %i\n",
1170 __func__, __LINE__, error);
1171
a885f0fe 1172 return error;
ef55f821 1173 }
a885f0fe
TL		 1174
1175 if (!pm_runtime_status_suspended(dev)) {
1176 error = pm_generic_runtime_suspend(dev);
ef55f821
TL		 1177 if (error) {
1178 dev_err(dev, "%s error at %i: %i\n",
1179 __func__, __LINE__, error);
1180
a885f0fe 1181 return error;
ef55f821 1182 }
a885f0fe
TL		 1183
1184 error = sysc_runtime_suspend(ddata->dev);
ef55f821
TL		 1185 if (error) {
1186 dev_err(dev, "%s error at %i: %i\n",
1187 __func__, __LINE__, error);
1188
a885f0fe 1189 return error;
ef55f821 1190 }
a885f0fe
TL		 1191
1192 ddata->child_needs_resume = true;
1193 }
1194
1195 return 0;
1196}
1197
1198static int sysc_child_resume_noirq(struct device *dev)
1199{
1200 struct sysc *ddata;
1201 int error;
1202
1203 ddata = sysc_child_to_parent(dev);
1204
ef55f821
TL		 1205 dev_dbg(ddata->dev, "%s %s\n", __func__,
1206 ddata->name ? ddata->name : "");
1207
a885f0fe
TL		 1208 if (ddata->child_needs_resume) {
1209 ddata->child_needs_resume = false;
1210
1211 error = sysc_runtime_resume(ddata->dev);
1212 if (error)
1213 dev_err(ddata->dev,
1214 "%s runtime resume error: %i\n",
1215 __func__, error);
1216
1217 error = pm_generic_runtime_resume(dev);
1218 if (error)
1219 dev_err(ddata->dev,
1220 "%s generic runtime resume: %i\n",
1221 __func__, error);
1222 }
1223
1224 return pm_generic_resume_noirq(dev);
1225}
1226#endif
1227
1228struct dev_pm_domain sysc_child_pm_domain = {
1229 .ops = {
1230 SET_RUNTIME_PM_OPS(sysc_child_runtime_suspend,
1231 sysc_child_runtime_resume,
1232 NULL)
1233 USE_PLATFORM_PM_SLEEP_OPS
1234 SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(sysc_child_suspend_noirq,
1235 sysc_child_resume_noirq)
1236 }
1237};
1238
1239/**
1240 * sysc_legacy_idle_quirk - handle children in omap_device compatible way
1241 * @ddata: device driver data
1242 * @child: child device driver
1243 *
1244 * Allow idle for child devices as done with _od_runtime_suspend().
1245 * Otherwise many child devices will not idle because of the permanent
1246 * parent usecount set in pm_runtime_irq_safe().
1247 *
1248 * Note that the long term solution is to just modify the child device
1249 * drivers to not set pm_runtime_irq_safe() and then this can be just
1250 * dropped.
1251 */
1252static void sysc_legacy_idle_quirk(struct sysc *ddata, struct device *child)
1253{
1254 if (!ddata->legacy_mode)
1255 return;
1256
1257 if (ddata->cfg.quirks & SYSC_QUIRK_LEGACY_IDLE)
1258 dev_pm_domain_set(child, &sysc_child_pm_domain);
1259}
1260
2c355ff6
TL		 1261static int sysc_notifier_call(struct notifier_block *nb,
1262 unsigned long event, void *device)
1263{
1264 struct device *dev = device;
1265 struct sysc *ddata;
1266 int error;
1267
1268 ddata = sysc_child_to_parent(dev);
1269 if (!ddata)
1270 return NOTIFY_DONE;
1271
1272 switch (event) {
1273 case BUS_NOTIFY_ADD_DEVICE:
09dfe581
TL		 1274 error = sysc_child_add_clocks(ddata, dev);
1275 if (error)
1276 return error;
a885f0fe 1277 sysc_legacy_idle_quirk(ddata, dev);
2c355ff6
TL		 1278 break;
1279 default:
1280 break;
1281 }
1282
1283 return NOTIFY_DONE;
1284}
1285
1286static struct notifier_block sysc_nb = {
1287 .notifier_call = sysc_notifier_call,
1288};
1289
566a9b05
TL		 1290/* Device tree configured quirks */
1291struct sysc_dts_quirk {
1292 const char *name;
1293 u32 mask;
1294};
1295
1296static const struct sysc_dts_quirk sysc_dts_quirks[] = {
1297 { .name = "ti,no-idle-on-init",
1298 .mask = SYSC_QUIRK_NO_IDLE_ON_INIT, },
1299 { .name = "ti,no-reset-on-init",
1300 .mask = SYSC_QUIRK_NO_RESET_ON_INIT, },
1301};
1302
1303static int sysc_init_dts_quirks(struct sysc *ddata)
1304{
1305 struct device_node *np = ddata->dev->of_node;
1306 const struct property *prop;
1307 int i, len, error;
1308 u32 val;
1309
1310 ddata->legacy_mode = of_get_property(np, "ti,hwmods", NULL);
1311
1312 for (i = 0; i < ARRAY_SIZE(sysc_dts_quirks); i++) {
1313 prop = of_get_property(np, sysc_dts_quirks[i].name, &len);
1314 if (!prop)
d39b6ea4 1315 continue;
566a9b05
TL		 1316
1317 ddata->cfg.quirks |= sysc_dts_quirks[i].mask;
1318 }
1319
1320 error = of_property_read_u32(np, "ti,sysc-delay-us", &val);
1321 if (!error) {
1322 if (val > 255) {
1323 dev_warn(ddata->dev, "bad ti,sysc-delay-us: %i\n",
1324 val);
1325 }
1326
1327 ddata->cfg.srst_udelay = (u8)val;
1328 }
1329
1330 return 0;
1331}
1332
0eecc636
TL		 1333static void sysc_unprepare(struct sysc *ddata)
1334{
1335 int i;
1336
1337 for (i = 0; i < SYSC_MAX_CLOCKS; i++) {
1338 if (!IS_ERR_OR_NULL(ddata->clocks[i]))
1339 clk_unprepare(ddata->clocks[i]);
1340 }
1341}
1342
70a65240
TL		 1343/*
1344 * Common sysc register bits found on omap2, also known as type1
1345 */
1346static const struct sysc_regbits sysc_regbits_omap2 = {
1347 .dmadisable_shift = -ENODEV,
1348 .midle_shift = 12,
1349 .sidle_shift = 3,
1350 .clkact_shift = 8,
1351 .emufree_shift = 5,
1352 .enwkup_shift = 2,
1353 .srst_shift = 1,
1354 .autoidle_shift = 0,
1355};
1356
1357static const struct sysc_capabilities sysc_omap2 = {
1358 .type = TI_SYSC_OMAP2,
1359 .sysc_mask = SYSC_OMAP2_CLOCKACTIVITY | SYSC_OMAP2_EMUFREE |
1360 SYSC_OMAP2_ENAWAKEUP | SYSC_OMAP2_SOFTRESET |
1361 SYSC_OMAP2_AUTOIDLE,
1362 .regbits = &sysc_regbits_omap2,
1363};
1364
1365/* All omap2 and 3 timers, and timers 1, 2 & 10 on omap 4 and 5 */
1366static const struct sysc_capabilities sysc_omap2_timer = {
1367 .type = TI_SYSC_OMAP2_TIMER,
1368 .sysc_mask = SYSC_OMAP2_CLOCKACTIVITY | SYSC_OMAP2_EMUFREE |
1369 SYSC_OMAP2_ENAWAKEUP | SYSC_OMAP2_SOFTRESET |
1370 SYSC_OMAP2_AUTOIDLE,
1371 .regbits = &sysc_regbits_omap2,
1372 .mod_quirks = SYSC_QUIRK_USE_CLOCKACT,
1373};
1374
1375/*
1376 * SHAM2 (SHA1/MD5) sysc found on omap3, a variant of sysc_regbits_omap2
1377 * with different sidle position
1378 */
1379static const struct sysc_regbits sysc_regbits_omap3_sham = {
1380 .dmadisable_shift = -ENODEV,
1381 .midle_shift = -ENODEV,
1382 .sidle_shift = 4,
1383 .clkact_shift = -ENODEV,
1384 .enwkup_shift = -ENODEV,
1385 .srst_shift = 1,
1386 .autoidle_shift = 0,
1387 .emufree_shift = -ENODEV,
1388};
1389
1390static const struct sysc_capabilities sysc_omap3_sham = {
1391 .type = TI_SYSC_OMAP3_SHAM,
1392 .sysc_mask = SYSC_OMAP2_SOFTRESET | SYSC_OMAP2_AUTOIDLE,
1393 .regbits = &sysc_regbits_omap3_sham,
1394};
1395
1396/*
1397 * AES register bits found on omap3 and later, a variant of
1398 * sysc_regbits_omap2 with different sidle position
1399 */
1400static const struct sysc_regbits sysc_regbits_omap3_aes = {
1401 .dmadisable_shift = -ENODEV,
1402 .midle_shift = -ENODEV,
1403 .sidle_shift = 6,
1404 .clkact_shift = -ENODEV,
1405 .enwkup_shift = -ENODEV,
1406 .srst_shift = 1,
1407 .autoidle_shift = 0,
1408 .emufree_shift = -ENODEV,
1409};
1410
1411static const struct sysc_capabilities sysc_omap3_aes = {
1412 .type = TI_SYSC_OMAP3_AES,
1413 .sysc_mask = SYSC_OMAP2_SOFTRESET | SYSC_OMAP2_AUTOIDLE,
1414 .regbits = &sysc_regbits_omap3_aes,
1415};
1416
1417/*
1418 * Common sysc register bits found on omap4, also known as type2
1419 */
1420static const struct sysc_regbits sysc_regbits_omap4 = {
1421 .dmadisable_shift = 16,
1422 .midle_shift = 4,
1423 .sidle_shift = 2,
1424 .clkact_shift = -ENODEV,
1425 .enwkup_shift = -ENODEV,
1426 .emufree_shift = 1,
1427 .srst_shift = 0,
1428 .autoidle_shift = -ENODEV,
1429};
1430
1431static const struct sysc_capabilities sysc_omap4 = {
1432 .type = TI_SYSC_OMAP4,
1433 .sysc_mask = SYSC_OMAP4_DMADISABLE | SYSC_OMAP4_FREEEMU |
1434 SYSC_OMAP4_SOFTRESET,
1435 .regbits = &sysc_regbits_omap4,
1436};
1437
1438static const struct sysc_capabilities sysc_omap4_timer = {
1439 .type = TI_SYSC_OMAP4_TIMER,
1440 .sysc_mask = SYSC_OMAP4_DMADISABLE | SYSC_OMAP4_FREEEMU |
1441 SYSC_OMAP4_SOFTRESET,
1442 .regbits = &sysc_regbits_omap4,
1443};
1444
1445/*
1446 * Common sysc register bits found on omap4, also known as type3
1447 */
1448static const struct sysc_regbits sysc_regbits_omap4_simple = {
1449 .dmadisable_shift = -ENODEV,
1450 .midle_shift = 2,
1451 .sidle_shift = 0,
1452 .clkact_shift = -ENODEV,
1453 .enwkup_shift = -ENODEV,
1454 .srst_shift = -ENODEV,
1455 .emufree_shift = -ENODEV,
1456 .autoidle_shift = -ENODEV,
1457};
1458
1459static const struct sysc_capabilities sysc_omap4_simple = {
1460 .type = TI_SYSC_OMAP4_SIMPLE,
1461 .regbits = &sysc_regbits_omap4_simple,
1462};
1463
1464/*
1465 * SmartReflex sysc found on omap34xx
1466 */
1467static const struct sysc_regbits sysc_regbits_omap34xx_sr = {
1468 .dmadisable_shift = -ENODEV,
1469 .midle_shift = -ENODEV,
1470 .sidle_shift = -ENODEV,
1471 .clkact_shift = 20,
1472 .enwkup_shift = -ENODEV,
1473 .srst_shift = -ENODEV,
1474 .emufree_shift = -ENODEV,
1475 .autoidle_shift = -ENODEV,
1476};
1477
1478static const struct sysc_capabilities sysc_34xx_sr = {
1479 .type = TI_SYSC_OMAP34XX_SR,
1480 .sysc_mask = SYSC_OMAP2_CLOCKACTIVITY,
1481 .regbits = &sysc_regbits_omap34xx_sr,
a885f0fe
TL		 1482 .mod_quirks = SYSC_QUIRK_USE_CLOCKACT | SYSC_QUIRK_UNCACHED |
1483 SYSC_QUIRK_LEGACY_IDLE,
70a65240
TL		 1484};
1485
1486/*
1487 * SmartReflex sysc found on omap36xx and later
1488 */
1489static const struct sysc_regbits sysc_regbits_omap36xx_sr = {
1490 .dmadisable_shift = -ENODEV,
1491 .midle_shift = -ENODEV,
1492 .sidle_shift = 24,
1493 .clkact_shift = -ENODEV,
1494 .enwkup_shift = 26,
1495 .srst_shift = -ENODEV,
1496 .emufree_shift = -ENODEV,
1497 .autoidle_shift = -ENODEV,
1498};
1499
1500static const struct sysc_capabilities sysc_36xx_sr = {
1501 .type = TI_SYSC_OMAP36XX_SR,
3267c081 1502 .sysc_mask = SYSC_OMAP3_SR_ENAWAKEUP,
70a65240 1503 .regbits = &sysc_regbits_omap36xx_sr,
a885f0fe 1504 .mod_quirks = SYSC_QUIRK_UNCACHED | SYSC_QUIRK_LEGACY_IDLE,
70a65240
TL		 1505};
1506
1507static const struct sysc_capabilities sysc_omap4_sr = {
1508 .type = TI_SYSC_OMAP4_SR,
1509 .regbits = &sysc_regbits_omap36xx_sr,
a885f0fe 1510 .mod_quirks = SYSC_QUIRK_LEGACY_IDLE,
70a65240
TL		 1511};
1512
1513/*
1514 * McASP register bits found on omap4 and later
1515 */
1516static const struct sysc_regbits sysc_regbits_omap4_mcasp = {
1517 .dmadisable_shift = -ENODEV,
1518 .midle_shift = -ENODEV,
1519 .sidle_shift = 0,
1520 .clkact_shift = -ENODEV,
1521 .enwkup_shift = -ENODEV,
1522 .srst_shift = -ENODEV,
1523 .emufree_shift = -ENODEV,
1524 .autoidle_shift = -ENODEV,
1525};
1526
1527static const struct sysc_capabilities sysc_omap4_mcasp = {
1528 .type = TI_SYSC_OMAP4_MCASP,
1529 .regbits = &sysc_regbits_omap4_mcasp,
1530};
1531
1532/*
1533 * FS USB host found on omap4 and later
1534 */
1535static const struct sysc_regbits sysc_regbits_omap4_usb_host_fs = {
1536 .dmadisable_shift = -ENODEV,
1537 .midle_shift = -ENODEV,
1538 .sidle_shift = 24,
1539 .clkact_shift = -ENODEV,
1540 .enwkup_shift = 26,
1541 .srst_shift = -ENODEV,
1542 .emufree_shift = -ENODEV,
1543 .autoidle_shift = -ENODEV,
1544};
1545
1546static const struct sysc_capabilities sysc_omap4_usb_host_fs = {
1547 .type = TI_SYSC_OMAP4_USB_HOST_FS,
1548 .sysc_mask = SYSC_OMAP2_ENAWAKEUP,
1549 .regbits = &sysc_regbits_omap4_usb_host_fs,
1550};
1551
ef70b0bd
TL		 1552static int sysc_init_pdata(struct sysc *ddata)
1553{
1554 struct ti_sysc_platform_data *pdata = dev_get_platdata(ddata->dev);
1555 struct ti_sysc_module_data mdata;
1556 int error = 0;
1557
1558 if (!pdata || !ddata->legacy_mode)
1559 return 0;
1560
1561 mdata.name = ddata->legacy_mode;
1562 mdata.module_pa = ddata->module_pa;
1563 mdata.module_size = ddata->module_size;
1564 mdata.offsets = ddata->offsets;
1565 mdata.nr_offsets = SYSC_MAX_REGS;
1566 mdata.cap = ddata->cap;
1567 mdata.cfg = &ddata->cfg;
1568
1569 if (!pdata->init_module)
1570 return -ENODEV;
1571
1572 error = pdata->init_module(ddata->dev, &mdata, &ddata->cookie);
1573 if (error == -EEXIST)
1574 error = 0;
1575
1576 return error;
1577}
1578
70a65240
TL		 1579static int sysc_init_match(struct sysc *ddata)
1580{
1581 const struct sysc_capabilities *cap;
1582
1583 cap = of_device_get_match_data(ddata->dev);
1584 if (!cap)
1585 return -EINVAL;
1586
1587 ddata->cap = cap;
1588 if (ddata->cap)
1589 ddata->cfg.quirks |= ddata->cap->mod_quirks;
1590
1591 return 0;
1592}
1593
76f0f772
TL		 1594static void ti_sysc_idle(struct work_struct *work)
1595{
1596 struct sysc *ddata;
1597
1598 ddata = container_of(work, struct sysc, idle_work.work);
1599
1600 if (pm_runtime_active(ddata->dev))
1601 pm_runtime_put_sync(ddata->dev);
1602}
1603
c4bebea8
TL		 1604static const struct of_device_id sysc_match_table[] = {
1605 { .compatible = "simple-bus", },
1606 { /* sentinel */ },
1607};
1608
0eecc636
TL		 1609static int sysc_probe(struct platform_device *pdev)
1610{
ef70b0bd 1611 struct ti_sysc_platform_data *pdata = dev_get_platdata(&pdev->dev);
0eecc636
TL		 1612 struct sysc *ddata;
1613 int error;
1614
1615 ddata = devm_kzalloc(&pdev->dev, sizeof(*ddata), GFP_KERNEL);
1616 if (!ddata)
1617 return -ENOMEM;
1618
1619 ddata->dev = &pdev->dev;
566a9b05 1620 platform_set_drvdata(pdev, ddata);
0eecc636 1621
70a65240
TL		 1622 error = sysc_init_match(ddata);
1623 if (error)
1624 return error;
1625
566a9b05
TL		 1626 error = sysc_init_dts_quirks(ddata);
1627 if (error)
1628 goto unprepare;
1629
0eecc636
TL		 1630 error = sysc_get_clocks(ddata);
1631 if (error)
1632 return error;
1633
1634 error = sysc_map_and_check_registers(ddata);
1635 if (error)
1636 goto unprepare;
1637
c5a2de97
TL		 1638 error = sysc_init_sysc_mask(ddata);
1639 if (error)
1640 goto unprepare;
1641
1642 error = sysc_init_idlemodes(ddata);
1643 if (error)
1644 goto unprepare;
1645
1646 error = sysc_init_syss_mask(ddata);
1647 if (error)
1648 goto unprepare;
1649
ef70b0bd
TL		 1650 error = sysc_init_pdata(ddata);
1651 if (error)
1652 goto unprepare;
1653
5062236e
TL		 1654 error = sysc_init_resets(ddata);
1655 if (error)
1656 return error;
566a9b05 1657
5062236e 1658 pm_runtime_enable(ddata->dev);
566a9b05
TL		 1659 error = sysc_init_module(ddata);
1660 if (error)
1661 goto unprepare;
1662
0eecc636
TL		 1663 error = pm_runtime_get_sync(ddata->dev);
1664 if (error < 0) {
1665 pm_runtime_put_noidle(ddata->dev);
1666 pm_runtime_disable(ddata->dev);
1667 goto unprepare;
1668 }
1669
0eecc636
TL		 1670 sysc_show_registers(ddata);
1671
2c355ff6 1672 ddata->dev->type = &sysc_device_type;
c4bebea8
TL		 1673 error = of_platform_populate(ddata->dev->of_node, sysc_match_table,
1674 pdata ? pdata->auxdata : NULL,
ef70b0bd 1675 ddata->dev);
0eecc636
TL		 1676 if (error)
1677 goto err;
1678
76f0f772
TL		 1679 INIT_DELAYED_WORK(&ddata->idle_work, ti_sysc_idle);
1680
1681 /* At least earlycon won't survive without deferred idle */
1682 if (ddata->cfg.quirks & (SYSC_QUIRK_NO_IDLE_ON_INIT |
1683 SYSC_QUIRK_NO_RESET_ON_INIT)) {
1684 schedule_delayed_work(&ddata->idle_work, 3000);
1685 } else {
1686 pm_runtime_put(&pdev->dev);
1687 }
0eecc636 1688
5062236e
TL		 1689 if (!of_get_available_child_count(ddata->dev->of_node))
1690 reset_control_assert(ddata->rsts);
1691
0eecc636
TL		 1692 return 0;
1693
1694err:
0eecc636
TL		 1695 pm_runtime_put_sync(&pdev->dev);
1696 pm_runtime_disable(&pdev->dev);
1697unprepare:
1698 sysc_unprepare(ddata);
1699
1700 return error;
1701}
1702
684be5a4
TL		 1703static int sysc_remove(struct platform_device *pdev)
1704{
1705 struct sysc *ddata = platform_get_drvdata(pdev);
1706 int error;
1707
76f0f772
TL		 1708 cancel_delayed_work_sync(&ddata->idle_work);
1709
684be5a4
TL		 1710 error = pm_runtime_get_sync(ddata->dev);
1711 if (error < 0) {
1712 pm_runtime_put_noidle(ddata->dev);
1713 pm_runtime_disable(ddata->dev);
1714 goto unprepare;
1715 }
1716
1717 of_platform_depopulate(&pdev->dev);
1718
684be5a4
TL		 1719 pm_runtime_put_sync(&pdev->dev);
1720 pm_runtime_disable(&pdev->dev);
5062236e 1721 reset_control_assert(ddata->rsts);
684be5a4
TL		 1722
1723unprepare:
1724 sysc_unprepare(ddata);
1725
1726 return 0;
1727}
1728
0eecc636 1729static const struct of_device_id sysc_match[] = {
70a65240
TL		 1730 { .compatible = "ti,sysc-omap2", .data = &sysc_omap2, },
1731 { .compatible = "ti,sysc-omap2-timer", .data = &sysc_omap2_timer, },
1732 { .compatible = "ti,sysc-omap4", .data = &sysc_omap4, },
1733 { .compatible = "ti,sysc-omap4-timer", .data = &sysc_omap4_timer, },
1734 { .compatible = "ti,sysc-omap4-simple", .data = &sysc_omap4_simple, },
1735 { .compatible = "ti,sysc-omap3430-sr", .data = &sysc_34xx_sr, },
1736 { .compatible = "ti,sysc-omap3630-sr", .data = &sysc_36xx_sr, },
1737 { .compatible = "ti,sysc-omap4-sr", .data = &sysc_omap4_sr, },
1738 { .compatible = "ti,sysc-omap3-sham", .data = &sysc_omap3_sham, },
1739 { .compatible = "ti,sysc-omap-aes", .data = &sysc_omap3_aes, },
1740 { .compatible = "ti,sysc-mcasp", .data = &sysc_omap4_mcasp, },
1741 { .compatible = "ti,sysc-usb-host-fs",
1742 .data = &sysc_omap4_usb_host_fs, },
0eecc636
TL		 1743 { },
1744};
1745MODULE_DEVICE_TABLE(of, sysc_match);
1746
1747static struct platform_driver sysc_driver = {
1748 .probe = sysc_probe,
684be5a4 1749 .remove = sysc_remove,
0eecc636
TL		 1750 .driver = {
1751 .name = "ti-sysc",
1752 .of_match_table = sysc_match,
1753 .pm = &sysc_pm_ops,
1754 },
1755};
2c355ff6
TL		 1756
1757static int __init sysc_init(void)
1758{
1759 bus_register_notifier(&platform_bus_type, &sysc_nb);
1760
1761 return platform_driver_register(&sysc_driver);
1762}
1763module_init(sysc_init);
1764
1765static void __exit sysc_exit(void)
1766{
1767 bus_unregister_notifier(&platform_bus_type, &sysc_nb);
1768 platform_driver_unregister(&sysc_driver);
1769}
1770module_exit(sysc_exit);
0eecc636
TL		 1771
1772MODULE_DESCRIPTION("TI sysc interconnect target driver");
1773MODULE_LICENSE("GPL v2");
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