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0eecc636 TL |
1 | /* |
2 | * ti-sysc.c - Texas Instruments sysc interconnect target driver | |
3 | * | |
4 | * This program is free software; you can redistribute it and/or modify | |
5 | * it under the terms of the GNU General Public License version 2 as | |
6 | * published by the Free Software Foundation. | |
7 | * | |
8 | * This program is distributed "as is" WITHOUT ANY WARRANTY of any | |
9 | * kind, whether express or implied; without even the implied warranty | |
10 | * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
11 | * GNU General Public License for more details. | |
12 | */ | |
13 | ||
14 | #include <linux/io.h> | |
15 | #include <linux/clk.h> | |
2c355ff6 | 16 | #include <linux/clkdev.h> |
a885f0fe | 17 | #include <linux/delay.h> |
0eecc636 TL |
18 | #include <linux/module.h> |
19 | #include <linux/platform_device.h> | |
a885f0fe | 20 | #include <linux/pm_domain.h> |
0eecc636 TL |
21 | #include <linux/pm_runtime.h> |
22 | #include <linux/of_address.h> | |
23 | #include <linux/of_platform.h> | |
2c355ff6 TL |
24 | #include <linux/slab.h> |
25 | ||
70a65240 TL |
26 | #include <linux/platform_data/ti-sysc.h> |
27 | ||
28 | #include <dt-bindings/bus/ti-sysc.h> | |
0eecc636 | 29 | |
0eecc636 TL |
30 | static const char * const reg_names[] = { "rev", "sysc", "syss", }; |
31 | ||
32 | enum sysc_clocks { | |
33 | SYSC_FCK, | |
34 | SYSC_ICK, | |
35 | SYSC_MAX_CLOCKS, | |
36 | }; | |
37 | ||
38 | static const char * const clock_names[] = { "fck", "ick", }; | |
39 | ||
c5a2de97 TL |
40 | #define SYSC_IDLEMODE_MASK 3 |
41 | #define SYSC_CLOCKACTIVITY_MASK 3 | |
42 | ||
0eecc636 TL |
43 | /** |
44 | * struct sysc - TI sysc interconnect target module registers and capabilities | |
45 | * @dev: struct device pointer | |
46 | * @module_pa: physical address of the interconnect target module | |
47 | * @module_size: size of the interconnect target module | |
48 | * @module_va: virtual address of the interconnect target module | |
49 | * @offsets: register offsets from module base | |
50 | * @clocks: clocks used by the interconnect target module | |
51 | * @legacy_mode: configured for legacy mode if set | |
70a65240 TL |
52 | * @cap: interconnect target module capabilities |
53 | * @cfg: interconnect target module configuration | |
566a9b05 TL |
54 | * @name: name if available |
55 | * @revision: interconnect target module revision | |
62020f23 | 56 | * @needs_resume: runtime resume needed on resume from suspend |
0eecc636 TL |
57 | */ |
58 | struct sysc { | |
59 | struct device *dev; | |
60 | u64 module_pa; | |
61 | u32 module_size; | |
62 | void __iomem *module_va; | |
63 | int offsets[SYSC_MAX_REGS]; | |
64 | struct clk *clocks[SYSC_MAX_CLOCKS]; | |
65 | const char *legacy_mode; | |
70a65240 TL |
66 | const struct sysc_capabilities *cap; |
67 | struct sysc_config cfg; | |
ef70b0bd | 68 | struct ti_sysc_cookie cookie; |
566a9b05 TL |
69 | const char *name; |
70 | u32 revision; | |
62020f23 TL |
71 | bool enabled; |
72 | bool needs_resume; | |
a885f0fe | 73 | bool child_needs_resume; |
76f0f772 | 74 | struct delayed_work idle_work; |
0eecc636 TL |
75 | }; |
76 | ||
566a9b05 TL |
77 | static u32 sysc_read(struct sysc *ddata, int offset) |
78 | { | |
79 | if (ddata->cfg.quirks & SYSC_QUIRK_16BIT) { | |
80 | u32 val; | |
81 | ||
82 | val = readw_relaxed(ddata->module_va + offset); | |
83 | val |= (readw_relaxed(ddata->module_va + offset + 4) << 16); | |
84 | ||
85 | return val; | |
86 | } | |
87 | ||
88 | return readl_relaxed(ddata->module_va + offset); | |
89 | } | |
90 | ||
0eecc636 TL |
91 | static u32 sysc_read_revision(struct sysc *ddata) |
92 | { | |
566a9b05 TL |
93 | int offset = ddata->offsets[SYSC_REVISION]; |
94 | ||
95 | if (offset < 0) | |
96 | return 0; | |
97 | ||
98 | return sysc_read(ddata, offset); | |
0eecc636 TL |
99 | } |
100 | ||
101 | static int sysc_get_one_clock(struct sysc *ddata, | |
102 | enum sysc_clocks index) | |
103 | { | |
104 | const char *name; | |
105 | int error; | |
106 | ||
107 | switch (index) { | |
108 | case SYSC_FCK: | |
109 | break; | |
110 | case SYSC_ICK: | |
111 | break; | |
112 | default: | |
113 | return -EINVAL; | |
114 | } | |
115 | name = clock_names[index]; | |
116 | ||
117 | ddata->clocks[index] = devm_clk_get(ddata->dev, name); | |
118 | if (IS_ERR(ddata->clocks[index])) { | |
119 | if (PTR_ERR(ddata->clocks[index]) == -ENOENT) | |
120 | return 0; | |
121 | ||
122 | dev_err(ddata->dev, "clock get error for %s: %li\n", | |
123 | name, PTR_ERR(ddata->clocks[index])); | |
124 | ||
125 | return PTR_ERR(ddata->clocks[index]); | |
126 | } | |
127 | ||
128 | error = clk_prepare(ddata->clocks[index]); | |
129 | if (error) { | |
130 | dev_err(ddata->dev, "clock prepare error for %s: %i\n", | |
131 | name, error); | |
132 | ||
133 | return error; | |
134 | } | |
135 | ||
136 | return 0; | |
137 | } | |
138 | ||
139 | static int sysc_get_clocks(struct sysc *ddata) | |
140 | { | |
141 | int i, error; | |
142 | ||
0eecc636 TL |
143 | for (i = 0; i < SYSC_MAX_CLOCKS; i++) { |
144 | error = sysc_get_one_clock(ddata, i); | |
145 | if (error && error != -ENOENT) | |
146 | return error; | |
147 | } | |
148 | ||
149 | return 0; | |
150 | } | |
151 | ||
152 | /** | |
153 | * sysc_parse_and_check_child_range - parses module IO region from ranges | |
154 | * @ddata: device driver data | |
155 | * | |
156 | * In general we only need rev, syss, and sysc registers and not the whole | |
157 | * module range. But we do want the offsets for these registers from the | |
158 | * module base. This allows us to check them against the legacy hwmod | |
159 | * platform data. Let's also check the ranges are configured properly. | |
160 | */ | |
161 | static int sysc_parse_and_check_child_range(struct sysc *ddata) | |
162 | { | |
163 | struct device_node *np = ddata->dev->of_node; | |
164 | const __be32 *ranges; | |
165 | u32 nr_addr, nr_size; | |
166 | int len, error; | |
167 | ||
168 | ranges = of_get_property(np, "ranges", &len); | |
169 | if (!ranges) { | |
170 | dev_err(ddata->dev, "missing ranges for %pOF\n", np); | |
171 | ||
172 | return -ENOENT; | |
173 | } | |
174 | ||
175 | len /= sizeof(*ranges); | |
176 | ||
177 | if (len < 3) { | |
178 | dev_err(ddata->dev, "incomplete ranges for %pOF\n", np); | |
179 | ||
180 | return -EINVAL; | |
181 | } | |
182 | ||
183 | error = of_property_read_u32(np, "#address-cells", &nr_addr); | |
184 | if (error) | |
185 | return -ENOENT; | |
186 | ||
187 | error = of_property_read_u32(np, "#size-cells", &nr_size); | |
188 | if (error) | |
189 | return -ENOENT; | |
190 | ||
191 | if (nr_addr != 1 || nr_size != 1) { | |
192 | dev_err(ddata->dev, "invalid ranges for %pOF\n", np); | |
193 | ||
194 | return -EINVAL; | |
195 | } | |
196 | ||
197 | ranges++; | |
198 | ddata->module_pa = of_translate_address(np, ranges++); | |
199 | ddata->module_size = be32_to_cpup(ranges); | |
200 | ||
0eecc636 TL |
201 | return 0; |
202 | } | |
203 | ||
3bb37c8e TL |
204 | static struct device_node *stdout_path; |
205 | ||
206 | static void sysc_init_stdout_path(struct sysc *ddata) | |
207 | { | |
208 | struct device_node *np = NULL; | |
209 | const char *uart; | |
210 | ||
211 | if (IS_ERR(stdout_path)) | |
212 | return; | |
213 | ||
214 | if (stdout_path) | |
215 | return; | |
216 | ||
217 | np = of_find_node_by_path("/chosen"); | |
218 | if (!np) | |
219 | goto err; | |
220 | ||
221 | uart = of_get_property(np, "stdout-path", NULL); | |
222 | if (!uart) | |
223 | goto err; | |
224 | ||
225 | np = of_find_node_by_path(uart); | |
226 | if (!np) | |
227 | goto err; | |
228 | ||
229 | stdout_path = np; | |
230 | ||
231 | return; | |
232 | ||
233 | err: | |
234 | stdout_path = ERR_PTR(-ENODEV); | |
235 | } | |
236 | ||
237 | static void sysc_check_quirk_stdout(struct sysc *ddata, | |
238 | struct device_node *np) | |
239 | { | |
240 | sysc_init_stdout_path(ddata); | |
241 | if (np != stdout_path) | |
242 | return; | |
243 | ||
244 | ddata->cfg.quirks |= SYSC_QUIRK_NO_IDLE_ON_INIT | | |
245 | SYSC_QUIRK_NO_RESET_ON_INIT; | |
246 | } | |
247 | ||
0eecc636 TL |
248 | /** |
249 | * sysc_check_one_child - check child configuration | |
250 | * @ddata: device driver data | |
251 | * @np: child device node | |
252 | * | |
253 | * Let's avoid messy situations where we have new interconnect target | |
254 | * node but children have "ti,hwmods". These belong to the interconnect | |
255 | * target node and are managed by this driver. | |
256 | */ | |
257 | static int sysc_check_one_child(struct sysc *ddata, | |
258 | struct device_node *np) | |
259 | { | |
260 | const char *name; | |
261 | ||
262 | name = of_get_property(np, "ti,hwmods", NULL); | |
263 | if (name) | |
264 | dev_warn(ddata->dev, "really a child ti,hwmods property?"); | |
265 | ||
3bb37c8e TL |
266 | sysc_check_quirk_stdout(ddata, np); |
267 | ||
0eecc636 TL |
268 | return 0; |
269 | } | |
270 | ||
271 | static int sysc_check_children(struct sysc *ddata) | |
272 | { | |
273 | struct device_node *child; | |
274 | int error; | |
275 | ||
276 | for_each_child_of_node(ddata->dev->of_node, child) { | |
277 | error = sysc_check_one_child(ddata, child); | |
278 | if (error) | |
279 | return error; | |
280 | } | |
281 | ||
282 | return 0; | |
283 | } | |
284 | ||
a7199e2b TL |
285 | /* |
286 | * So far only I2C uses 16-bit read access with clockactivity with revision | |
287 | * in two registers with stride of 4. We can detect this based on the rev | |
288 | * register size to configure things far enough to be able to properly read | |
289 | * the revision register. | |
290 | */ | |
291 | static void sysc_check_quirk_16bit(struct sysc *ddata, struct resource *res) | |
292 | { | |
dd57ac1e | 293 | if (resource_size(res) == 8) |
a7199e2b | 294 | ddata->cfg.quirks |= SYSC_QUIRK_16BIT | SYSC_QUIRK_USE_CLOCKACT; |
a7199e2b TL |
295 | } |
296 | ||
0eecc636 TL |
297 | /** |
298 | * sysc_parse_one - parses the interconnect target module registers | |
299 | * @ddata: device driver data | |
300 | * @reg: register to parse | |
301 | */ | |
302 | static int sysc_parse_one(struct sysc *ddata, enum sysc_registers reg) | |
303 | { | |
304 | struct resource *res; | |
305 | const char *name; | |
306 | ||
307 | switch (reg) { | |
308 | case SYSC_REVISION: | |
309 | case SYSC_SYSCONFIG: | |
310 | case SYSC_SYSSTATUS: | |
311 | name = reg_names[reg]; | |
312 | break; | |
313 | default: | |
314 | return -EINVAL; | |
315 | } | |
316 | ||
317 | res = platform_get_resource_byname(to_platform_device(ddata->dev), | |
318 | IORESOURCE_MEM, name); | |
319 | if (!res) { | |
0eecc636 TL |
320 | ddata->offsets[reg] = -ENODEV; |
321 | ||
322 | return 0; | |
323 | } | |
324 | ||
325 | ddata->offsets[reg] = res->start - ddata->module_pa; | |
a7199e2b TL |
326 | if (reg == SYSC_REVISION) |
327 | sysc_check_quirk_16bit(ddata, res); | |
0eecc636 TL |
328 | |
329 | return 0; | |
330 | } | |
331 | ||
332 | static int sysc_parse_registers(struct sysc *ddata) | |
333 | { | |
334 | int i, error; | |
335 | ||
336 | for (i = 0; i < SYSC_MAX_REGS; i++) { | |
337 | error = sysc_parse_one(ddata, i); | |
338 | if (error) | |
339 | return error; | |
340 | } | |
341 | ||
342 | return 0; | |
343 | } | |
344 | ||
345 | /** | |
346 | * sysc_check_registers - check for misconfigured register overlaps | |
347 | * @ddata: device driver data | |
348 | */ | |
349 | static int sysc_check_registers(struct sysc *ddata) | |
350 | { | |
351 | int i, j, nr_regs = 0, nr_matches = 0; | |
352 | ||
353 | for (i = 0; i < SYSC_MAX_REGS; i++) { | |
354 | if (ddata->offsets[i] < 0) | |
355 | continue; | |
356 | ||
357 | if (ddata->offsets[i] > (ddata->module_size - 4)) { | |
358 | dev_err(ddata->dev, "register outside module range"); | |
359 | ||
360 | return -EINVAL; | |
361 | } | |
362 | ||
363 | for (j = 0; j < SYSC_MAX_REGS; j++) { | |
364 | if (ddata->offsets[j] < 0) | |
365 | continue; | |
366 | ||
367 | if (ddata->offsets[i] == ddata->offsets[j]) | |
368 | nr_matches++; | |
369 | } | |
370 | nr_regs++; | |
371 | } | |
372 | ||
373 | if (nr_regs < 1) { | |
374 | dev_err(ddata->dev, "missing registers\n"); | |
375 | ||
376 | return -EINVAL; | |
377 | } | |
378 | ||
379 | if (nr_matches > nr_regs) { | |
380 | dev_err(ddata->dev, "overlapping registers: (%i/%i)", | |
381 | nr_regs, nr_matches); | |
382 | ||
383 | return -EINVAL; | |
384 | } | |
385 | ||
386 | return 0; | |
387 | } | |
388 | ||
389 | /** | |
390 | * syc_ioremap - ioremap register space for the interconnect target module | |
391 | * @ddata: deviec driver data | |
392 | * | |
393 | * Note that the interconnect target module registers can be anywhere | |
394 | * within the first child device address space. For example, SGX has | |
395 | * them at offset 0x1fc00 in the 32MB module address space. We just | |
396 | * what we need around the interconnect target module registers. | |
397 | */ | |
398 | static int sysc_ioremap(struct sysc *ddata) | |
399 | { | |
400 | u32 size = 0; | |
401 | ||
402 | if (ddata->offsets[SYSC_SYSSTATUS] >= 0) | |
403 | size = ddata->offsets[SYSC_SYSSTATUS]; | |
404 | else if (ddata->offsets[SYSC_SYSCONFIG] >= 0) | |
405 | size = ddata->offsets[SYSC_SYSCONFIG]; | |
406 | else if (ddata->offsets[SYSC_REVISION] >= 0) | |
407 | size = ddata->offsets[SYSC_REVISION]; | |
408 | else | |
409 | return -EINVAL; | |
410 | ||
411 | size &= 0xfff00; | |
412 | size += SZ_256; | |
413 | ||
414 | ddata->module_va = devm_ioremap(ddata->dev, | |
415 | ddata->module_pa, | |
416 | size); | |
417 | if (!ddata->module_va) | |
418 | return -EIO; | |
419 | ||
420 | return 0; | |
421 | } | |
422 | ||
423 | /** | |
424 | * sysc_map_and_check_registers - ioremap and check device registers | |
425 | * @ddata: device driver data | |
426 | */ | |
427 | static int sysc_map_and_check_registers(struct sysc *ddata) | |
428 | { | |
429 | int error; | |
430 | ||
431 | error = sysc_parse_and_check_child_range(ddata); | |
432 | if (error) | |
433 | return error; | |
434 | ||
435 | error = sysc_check_children(ddata); | |
436 | if (error) | |
437 | return error; | |
438 | ||
439 | error = sysc_parse_registers(ddata); | |
440 | if (error) | |
441 | return error; | |
442 | ||
443 | error = sysc_ioremap(ddata); | |
444 | if (error) | |
445 | return error; | |
446 | ||
447 | error = sysc_check_registers(ddata); | |
448 | if (error) | |
449 | return error; | |
450 | ||
451 | return 0; | |
452 | } | |
453 | ||
454 | /** | |
455 | * sysc_show_rev - read and show interconnect target module revision | |
456 | * @bufp: buffer to print the information to | |
457 | * @ddata: device driver data | |
458 | */ | |
459 | static int sysc_show_rev(char *bufp, struct sysc *ddata) | |
460 | { | |
566a9b05 | 461 | int len; |
0eecc636 TL |
462 | |
463 | if (ddata->offsets[SYSC_REVISION] < 0) | |
464 | return sprintf(bufp, ":NA"); | |
465 | ||
566a9b05 | 466 | len = sprintf(bufp, ":%08x", ddata->revision); |
0eecc636 TL |
467 | |
468 | return len; | |
469 | } | |
470 | ||
471 | static int sysc_show_reg(struct sysc *ddata, | |
472 | char *bufp, enum sysc_registers reg) | |
473 | { | |
474 | if (ddata->offsets[reg] < 0) | |
475 | return sprintf(bufp, ":NA"); | |
476 | ||
477 | return sprintf(bufp, ":%x", ddata->offsets[reg]); | |
478 | } | |
479 | ||
a885f0fe TL |
480 | static int sysc_show_name(char *bufp, struct sysc *ddata) |
481 | { | |
482 | if (!ddata->name) | |
483 | return 0; | |
484 | ||
485 | return sprintf(bufp, ":%s", ddata->name); | |
486 | } | |
487 | ||
0eecc636 TL |
488 | /** |
489 | * sysc_show_registers - show information about interconnect target module | |
490 | * @ddata: device driver data | |
491 | */ | |
492 | static void sysc_show_registers(struct sysc *ddata) | |
493 | { | |
494 | char buf[128]; | |
495 | char *bufp = buf; | |
496 | int i; | |
497 | ||
498 | for (i = 0; i < SYSC_MAX_REGS; i++) | |
499 | bufp += sysc_show_reg(ddata, bufp, i); | |
500 | ||
501 | bufp += sysc_show_rev(bufp, ddata); | |
a885f0fe | 502 | bufp += sysc_show_name(bufp, ddata); |
0eecc636 TL |
503 | |
504 | dev_dbg(ddata->dev, "%llx:%x%s\n", | |
505 | ddata->module_pa, ddata->module_size, | |
506 | buf); | |
507 | } | |
508 | ||
a4a5d493 | 509 | static int __maybe_unused sysc_runtime_suspend(struct device *dev) |
0eecc636 | 510 | { |
ef70b0bd | 511 | struct ti_sysc_platform_data *pdata; |
0eecc636 | 512 | struct sysc *ddata; |
ef70b0bd | 513 | int error = 0, i; |
0eecc636 TL |
514 | |
515 | ddata = dev_get_drvdata(dev); | |
516 | ||
ef70b0bd | 517 | if (!ddata->enabled) |
0eecc636 TL |
518 | return 0; |
519 | ||
ef70b0bd TL |
520 | if (ddata->legacy_mode) { |
521 | pdata = dev_get_platdata(ddata->dev); | |
522 | if (!pdata) | |
523 | return 0; | |
524 | ||
525 | if (!pdata->idle_module) | |
526 | return -ENODEV; | |
527 | ||
528 | error = pdata->idle_module(dev, &ddata->cookie); | |
529 | if (error) | |
530 | dev_err(dev, "%s: could not idle: %i\n", | |
531 | __func__, error); | |
532 | ||
533 | goto idled; | |
534 | } | |
535 | ||
0eecc636 TL |
536 | for (i = 0; i < SYSC_MAX_CLOCKS; i++) { |
537 | if (IS_ERR_OR_NULL(ddata->clocks[i])) | |
538 | continue; | |
539 | clk_disable(ddata->clocks[i]); | |
540 | } | |
541 | ||
ef70b0bd TL |
542 | idled: |
543 | ddata->enabled = false; | |
544 | ||
545 | return error; | |
0eecc636 TL |
546 | } |
547 | ||
a4a5d493 | 548 | static int __maybe_unused sysc_runtime_resume(struct device *dev) |
0eecc636 | 549 | { |
ef70b0bd | 550 | struct ti_sysc_platform_data *pdata; |
0eecc636 | 551 | struct sysc *ddata; |
ef70b0bd | 552 | int error = 0, i; |
0eecc636 TL |
553 | |
554 | ddata = dev_get_drvdata(dev); | |
555 | ||
ef70b0bd | 556 | if (ddata->enabled) |
0eecc636 TL |
557 | return 0; |
558 | ||
ef70b0bd TL |
559 | if (ddata->legacy_mode) { |
560 | pdata = dev_get_platdata(ddata->dev); | |
561 | if (!pdata) | |
562 | return 0; | |
563 | ||
564 | if (!pdata->enable_module) | |
565 | return -ENODEV; | |
566 | ||
567 | error = pdata->enable_module(dev, &ddata->cookie); | |
568 | if (error) | |
569 | dev_err(dev, "%s: could not enable: %i\n", | |
570 | __func__, error); | |
571 | ||
572 | goto awake; | |
573 | } | |
574 | ||
0eecc636 TL |
575 | for (i = 0; i < SYSC_MAX_CLOCKS; i++) { |
576 | if (IS_ERR_OR_NULL(ddata->clocks[i])) | |
577 | continue; | |
578 | error = clk_enable(ddata->clocks[i]); | |
579 | if (error) | |
580 | return error; | |
581 | } | |
582 | ||
ef70b0bd TL |
583 | awake: |
584 | ddata->enabled = true; | |
585 | ||
586 | return error; | |
0eecc636 TL |
587 | } |
588 | ||
62020f23 TL |
589 | #ifdef CONFIG_PM_SLEEP |
590 | static int sysc_suspend(struct device *dev) | |
591 | { | |
592 | struct sysc *ddata; | |
593 | ||
594 | ddata = dev_get_drvdata(dev); | |
595 | ||
596 | if (!ddata->enabled) | |
597 | return 0; | |
598 | ||
599 | ddata->needs_resume = true; | |
600 | ||
601 | return sysc_runtime_suspend(dev); | |
602 | } | |
603 | ||
604 | static int sysc_resume(struct device *dev) | |
605 | { | |
606 | struct sysc *ddata; | |
607 | ||
608 | ddata = dev_get_drvdata(dev); | |
609 | if (ddata->needs_resume) { | |
610 | ddata->needs_resume = false; | |
611 | ||
612 | return sysc_runtime_resume(dev); | |
613 | } | |
614 | ||
0eecc636 TL |
615 | return 0; |
616 | } | |
62020f23 | 617 | #endif |
0eecc636 TL |
618 | |
619 | static const struct dev_pm_ops sysc_pm_ops = { | |
62020f23 | 620 | SET_SYSTEM_SLEEP_PM_OPS(sysc_suspend, sysc_resume) |
0eecc636 TL |
621 | SET_RUNTIME_PM_OPS(sysc_runtime_suspend, |
622 | sysc_runtime_resume, | |
623 | NULL) | |
624 | }; | |
625 | ||
a885f0fe TL |
626 | /* Module revision register based quirks */ |
627 | struct sysc_revision_quirk { | |
628 | const char *name; | |
629 | u32 base; | |
630 | int rev_offset; | |
631 | int sysc_offset; | |
632 | int syss_offset; | |
633 | u32 revision; | |
634 | u32 revision_mask; | |
635 | u32 quirks; | |
636 | }; | |
637 | ||
638 | #define SYSC_QUIRK(optname, optbase, optrev, optsysc, optsyss, \ | |
639 | optrev_val, optrevmask, optquirkmask) \ | |
640 | { \ | |
641 | .name = (optname), \ | |
642 | .base = (optbase), \ | |
643 | .rev_offset = (optrev), \ | |
644 | .sysc_offset = (optsysc), \ | |
645 | .syss_offset = (optsyss), \ | |
646 | .revision = (optrev_val), \ | |
647 | .revision_mask = (optrevmask), \ | |
648 | .quirks = (optquirkmask), \ | |
649 | } | |
650 | ||
651 | static const struct sysc_revision_quirk sysc_revision_quirks[] = { | |
652 | /* These drivers need to be fixed to not use pm_runtime_irq_safe() */ | |
653 | SYSC_QUIRK("gpio", 0, 0, 0x10, 0x114, 0x50600801, 0xffffffff, | |
654 | SYSC_QUIRK_LEGACY_IDLE), | |
655 | SYSC_QUIRK("mmu", 0, 0, 0x10, 0x14, 0x00000020, 0xffffffff, | |
656 | SYSC_QUIRK_LEGACY_IDLE), | |
657 | SYSC_QUIRK("mmu", 0, 0, 0x10, 0x14, 0x00000030, 0xffffffff, | |
658 | SYSC_QUIRK_LEGACY_IDLE), | |
659 | SYSC_QUIRK("sham", 0, 0x100, 0x110, 0x114, 0x40000c03, 0xffffffff, | |
660 | SYSC_QUIRK_LEGACY_IDLE), | |
661 | SYSC_QUIRK("smartreflex", 0, -1, 0x24, -1, 0x00000000, 0xffffffff, | |
662 | SYSC_QUIRK_LEGACY_IDLE), | |
663 | SYSC_QUIRK("smartreflex", 0, -1, 0x38, -1, 0x00000000, 0xffffffff, | |
664 | SYSC_QUIRK_LEGACY_IDLE), | |
665 | SYSC_QUIRK("timer", 0, 0, 0x10, 0x14, 0x00000015, 0xffffffff, | |
666 | SYSC_QUIRK_LEGACY_IDLE), | |
667 | SYSC_QUIRK("uart", 0, 0x50, 0x54, 0x58, 0x00000052, 0xffffffff, | |
668 | SYSC_QUIRK_LEGACY_IDLE), | |
669 | }; | |
670 | ||
671 | static void sysc_init_revision_quirks(struct sysc *ddata) | |
672 | { | |
673 | const struct sysc_revision_quirk *q; | |
674 | int i; | |
675 | ||
676 | for (i = 0; i < ARRAY_SIZE(sysc_revision_quirks); i++) { | |
677 | q = &sysc_revision_quirks[i]; | |
678 | ||
679 | if (q->base && q->base != ddata->module_pa) | |
680 | continue; | |
681 | ||
682 | if (q->rev_offset >= 0 && | |
683 | q->rev_offset != ddata->offsets[SYSC_REVISION]) | |
684 | continue; | |
685 | ||
686 | if (q->sysc_offset >= 0 && | |
687 | q->sysc_offset != ddata->offsets[SYSC_SYSCONFIG]) | |
688 | continue; | |
689 | ||
690 | if (q->syss_offset >= 0 && | |
691 | q->syss_offset != ddata->offsets[SYSC_SYSSTATUS]) | |
692 | continue; | |
693 | ||
694 | if (q->revision == ddata->revision || | |
695 | (q->revision & q->revision_mask) == | |
696 | (ddata->revision & q->revision_mask)) { | |
697 | ddata->name = q->name; | |
698 | ddata->cfg.quirks |= q->quirks; | |
699 | } | |
700 | } | |
701 | } | |
702 | ||
566a9b05 TL |
703 | /* At this point the module is configured enough to read the revision */ |
704 | static int sysc_init_module(struct sysc *ddata) | |
705 | { | |
706 | int error; | |
707 | ||
a885f0fe TL |
708 | if (ddata->cfg.quirks & SYSC_QUIRK_NO_IDLE_ON_INIT) { |
709 | ddata->revision = sysc_read_revision(ddata); | |
710 | goto rev_quirks; | |
711 | } | |
712 | ||
566a9b05 TL |
713 | error = pm_runtime_get_sync(ddata->dev); |
714 | if (error < 0) { | |
715 | pm_runtime_put_noidle(ddata->dev); | |
716 | ||
717 | return 0; | |
718 | } | |
719 | ddata->revision = sysc_read_revision(ddata); | |
720 | pm_runtime_put_sync(ddata->dev); | |
721 | ||
a885f0fe TL |
722 | rev_quirks: |
723 | sysc_init_revision_quirks(ddata); | |
724 | ||
566a9b05 TL |
725 | return 0; |
726 | } | |
727 | ||
c5a2de97 TL |
728 | static int sysc_init_sysc_mask(struct sysc *ddata) |
729 | { | |
730 | struct device_node *np = ddata->dev->of_node; | |
731 | int error; | |
732 | u32 val; | |
733 | ||
734 | error = of_property_read_u32(np, "ti,sysc-mask", &val); | |
735 | if (error) | |
736 | return 0; | |
737 | ||
738 | if (val) | |
739 | ddata->cfg.sysc_val = val & ddata->cap->sysc_mask; | |
740 | else | |
741 | ddata->cfg.sysc_val = ddata->cap->sysc_mask; | |
742 | ||
743 | return 0; | |
744 | } | |
745 | ||
746 | static int sysc_init_idlemode(struct sysc *ddata, u8 *idlemodes, | |
747 | const char *name) | |
748 | { | |
749 | struct device_node *np = ddata->dev->of_node; | |
750 | struct property *prop; | |
751 | const __be32 *p; | |
752 | u32 val; | |
753 | ||
754 | of_property_for_each_u32(np, name, prop, p, val) { | |
755 | if (val >= SYSC_NR_IDLEMODES) { | |
756 | dev_err(ddata->dev, "invalid idlemode: %i\n", val); | |
757 | return -EINVAL; | |
758 | } | |
759 | *idlemodes |= (1 << val); | |
760 | } | |
761 | ||
762 | return 0; | |
763 | } | |
764 | ||
765 | static int sysc_init_idlemodes(struct sysc *ddata) | |
766 | { | |
767 | int error; | |
768 | ||
769 | error = sysc_init_idlemode(ddata, &ddata->cfg.midlemodes, | |
770 | "ti,sysc-midle"); | |
771 | if (error) | |
772 | return error; | |
773 | ||
774 | error = sysc_init_idlemode(ddata, &ddata->cfg.sidlemodes, | |
775 | "ti,sysc-sidle"); | |
776 | if (error) | |
777 | return error; | |
778 | ||
779 | return 0; | |
780 | } | |
781 | ||
782 | /* | |
783 | * Only some devices on omap4 and later have SYSCONFIG reset done | |
784 | * bit. We can detect this if there is no SYSSTATUS at all, or the | |
785 | * SYSTATUS bit 0 is not used. Note that some SYSSTATUS registers | |
786 | * have multiple bits for the child devices like OHCI and EHCI. | |
787 | * Depends on SYSC being parsed first. | |
788 | */ | |
789 | static int sysc_init_syss_mask(struct sysc *ddata) | |
790 | { | |
791 | struct device_node *np = ddata->dev->of_node; | |
792 | int error; | |
793 | u32 val; | |
794 | ||
795 | error = of_property_read_u32(np, "ti,syss-mask", &val); | |
796 | if (error) { | |
797 | if ((ddata->cap->type == TI_SYSC_OMAP4 || | |
798 | ddata->cap->type == TI_SYSC_OMAP4_TIMER) && | |
799 | (ddata->cfg.sysc_val & SYSC_OMAP4_SOFTRESET)) | |
800 | ddata->cfg.quirks |= SYSC_QUIRK_RESET_STATUS; | |
801 | ||
802 | return 0; | |
803 | } | |
804 | ||
805 | if (!(val & 1) && (ddata->cfg.sysc_val & SYSC_OMAP4_SOFTRESET)) | |
806 | ddata->cfg.quirks |= SYSC_QUIRK_RESET_STATUS; | |
807 | ||
808 | ddata->cfg.syss_mask = val; | |
809 | ||
810 | return 0; | |
811 | } | |
812 | ||
2c355ff6 TL |
813 | /* |
814 | * Many child device drivers need to have fck available to get the clock | |
815 | * rate for device internal configuration. | |
816 | */ | |
817 | static int sysc_child_add_fck(struct sysc *ddata, | |
818 | struct device *child) | |
819 | { | |
820 | struct clk *fck; | |
821 | struct clk_lookup *l; | |
822 | const char *name = clock_names[SYSC_FCK]; | |
823 | ||
824 | if (IS_ERR_OR_NULL(ddata->clocks[SYSC_FCK])) | |
825 | return 0; | |
826 | ||
827 | fck = clk_get(child, name); | |
828 | if (!IS_ERR(fck)) { | |
829 | clk_put(fck); | |
830 | ||
831 | return -EEXIST; | |
832 | } | |
833 | ||
834 | l = clkdev_create(ddata->clocks[SYSC_FCK], name, dev_name(child)); | |
835 | ||
836 | return l ? 0 : -ENODEV; | |
837 | } | |
838 | ||
839 | static struct device_type sysc_device_type = { | |
840 | }; | |
841 | ||
842 | static struct sysc *sysc_child_to_parent(struct device *dev) | |
843 | { | |
844 | struct device *parent = dev->parent; | |
845 | ||
846 | if (!parent || parent->type != &sysc_device_type) | |
847 | return NULL; | |
848 | ||
849 | return dev_get_drvdata(parent); | |
850 | } | |
851 | ||
a885f0fe TL |
852 | static int __maybe_unused sysc_child_runtime_suspend(struct device *dev) |
853 | { | |
854 | struct sysc *ddata; | |
855 | int error; | |
856 | ||
857 | ddata = sysc_child_to_parent(dev); | |
858 | ||
859 | error = pm_generic_runtime_suspend(dev); | |
860 | if (error) | |
861 | return error; | |
862 | ||
863 | if (!ddata->enabled) | |
864 | return 0; | |
865 | ||
866 | return sysc_runtime_suspend(ddata->dev); | |
867 | } | |
868 | ||
869 | static int __maybe_unused sysc_child_runtime_resume(struct device *dev) | |
870 | { | |
871 | struct sysc *ddata; | |
872 | int error; | |
873 | ||
874 | ddata = sysc_child_to_parent(dev); | |
875 | ||
876 | if (!ddata->enabled) { | |
877 | error = sysc_runtime_resume(ddata->dev); | |
878 | if (error < 0) | |
879 | dev_err(ddata->dev, | |
880 | "%s error: %i\n", __func__, error); | |
881 | } | |
882 | ||
883 | return pm_generic_runtime_resume(dev); | |
884 | } | |
885 | ||
886 | #ifdef CONFIG_PM_SLEEP | |
887 | static int sysc_child_suspend_noirq(struct device *dev) | |
888 | { | |
889 | struct sysc *ddata; | |
890 | int error; | |
891 | ||
892 | ddata = sysc_child_to_parent(dev); | |
893 | ||
894 | error = pm_generic_suspend_noirq(dev); | |
895 | if (error) | |
896 | return error; | |
897 | ||
898 | if (!pm_runtime_status_suspended(dev)) { | |
899 | error = pm_generic_runtime_suspend(dev); | |
900 | if (error) | |
901 | return error; | |
902 | ||
903 | error = sysc_runtime_suspend(ddata->dev); | |
904 | if (error) | |
905 | return error; | |
906 | ||
907 | ddata->child_needs_resume = true; | |
908 | } | |
909 | ||
910 | return 0; | |
911 | } | |
912 | ||
913 | static int sysc_child_resume_noirq(struct device *dev) | |
914 | { | |
915 | struct sysc *ddata; | |
916 | int error; | |
917 | ||
918 | ddata = sysc_child_to_parent(dev); | |
919 | ||
920 | if (ddata->child_needs_resume) { | |
921 | ddata->child_needs_resume = false; | |
922 | ||
923 | error = sysc_runtime_resume(ddata->dev); | |
924 | if (error) | |
925 | dev_err(ddata->dev, | |
926 | "%s runtime resume error: %i\n", | |
927 | __func__, error); | |
928 | ||
929 | error = pm_generic_runtime_resume(dev); | |
930 | if (error) | |
931 | dev_err(ddata->dev, | |
932 | "%s generic runtime resume: %i\n", | |
933 | __func__, error); | |
934 | } | |
935 | ||
936 | return pm_generic_resume_noirq(dev); | |
937 | } | |
938 | #endif | |
939 | ||
940 | struct dev_pm_domain sysc_child_pm_domain = { | |
941 | .ops = { | |
942 | SET_RUNTIME_PM_OPS(sysc_child_runtime_suspend, | |
943 | sysc_child_runtime_resume, | |
944 | NULL) | |
945 | USE_PLATFORM_PM_SLEEP_OPS | |
946 | SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(sysc_child_suspend_noirq, | |
947 | sysc_child_resume_noirq) | |
948 | } | |
949 | }; | |
950 | ||
951 | /** | |
952 | * sysc_legacy_idle_quirk - handle children in omap_device compatible way | |
953 | * @ddata: device driver data | |
954 | * @child: child device driver | |
955 | * | |
956 | * Allow idle for child devices as done with _od_runtime_suspend(). | |
957 | * Otherwise many child devices will not idle because of the permanent | |
958 | * parent usecount set in pm_runtime_irq_safe(). | |
959 | * | |
960 | * Note that the long term solution is to just modify the child device | |
961 | * drivers to not set pm_runtime_irq_safe() and then this can be just | |
962 | * dropped. | |
963 | */ | |
964 | static void sysc_legacy_idle_quirk(struct sysc *ddata, struct device *child) | |
965 | { | |
966 | if (!ddata->legacy_mode) | |
967 | return; | |
968 | ||
969 | if (ddata->cfg.quirks & SYSC_QUIRK_LEGACY_IDLE) | |
970 | dev_pm_domain_set(child, &sysc_child_pm_domain); | |
971 | } | |
972 | ||
2c355ff6 TL |
973 | static int sysc_notifier_call(struct notifier_block *nb, |
974 | unsigned long event, void *device) | |
975 | { | |
976 | struct device *dev = device; | |
977 | struct sysc *ddata; | |
978 | int error; | |
979 | ||
980 | ddata = sysc_child_to_parent(dev); | |
981 | if (!ddata) | |
982 | return NOTIFY_DONE; | |
983 | ||
984 | switch (event) { | |
985 | case BUS_NOTIFY_ADD_DEVICE: | |
986 | error = sysc_child_add_fck(ddata, dev); | |
987 | if (error && error != -EEXIST) | |
988 | dev_warn(ddata->dev, "could not add %s fck: %i\n", | |
989 | dev_name(dev), error); | |
a885f0fe | 990 | sysc_legacy_idle_quirk(ddata, dev); |
2c355ff6 TL |
991 | break; |
992 | default: | |
993 | break; | |
994 | } | |
995 | ||
996 | return NOTIFY_DONE; | |
997 | } | |
998 | ||
999 | static struct notifier_block sysc_nb = { | |
1000 | .notifier_call = sysc_notifier_call, | |
1001 | }; | |
1002 | ||
566a9b05 TL |
1003 | /* Device tree configured quirks */ |
1004 | struct sysc_dts_quirk { | |
1005 | const char *name; | |
1006 | u32 mask; | |
1007 | }; | |
1008 | ||
1009 | static const struct sysc_dts_quirk sysc_dts_quirks[] = { | |
1010 | { .name = "ti,no-idle-on-init", | |
1011 | .mask = SYSC_QUIRK_NO_IDLE_ON_INIT, }, | |
1012 | { .name = "ti,no-reset-on-init", | |
1013 | .mask = SYSC_QUIRK_NO_RESET_ON_INIT, }, | |
1014 | }; | |
1015 | ||
1016 | static int sysc_init_dts_quirks(struct sysc *ddata) | |
1017 | { | |
1018 | struct device_node *np = ddata->dev->of_node; | |
1019 | const struct property *prop; | |
1020 | int i, len, error; | |
1021 | u32 val; | |
1022 | ||
1023 | ddata->legacy_mode = of_get_property(np, "ti,hwmods", NULL); | |
1024 | ||
1025 | for (i = 0; i < ARRAY_SIZE(sysc_dts_quirks); i++) { | |
1026 | prop = of_get_property(np, sysc_dts_quirks[i].name, &len); | |
1027 | if (!prop) | |
d39b6ea4 | 1028 | continue; |
566a9b05 TL |
1029 | |
1030 | ddata->cfg.quirks |= sysc_dts_quirks[i].mask; | |
1031 | } | |
1032 | ||
1033 | error = of_property_read_u32(np, "ti,sysc-delay-us", &val); | |
1034 | if (!error) { | |
1035 | if (val > 255) { | |
1036 | dev_warn(ddata->dev, "bad ti,sysc-delay-us: %i\n", | |
1037 | val); | |
1038 | } | |
1039 | ||
1040 | ddata->cfg.srst_udelay = (u8)val; | |
1041 | } | |
1042 | ||
1043 | return 0; | |
1044 | } | |
1045 | ||
0eecc636 TL |
1046 | static void sysc_unprepare(struct sysc *ddata) |
1047 | { | |
1048 | int i; | |
1049 | ||
1050 | for (i = 0; i < SYSC_MAX_CLOCKS; i++) { | |
1051 | if (!IS_ERR_OR_NULL(ddata->clocks[i])) | |
1052 | clk_unprepare(ddata->clocks[i]); | |
1053 | } | |
1054 | } | |
1055 | ||
70a65240 TL |
1056 | /* |
1057 | * Common sysc register bits found on omap2, also known as type1 | |
1058 | */ | |
1059 | static const struct sysc_regbits sysc_regbits_omap2 = { | |
1060 | .dmadisable_shift = -ENODEV, | |
1061 | .midle_shift = 12, | |
1062 | .sidle_shift = 3, | |
1063 | .clkact_shift = 8, | |
1064 | .emufree_shift = 5, | |
1065 | .enwkup_shift = 2, | |
1066 | .srst_shift = 1, | |
1067 | .autoidle_shift = 0, | |
1068 | }; | |
1069 | ||
1070 | static const struct sysc_capabilities sysc_omap2 = { | |
1071 | .type = TI_SYSC_OMAP2, | |
1072 | .sysc_mask = SYSC_OMAP2_CLOCKACTIVITY | SYSC_OMAP2_EMUFREE | | |
1073 | SYSC_OMAP2_ENAWAKEUP | SYSC_OMAP2_SOFTRESET | | |
1074 | SYSC_OMAP2_AUTOIDLE, | |
1075 | .regbits = &sysc_regbits_omap2, | |
1076 | }; | |
1077 | ||
1078 | /* All omap2 and 3 timers, and timers 1, 2 & 10 on omap 4 and 5 */ | |
1079 | static const struct sysc_capabilities sysc_omap2_timer = { | |
1080 | .type = TI_SYSC_OMAP2_TIMER, | |
1081 | .sysc_mask = SYSC_OMAP2_CLOCKACTIVITY | SYSC_OMAP2_EMUFREE | | |
1082 | SYSC_OMAP2_ENAWAKEUP | SYSC_OMAP2_SOFTRESET | | |
1083 | SYSC_OMAP2_AUTOIDLE, | |
1084 | .regbits = &sysc_regbits_omap2, | |
1085 | .mod_quirks = SYSC_QUIRK_USE_CLOCKACT, | |
1086 | }; | |
1087 | ||
1088 | /* | |
1089 | * SHAM2 (SHA1/MD5) sysc found on omap3, a variant of sysc_regbits_omap2 | |
1090 | * with different sidle position | |
1091 | */ | |
1092 | static const struct sysc_regbits sysc_regbits_omap3_sham = { | |
1093 | .dmadisable_shift = -ENODEV, | |
1094 | .midle_shift = -ENODEV, | |
1095 | .sidle_shift = 4, | |
1096 | .clkact_shift = -ENODEV, | |
1097 | .enwkup_shift = -ENODEV, | |
1098 | .srst_shift = 1, | |
1099 | .autoidle_shift = 0, | |
1100 | .emufree_shift = -ENODEV, | |
1101 | }; | |
1102 | ||
1103 | static const struct sysc_capabilities sysc_omap3_sham = { | |
1104 | .type = TI_SYSC_OMAP3_SHAM, | |
1105 | .sysc_mask = SYSC_OMAP2_SOFTRESET | SYSC_OMAP2_AUTOIDLE, | |
1106 | .regbits = &sysc_regbits_omap3_sham, | |
1107 | }; | |
1108 | ||
1109 | /* | |
1110 | * AES register bits found on omap3 and later, a variant of | |
1111 | * sysc_regbits_omap2 with different sidle position | |
1112 | */ | |
1113 | static const struct sysc_regbits sysc_regbits_omap3_aes = { | |
1114 | .dmadisable_shift = -ENODEV, | |
1115 | .midle_shift = -ENODEV, | |
1116 | .sidle_shift = 6, | |
1117 | .clkact_shift = -ENODEV, | |
1118 | .enwkup_shift = -ENODEV, | |
1119 | .srst_shift = 1, | |
1120 | .autoidle_shift = 0, | |
1121 | .emufree_shift = -ENODEV, | |
1122 | }; | |
1123 | ||
1124 | static const struct sysc_capabilities sysc_omap3_aes = { | |
1125 | .type = TI_SYSC_OMAP3_AES, | |
1126 | .sysc_mask = SYSC_OMAP2_SOFTRESET | SYSC_OMAP2_AUTOIDLE, | |
1127 | .regbits = &sysc_regbits_omap3_aes, | |
1128 | }; | |
1129 | ||
1130 | /* | |
1131 | * Common sysc register bits found on omap4, also known as type2 | |
1132 | */ | |
1133 | static const struct sysc_regbits sysc_regbits_omap4 = { | |
1134 | .dmadisable_shift = 16, | |
1135 | .midle_shift = 4, | |
1136 | .sidle_shift = 2, | |
1137 | .clkact_shift = -ENODEV, | |
1138 | .enwkup_shift = -ENODEV, | |
1139 | .emufree_shift = 1, | |
1140 | .srst_shift = 0, | |
1141 | .autoidle_shift = -ENODEV, | |
1142 | }; | |
1143 | ||
1144 | static const struct sysc_capabilities sysc_omap4 = { | |
1145 | .type = TI_SYSC_OMAP4, | |
1146 | .sysc_mask = SYSC_OMAP4_DMADISABLE | SYSC_OMAP4_FREEEMU | | |
1147 | SYSC_OMAP4_SOFTRESET, | |
1148 | .regbits = &sysc_regbits_omap4, | |
1149 | }; | |
1150 | ||
1151 | static const struct sysc_capabilities sysc_omap4_timer = { | |
1152 | .type = TI_SYSC_OMAP4_TIMER, | |
1153 | .sysc_mask = SYSC_OMAP4_DMADISABLE | SYSC_OMAP4_FREEEMU | | |
1154 | SYSC_OMAP4_SOFTRESET, | |
1155 | .regbits = &sysc_regbits_omap4, | |
1156 | }; | |
1157 | ||
1158 | /* | |
1159 | * Common sysc register bits found on omap4, also known as type3 | |
1160 | */ | |
1161 | static const struct sysc_regbits sysc_regbits_omap4_simple = { | |
1162 | .dmadisable_shift = -ENODEV, | |
1163 | .midle_shift = 2, | |
1164 | .sidle_shift = 0, | |
1165 | .clkact_shift = -ENODEV, | |
1166 | .enwkup_shift = -ENODEV, | |
1167 | .srst_shift = -ENODEV, | |
1168 | .emufree_shift = -ENODEV, | |
1169 | .autoidle_shift = -ENODEV, | |
1170 | }; | |
1171 | ||
1172 | static const struct sysc_capabilities sysc_omap4_simple = { | |
1173 | .type = TI_SYSC_OMAP4_SIMPLE, | |
1174 | .regbits = &sysc_regbits_omap4_simple, | |
1175 | }; | |
1176 | ||
1177 | /* | |
1178 | * SmartReflex sysc found on omap34xx | |
1179 | */ | |
1180 | static const struct sysc_regbits sysc_regbits_omap34xx_sr = { | |
1181 | .dmadisable_shift = -ENODEV, | |
1182 | .midle_shift = -ENODEV, | |
1183 | .sidle_shift = -ENODEV, | |
1184 | .clkact_shift = 20, | |
1185 | .enwkup_shift = -ENODEV, | |
1186 | .srst_shift = -ENODEV, | |
1187 | .emufree_shift = -ENODEV, | |
1188 | .autoidle_shift = -ENODEV, | |
1189 | }; | |
1190 | ||
1191 | static const struct sysc_capabilities sysc_34xx_sr = { | |
1192 | .type = TI_SYSC_OMAP34XX_SR, | |
1193 | .sysc_mask = SYSC_OMAP2_CLOCKACTIVITY, | |
1194 | .regbits = &sysc_regbits_omap34xx_sr, | |
a885f0fe TL |
1195 | .mod_quirks = SYSC_QUIRK_USE_CLOCKACT | SYSC_QUIRK_UNCACHED | |
1196 | SYSC_QUIRK_LEGACY_IDLE, | |
70a65240 TL |
1197 | }; |
1198 | ||
1199 | /* | |
1200 | * SmartReflex sysc found on omap36xx and later | |
1201 | */ | |
1202 | static const struct sysc_regbits sysc_regbits_omap36xx_sr = { | |
1203 | .dmadisable_shift = -ENODEV, | |
1204 | .midle_shift = -ENODEV, | |
1205 | .sidle_shift = 24, | |
1206 | .clkact_shift = -ENODEV, | |
1207 | .enwkup_shift = 26, | |
1208 | .srst_shift = -ENODEV, | |
1209 | .emufree_shift = -ENODEV, | |
1210 | .autoidle_shift = -ENODEV, | |
1211 | }; | |
1212 | ||
1213 | static const struct sysc_capabilities sysc_36xx_sr = { | |
1214 | .type = TI_SYSC_OMAP36XX_SR, | |
3267c081 | 1215 | .sysc_mask = SYSC_OMAP3_SR_ENAWAKEUP, |
70a65240 | 1216 | .regbits = &sysc_regbits_omap36xx_sr, |
a885f0fe | 1217 | .mod_quirks = SYSC_QUIRK_UNCACHED | SYSC_QUIRK_LEGACY_IDLE, |
70a65240 TL |
1218 | }; |
1219 | ||
1220 | static const struct sysc_capabilities sysc_omap4_sr = { | |
1221 | .type = TI_SYSC_OMAP4_SR, | |
1222 | .regbits = &sysc_regbits_omap36xx_sr, | |
a885f0fe | 1223 | .mod_quirks = SYSC_QUIRK_LEGACY_IDLE, |
70a65240 TL |
1224 | }; |
1225 | ||
1226 | /* | |
1227 | * McASP register bits found on omap4 and later | |
1228 | */ | |
1229 | static const struct sysc_regbits sysc_regbits_omap4_mcasp = { | |
1230 | .dmadisable_shift = -ENODEV, | |
1231 | .midle_shift = -ENODEV, | |
1232 | .sidle_shift = 0, | |
1233 | .clkact_shift = -ENODEV, | |
1234 | .enwkup_shift = -ENODEV, | |
1235 | .srst_shift = -ENODEV, | |
1236 | .emufree_shift = -ENODEV, | |
1237 | .autoidle_shift = -ENODEV, | |
1238 | }; | |
1239 | ||
1240 | static const struct sysc_capabilities sysc_omap4_mcasp = { | |
1241 | .type = TI_SYSC_OMAP4_MCASP, | |
1242 | .regbits = &sysc_regbits_omap4_mcasp, | |
1243 | }; | |
1244 | ||
1245 | /* | |
1246 | * FS USB host found on omap4 and later | |
1247 | */ | |
1248 | static const struct sysc_regbits sysc_regbits_omap4_usb_host_fs = { | |
1249 | .dmadisable_shift = -ENODEV, | |
1250 | .midle_shift = -ENODEV, | |
1251 | .sidle_shift = 24, | |
1252 | .clkact_shift = -ENODEV, | |
1253 | .enwkup_shift = 26, | |
1254 | .srst_shift = -ENODEV, | |
1255 | .emufree_shift = -ENODEV, | |
1256 | .autoidle_shift = -ENODEV, | |
1257 | }; | |
1258 | ||
1259 | static const struct sysc_capabilities sysc_omap4_usb_host_fs = { | |
1260 | .type = TI_SYSC_OMAP4_USB_HOST_FS, | |
1261 | .sysc_mask = SYSC_OMAP2_ENAWAKEUP, | |
1262 | .regbits = &sysc_regbits_omap4_usb_host_fs, | |
1263 | }; | |
1264 | ||
ef70b0bd TL |
1265 | static int sysc_init_pdata(struct sysc *ddata) |
1266 | { | |
1267 | struct ti_sysc_platform_data *pdata = dev_get_platdata(ddata->dev); | |
1268 | struct ti_sysc_module_data mdata; | |
1269 | int error = 0; | |
1270 | ||
1271 | if (!pdata || !ddata->legacy_mode) | |
1272 | return 0; | |
1273 | ||
1274 | mdata.name = ddata->legacy_mode; | |
1275 | mdata.module_pa = ddata->module_pa; | |
1276 | mdata.module_size = ddata->module_size; | |
1277 | mdata.offsets = ddata->offsets; | |
1278 | mdata.nr_offsets = SYSC_MAX_REGS; | |
1279 | mdata.cap = ddata->cap; | |
1280 | mdata.cfg = &ddata->cfg; | |
1281 | ||
1282 | if (!pdata->init_module) | |
1283 | return -ENODEV; | |
1284 | ||
1285 | error = pdata->init_module(ddata->dev, &mdata, &ddata->cookie); | |
1286 | if (error == -EEXIST) | |
1287 | error = 0; | |
1288 | ||
1289 | return error; | |
1290 | } | |
1291 | ||
70a65240 TL |
1292 | static int sysc_init_match(struct sysc *ddata) |
1293 | { | |
1294 | const struct sysc_capabilities *cap; | |
1295 | ||
1296 | cap = of_device_get_match_data(ddata->dev); | |
1297 | if (!cap) | |
1298 | return -EINVAL; | |
1299 | ||
1300 | ddata->cap = cap; | |
1301 | if (ddata->cap) | |
1302 | ddata->cfg.quirks |= ddata->cap->mod_quirks; | |
1303 | ||
1304 | return 0; | |
1305 | } | |
1306 | ||
76f0f772 TL |
1307 | static void ti_sysc_idle(struct work_struct *work) |
1308 | { | |
1309 | struct sysc *ddata; | |
1310 | ||
1311 | ddata = container_of(work, struct sysc, idle_work.work); | |
1312 | ||
1313 | if (pm_runtime_active(ddata->dev)) | |
1314 | pm_runtime_put_sync(ddata->dev); | |
1315 | } | |
1316 | ||
c4bebea8 TL |
1317 | static const struct of_device_id sysc_match_table[] = { |
1318 | { .compatible = "simple-bus", }, | |
1319 | { /* sentinel */ }, | |
1320 | }; | |
1321 | ||
0eecc636 TL |
1322 | static int sysc_probe(struct platform_device *pdev) |
1323 | { | |
ef70b0bd | 1324 | struct ti_sysc_platform_data *pdata = dev_get_platdata(&pdev->dev); |
0eecc636 TL |
1325 | struct sysc *ddata; |
1326 | int error; | |
1327 | ||
1328 | ddata = devm_kzalloc(&pdev->dev, sizeof(*ddata), GFP_KERNEL); | |
1329 | if (!ddata) | |
1330 | return -ENOMEM; | |
1331 | ||
1332 | ddata->dev = &pdev->dev; | |
566a9b05 | 1333 | platform_set_drvdata(pdev, ddata); |
0eecc636 | 1334 | |
70a65240 TL |
1335 | error = sysc_init_match(ddata); |
1336 | if (error) | |
1337 | return error; | |
1338 | ||
566a9b05 TL |
1339 | error = sysc_init_dts_quirks(ddata); |
1340 | if (error) | |
1341 | goto unprepare; | |
1342 | ||
0eecc636 TL |
1343 | error = sysc_get_clocks(ddata); |
1344 | if (error) | |
1345 | return error; | |
1346 | ||
1347 | error = sysc_map_and_check_registers(ddata); | |
1348 | if (error) | |
1349 | goto unprepare; | |
1350 | ||
c5a2de97 TL |
1351 | error = sysc_init_sysc_mask(ddata); |
1352 | if (error) | |
1353 | goto unprepare; | |
1354 | ||
1355 | error = sysc_init_idlemodes(ddata); | |
1356 | if (error) | |
1357 | goto unprepare; | |
1358 | ||
1359 | error = sysc_init_syss_mask(ddata); | |
1360 | if (error) | |
1361 | goto unprepare; | |
1362 | ||
ef70b0bd TL |
1363 | error = sysc_init_pdata(ddata); |
1364 | if (error) | |
1365 | goto unprepare; | |
1366 | ||
0eecc636 | 1367 | pm_runtime_enable(ddata->dev); |
566a9b05 TL |
1368 | |
1369 | error = sysc_init_module(ddata); | |
1370 | if (error) | |
1371 | goto unprepare; | |
1372 | ||
0eecc636 TL |
1373 | error = pm_runtime_get_sync(ddata->dev); |
1374 | if (error < 0) { | |
1375 | pm_runtime_put_noidle(ddata->dev); | |
1376 | pm_runtime_disable(ddata->dev); | |
1377 | goto unprepare; | |
1378 | } | |
1379 | ||
0eecc636 TL |
1380 | sysc_show_registers(ddata); |
1381 | ||
2c355ff6 | 1382 | ddata->dev->type = &sysc_device_type; |
c4bebea8 TL |
1383 | error = of_platform_populate(ddata->dev->of_node, sysc_match_table, |
1384 | pdata ? pdata->auxdata : NULL, | |
ef70b0bd | 1385 | ddata->dev); |
0eecc636 TL |
1386 | if (error) |
1387 | goto err; | |
1388 | ||
76f0f772 TL |
1389 | INIT_DELAYED_WORK(&ddata->idle_work, ti_sysc_idle); |
1390 | ||
1391 | /* At least earlycon won't survive without deferred idle */ | |
1392 | if (ddata->cfg.quirks & (SYSC_QUIRK_NO_IDLE_ON_INIT | | |
1393 | SYSC_QUIRK_NO_RESET_ON_INIT)) { | |
1394 | schedule_delayed_work(&ddata->idle_work, 3000); | |
1395 | } else { | |
1396 | pm_runtime_put(&pdev->dev); | |
1397 | } | |
0eecc636 TL |
1398 | |
1399 | return 0; | |
1400 | ||
1401 | err: | |
0eecc636 TL |
1402 | pm_runtime_put_sync(&pdev->dev); |
1403 | pm_runtime_disable(&pdev->dev); | |
1404 | unprepare: | |
1405 | sysc_unprepare(ddata); | |
1406 | ||
1407 | return error; | |
1408 | } | |
1409 | ||
684be5a4 TL |
1410 | static int sysc_remove(struct platform_device *pdev) |
1411 | { | |
1412 | struct sysc *ddata = platform_get_drvdata(pdev); | |
1413 | int error; | |
1414 | ||
76f0f772 TL |
1415 | cancel_delayed_work_sync(&ddata->idle_work); |
1416 | ||
684be5a4 TL |
1417 | error = pm_runtime_get_sync(ddata->dev); |
1418 | if (error < 0) { | |
1419 | pm_runtime_put_noidle(ddata->dev); | |
1420 | pm_runtime_disable(ddata->dev); | |
1421 | goto unprepare; | |
1422 | } | |
1423 | ||
1424 | of_platform_depopulate(&pdev->dev); | |
1425 | ||
684be5a4 TL |
1426 | pm_runtime_put_sync(&pdev->dev); |
1427 | pm_runtime_disable(&pdev->dev); | |
1428 | ||
1429 | unprepare: | |
1430 | sysc_unprepare(ddata); | |
1431 | ||
1432 | return 0; | |
1433 | } | |
1434 | ||
0eecc636 | 1435 | static const struct of_device_id sysc_match[] = { |
70a65240 TL |
1436 | { .compatible = "ti,sysc-omap2", .data = &sysc_omap2, }, |
1437 | { .compatible = "ti,sysc-omap2-timer", .data = &sysc_omap2_timer, }, | |
1438 | { .compatible = "ti,sysc-omap4", .data = &sysc_omap4, }, | |
1439 | { .compatible = "ti,sysc-omap4-timer", .data = &sysc_omap4_timer, }, | |
1440 | { .compatible = "ti,sysc-omap4-simple", .data = &sysc_omap4_simple, }, | |
1441 | { .compatible = "ti,sysc-omap3430-sr", .data = &sysc_34xx_sr, }, | |
1442 | { .compatible = "ti,sysc-omap3630-sr", .data = &sysc_36xx_sr, }, | |
1443 | { .compatible = "ti,sysc-omap4-sr", .data = &sysc_omap4_sr, }, | |
1444 | { .compatible = "ti,sysc-omap3-sham", .data = &sysc_omap3_sham, }, | |
1445 | { .compatible = "ti,sysc-omap-aes", .data = &sysc_omap3_aes, }, | |
1446 | { .compatible = "ti,sysc-mcasp", .data = &sysc_omap4_mcasp, }, | |
1447 | { .compatible = "ti,sysc-usb-host-fs", | |
1448 | .data = &sysc_omap4_usb_host_fs, }, | |
0eecc636 TL |
1449 | { }, |
1450 | }; | |
1451 | MODULE_DEVICE_TABLE(of, sysc_match); | |
1452 | ||
1453 | static struct platform_driver sysc_driver = { | |
1454 | .probe = sysc_probe, | |
684be5a4 | 1455 | .remove = sysc_remove, |
0eecc636 TL |
1456 | .driver = { |
1457 | .name = "ti-sysc", | |
1458 | .of_match_table = sysc_match, | |
1459 | .pm = &sysc_pm_ops, | |
1460 | }, | |
1461 | }; | |
2c355ff6 TL |
1462 | |
1463 | static int __init sysc_init(void) | |
1464 | { | |
1465 | bus_register_notifier(&platform_bus_type, &sysc_nb); | |
1466 | ||
1467 | return platform_driver_register(&sysc_driver); | |
1468 | } | |
1469 | module_init(sysc_init); | |
1470 | ||
1471 | static void __exit sysc_exit(void) | |
1472 | { | |
1473 | bus_unregister_notifier(&platform_bus_type, &sysc_nb); | |
1474 | platform_driver_unregister(&sysc_driver); | |
1475 | } | |
1476 | module_exit(sysc_exit); | |
0eecc636 TL |
1477 | |
1478 | MODULE_DESCRIPTION("TI sysc interconnect target driver"); | |
1479 | MODULE_LICENSE("GPL v2"); |